Philips 32PFL3404/12 Specifications

Colour Television
Chassis
TCM3.1L
LA
Click
18520_000_090309.eps
090316
Contents
Page
Revision List
2
Technical Specifications and Connections
2
Precautions, Notes, and Abbreviation List
4
Mechanical Instructions
8
Service Modes, Error Codes, and Fault Finding 12
Alignments
20
Circuit Descriptions
22
IC Data Sheets
25
Block Diagrams
Wiring Diagram 32" (Click)
37
Wiring Diagram 42" (Click)
38
Block Diagram
39
10. Circuit Diagrams and PWB Layouts
Drawing
PSU: Power Supply Unit (32")
(A1) 40
PSU: Power Supply Unit (42")
(A1) 43
PSU: Power Supply Unit (42")
(A2) 44
SSB: DC/DC
(B01) 47
SSB: MT822x Processor
(B02) 48
SSB: DDR SD-RAM
(B03) 49
SSB: Tuner
(B04) 50
SSB: HDMI
(B05) 51
SSB: I/O - VGA, USB, S-Video
(B06) 52
SSB: Digital Analog Converter, DAC
(B07) 53
SSB: I/O - Connectivity YPbPr
(B08) 54
SSB: MUX and DEMUX
(B09) 55
SSB: Audio Amplifier
(B10) 56
SSB: MCU Stand-by
(B11) 57
Side Control Panel
(E) 64
IR Panel
(J) 66
Contents
Page
1.
2.
3.
4.
5.
6.
7.
8.
9.
PWB
41-42
45-46
45-46
58-63
58-63
58-63
58-63
58-63
58-63
58-63
58-63
58-63
58-63
58-63
65
67
©
Copyright 2009 Koninklijke Philips Electronics N.V.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic, mechanical,
photocopying, or otherwise without the prior permission of Philips.
Published by JA/JY 0966 BU TV Consumer Care, the Netherlands
Subject to modification
EN 3122 785 18650
2009-Jun-05
EN 2
1.
Revision List
TCM3.1L LA
1. Revision List
Manual xxxx xxx xxxx.0
• First release.
2. Technical Specifications and Connections
user manuals, frequently asked questions and software &
drivers.
Index of this chapter:
2.1 Technical Specifications
2.2 Directions for Use
2.3 Connection Overview
2.4 Chassis Overview
Table 2-1 Described Model numbers
CTN
Notes:
• Figures can deviate due to the different set executions.
• Specifications are indicative (subject to change).
2.1
Technical Specifications
For on-line product support please use the links in Table 2-1.
Here is product information available, as well as getting started,
2.2
Styling
Published in SM
32PFL3404/77
Click
3122 785 18650
32PFL3404/78
Click
3122 785 18650
42PFL3604/77
Click
3122 785 18650
42PFL3604/78
Click
3122 785 18650
Directions for Use
Click on the hyperlinks in table above.
2.3
Connection Overview
Rear connector s
Side connector s
8
1
IR out
2
3
4
5
18650_001_090603.eps
090603
Figure 2-1 Rear and side I/O connections
2009-Jun-05
Technical Specifications and Connections
2.3.1
Side connections
2.3.2
Note: The following connector colour abbreviations are used
(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy=
Grey, Rd= Red, Wh= White, and Ye= Yellow.
TCM3.1L LA
2.
EN 3
Rear Connections
1 - HDMI 1 & 2: Digital Video, Digital Audio - In
See HDMI side connector.
2 - VGA/PC: Video RGB - In
1 - USB2.0
1
5
10
6
1
2
3
E_06532_022.eps
300904
E_06532_002.eps
171108
Figure 2-2 USB (type A)
1
2
3
4
- +5V
- Data (-)
- Data (+)
- Ground
Figure 2-4 VGA Connector
k
jk
jk
H
Gnd
2 - HDMI: Digital Video, Digital Audio - In
19
18
1
2
E_06532_017.eps
250505
Figure 2-3 HDMI (type A) connector
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
- D2+
- Shield
- D2- D1+
- Shield
- D1- D0+
- Shield
- D0- CLK+
- Shield
- CLK- n.c.
- n.c.
- DDC_SCL
- DDC_SDA
- Ground
- +5V
- HPD
- Ground
j
H
j
j
H
j
j
H
j
j
H
j
Data channel
Gnd
Data channel
Data channel
Gnd
Data channel
Data channel
Gnd
Data channel
Data channel
Gnd
Data channel
DDC clock
DDC data
Gnd
Hot Plug Detect
Gnd
3 & 4 - Cinch: Video CVBS - In, Audio - In
Ye - Video CVBS
1 VPP / 75 Ω
Wh - Audio L
0.5 VRMS / 10 kΩ
Rd - Audio R
0.5 VRMS / 10 kΩ
5 - Mini Jack: Audio Head phone - Out
Bk - Head phone
32 - 600 Ω / 10 mW
15
11
4
j
jk
H
j
j
H
jq
jq
jq
ot
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
- Video Red
- Video Green
- Video Blue
- n.c.
- Ground
- Ground Red
- Ground Green
- Ground Blue
- +5VDC
- Ground Sync
- n.c.
- DDC_SDA
- H-sync
- V-sync
- DDC_SCL
0.7 VPP / 75 Ω
0.7 VPP / 75 Ω
0.7 VPP / 75 Ω
j
j
j
Gnd
Gnd
Gnd
Gnd
+5 V
Gnd
H
H
H
H
j
H
DDC data
0-5V
0-5V
DDC clock
j
j
j
j
2 - PC Audio: Mini Jack: VGA Audio - In
Bk - Audio L/R
0.5 VRMS / 10 kΩ
3 - Aerial - In
- - IEC-type (EU)
Coax, 75 Ω
D
4 - Mini Jack: Service Connector (UART)
1 - Ground
Gnd
2 - UART_TX
Transmit
3 - UART_RX
Receive
H
k
j
5 - AV-Out: Cinch: Video CVBS - Out, Audio - Out
Ye - Video CVBS
1 VPP / 75 Ω
Wh - Audio L
0.5 VRMS /10 kΩ
Rd - Audio R
0.5 VRMS / 10 kΩ
kq
kq
kq
6 - AV-1: Cinch: Video CVBS - In, Audio - In
Ye - Video CVBS
1 VPP / 75 Ω
Wh - Audio L
0.5 VRMS / 10 kΩ
Rd - Audio R
0.5 VRMS / 10 kΩ
jq
jq
jq
7 - CVI-1&2: Cinch: Video YPbPr - In, Audio - In
Gn - Video Y
1 VPP / 75 Ω
Bu - Video Pb
0.7 VPP / 75 Ω
Rd - Video Pr
0.7 VPP / 75 Ω
Wh - Audio L
0.5 VRMS / 10 kΩ
Rd - Audio R
0.5 VRMS / 10 kΩ
jq
jq
jq
jq
jq
8 - IR Out (if present)
1 - Ground
Gnd
2 - OIRI-IN
3 - Ground
Gnd
2.4
jq
H
k
H
Chassis Overview
Refer to chapter Block Diagrams for PWB/CBA locations.
2009-Jun-05
EN 4
3.
TCM3.1L LA
Precautions, Notes, and Abbreviation List
3. Precautions, Notes, and Abbreviation List
Index of this chapter:
3.1 Safety Instructions
3.2 Warnings
3.3 Notes
3.4 Abbreviation List
3.1
Safety Instructions
Safety regulations require the following during a repair:
• Connect the set to the Mains/AC Power via an isolation
transformer (> 800 VA).
• Replace safety components, indicated by the symbol h,
only by components identical to the original ones. Any
other component substitution (other than original type) may
increase risk of fire or electrical shock hazard. Of de set
ontploft!
Safety regulations require that after a repair, the set must be
returned in its original condition. Pay in particular attention to
the following points:
• Route the wire trees correctly and fix them with the
mounted cable clamps.
• Check the insulation of the Mains/AC Power lead for
external damage.
• Check the strain relief of the Mains/AC Power cord for
proper function.
• Check the electrical DC resistance between the Mains/AC
Power plug and the secondary side (only for sets that have
a Mains/AC Power isolated power supply):
1. Unplug the Mains/AC Power cord and connect a wire
between the two pins of the Mains/AC Power plug.
2. Set the Mains/AC Power switch to the “on” position
(keep the Mains/AC Power cord unplugged!).
3. Measure the resistance value between the pins of the
Mains/AC Power plug and the metal shielding of the
tuner or the aerial connection on the set. The reading
should be between 4.5 MΩ and 12 MΩ.
4. Switch “off” the set, and remove the wire between the
two pins of the Mains/AC Power plug.
• Check the cabinet for defects, to prevent touching of any
inner parts by the customer.
3.2
•
Warnings
•
•
•
•
All ICs and many other semiconductors are susceptible to
electrostatic discharges (ESD w). Careless handling
during repair can reduce life drastically. Make sure that,
during repair, you are connected with the same potential as
the mass of the set by a wristband with resistance. Keep
components and tools also at this same potential.
Be careful during measurements in the high voltage
section.
Never replace modules or other components while the unit
is switched “on”.
When you align the set, use plastic rather than metal tools.
This will prevent any short circuits and the danger of a
circuit becoming unstable.
3.3
Notes
3.3.1
General
•
2009-Jun-05
Measure the voltages and waveforms with regard to the
chassis (= tuner) ground (H), or hot ground (I), depending
on the tested area of circuitry. The voltages and waveforms
shown in the diagrams are indicative. Measure them in the
Service Default Mode with a colour bar signal and stereo
sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and
3.3.2
Schematic Notes
•
•
•
•
•
•
3.3.3
picture carrier at 475.25 MHz for PAL, or 61.25 MHz for
NTSC (channel 3).
Where necessary, measure the waveforms and voltages
with (D) and without (E) aerial signal. Measure the
voltages in the power supply section both in normal
operation (G) and in stand-by (F). These values are
indicated by means of the appropriate symbols.
All resistor values are in ohms, and the value multiplier is
often used to indicate the decimal point location (e.g. 2K2
indicates 2.2 kΩ).
Resistor values with no multiplier may be indicated with
either an “E” or an “R” (e.g. 220E or 220R indicates 220 Ω).
All capacitor values are given in micro-farads (μ = × 10-6),
nano-farads (n = × 10-9), or pico-farads (p = × 10-12).
Capacitor values may also use the value multiplier as the
decimal point indication (e.g. 2p2 indicates 2.2 pF).
An “asterisk” (*) indicates component usage varies. Refer
to the diversity tables for the correct values.
The correct component values are listed on the Philips
Spare Parts Web Portal.
Spare Parts
For the latest spare part overview, consult your Philips Spare
Part web portal.
3.3.4
BGA (Ball Grid Array) ICs
Introduction
For more information on how to handle BGA devices, visit this
URL: http://www.atyourservice-magazine.com. Select
“Magazine”, then go to “Repair downloads”. Here you will find
Information on how to deal with BGA-ICs.
BGA Temperature Profiles
For BGA-ICs, you must use the correct temperature-profile.
Where applicable and available, this profile is added to the IC
Data Sheet information section in this manual.
3.3.5
Lead-free Soldering
Due to lead-free technology some rules have to be respected
by the workshop during a repair:
• Use only lead-free soldering tin. If lead-free solder paste is
required, please contact the manufacturer of your soldering
equipment. In general, use of solder paste within
workshops should be avoided because paste is not easy to
store and to handle.
• Use only adequate solder tools applicable for lead-free
soldering tin. The solder tool must be able:
– To reach a solder-tip temperature of at least 400°C.
– To stabilize the adjusted temperature at the solder-tip.
– To exchange solder-tips for different applications.
• Adjust your solder tool so that a temperature of around
360°C - 380°C is reached and stabilized at the solder joint.
Heating time of the solder-joint should not exceed ~ 4 sec.
Avoid temperatures above 400°C, otherwise wear-out of
tips will increase drastically and flux-fluid will be destroyed.
To avoid wear-out of tips, switch “off” unused equipment or
reduce heat.
• Mix of lead-free soldering tin/parts with leaded soldering
tin/parts is possible but PHILIPS recommends strongly to
avoid mixed regimes. If this cannot be avoided, carefully
clear the solder-joint from old tin and re-solder with new tin.
Precautions, Notes, and Abbreviation List
3.3.6
3.4
Alternative BOM identification
It should be noted that on the European Service website,
“Alternative BOM” is referred to as “Design variant”.
The third digit in the serial number (example:
AG2B0335000001) indicates the number of the alternative
B.O.M. (Bill Of Materials) that has been used for producing the
specific TV set. In general, it is possible that the same TV
model on the market is produced with e.g. two different types
of displays, coming from two different suppliers. This will then
result in sets which have the same CTN (Commercial Type
Number; e.g. 28PW9515/12) but which have a different B.O.M.
number.
By looking at the third digit of the serial number, one can
identify which B.O.M. is used for the TV set he is working with.
If the third digit of the serial number contains the number “1”
(example: AG1B033500001), then the TV set has been
manufactured according to B.O.M. number 1. If the third digit is
a “2” (example: AG2B0335000001), then the set has been
produced according to B.O.M. no. 2. This is important for
ordering the correct spare parts!
For the third digit, the numbers 1...9 and the characters A...Z
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be
indicated by the third digit of the serial number.
Identification: The bottom line of a type plate gives a 14-digit
serial number. Digits 1 and 2 refer to the production centre (e.g.
AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers
to the Service version change code, digits 5 and 6 refer to the
production year, and digits 7 and 8 refer to production week (in
example below it is 2006 week 17). The 6 last digits contain the
serial number.
MODEL
: 32PF9968/10
PROD.NO: AG 1A0617 000001
MADE IN BELGIUM
220-240V ~ 50/60Hz
128W
VHF+S+H+UHF
S
BJ3.0E LA
10000_024_090121.eps
090121
0/6/12
AARA
ACI
ADC
AFC
AGC
AM
AP
AR
ASF
ATSC
ATV
Auto TV
AV
AVC
AVIP
B/G
BLR
BTSC
Board Level Repair (BLR) or Component Level Repair
(CLR)
If a board is defective, consult your repair procedure to decide
if the board has to be exchanged or if it should be repaired on
component level.
If your repair procedure says the board should be exchanged
completely, do not solder on the defective board. Otherwise, it
cannot be returned to the O.E.M. supplier for back charging!
3.3.8
Practical Service Precautions
•
•
It makes sense to avoid exposure to electrical shock.
While some sources are expected to have a possible
dangerous impact, others of quite high potential are of
limited current and are sometimes held in less regard.
Always respect voltages. While some may not be
dangerous in themselves, they can cause unexpected
reactions that are best avoided. Before reaching into a
powered TV set, it is best to test the high voltage insulation.
It is easy to do, and is a good service precaution.
3.
EN 5
Abbreviation List
Figure 3-1 Serial number (example)
3.3.7
TCM3.1L LA
B-TXT
C
CEC
CL
CLR
ComPair
CP
CSM
CTI
CVBS
DAC
DBE
DDC
D/K
DFI
DFU
DMR
DMSD
DNM
SCART switch control signal on A/V
board. 0 = loop through (AUX to TV),
6 = play 16 : 9 format, 12 = play 4 : 3
format
Automatic Aspect Ratio Adaptation:
algorithm that adapts aspect ratio to
remove horizontal black bars; keeps
the original aspect ratio
Automatic Channel Installation:
algorithm that installs TV channels
directly from a cable network by
means of a predefined TXT page
Analogue to Digital Converter
Automatic Frequency Control: control
signal used to tune to the correct
frequency
Automatic Gain Control: algorithm that
controls the video input of the feature
box
Amplitude Modulation
Asia Pacific
Aspect Ratio: 4 by 3 or 16 by 9
Auto Screen Fit: algorithm that adapts
aspect ratio to remove horizontal black
bars without discarding video
information
Advanced Television Systems
Committee, the digital TV standard in
the USA
See Auto TV
A hardware and software control
system that measures picture content,
and adapts image parameters in a
dynamic way
External Audio Video
Audio Video Controller
Audio Video Input Processor
Monochrome TV system. Sound
carrier distance is 5.5 MHz
Board-Level Repair
Broadcast Television Standard
Committee. Multiplex FM stereo sound
system, originating from the USA and
used e.g. in LATAM and AP-NTSC
countries
Blue TeleteXT
Centre channel (audio)
Consumer Electronics Control bus:
remote control bus on HDMI
connections
Constant Level: audio output to
connect with an external amplifier
Component Level Repair
Computer aided rePair
Connected Planet / Copy Protection
Customer Service Mode
Color Transient Improvement:
manipulates steepness of chroma
transients
Composite Video Blanking and
Synchronization
Digital to Analogue Converter
Dynamic Bass Enhancement: extra
low frequency amplification
See “E-DDC”
Monochrome TV system. Sound
carrier distance is 6.5 MHz
Dynamic Frame Insertion
Directions For Use: owner's manual
Digital Media Reader: card reader
Digital Multi Standard Decoding
Digital Natural Motion
2009-Jun-05
EN 6
3.
DNR
DRAM
DRM
DSP
DST
DTCP
DVB-C
DVB-T
DVD
DVI(-d)
E-DDC
EDID
EEPROM
EMI
EPLD
EU
EXT
FDS
FDW
FLASH
FM
FPGA
FTV
Gb/s
G-TXT
H
HD
HDD
HDCP
HDMI
HP
I
I2 C
I2 D
I2 S
IF
IR
IRQ
ITU-656
2009-Jun-05
TCM3.1L LA
Precautions, Notes, and Abbreviation List
Digital Noise Reduction: noise
reduction feature of the set
Dynamic RAM
Digital Rights Management
Digital Signal Processing
Dealer Service Tool: special remote
control designed for service
technicians
Digital Transmission Content
Protection; A protocol for protecting
digital audio/video content that is
traversing a high speed serial bus,
such as IEEE-1394
Digital Video Broadcast - Cable
Digital Video Broadcast - Terrestrial
Digital Versatile Disc
Digital Visual Interface (d= digital only)
Enhanced Display Data Channel
(VESA standard for communication
channel and display). Using E-DDC,
the video source can read the EDID
information form the display.
Extended Display Identification Data
(VESA standard)
Electrically Erasable and
Programmable Read Only Memory
Electro Magnetic Interference
Erasable Programmable Logic Device
Europe
EXTernal (source), entering the set by
SCART or by cinches (jacks)
Full Dual Screen (same as FDW)
Full Dual Window (same as FDS)
FLASH memory
Field Memory or Frequency
Modulation
Field-Programmable Gate Array
Flat TeleVision
Giga bits per second
Green TeleteXT
H_sync to the module
High Definition
Hard Disk Drive
High-bandwidth Digital Content
Protection: A “key” encoded into the
HDMI/DVI signal that prevents video
data piracy. If a source is HDCP coded
and connected via HDMI/DVI without
the proper HDCP decoding, the
picture is put into a “snow vision” mode
or changed to a low resolution. For
normal content distribution the source
and the display device must be
enabled for HDCP “software key”
decoding.
High Definition Multimedia Interface
HeadPhone
Monochrome TV system. Sound
carrier distance is 6.0 MHz
Inter IC bus
Inter IC Data bus
Inter IC Sound bus
Intermediate Frequency
Infra Red
Interrupt Request
The ITU Radio communication Sector
(ITU-R) is a standards body
subcommittee of the International
Telecommunication Union relating to
radio communication. ITU-656 (a.k.a.
SDI), is a digitized video format used
for broadcast grade video.
Uncompressed digital component or
digital composite signals can be used.
The SDI signal is self-synchronizing,
ITV
LS
LATAM
LCD
LED
L/L'
LPL
LS
LVDS
Mbps
M/N
MIPS
MOP
MOSFET
MPEG
MPIF
MUTE
NC
NICAM
NTC
NTSC
NVM
O/C
OSD
OTC
P50
PAL
PCB
PCM
PDP
PFC
PIP
PLL
POD
POR
PTC
PWB
uses 8 bit or 10 bit data words, and has
a maximum data rate of 270 Mbit/s,
with a minimum bandwidth of 135
MHz.
Institutional TeleVision; TV sets for
hotels, hospitals etc.
Last Status; The settings last chosen
by the customer and read and stored
in RAM or in the NVM. They are called
at start-up of the set to configure it
according to the customer's
preferences
Latin America
Liquid Crystal Display
Light Emitting Diode
Monochrome TV system. Sound
carrier distance is 6.5 MHz. L' is Band
I, L is all bands except for Band I
LG.Philips LCD (supplier)
Loudspeaker
Low Voltage Differential Signalling
Mega bits per second
Monochrome TV system. Sound
carrier distance is 4.5 MHz
Microprocessor without Interlocked
Pipeline-Stages; A RISC-based
microprocessor
Matrix Output Processor
Metal Oxide Silicon Field Effect
Transistor, switching device
Motion Pictures Experts Group
Multi Platform InterFace
MUTE Line
Not Connected
Near Instantaneous Compounded
Audio Multiplexing. This is a digital
sound system, mainly used in Europe.
Negative Temperature Coefficient,
non-linear resistor
National Television Standard
Committee. Color system mainly used
in North America and Japan. Color
carrier NTSC M/N= 3.579545 MHz,
NTSC 4.43= 4.433619 MHz (this is a
VCR norm, it is not transmitted off-air)
Non-Volatile Memory: IC containing
TV related data such as alignments
Open Circuit
On Screen Display
On screen display Teletext and
Control; also called Artistic (SAA5800)
Project 50: communication protocol
between TV and peripherals
Phase Alternating Line. Color system
mainly used in West Europe (color
carrier= 4.433619 MHz) and South
America (color carrier PAL M=
3.575612 MHz and PAL N= 3.582056
MHz)
Printed Circuit Board (same as “PWB”)
Pulse Code Modulation
Plasma Display Panel
Power Factor Corrector (or Preconditioner)
Picture In Picture
Phase Locked Loop. Used for e.g.
FST tuning systems. The customer
can give directly the desired frequency
Point Of Deployment: a removable
CAM module, implementing the CA
system for a host (e.g. a TV-set)
Power On Reset, signal to reset the uP
Positive Temperature Coefficient,
non-linear resistor
Printed Wiring Board (same as “PCB”)
Precautions, Notes, and Abbreviation List
PWM
QRC
QTNR
QVCP
RAM
RGB
RC
RC5 / RC6
RESET
ROM
RSDS
R-TXT
SAM
S/C
SCART
SCL
SCL-F
SD
SDA
SDA-F
SDI
SDRAM
SECAM
SIF
SMPS
SoC
SOG
SOPS
SPI
S/PDIF
SRAM
SRP
SSB
STBY
SVGA
SVHS
SW
SWAN
SXGA
TFT
THD
TMDS
TXT
TXT-DW
UI
uP
UXGA
V
VESA
VGA
VL
VSB
WYSIWYR
WXGA
XTAL
XGA
Pulse Width Modulation
Quasi Resonant Converter
Quality Temporal Noise Reduction
Quality Video Composition Processor
Random Access Memory
Red, Green, and Blue. The primary
color signals for TV. By mixing levels
of R, G, and B, all colors (Y/C) are
reproduced.
Remote Control
Signal protocol from the remote
control receiver
RESET signal
Read Only Memory
Reduced Swing Differential Signalling
data interface
Red TeleteXT
Service Alignment Mode
Short Circuit
Syndicat des Constructeurs
d'Appareils Radiorécepteurs et
Téléviseurs
Serial Clock I2C
CLock Signal on Fast I2C bus
Standard Definition
Serial Data I2C
DAta Signal on Fast I2C bus
Serial Digital Interface, see “ITU-656”
Synchronous DRAM
SEequence Couleur Avec Mémoire.
Color system mainly used in France
and East Europe. Color carriers=
4.406250 MHz and 4.250000 MHz
Sound Intermediate Frequency
Switched Mode Power Supply
System on Chip
Sync On Green
Self Oscillating Power Supply
Serial Peripheral Interface bus; a 4wire synchronous serial data link
standard
Sony Philips Digital InterFace
Static RAM
Service Reference Protocol
Small Signal Board
STand-BY
800 × 600 (4:3)
Super Video Home System
Software
Spatial temporal Weighted Averaging
Noise reduction
1280 × 1024
Thin Film Transistor
Total Harmonic Distortion
Transmission Minimized Differential
Signalling
TeleteXT
Dual Window with TeleteXT
User Interface
Microprocessor
1600 × 1200 (4:3)
V-sync to the module
Video Electronics Standards
Association
640 × 480 (4:3)
Variable Level out: processed audio
output toward external amplifier
Vestigial Side Band; modulation
method
What You See Is What You Record:
record selection that follows main
picture and sound
1280 × 768 (15:9)
Quartz crystal
1024 × 768 (4:3)
Y
Y/C
YPbPr
YUV
TCM3.1L LA
3.
EN 7
Luminance signal
Luminance (Y) and Chrominance (C)
signal
Component video. Luminance and
scaled color difference signals (B-Y
and R-Y)
Component video
2009-Jun-05
EN 8
4.
Mechanical Instructions
TCM3.1L LA
4. Mechanical Instructions
Index of this chapter:
4.1 Service Positions
4.2 Cable Dressing and Taping
4.3 Assy/Panel Removal
4.4 Set Re-assembly
Notes:
• Figures below can deviate slightly from the actual situation,
due to the different set executions.
4.1
Service Positions
For easy servicing of this set, there are a few possibilities
created:
• The buffers from the packaging.
• Foam bars (created for Service).
4.1.1
Foam Bars
The foam bars (order code 3122 785 90580 for two pieces) can
be used for all types and sizes of Flat TVs.
See figure Figure 4-1 for details. Sets with a display of 42" and
larger, require four foam bars [1]. Ensure that the foam bars
are always supporting the cabinet and never only the display.
Caution: Failure to follow these guidelines can seriously
damage the display!
By positioning the TV face down on the (ESD protective) foam
bars, a stable situation is created to perform measurements
and alignments. By placing a mirror under the TV, the screen
can be monitored.
1
1
Required for sets
42"
E_06532_018.eps
171106
Figure 4-1 Foam bars
2009-Jun-05
Mechanical Instructions
4.2
TCM3.1L LA
4.
EN 9
Cable Dressing and Taping
18520_105_090318.eps
090603
Figure 4-2 Cable dressing and taping 32" model
18520_100_090309.eps
090309
Figure 4-3 Cable dressing and taping 42" model
2009-Jun-05
EN 10
4.3
4.
TCM3.1L LA
Mechanical Instructions
Assy/Panel Removal
Caution: It is mandatory to remount screws at their original
position during re-assembly. Failure to do so may result in
damaging the SSB. Refer to Figure 4-4 for details.
4.3.1
Rear Cover
Warning/Notes:
• Disconnect the mains power cord before rear cover
removal.
• It is not necessary to remove the stand while removing the
rear cover.
• Re-use the original screws when re-assembling the TV.
1. Remove all screws of the rear cover.
Important: Be sure to re-use the same screws when
remounting the rear cover, as these screws have a 30
degrees thread instead of the common used 45 degrees
thread.
2. Lift the rear cover from the TV. Make sure that wires and
flat coils are not damaged while lifting the rear cover from
the set.
4.3.2
4.3.7
LCD Panel
Description below is based upon the 42" model with LG display.
Disassembly method of other LCD panels is comparable to the
one described below. See also “Mechanical layout” drawings.
4. Unplug and remove all cables.
5. Remove the Main Supply Panel and Small SIgnal Board as
described earlier.
6. Remove all metal brackets that are mounted on the panel
(be aware of the different screws used, see figure “Used
screws”):
– Two VESA holder brackets at the top (screw #2).
– Two SSB holder brackets (screws #2 and #3).
– Two central holder brackets (screw #2).
– One PSU holder bracket (screw#1).
7. Remove the stand [1] (screw #5).
8. Remove the subframe of the stand [2] (screw #2).
9. Remove the brackets [3] (screw #3) that secure the LCD
panel, and remove screws #4 at the bottom of the LCD.
10. The LCD panel can now be lifted from the front cabinet.
Speakers
Each speaker unit is mounted (in rubber) with two screws.
When defective, replace the whole unit.
4.3.3
IR & LED Board
1. Remove the two screws that hold the assy.
2. Unplug the connector on the board (be aware of the
connector lock).
When defective, replace the whole unit.
4.3.4
Key Board Control Panel
1. Remove the two screws that hold the assy.
2. Unplug the connectors on the board.
When defective, replace the whole unit.
4.3.5
Main Supply Panel
1. Unplug all connectors (be aware of the connector locks).
2. Remove the fixation screws (screw #1).
3. Take the board out.
When defective, replace the whole unit.
4.3.6
Small Signal Board (SSB)
1. Unplug all connectors on the SSB.
2. Remove all screws (screw #1) that hold the board.
3. The SSB can now be taken out of the set, together with the
side connector cover.
2009-Jun-05
18520_101_090311.eps
090311
Figure 4-4 Used screws
Mechanical Instructions
TCM3.1L LA
4.
EN 11
32 Mechanical layout definition
S S B b ra c k e t U
VESA
2 0 0 *2 0 0
Panel
b ra c k e t R
Panel
b ra c k e t L
SSB
IP B
B u tto n
S ID E AV
b ra c k e t
IP B b ra c k e t
IR - L e n s
2 * S pea ker
A C -In B ra c k e t
S ta n d
S S B b ra c k e t B
18520_104_090318.eps
090318
Figure 4-5 Mechanical layout 32" model
42 Mechanical layout definition
VESA
4 0 0 *4 0 0
Panel
b ra c k e t R
Panel
b ra c k e t L
S S B b ra c k e t U
IP B
SSB
IP B b ra c k e t
S ID E AV
b ra c k e t
B u tto n
S S B b ra c k e t B
IR - L E D
2 * Speaker
S ta n d
b ra c k e t
A C -In B ra c k e t
18520_102_090318.eps
090318
Figure 4-6 Mechanical layout 42" model
4.4
Set Re-assembly
•
Pay special attention not to damage the EMC foams in the
set. Ensure that EMC foams are mounted correctly.
To re-assemble the whole set, execute all processes in reverse
order.
Notes:
• While re-assembling, make sure that all cables are placed
and connected in their original position.
2009-Jun-05
EN 12
5.
TCM3.1L LA
Service Modes, Error Codes, and Fault Finding
5. Service Modes, Error Codes, and Fault Finding
–
Index of this chapter:
5.1 Measurement Conditions
5.2 Service Modes
5.3 Service Tools
5.4 Error Codes
5.5 The Blinking LED Procedure (LAYER-2 codes)
5.6 Fault Finding and Repair Tips
5.7 Software Upgrading
5.1
Measurement Conditions
Perform measurements under the following conditions:
• Service Default Mode.
• Video: Colour bar signal.
• Audio: 3 kHz left, 1 kHz right.
5.2
Service Modes
•
Note: For the new model range, a new remote control (RC) is
used with some renamed buttons. This has an impact on the
activation of the Service modes. For instance the old “MENU”
button is now called “HOME” (or is indicated by a “house” icon).
Service Default mode (SDM) and Service Alignment Mode
(SAM) offer several features for the service technician, while
the Customer Service Mode (CSM) is used for communication
between the call centre and the customer.
This chassis also offers the option of using ComPair, a
hardware interface between a computer and the TV chassis. It
offers the abilities of structured troubleshooting, error code
reading, and software version read-out for all chassis.
(see also section 5.3.1 ComPair).
5.2.1
•
•
•
•
Service Default Mode (SDM)
Purpose
To start the blinking LED procedure where only layer 2 errors
are displayed (see also section 5.4 Error Codes).
How to Activate SDM
Use the standard RC-transmitter and key in the code “062596”,
directly followed by the “MENU” (or HOME) button.
After activating this mode, “SDM” will appear in the upper right
corner of the screen (when a picture is available).
How to Navigate
When the “MENU” (or HOME) button is pressed on the RC
transmitter, the set will toggle between the SDM and the normal
user menu (with the SDM mode still active in the background).
Op. Hours. During the life time cycle of the TV, a life
timer is kept. It counts the normal operation hours, not
the Stand-by hours. The actual value of the life timer is
displayed in SAM in decimal value. For every two startups the counter increases by one. Min. 5 digits are
displayed in decimal digits. In detail:
• Every 2x cold start-ups, to display a picture,
increases the counter by 1 (i.e. interrupt the mains
supply 2x while the set is ON).
• Every 2x warm start-ups (from Stand-by), to
display a picture, increases the counter by 1.
• Every hour of normal operating increases the
counter by 1 (i.e. if a set is continue ON for 2 hours,
then increase the counter by 2).
• Stand-by hours are NOT counted.
– Main SW ID. Displays the loaded main SW version.
– Error Code x (where “x” is 1 to 5). The most recent
error is displayed at the upper position (for an error
explanation see section 5.4 Error Codes).
Clear Codes. When “arrow right” is pressed and then the
“OK” button is pressed, the error buffer is reset.
Options. Choosing the CTN will set the options, see also
chapter 6.4 Option Settings.
RGB Align. This will activate the alignments sub-menu.
See chapter 6.3.2 White Point for more details.
NVM Editor. This will give the opportunity to directly
change values in the NVM by selecting the address and
value. Use decimal values! See chapter 6.4 Option
Settings.
NVM Copy. For easy transfer of NVM settings:
– Copy to USB. To upload several settings from the TV
to an USB stick. See 5-1 USB Copy content. To upload
the settings, press “arrow right” (or the “OK button),
confirm with “OK” and wait until “OK” appears. Now the
settings are stored onto the USB stick can be used to
download to another TV or other SSB. Uploading is of
course only possible if the software is running and if a
picture is available. This method is created to be able
to save the customer’s TV settings and to store them
into another SSB.
– Copy from USB. To download several settings from
the USB stick to the TV. Same way of working as with
uploading. To make sure that the download of the
channel list from USB to the TV is executed properly, it
is necessary to restart the TV and tune to a valid preset
if necessary.
Table 5-1 USB Copy content
S/N NVM USB Copy content
Display settings
White
RGB
2
Personal settings
eg. Brightness, colour, Yes
hue, equalizer, band,
head phone volume, child
lock, time, picture format...
3
Channel List
Channel preset
4
Options list
Option code
Yes
5
AGC and AFC
alignment
SSB specific
No.
6
HDCP key
7
Model
8
Production serial nbr. BA1A0837123456
Yes
9
Software Version
TXM21E 1.00
No. Read and display.
10
Option Code
(used display)
009
yes
11
Codes
011 000 000 000 000
No. Error detection
12
SSB
996512312345
No
13
Display
996512345678
Yes
How to Exit SDM
Switch the set to STAND-BY via the RC-transmitter.
5.2.2
Service Alignment Mode (SAM)
Purpose
• To perform (software) alignments.
• To change option settings.
• To easily identify the used software version.
• To view operation hours.
• To display (or clear) the error code buffer.
How to Activate SAM
Via a standard RC transmitter: key in the code “062596”
directly followed by the “i+/INFO” button.
Contents of SAM (see also 6.4 Option Settings):
• Syst. Info. Giving overview of:
2009-Jun-05
To be copied /Remarks
1
Point
alignment, Yes
Yes
No.
22PFL1234D/10
Yes
14
PSU
996512311111
Yes
15
NVM version
Supplier to advise
NVM version
No. Read and display.
Service Modes, Error Codes, and Fault Finding
S/N NVM USB Copy content
To be copied /Remarks
16
No. Read and display.
PQ version
Supplier to advise
PQ version
5.
HDCP key
Valid
No. Are measure results
S/N Description
Explanation
18
Signal Quality/Present
Digital percentage and
analog Yes/No.
No. Are measure results
1
Model Number
NVM read/write (max. 16 characters)
2
Production Serial Nbr. NVM read/write (max. 16 characters)
19
Audio System
Detect and display
No. Are measure results
3
Software Version
Detect and Display SW version
20
Video Format
Detect and display
No. Are measure results
4
Option Code
Store in NVM (panel code)
21
Stand-by uP SW ID
Detect and display
No. Read and display
•
Tuner. This will activate the alignments sub-menu. See
chapter 6.3.1 Tuner AGC (RF AGC Take Over Point
Adjustment) for more details.
Auto ADC. This will activate the alignments sub-menu.
See chapter 6.3.3 Auto ADC for more details.
How to Navigate
• In SAM, the menu items can be selected with the “Arrow
up/down” key on the RC-transmitter. The selected item will
be highlighted. When not all menu items fit on the screen,
move the “Arrow up/down” key to display the next/previous
menu items.
• With the “Arrow Left/Right” keys, it is possible to:
– (De) activate the selected menu item.
– (De) activate the selected sub menu.
• With the “OK” key, it is possible to activate the selected
action.
• With the “Menu/Home” key, it is possible to go back to the
previous selection.
5
Codes
Layer-2 error code.
6
SSB
12NC NVM read/write (12 characters)
7
Display
12NC NVM read/write (12 characters)
8
PSU
12NC NVM read/write (12 characters)
9
NVM version
Detect and Display NVM version
10
HDCP key
Detect and display (valid/invalid)
11
Signal Quality/Present Present / No signal
12
Audio System
Video Format
Detect and display: signal dependent
14
Stand-by uP SW ID
Detect and display.
•
•
•
Customer Service Mode (CSM)
When CSM is activated:
• A test pattern will be displayed during 3 s. This test pattern
is generated by the MT822x video processor. So if this test
pattern is shown, it could be determined that the back end
video chain (MT822x, LVDS, and display) of the SSB is
working.
• The LAYER 1 error is displayed via the blinking front LED.
Only the latest error is displayed. See also section 5.4 Error
Codes.
How to Activate CSM
Key in the code “123654” via the standard RC transmitter.
Note: Activation of the CSM is only possible if there is no (user)
menu on the screen!
Detect and display:
Mono, Stereo, Nicam (signal dependent)
13
How to Exit SAM
Switch the set to STAND-BY via the RC-transmitter.
Purpose
When a customer is having problems with his TV-set, he can
call his dealer or the Customer Helpdesk. The service
technician can then ask the customer to activate the CSM, in
order to identify the status of the set. Now, the service
technician can judge the severity of the complaint. In many
cases, he can advise the customer how to solve the problem,
or he can decide if it is necessary to visit the customer
The CSM is a read only mode; therefore, modifications in this
mode are not possible
EN 13
Contents of CSM
The contents are displayed on two pages:
17
•
5.2.3
TCM3.1L LA
•
•
•
•
•
•
•
•
•
•
•
Model Number. This information is very helpful for a
helpdesk/workshop as reference for further diagnosis. In
this way, it is not necessary for the customer to look at the
rear of the TV-set. Note that if an NVM is replaced or is
initialised after corruption, this model type has to be rewritten to NVM. ComPair will foresee in a possibility to do
this.
Production Serial Number. Displays the production code
(the serial number) of the TV. Note that if an NVM is
replaced or is initialized after corruption, this production
code has to be re-written to NVM. ComPair will foresee a in
possibility to do this.
Software Version. Displays the current main software
version. In case of field problems that are related to
software, this software can be upgraded. As it is consumer
upgradeable, it will also be published on the Internet.
Option Code. Gives the display codes as set in SAM. See
also section 6.4 Option Settings.
Codes. Gives the error code overview. See also table 5-3
Layer-2 code overview.
SSB. Gives an identification of the SSB order code as
stored in NVM. Note that if an NVM is replaced or is
initialized after corruption, this identification number has to
be re-written to NVM. ComPair will foresee in a possibility
to do this.
Display. Shows the 12NC of the display.
PSU. Shows the 12NC of the Power Supply Unit.
NVM version. Displays the SW-version that is used in the
NVM.
HDCP key. Indicates of the HDMI keys (or HDCP keys) are
valid or not. In case these keys are not valid and the
consumer wants to make use of the HDMI functionality, the
SSB has to be replaced.
Signal Quality/Present. Displays the received signal
quality or its presence.
Audio System. Displays the received audio system.
Video Format. Displays the received video format.
Stand-by uP SW ID. Displays the current Stand-by
Processor software version.
How to Exit CSM
By pressing the “MENU/HOME” key, the OSD (i+) key, the
Stand-by key or the power down button.
How to Navigate
By means of the “Arrow up/down” button on the RC-transmitter,
one can navigate through the menus.
2009-Jun-05
EN 14
5.
TCM3.1L LA
Service Modes, Error Codes, and Fault Finding
5.3
Service Tools
5.4
Error Codes
5.3.1
ComPair
5.4.1
Introduction
Introduction
ComPair (Computer Aided Repair) is a Service tool for Philips
Consumer Electronics products. and offers the following:
1. ComPair helps to quickly get an understanding on how to
repair the chassis in a short and effective way.
2. ComPair allows very detailed diagnostics and is therefore
capable of accurately indicating problem areas. No
knowledge on I2C or UART commands is necessary,
because ComPair takes care of this.
3. ComPair speeds up the repair time since it can
automatically communicate with the chassis (when the uP
is working) and all repair information is directly available.
4. ComPair features TV software up possibilities.
The error code buffer contains all detected errors since the last
time the buffer was erased. The buffer is written from top to
bottom (or left to right), new errors are logged at the top/left
side, and all other errors shift one position to the bottom/right.
When an error occurs, it is added to the list of errors, provided
the list is not full. When the error buffer is full, then the new error
is not added, and the error buffer stays intact (history is
maintained).
To prevent that an occasional error stays in the list forever, the
error is removed from the list after more than 50 hrs. of
operation/
There is a simple blinking LED procedure for board level repair
(home repair) the so called LAYER 1 errors, next to the existing
errors which are LAYER 2 errors:
• LAYER 1 errors are one digit errors
• LAYER 2 errors are two digit errors.
Specifications
ComPair consists of a Windows based fault finding program
and an interface box between PC and the (defective) product.
The ComPair II interface box is connected to the PC via an
USB cable. For the TV chassis, the ComPair interface box and
the TV communicate via a bi-directional cable via the service
connector(s).
The ComPair fault finding program is able to determine the
problem of the defective television, by a combination of
automatic diagnostics and an interactive question/answer
procedure.
When is LAYER 1 or 2 available:
• In CSM mode: When entering CSM: error LAYER 1 will be
displayed by blinking LED. Only the latest error is shown.
• In SDM mode: When SDM is entered via Remote Control
code, LAYER 2 is displayed via blinking LED.
Error display on screen:
• In CSM, no error codes are displayed on screen.
• In SAM, the complete error list is shown.
How to Connect
This is described in the chassis fault finding database in
ComPair.
If possible, check the entire contents of the error buffer. In
some situations, an error code is only the result of another error
code and not the actual cause (e.g. a fault in the protection
detection circuitry can also lead to a protection).
In case of non-intermittent faults, clear the error buffer before
starting to repair (before clearing the buffer, write down the
content, as this history can give significant information). This to
ensure that old error codes are no longer present.
TO TV
TO
UART SERVICE
CONNECTOR
ComPair II
RC in
RC out
TO
I2C SERVICE
CONNECTOR
TO
UART SERVICE
CONNECTOR
Multi
function
Optional Power Link/ Mode
Switch
Activity
I2C
RS232 /UART
5.4.2
How to Read the Error Buffer
PC
Use one of the following methods:
• On screen via SAM (only when a picture is visible). E.g.:
– 000 000 000 000 000: No errors detected
– 017 000 000 000 000: Error code 17 is the last and only
detected error.
– 015 017 000 000 000: Error code 17 was first detected
and error code 15 is the last detected error.
• Via the Blinking LED procedure.
• Via ComPair.
ComPair II Developed by Philips Brugge
HDMI
I2C only
Optional power
5V DC
E_06532_036.eps
150208
Figure 5-1 ComPair II interface connection
Caution: It is compulsory to connect the TV to the PC as
shown in the picture above (with the ComPair interface in
between), as the ComPair interface acts as a level shifter. If
one connects the TV directly to the PC (via UART), ICs will be
blown!
How to Order
ComPair II order codes:
• ComPair II interface: 3122 785 91020.
• Software is available via the Philips Service web portal.
• ComPair serial interface cable (using 3.5 mm Mini Jack
connectors): 3138 188 75051.
Note: When having problems, please contact the local support
desk.
2009-Jun-05
5.4.3
How to Clear the Error Buffer
Use one of the following methods:
• By activation of the “Clear Codes” command in the SAM
menu.
• With a normal RC, key in sequence “062599” followed by
“OK”.
Service Modes, Error Codes, and Fault Finding
5.4.4
TCM3.1L LA
5.
EN 15
Error Codes
5.5
The Blinking LED Procedure (LAYER-2 codes)
Take notice that some errors need several minutes before they
start blinking or before they will be logged. So in case of
problems wait 2 minutes from start-up onwards, and then
check if the front LED is blinking or if an error is logged.
5.5.1
Introduction
The software is capable of identifying different kinds of errors.
Because it is possible that more than one error can occur over
time, an error buffer is available that is capable of storing the
last five errors that occurred. This is useful if the OSD is not
working properly.
Table 5-2 Layer 1 code overview
Code
Board
2
SSB
3
Platform supply (12V detection)
Errors can also be displayed by the blinking LED procedure.
The method is to repeatedly let the LED pulse with as many
pulses as the error code number, followed by a time period of
1.5 seconds in which the LED is “off”. Then this sequence is
repeated.
E.g. error code 4 will result in four times the sequence LED “on”
for 0.25 seconds / LED “off” for 0.25 seconds. After this
sequence the LED will be “off” for 1.5 seconds. Any RC
command terminates this sequence.
Table 5-3 Layer-2 code overview
Layer 2
Error
error code Description
Detection Type
Method
Remarks
0
No Error
N/A
N/A
N/A
14
General I2C
I2C Bus
Spontaneous
blinking
Communication Error
on I2C bus
15
Tuner
I2C Bus
Error Log
Communication Error
+ blinking in SDM with Tuner
16
Demodulator
I2C
Bus
Error Log
Communication Error
+ blinking in SDM with TDA9886T
17
Audio amplifier I2C Bus
Error Log
Communication Error
+ blinking in SDM with Audio amplifier
18
NVM EEPROM I2C Bus
Spontaneous
blinking
Displaying the entire error buffer
The entire error buffer can be displayed when service mode
“SDM” is entered (by remote control command
062596<MENU>). When in protection, this sequence will not
work, but than LAYER-1 error code should suffice.
In order to avoid confusion with RC signal reception blinking,
this blinking procedure is terminated when a RC command is
received.
Communication Error
with EEPROM
5.5.2
How to Activate
Use one of the following methods:
• Activate the CSM. The blinking front LED will show only
the latest LAYER-1 error.
• Activate the SDM. The blinking front LED will show the
entire contents of the LAYER-2 error buffer.
2009-Jun-05
EN 16
5.
Service Modes, Error Codes, and Fault Finding
TCM3.1L LA
5.6
Fault Finding and Repair Tips
5.6.1
Fault Finding Flow Charts
No Picture, no sound, no Back light, Fuse Broken
For P22 ,Pin 7~8
is 3.3V, OK?
NO
Check IPB
YES
YES
For P22,pin10 is
3.3V , OK?
NO
For P22,pin1 is
24V , OK?
YES
NO
Check Q10,
X5,IR_MCU,KEY,
MCU_RESET,U8.
Check main
board DV10
&+3.3V OK?
YES
Check main board
DDRV & AV12, OK?
Check IPB
YES
Check main board
short_protect ,
oreset#,pwr_detect
18520_204_090313.eps
090313
Figure 5-2 No picture, no sound, no backlight. Fuse broken.
No Picture, Back light & Sound OK
Check the 5V-IF
voltage of . is it
OK?
No
Check the
voltage
of R48,U6
Yes
Replace R48 &
U6
Yes
Check 33V is
OK?
Yes
check the
U2,Q13
No
Is
Q14,C184,C197
,L54 shorted to
earth?
No
check
D2,R184,R178
18520_205_090313.eps
090313
Figure 5-3 No picture. Backlight and sound okay.
2009-Jun-05
Service Modes, Error Codes, and Fault Finding
TCM3.1L LA
5.
EN 17
Picture OK, No sound
No
Check the voltage of
U17.8~11,it 24v?
Check
L139,L140
Yes
Check the voltage of
U17.31 & U17.23,is it OK?
No
Yes
Check the Q24
&,is it OK?
Change the
software of U10 &
U8
Yes
No
Check the wave of
I2C&I2S OK?
Change the
software of U10
Yes
Check
U17.24,U17.21,
U17.36 is 3.3V?
Yes
No
Check the
L103,L101,R361,R362
No
Check
R & L speaker
Change the U17
18520_206_090313.eps
090313
Figure 5-4 Picture okay, no sound.
No colour
Colour system is
Right & another
channel colour is
right ?
No
Reset
To
Local system
Yes
Dose the TV
signal too weak?
NO
YES
Check
Tuner Input
cable & antenna
Check the
voltage of
Z1.1 OK?
NO
Check
U2 & I2C
YES
Check E2PROM
U21
YES
Fine Frequency
18520_207_090313.eps
090313
Figure 5-5 No colour.
2009-Jun-05
EN 18
5.
TCM3.1L LA
5.7
Software Upgrading
5.7.1
Introduction
Service Modes, Error Codes, and Fault Finding
5.7.4
To upgrade the HDMI EDID, pin 7 of the EDID NVM [1] has to
be short circuited to ground. See ComPair for further
instructions.
It is possible for the user to upgrade the main software via the
USB port. A description on how to upgrade the main software
can be found in the DFU and below.
5.7.2
Upgrade HDMI EDID NVM
Main Software Upgrade
1
In “normal” conditions, so when there is no major problem with
the TV, the main software and the default software upgrade
application can be upgraded with the “upgrade.bin”. This can
also be done by the consumers themselves via the Software
Update Assistant in the user menu (see DFU), but they will
have to download their software from the commercial Philips
website.
How to upgrade (see also figure 5-9 User SW upgrade
flowchart):
1. Copy the “upgrade.bin” file to the root of the USB stick.
2. Power “off” the TV and remove all memory devices.
3. Insert the USB stick that contains the downloaded software
upgrade.
4. Switch “on” the TV, and activate the Main menu with the
“Menu/House” key on the remote control.
5. In the Main menu, go to the “Software update” item.
6. Press “OK” key to go to the submenu.
7. Select “Local updates” in the submenu and press the “OK”
key to enter the Software Update application.
8. You will be prompted to cancel or to proceed with the
software updating.
9. To proceed, select “Update” and press the “OK” key to
enter the next menu. In the next menu select “Start” and
press “OK” key to start the software update.
10. Upgrading will now begin and the progress of the updating
will be displayed. After the software updating is completed,
the TV will automatically restart.
5.7.3
18520_208_090313.eps
090313
Figure 5-6 HDMI-1 EDID NVM
1
Stand-by Software Upgrade
In this chassis it is not possible to upgrade the Stand-by
software via a USB stick or ComPair. Please order a preprogrammed device via the Philips Spare Part web portal.
18520_210_090313.eps
090313
Figure 5-7 HDMI-side EDID NVM
5.7.5
Upgrade VGA EDID NVM
To upgrade the VGA EDID NVM, pin 7 of the EDID NVM [2] has
to be short circuited to ground. See ComPair for further
instructions.
2
18520_209_090313.eps
090313
Figure 5-8 VGA EDID NVM
2009-Jun-05
Service Modes, Error Codes, and Fault Finding
5.7.6
TCM3.1L LA
5.
EN 19
Main SW upgrade flowchart.
Pow er off the set
Plug-in the U SB stick
A new er version of softw are is deceted.
D o you w ant to update?
C ancel
Pow er on the set
U pgrade
D etect U SB þbreak inÿand
check autorun file
Layout 1
Enter into Setup M enu and active
local upgrades
An equal/older version of softw are is
detected .
D o you w ant to proceed?
N ote: Should be done only if necessary .
C ancel
Y
N
U pgrade
Valid auto -run file?
Layout 2
Y
Please don ÿt shut off the pow er
T he softw are update m ay takes 3 to 5
m inutes
Erasing...
N
N
Is U SB file version >
set SW
Layout 3
Is U SB file version <=
set SW
Y
Y
D isplay U SB sw
new er than the T V
sw .Prom pt user to
com firm
Please donÿt shut off pow er
T he softw are update m ay takes 3 to 5
m inutes
U pgrading...18%
End
D isplay U SB sw
equal/older than the
T V sw.Prom pt user to
com firm
See Layout 1
See Layout 2
Layout 4
N
N
Proceed?
Softw are update
failed! W ould you
like to try again
Layout 5
See Layout 3
D isplay
upgrade
progress
T V auto restart
the set, prom pt
user to rem ove
U SB
Valid auto-run
file
See Layout 4
Power on TV
T V w ill
continue the
upgrade as
soon as pow er
com es back .
If pow er drop
during the
upgrade
procedure,don’t
rem ove the U SB
portable m em ory
Set process w ith
sw upgrade
Y
Y
T V auto erase
and upgrade
softw are
Y
N
Prom pt user to
try again
Successful ?
See Layout 5
Y
N
EN D
R etry?
18520_215_090325.eps
090325
Figure 5-9 User SW upgrade flowchart
2009-Jun-05
EN 20
6.
TCM3.1L LA
Alignments
6. Alignments
Index of this chapter:
6.1 General Alignment Conditions
6.2 Hardware Alignments
6.3 Software Alignments
6.4 Option Settings
6.5 Reset of Repaired SSB
6.1
6.3.1
Purpose: To keep the tuner output signal constant as the input
signal amplitude varies.
The AGC alignment is done automatically (standard value:
“12”). Store settings and exit SAM
General Alignment Conditions
6.3.2
Perform all electrical adjustments under the following
conditions:
• Power supply voltage (depends on region):
– AP-NTSC: 120 VAC or 230 VAC / 50 Hz (± 10%).
– AP-PAL-multi: 120 - 230 VAC / 50 Hz (± 10%).
– EU: 230 VAC / 50 Hz (± 10%).
– LATAM-NTSC: 120 - 230 VAC / 50 Hz (± 10%).
– US: 120 VAC / 60 Hz (± 10%).
• Connect the set to the mains via an isolation transformer
with low internal resistance.
• Allow the set to warm up for approximately 15 minutes.
• Measure voltages and waveforms in relation to correct
ground (e.g. measure audio signals in relation to
AUDIO_GND).
Caution: It is not allowed to use heat sinks as ground.
• Test probe: Ri > 10 MΩ, Ci < 20 pF.
• Use an isolated trimmer/screwdriver to perform
alignments.
6.1.1
First, set the correct options: see also section Option codes
Warming up (>15 minutes).
Start the alignments.
Hardware Alignments
Not applicable.
6.3
White Point
•
Press the “Menu/Home” button on the RC, and then select
“Picture”. Set the picture settings as follows:
Picture Setting
Smart Picture
Personal
Colour Temperature
Cool
Dynamic Contrast
Off
Dynamic Backlight
Off
Colour Enhancement
Off
Light Sensor
Off
•
Activate SAM mode and select “RGB Align”.
White point alignment LCD screens:
• Use a 100% white screen on HDMI-1 as input signal and
set the following values:
– “Colour temperature”: “Cool”.
– All “R/G/B_Gain” values to: “127”.
– All “R/G/B_Offset” values to: “240”.
Alignment Sequence
•
•
•
6.2
Tuner AGC (RF AGC Take Over Point Adjustment)
Software Alignments
Put the set in SAM mode (see chapter 5. Service Modes, Error
Codes, and Fault Finding). The SAM menu will now appear on
the screen. Select the appropriate alignment and go to one of
the sub menus with the “arrow right” button. The alignments are
explained below.
The following items can be aligned:
• Tuner AGC.
• White point.
• ADC calibration of VGA and YPbPr inputs.
To store the data:
• When displayed, select “Store” in the related sub menu and
press the “OK” button on the RC. Screen text will change
from “DO” to “OK”
• Press the MENU/House button on the RC.
• Switch the set to Stand-by mode.
For the next alignments, supply the following test signals via a
video generator to the RF input:
• EU/AP-PAL models: a PAL B/G TV-signal with a signal
strength of at least 1 mV and a frequency of 475.25 MHz
• US/AP-NTSC models: an NTSC M/N TV-signal with a
signal strength of at least 1 mV and a frequency of 61.25
MHz (channel 3).
• LATAM models: an NTSC M TV-signal with a signal
strength of at least 1 mV and a frequency of 61.25 MHz
(channel 3).
2009-Jun-05
In case colour analyser can be used:
• Measure with a calibrated contactless colour analyser in
the centre of the screen. Consequently, the measurement
needs to be done in a dark environment.
• Adjust the correct x,y coordinates by means of decreasing
the value of one or two other white points to the correct x,y
coordinates (see Table 6-1). Tolerance dx, dy: ± 0.004.
Only the “Cool” colour temperature needs to adjust.
• When finished, select “Store” in the “RGB Align” sub menu,
and press “OK” on the RC to store the aligned values to the
NVM.
• Restore the initial picture settings after the alignments.
Table 6-1 White D alignment values
Value
Cool (11000K)
Normal (9000K)
Warm (6500K)
x
0.278
0.289
0.314
y
0.278
0.291
0.319
In case no colour analyser is available, the default values
can be used. This is the next best solution. The default values
are average values coming from production.
• Select the “Cool” colour temperature.
• Set the RED, GREEN and BLUE default values according
to the values in the “White tone default settings” table.
• When finished, select “Store” in the “RGB Align” sub menu,
and press “OK” on the RC to store the aligned values to the
NVM.
• Restore the initial picture settings after the alignments.
Table 6-2 White tone default settings
White Tone
Colour Temp
32"
R
G
Normal
Cool
Warm
42"
B
R
G
B
150
170
auto adjusted
175
151
168
176
auto adjusted
(*) Default values were not available at the time of publishing.
They will be published as soon as they become available.
Alignments
6.3.3
•
Auto ADC
Purpose: For correct gray- and colour scale values of the VGA
and YPbPr inputs.
How to align the VGA/PC input:
1. Provide a 1024 × 768 @ 60 Hz test signal with White/
Black squares to the VGA input.
2. Select “Auto ADC” in the SAM menu.
3. Press the “Arrow right” button on the RC.
4. Press “OK” on the RC.
5. Wait until OSD shows “Auto ADC - OK”.
How to align the YPbPr inputs (CVI-1 and CVI-2):
1. Provide a 1024 × 768 @ 60 Hz test signal with 100% 8
step colour bar to the YPbPr input.
2. Rest is the same as for the VGA input.
6.4
6.4.1
Option Settings
Introduction
The microprocessor communicates with a large number of I2C
ICs in the set. To ensure good communication and to make
digital diagnosis possible, the microprocessor has to know
which ICs to address, and what brand and type of display is
used.
6.4.2
6.5
TCM3.1L LA
6.
EN 21
The new option setting is only active after the TV is
switched “off/on” with the mains switch (the NVM is then
read again).
Reset of Repaired SSB
When a repaired SSB will be used in an other TV, it is very
important that the correct info is written into the NVM w.r.t.
12NC of the SSB, production serial number of the TV, 12NC of
display and PSU, etc.
To set all this, the ComPair tool can be used, or the NVM can
be edited directly via the NVM editor (in SAM). Find below the
addresses of these items. Use the decimal values.
In case of a display replacement, reset the “Operation hours” to
“0”, or to the operation hours of the replacement display.
Table 6-3 NVM addresses of “reset items”
Item
NVM Address (decimal)
Display code
3195
Production serial number
3196 - 3211 (16 bytes)
SSB 12NC
3212 - 3225 (16 bytes)
Display 12NC
3228 - 3243 (16 bytes)
PSU 12NC
3244 - 3259 (16 bytes)
Model Number
3260 - 3275 (16 bytes)
Operational hours
not available at the time of publishing
Display code
Changing the display option code via a standard RC
Key in the code “0 6 2 5 9 8 MENU x x x” (where x x x is the 3
digit decimal display code of the used display *).
Tips:
• Keep the RC close to the IR receiver, and make sure the
LED blinks when entering a code.
• Key in all codes in one sequence, without pauses.
If the above action is successful, the front LED will go out as an
indication that the RC sequence was correct. After the display
option is changed in the NVM, the TV will go to the Stand-by
mode. If the NVM was corrupted or empty before this action, it
will be initialized first (loaded with default values). This
initializing can take up to 20 seconds.
Display Option
Code
39mm
27mm
PHILIPS
040
MODEL:
32PF9968/10
PROD.SERIAL NO:
AG 1A0620 000001
(CTN Sticker)
E_06532_038.eps
240108
Figure 6-1 Location of Display Option Code sticker
(*) This display code can be found on the side sticker (see
figure above) and/or on the rear sticker.
6.4.3
Option codes
Select this sub menu to set all options at once by selecting the
correct model number. The so-called “Project ID” represents a
number of different options, all related to that model number.
By toggling the “arrow left/right” buttons on the RC, the correct
model number can be selected.
• After changing the option (or Project ID), save it by leaving
the sub menu via the “Menu/House” button on the RC.
2009-Jun-05
EN 22
7.
Circuit Descriptions
TCM3.1L LA
7. Circuit Descriptions
7.1
Index of this chapter:
7.1 Introduction
7.3 Power Supply
7.2 Video and Audio Processing - MT822x
Key components of this chassis are:
• MT8221 Mediatek Scaler IC.
• R8C11Renesas Stand-by microprocessor.
• TEDE8 Tuner.
• TDA9886 IF Demodulator.
• WM8501 D/A Converter.
• STA333BW Audio Amplifier.
Notes:
• Only new circuits (circuits that are not published recently)
are described.
• Figures can deviate slightly from the actual situation, due
to different set executions.
• For a good understanding of the following circuit
descriptions, please use the wiring, block (see chapter
9. Block Diagrams) and circuit diagrams (see chapter
10. Circuit Diagrams and PWB Layouts). Where
necessary, a separate drawing for clarification is given.
DC-DC
12V to 5V
VCC
ON
Introduction
7.1.1
Architecture Overview
•
For details about the chassis block diagrams refer to
chapter 9. Block Diagrams. An overview of the MT8221
architecture can be found in Figure 7-1.
POWER
SUPPLY CONNECTOR
MT22 BLOCK DIAGRAM_V0.2
OFF
R08C11
KEY POWER ON
STANDBY IR
EEPROM
M24C64MN
TX,RX
SIF
SAW-D94
53D
TUNER
TDQG4-601A
VIF
SAW-K72
70M
TDA9
886T
I2C
ATV CVBS
PANEL
TUNER I2C
SCL
SDA
RX
TX
KEY BOARD
KEY
IR
FLASH
64Mbit
LVDS OUT
MT8221/22R
DDR IF
RGB
VSYNC
HSYNC
AUDIO
AMP for
19”
I2S
DAC
R0/L0 OUT
R1/L1 OUT
R2/L2 OUT
I2S IN
Y
Pb
Pr
CVBS IN
RGB IN
FS
FB
CVBS IN
Y/C IN
MONITOR OUT
USB
IF
ADC
TV CVBS OUT
HDMI_Rx I2C
HDMI1
CVBS
IN
CLASS D
AMP
VIDEO
SWITCH
CRYSTAL
SPDIF
OUT
LVDS
VIDEO
OUT
ADC
CVBS DECODER
3D COMB FILTER
SCALER
LVDS TRANSIMITER
HDMI RECEIVER
AUDIO DECODER
Media player˖Mpeg2/4ˈDivx
AVIˈMp3,JpegˈRM
Game
MEMOFR
Y IF
DDR1
TV_CVBS
SIF
AUDIO
AMP for
19”
AUDIO
SWTICH
AUDIO
SWITCH
R
L
Audio
Amp
EDID
AUDIO IN BUS
HDM2
HDM3
SPDIF
AV IN
VGA
EDID
YPbPr
EDID
RGB
CVBS
EDID
YPbPr
CVBS
RGB
SCART1
CVBS
Y/C
SCART2
PC AUDIO
AV OUT
USB
HEAD PHONE
CEC
18520_200_090311.eps
090311
Figure 7-1 Block diagram of MT822x
7.2
Video and Audio Processing - MT822x
The MediaTek MT822x is an ultra high integrated single chip
for flat panel TV. It supports multimedia video/audio input and
output format up to full HDTV.
It includes an advanced 3D comb filter/TV decoder to retrieve
the best image from popular composite signals and embedded
HDTV/VGA decoders for high bandwidth input signals.
The new 4th generation advanced motion adaptive and motion
estimation de-interlacer converts accordingly the interlaced
video into a progressive one with overlay of a 2D graphic
processor.
2009-Jun-05
Independent two flexible scalers provide wide adoption to
various LCD panels for two different video sources at the same
time.
The on-chip audio processor decodes the analogue signals
from the tuner with lip sync control, delivering high quality postprocessed sound effects to the audio amplifier stage.
An on-chip microprocessor reduces the system BOM and
shortens the schedule of UI design by high level C
programming.
Circuit Descriptions
7.3
Power Supply
7.3.2
All power supplies used in this chassis are a “black box” for
Service. When defective, a new board must be ordered and the
defective one must be returned, unless the main fuse of the
board is broken. Always replace a defective fuse with one with
the correct specifications! This part is available in the regular
market.
Consult the Service Spare Part portal for the order codes of
these boards.
TCM3.1L LA
EN 23
IPL32L PSU
Block Diagram
A C IN
S ta n d b y
circu it
IC 3 / T2
B rid g e re ctifie r
F ilte r circu it
EMC
F ilte r circu it
3 .3 V
MCU
PS - ON
O p to
co u p le r
1 2 V R e la y K 1
S tartup
S ig nal
V CC
P F C C ircu it
IC 1
L1
B rid g e re ctifie r
F ilte r circu it
395V
PWM
C ircu it
IC 2
T1
24V
12V o p erating v o ltag e
Below some background info on the PSUs is given, to ease the
troubleshooting process in case of power supply problems
7.3.1
7.
T4
H V tra n sfo rm e r
C ircu it
BL-ON
IN V E R TE R
C o n tro l a n d
d rivecircu it
PDIM
Diversity
18520_211_090319.eps
090319
Figure 7-2 Block diagram IPL32L PSU
Below find an overview of the different PSUs that are used:
Table 7-1 Supply diversity
Supplier
TCL
PSU
Model
IPL32L
32" LG display
IPL42A
IPL42L
42" AUO display
42" LG display
Input Voltage Range
100 - 240 Vac
It should be noted that for different display manufacturers,
different PSUs can be used. When ordering a new PSU,
always check which LCD panel is used in the set, and order the
correct PSU!
F e e d b a ck circu it
P ro te ctio n circu it
H ig h Vo lta g e
A C o u tp u t
The only type of power supply used in this platform is the
Integrated Power Board (IPB) - incl. LCD backlight inverters.
Key Components
The key component ICs are:
• Stand-by power supply IC: FSQ510 (Fairchild).
• PFC control IC: L6563 (ST).
• 24V PWM control IC: FA5571N (FUJI).
• Inverter high voltage control IC: OZ9976 (O2).
Control Signals
Table 7-2 Control signals
Control signal
Comments
PS-ON
3.3V >= ON >= 2.0V
AC power output ON
0.7V >= OFF >= 0V
AC power output OFF
5.0V >= ON >= 2.0V
The inverter is working
1.0V >= OFF >= 0V
The inverter is switched OFF
BL_ON
DIMP
Output
High level: 2V ~ 5.0V
HD: OPC dimming, 140Hz
Low level: 0V ~ 0.7V
FHD: PWM, 103.4Hz
Output Characteristics
Table 7-3 Output characteristics
Output Voltage Tolerance Min. current Max. current
Load regulation
+3V3(STB)
+/- 3%
5 mA
200 mA
+/- 5%
24V
+/- 5%
0.2 A
2.0 A
+/- 5%
Fault Finding
S w itc h “o n”
N
3.3V no rm al?
Y
N
P S _O N no rm al?
C B 1 v o ltag e
no rm al?
N
Y
Check S tand b y IC , f eed b ac k,
trans f o rm er f ailures , etc .
F ault
m o v em ent
Y
A ttentio n : als o c hec k
the P F C and P W M c o ntro l,
s uc h as w hether the MOS
s ho rt-c irc uit in o rd er to
rep lac e the F us e and
B rid g e.
Y
N
R elay is c lo s ed ?
R elay p o w er s up p ly
p art (Q B 1) f ault
P W M IC , f eed b ac k,
trans f o rm er f ailures, etc .
N
Y
P F C v o ltag e
no rm al?
N
Y
B L_O N and
D IM P normal?
N
P F C _V C C
no rm al?
Y
P F C IC , f eed b ac k,
drive f ailure, etc .
F us e is o p en
W hether the
b rid g e rec tif ier
c irc uit
N
24V no rm al?
Y
P F C p o w er s up p ly
part (Q W 11) fault
F ault
m o v em ent
Y
H V p art f ailure
(IC p ro tec tio n
circuit).
18520_212_090319.eps
090319
Figure 7-3 Fault finding diagram IPL32L PSU
2009-Jun-05
EN 24
7.3.3
7.
Circuit Descriptions
TCM3.1L LA
IPL42L PSU
Block Diagram
D IM
P F C o u tp u t
395V
AC
In p u t
R e la y
IN V E R T E R
IC OZ9926A
(O2)
P F C IC
L6562A
(ST)
+H V
-H V
E NA B LE
S w itc h c o n tro l
Vo lta g e D e te c t
B L-O N
P S -O N
P W M P ow er
S upply IC
FA 5571
(F U JI)
24V
S T B P ow er
S upply IC
F S Q 510
(FA IR C H ILD
3 .3 V
18520_214_090319.eps
090319
Figure 7-4 Block diagram IPL42L PSU
Key Components
The key component ICs are:
• Stand-by power supply IC: FSQ510 (Fairchild).
• PFC control IC: L6562 (ST).
• 24V PWM control IC: FA5571N (FUJI).
• Inverter high voltage control IC: OZ9926 (O2).
Control Signals
Table 7-4 Control signals
Control signal
Comments
Output
PS-ON
5.0V >= ON >= 2.0V
AC power output ON
BL_ON
Burst dimming freq. / duty
PWM Dimming
1.0V >= OFF >= 0V
AC power output OFF
5.0V >= ON >= 2.0V
The inverter is working
1.0V >= OFF >= 0V
The inverter is switched OFF
100 - 200 Hz / 10 - 100%
High level: 2V ~ 5.0V
Low level: 0V ~ 0.7V
Output Characteristics
Table 7-5 Output characteristics
Output Voltage Tolerance Min. current Max. current
Load regulation
+3V3
+/- 5%
5 mA
300 mA
+/- 5%
24V
+/- 5%
0.5 A
2.5 A
+/- 5%
Fault Finding
Normal PSU working order:
• Connect the 220V AC power plug.
• The 3.3V Stand-by power supply (Stand-by uP U801) will
start. This is a “single-ended flyback regulator”. For a good
functioning of this part, check the availability of 1.25V on
U803 (TL431).
• On connector P802, signal line “PS_ON” will go “high”
(3V3) and relay K801 will be activated.
• Also capacitors C811/C812 will be charged, supplying
IC806 with electricity. This will start the PFC circuit and
generate the +24 V control.
• Now, IC805 will start, and will generated the 24V output.
• On connector P802, signal “DIM” sets the PWM dimming
status.
• On connector P802, when signal “BL-ON” goes “high”, the
high voltage Inverter (IC901, OZ9926A) will start.
2009-Jun-05
IC Data Sheets
TCM3.1L LA
8.
EN 25
8. IC Data Sheets
Index of this chapter:
8.1 Diagram B01, LD1117 (IC U4)
8.2 Diagram B01, RT8110 (IC U13)
8.3 Diagram B01, MP1593 (IC U14)
8.4 Diagram B01, PQ1CX41 (IC U20)
8.5 Diagram B02, MX25L3205 (IC U10)
8.6 Diagram B02, MT8221 (IC U11)
8.7 Diagram B03, RT9199 (IC U1)
8.8 Diagram B04, TDA9885 (IC U2)
8.9 Diagram B07, WM8501 (IC U9)
8.10 Diagram B09, RC4558 (IC U26/U37)
8.11 Diagram B09, LM833D (IC U27)
8.12 Diagram B10, STA333BW (IC U17)
8.1
This chapter shows the internal block diagrams and pin
configurations of ICs that are drawn as “black boxes” in the
electrical diagrams (with the exception of “memory” and “logic”
ICs).
Diagram B01, LD1117 (IC U4)
Block Diagram
Pin Configuration
LD1117DT
DPAK
F_15710_166.eps
230905
Figure 8-1 Internal block diagram and pin configuration
2009-Jun-05
EN 26
8.2
8.
IC Data Sheets
TCM3.1L LA
Diagram B01, RT8110 (IC U13)
Block Diagram
VCC
DRIVE
VCC
PowerOn Reset
V CC
Regulator
IOC
POR
OC
0.8V REF
-
0.5V
UVP
Soft-Start
and Fault
Logic
+
PHASE
+
PH_M
S1L
FB
R OC
-
SSE
+
+Gm
-
+
1.5V
SS
EO
+
+
-
VCC
Gate
Control
Logic
PWM
UGATE
BOOT
LGATE
GND
Oscillator
Pin Configuration
PHASE
UGATE
GND
LGATE
8
7
6
5
1
2
3
4
BOOT
DRIVE
FB
VCC
(TOP VIEW)
18520_312_090326.eps
090326
Figure 8-2 Internal block diagram and pin configuration
2009-Jun-05
IC Data Sheets
8.3
TCM3.1L LA
8.
EN 27
Diagram B01, MP1593 (IC U14)
Block Diagram
IN 2
CURRENT
SENSE
AMPLIFIER
INTERNAL
REGULATORS
+
5V
OSCILLATOR
SLOPE
COMP
40/385KHz
--
CLK
0.7V
BS
3
SW
4
GND
M1
+
+
SHUTDOWN
COMPARATOR
--
1
--
S
Q
R
Q
CURRENT
COMPARATOR
M2
EN 7
LOCKOUT
COMPARATOR
--
1.8V
2.3V/
2.6V
+
--
+
FREQUENCY
FOLDBACK
COMPARATOR
0.7V
--
1.22V
5
+
ERROR
AMPLIFIER
6
FB
COMP
8
SS
Pin Configuration
TOP VIEW
BS
1
8
SS
IN
2
7
EN
SW
3
6
COMP
GND
4
5
FB
EXPOSED PAD
ON BACKSIDE
CONNECT TO PIN 4
18520_307_090325.eps
090325
Figure 8-3 Internal block diagram and pin configuration
2009-Jun-05
EN 28
8.4
8.
TCM3.1L LA
IC Data Sheets
Diagram B01, PQ1CX41 (IC U20)
Block Diagram
Pin Configuration
18520_313_090327.eps
090327
Figure 8-4 Internal block diagram and pin configuration
2009-Jun-05
IC Data Sheets
8.5
TCM3.1L LA
8.
EN 29
Diagram B02, MX25L3205 (IC U10)
Block Diagram
additional 4Kb
X-Decoder
Address
Generator
Memory Array
Data
Register
SI
Y-Decoder
SRAM
Buffer
CS#, ACC,
WP#,HOLD#
Mode
Logic
State
Machine
Sense
Amplifier
Output
Buffer
HV
Generator
SO
SCLK
Clock Generator
Pin Configuration
PIN DESCRIPTION
SYMBOL
CS#
16-PIN SOP (300 mil)
HOLD#
VCC
NC
PO2
PO1
PO0
CS#
SO/PO7
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SCLK
SI
PO6
PO5
PO4
PO3
GND
WP#/ACC
DESCRIPTION
Chip Select
SI
Serial Data Input
SO/PO7(1) Serial Data Output or Parallel Data
output/input
SCLK
Clock Input
HOLD#(2)
Hold, to pause the serial communication
(HOLD# is not for parallel mode)
Write Protection: connect to GND;
WP#/ACC
12V for program/erase acceleration:
VCC
GND
PO0~PO6
NC
connect to 12V
+ 3.3V Power Supply
Ground
Parallel data output/input (PO0~PO6 can
be connected to NC in serial mode)
No Internal Connection
Note:
1. PO0~PO7 are not provided on 8-LAND SON package.
2. HOLD# is recommended to connect to VCC during
parallel mode.
18520_308_090325.eps
090325
Figure 8-5 Internal block diagram and pin configuration
2009-Jun-05
EN 30
8.6
8.
TCM3.1L LA
IC Data Sheets
Diagram B02, MT8221 (IC U11)
CVBS / SV
(x8)
ADC
ADC
8032
3D TVD
Main Path
MDDi
DS
HDTVD
VGAD
ADC
PIP Path
MDDi DS
HDMIx3
Digital Path
Control Signal (GPIO, …)
LVDS
LVDS Tx
DRAM
VGA
ADC
MUX
(Customer)
External
Switches
YPbPr
(x2)
Analog Front End
OSD
Merge
Color
US
Gamma
Color
US
Dithering
DSP
18520_300_090311.eps
090311
Figure 8-6 Internal block diagram and pin configuration
2009-Jun-05
IC Data Sheets
8.
EN 31
Diagram B03, RT9199 (IC U1)
Block Diagram
VCNTL
VIN
Current Limit
Thermal Protection
+
REFEN
VOUT
EA
-
8.7
TCM3.1L LA
GND
Pin Configuration
(TOP VIEW)
VIN
8
VCNTL
GND
2
7
VCNTL
REFEN
3
6
VOUT
4
5
VCNTL
VCNTL
8
NC
7
NC
6
VCNTL
5
NC
SOP-8
VIN
GND
2
REFEN
3
VOUT
4
GND
SOP-8 (Exposed Pad)
18520_314_090327.eps
090327
Figure 8-7 Internal block diagram and pin configuration
2009-Jun-05
EN 32
8.8
8.
IC Data Sheets
TCM3.1L LA
Diagram B04, TDA9885 (IC U2)
Block Diagram
external
reference
VIF-PLL
filter
CVAGC pos
TOP TAGC
9
14
VAGC
4 MHz
or
(1)
AFC
REF
VPLL
19
16
21
15
CBL
CAGC neg
TUNER AGC
crystal
DIGITAL VCO CONTROL
RC VCO
VIF-AGC
AFC DETECTOR
VIF2 2
17 CVBS video output 2 V (p-p)
[1.1 V (p-p) without trap
VIDEO TRAPS
VIF-PLL
VIF1 1
4.5 to 6.5 MHz
TDA9885
TDA9886
8 AUD
AUDIO PROCESSING
AND SWITCHES
SINGLE REFERENCE QSS MIXER/
INTERCARRIER MIXER AND
AM-DEMODULATOR
SIF2 24
SIF1 23
5 DEEM
de-emphasis
network
MAD
SUPPLY
SIF-AGC
OUTPUT
PORTS
NARROW-BAND FM-PLL
DETECTOR
I2C-BUS TRANSCEIVER
6 AFD
CAF
CAGC
20
18
13
3
22
11
10
7
VP
AGND
n.c.
OP1
OP2
SCL
SDA
DGND SIOMAD
12
4
FMPLL
sound intercarrier output
and MAD select
(1) Not connected for TDA9885.
FM-PLL filter
Pin Configuration
VIF1 1
24 SIF2
VIF2 2
23 SIF1
OP1 3
22 OP2
FMPLL 4
21 AFC
20 VP
DEEM 5
AFD 6
DGND 7
TDA9885
TDA9886
19 VPLL
18 AGND
AUD 8
17 CVBS
TOP 9
16 VAGC(1)
SDA 10
15 REF
SCL 11
14 TAGC
SIOMAD 12
13 n.c.
Figure 8-8 Internal block diagram and pin configuration
2009-Jun-05
G_16510_
IC Data Sheets
8.9
TCM3.1L LA
8.
EN 33
Diagram B07, WM8501 (IC U9)
Block Diagram
Pin Configuration
18520_311_090325.eps
090325
Figure 8-9 Internal block diagram and pin configuration
2009-Jun-05
EN 34
8.
TCM3.1L LA
IC Data Sheets
8.10 Diagram B09, RC4558 (IC U26/U37)
Block Diagram
SCHEMATIC (EACH AMPLIFIER)
VCC+
IN−
IN+
OUT
VCC−
Pin Configuration
(TOP VIEW)
1OUT
1IN−
1IN+
VCC−
1
8
2
7
3
6
4
5
VCC+
2OUT
2IN−
2IN+
18520_309_090325.eps
090326
Figure 8-10 Internal block diagram and pin configuration
2009-Jun-05
IC Data Sheets
TCM3.1L LA
8.
EN 35
8.11 Diagram B09, LM833D (IC U27)
Pin Configuration
Output 1
1
2
1
8
VCC
7
Output 2
Inputs 1
3
6
2
VEE
4
Inputs 2
5
(Top View)
18520_306_090325.eps
090225
Figure 8-11 Internal block diagram and pin configuration
2009-Jun-05
EN 36
8.
IC Data Sheets
TCM3.1L LA
8.12 Diagram B10, STA333BW (IC U17)
Block Diagram
SCL
CONFIG
SDA
SA
I2C
OUT1A
OUT1B
POWER
SDI
LRCKI
BICKI
OUT2A
OUT2B
Serial Data Input
Channel mapping
CONTROL
STATUS
RESET
INT LINE
EQ, Tone,
Volumes…
DDX3A
DDX3B
DDX4A/TWARNEXT
PWDN
XTI
DDX4B/EAPD
Processor
PLL
PLL_FILTER
Pin Configuration
GND_SUB
1
36
SA
2
35
Vdd_DIG
GND_DIG
TEST MODE
3
34
SCL
VSS
4
33
SDA
VCC_REG
5
32
INT_LINE
OUT2B
6
31
RESET
GND2
7
30
SDI
VCC2
8
29
LRCKI
OUT2A
9
28
BICKI
OUT1B
10
27
XTI
VCC1
11
26
PLL_GND
GND1
12
25
PLL_FILTER
OUT1A
13
24
PLL_Vdd
GND_REG
14
23
POWRDN
Vdd
15
22
GND_DIG
CONFIG
16
21
VDD_DIG
OUT3B/DDX3B
17
20
TWARN/OUT4B
OUT3A/DDX3A
18
19
EAPD/OUT4A
Figure 8-12 Internal block diagram and pin configuration
2009-Jun-05
18520_310_090325.eps
090325
J
IR LED PANEL
GPIO_11
LED_RED
GND
IR_IN
+3.3V
2. HV2
1. HV2
P4
P2
P22 (B01)
11. BP-ADJ
9. GND
7. 3.3/5VSB
5. GND
3. GND
1. +24/12V
RIGHT SPEAKER
2009-Jun-05
TO
BACKLIGHT
7.
6.
5.
4.
3.
2.
1.
ADIN1
KEY
GPIO_11
LED_RED
GND
OIRI_IN
5VSB
P15 (B11)
2. LVDSVDD
4. LVDSVDD
6. GND
8. GND
10. E4N
12. E3N
14. ECKN
16. E2N
18. E1N
20. E0N
22. SEL LVDS
24. BIT SEL
27. VBR OUT
29. O4N
33. O3N
35. O3P
21. O1N
38. O0N
40. GND
SSB
P17 (B10)
1. LVDSVDD
3. LVDSVDD
5. GND
7. GND
9. E4P
11. E3P
13. ECKP
15. E2P
17. E1P
19. EOP
21. DCR
23. NC
25. VBR EX
27. O4P
31. O3P
33. O2P
35. O1P
37. O0P
39. GND
12. PB-ON/OFF
10. PW-ON
8. 3.3/5VSB
6. GND
4. +24/12V
2. +24/12V
B
F1 T3.15A
NC/OUT_LOUTL+/OUT_L+
OUTL-/OUT_R+
NC/OUT_R-
MAIN POWER SUPPLY
08-IPL32L-PW1
11. DIM
9. GND
7. +3.3VSB
5. GND
3. GND
1 +24V
9.
P25 (B10)
A
TCM3.1L LA
1.
2.
3.
4.
ADIN1
GPIO_11
LED-RED
GND
IR_IN
3.3V
2. HV1
1. HV1
P3
P602
3. N
1. L
P1
1.
2.
3.
4.
5.
6.
7.
1.
2.
3.
4.
5.
1.
2.
3.
4.
5.
6.
P1
E KEYBOARD CONTROL
Block Diagrams
EN 37
9. Block Diagrams
Wiring Diagram 32" (Click)
WIRING DIAGRAM 32" (CLICK)
LCD DISPLAY
12. BL_ON
10. P_ON
8. N.C.
6. GND
4. +24V
2. +24V
P601
3.3V
IR_IN
GND
LED-RED
GPIO_11
KEY
ADIN1
TO
BACKLIGHT
INLET
LEFT SPEAKER
18650_400_090603.eps
090603
J
IR LED PANEL
GPIO_11
LED_RED
GND
IR_IN
+3.3V
2. HV1
1. HV1
P901
P22 (B01)
11. BP-ADJ
9. GND
7. 3.3/5VSB
5. GND
3. GND
1. +24/12V
MAIN POWER SUPPLY
IPL42L
11. DIM
9. GND
7. +3.3VSB
5. GND
3. GND
1 +24V
RIGHT SPEAKER
2009-Jun-05
F801 T5.0A
TO
BACKLIGHT
7.
6.
5.
4.
3.
2.
1.
ADIN1
KEY
GPIO_11
LED_RED
GND
OIRI_IN
5VSB
P15 (B11)
2. LVDSVDD
4. LVDSVDD
6. GND
8. GND
10. E4N
12. E3N
14. ECKN
16. E2N
18. E1N
20. E0N
22. SEL LVDS
24. BIT SEL
27. VBR OUT
29. O4N
33. O3N
35. O3P
21. O1N
38. O0N
40. GND
SSB
P17 (B10)
1. LVDSVDD
3. LVDSVDD
5. GND
7. GND
9. E4P
11. E3P
13. ECKP
15. E2P
17. E1P
19. EOP
21. DCR
23. NC
25. VBR EX
27. O4P
31. O3P
33. O2P
35. O1P
37. O0P
39. GND
12. PB-ON/OFF
10. PW-ON
8. 3.3/5VSB
6. GND
4. +24/12V
2. +24/12V
B
NC/OUT_LOUTL+/OUT_L+
OUTL-/OUT_R+
NC/OUT_R-
A
9.
P25 (B10)
P601
TCM3.1L LA
1.
2.
3.
4.
3.3V
IR_IN
GND
LED-RED
GPIO_11
KEY
ADIN1
2. HV2
1. HV2
P902
ADIN1
GPIO_11
LED-RED
GND
IR_IN
3.3V
3. N
1. L
P801
1.
2.
3.
4.
5.
6.
7.
1.
2.
3.
4.
5.
1.
2.
3.
4.
5.
6.
P1
E KEYBOARD CONTROL
Block Diagrams
EN 38
Wiring Diagram 42" (Click)
WIRING DIAGRAM 42" (CLICK)
LCD DISPLAY
P602
P802
12. BL_ON
10. P_ON
8. N.C.
6. GND
4. +24V
2. +24V
TO
BACKLIGHT
INLET
LEFT SPEAKER
18650_401_090603.eps
090603
Block Diagrams
TCM3.1L LA
9.
EN 39
Block Diagram
BASS
Y/C
YPBPR2
GAME PORT
SCART2-OPTION
RF IN
STA335BW
I2S
YPBPR1
SPEAKER
I2C
12V-52"6A
RESET
AV3
24C32
RT9199
DDR
MT8222/21
CEC
RESET
MUTE
POWER/ON
SERVICE
RT916
6
R8C/11
POWER_PROTECK
12V/5VPANEL-1~2A
DATA
AC~220V
3.3VSB
SHORT_PROTECK
CVBSOUT
HV AC2KV
switch
SDRAM
LED
VGA H/V
KEY
IR
MODE
EN25B32
ADDRESS
AV4
CPU
5VRF-200mA
LD1117
5.2VM- 4A
5VUSB-2A
CONFINE
RC4558
HDMI2
LD1117
edid
LD1117
LD1117
1.1V-500mA
PQ1CX41
RC4558
inductance
HDMI3
5VRF
DELAY
3.3V-500mA
1.2V-200mA
edid
SHORT_PROTECK
12VM
HDMI1
ESD
5.2VM
2.6VDDR
2.6VDDR-500mA
12V
1.2V
SCART1
3.3V
1.1V
DC-DC
RT8110+
MOS
edid
LCD PANEL
EDID
VGA
AVOUT
HEADPHONE
USB1 USB2
2009-Jun-05
18520_403_090313.eps
090324
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 40
10. Circuit Diagrams and PWB Layouts
PSU: Power Supply Unit (32")
8
A1
7
6
5
4
3
2
1
Power Supply Unit (32" Full HD)
F
F
E
E
D
D
C
C
B
B
A
A
8
7
6
4
5
3
2
1
18520_541_090313.eps
090313
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 41
Layout 32" PSU (Top)
18520_550_090313.eps
090313
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 42
Layout 32" PSU (Bottom)
18520_551_090313.eps
090313
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 43
PSU: Power Supply Unit (42")
8
A1
7
6
5
4
3
2
1
Power Supply Unit (42")
D811
RL255
3A/600V
Z125
I
4
!
6
Z26
I
R836
NC
L804
D818
BYV29-600
Z27
I
D804
US10KB80R
N1
AGND
1
!
C843
PGND
3
C830
0.047U
10
2
12
Z5 Z6 Z11 Z12
I
I
I
I
1
Z3
I
Z32
PGND
K801A
Z7 Z8 Z9 Z10
I
I
I
I
4
R814
510K
4
3
4
3
4
3
3
Z43
I
R815
510K
R841
39K
D822
4148WS
C811
C825
0.1U
400V
R812
1M
PGND
!
R847
12K7
R810
1M
R822
4R7
PGND
C814
1
0.1U
2
R848
12K
3
PGND
B
INV
GD
GND
4
Z30
I
VCC
COMP
MULT
CS
ZCD
Z35
I
8
Q809
2907AL
Z34
I
7
Q802
SK3568
12A/500V
R807
47R
R806
47R
Q805 E
2222AL
U806
L6562A
C816
Z37
I
C
Z40
I
Z29
I
1U
Z38
I
1U
I
PGND
R861
470K
R811
1M
!
R804
10R
Z36
I
C812
R817
4R7
1U
510K
R813
Z42
D815
1N4007
R805
10R
E
Z39
I
E
Q801
SK3568
12A/500V
C833
220P
B
R872
100R
6
D802
18V
5
R839
27K
C
R837
0.15R
PGND
Z28
I
PGND
PGND
Z31
I
C815
0.01U
50V
PGND
PGND
R886
1K
680P
PGND
PGND
Z33
I
C817
R840
22K
PGND
HOT
COLD
Z127
I
C822
0.1U
VC
C
E
B
D
R885
4K7
D816
1N4007
Q811
2907AL
!
PGND
Z123
I
Z124
I
Q808
BC847A
Z46
I
AGND
R835
10M
D829
FR104
C802
10U
25V
I
C835
0.1U
4
C824
1000P
FB
IS
GND
VH
NC
VCC
OUT
+3.3VSB/0.2A
1
2
7
ND
D810
RL255
PGND
PGND
7
6
Z122
I
R849
10R
Z131
I
2
11
NS'
C804
1000U
35V
NP1
12
9
10
7
8
5
6
3
4
1
2
AGND
Z14
I
+24V/2A
12
C805
1000U
35V
R823
3K3
R821
3K3
R824
3K3
R876
10K
C
Q807
BC847A
B
R866
27K
!
PGND
D824
FR104
R877
1K
PGND
Z117
I
L806
2.2UH
Z19
I
11
10
1
Z129
I
Z20
I
Z17
I
NP2
C807
330P
PGND
L803
R808
100R
C827
1000P
9
NS
3
Q803
P7NK80
D805
18V
D828
4148WS
R870
1K
8
4
L802
VAL?
Z130
I
R871
68R
5
PGND
Z48
I
3
5
P802
DIM
AGND
6
R874
47K
AGND
D806
YG902C
T801
PGND
8
Z73
C
ZCD
PGND
R873
47R
47K
R875
4K7
AGND
!
!
C844
1000P
R858
Z126
I
I
3
C826
0.022U
C847
NC
U805
FA5571N
2
BL_ON
Z16
I
R826
4K7
1
Z47
I
C837
0.01U
AGND
PGND
Z119
P_ON
Z18
I
Z121
I
Z120
I
R827
4K7
PGND
R881
470R
R829
100R
U802
PS2561
R887
27K
R888
39K
C801
B
2
3
PGND
D
C
E
10K
R863
0R
Z118
I
R820
75R
Z45
I
1
4
R868
47P
!
PGND
PGND
K801
D808
1N4007
C840A
120U
450V
PGND
2
2
2
1
1
2
1
PGND
E
C840
120U
450V
11
1
L807
4700UH
!
9
PGND
470P
250VAC
3V
VBUS
T
8
N2
4
Z44
I
R860
5R
7
5
-
!
F
L801
C809
0.47U
I
1
4
!
C823
0.47U
0.22U
C808
0.47U
1
C828
!
!
2
F801
5.0A
470P
LIF-JLB1359
R830
560V
2
Z2
I
Z41
I
VBUS
!
C845
~
!
!
!
3
3
3
L808
~
L
V
1
2
3 N
+
!
L809
P801
4
F
2
D812
RL255
3A/600V
!
Z128
I
AGND
AGND
Z49
I
R802
220K
C829
470U
35V
C
E
Z50
I
AGND
AGND
C832
R859
0.33R
R856
NC
470P
4
2
3
R845
1K
PGND
PGND
PGND
Z51
I
1
Z116
I
!
U803
PS2561
PGND
R843
4K7
R842
10K
3
U808
TL431
R846A
4K7
!
R819
22K
C806
4U7
450V
R862
390K
R809
10R
4
C818
D801
5V6
PGND
VSS
D
SYNC
VCC
4 16V
!
VC
Z106
I
5
D803
20V
B
L805
NC
Z111
I
Z15
I
I
7
Z105
I
FSQ510
0.022U
D809
SR160
6
C839
NC
7
8
6
VFB
AGND
ND
Z109
I
GND2
R846
4K7
AGND
5 GND
U801
GND1
AGND
T802
Z67
I
D813
HER108
Z115
3
C819
0.1U
R867
1K
D814
FR104
C803
22U
50V
Z108
I
3
C838
470U
16V
8
2 DRAIN
R865
4R7
PGND
PGND
PGND
AGND
NP
1 VC+
10
PGND
!
AGND
R853
5K1
U804
Z107
I
1
4
R864
6K8
D820
4148WS
2
3
Z113
I
U807
TL431_1V25
2
!
1
PGND
C820
0.15U
R854
10K
Z114
I
3
PGND
R853A
240K
R838
1K2
Z112
I
PS2561
PGND
AGND
R850
200R
AGND
R855
27K
R880
6K8
Z25
I
D807
4V7
VOL?
9
NS
PGND
Z1
I
AGND AGNDAGND
C842
220P
PGND
R801
2R7
R803
22K
PGND
2
Z21
I
R825
2R7
C841
1500P
Z110
I
B
1
Z22
I
AGND
AGND
Z4
I
PGND
Z13
I
AGND
AGND
Z53
I
1
!
C821
0.1U
R844
20K
C813
0.1U
Z52
I
2
D819
4148WS
C836
0.47U
160V
R852
3K
A
AGND
A
AGND
8
7
6
4
5
3
2
1
18520_542_090313.eps
090313
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 44
PSU: Power Supply Unit (42")
8
7
A2
6
5
4
3
2
1
Power Supply Unit (42")
R941
0R
F
F
VBUS
R912
100R
Z92
I
R948
10R
Z94
I
Z93
I
!
E
Z54
I
B
Q916
BT3906
+24V/2A
Q908
BT3904
B
R925
100R
GND1
T904
P901
2
Z91
I
6
5
2
3
1
4
Z24
I
1
ND
E
Q920
2N7002
AGND
R911
10K
Z61
I
E
Z55
I
Q901
SK3561
C
7
Q911
BT3906
B
VCC
8
DRAIN
4
3
Q902
SK3561
C
HDR2
9
R923
100R
NP
NS
AGND
D903
4148WS
2
GND
10
VC+
1
Z95
I
R947
10R
Z96
I
Z97
I
C901
33P
E
T901
R908
2K2
Q907
BT3904
B
R909
100R
E
Z56
I
E
Q915
2N7002
B
B
!
C911
1U
C
R946
1K
C
Q919
BT3906
Z87
I
R910
10K
Z62
I
C913
470P
PGND
3
2
Z85
I
R942
100R
Z88
I
LDR2
D907
4148WS
AGND
R913
100R
Z98
I
R951
10R
Z100
I
AGND
Z101
I
R904
2K2
C
Q905
BT3904
B
R905
100R
E
E
B
Z60
I
Q909
BT3906
6
C
GND1
P902
1
C
R950
1K
R914
10K
7
VCC
0.47U
C912
4
AGND
8
9
DRAIN
R922
100R
NP
NS
VC+
D908
4148WS
1
Z102
I
R907
2K2
C
R906
100R
E
Z58
I
E
Q914
2N7002
B
C910
1U
T902
B
!
Z59
I
R953
1K
R917
10K
R952
10R
Z103
I
E
Q906
BT3904
B
!
3
2
GND
10
Q903
SK3561
Q918
BT3906
Y3
1
C
HOT
C907
1U
HDR2
2
AGND
I
Z64
3
AGND
LDR1
4
Z65
I
LDR2
5
Z66
I
2
R977
75K
RW977
2K
6
3
1
7
AGND
R957
75K
R956
47K
(56K For AUO)
B
8
I
Z68
C917
220P
C917A
9
47P
R934
33K
AGND
10
AGND
11
Z69
I
DIM
R882
1K
PGND
U901
C
C924
0.01U
R930
NC
12
R928
10K
LX2
LX1
HDR2
HDR1
BST2
BST1
LDR1
VREF
LDR2
VIN
GNDA
ENA
ADIM
RPT
CT
UVLS
SYNC
OVPT
LCT
COLD
24
23
HDR1
22
21
20
R921
220R
R919
220R
R971
200R
R970
200R
R974
200R
R972
200R
R960
200R
R963
200R
R959
200R
R961
200R
19
18
Z75
I
AGND
8
Z90
I
C
R964
2K2
2
AGND
C921
1000P
3
17
AGND
R932
56K
Z82
I
B
AGND
C922
0.01U
16
AGND
Z76
I
R927
4K7
Z77
I
R962
750K
C915A
0.47U
R968
47K
E
Z79
I
AGND
AGND
R903
4K7
C
Z83
I
R931
10K
C916
0.047U
Z78
I
VREF
C915
1U
D909
4148WS
C918
4700P
D905
4148WS
R958
1K8
Q924
BT3906
C927
4700P
Z80
I
Z81
I
B
R967
10K
C
B
C
1
C920
0.022U
AGND
R954
100R
C923
0.1U
R969
47K
(39K For AUO)
2
R924
100K
Z89
BL_ON
(2k4 For AUO)
AGND
R978
1K8
AGND
AGND
Q922
BT3904
B
RW978
470R
Q923
BT3904
R918
4K7
R966
4K7
R976
4K7
E
D902
4148WS
AGND
A
R945
10K
D913
BAV70L
1
AGND
ISEN 13
Z71
I
R920
200R
D901
4148WS
E
Z70
I
R916
200R
R944
10K
AGND
AGND
R915
2K2
R936
200R
3
+24V/2A
3
AGND
R937
200R
R940
200R
D
1
2
C909
0.47U
OZ9926A
AGND
R939
200R
AGND
SSTCMP 14
VSEN_POL
R935
200R
D916
BAV70L
R901
56R
Z74
I
VREF
R938
200R
C914
1U
TIMER 15
PDIM
Z72
I
AGND
R973
200R
AGND
Q912
BT3906
AGND
1
R975
200R
2
LDR1
AGND
T903
Z104
I
C
C903
0.47U
2
Z23
I
1
ND
HDR1
4
Z99
I
5
C902
33P
Q904
SK3561
Q917
BT3906
B
E
Z57
I
Q913
2N7002
Z63
I
C905
0.022U
E
Z86
I
Q910
BT3906
C
D
C906
0.022U
I
E
Z84
I
C930
0.022U
R926
2K2
C908
1U
R949
1K
C
C931
0.022U
R902
4R7
D904
4148WS
AGND
A
AGND
AGND
AGND
7
6
4
5
3
2
1
18520_543_090313.eps
090313
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 45
Layout 42" PSU (Top)
15820_552_090313.eps
090313
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 46
Layout 42" PSU (Bottom)
15820_553_090313.eps
090313
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 47
SSB: DC/DC
8
B01
7
6
5
4
3
2
1
DC - DC
12_M
F
Z159
T
P22
+24/12V
UP34
R128
1K
L59
120R
C
Q9
BT3904
B
0.1U
C135
1000P
E
C268
1000P
GND
GND
GND
5
5VSB
Z243
R6
0R
C132
1000P
9
PB-ADJ
GND
BL-ADJUST
VBR_OUT
L60
120R
11
R104
22K
+3V3
R8
10K
NC
R110
1K
C
C543
1000P
Z7
GND GND
C555
47U
6V3
GND
R114
4K7
C
Q8
BT3904
E
C143
1U
GND
DRIVE UGATE
3
FB
B
4
R111
0R
T
BOOT PHASE
2
R109
22K
R249
100R
B
GND
VCC
E
LGATE
7
G2
4
S2
3
G1
2
S1
1
6
5
D2B
5
D2A
6
D1B
7
GND C100
1000U
16V
L15
15UH
D1A
8
C105
100U
16V
C151
0.1U
C152
100P
C150
0.1U
GND
GND
GND
C165
0.1U
GND
R124
1K2
R126
10R
C5
1000P
C161
0.01U
DV10
C145
220P
L16
33UH
C146
0.1U
Z13
T
GND
U14
MP1593DN
L137
200R
C104
470U
10V
C148
0.01U
D5
SR23
C149
3900P
GND
2
3
C472
470U
35V
GND GND
R118
10K
1
C158
0.1U
4
BS
8
SS
IN
C157
0.1U
GND
R116
12K
C160
8200P
GND
GND
C162
100P
12_M
GND
GND
5V_M1
VIN
4
4
R96
10K
R143
10K
+3V3
Z14
T
3
OUT
GND/ADJ
2
1
R697
470K
B
SW
E
12_M
Q6
BT3904
SHORT_PROTECT
R144
10K
NC
C
B
C
C
C155
0.1U
D33
LL4148
B
R97
10K
R710
10K
GND
GND
GND
C106
100U
16V
GND
5V_DDR
R137
3K9
C102
100U
16V
D11
LL4148
12_IF
C
GND
+3V3
R135
2K7
R133
4K7
R132
1K8
GND
GND
D10
LL4148
R105
4K7
R131
1K
E
E
C154
0.1U
E
C556
4U7
POWERON/OFF
B
D13
LL4148
R99
680R
C
Q10
BT3904
R119
4K7
Q4
BT3904
GND
R100
8K2
R98
10K
R136
3K9 5V_M
R130
2K2
R101
10K
C
D
S
G
C541
0.1U
D12
LL4148
Q7
BT3904
5VSB
U4
LD1117S33
R731
47K
D7
LL4148
GND
GND
R134
100K
R102
47K
GND
5VSB
Q57
A03401A
D
C168
0.1U
R123
12K4
GND
5V_M
R120
22K
C159
1U
GND
5
R752
0R
5V_M
R121
110K
GND
FB
GND
C524
10U
NC
6
COMP
GND
C156
0.1U
7
EN
SW
R122
5K6
GND
Z244
T
C87
470U
16V
L1
15UH
D4
SR34
12/24V_AUDIO
DV10
L138
200R
R117
10K
GND
C147
100P
E
R129
220R
12_M
13-PQ1CX4-1HB
D
L22
200R
GND
U20
PQ1CX41H2ZPQ
1
8
VOUT
VB
2
7
VIN
GND2
3
6
OADJ
GND1
4
5
CONTROL COMP
L21
220R
Z15
T
L23
200R
C7
4U7
C166
0.01U
GND
12_M
5V_M
R11
0R
NC
PWM0
C269
33P
C4
470P
5V_OUTSIDE
C101
1000U
Q1
D13N03LT
8
Q3
BT3904
C163
1U
GND
C6
4U7
16V
C167
0.1U
about 1mm
U13
RT8110
1
D8
LL4148
C139
0.1U
GND
E
5V_M
R103
0R
3.3/5VSB
GND
C164
0.1U
D9
LL4148
R2
0R
NC
7
GND
R115
100R
Z4
T
GND
GND
T
R452
4K7
3
GND
R453
1K
R451
NC
4K7
12_M1
1
F
L24
200R
R7
0R NC
VBR_EXT
+24/12V
2
Z8
+24/12V
C137
4
5VSB
1000P
GND
6
3.3/5VSB
R106
8
100R
GND
PW-ON
SW
10
BL-ON/OFF
PB-ON/OFF
12
L58
Z5 T
120R
C144
12_M1
5V_M1
R708
0R
T
+3V3
Z143
T
L25
200R
12_M
12/24V_AUDIO
GND
GND
5V_M
U3
LD1117S
R4
2R7
S-NC
R698
470K
12_M1
5V_DDR
Q2
A04803
NC
B
C126
0.1U
NC
C140
0.1U
T
Z12
AV12
4 4
GND
7
D2B
6
D1A
5
D1B
C131
0.1U
12_M
1GND/ADJ
C134
0.1U
R138
4K7
NC
+3V3
C127
1U
NC
8
D2A
2 OUT
C141
0.1U
SW
C345
0.1U
C94
47U
6V3
C3
10U
C142
0.1U
3 VIN
R107
910R
S-200
GND
1
S2
2
G2
3
S1
4
G1
R139
22K
NC
C93
47U
6V3
C103
100U
16V
D34
LL4148
NC
5VSB
DDRV
L14
220R
3
OUT
VIN
Z9
T
B
C133
0.22U
R9 GND
120R
C129
NC
0.1U
5V_OUTSIDE
2
1
GND/ADJ
R108
820R
S-120
R10
2R7
S-0
NC
4
4
R5
2R7
S-NC
GND
R3
0R NC
C170
1U
NC
GND
GND
GND
GND
C128
0.1U
NC
U5
LD1117S12
A
A
8
7
6
4
5
3
2
1
18520_500_090312.eps
090312
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 48
SSB: MT822x Processor
4
3
GND
DV10
DDRV
RDQ5
RDQ6
RDQ7
RDQS0
RDQM0
DV10
RDQM1
E
RDQS1
RDQ8
RDQ9
RDQ10
RDQ11
RDQ12
RDQ13
RDQ14
RDQ15
AV12_MEMPLL
RCLK0#
RCLK0
RCKE
RA12
RA11
RA9
RA8
RA7
RA6
RA5
RA4
RWE#
RCAS#
RRAS#
RCS#
RBA0
RBA1
RA10
RA0
RA1
DV10
RA2
RA3
DDRV
D
DDRV
R458
1K
MEM_VREF_1
DV10
DV33
VGASDA
VGASCL
R457
1K
C397
0.1U
C
GND
U11
MT8222
13-MT8222-ARB;13-MT8221-AMB
T
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
PWM1
PWM0
SPDIFOUT
U1TX
U1RX
OSCL0
OSDA0
GPIO_25
GPIO_24
GPIO_23
GPIO_22
GPIO_21
GPIO_20
GND
C388
0.1U
C387
0.1U
C389
4700P
C390
0.1U
C391
0.1U
C393
0.1U
C392
4700P
C395
0.1U
C394
0.1U
F
R311
100R
L43
220R
L42
220R
L44
220R
C109
100U
16V
C34
4U7
C376
3300P
C402
0.1U
C379
3300P
GND
GND
DV10
R466
1K
C42
4U7
C375
3300P
C373
0.1U
C35
4U7
C396
0.1U
C125
220U
6V3
AV33_DAC
C377
0.1U
C380
4700P
C374
3300P
C381
0.1U
C382
0.1U
C383
0.1U
C124
470U
10V
E
GND
AV12
AV12
AV12_PLL
AV12
L41
220R
C399
0.1U
C38
4U7
C372
3300P
C32
10U
C371
3300P
C33
4U7
C378
0.1U
GND
C348 GND
1U NC
AV12_PLLADC
AV12
AV12_PLLSYS
AV12
DV33
+3V3
Z16
Z17
AV33_DAC
AV33_ADCREF
AUD_R
AUD_L
AUD_VMID
AV33_ADC
C386
3300P
C385
0.1U
GND
GND GND
R286
100R
+3V3
1U NC
AR2
AL2
AR3
AL3
C384
0.1U
C40
4U7
R465
1K
NC
AOSDATA0
AOBCK
AOLRCK
AOMCLK
DV33
DV10
AR0
AL0
C403
C110
100U
16V
GND GND
C370
0.1U
C369
0.1U
C368
3300P
C107
100U
16V
GND
GND
AV12_LVDS
AV12
AV12
AV12_MEMPLL
L45
220R
AV12_USB
+3V3
L37
220R
L36
220R
C37
10U
C528
10U
16V
C367
0.1U
C27
4U7
GND
AV12
AV12_PLL
XTALI
XTALO
AV33_XTL
ADIN5
ADIN4_1
ADIN3_1
ADIN2
+3V3
AV12D_RGB
L40
220R
C30
4U7
C31
4U7
GND
AV12_PLLSYS
AV12_PLLADC
C364
0.1U
C359
0.1U
C24
10U
C525
10U
16V
C25
10U
C526
10U
16V
C363
0.1U
C362
0.1U
D
C108
100U
16V
ADIN1
ADIN0
AV33_SIFDIG
MPX1
MPX2_N
MPX2_P
AV33_SIF
AV33_CVBS
CVBS_BYPASS
CVBS_TP
CVBS0P_1
CVBS0N_1
CVBS1
CVBS2
CVBS3
CVBS4
CVBS5
CVBS6
CVBS7
GND
GND
R459
0R
L38
220R
L47
220R
C23
10U
C365
0.1U
C529
10U
16V
GND
GND
AV12
AV12_HDMI
AV12
AV12_LVDSPLL
AV12
AV12A_RGBB
L39
220R
C26
4U7
C29
4U7
C361
0.1U
C360
0.1U
C28
10U
C366
3300P
GND
GND
GND
+3V3
R145
820K
XTALI
256
255
254
253
252
251
250
249
248
247
246
245
244
243
242
241
240
239
238
237
236
235
234
233
232
231
230
229
228
227
226
225
224
223
222
221
220
219
218
217
216
215
214
213
212
211
210
209
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
C398
1000P
PWM1
PWM0
SPDIF_OUT
TXD1
RXD1
HW_SCL
HW_SDA
GPIO25
GPIO24
GPIO23
GPIO22
GPIO21
GPIO20
I2S_ADIN
I2S_AOSDATA0
I2S_AOBCLK
I2S_AOLRCK
I2S_AOMCLK
VDD33_1
DVDD10_3
AR1
AL1
AVICM2
AR2
AL2
AR3
AL3
AVDD33_ADAC
AVDD33_REFP_AADC
AIN_R
AIN_L
VMID
AVDD33_AADC
AVDD12_APLL
AVDD12_SYSPLL
AVDD12_ADCPLL
AVDD12_PSPLL
AVDD12_DMPLL
XTALI
XTALO
AVDD33_XTAL
ADIN5
ADIN4
ADIN3
ADIN2
ADIN1
ADIN0
AVDD33_DIG
MPX1
MPX2_N
MPX2_P
AVDD33_SIF
AVDD33_CVBS
CVBS_BYPASS1
CVBS_BYPASS0
CVBS0N
CVBS0P
CVBS1P
CVBS2P
CVBS3P
CVBS_SY0
CVBS_SC0
CVBS_SY1
CVBS_SC1
T T
RDQ2
RDQ3
RDQ4
DVDD10_2_3
DVDD10_2_2
RDQ0
RDQ1
VCC2IO_2_8
RDQ2
RDQ3
RDQ4
VCC2IO_2_7
RDQ5
RDQ6
RDQ7
VCC2IO_3
RDQS0
VCC2IO_2_6
RDQM0
DVDD10_2_1
RDQM1
VCC2IO_2_5
RDQS1
VCC2IO_2_4
RDQ8
RDQ9
VCC2IO_2_3
RDQ10
RDQ11
RDQ12
VCC2IO_2_2
RDQ13
RDQ14
RDQ15
AVDD12_MEMPLL_1
VCC2IO_1_1
RCLK0#
RCLK0
VCC2IO_2_1
RCKE
RA12
RA11
VCC2IO_2
RA9
RA8
RA7
RA6
RA5
RA4
RWE#
RCAS#
RRAS#
RCS#
RBA0
RBA1
RA10
RA0
RA1
DVDD10
RA2
RA3
VCC2IO_1
RVREF0
DVDD10_2
VDD33_2
VGA_SDA
VGA_SCL
C566
10P
Z100
AVDD12_RGB
AVDD12_DIG_RGB
PR0P
PB0P
COM0
Y0P
SOY0
PR1P
PB1P
COM1
Y1P
SOY1
AVDD33_VGA
RP
COM
GP
SOG
BP
HSYNC
VSYNC
AVDD12_HDMI_3
RX0_2
RX0_2B
RX0_1
RX0_1B
RX0_0
RX0_0B
RX0_C
RX0_CB
HDMI_SCL0
HDMI_SDA0
PWR5V_0
RX1_2
RX1_2B
RX1_1
RX1_1B
RX1_0
RX1_0B
RX1_C
RX1_CB
AVDD33_HDMI
HDMI_SCL1
HDMI_SDA1
PWR5V_1
RX2_2
RX2_2B
RX2_1
RX2_1B
RX2_0
RX2_0B
RX2_C
RX2_CB
HDMI_SCL2
HDMI_SDA2
PWR5V_2
HDMI_CEC
DVDD10_1
USB_DP1
USB_DM1
AVDD12_USB
USB_VRT
AVDD33_USB
USB_DP0
USB_DM0
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
RDQ0
RDQ1
C565
10P
GND
1
VSDA_R
Z102
1
PWM2
PWM3
ICE
PRST#
SPI_CS0
SPI_SO
SPI_SI
SPI_SCK
SPI_CS1
INT0_
IR_
RXD0
TXD0
UP30
UP31
UP33
UP34
UP35
VDD33_1_1
DVDD10_4
AVDD12_VPLL
TP
E4P
E4N
E3P
E3N
ECKP
ECKN
AVDD33_LVDSB
E2P
E2N
E1P
E1N
E0P
E0N
AVDD12_LVDS
O4P
O4N
O3P
O3N
OCKP
OCKN
AVDD33_LVDSA
O2P
O2N
O1P
O1N
O0P
O0N
DVDD10_3_1
DVDD10_3_2
VDD33_2_1
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
EPAD_GND
Z101
+3V3
2
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
257
C88
470U
10V
VSCL_T
T
GPIO_11
GPIO_10
GPIO_9
GPIO_8
GPIO_7
GPIO_6
GPIO_5
GPIO_4
GPIO_3
GPIO_2
GPIO_1
GPIO_0
DV33
R481
NC
10K
P10
GND
T
F
100R
NC
DV10
O0N
O0P
O1N
O1P
O2N
O2P
AV33_LVDS
OCKN
OCKP
O3N
O3P
O4N
O4P
AV12_LVDS
E0N
E0P
E1N
E1P
E2N
E2P
AV33_LVDS
ECKN
ECKP
E3N
E3P
E4N
E4P
LVDS_TPPIN
AV12_LVDSPLL
DV10
DV33
UP35
UP34
UP33
UP31
UP30
U0TX
U0RX
OIRI
INT
SPI_CS1#
SPI_SCK
SPI_SI
SPI_SO
SPI_CS#
ORESET#
ICE
PWM3
PWM2
GND
2
DDRV
R482
NC
10K
R464
10K
3
GND
R462
4
U0RX
MT822x Processor
5
U0TX
B02
6
GND
7
GND
8
AV33_USB
+3V3
X4
27M
C36
10U
C527
10U
16V
C174
33P
AV33_XTL
C39
4U7
C353
0.1U
C
L30
220R
L31
220R
XTALO
C173
33P
+3V3
AV33_CVBS
L28
220R
C356
0.1U
C15
10U
C14
4U7
C354
0.1U
C16
10U
R456
0R NC
USB_DM0_1
USB_DP0_1
AV33_USB
USBVRT
AV12_USB
USB_DM1_2
USB_DP1_2
DV10
CEC
OPWR2_5V
HDMIDDCSDA_2
HDMIDDCSCL_2
RX2_CB
RX2_C
RX2_0B
RX2_0
RX2_1B
RX2_1
RX2_2B
RX2_2
OPWR1_5V
HDMIDDCSDA_1
HDMIDDCSCL_1
AV33_HDMI
RX1_CB
RX1_C
RX1_0B
RX1_0
RX1_1B
RX1_1
RX1_2B
RX1_2
OPWR0_5V
HDMIDDCSDA_0
HDMIDDCSCL_0
RX0_CB
RX0_C
RX0_0B
RX0_0
RX0_1B
RX0_1
RX0_2B
RX0_2
AV12_HDMI
VGAVSYNC#_1
VGAHSYNC#_1
BLUP
VGASOG
GRNP
VGAGND
REDP
AV33_VGA
SOY1
Y1P
YPBPR1_GND
PB1P
PR1P
SOY0
Y0P
YPBPR0_GND
PB0P
PR0P
AV12D_RGB
AV12A_RGBB
MEM_VREF
MEM_VREF_1
+3V3
GND
R472
10K
C405
33P
2
C406
0.1U
3
5
6
SPI_CS#
7
SPI_SI
8
SCLK
SI
VCC
PO6
NC
PO2
PO5
PO1
PO4
PO0
PO3
CS#
GND
SO
WP#/ACC
16
15
SPI_SCK_1
OSCL0
OSDA0
SPI_SO
14
13
12
R468
R469
R470
PWM2 10K
100R
100R
C
B
10
9
C297
1000P
R480
1K
8
VCC
7
WC
6
SCL
5
SDA
E0/NC
E1/NC
E2/NC
VSS
IIC ADRESS "A0"
E
11
U21
M24C32MN
Z23
Z22
T T T
R467
100R
C347
0.047U
CVBS0P_1
+3V3
C404
0.1U
2
R744
22R
USB_DP0_1
R745
22R
USB_DM1_2
R746
22R NC
USB_DM1_1
USB_DP1_2
R747
22R NC
USB_DP1_1
A
8
C349
0.1U
C9
4U7
AV33_ADC
+3V3
C8
4U7
L33
220R
C355
0.1U
C18
10U
C19
4U7
C350
0.1U
C20
4U7
C17
10U
C357
0.1U
B
GND
CVBS0N
GND
GND
GND
T
C171
1U
3
Z18
4
Z27
AV33_LVDS
+3V3
AV33_DAC
+3V3
L29
220R
C41
4U7
C352
0.1U
C13
10U
C12
4U7
+3V3
L46
220R
GND
+3V3
AV33_SIFDIG
C11
10U
C351
0.1U
C400
0.1U
C21
4U7
AV33_ADCREF
L35
220R
L34
220R
C22
4U7
C401
0.1U
C358
0.1U
GND
FRESET#
USB_DM0
VGAVSYNC#_1
USB_DP0
VGAHSYNC#_1
SPI_SCK_1
7
GND
GND
GND
USB_DM0_1
AV33_SIF
L32
220R
NC
GND
Q11
BT3904
C346
0.047U
CVBS0N_1
1
+3V3
L27
220R
C10
4U7
CVBS0P
T
4
GND
HOLD#
3V3_F
1
Z25
T
Z24
R473
10K
NC
GND
3V3_F
U10
MX25L3205
R474
10K
AV33_VGA
+3V3
L26
220R
+3V3
GND
AV33_HDMI
+3V3
GND
GND
GND
R463
1%
5K1
L141
120R
B
GND
R733
1K
R734
1K
R739
47R
RESET
ORESET#
VGAVSYNC#
T
GND
Z136
A
C507
0.1U
VGAHSYNC#
SPI_SCK
GND
GND
R397
10K
GND
6
4
5
3
2
1
18520_501_090312.eps
090312
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 49
SSB: DDR SD-RAM
8
B03
7
6
5
4
3
2
1
DDR SD-RAM
F
F
(DDR SD-RAM with termination)
VTT
U18
23
24
25
26
29
30
31
32
33
34
22
35
MEM_VREF
E
38
MEM_CLK0
37
MEM_CLKEN
MEM_CS#
MEM_RAS#
MEM_CAS#
MEM_WE#
19
18
17
16
MEM_DQM0
MEM_DQM1
15
39
20
21
MEM_BA0
MEM_BA1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
CLK
CKE
NC1
NC2
CS
RAS
CAS
WE
VDD
VDD1
VDD2
VDDQ
VDDQ1
VDDQ2
VDDQ3
LDQM
UDQM
VSS
VSS1
VSS2
VSSQ
VSSQ1
VSSQ2
VSSQ3
A13
A12
D
2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53
49
36
40
29
30
31
32
35
36
37
38
39
40
28
41
MEM_ADDR0
MEM_ADDR1
MEM_ADDR2
MEM_ADDR3
MEM_ADDR4
MEM_ADDR5
MEM_ADDR6
MEM_ADDR7
MEM_ADDR8
MEM_ADDR9
MEM_ADDR10
MEM_ADDR11
MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8
MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
DDRV
1
14
27
3
9
43
49
MEM_CLK0
MEM_CLK0#
MEM_CLKEN
45
46
44
MEM_CS#
MEM_RAS#
MEM_CAS#
MEM_WE#
24
23
22
21
16
51
MEM_DQS0
MEM_DQS1
54
28
41
52
6
12
46
SDRAM ADD
MEM_DQ0
U33
M12L64164A
MEM_ADDR0
MEM_ADDR1
MEM_ADDR2
MEM_ADDR3
MEM_ADDR4
MEM_ADDR5
MEM_ADDR6
MEM_ADDR7
MEM_ADDR8
MEM_ADDR9
MEM_ADDR10
MEM_ADDR11
R668
22R
R671
150R
MEM_VREF
MEM_DQM0
MEM_DQM1
20
47
MEM_BA0
MEM_BA1
26
27
5
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
VREF
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
NC
NC1
NC2
NC3
NC7
NC4
NC5
NC6
CK
CK
CKE
CS
RAS
CAS
WE
VDD
VDD1
VDD2
VDDQ
VDDQ1
VDDQ2
VDDQ3
VDDQ4
LDQS
UDQS
LDM
UDM
VSS
VSS2
VSS1
VSSQ1
VSSQ2
VSSQ
VSSQ3
VSSQ4
BA0
BA1
GND
2
4
5
7
8
10
11
13
54
56
57
59
60
62
63
65
14
17
19
25
42
43
50
53
C46
4U7
MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8
MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
RDQ0
5
4
4
MEM_DQ1
C420
0.1U
6
3
7
2
8
1
RDQ1
6
3
7
2
8
1
MEM_DQ2
RDQ2
RDQ3
MEM_DQ3
R669
150R
GND
R654
22R
MEM_DQ4
5
C421
3300P
RDQ4
4
5
4
6
3
7
2
8
1
MEM_DQ5
6
3
7
2
8
150R
150R
150R
150R
150R
150R
1
RDQ5
MEM_DQ6
RDQ6
MEM_DQ7
GND
C429
0.1U
MEM_ADDR12
R497
R496
R491
R495
R498
R492
RDQ7
RDQS0
RDQM0
RDQM1
RDQS1
MEM_DQS0
MEM_DQM0
MEM_DQM1
MEM_DQS1
MEM_DQ0
MEM_DQ8
R667
22R
R662
150R
GND
MEM_DQ9
1
18
33
3
9
15
55
61
5
4
6
3
7
2
8
1
RDQ8
5
4
6
3
7
2
8
1
MEM_DQ10
C428
3300P
RDQ9
MEM_DQ11
RDQ10
MEM_DQ12
34
48
66
6
12
52
58
64
C113
100U
16V
C44
4U7
RDQ11
R666
22R
R665
150R
GND
RDQ12
5
4
6
3
7
2
5
4
6
3
7
2
8
1
MEM_DQ13
C422
0.1U
RDQ13
MEM_DQ14
RDQ14
MEM_DQ15
HY5DU281622FT
R661
150R
GND
R655
22R
RWE#
MEM_WE#
5
4
6
3
7
5
4
6
3
2
7
2
1
8
MEM_CAS#
RCAS#
MEM_RAS#
8
RRAS#
R660
150R
GND
1
R656
22R
MEM_CS#
5
4
6
3
7
2
+3V3
1
MEM_VREF
2
GND
3
4
VIN
NC3
GND
NC2
REFEN VCNTL
VOUT
NC1
SDRAM NC
C80
47U
6V3
R719
0R NC
8
NC
8
VTT
C111
47U
6V3
GND
C412
1000P
C415
0.1U
C47
4U7
C430
0.1U
L80
220R
SDRAM ADD
R487
1K
SDRAM 75R
MEM_VREF
5
R720
0R NC
C413
0.1U
C575
10U
NC
R499
1K
SDRAM 75R
MEM_CLK0
R483
100R
SDEAM NC
R484
22R
C424
3300P
RCLK0
R485
22R
SDRAM NC
MEM_CLK0#
2
RBA1
R486
22R
GND
GND
1 MEM_ADDR7
RA7
5
4
6
3
7
2
8
1
2 MEM_ADDR6
3 MEM_ADDR5
4 MEM_ADDR4
R663
150R
7
C426
0.1U
R657
22R
5
8
RA10
1
8
6
GND
RCKE
R664
150R
7
RCLK0#
MEM_CLKEN
GND
GND
7
RBA0
1
8
VTT
7 R721
6 0R
3
MEM_ADDR10
GND
U1
RT9199
4
6
MEM_BA1
DDRV
C114
47U
6V3
RCS#
5
MEM_BA0
C425
0.1U
RA5
RA4
R658
22R
RA12
5
4
6
3
7
2
2 MEM_ADDR11
3 MEM_ADDR9
5
4 MEM_ADDR8
RA11
RA9
RA8
1
8
R659
22R
R670
150R
MEM_ADDR0
5
C45
4U7
RA0
4
5
4
6
3
7
2
8
1
MEM_ADDR1
C427
3300P
6
3
7
2
8
1
RA1
MEM_ADDR2
B
C
RA6
1 MEM_ADDR12
6
GND
D
RDQ15
1
8
C423
3300P
C
22R
22R
22R
22R
DDRV
GND
DDRV
E
R493
R490
R489
R488
RA2
MEM_ADDR3
RA3
B
DDRV
GND
C89
470U
10V
C112
100U
16V
C414
0.1U
C43
4U7
C417
0.1U
C416
0.1U
C418
0.1U
C419
3300P
C408
3300P
C409
3300P
C410
3300P
C411
0.1U
GND
A
A
8
7
6
4
5
3
2
1
18520_502_090312.eps
090312
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 50
SSB: Tuner
8
B04
7
6
5
4
3
2
1
TUNER
F
Z1
F
Z2
5VOUT
5VOUT
APLS EU
TCL AP
R160
22K
R166
4K7
4 4
GND/ADJ1
OUT 2
VIN 3
L62
0R
GND
33V
C432
1000P
L48
1000UR
C176
0.1U
R187
5K6
1
GND
2
3
R178
47K
C193
0.1U
D14
LL4148
C175
0.1U
13
NC
B
TDA9885T
C
Q13
BC857C
MPX2
C183
4700P
D
R173
12K
R188
5K6
Z32 Z31
T T
C191
1000P
NC
C209
0.01U
NC
C
B
Q16
C124ET
C190
1000P
NC
C210
390P
B
GND
R185
1K
R163
GND 2K2
GND
1
C440
1000P
GND
GND
R191
100R
SCL_TV
R157
100R
SDA_TV
C181
47P
C194
47P
E
E
C184
270P
TV1-V
LATAM NC AP-ADD
E
12
SCL
SDA
11
10
AUD
TOP
9
8
DGND
7
AFD
6
5
DEEM
FMPLL
4
OP1
3
SIOMAD
15
14
REF
TAGC
16
17
CVBS
VAGC
19
18
AGND
20
VP
VPLL
22
23
24
21
AFC
OP2
SIF1
SIF2
1
VIF2
OUT2
R190
75R
TV-CVBS
C185
0.47U
C178
0.01U
R151
0R
L61
0.56UH
C
3
C198
0.1U
C115
47U
6V3
C197
200P
C192
0.1U
GND
C199
0.01U
Q14
BC846B
2
GND
TV-RF-AGC
RF-AGC
R162
220R
R172
10K
C431
1000P
D28
0BAV99
R150
12K
C117
100U
16V
C189
0.01U
5
GND
R182
0R
NC
R152
2K2
L55
1000UH
GND
E
5V-IF
TV_AUDIO
C202
0.1U
R179
100K
L54
1000UH
4
L50
1000UR
R165
470R
L-45-SAWM39-530
5V-IF
GND
GND
X2
SAW-3953D/K7270M
R186
2K2
GND
2
C206
0.01U
D2
33V
OUT1
SAW-D9453D
L-45-SAW937-0M0
D17
BA277
C116
100U
16V
5
VIF1
GND
R181
2K2
R184
22K
C
X7
C438
0.01U
4
U2
NC
R180
33R
5V-IF
12_IF
5VOUT
3
OUT2
SCL_TV
2
GND
GND
C180
47P
Z160
T
R189
0R
1
R170
0R
NC
GND
5VOUT
C204
20P
C177
0.22U
CVBS
OUT1
R155
100R
C179
47P
U6
LD1117S50
SDA_TV
R727
0R
NC
R174
4K7
L51
1UH
NC
C188
0.47U
9885 NC
GND
IN
C214
3300P
GND
GND
R154
100R
GND
C182
0.01U
GND
BA277
D15
C211
0.1U
C212
1U
D
C205
0.01U
IN/GND
RF-AGC
IN
C118
47U
6V3
C213
0.1U
D6
BA277
GND
C208
0.01U
TV-RF-AGC
OP2
NC
C201
0.01U
NC
E
R169
10K
NC
T
C49
10U
L52
1000UR
R48
22R
2W
Z37
Z34
5V-IF
12_M
Z36
T
T
Z33 T
B
C186
R156
0.1U
100K
R159
22K
X3
4M
R158
330R
R168
10K
C
R755
0R
NC
GND
C187
1500P
2
Z35
T
GND
E
Q12
BT3904
NC
R756
0R
NC
IN/GND
9
11
IF
BT
BP
NC
6
7
SCL
SDA
5
4
3
1
NC
T
Z38
GND
R161
12K
R153
4K7
D16
BA277
T
Z39
AS
AGC
IF-OUT
11
BT
10
9
8
NC4
NC3
MB2
MB1
6
7
SCL
AS
SDA
5
4
3
2
1
NC1
AGC
R167
4K7
5VOUT
GND
C
GND
GND
Far from signal
5V-IF
R509
22K
C203
0.1U
5VOUT
C62
0.01U
5VOUT
MPX2
GND
R177
4K7
+3V3
R176
4K7
TV1-V
5
R175
4K7
3
SDA_TV
L49
2.2UH
R503
10R
4
TV-CVBS
1
2
C433
33P
C434
33P
GND
C119
47U
6V3
TV_AUDIO
OP2
R512
39K
R513
39K
C120
47U
6V3
R500
4K7
L-ADD
R516
10K
L-ADD
C
B
E
Q18
BC846B
L-NC
R511
100R
OSCL0
GND GND
C439
22P
R510
100R
R196
0R
L-ADD
Q15
BC846B
C61
0.01U
MPX2_N
R507
330R
R518
22K
C
GND
R514
100R
E
TV1-V
GND
L-ADD
L-ADD(NC)
GND
J1
0R NC
R515
220R
L-ADD
B
J2
0R NC
J3
0R NC
GND
MPX1
GND
R501
0R
E
0R
NC
C215
0.1U
L-ADD
B
L-ADD
R195
1K
L-ADD
2
GND
C207
0.1U
Q17
BC846B
L-ADD
R193
150R
1
3
X1
4M5
L-ADD
5VOUT
6
U30
UM6K1N
12-UM6K1N-0BX
B
R192
150R
L-ADD
CVBS0N
SCL_TV
L63
12UH
L-ADD
CVBS0P
C196
220P
C195
220P
B
R383
R171
82R
MPX2_P
C
GND
J4
0R NC
C435
22P
GND
GND
OSDA0
GND
A
A
8
7
6
4
5
3
2
1
18520_503_090312.eps
090312
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 51
SSB: HDMI
8
B05
7
6
5
4
3
2
1
HDMI
P5
MNT-HOLE2
6
MNT-HOLE1
GND3
RX0RXC+
7
1
RX0_1
R36
1
RX0_1B
2
RX0_C
1
RX0_1B
RX0_0
1
NC1
8
RX0_CB
2
GND
9
RX0_0B
10
RX0_C
DDCCLK
DDCDA
VCC
R540
100R
RX0_CB
13
14
HDMISCL_0
R561
1K
18
100R
P13
C445
10P
RX2+
GND
R148
1K
HDMICAB0
T
GND
RX1+
C298
1000P
GND2
RX0+
Z43
T
R563
100R
1
GND
RX1-
R539
47K
GND
R564
100R
R538
47K
U22
AT24C02
8
6
1
1
R562
10K
D
2
R53
R54
WP
SCL
SDA
RXC+
GND4
Z45
RXCNC1
GND
2
2
NC2
DDCCLK
GND GND
DDCDA
GND5
VCC
P14
2
3
RX1_2B
4
RX1_1
RX1-
1
RX1_0B
1
2
RX1_C
1
RX1_1B
RX1_0B
RX1_C
2
1
NC20
NC21
2
9
10
RX1_CB
RX2_1B
1
RX2_C
RX2_C
1
2
RX2_CB
1
R529
100R
RX1_CB
13
HDMI_CEC_3V3
14
D
R549
HDMISCL_2
HDMISDA_2
Z107
15
HDMISCL_2
16
R559
1K
18
C448
10P
R254
1K
GND
B
E
Z108
R558
100K
21
C452
1000P
GND
R545
100R
R552
47K
R551
47K
R94
U23
AT24C02
1
8
A0
VCC
2
7
A1
WP
3
6
A2
SCL
4
5
GND
SDA
Z48
2
R544
10K
100R
R524
Z105
15
R550
100R
HDMIDDCSCL_1
HDMIDDCSDA_1
R532
1K
18
Q19
BT3904
Z106
R531
100K
GND
1
R521
100R
GND
GND
5V_M
GND
R527
47K
Z40
1
1
2
R58
R59
2
2
Z52 T
Z54 T
T
Z53
U24
AT24C02
8
VCC
7
WP
6
SCL
5
SDA
CEC
A0
A1
A2
GND
CEC1
20
RX0_2B
17
18 OSCL0
RX0_1
15
16 OSDA0
RX0_1B
13
14
11
12
RX0_0
9
10
HDMISCL_0
RX0_0B
7
8
HDMISDA_0
GND
R566
100R
GND
HDMI_CEC_3V3
B
GND
5
6
RX0_C
3
4
HDMICAB0
RX0_CB
1
2
OPWR0_5V
HDMI_CEC_3V3
1
C441
0.1U
2
19
NC
3
Z41
4
T
GND
R526
100R
R565
33K
R112
100R
Q5
2N7002
R528
47K
RX0_2
GND
R113
33K
C337
1000P
R87
R520
10K
+3V3SB
+3V3
B
E
GND
UP30
C442
10P
R149
1K
Z50
GND GND
GND
19
20
Z47 T
Z51 T
T
Z49
C
C446
0.1U
P11
100R
HDMISDA_1
17
R50
C449
10P
HDMISCL_1
16
R55
UP35
GND
Q21
BT3904
19
20
HDMIDDCSCL_2
HDMIDDCSDA_2
100R
C447
10P
HDMISDA_2
17
GND
R525
100R
R548
GND
HDMISCL_1
HDMISDA_1
HDMI_CEC_3V3
14
2
OPWR2_5V
OPWR1_5V
13
2
2
R39
R556
100R
RX2_CB
2
1
2
R37
R557
10K
GND
R530
10K
11
21
1
2
11
R26
2
GND
R51
RX2_0B
R23
E
+3V3
NC21
2
RX2_0B
R41
GND
8
12
PWM1
C218
0.1U
R202
24K
GND
1
R56
T
NC20
1
R27
C
HPD
RX2_0
R197
0R
NC
T
VCC
B
1
2
GND5
9
12
1
RX2_1
2
DDCDA
1
GND
T
NC2
DDCCLK
RX2_1B
8
10
RX2_0
R43
5
7
R199
100R
3
R40
1
RXCNC1
RX2_2B
1
GND4
2
2
RXC+
RX1_0
RX2_1
6
R201
10K
2
R38
2
R42
2
GND3
RX0-
7
RX1_0
R44
1
RX0+
RX1_1
RX1_1B
2
R28
1
HPD
R24
R29
5
6
1
1
GND2
C
R25
RX1_2
RX1_2B
RX1+
RX2_2
GND
RX2-
4
EN
PWM3
RX2_2B
C
RX1_2
FAULT
R46
2
T
GND1
GND
1
T
RX2+
GND
1
C469
1000P
T
Z42 T
Z46 T
T
Z44
GND
RX0-
C443
0.1U
T
5
VCC
ILIM
R198
100R
RX2_2
2
7
R57
GND3
1
A0
2
A1
3
A2
4
GND
R713
10K
1
R542
100K
IN
13-TPS255-0DB
GND
1
3
RX2-
B
E
Z104
OUT
UP33
GND1
Q20
BT3904
4
GND
+3V3
GND
HDMIDDCSCL_0
HDMIDDCSDA_0
C444
10P
HDMISDA_0
19
100R
R537
Z103
16
5
GND
R536
15
6
C90
47U
6V3
C217
0.1U
HDMISCL_0
HDMISDA_0
HDMI_CEC_3V3
+3V3
U12
TPS2550
R200
100K
R22
R47
L64
120R
NC
100U
16V
F1 F2
OPWR0_5V
C
HPD
1
2
GND
R541
10K
17
GND5
1
GND
R52
T
NC2
12
VCC-1
C219
0.1U
L65
120R
C91
R32
2
RXC-
E
2
5V_M
USB_DM0
2
R30
R34
USB_DP0
3
DNEG-1
11
GND4
4
2
1
RX0+
6
RX0_0B
2
DPOS-1
GND
RX1-
1
GND-1
2
R33
RX0_1
5
GND2
1
T
4
RX0_0
R35
RX0_2B
RX0_2B
RX1+
R31
2
GND
1
1
3
RX2-
R45
RX0_2
2
2
GND1
GND
RX0_2
1
RX2+
F
5
GND
1
2
P16
GND
F
GND
GND GND
A
A
8
7
6
4
5
3
2
1
18520_504_090312.eps
090312
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 52
SSB: I/O - VGA, USB, S-Video
8
B06
7
6
5
4
3
2
1
I/O - VGA, USB, S-video
GND
P6
R575
100R
VGASCL
R64
NC
F3
F4
F6
F5
5
10
RXD0_EXT
VSYNC0
14
VGA5V_EXT0
9
3
5V_M
GND
SDA
GND
YPBPR2_R
C55
2U2
L133
120R
HPOUTR1
GRNP
R227
68R
R210
8K2
VGA_L
R206
8K2
VGA_R
R205
8K2
GND
R203
22K
YPBPR1_L
C66
2U2
C63
2U2
P7
2
C551
470P
1
47-MIC012-XX0
C544
470P
GND
C
TXD0_EXT
RXD0_EXT
R194
R312
100R
C234
10P
R214
8K2
R319
100R
F38
F39
Y1_R
R213
8K2
R147
1
Y1_L
GND
R212
22K
P39
GND
R211
22K
GND
USB_DP1
1
CVBS6
R216
100R
C220
0.047U
C233
47P
R233
75R
Z59
T
L68
120R
SY1_IN
120R
SC1_IN
2
R224
8K2
VCC_1
AV2_R
C231
0.047U
4
C69
2U2
R223
8K2
F12
R232
100R
F11
C232
47P
R60
R215
75R
Z58
T
7
R69
AV2_L
1
GND
3
2
GND
T
R219
22K
R220
22K
GND
GND
B
5
2
AV2L_IN
1
C68
2U2
L67
CVBS7
3
1
AV2R_IN
P9
6
2
USB_DM1
R218
22K
GND
L124
120R
Z57
T
Z56
T
2
GND
GREEN
AV1_L
R217
22K
C58
2U2
VSDA_R
VGAHSYNC#
YPBPR1_R
AV1_R
R221
8K2
L123
120R
GND
VSCL_T
GND
NC
C71
2U2
C56
2U2
C222
10P
GND
AV1L_IN
GND
D
VGAVSYNC#
R208
22K
GNDGND
GND
R222
8K2
8
NC
5
Y2_L
R207
22K
B
C70
2U2
7
USB_DP1
GND
Y2_R
R209
8K2
C550
470P
C548
470P
C228
10P
AV1R_IN
6
NC
GND
C226
0.01U
5
USB_DM1
1
GND
VGASOG
4
R726
100R
VGAROMWP0
6
2
BLUE
C57
2U2
L131
120R
C221
10P
R225
0R
USB_DP0
GND
2
3
GND GND
R226
68R
C223
4700P
2
1
USB_DM1
1
3
C227
10P
C229
0.01U
NC
R505
100R NC
VCC_1
USB_DM0
Z55 T
YPBPR2_L
BLUP
USB_DM1_1
R204
22K
GND
C
P36
VCC_0
RED
C224
0.01U
VGAGND
7
Z64
GND
USB_DP1
R725
100R
HPOUTL1
R569
22K
R326
100R
NC
T Z61
T Z62
T Z63
VGASDA0
VGASCL0
REDP
USB_DP1_1
Z26
Z21
T T
D
WP
SCL
8
GND
T
C230
0.1U
VCC
E
R304
NC
T
2
1
A0
2
A1
3
A2
4
GND
9
11
F14
R49
NC
47-VGA019-XX0
R570
10K
F13
GND
17
R576
10K
U25
AT24C02
GND
Z20
Z65
T
R568
100R
R572
100R
VCC_0
VCC_1
T
GND
VGA_PLUGPWR0
USB_DM0
USB_DM1
Z19
1
NC
2
6
8
4
7
3
6
2
5
1
USB_DP0
USB_DP1
R305
0R NC
2
3
C291
0.1U
NC
C2
47U
16V
NC
1
P12
NC
10
12
Z6
Z3
Z10
T T T
R65
VIN
C50
47U
16V
NC
GND
T
2
F10
2
R68
NC
2
R61
NC
R228
68R
C279
0.1U
NC
Z11
1
1
F9
CE
1
1
1
D32
BAV70
F8 F7
GND
GND
U35
RT9701
NC-13-RT9701-PBB
11
Z75 T
T
Z74
T
Z73
T
Z72
T
Z71
Z70 T
GND
Z69 T
T
Z68
T
Z67
Z66 T
NC
2
R66
L66
120R
C225
0.01U
VOUT2 VOUT1
GND
1
TXD0_EXT
L72
120R
R571
2K2
3
2
2
4
GND
R567
2K2
VIN
7
R230
GND 75R
R578
560R
CE
12
RED0
R67
NC
VGAVSYNC#
GND
1
GREEN0
R229
75R
R577
560R
4
5
L70
120R
0
VGAHSYNC#
C329
220U
16V
NC
2
8
VGASDA0_IN
R231
75R
R307
0R NC
1
13
HSYNC0
L69
120R
0
RED
VOUT2 VOUT1
GND
3
BLUE0
0
E
5
R321
10K
NC
4
2
2
2
L71
120R
GREEN
F
C200
0.1U
NC
15
VGASCL0_IN
BLUE
5V_M
VGASDA
1
R62
NC
1
1
R63
NC
R574
100R
U34
RT9701
NC-13-RT9701-PBB
16
F
GND
4
Z60
GND
GND
A
A
8
7
6
4
5
3
2
1
18520_505_090312.eps
090312
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 53
SSB: Digital Analog Converter, DAC
8
B07
7
6
5
4
3
2
1
Digital Analog Converter, DAC
Z155
Z154
Z156
T
T
T
P1
F
11
SHIELD
1
VIN
12
VOUT
P28
SCT1_FB_IN
PR1/R_IN
PR1/R_IN
6
RED
R272
68R
L78
120R
R270
75R
8
BLUE
6
SCT1_FS_IN
F15
NC NC
10
YPBPR2_R
21
SCT1_AUR_OUT
R277
75R
GND
R274
100R
C262
0.01U
GND
5V_M
ADCVA
L81
120R
NC
GND
YPBPR1_GND
D
DACVL
+3V3
L82
120R
NC
ADCVA
C243
1U
NC
C245
1U
NC
C244
0.1U
NC
C265
1U
NC
D
+3V3
GND
GND
33R NC
1
GPIO_6
R240
33R NC
2
GPIO_5
R234
33R NC
3
NC
C236
0.1U
NC
GND
F19
C255
0.01U
R266
68R
F21
T
NC NC
1
1
1
L74
120R
12
11
T
R261
75R
L73
120R
Z80
7
Z79 T
Z163
T
5
WHITE
R350
0R
NC
4
3
2
1
R260
0R
C254
4700P
15P
C250
R264
68R
C253
0.01U
C266
0.01U
AGND
AVDD
13
NC
GPIO_2
12
11
C238
0.1U
NC
10
R243
10K
NC
9
R242
10K
NC
R247
10K
NC
R235
10K
NC
8
NC
GND
C
C239
1U
NC
C241
1U
NC
GND
DA_AUL
DA_AUR
Y0P
SOY0
5V_M
PB0P
C251
15P
PR0P
R263
68R
L134
120R
R740
1K
NC
R743
1K
NC
R279
1K
UP31
GND
B
R376
15K
NC
C
B
E
Q26
BT3904
NC R280
75R
B
SCT1_AV_OUT
NC
Q27
BT3904
E
C470
1000P
NC
R375
10K
NC
C
C436
47U
6V3
NC
NC
C252
0.01U
C242
0.1U
NC
C52
1U
NC
R282
220R
NC
GND
GND
YPBPR1_L
GND
GND
Z188
T
L136
120R
C546
470P
A
LOUT
YPBPR0_GND
TV-CVBS
T
6
ROUT
R241
33R
C240
0.1U
NC
9
RED
7
DGND
GND
R262
75R
Z81
8
6
VMID
14
C256
15P
R76
NC
BLUE
C235
0.1U
NC
FORMAT
ENABLE DVDD
5
C237
1U
NC
MCLK
BCLK DEEMPH
R268
75R
F20
2
2
2
R77
GND
Z82
R265
100R
L75
120R
R78
DIN
C153
33P
NC
ADCVA
GND
LRCLK
4
R267
0R
GND
10
R239
GND
GND
P19
U9
WM8501
GPIO_3
C249
47P
NC
1
C
CVBS3
GND
DACVL
C247
22P
NC
R71
NC
NC
NC
R258
75R
NC
2
F18
C248
0.047U
C138
33P
NC
+3V3
+3V3
SCT1_AV_IN
R257
100R
R255
10R
L76
120R
NC
R236
10K
NC
C136
33P
NC
C130
33P
NC
R238
47K
NC
RED
R252
75R
NC
Y1P
R276
GND 0R
T
T
T
Z148
Z150
Z149
B
R70
NC
F23
C263
0.01U
Z147
NC 47-SCA014-XX0G
GREEN
SOY1
R275
68R
E
SOY1
2
SCT1_AUL_OUT
R269
0R
R253
0R NC
SCT1_FB_IN
C261
4700P
L83
120R
2
20
F16
2
F17
PB1P
1
C264
15P
R73
NC
T
AIR
AOR
R74
2
AOL
R72
C260
0.01U
C257
15P
GND
9
AGND
GND
R273
68R
L77
120R
1
19
BGND
1
YPBPR2_L
8
AIL
5
1
PB1/B_IN
Z146
18
B
Y1/G_IN
Z76
T
SWITCH
GREEN
Z145
Z144
T T T
7
PR1P
R271
75R
R714
0R
SCT1_FS_IN
1
7
17
GGND
F22
PB1/B_IN
9
Z151
T
Y1/G_IN
16
G
CLKOUT
C259
0.01U
C258
15P
5
DATA
R259
10K
NC
R75
NC
3
15
RGND
ADIN3
2
4
DATAGND
WHITE
Z153
3
14
Z152
T T
R
YPBPR2_L
2
F
ADIN3_1
1
VGND
R278
NC
33K
SCT1_FS_IN
RED
13
BLNK
YPBPR2_R
4
SCT1_AV_OUT
2
BLNKGND
E
R506
0R NC
SCT1_AV_IN
YPBPR1_R
C553
470P
A
GND GND
8
7
6
4
5
3
2
1
18520_506_090312.eps
090312
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 54
SSB: I/O - Connectivity YPbPr
8
B08
7
6
5
4
3
2
1
I/O - Connectivity YPbPr
Z182
T
P2
11
SHIELD
2
BLNKGND
AV2R_IN_1
1
RED
Z86
T
3
BLNK
SCT2_R/C_IN
WHITE
2
15
5
DATA
SCT2_FS_IN
R84
NC
GND
F24
1
20
AV2R_IN_1
L143
2.2UH
21
AV2L_IN_1
AV2L_IN
T
C586
2200P
NC
AV2R_IN_1
L135
120R
Z245
AV2R_IN
Z246
C585
2200P
NC
C588
2200P
NC
C587
2200P
NC
GND
C547
470P
Z165
T
P4
P38
Z91
T
1
AUR_OUT0_1
R753
1K
P35
AUR_OUT0
HPDET#
Z90
T
3
WHITE
AUL_OUT0_1
R754
1K
C284
0.1U
R310
10K
HPOUTR1
5V_M
Z92
T
1
2
3
4
2
5
6
7
7
8
R298
4K7
NC
R301
4K7
NC
R299
4K7
NC
R300
4K7
NC
D
3
Z186
T
GAME_CLK
9
F28
F30
R81
NC
1
4
R79
NC
R735
100R
NC
GPIO_22
R736
100R
NC
GPIO_24
R737
100R
NC
GPIO_25
R738
100R
NC
L95
120R
NC
C275
4700P
NC
5
6V3
C276
4700P
NC
C277
4700P
NC
GPIO_23
C274
4700P
NC
11
F29
R318
220R
C
L94
120R
NC
GAME_LOAD
2
CVBS_BYPASS
GND
E
Z171
T
GND
C437
47U
B
AV1_IN
L93
120R
NC
GAME_DA1
1
Q30
BT3904
R325
75R
Z181
T
2
GND
AV1R_IN
L92
120R
NC
GND
GAME_DA2
6
NC
6
SCT2_AV_OUT
Z166
T
8
C54
1U
C
1
AV1L_IN
HPOUTL1
AUL_OUT0
4
5
C278
0.1U
NC
10
2
YELLOW
C1
100U
16V
NC
GND
GND
GND
5V_M
Z172
T
C545
470P
1
NC
RED
E
R315
100R
AUR_OUT0_1
NC
T
2
10
AIR
AOR
GND
GPIO_10
+3V3
L132
120R
AUL_OUT0_1
1
AOL
GND
L142
2.2UH
NC
9
AGND
D
R579
1K
GND
C290
0.1U
GND
T
Z176
AV2L_IN_1
19
BGND
Z177
T
CVBS4
HPDET#
GND
8
AIL
C272
0.047U
HPOUTL1
Z173
9
8
7
C267
47P
R287
75R
T
7
18
B
R296
100R
2
Z89
SWITCH
GND
L85
120R
AV2_IN
3
6
5
4
4
17
GGND
R1
0R
YELLOW
Z178
T
Z196
T
6
CLKOUT
SCT2_R/C_IN
5
16
G
Z87
T
HPOUTR1
L90
2.2UH
T
RGND
L89
2.2UH
2
C287
47P
NC
R297
75R
NC
Z175
T T
1
P27
CVBS5
NC
C270
2200P
C289
2200P
Z191
C273
0.047U
NC
AV2L_IN_1
3
4
DATAGND
NC
SCT2_R/C_IN
14
R
R316
100R
L88
120R
F
GND
C271
2200P
C288
2200P
P31
13
VGND
E
Z88
T
SCT2_AV_OUT
12
VOUT
GND
AV2_IN
1
VIN
2
F
R317
15K
F31
NC
R519
0R
GND
R80
NC
GND
ADIN4_1
R82
NC
C
GND
GND
NC
GND
R294
33K
SCT2_FS_IN
1
GND
ADIN4
NC
1
F25
R86
NC
R302
10R
6
R295
10K
NC
F27
C283
0.047U
R309
100R
AV1_IN
2
2
P30
R83
NC
C281
22P
Z169
T
CVBS1
GND
C531
10U
AL0
R288
470R
DA_AUL
YELLOW
5
Z164
T
L87
120R
4
B
Z170
T
2
16V
NC
AV1L_IN
WHITE
3
C282
47P
R308
75R
Z85
T
AV1R_IN
C286
0.1U
NC
Z84
T
R313
100R
NC
2
RED
BLACK
1
C549
470P
GND
R85
1
C552
470P
2
GND
P18
NC 47-RCA276-XX0G
GND GND
AR0
SPDIFOUT
16V
NC
A_MUTE
R292
1K
NC
NC
C583
2200P
NC
B
E
R759
1K
DA_AUR
R289
470R
NC
R290
47K
NC
R741
100R
C
NC
Q28
BT3904
NC
C
GND
NC
Q29
BT3904
NC
R742
100R
SCT1_AUL_OUT
C451
2200P
NC
B
GND
NC
C584
2200P
NC
B
NC
R314
100R
NC
C285
33P
NC
F26
A_MUTE
GND
NC
1
R293
47K
NC
R291
1K
C530
10U
GND
L91
120R
NC
R758
1K
E
SCT1_AUR_OUT
C450
2200P
NC
GND
GND
GND
GND
GND
A
A
8
7
6
4
5
3
2
1
18520_507_090312.eps
090312
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 55
SSB: MUX and DEMUX
8
B09
7
6
5
4
3
2
1
MUX and DEMUX
F
R612
100R
R611
33K
1
R609
10K
2
C465
100P
3
16V
C296
0.022U
R607
100R
AR3
C459
1000P
R338
13K
C537
10U
GND
C295
0.022U
4
1OUT
1IN-
8
VCC+
2OUT
1IN+
2IN-
VCC-
2IN+
C460
0.1U
7
6
C95
22U
16V
R337
13K
0.022U
C294
R334
13K
C534
10U
5
R606
33K
R630
33K
GND
C458
1000P
C532
10U
16V
AL21
AR2
R629
33K
C467
0.1U
R598
100R
GND
AR21
1OUT
2
C463
100P
3
C456
1000P
4
R333
13K
7
2OUT
1IN+
5
GND
HPOUTL1
C
1K
R335
4K7
Q36
BT3904
B
E
R597
10R
GND
HPOUTR1
C
B
GND
R336
4K7
Q33
BT3904
E
GND
R339
15K
GND
R627
33K
C96
22U
16V
C468
0.1U
C455
1000P
R628
33K
GND
GND
R602
10R
R599
1K
R616
33K
E
GND
R603
C539
100U
GND
16V
100P
A_MUTE
C462
6
2IN-
GND
2IN+
LM358
GND
C457
0.1U
8
VCC
1IN-
16V
C293
0.022U
A_MUTE
U27
13-LM833D-00B
1
R340
15K
AUR_OUT0
100P
C464
12_MA
R600
33K
R617
AL2 100R
C536
10U
16V
GND
R610
10K
16V
AUL_OUT0
U26
RC4558
GND
C535
10U
R608
100R
AL3
F
C533
100U
16V
C540
10U
16V
12_M
GND
E
GND
GND
12/24V_AUDIO
12_M
R347
33K
R729
0R
D25
LL4148
C538
10U
16V
C122
100U
16V
C461
0.1U
AV1L_IN
R594
1K
D21
BAV70
R593
1K
R715
100R
C92
330U
16V
Q53
BT3906
E
GND
GND
C
GND
R595
100K
C59
10U
R390
10K
GND
GPIO_21
R583
22K
R590
22K
C
D20
LL4148
MCU_M
C495
1000P
C121
10U
16V
R389
100R
A_MUTE
R349
100R
C
B
Y1_R
11
VGA_R
10
AV2_R
9
Y2_R
R631
100R
MUX_CTLC0
VDD
Y0B
VCC-
2IN+
R417
22K
5
R345
5K1
C53
10U
Y2A
Y2B
Y1A
ZB
ZA
Y3B
Y0A
Y1B
Y3A
E
A0
VEE
A1
VSS
R386
33K
GND
GND
GND
D
R581
10K
R432
10K
NC
MUX_CTL2
R435
NC
10K
GPIO_8
+12V
2
C
B
R624
22K
E
C574
1000P
NC
C123
0.1U
R580
10K
C
GPIO_20
Q32
BT3904
B
Q24
BT3904
NC
C
E
C494
1000P
GND
GND
GND
GND
MUX1-R
3
12_M
4
R244
0R
+12V
5
12_MA
BT3904
6
7
R604
10R
C76
10U
8
C453
0.1U
AV1_L
MICOUT_L
B
AUD_LOUT
13
12
MUX1-R
Q101
BT3904
11
AV1_R
MICOUT_R
10
E
GND
GND
+12V
+12V
14
C216
10U
C
R127
4K7
15
MUX1-L
GND
U16
HEF4052B
+12V
16
C502
0.1U
R246
1K8
GND
GND
R620
22K
Q100
NC
U15
HEF4052B
MUX_CTL2
R633
100R
MUX_CTL3
R426
100R
9
VDD
Y0B
Y2A
Y2B
Y1A
ZB
ZA
Y3B
Y0A
Y1B
Y3A
E
A0
VEE
A1
VSS
1
2
AUD_ROUT
3
+12V
4
C67
10U
5
6
7
AUD_LOUT
R341
1K2
AUD_L
AUD_ROUT
R332
1K2
AUD_R
C454
0.1U
C75
10U
B
C60
10U
8
GND
R748
0R
NC
R635
10K
R582
10K
R418
22K
R373
33K
C330
0.1U
GND
MCU_M
GND
MUX_CTLC0
MUX_CTLC1
R637
10K
R638
10K
C
Q38
BT3904
B
C
GPIO_7
Q39
BT3904
B
E
E
C493
1000P
MICOUT_R
120P
+12V
R141
22K
R632
100R
GPIO_1
R404
1K
GND
C572
PWDN
1
MUX_CTLC1
B
2IN-
6
GNDGND
E
12
C580
4U7
C562
0.1U
7
E
D100
LL4148
C
13
1IN+
8
GND
C568
1000P
B
MUX1-L
2OUT
Q43
BT3904
R146
22K
14
MICOUT_L
+12V
R365
10K
GND
15
R396
1K
MUX_CTL3
GND
16
R348
1K
GND
+12V
Y1_L
VGA_L
AV2_L
Y2_L
VCC+
1IN-
R366
33K
GND
GND
+12V
C577
4U7
R95
820R
+3V3SB
R385
10K
R588
R586 R584
22K
22K
22K
R589
R587
R585
22K
22K
22K
4
1OUT
GND
R306
100K
GND
R142
100K
+3V3
C564
1000P
AV1R_IN GND
OFF_MUTE
2
A_MUTE
2
GND
1
R384
5K1
R346
1K
3
R140
820R
B
D
C576
4U7
C581
4U7
U37
RC4558
C563
120P
R303
47K
1
C466
0.1U
C492
220U
16V
12_M
R387
100R
GND
5V-IF
R749
10R
3
+12V
12_M
R728
0R
NC
GND
D19
LL4148
GND
C471
1000P
GND
A
A
GND
GND
8
7
6
4
5
3
2
1
18520_508_090312.eps
090312
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 56
SSB: Audio Amplifier
8
B10
7
6
5
4
3
2
1
Audio Amplifier
LVDSVDD
R372
100R
AMP_SCL
C473
4U7
16V
INT
R250
100R
Z116
30
R368
33R
Q42
BT3904
NC
29
R363
33R
B
GND
32
31
C
E
35
33
Z109
T
R723
100R
C505
1000P
36
34
GND
AMP_SDA
R371
100R
OSDA0
C302
0.1U
T
OSCL0
C301
1000P
D27
LL4148
C497
33P
U17
STA333BW
STA335
28
R364
33R
E
GND
C308
4700P
GND
L105
120R
26
C326
0.1U
680P
C305
GND
D101
LL4148
27
R369
33R
25
C79
10U
R353
2K2
24
PWDN
R352
10K
22
AMP_3V3
C309
0.1U
21
R361
3R3
L103
120R
+3V3
23
20
19
C78
10U
GND_SUB
GND_DIG
SA
SCL
TESTMODE
SDA
VSS
INT_LINE
VCC_REG
RESET
OUT2B
SDI
GND2
LRCKL
VCC2
BICKL
OUT2A
XT1
OUT1B
PLLGND
VCC1
PLL_FILTER
GND1
PLL_VDD
OUT1A
POWERDN
GND_REG
VSS_DIG
VDD
VDD_DIG
CONFIG
OUT4B
OUT3B
OUT3A
OUT4A
R378
0R NC
2
3
4
5
6
15
C85
1U
C522
220U
35V
OUT2A
R696
1K
GPIO_9
C523
220U
35V
OUT1A
R164
0.22R
12/24V_AUDIO
C325
0.1U
C322
0.1U
R360
0R NC
NC
L139
200R
GND
AMP_3V3
C569
1U
NC
17
R351
0R
11
12
13
14
15
16
ECKN_1
17
18
19
ROT/DCR
21
ODSEL
23
VBR_EXT
25
20
E0N_1
SEL_LVDS
22
BIT_SEL
Z133
VBR_OUT
24
U28
A04803
R20
0R
+3V3
R380
22K
R381
4K7
R382
10K
R732
1K
R374
470K
1
S2
2
G2
3
S1
4
G1
Q45
BT3904
B
E
O4P_1
10P
C491
10P
E4N_1
10P
O3P_1
C490
10P
E3P_1
ECKP_1 C327
10P
OCKP_1 C489
10P
E3N_1
7
D2B
6
D1A
5
D1B
E2P_1
C280
10P
O2P_1
C488
10P
E1P_1
C475
10P
O1P_1
C487
10P
ECKP_1
E0P_1
C407
10P
O0P_1
C486
10P
ECKN_1
D26
LL4148
27
28
29
30
31
32
R391
4K7
C336
10P
O4N_1
C485
10P
E2P_1
C328
10P
O3N_1
C484
10P
E2N_1
10P
10P
E1N_1
E0N_1
C478
C477
C476
OCKN_1 C483
O2N_1
O1N_1
10P
O0N_1
10P
C482
C481
C480
4
1
3
2
OCKN_1
O2N_1
33
34
35
36
37
38
39
40
O1N_1
O0N_1
T
Z128
P17
10P
1
2
L8
33R
Z115
Z112
Z113
T
Z114
T
NC/OUT_L-
O3P_1
O3N_1
4
1
3
2
4
1
3
2
4
1
3
2
ECKP
ECKN
OCKN_1
O3P
1
L5
33R
OCKP
3
E2P
O2P_1
E2N
O2N_1
E1P
O1P_1
E1N
O1N_1
E0P
O0P_1
O0N_1
2
OCKN
4
1
3
2
4
1
O2P
O2N
L4
33R
E0N
O4N
O3N
L2 4
33R
OCKP_1
2
E0P_1
GND
E3P
E3N
D
O4P
1
E0N_1
GND
O4P_1
L9
33R
E1N_1
10P
E4N
2
E1P_1
10P
O4N_1
1
3
3
E4P
L11
33R
4
L10 4
33R
10P
C
GND
E
L3
33R
2
3
E3N_1
ECKN_1 C479
R652
100R
O3N_1
O1P_1
3
L12 4
33R
E4N_1
E2N_1
T
GND
E3P_1 C246
C86
0.22U
C
+3V3
GND
O4N_1
T
Z93
8
D2A
LVDSVDD
1K2
R377
R647
10K
26
L13
33R
5V_M
Z132
Z131
T
T
E1N_1
O0P_1
E4P_1
E4P_1 C169
C573
0.1U
E2N_1
O2P_1
C570
0.1U
R370
3K3
E3N_1
OCKP_1
L140
200R
GND
R21
0R NC
T
LVDSVDD
E4N_1
O4P_1
Z117
T
R12
0R NC
ADIN5
10
O3P_1
AMP_12/24V
D
12_M
9
E0P_1
Z135
C504
0.1U
C84
1U
16 AMP_CF
Z130
T
NC
C324
0.1U
OUT1B
GND
6
8
E1P_1
OUT2B
18
5
7
Z187
E2P_1
GND
12
14
4
E3P_1
AMP_12/24V
11
13
3
ECKP_1
C300
0.1U
8
10
2
E4P_1
R379
0R
7
9
GND
AMP_3V3
1
GND
L104
120R
VDD_DIG2
AMP_SA
GND
Z118
1
T
R367
100K
C496
33P
GND
R362
3R3
R641
100R
AMP_3V3
GND
R644
100R
GND GND
F
C571
1000P
C323
0.1U
GND
33P
GND
33P
GND
C499
C498
LVDS CONNECTOR
R757
100R
NC
AOBCK
AOLRCK
AOMCLK
AOSDATA0
T
33P
R642
100R
T
C501
R643
100R
GND
33P
GND
GND
F
C500
L7
33R
O1P
3
2
4
1
3
2
L6 4
33R
1
O1N
O0P
O0N
C
T
P25
L18
22UH
1
OUTL+/OUT_L+
L17
22UH
OUTR+/SUBW+
OUT1A
2
OUTL-/OUT_R+
C303
0.1U
3
NC/OUT_R4
C314
1000P
AMP_12/24V
C319
0.1U
CLICK NC
C313
330P
C83
0.47U
P23
CLICK&32"PS NC
R13
22R
C521
220U
35V
B
C520
220U
35V
C518
220U
35V
R359
3K3
R356
3K3
C315
1000P
NC
R355
0R
C519
220U
35V
C310
0.1U
Z110
T
3
R354
0R
C320
1000P
CLICK NC
C306
1000P
CLICK NC
2
C304
0.1U
GND
C307
1000P
R18
6R8
GND
R19
6R8
C81
0.47U
R357
3K3
R14
22R
OUT2A
CLICK NC
1
GND
GND
T
Z111
C321
1000P
CLICK NC
C318
0.1U
R16
6R8
CLICK NC
CLICK NC
C82
0.47U
CLICK NC
C317
0.1U
CLICK NC
Audio VMID control
C316
330P
CLICK NC
GND
R17
6R8
CLICK NC
R653
200R
OFF_MUTE
R15
22R
CLICK NC
R639
10K
NC
C
NC
E
Q40
BT3904
NC
B
GND
C312
330P
C311
0.1U
L19
22UH
R358
GND 3K3
OUT1B
R712
0R
C299
0.1U
CLICK NC
OUT2A
OUTR-/SUBW-
L20
22UH
AUD_VMID
C77
10U
GND
C503
0.1U
B
GND
OUT2B
CLICK NC
NC
FOR 2.1 CONFIG:
R13 --- 22R ,R354 --- 0R , C312 --- 330P;
C81 --- 0.47U ,R355 --- 0R;
C518/C519/C520/C521 --- 330U/16;
R356/R357/R358/R359 --- 3K3;
C317/C318/C319/C299/R16/R17 --- NC
A
A
8
7
6
4
5
3
2
1
18520_509_090312.eps
090312
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 57
SSB: MCU Stand-by
8
B11
7
6
5
4
3
2
1
MCU Stand-by
+3V3SB
+3V3SB
F
F
R443
47K
ADIN2
C561
1000P
GND
R711
100R
U32
RT9166-33
NC
C332
0.1U
L122
120R
2
OUT
R433
10K
Z202
T
IN
+3V3SB
3
U8
R8C11
R751
0R
MCU_M
5VSB
GND
1
C99
47U
6V3
C344
1U
C98
47U
6V3
NC
C331
0.1U
NC
25
R420
5K1
26
SHORT_PROTECT
MODE
GND
KEY
R448
10K
R449
10K
ADIN3
29
30
31
P14/TXD0
P15/RXD0
VCC
VSS
XIN/P46
P16/CLK0
16
PC_V
13
12
11
10
R407
100R
R409
100R
9
5V_M
R416
10K
PWR_DETECT
R411
4K7
14
R401
10K
VGAVSYNC#
R716
100R
15
R415
10K
PBS_SDA
GND
PBS_SCL
R408
100R
E
U1RX
C
R410
100R
Z220
LED_RED
P8
47-MIC012-XX0
GND
1
R707
10K
R93
R440
1M
R427
5K1
1
B
T
Z219
E
C554
1000P
NC
+3V3SB
NC
GND
X5
16M
C514
10P
C340
10P
C341
10P
C517
0.1U
C
2
2
2
C
GND
Z216
T
IR PASSTHROUGH
GND
F36
4
3
Q59
BT3904
NC
NC
MCU_RESET
RXD_PBS
1
F35
1
3
R706
10K
NC
R718
0R
NC
R717
100R
D
P34
U1TX
8
6
7
5
C516
10P
5
L110
120R
TXD_PBS
Q58
BT3906
NC
B
+3V3SB
2
R704
100R
NC
R705
5K6
NC
C508
0.1U
GPIO_4
Z215
T
L111
120R
4
C509
10P
C
3
Z214
T
3
C510
10P
+3V3SB
CWSS
2
C512
0.1U
E
GND
IR_MCU
1
L114
120R
4
L112
120R
R447
100R
RESET
L113
120R
PBS_SCL
P32
XOUT/P47
PBS_SDA
T
CEC1
P13/KI3#/AN11
P01/AN6
1
+3V3SB
T
VGAHSYNC#
P02/AN5
Z197
Z198
T
ORESET#
P11/KI1#/AN9/CMPO1
P12/KI2#/AN10/CMPO2
2
Z200
T
P45/INT0#
P03/AN4
CWSS
Z199
T
Z222
Z223
Z224
R422
10K
P10/KI0#/AN8/CMPO0
RXD_PBS
7
T
T
GND
GND
MODE
P00/AN7/TXD11
PWR_DETECT
+3V3SB
R695
10K
P04/AN3
P37/RXD10/RXD1
32
R413
100R
P05/AN2
C
R694
10K
P17/INT1#/CNTR0
TXD_PBS
28
R402
100R
R406
100R
R412
100R
R414
100R
ADIN4
D
27
R405
1K
P06/AN1
R431
100R
CEC_IN
C339
22P
NC
GND
Z203
T
+3V3SB
T
Z217
Q54
BT3906
R399
22K
P33/INT3#/TCIN
5VSB
R450
0R
C338
22P
NC
E
R400
10K
R425
100R
R421
4K7
PC_H
GND
E
GND
6
Z221
17
PBS_SCL
PBS_SDA
5
MCU_RESET
D3
8V2
GND
18
GND
C511
0.1U
CWSS
B
P32/INT2/CNTR1/CMP12
A2
19
4
R403
10K
NC
R424
100R
20
3
A1
C515
0.1U
AVCC/VREF
GND
Z218
T
8
VCC
7
WP
6
SCL
5
SDA
A0
P31/TZOUT/CMP11
GND
2
4
+3V3SB
R430
100R
C513
0.1U
CEC1
U29
AT24C02
NC
1
3
RXD_PBS
R419
10K
NC
CEC_OUT
C559
1000P
2
TXD_PBS
+3V3SB
22
R393
4K7
NC
C558
1000P
MODE
R284
1K
NC
T
GND
21
NC
R445
4K7
R183
33K
+3V3SB
T
NC
E
P21
1
OIRI_IS
AVSS
IR_MCU
B
Z226
Z227
T T T
+3V3SB
R392
1K
C
P30/CNTR0#/CMP10
R724
100R
E
Q47
BT3904
NC
R446
100R
P07/AN0
OIRI
OIRI_IS
POWERON/OFF
R444
1K
R398
1K
23
B
Z225
12_M
12/24V_AUDIO
24
C
KEY
IVCC
Q49
BT3904
R285
47K
R92
Z229
GND
GND
Z230
T
T
P3
3
R423
6K8
R428
10K
NC
OIRI_IN
GPIO_11
L116
Z209
T
D1
LL4148
LED
Z211
TO_STB
OIRI_IS
C72
0.1U
1
F33
GND
GND
C335
GND 100P
GND
C333
100P
C334
100P
2
2
C560
1000P
3
F32
R89
NC
R91
C557
1000P
5
1
C542
1000P
B
4
R88
NC
T
Z234
7
F100
P29
2
NC
C474
4U7
16V
5
IR LINK
T
R394
0R
1
C582
1000P
Z231
GND
MCU_RESET
4
T
1
1
R283
100R
F34
L108
120R
2
3
GND
Z210 T
120R
R281
100R
OIRI_IN
2
1
R438
4K7
6
ADIN1
RESET
1
R90
NC
GND
1
120R
120R
VCC
2
F37
2
L115
KEY
U36
MAX809
NC
3
P15
L121
120R
R251
100R
+3V3SB
C343
100P
L118
B
LED_RED
Z206
Z205
Z207
Z204
T T T T
L117
120R
C342
100P
R434
10K
C506
10P
GND
2
GND
R429
10K
NC
2
+3V3SB
1
5VSB
R125
GND
A
A
8
7
6
4
5
3
2
1
18520_510_090312.eps
090312
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 58
Layout Small Signal Board (Top)
PART 1
18530_552a_090319.eps
PART 2
18530_552b_090319.eps
18520_556_090319.eps
090324
40-T8222P-MAD2XG
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 59
Layout Small Signal Board (Top, Part1)
PART 1
18520_556a_090313.eps
090324
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 60
Layout Small Signal Board (Top, Part 2)
PART 2
18520_556b_090313.eps
090324
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 61
Layout Small Signal Board (Bottom)
PART 1
18520_557a_090313.eps
PART 2
18520_557b_090313.eps
18520_557_090313.eps
090324
40-T8222P-MAD2XG
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 62
Layout Small Signal Board (Bottom, Part1)
PART 1
18520_557a_090313
090324
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 63
Layout Small Signal Board (Bottom, Part 2)
PART 2
18520_557b_090313.eps
090324
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 64
Side Control Panel
8
E
7
6
5
4
3
2
1
Side Control Panel
F
F
E
E
R602
22K
P601
7
R601
3K3
6 KEY
R605
9K1
4
3
R604
1.2K
2
12
11
10
9
menu
8
7
ch+
6
5
ch-
4
3
2
1
volR603
5K6
5
D
K1
vol+
POWER
D
C1
0.1U
1
R606
0R
P602
C
+3.3V
6
IR_IN
5
GND
4
C
LED_RED 3
GPIO_11 2
ADIN1 1
B
B
A
A
8
7
6
4
5
3
2
1
18520_520_090312.eps
090324
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 65
Layout Side Control Panel
15820_559_090313.eps
090324
40-T8222P-KED2XG
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 66
IR Panel
8
J
7
6
5
4
3
2
1
IR Panel
F
F
IR
P1
R7
22K
D
10U
3 GND
C2
C3
47U
4 IR_IN
6V3
5 +3.3V
D
R3
1K
R10
1K
2 LED_RED
1
E
C1
10U
R9
4K7
R5
100R
R6
100R
GND
G1
VCC
E
GPIO_11
Q2
R1
4K7
C
B
C
Q1
B
R4
1K
E BT3904
BT3904 E
C
C
1
R11
3 D1
R
4K7
R52
4K7
C
B
B
W
2
Q5
B
BT3904 E
A
A
8
7
6
4
5
3
2
1
18520_530_090312.eps
090312
2009-Jun-05
Circuit Diagrams and PWB Layouts
TCM3.1L LA
10.
EN 67
Layout IR Panel
Personal Notes:
40-T8222M-IRE1XG
18520_558_090313.eps
090323
10000_012_090121.eps
090121
2009-Jun-05