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CDB8415A
Evaluation Board Data Sheet for the CS8415A
Features
● CS8415A Digital Audio Receiver
● CS8405A Digital Audio Transmitter
● Receives and transmits AES/EBU, S/PDIF and EIAJ-340 compatible digital audio
● Analog 5 Volt supply.
● Digital 5 Volt or 3 Volt supply
● Crystal supplied to allow transmitter to operate at 48 kHz sample rate
● Digital patch area
Description
The CDB8415A is designed to allow easy evaluation of the CS8415A and CS8405A. The board is set up for easy connection to an Audio Precision or a Rohde and
Schwarz test system.
Input and output data may independently be set to either
AES/EBU or S/PDIF in optical or coaxial physical formats.
Windows 98 PC software provides a GUI interface to make configuration easy. The software communicates through the PC’s Parallel port to control the internal registers so that all the possible software modes of the
CS8415A and CS8405A may be tested.
ORDERING INFORMATION
CDB8415A Evaluation Board
I
Optical In
S/PDIF In
AES 3 In
CS8415A CS8405A
Parallel port to PC
Optical Out
S/PDIF Out
AES 3 Out
Preliminary Product Information
Cirrus Logic, Inc.
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581 http://www.cirrus.com
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright
Cirrus Logic, Inc. 2002
(All Rights Reserved)
JUN ‘02
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1
CDB8415A
TABLE OF CONTENTS
LIST OF FIGURES
2
Contacting Cirrus Logic Support
For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at: http://www.cirrus.com/corporate/contacts/sales.cfm
IMPORTANT NOTICE
"Preliminary" product information describes products that are in production, but for which full characterization data is not yet available. "Advance" product information describes products that are in development and subject to development changes. Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights of the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other parts of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.
An export permit needs to be obtained from the competent authorities of the Japanese Government if any of the products or technologies described in this material and controlled under the "Foreign Exchange and Foreign Trade Law" is to be exported or taken out of Japan. An export license and/or quota needs to be obtained from the competent authorities of the Chinese Government if any of the products or technologies described in this material is subject to the PRC Foreign
Trade Law and is to be exported or taken out of the PRC.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE
PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANT-
ED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS
IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK.
Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners.
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CDB8415A
1. OVERVIEW
The CDB8415A evaluation board contains a
CS8415A and a CS8405A and the supporting circuitry necessary for them to operate. The input and output options include AES3 and S/PDIF in optical and coaxial formats. In software mode, the control registers of the CS8415A and CS8405A are set through the parallel port of a PC by a Windows 98 based program to control the configuration.
1.1
CS8415A an CS8405A
The features and functions of the CS8415A and the
CS8405A are described in their data sheets.
1.2
Parallel Port
To use the CS8415 A and CS8405A on the board in software mode, the parallel port on the upper right hand side of the board should be connected to the parallel port of the PC running the CDB8415A control software. In software mode remember to enable the clocks in both parts from the configuration software.
1.3
Serial Digital Inputs
The left hand end of the board is occupied by a row of serial digital audio input connectors. In hardware mode, the user may select from the optical connector, the XLR connector, or the first RCA jack. Only one of these inputs should be connected at a time.
In software mode the user has access to these inputs and to the S/PDIF multiplexer. In the multiplexer mode jack J17, labeled OPT, should be jumpered in the enable position. The user can provide inputs to any or all of the seven RCA input jacks. The active input is selected by setting the three least significant bits of Control Register 2. Please note that the current version of the board has a layout error. Jacks 6 and 7 are reversed.
1.4
Serial Digital Outputs
On the upper right hand side of the board are the three serial digital audio outputs. The Optical
S/PDIF output is always enabled. The user may also choose to enable either the coaxial S/PDIF output or the XLR AES3 output.
1.5
Three Wire Serial Input and Output
Jacks J32 and J51 are provided so the user may access the three wire serial ports of the receiver and transmitter. The purpose of these ports is to allow the user to connect his external circuitry to the receiver and transmitter. A flat jumper cable is also provided to allow the output of the receiver to drive the input of the transmitter. This allows the user to operate the board in transceiver mode.
1.6
Micro-Controller Serial Ports
Headers J6 and J37 provide access to the serial control ports of the CS8415A and the CS8405A. Each jack has four serial control lines, a reset line, and an interrupt line. This allows the user to connect an external MCU of his choice to carry out testing and software development. These ports are in the same format as the header on the CDB8420 or the
CDB8427. These two boards use an Atmel AVR microcontroller that can be patched in to communicate with the parts on this board. Another alternative is to patch in the development board of the
MCU of your choice.
1.7
Crystal Oscillators
Oscillator U7 provides the Output Master Clock for the CS8405A. The crystal oscillator on the board is mounted in pin sockets that allow it to be removed or replaced. The board is shipped with a
12.288 MHz crystal oscillator stuffed at U7 which sets the output sampling rate to 48 kHz.
1.8
LED Function Indicators
LEDs D3 and D4 on the middle left hand side of the board allow the user to monitor the receiver status.
LED D4 is connected to the RERR pin of the
CS8415A and LED3 is connected to NVERR. See the CS8415A data sheet for an explanation of the errors that activate each of these outputs.
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4
CDB8415A
CONNECTOR
+5V
+3.3V-5V
GND
OPTICAL INPUT
S/PDIF INPUT
AES3 INPUT
PARALLEL PORT
OPTICAL OUTPUT
S/PDIF OUTPUT
AES3 OUTPUT
J32
J51
J6
J37
INPUT/OUTPUT
Input
Input
Input
SIGNAL PRESENT
+5 Volt Analog power
+3.3 to 5.0 Volt Digital power
Ground connection from power supply
Input
Input
Digital Audio Interface optical input
Digital Audio Interface coaxial input
Input Digital Audio Interface XLR input
Input/Output Parallel port for connection to parallel port of PC
Output
Output
Digital Audio Interface optical output (always active)
Digital Audio Interface coaxial output
Output Digital Audio Interface XLR output
Input/Output I/O for RMCLK, ISCLK,ILRCK, and SDIN
Input/Output I/O for OLRCK, OSCLK, OMCK, and SDOUT
Input/Output 12-pin header for CS8415A control from external µC
Input/Output 12-pin header for CS8405A control from external
µC
Table 1. System Connections
JUMPER
J7
J16
J18
J17
J46
J49
J42
PURPOSE
Selects physical format of digital audio interface input
Enables AES3 INPUT
Enables S/PDIF INPUT
Enables OPTICAL INPUT
Selects physical format of digital audio interface output
Enables S/PDFIF OUTPUT
Choose HARDWARE/SOFTWARE
POSITION
AES3 & S/PDIF
OPTICAL
ENABLE
DISABLE
ENABLE
DISABLE
ENABLE
DISABLE
AES3
S/PDIF
ENABLE
DISABLE
H
S
FUNCTION SELECTED
Specifies input as either AES3 or S/PDIF
Specifies input as OPTICAL
AES3 INPUT enabled
AES3 INPUT disabled
S/PDIF INPUT enabled
S/PDIF INPUT disabled
OPTICAL INPUT enabled
OPTICAL INPUT disabled
Specifies output as AES3 XLR
Specifies output as S/PDIF coaxial
S/PDIF OUTPUT enabled
S/PDIF OUTPUT disabled
Enables hardware mode
Enables software mode
Table 2. CDB8415A Jumper Settings
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CDB8415A
2. CDB8415A.EXE QUICK START
GUIDE
2.1
Setting up the hardware:
1) Check to make sure the flat three wire cable is connected from SDOUT, OLRCK, and
OSCLK of J32 to SDIN, ILRCK, and ISCLK of
J51.
1) Connect the Analog and Digital supplies of
CDB8415A to a 5V DC power supply.
2) Set: J7 to OPT, and J17, OPT to Enable.
3) Set J55 to Receiver
4) Connect the CDB8415A to the PC parallel port using the parallel cable provided.
5) Apply power to the board.
6) Press the RESET switch (S5).
2.2
Installing the software:
1) Create a directory called CDB8415A anywhere on your system.
2) Copy CDB8415A.exe into this directory.
3) If you do not already have them, copy the included DLLs msvcrt.dll and mfc42.dll into your \Windows\System directory.
4) If desired, create a shortcut to CDB8415A.exe
on your desktop.
At this point, you are ready to start up the software.
2.3
Starting up the software:
1) Double-click on CDB8415A.exe or its shortcut.
2) Click on the button on the lower right labeled
Advanced.
3) Select the LPT port you are using to connect to the CDB8415.
4) Shut down the application, reset the board, and then restart the application.
2.4
Starting up the Hardware:
1) Click to enable the clocks for the CS8405A and click to enable the clocks for the CS8415A.
2) Click on the button: CS8415A Controls.
3) On the CS8415A control panel, check the box:
Generate SCLK/LRCK.
4) Check the performance of the board by doing an FFT with a -1dBFS 1kHz sine wave for input at a 48kHz sample rate using the optical input and optical output.
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CDB8415A
3. CDB8415A.EXE USER'S GUIDE
3.1
Main Window
The CDB8415A Control Panel allows you to view the configuration of the CS8415A and the
CS8405A. A limited set of controls are available for each part, including control of the enable clocks function (RUN bit in the Clock Control register) for each part. Clicking the left mouse button on either the CS8405A button or the CS8415A button will bring up a contol panel containing all the register bits relevant to that part.
Clicking on the Advanced button at the lower right brings up the Advanced mode control panel. In Advanced mode you may read and write hex values into specified registers in either part. Changes made on the CS8405A or CS8415A control panels will also be immediately reflected in the Main Window, so you may wish to arrange them so that they do not obscure each other. Of particular use are the windows displaying the serial input formats of the two chips.
6
Figure 1. CDB8415A Main Control Panel
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CDB8415A
Figure 2. CDB8415A Control Panel
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Figure 3. CDB8405A Control Panel
7
8
Figure 4. Advanced Control Panel
CDB8415A
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CDB8415A
1
4
4
1
20
VD
2 1
GND
10
2 1
4
10
1
7
6
8
5
4
3
2
13
9
CDB8415A
10
2 1 2 1
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/RST
/CS1
CDIN
CCLK
CDOUT
6
4
2
8
10
12
5
3
1
9
7
11
INT1
H/S
7
5
3
1
8
6
4
2
OSCLK
RMCK
OLRCK
SDOUT
+
10
+
13
CDB8415A
2 6
11
12
2 6
H/S
/RST
/CS2
CDIN
CCLK
CDOUT
INT2
12
10
8
6
4
2
7
5
9
3
1
11
7
5
3
1
8
6
4
2
ILRCK
SDIN
ISCLK
OMCK
+
CDB8415A
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CDB8415A
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