ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
Fully Integrated GPS Modules
Including Antenna
ORG13XX Series Data Sheet
Document number: 31086
Revision: C00
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
1. Introduction
ORG13XX Series GPS receiver modules with built-in antenna have been designed to address markets
where stand alone operation, high level of integration, power consumption and flexibility are very
important.
The ORG13XX series are OriginGPS smallest, autonomous, fully featured GPS engines, optimized
for stand alone operation.
Featuring OriginGPS Microstrip Patch Antenna and OriginGPS Noise-Free Zone System™ technology the
ORG13XX series offer the ultimate in high sensitivity GPS performance in small size.
The ORG13XX series modules incorporate miniature multi-channel receiver that continuously tracks all
satellites in view and provides accurate positioning data in industry’s standard NMEA-0183 format.
Internal ARM CPU core and sophisticated firmware keep GPS payload off the host and allow integration
in low resources embedded solutions.
The ORG13XX series modules are complete SiP (System-in-Package) featuring advanced miniature
packaging technology and an ultra small footprint designed to commit unique integration features for
high volume, low power and cost sensitive applications.
OriginGPS innovative material engineering approach resulted in Microstrip Patch Antenna with
outstanding narrow band performance.
OriginGPS case study of the specifications of key components through involvement in R&D effort of
major vendors derived in highest performance in industry’s smallest footprint parts available. These
components placement using OriginGPS NFZ™ technology created hard-to-achieve laboratory
performance in heavy-duty environment.
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
2. Description
OriginGPS has revised and enhanced the architecture of classic GPS receivers.
In-house designed Microstrip Patch antennas with highest GPS-band performance and notch filtering for
out-of band signals provides high selectivity. Furthermore, combined with internal shielding and ground
plane the ORG13XX series modules reveal good noise immunity and exceptional sensitivity.
Carefully selected key components including TCXO and LNA resulted in faster TTFF and operation stability
under rapid environmental changes.
2.1. Features
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Fully integrated multi channel GPS engine
Embedded Microstrip Patch antenna
Noise Free Zone SystemTM Technology
SiRFstarIII GSC3LTf chipset
L1 frequency, C/A code
20 channels searching, 12 channels parallel tracking
Acquisition sensitivity: -157dBm
Tracking sensitivity: -159dBm for indoor fixes
Fast TTFF: <35s (typical) under Cold Start conditions
Rapid TTFF by aiding information upload capability
Multipath mitigation
Indoor tracking
SBAS (WAAS, MSAS, EGNOS) support
Multi-Mode Assisted GPS (A-GPS) support1: Autonomous, MS Based, MS Assisted
Extended Ephemeris for very fast TTFFs support through SiRF InstantFix 2
Automatic and user programmable power saving scenarios
Low power consumption: 100mW during acquisition
ARM7 baseband CPU
Selectable UART or SPI hardware interface
Programmable UART protocol and message rate
Selectable NMEA-0183 or SiRF Binary communication standards
Single operating voltage: 3.3V to 5.5V
Small footprint: 17mm x 17mm
Surface Mount Device (SMD)
Optimized for automatic assembly and reflow equipment
Industrial operating temperature range: -400 to 850C
Pb-Free RoHS compliant
Notes:
1. SiRFLoc® Client (SLC) LT A-GPS Multimode Location Engine™ for GSM/3GPP or for CDMA IS-801A required
2. SiRF InstantFix service required
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
2.2. Architecture
Figure 2-1: ORG13XX architecture
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Microstrip Patch Antenna
OriginGPS microstrip patch antenna collects signals at 1575.42 MHz from the medium and blocks
out of GPS L1 band frequencies.

LNA (Low Noise Amplifier)
The LNA amplifies the GPS signal to meet GSC3LTF RF front-end signal chain input threshold.
Noise figure optimized design was implemented to provide maximum sensitivity.

Band-pass SAW Filter
Band-pass SAW filter eliminates inter-modulated out-of-band signals that may corrupt receiver
performance.

TCXO (Temperature Compensated Crystal Oscillator)
This highly stable 16.369 MHz oscillator controls the down conversion process in RF block.
Highest characteristics of this component are key factors in fast TTFF.

UART Buffers
UART interface is 1.8V/2.5V/3.3V compatible. Voltage level is defined externally by host.
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules

GSC3LTf IC
Figure 2-2: GSC3LT functional block diagram
SiRFstarIII GSC3LTf GPS Navigation Engine includes the following features:
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RF Receiver
ARM7TDMI-S core
4 Mbit Program Flash memory
SiRFstarIII-LT GPS DSP core
ARM RAM with cache
DSP RAM
Interrupt Controller
RTC Block
Watchdog Timer
Battery Backed RAM
UART Block
SPI Block
4 Integrated Voltage Regulators
POR (Power-On-Reset) Circuitry
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
2.3. Applications
The ORG13XX series were specially designed to meet wide range of OEM configurations and
applications.
ORG1300
The ORG1300 is low profile GPS Antenna Module.
The ORG1300 is ideal for portable electronics applications with height limitations:
 Handheld consumer navigation and multifunction devices
 Precise timing devices
 Micro robots and micro UAVs
 People and animal tracking systems
ORG1315
The ORG1315 is standard version of the ORG13XX series GPS antenna modules.
The ORG1315 is ideal for standard positioning and navigation applications including indoor
tracking:
 People and animal tracking systems
 Sports and recreation accessories
 Vehicle tracking and fleet management systems
 Automotive navigation systems
 Rescue and emergency systems
 Marine navigation systems
ORG1318
The ORG1318 is enhanced sensitivity version of the ORG1300 GPS Antenna Module.
The ORG1318 is ideal for applications where module installation position and orientation limits
satellite visibility:
 Automotive security systems
 Asset tracking SKU systems
 Telemetric systems
 Industrial navigation systems
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
3. Electrical Specifications
3.1. Absolute Maximum Ratings
Absolute Maximum Ratings are stress ratings only.
Stresses exceeding Absolute Maximum Ratings may damage the device.
Parameter
Symbol
Min
Max
Units
Power Supply Voltage
VCC
0
5.5
V
UART Input Voltage
VRX
-0.5
7
V
UART Output Source/Sink Current
ITX
-10
+10
mA
SPI/GPIO Input Voltage
VIO_IN
0
1.98
V
SPI/GPIO Output Source/Sink Current
IIO_OUT
-2
+2
mA
ON_OFF Input Voltage
VON_OFF
3.78
V
RESET Input Voltage
VRESET
1.26
V
1.8V Source Output Current
IIO_1V8
6
mA
Storage Temperature
TST
Lead Temperature (10 sec. @ 1mm from case)
TLEAD
-55
+125
0
C
+260
0
C
Table 3-1: Absolute maximum ratings
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
3.2. Recommended Operating Conditions
Functional operation above the Recommended Operating Conditions is not implied.
Extended exposure to stresses above the Recommended Operating Conditions may affect device
reliability.
Parameter
Power supply voltage
Symbol
Mode / Pad
VCC
Acquisition
Power Supply Current
1.8 Output Voltage
Input Voltage Low State
ICC
VIO_1V8
VIL
Input Voltage High State
VIH
Output Voltage Low State
VOL
Output Voltage High State
Input Capacitance
Operating Temperature1
Relative Humidity
Test Conditions
VOH
CIN
Tracking
Hibernate
VIO-1V8
UART
SPI / GPIO
ON_OFF
UART
SPI / GPIO
ON_OFF
UART
SPI / GPIO
UART
SPI / GPIO
UART
SPI / GPIO
Min
Typ
Max
Units
3.25
3.3
30
5.5
35
V
mA
23
25
1.98
0.5
0.45
0.6
mA
µA
V
V
V
V
V
V
V
V
V
V
V
V
pF
pF
VCC = 3.3V
9
TAMB = 250C
1.62
1.4
1.35
2.7
IOL = 8mA
IOL = 1mA
IOH = -50µA
IOH = -4mA
IOH = -1mA
0.36
0.2
VIO – 0.1
VIO – 0.5
1.6
TAMB
RH
24
1.8
-40
Oper. Temp.
4
1.3
10
+25
+85
5
95
0
C
%
Table 3-2: Operating conditions
Note:
1. Operation below -200C to -400C and above +700C to +850C is accepted, but TTFF may increase
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
4. Performance
4.1. Acquisition times
TTFF (Time To First Fix) – is the period of time from GPS power-up till position estimation.
Hot Start
A hot start results from software reset after a period of continuous navigation or a return from a
short idle period that was preceded by a period of continuous navigation.
In this state, all of the critical data (position, velocity, time, and satellite ephemeris) is valid
to the specified accuracy and available in SRAM.
Warm Start
A warm start typically results from user-supplied position and time initialization data or
continuous RTC operation with an accurate last known position available in memory. In this
state, position and time data are present and valid, but ephemeris data validity has expired.
Cold Start
A cold start acquisition results when either position or time data is unknown.
Almanac information is used to identify previously healthy satellites.
Aided Start
Aiding is a method of effectively reducing the TTFF by making every start Hot or Warm.
TTFF
< 1s
< 32s
< 35s
< 1s
Hot Start
Warm Start
Cold Start
Signal Reacquisition
Signal Level
-130 dBm (Outdoor)
-130 dBm (Outdoor)
-130 dBm (Outdoor)
-130 dBm (Outdoor)
Table 4-1: Acquisition times
4.2. Sensitivity
Signal Level
Acquisition
-157 dBm (Deep Indoor)
Tracking
-159 dBm (Deep Indoor)
Cold Start
-142 dBm
Table 4-2: Sensitivity
4.3. Received Signal Strength
Average C/N0
1
ORG1300
40 dB-Hz
ORG1315
45 dB-Hz
ORG1318
48 dB-Hz
Table 4-3: Received signal strength
Note:
1. Averaging of 5 SV’s with highest C/N0 @ -130dBm, HDOP <1.5
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
4.4. Power Consumption
Operation Mode
Acquisition
Power
Consumption
100mW
Tracking
30-75mW
Hibernate
80µW
Table 4-4: Power consumption
4.5. Accuracy
Method
Accuracy
Units
< 2.5
m
-130 dBm (Outdoor), Static
<2
m
-130 dBm (Outdoor), SBAS, Static
<5
m
-130 dBm (Outdoor), Static
<4
m
-130 dBm (Outdoor), SBAS, Static
<4
m
-130 dBm (Outdoor), Static
<3
m
-130 dBm (Outdoor), SBAS, Static
<7.5
m
-130 dBm (Outdoor), Static
<6
m
-130 dBm (Outdoor), SBAS, Static
50%
< 0.01
m/s
-130 dBm (Outdoor), 30 m/s
Heading
50%
< 0.01
0
-130 dBm (Outdoor), 30 m/s
Time
1 PPS
<1
µs
CEP (50%)
Horizontal
2dRMS (95%)
Position
VEP (50%)
Vertical
2dRMS (95%)
Velocity
Horizontal
Test Conditions
-130 dBm (Outdoor)
Table 4-5: Accuracy
4.6. Dynamic Constrains1
Velocity
< 515m/s
Acceleration
Altitude
< 4g
< 18,000m
Table 4-6: Dynamic constrains
Note:
1. Standard dynamic constrains according to regulatory limitations
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
5. Power Management
The ORG13XX series modules have three main operating modes which are controlled by internal statemachine.
These modes provide different levels of power and performance.
5.1. Normal Mode
In Normal Mode the ORG13XX series are fully powered and will automatically acquire and track
GPS satellites.
5.2. Power Saving Modes
Adaptive Trickle Power™
Adaptive Trickle Power (ATP) is best suited for applications that require navigation solutions at a
fixed rate as well as low power consumption and an ability to track weak signals.
In ATP mode the ORG13XX series module is intelligently cycled between three states to optimize
low power operation:
Full Power State
This is the initial state of the ORG13XX series module.
The module stays in full power until a position solution is made and estimated to be reliable.
During the acquisition mode, processing is more intense, thus consuming more power.
CPU Only State
This is the state when the RF and DSP sections are partially powered off.
The state is entered when the satellites measurements have been acquired but the
navigation solution still needs to be computed.
Standby State
This is the state when the RF and DSP sections are completely powered off and baseband clock is
stopped.
Figure 5-1: ATP timing
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
Push-to-Fix™
Push-to-Fix (PTF) is best suited for applications that require infrequent navigation solutions,
optimizing battery life time.
In PTF mode the ORG13XX series module is mostly in Hibernate Mode, waked up for Ephemeris
and Almanac refresh in fixed periods of time. The PTF period is 30 minutes by default but can be
anywhere between 10 seconds and 2 hours. When the PTF mode is enabled the receiver well stay
on full power until the good navigation solution is computed.
Figure 5-2: PTF timing
Hibernate State
In this state the RF, DSP and baseband sections are completely powered off leaving only the RTC
and Battery-backed RAM running. When the application needs a position report it can toggle the
ON_OFF pad to wake up the module. In this case, a new PTF cycle with default settings begins.
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
6. Interface
6.1. Pad Assignment
Pad Number Pad Name
1
RX
2
TX
3
VIO-EXT
4
SCK
5
nSE
6
SDO
7
GPIO[1]
8
VCC
9
VIO-1V8
10
GND
11
GND
12
GND
13
GND
14
GND
15
TSYNC
16
nRESET
17
ON_OFF
18
GPIO[2]
19
ECLK
20
COMM_SEL
21
1PPS
22
SDI
Pad Description
UART Receive
UART Transmit
UART buffers power
SPI Clock
SPI Chip Select
SPI Data Out
Valid Fix Indicator
System Power
1.8V Voltage Output
System Ground
System Ground
System Ground
System Ground
System Ground
Time Aiding
Asynchronous Reset
Soft Power On/Hibernate
Valid Fix Indicator
External Clock Input
UART/SPI Select
1 Pulse Per Second
SPI Data In
Direction
Input
Output
Power
Input
Input
Output
Output
Power
Power
Power
Power
Power
Power
Power
Input
Input
Input
Output
Input
Input
Output
Input
Default
High
Low
Notes
1.8V/2.5V/3.3V compatible
1.8V/2.5V/3.3V compatible
Connect to VCC if powered 3.3V
Low
High
1.8V compatible
1.8V compatible
1.8V compatible
High
1.8V compatible
Connect to VIO-EXT for 1.8V UART
SiRFLoc® Client (SLC) firmware required
High
Low
Low
3.3V compatible
1.8V compatible
SiRFLoc® Client (SLC) firmware required
High
Low
Low
1.8V compatible
1.8V compatible
Table 6-1: ORG13XX series pin-out
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
6.2. Connectivity
Power supply
The ORG13XX series module requires only one power supply VCC, which can be supplied directly
from a battery since the module has internal regulators.
It is recommended to keep the power supply on all the time in order to maintain the non-volatile
RTC and RAM active for fastest possible TTFF. When the VCC is powered off settings are reset to
factory default and the receiver performs Cold Start on next power up.
Power supply current varies according to the processor load and satellite acquisition.
VCC range is 3.3 to 5.5V DC.
Typical ICC current is 30mA during acquisition. Peak ICC current is 50 mA.
Typical ICC current in Hibernate state is 25µA.
Voltage ripple below 300mVPP allowed for frequency under 10KHz.
Voltage ripple below 30mVPP allowed for frequency between 10KHz and 100KHz.
Voltage ripple below 10mVPP allowed for frequency between 100KHz and 1MHz.
Voltage ripple below 3mVPP allowed for frequency above 1MHz.
High voltage ripple may compromise the ORG13XX series module performance.
In case of powering the ORG13XX from switching mode (DC-DC) power source carefully follow
manufacturer’s application note and apply passive low pass filtering.
Ground
One Ground pad should be connected to the main Ground with shortest possible trace or via.
ON OFF Control Input
The ON_OFF control input can be used to switch the receiver between Normal or Hibernate
modes and also to generate interrupt in Push-to-Fix operation.
The ON_OFF interrupt is generated by a low-high-low toggle, which should be longer than 62µs
and less than 1s (100ms pulse length recommended).
ON_OFF interrupts with less than 1 sec intervals are not recommended. Multiple switch bounce
pulses are recommended to be filtered out.
Input level is 3.3V compatible.
Figure 6-1: ON_OFF timing
nRESET Input
The Power-on-Reset (POR) is generated internally in the ORG13XX series module.
Additionally, manual reset option is available through nRESET pad.
Resetting the ORG13XX clears the RTC block and configuration settings become default.
nRESET pad is active low and has internal pull-up resistor.
nRESET signal should be applied for at least 1µs.
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
COMM_SEL
The ORG13XX is able to communicate via UART or SPI interface.
UART is default communication interface.
To select SPI communication 0Ω resistor to system Ground should be applied on this pad.
Do not connect if SPI communication is not used.
UART
The device supports full duplex 8-N-1 UART communication without flow control.
The default protocol is NMEA.
The default configuration for baud rates and respective protocols can be changed by commands
via NMEA or SiRF binary protocols.
I/O levels in the serial port are LVCMOS 1.8V/2.5V/3.3V compatible.
I/O levels are defined by applying appropriate voltage to VIO-EXT pad.
Do not connect if UART communication is not used.
SPI
The Host Interface SPI is a slave mode SPI that can be used as an alternative to the UART
interface. The four primary pads are SDI, SDO, nSE, SCK.
I/O levels are 1.8V compatible.
Do not connect if SPI communication is not used.
SCK clock frequency must not be higher than 48fo/7 (= 7 MHz approximately).
The primary Host Interface SPI features are:
 TX and RX each have independent 1024 byte FIFO buffers.
 RX and TX have independent, software specified two byte idle patterns.
 TX FIFO is disabled when empty and transmits its idle pattern until re-enabled.
 RX FIFO detects a software specified number of idle pattern repeats and then disables FIFO
input until the idle pattern is broken.
 FIFO buffers can generate an interrupt at any fill level.
 SPI detects synchronization errors and can be reset by software.
The HSPI performs bit-by-bit transmitting and receiving at the same time whenever nSE is
asserted and SCK is active.
Receive operations do not require an enable.
When the system is first turned on, the master in the host system is able to send a message
before software has set up the receiver's idle pattern filter. At the system level, protocols are
established to specify how the host platform must verify that the GPS system and host SPI are
prepared for operation.
In general, the GSC3LTF loads a ‘power on’ message to the TX_FIFO to inform the host that
operations can begin. The protocol specifies the delay and repeats intervals for host query of the
slave SPI for this message. This limits the receive byte volume until idle pattern filters are
established.
On the receive side, the host is expected to transmit idle pattern when it is querying the transmit
buffer, unless it has traffic for the GSC3LTf. In this way, the volume is discarded, bytes are kept
nearly as low as in the UART application because the hardware does not place most idle pattern
bytes in the RX FIFO. Most messaging can be serviced with polling.
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
The FIFO threshold can be placed to detect large messages requiring interrupt driven servicing.
On the transmit side, the intent is to fill the FIFO only when it is disabled and empty. In this
condition, the driver software loads as many queued up messages as can fit in the FIFO. Then the
FIFO is enabled. The host is required to poll messages until idle pattern bytes are detected. At this
point the FIFO is empty and disabled, allowing the driver to once again respond to an empty FIFO
interrupt and load the FIFO with messages, if any are queued up in buffers.
Figure 6-2: SPI timing
ECLK Input
The ECLK is available optionally for external clock input with SiRFLoc® Client (SLC) firmware used
for A-GPS frequency aiding.
Input level is CMOS 1.8V compatible.
Pull low with 10kΩ when not used.
Do not connect when using standard firmware.
TSYNC Input
Optional input TSYNC input is intended for external time aiding with SiRFLoc® Client (SLC)
firmware used for A-GPS.
Input level is CMOS 1.8V compatible.
Pull low with 10kΩ when not used.
Do not connect when using standard firmware.
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
1PPS Output
The pulse-per-second (PPS) output provides a pulse signal for timing purposes.
Pulse length (high state) is about 1µs synchronized to full UTC second.
Output level is CMOS 1.8V compatible.
Figure 6-3: 1PPS
GPIO1 Output
GPIO1 is available as a Valid Fix indicator. Prior navigation the output stays at high state.
During valid fix the output sends 100ms high state pulses at 1Hz rate.
The output level is CMOS 1.8V compatible.
GPIO2 Output
GPIO2 is available as a Valid Fix indicator. Prior navigation the output stays at low state.
During valid fix the output sends 100ms high state pulses at 1Hz rate.
The output level is CMOS 1.8V compatible.
Figure 6-4: GPIO2 output period
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Figure 6-5: GPIO2 output
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
6.3. Typical Application Circuit
UART Interface
3V3
R1
1PPS_GPS
33R
9
3
VIO_1V8
19
15
VIO_EXT
nRESET
ON_OFF
C1
8
18pF
VCC
1PPS
ECLK
TSY NC
GPIO1
GPIO2
(Option)
nRESET
16
ON_OFF
17
RESET
U1
COMM_SEL
ON_OFF
SE
SCK
SDO
SDI
(Option)
R3
TX_GPS
33R
C3
TX_D
RX_D
2
1
TX
RX
21
1PPS
7
18
GPIO2
R2
GPIO2_GPS
33R
(Option)
20
C2
5
4
6
22
18pF
GND1 GND2 GND3 GND4 GND5
18pF
10
RX_GPS
(Option)
11
12
13
14
R4
33R
C4
18pF
Figure 6-6: UART interface circuit
SPI Interface
1V8
3V3
R1
33R
1PPS_GPS
(Option)
C1
18pF
9
3
VIO_1V8
19
15
VIO_EXT
8
VCC
1PPS
ECLK
TSY NC
GPIO1
GPIO2
(Option)
nRESET
ON_OFF
nRESET
16
ON_OFF
17
RESET
U1
COMM_SEL
ON_OFF
SE
SCK
SDO
SDI
(Option)
2
1
TX
RX
21
1PPS
R2
33R
7
18
20
5
4
6
22
GPIO2
GPIO2_GPS
18pF
R0
0R
R3
33R
33R
GND1 GND2 GND3 GND4 GND5
10
11
12
13
(Option)
C2
14
33R
R4
R5
R6
33R
SPI_CS
SPI_CLK
SPI_DO
SPI_DI
Figure 6-7: SPI interface circuit
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
7. PCB Layout
7.1. Footprint
TOP VIEW
629mil
50mil
12
11
Ø12 mil
490mil
33mil
669mil
1
22
33mil
41mil
669mil
Figure 7-1: Footprint
Ground pad at the middle should be connected to main Ground plane by multiple vias.
Ground pad at the middle should be solder masked.
Silk print of module’s outline is highly recommended.
7.2. Design restrictions
Avoid current loops by connecting single Ground pad to main Ground.
Route the selected Ground pad to main Ground with shortest possible trace or via.
Avoid copper pour on the module side, keeping out the module minimum 6mm from the copper
planes, metals planes or enclosures, connectors or LCD screens (Fig. 7-2).
Keep out of minimum 1.6mm from the copper planes under the ORG13XX GPS module (Fig. 7-3).
Keep out of signal or switching power traces and vias under the ORG13XX GPS module.
Signal traces to/from ORG13XX GPS module should have minimum length.
In case of adjacent high speed components, like CPU or memory, high frequency components, like
transmitters, clock resonators or oscillators, metal planes, like LCD or battery enclosures, please
contact OriginGPS for more precise, application specific recommendations.
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
7.3. Placement
Special attention should be paid during GPS module placement and position on host PCB.
ORG-13XX
12
1
11
6mm
22
Copper keep-out area
6mm
Figure 7-2: Placement
For board specific module position, follow the link: http://origingps.com/images/copper.xls
or contact OriginGPS.
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
7.4. PCB stack up
min. 6mm
min. 6mm
CS
Ground
Signals
Signals
min. 1.6mm
Copper Keep Out
L2
Ground
.
.
.
LN
Signals or Power
PS
X
Ground
Signals or Power
Ground
Figure 7-3: Typical PCB stack up
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
8. Software Functions
The ORG13XX series modules support NMEA-0183 and SiRF Binary protocols.
8.1. NMEA
NMEA Output Messages
Message
GGA
1
GLL
GSA
GSV
RMC
1
VTG
Description
Time, position and fix type data
Latitude, longitude, UTC time of position fix and status
GPS receiver operating mode, satellites used in the position solution and DOP values
The number of GPS satellites in view, satellite ID, elevation, azimuth and SNR values
Time, date, position, course and speed data
Course and speed information relative to the ground
Table 8-1: NMEA protocol output messages
NMEA Input Messages
Message ID
100
101
103
104
105
106
Message
Set Serial Port
Navigation Initialization
Query/Rate Control
LLA Navigation Initialization
Development Data On/Off
Select Datum
Description
Set UART parameters and protocol
Parameters required for start using X/Y/Z
Query standard NMEA message and/or set output rate
Parameters required for start using Lat/Lon/Alt
Development Data messages On/Off
Selection of an alternative map datum
Table 8-2: NMEA protocol input messages
1. Not available in standard firmware build
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
8.2. SiRF Binary
SiRF Binary Output Messages
HEX
0 x 02
0 x 03
0 x 04
0 x 06
0 x 07
0 x 08
0 x 09
0 x 0A
0 x 0B
0 x 0C
0 x 0D
0 x 0E
0 x 0F
0 x 10
0 x 12
0 x 13
0 x 14
0 x 1C
0 x 1E
0 x 1F
0 x FF
Message ID
2
3
4
6
7
8
9
10
11
12
13
14
15
16
18
19
20
28
30
31
255
Name
Measured Navigation Data
True Tracker Data
Measured Tracking Data
SW Version
Clock Status
50 BPS Subframe Data
Throughput
Error ID
Command Acknowledgement
Command No Acknowledgement
Visible List
Almanac Data
Ephemeris Data
Test Mode 1
Ok To Send
Navigation Parameters
Test Mode 2
Nav. Lib. Measurement Data
Nav. Lib. SV State Data
Nav. Lib. Initialization Data
Development Data
Description
Position, velocity and time
Not implemented
Satellite and C/No information
Receiver software
Current clock status
Standard ICD format
Navigation complete data
Error coding for message failure
Successful request
Unsuccessful request
Auto Output
Response to Poll
Response to Poll
For use with SiRFtest (Test Mode 1)
CPU ON/OFF (Trickle Power)
Response to Poll
Additional test data (Test Mode 2)
Measurement Data
Satellite State Data
Initialization Data
Various status messages
Table 8-3: SiRF Binary protocol output messages
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
SiRF Binary Input Messages
HEX
0 x 55
0 x 80
0 x 81
0 x 82
0 x 84
0 x 86
0 x 87
0 x 88
0 x 89
0 x 8B
0 x 8C
0 x 8D
0 x 8E
0 x 8F
0 x 90
0 x 92
0 x 93
0 x 94
0 x 95
0 x 96
0 x 97
0 x 98
0 x A5
0 x A6
0 x A7
Message ID
85
128
129
130
132
134
135
136
137
139
140
141
142
143
144
146
147
148
149
150
151
152
165
166
167
Name
Transmit Serial Message
Initialize Data Source
Switch to NMEA Protocol
Set Almanac (upload)
Software Version (Poll)
Set Main Serial Port
Switch Protocol
Mode Control
DOP Mask
Elevation Mask
Power Mask
Editing Residual
Steady-State Detection
Static Navigation
Poll Clock Status
Poll Almanac
Poll Ephemeris
Flash Update
Set Ephemeris (upload)
Switch Operating Mode
Set Trickle Power Parameters
Poll Navigation Parameters
Set UART Configuration
Set Message Rate
Low Power Acquisition Parameters
Description
User definable message
Receiver initialization and associated parameters
Enable NMEA message, output rate and baud rate
Sends an existing almanac file to the receiver
Polls for the loaded software version
Baud rate, data bits, stop bits and parity
Obsolete
Navigation mode configuration
Control DOP mask selection and parameters
Elevation tracking and navigation masks
Power tracking and navigation masks
Not implemented
Configuration for static operation
For use with SiRFtest (Test Mode 1)
Polls the clock status
Polls for almanac data
Polls for ephemeris data
On the fly software update
Sends an existing ephemeris to the receiver
Test mode selection, SV ID and period
Push to fix mode, duty cycle and on time
Polls for the current navigation parameters
Protocol selection, baud rate, data, stop and parity bits
SiRF binary message output rate
Low power configuration parameters
Table 8-4: SiRF Binary protocol input messages
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
9. Handling Information
9.1. Product Packaging and Delivery
Plastic Reel
TOP VIEW
Feed direction
Position of Pin1
ORG1300/1315
Position of Pin1
ORG1318
Figure 9-1: Carrier
A0
B0
K0
F
P1
S0
W
ORG1300/1315
18.00 ± 0.1
18.00 ± 0.1
05.70 ± 0.1
14.20 ± 0.1
24.00 ± 0.1
28.40 ± 0.1
32.00 ± 0.3
ORG1318
20.50 ± 0.1
20.50 ± 0.1
05.30 ± 0.1
14.20 ± 0.1
24.00 ± 0.1
28.40 ± 0.1
32.00 ± 0.3
Table 9-1: Carrier dimensions [mm]
Carrier material: Conductive Polystyrene
Feed direction
Figure 9-2: Module position
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
Figure 8-3: Reel
ØA
ØN
W1
W2
330.00 ± 0.85
60.00 ± 0.5
33.00 ± 0.5
39.00 ± 0.5
Table 9-2: Reel dimensions [mm]
Reel material: Antistatic Plastic
Each reel contains 200 or 500 modules.
Tube1
5.13
18.42
Figure 9-4: Tube
Tube length: 515mm
Tube material: Antistatic Plastic
Each tube contains up to 27 modules.
1. Not available for ORG1318
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
9.2. Moisture Sensitivity
The devices are moisture sensitive at MSL 3 according to standard IPC/JEDEC J-STD-033B.
The recommended drying process for samples and bulk components is to be done at 125°C for 48
hours.
9.3. Assembly
The ORG13XX series module support automatic assembly and reflow soldering processes on the
component side of the motherboard PCB according to standard IPC/JEDEC J-STD-020D for LGA
SMD. Suggested solder paste stencil is 5 mil to ensure sufficient solder volume.
Figure 9-5: Recommended soldering profile
Suggested peak reflow temperature is 250°C for 10 sec. for Pb-Free solder paste.
Absolute Maximum reflow temperature is 260°C for 10 sec.
9.4. Rework
If localized heating is required to rework or repair the ORG13XX series module, precautionary
methods are required to avoid exposure to solder reflow temperatures that can result in
permanent damage to the device.
9.5. ESD Sensitivity
The ORG13XX series modules are ESD sensitive devices and should be handled with care.
9.6. Compliances
The ORG13XX series modules comply with the following standards:
 Pb-Free/RoHS (Directive 2002/95/EC on the restriction of the use of certain hazardous
substances in electrical and electronic equipment)
 ISO 9001:2000 accredited manufacturing facility
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
9.7. Safety Information
Improper handling and use can cause permanent damage to the device.
There is also the possible risk of personal injury from mechanical trauma or shocking hazard.
9.8. Disposal Information
The product should not be treated as household waste.
For more detailed information about recycling electronic components, please contact your local
waste management authority.
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
10. Mechanical Specifications





The ORG13XX series modules have advanced miniature packaging and a LGA footprint.
The ORG13XX series modules PCB footprint size is 17mm x 17mm
The ORG13XX series modules are surface mount devices packaged on a miniature printed circuit
board with a metallic RF enclosure on one side and Microstrip Patch Antenna on top of the shield.
There are 22 surface mount connection pads with a base metal of copper and an Electroless
Nickel / Immersion Gold (ENIG) finish.
The ORG13XX series modules have been designed for automated pick and place assembly and
reflow soldering processes.
10.1. ORG1300
TOP VIEW
SIDE VIEW
BOTTOM VIEW
17 ± 0.2
3.2 ± 0.1
11
12
1
22
17 ± 0.2
13 ± 0.2
13 ± 0.2
Pin 1
All dimensions are in millimeters
Figure 10-1: ORG1300 mechanical drawing
Weight
Dimensions
Length
Width
Height
mm
17 ± 0.2
17 ± 0.2
3.2 ± 0.1
gr
2.2
inch
0.67 ± 0.008
0.67 ± 0.008
0.125 ± 0.004
oz
0.1
Table 10-1: ORG1300 mechanical information
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
10.2. ORG1315
TOP VIEW
SIDE VIEW
BOTTOM VIEW
15 ± 0.2
4.3 ± 0.2
11
12
1
22
17 ± 0.2
15 ± 0.2
0.5 max.
0.4 ± 0.1
7.1 ± 0.2
17 ± 0.2
Ø4.2 ± 0.2
Pin 1
All dimensions are in millimeters
Figure 10-2: ORG1315 mechanical drawing
Weight
Dimensions
Length
Width
Height
mm
17 ± 0.2
17 ± 0.2
4.8 ± 0.2
gr
3.5
inch
0.67 ± 0.008
0.67 ± 0.008
0.189 ± 0.008
oz
0.12
Table 10-2: ORG1315 mechanical information
10.3. ORG1318
TOP VIEW
SIDE VIEW
BOTTOM VIEW
8.3 ± 0.2
4.3 ± 0.2
12
1
22
1 ± 0.2
11
17 ± 0.2
0.5 max.
18.4 ± 0.2
8.2 ± 0.2
17 ± 0.2
Pin 1
Ø4 ± 0.2
18.4 ± 0.2
Pin 1
1.3 ± 0.2
All dimensions are in millimeters
Figure 10-3: ORG1318 mechanical drawing
Weight
Dimensions
Length
Width
Height
mm
18.4 ± 0.2
18.4 ± 0.2
4.8 ± 0.2
gr
4.75
inch
0.72 ± 0.008
0.72 ± 0.004
0.189 ± 0.008
oz
0.17
Table 10-3: ORG1318 mechanical information
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- 30 -
ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
11. Ordering Information
ORG – 1300 - R01 – TR
13XX XXX XX
TR = Tape & Reel
Delivery option {
UAR = Demo Board
Firmware configuration (Table 12-2)
Antenna options (Table 12-1)
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
12. Design-In Checklist
Following the Design-In Checklist when developing applications with the ORG13XX series GPS
antenna modules is highly recommended to reduce design risks.
12.1. Module selection
ORG13XX series modules have been intentionally designed to allow GPS functionality to be
optimally tailored to application specific environment.
Changing between the different modules is easy, due to the same footprint and pin-out.
Does the application demand for ultra low profile GPS antenna module?
Is the GPS module placed in line of sight with GPS satellites?
 Select ORG1300 for ultra-low profile solution.
Does the application demand for standard positioning and navigation, including indoor tracking?
 Select ORG1315 for high-sensitivity solution.
Does the application demand for module installation position with limited GPS satellite visibility?
 Select ORG1318 for ultra-sensitivity solution.
Ordering code
Average C/N01
PCB outline2
Dimensions (typ.)
Length
Width
Thickness
ORG1300
ORG1300-xxx
40 dB-Hz
17mm x 17mm
17 mm
17 mm
3.2 mm
ORG1315
ORG1315-xxx
45 dB-Hz
17mm x 17mm
17 mm
17 mm
4.8 mm
ORG1318
ORG1318-xxx
48 dB-Hz
17mm x 17mm
18.4 mm
18.4 mm
4.8 mm
Table 12- 1: Antenna options
2. Averaging of 5 SV’s with highest C/N0 @ -130dBm, HDOP <1.5
3. Footprint and pinout are the same.
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
12.2. Firmware selection
ORG13XX series modules are delivered with factory loaded firmware.
Firmware selection is done according to application demands for GPS function.
Does the application demand for primary GPS function?
 Select R01 option for fully operated GPS module upon power on.
 Note for NMEA@UART baud rate of 4,800 bps.
Does the application demand for minimum connectivity to GPS module?
 Select R01 option for data output via GPS TX (pad 2) and power via VCC (pad 8) and GND (pad
11).
 Connect VIO_EXT (pad 3) to VCC (pad 8) for single supply.
 Note for NMEA@UART baud rate of 4,800 bps.
Does the application demand for infrequent GPS functionality?
 Select R02 option for hibernated GPS module upon power on.
 Connect ON_OFF (pad 17) to host output for power state control.
 Note for NMEA@UART baud rate of 57,600 bps.
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- 33 -
ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
The table below indicates ORG13xx series modules firmware configuration options.
Configuration 1 and 2 are standard ordering options.
Configuration 3 is user defined application specific firmware version.
Ordering code
Power On State
UART data format
UART settings
SPI data format
I/O Functions
Direction
ON OFF
Next Toggle
Direction
1 PPS
No Nav
Nav
Direction
GPIO1
No Nav
Nav
Direction
GPIO2
No Nav
Nav
Direction
COMM_SEL
UART
SPI
Extended Features
SBAS
Static Filter
Navigation
Track
Smoothing
Internal DR
Configuration 1
ORG13xx-R01
Full Power
NMEA
4,800 bps 8-N-1
NMEA
Configuration 2
ORG13xx-R02
Hibernate
NMEA
57,600 bps 8-N-1
NMEA
Configuration 3
ORG13xx-Fxx
Full Power
NMEA
9,600 bps 8-N-1
N/A
Input
Hibernate
Output
OFF
1µs ON @ 1Hz
Output
ON
100ms ON @ 1Hz
Output
OFF
100ms ON @ 1Hz
Input
No Connect
GND
Input
Full Power
Output
OFF
1µs ON @ 1Hz
Output
ON
100ms ON @ 1Hz
Output
OFF
100ms ON @ 1Hz
Input
No Connect
GND
OFF
OFF
OFF
ON
ON
OFF
Application specific
Application specific
OFF
ON
Application specific
N/A
Output
OFF
1µs ON @ 1Hz
Application specific
Application specific
N/A
Application specific
Table 12-2: Firmware configuration
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
12.3. Schematics verification
Check Power Supply Requirements
Is the main power supply voltage (VCC) within the specified range?
 Verify 3.3V to 5.5V. Raw battery voltage source is accepted.
 The module will shut down when voltage trip below 3.25V.
 nRESET pad will be internally held in low state.
Single supply operation required?
 Connect VIO_EXT to VCC.
Is the UART buffers power supply voltage (VIO_EXT) within the specified range?
 Verify VIO_EXT from 1.8V to VCC.
Is the power source ripple not exceeding maximum allowed?
 Voltage ripple below 300mVp-p allowed for frequency under 10KHz.
 Voltage ripple below 30mVp-p allowed for frequency between 10KHz and 100KHz.
 Voltage ripple below 10mVp-p allowed for frequency between 100KHz and 1MHz.
 Voltage ripple below 3mVp-p allowed for frequency above 1MHz.
Does the power source capable to handle current consumption requirements?
 Maximum current consumption during acquisition is 35mA.
 Inrush current during module power up may exceed 120mA.
Is only single GND pad connected to the main Ground?
Check Communication Interface
Is the UART interface used?
 Leave COMM_SEL (pad 20) floating.
 Connect series ceramic resistor of 22-49Ω and shunt ceramic capacitor of 12-22pF to form
low pass filter on GPS TX (pad 2) and GPS RX (pad 1) lines.
Is the UART output high logic level voltage VCC tolerant?
 Connect VIO_EXT (pad 3) to VCC (pad 8).
 UART voltage level is externally defined by VIO_EXT pad.
Is the SPI interface used?
 Connect COMM_SEL (pad 20) to GND.
 SPI is LVCMOS 1.8V compatible.
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
Check GPIO
Is the Hot or Warm starts needed?
 Connect host output to ON OFF input (pad 3).
 Main VCC is permanently applied. GPS module is hibernated by ON OFF toggle.
 ON OFF input is CMOS 3.3V compatible.
Is Valid Fix indicator required?
 Connect GPIO1 (pad 7) or GPIO2 (pad 18) to host input.
 GPIO1 and GPIO2 are 1.8V compatible.
 In Normal operating mode, prior to fix, in the GPIO1 is held in high state. In Hibernate
mode the GPIO1 logic level is low. GPIO1 output may be used as mode indicator for host.




Don’t drive nRESET input high.
Don’t connect Pull-up to ON_OFF input.
Don’t Pull-up or Pull-down on any of the inputs or outputs if not in use.
1PPS, ECLK, TSYNC are LVCMOS 1.8V compatible.
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ORG13XX Series Datasheet
Fully Integrated GPS Antenna Modules
12.4. Layout verification
Is the GPS antenna module placed according to the recommendations?
 Follow the link for module’s pin 1 position: http://origingps.com/images/copper.xls
Has the copper keep-out on module’s layer been followed?
 Keep out the module minimum 6mm from the metals planes.
 Reduce copper planes on module’s side as much as possible.
 For more information refer to Fig. 7-2
Has the copper planes keep-out under the module been followed?
 Keep out of minimum 1.6mm from the copper planes under the module.
 For more information refer to Fig. 7-3
Is ground paddle under the module connected to main ground plane by multiple vias?
Is ground paddle under the module solder masked?
 Ground paddle under the module is important for EMI immunity of the GPS receiver.
 For more information refer to Fig. 7-1
Does the silk print of module’s footprint outline appear on host PCB?
 Silk print of the module’s footprint outline in important for automatic pick and place
assembly process and inspection.
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