...•..

~ ~

...

REFERENCE MANUAL

SHUGART 706/712

HARD DISK

.I

Silicon Valley Computer

.'. ( 4 0 8 ) 2 8 8 - 8 8 3 7

-

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TABLE OF CONTENTS

Page

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:

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.

.

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••

•

••

•

·

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t

,

TABLE OF CO~S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

UST OF AGURES

UST OF TABLES

ABBREVlAllONS/MNEMONlCS

NOTICE TO USERS

.

ill vi vii viii viii

PRODUCTION DESCRIPTION

SECTION I

~ODUCT10N

1.1

1:1

I-I

1.2

General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.3

Specifications

. . . . . . . . . . . . . ..

1·1

Summmy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . ..

1-2

1.4

Purpose..........................................................

1.3.1

1.3.2

Perfonnanc~ Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

. . . . . . . ..

1-2

1-2

1-2

1.3.3

Functional Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Physical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

. . . . . . . . . ..

1-3

1.3.4

Reliabtlrty Specifications

Functional Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.4.1

General Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . ..

1·3

. . . . . . . . . . . ..

1·3

1.4.2

Read/Write and Control Electronics

1.4.3

Drive Mechanism. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . ..

1-4

1-4

. . . . . . . . . . . . . . ..

1-4

'. . . . . ..

1-4

1.4.4

Positioning Mechanism. . . . . . . . . . . . . . . . . . . . . . . . . .

1.4.5

R~d/Write'Heads and Disk(s)

'

1.4.6

A1r Altration System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . ..

1-4

. . . . . . . . . . . ..

1-6

1.5

1.4.7

Spindle Lock and Brake. . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.4.8

R~d/Write Head Shipping

Zone. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

Functional Operations

. . . . . . . . . . . . . . . . . . . . . . . . ..

1-6

1-6

1.5.1

Power

1.5.3 Track

Sequendng

1.5.2

Drive Selection

Accessing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . ..

1-6

1-6

1-7

. . . . . . . . . . . ..

1-8

1.5.4

Read Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.5.5 Write Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . ..

1-8

1·8

1.5.6

Head Selection

SECTION n

ElECI'R.lCAL OOERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.1

Introduction

2.2

Control Input Unes

2.2.3

2.2.4

Head Select ~ and 2' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

2.2.5

Write Gate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.2.6

Reduced Write Current and Precompensation

. . . . . . . . . . . . . . . .

. .. 2-1

2-1

2.2.1

Drive Select 1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

2.2.2

Direction In . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2-4

2-4

Step.......................................................

. . . . . . . .. 2-6

2-6

2.3

Control O\Jtput Unes . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . ..

2.3.1

Tr&ek 00 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . ..

2.3.2

Index......................................................

2.3.3

Ready......................................................

2-2

2-4

2-5

2-6

2-6

2-6

2-6

Ul

TABLE OF CONTENTS (CONT.)

.

2.3.4

Wrtte Fault

2.3.5

Seek Complete

2.4

Data Transfer Unes

2.4.1

~ Write Data

2.4.2

~ Read Data

· · · · · · · · · · · · ·

· .. · . ·

· .. · . · · · . · · · · · ·

.

· · · . · .. · · · . · .. · ·

.

.

2.5

Select Status

2.6

General Timing

2.7

Power Interface

2.8

Frame Grounding

· · · · · · · · . · · · ·

ReqUirements .................•.....••••..•............

· · . · . · · · · · . ·

·

· · · · · · · · · · · · . · . ·

SECTION III PHYSICAL INTERFACE

3.1

Introduction

3.2

Jl!Pl

Connection

3.3

J5/P5 Connection

3.4

J6/P6 Connection

·

·

· . · · · .. · · · · · . · ·

· · . · · . · .. · ·

· .. · · · · · · .. · · · · · · · · · ·

.

.

2-7

2-7

2-7

2-8

2-8

2-8

2-8

2-9

2·9

3-1

3-1

3-1

3-2

3-2

SECTION IV PHYSICAL SPECIACAll0NS

4.1

Mechanical

Dimensions

4.2

Mounting

· ' · . · · · · ·

.

.

4-1

4-1

4-2

SECTION V MEDlA DEFECTS AND ERRORS

5.1

Error Mapping and Qualification

.

.

5.1.1

Cause.s of Errors

5.1.2

Error Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

• . . . . . . . . . . . . .

.

5.1.3

Media Defed Definition

.

5.1.4

Error Map

.

5.1.5

User Error Mapping

.

5.2

Error Acceptance

Criteria

5.3

System Generated Errors

.

.

5-1

5-1

5-1

5-1

5-1

5-2

5-2

5-2

5-2

.

SECTION VI RECORDING FORMAT

6.1

Track Fonnat

6.2.3

Gap 3

6.2.4

Gap 4

£ • • • • • • • • •

• • • • •

"• • • •

.

6.2

Gap Length Calculations

I • • " • • • • • • • • • • • •

6.2.1

Gap 1 .

~

• • • • • • • • •

6.2.2

Gap 2

~

• • • • • • • • • • • •

~

~

• • • • • • • • • • • • • • • • • •

• • • • • • • • •

.

.

.

.

. 6.3

Write ?recompensation

6-1

6-1

6-1

6-1

6-2

6-2

6-2

6-2

SECTION VII CUSTOMER INSTAllABLE OPTIONS

7.1

FuU-Height Faceplate

Kit

7.2

Low-Power

Slow Start Jumper

.

.

.

7-1

7-1

7-2

OPERATIONS DESCRIPTIONS

8-1

SECTION VIII niEORY OF OPERAnONS

8-1

8.1

Introduction .•••••.•...•........•.•.•••••••••.•.....•.••...........

8.2

High Priority Critical Tasks (Foreground)

8.2.1

8.2.2

8.2.3

Foreground Loop Control

Spindle Motor Foreground . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . ..

Motor Fault Foreground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . ..

8.2.4

Step Input Buffering Function . . . . . • . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . ..

8.2.5

Stepper Damping Time Out Routine . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . ..

8.2.6

Seek Function Foreground. . . . . . . . . . . . . . . . . . . . . . . .

8.2.7

Foreground End and Interrupt Return

. . . . . . . . . . . . . ..

. . . . . . . . . . . . . . . . . . . . ..

. . . . . . . . ..

8-2

8-2

8-2

8-2

8-2

8-2

8-3

8-4

8.3

Lesser

8.3.1

Priority Critical Tasks (Background) . . . . . . . . . . . . . . . . . . . . . . . .

System Startup Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

8.3.2

Spindle Motor InltializZltion ..... . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . ..

8-5

. . . . . . . . . . . . . ..

8-4

8-5 tv

)

)

TABLE OF CONTENTS (CONT.)

,

8.3.3

Microprocessor

8.3.5

Inttialize

Control

Code End

Fault indicator

8.3.4 . Seek Function lnitiallzZltion

Function

· . · · · . ·

· . . . . . . . . . . . . . . . ..

8-7

~ . . . . . . . . . . .. 8-7

· . . . . . . . . . . . . . . . . . . .. 8-7

8.3.6

Spindle Motor Background. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8-7

8.3.7

Motor Status Monitor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8-7

8.3.8

Warm-up Settling Extension Countdown · . . . . . . . . . . . . . . . . . . ..

8-7

8.3.9

System Background Loop Control

8.3.10

8-8

Loss of Index Monitor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

~8

8.3.11

CyUnder Address Rezero Monitor 8-8

8.3.12

Seek Ramping Calculate Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

8-8

8.3.13

Drive Actuator Self-exerdse Function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8-8

8.3.14

Actuator Lube Unstick Routine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

8-8

8.3.15

Automatic Actuator Reset to Track

Zero

(Recal Function) 8-8

8.3.16

Write Current Control Function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

8-9

8.3.17

8.3.18

Drive Select LED Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

8-9

Background Code End ' . . . . . . . . . . . . . . . . . . . . . ..

8-9

8.4

System Initialization Tasks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8-9

SEcnON IX PACKAGING INSTRUcnONS 9-1

9. 1 Uncrating.........................................................

9-1

9.2

Recommended Receiving Inspection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 9-1

9.2.1

Packaging and Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 9-1

9.2.2

Mechanicallnspeetion 9-1

9.2.3

Functional Testing ,. . . . . . . . . . . . . . . . . . . ..

94

9.3

Packing for Reshipping. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

9-4

SEcnON X DRIVE INTERCONNECT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-1

SERVICING INFORMATION

SEcnONXI SPAREPARTS

11.1

11-1

Routine Order Entry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-1

11.2

Emergency Order Entry ' ' ,.11-1

SEcnON VII MAINl"'ENANCE

12.1

Introduction

12-1

12-1

12.2

Maintenance Equipment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-1

12.3

Diagnostic Techniques 12-1

12.4

Test Point Locations

12.5

Troubleshooting

12.6

Checks and Adjustments

12.7

Removal and Replacement Procedures

12.7.1

Removal of Control PCB

12.7.2

Replacement of Control PCB

12.8

Alignment Procedures

12.9

Preventive Maintenance

12-1

12-1

12-2

12-4

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-4

12-4

12-5

12-5

SEcnON XIII ILLUSTRATED PARTS CATAlOG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

13-1

13.1

De-scription.......................................................

13-1

13.2

Indented Level 13-1

13.3

Quantity per Assembly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-1

13.4

Recommended Spare Parts Stocking Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-4 t

SEcnON XN SCHEMATIC DIAGRAMS 14-1

APPENDICES

APPENDIX A ORDERING INFORMATION A·l v

LIST OF FIGURES

2-3

2-4

2-5

2-6

27

2-8

2-9

2-10

2-11

3-1

3-2

3-3

I-I

1-2

1-3

1-4

1-5

2-1

2-2

8-2

8-3

9-1

9-2

10-1

12-1

12-2

13-1

13-2

14-1

3-4

4-1

6-1

7-1

7-2

7-3

8-1

Figure Title Page

Shugart 706/712 Rigid Disk Storage Drive

Read/Write Head Positioning Mechanism

0 • • 0 • • • • 0 • • 0 • • • • • • • • • • • • • • •

0 • • • 0 • • •

0 . . . . . . . . . . . .

• • • • • • • • • • • • •

I-a

1-5

AIr Filtration System ·

0 • 0 • • • • • • • • • • • 0 • • • • 0 • 0 • • • • • 0 0 • • • • • • 0 • • • 0 • • • • • • • • • • • • • • • •

1-5

Spindle Lock

0 • • • • • • • • • • • • • 0 • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • •

1-6

Shipping Zone 1-7

0 • • • • • • 0 • • • • • • • • • • • • • • • • • • •

J51nterface and Jl Power Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

J61nterface Connection

2-1

0 • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • •

2-2

Control Input Driver/Receiver Combination 2-3

Jumper Locations ....

Normal Step Mode ..

0

0

0

• •

0

0 • • • • • • • • • • • • • •

• • • • • • • • • • • • • • • • • • • • • • • •

MFM Read/Write Data Timing ....

General Control Timing Requirement

0

Interface Connector Locations

Jl Connector

0 • 0

0

0

0

• • • • • • • • • • • •

• •

• •

0

• • • • • •

• • • • •

0

0 0

0 • • • • •

0 • 0

0

0

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0

• •

• • •

• • • • • • • • • • • • • •

• • • • • • • • • • •

0

0

0

0

0 •

0 • • • • • • • • • •

• • • • • •

• • • • • • • •

•

0

•

• • • • • • •

• • • • • •

•

0

•

•

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0

0

•

•

•

•

•

•

•

0

•

0

•

0

•

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•

•

•

• • • •

•

•

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•

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0

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•

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0

•

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•

•

•

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•

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•

•

•

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•

•

•

•

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•

•

•

•

•

•

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•

•

•

•

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•

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•

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•

•

•

•

•

• •

• •

• •

• •

• •

• •

2-3

2-4

Buffered Step Mode .

Head Selection Timing

0 • • • • • • • • • • • • 0 • • • • • • • 0 • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • •

2-5 o.

0 • • • • 0 • 0 0 • • 0 • • 0 • 0 • • • • • • • • 0 0 • • • 0 • • • • • • • 0 • • • • • • • 0 • • • • • •

2-5

Index Timing.

0 • • • 0 • • • • • • • 0 • • • • • • • • • 0 • • • 0 • • • •

Data Transfer Line Driver/Receiver Combination ...

0

0

•

• • • • • • • •

0 • • • • 0

0 •

• • • •

•

0

• • • • •

• • • • •

•

0

•

0

•

•

•

•

•

•

•

•

•

•

•

•

•

•

•

•

•

• •

• • •

• •

2-6

27

2-8

2-9

3-1

3-1

J5

J6

Connector Dimensions

Connector Dimensions

Mounting Dimensions

0 • • • 0 • • • • • • 0

0 . 0

• • • • • • • •

• • • • • • • • • • • • • • • • • •

0 0 • • • • • • • • • • • • • • • • • ' .

~

0 • • • • • • • • • • • •

• • • • • • • • • • •

"

• •

. . . . . . . . . . . . . . . . . . . . . . . . . . ..

Track Format

Full-Height Faceplate Kit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

Low Power Option (Early Models) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

Jumper Installation and Fabrication. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

Logic Diagram

0 • • ' .

• • • • • • • • • • • • • •

3-2

3-2

4-1

6·1

7·1

7-2

7-2

8-1

Foreground Routines Sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

8-3

Background Routines sequencing

Single Unit Packaging Configuration . '

Ten Units Packaging Configuration

Multiple Drive Configuration

Locations Diagram

Removal/Replacement of Control PCB

Shugart 706/712 Assembly

Front Panel and Rail Assembly

Control PCB Schematic (2 Sheets)

0 • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • •

8-6

~ ..

0 • • • • • • • 0 • • • • • • • • • • 0 • • • • • • • • • • • • •

9-2

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

9-3

10-1

12-3 o • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • •

12·4

13·2

13-3

14-3

)

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Table

2-1

2-2

6-1

8-1

8-2

9-1

9-2

12-1

12-2

12-3

13-1

A-I

LIST OF TABLES

Page

Tltl.

Head Select (1

DC

Print Parameters

=

Requirements · · · .. · · · . · . · · · · . · · · . · · - ·

Write Precompensation · · · · · · · . · · . · . · · . · · ·

I/O Port Configuration .. · · . · · · · · · · · · · · · · · · · . . . . . . . . . .

LED Fault Codes. · · · · · .. · · · · · · · · · · ·

· · . · · . · · · · . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

Test Program - . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PCB Versus Drive Failures

-

Inspection of the Drive

Signals Inspection

False. 0 = True) · · · · · · · · . · . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Shugart 706/712 Spare Parts Stocking Guide

Shugart 706/712

PSI .. ·

. . ..

2-5

· · . . . . . . . . . . . . . . . . . ..

· . . . . . . . . . . . . . . . . . ..

. . . . . . . . . . . . . . . . . . . . . . ..

· · . . . . . . . . . . . . . . . . ..

. . . . . . . . . . . . . . . . . . . . . . . . . . .

,

2-9

6-2

8-4

8-7

9-4

9-4

12-1

12-2

12-2

13-4

A·I vii

BKPC Background Port C

0 bpi Bits per Inch eRe

Cyclic Redundancy Check

Prompt Character fel Flux Change per Inch

10 Identification

I/O Input/Output

IP Inspect Phase

LED

Light Emitting Diode

LSI Large ~ale Integration

ABBREVIATIONS /MNEMONICS

MFM Modified FM

MLC Machine Language Code

PCB Printed Circuit Bo.ard

pp

Print Parameters

PWM Pulse Width Modulation

RCFLG Recalibrate Rag

R/W

Read/Write

SEL Select tpl

TRK

Tracks per Inch

Track

NOTICE TO USERS

This manual, P/N 39402-0, supersedes, replaces, and incorporates the OEM manual. P /N 39252-1, published

April.

1983.

and further includes the Publication Change Notice No. 1 dated August 18. 1983. and Publication

Change Notice No.2 dated February 20, 1984. All technical changes have been indicated with a change bar in the text margin or a star symbol in the illustration. While every effort has been made to ensure that the information provided herein is correct, please notify us in the event of an error or inconsistency. Direct any comments on the form at the back of this manual to:

Shugart Corporation

Technical Publications. MS 3-14

475 Oakmead Parkway

Sunnyvale, CA 94086 (U.S.A.)

Phone (408) 737-7900

Shugart makes no representations or warranties with respect to the contents hereof and specifically disclaims any implied warranties of merchantability or fitness for any purpose.

Further, Shugart reserves the right to revise this publication and to make changes from time to time in the contents hereof without obligation to notify any person of such revisions or changes.

The information contained herein has been copyrighted by the Shugart Corporation. No portion of this document can be duplicated in any form, or sold, without the express written consent of Shugart Corporation. Failure to comply could entail legal action to remedy such violation.

viII

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SECTION I

INTRODUCTION

1.1

PURPOSE

This publication is designed as a reference source for technicians. and knowledgeable end users.

OEM engineers. system Integrators. service and maintenance

It is assumed that the reading audience is sufficiently versed in the stateof-the-art with respect to rigid disk drives .

1.2

GENERAL DESCRIPTION

The Shugart 706/712 Disk Drives are random access 5.25

inch (130 mm) Winchester storage devices with one

(706) or two (712) non-removable disks as storage media. Ellch disk surface employs one movable head to service

320 data tracks. These drive are available in half-height or fun height configurations.

I

Low cost and high reliability are acheived through the use of a unique rotary band actuator design, a self-contained microcomputer. and custom LSI circuitry .

The 706/712 interface is either ST506 or ST412 compatible, allowing easy integration into existing systems.

Some of the key features of this series are as follows: a.

Microprocessor-based electronics.

b.

Three custom LSI devices for reliability .

c.

BuUt-in diagnostics.

I d.

Jumper selected exercise routines.

e.

Dedicated landing zone.

f.

Single track seek time is less than latency.

g.

Read/write pre-amp on head arm.

h.

3370 head flexure design .

l.

Brushless dc spindle motor.

j.

k.

Winchester design reliability In a half-height or fun-height package.

Improved shock and vibration characteristics.

1-1

...

-.

"----'

1.3

SPECIFICATIONS SUMMARY

1.3.1

Performance Speclflcatlona

Capacity

Unformatted

Per Drive

Per Surface

Per Track

Formatted (33 sectors/track)

Per Drive

Per Surface

Per Track

Per Sector

Formatted (32 sectors/track)

Per Drive

Per Surface

Per Track

Per Sector

Transfer Rate

I Access Time (includes settling time)

Track to Track

Average

Maximum

Average Latency

Start Up Time (typical)

1.3.2

Functional Specification.

Read/Write Heads

Disks

I Cylinders

Data Tracks

Index/Revolution

-I Rotational Speed

Recording Density

Aux Density

Track Density

Data Encode Method

Write Precompensation

Reduced Write Current

I Shipping Zone (track number)

1.3.3

Phy.lcal Speclftcatlon.

Mechanical Dimensions without Faceplate (nominal):

Height

Width

Depth

Weight

= 1.63

in ( 4.14

cm)

=

5.75

In (14.61

cm)

= 8.00

In (20.32 cm)

=

3.0

Ibs { 1.36 kg)/706

3.6 Ibs ( 1.63 kg)/712

706

6.4 Mbytes

3.2

Mbytes

10,416 bytes

5.2

Mbytes

2.6

Mbytes

8.4

kbytes

256 bytes

5.0

Mbytes

2.5

Mbytes

8.2

kbytes

256 bytes

5.0

Mbits/sec

16.2

msec

85

msec

175 msec

8.37

msec

12 sec

2

1

320

640

1

3.600 (±0,-72) rpm

9.036

bpi

9.036

fci

360 tpi

MFM

12 (± 2) nsec

Automatic

353

4

2

320

1,280

712

12.7

Mbytes

3.2

Mbytes

10,416 bytes

10.3

Mbytes

2.6

Mbytes

8.4

kbytes

256 bytes

10.0

Mbytes

2.5

Mbytes

8.2

kbytes

256 bytes

5.0

Mbits/sec

16.2

msec

85

msec

175 msec

8.37

msec

12 sec

1-2

1.3 SPEClFlCAnONS SUMMARY

1.3.1 Paformaace

SpecUicadoD8

Capacity

Unformatted

Per Drive

Per Surface

Per Track

Formatted (33 sedon/track)

Per Drive

: Per Surface

Per Track

Per Sector

Formatted (32

Per Drive

Per Surface

Per Track

Per Sector

Transfer Rate seeton/track)

I

Access Time (includes settling time)

Track to Track

Average

Maximum

Average Latency

Start Up Tune (typical)

1.3.2 .

Functional Specification.

Read/Write Heads

Disks

I Cylinders

Data Tracks

Index/Revolution

I

Rotational Speed

Recording Density .

Aux Density

Track Density

Data Encode Method

Write Precompensation

Reduced Write Current

I Shipping Zone (track number)

1.3.3 Pbplcal SpeclftcatloDa

Mechanical Dimensions without Faceplate (nominal):

Height • 1.63

in ( 4.14 cm)

Width = 5.75

In (14.61 em)

Depth

Weight

=

8.00 In (20.32

em)

= 3.0 Ibs ( 1.36 kg)/706

3.6

Ibs·( 1.63 kg)/712

706

6.4

Mbytes

3.2

Mbyte.

10,416 byte_

5.2 Mbytes

2.6

Mbytu

8.4 kbytes

256 bytes

5.0

Mbyte.

2.5 Mbyta

8.2 kbyta

256 bytes ·

5.0 Mbltl/sec

16.2

msec

85maec

175

mMe

8.37

maec

12 He

2

1 .

320

640

1

3,600 (:0,-72) rpm

9,036 bpi t

9,036 fd

360 tpi

MFM

, 12 (± 2) nsec

Automatic

353

4

2

320

1.280

712

12.7 Mbytes

3.2

Mbytes

10,416 bytes

10.3 Mbytes

2.6 Mbytes

8.4

kbytes

256 bytes

10.0 Mbytes

2.5 Mbytes

8.2

kbytes

256 bytes

5.0 Mbits/sec

16.2

msec

85 msec

175 msec

8.37

msec

12 sec

1·2

)

·

·

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Environmental Umtts:

Host Ambient Temperature:

Operating - 41 ° to 113°F (5° to 45°C)

Non-operating _40° to 140°F (_40° to 60°C)

.

,

Temperature Gradient:·

Operating - 10°F (5.~OC) per

1/2

.

hour

Non-operating - 212°F (100°C) per hour non-condenllng

Relative Humidity:

Operating 8% to 80%

Non-operating - 1% to 959.»

Maximum Wet Bulb:

Operating - 78°F (25.6°C) non-eondenslng

Non~operatlng - Non-eondenslng

Elevation:

Operating - 0 to 10,000 ft (0 to 3048 m)

.

Non-operating -1.000

to 30,000 ft (-305 to 9144 m)

Acoustic Noise: Less than 50 dbA at 3.3

It (1.0

m)

Shock:

Operating 10 G max (11 msec half sine wave)

Non-operating - 40 G max (11 msec half sine wave)

Vibration:

Operating:

5 17 Hz = 0.036

In

17 - 150 Hz = 0.55 G

200 - 500 Hz :: 0.25 G

Non-operating:

5 22 Hz

44- 500 Hz

= 0.50 G

=

2.00 G

DC Voltage Requirements: .

± 12 Vdc ± 5% .75 A typical (3.9 A max starting for 10 sec) (2.7 A max starting with low power option)

± ·5 Vdc ± 5% 1.6 A typical (2.4 A max)

I .

Heat Dissipation

=

86 BTU/hr typical (18.4 watts)

1.3.4 Reliability Speclflcatlona

Mean Time Between Failure:

Preventive Maintenance:

Mean Time to Repair:

Component ute:

20,000

Power-on

Houn typical usage

None Required

12

minutes

(PCB only)

5 yean

1.4 FUNCTIONAL CHARACTERISTICS

1.4.1

General Oper.dOD

The 706/712 fixed disk drives consist of read/writ., heada, read/write and con;ol electronics, track positioning mechanisms, media, and air filtration systems.

TheM components perform the foUowing functions: a.

Interpret and generate control signals.

I b.

Position the heads over the seleded track.

c.

Read and write data.

d.

Provide a contaminant-free environment.

1·3

--

.~

1.-4.2 Read/Write anel Control

Electroalea

The standard

~iaoproceS50r and electronics are packaged o~ one printed circuit board containing the foUowing circuits: a.

Index Generator Circuit b.

Head Position Actuation Drivers

c.

Read/Write Amplifiers d.

Drive (READY) up to Speed Circuit

e.

Drive Select Circuit f.

Write Fault Detection Circuit g.

Read/Write Head Select Circuit

h.

Ramped (Buffered ) Stepper Circuit

I.

Track 00 Indicator

Brushless Spindle Motor Control Circuits j.

1.4.3

Drive Mechanlam

I The brushless dc drive motor rotates the spindle at .3.600

(:t 0, - 72) revolutions per minute.

1.4.4

Poaltlonlng Mechanl••

The read/write heads are mounted on an arm which is positioned

by

I

Fasflex™ IV rotary actuator.

A stepper motor is used to precisely position the rotary actuator utilizing a unique metal band/capstan concept.

Figure 1-2 ulustrates thiS positioning mechanism.

.

1.4.5 Read/Write Head. and DI.k(l)

The recording media consists of a thin, lubricated, magnetic oxide coating on a 130 mdUmeter diameter aluminum substrate.

This coating formulation, together

with

the low load force/low mass Winchester-type flying heads, permits reliable contact stan/stop operation.

I Data on each disk surface are read by one read/write head, each of which accesses 320 data tracks.

The drive is available in two basic configurations: one disk with two read/write heads (706) or two disks with four read/write heads (712). The heads should be positioned at cybnder 353 via IOftware prior to power down in order to minimize the potential for damage to the recorded data on portable systems.

Refer to paragraph 1.4.8.

1.4.6

AIr flltratioD Syatem

The disk(s) and read/write heads are fuUy encased In a protective cover using an integral recirculating air system, with a recirculating filter. to maintain a contaminant-free environment. A separate absolute breather filter allows

.

to the ambient air without contamination.

See figure 1-3.

)

'-4

ACTUATOR

SPINDLE ASSEMBLY

PJW HEAD

ASSEMBLY

STEPPER CAPSTAN BAND

.MOTOR

*

FIGURE 1·2.

READ/WRITE HEAD POSITIONING MECHANISM

0.3 MICRON

BAROMETRIC

FILTER

. COVER

0.3 MICRON

FILTER

*

FIGURE 1·3. AIR FILTRATION SYSTEM

1·5

These drives are provided with an integral fall·sal.

spindle lock and brake.

ThIs lOIenold operated. mechanical brake is actuated when de power is applied to the drive, allowing the spindle to rotate. When the drive is powered off, the solenoid is deae:ttvated allowing the brake to engage the spindle.

This prevents the possibility of disk move· ment during shipping or movement of the drive.

During spin down, the brake decelerates the spinning disks quickly to reduce the amount of time that the heads are In unltable flight.

Se.

figure 1-4.

STEPPER MOTOR

BRUSHLESS DC

SPINDLE MOTOR

)

FIGURE 1-4. SPINDLE LOCK

1.4.8

Read/Write Head Shipping Zoae

The unused area of the disk surface. Inside the data bands, is designated as a "shipping zone." The heads should be positioned to this area via software before the drive 15 powered off.

prior to moving or shipping the drive. This ensures that damaged if the drive is exposed to severe handling (shock). the data storage area of the disk surface will not be by heads movement on the disk(s). See figure }-5.

1.5 FUNCTIONAL OpERATIONS

1.5.1 Power SequencIDl

The required power-on sequence for early production units (1.8., 706/712 that are MLC 4 or less) is that both the 5 and 12 volts supplies be

M on" within 20 seconds of each other. The order is not important.

No power-on sequence is required for

MLC 5 and

above.

All

drtves have a speed

sense

ctrcult to prevent stepping until the disk is rotating at the proper speed (3,600 rpm). A READY signal will be presented to the controller interface once the disk is up to' Its normal rotational speed (:t 2%) for two seconds.

At .READV

time, after an initial power-up, the drive will recalibrate Itself to track 00. When the recallbration procedure Is complete. SEEK COM-

PLETE will go true. Normal seek and read functions can now begin. Refer to paragraph 2.6.

!

·1.5.2

Drive SelectlOD

Drive selection occurs when one of the DRIVE SELECT Ilnes II activated. Only the drive appropriately jumpered will respond to the input signals. and the output signals of that drive are then gated to the controller.

1·8

) i l

130 mm

DISK 00 TRt< 00

- DATA

TRACKS

.'@ ....

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HEAD SHIPPING ZONE

CYLINDER 353

FIGURE 1·5. SHIPPING ZONE

40mm

DISK 10

1.5.3 Track Acceaalng

Read/write head positioning is accomplished by: a.

Deactivating the WRITE GATE.

b.

Activating the appropriate DRIVE SELECT line .

c.

Being in the

READY

condition with SEEK COMPlETE true.\ d.

Selecttng the appropriate direction .

e.

Pulsing the STEP Un•.

f.

Checking for the edge of the -SEEK COMPLETE line (changing from false to true).

Stepping can occur at either the normal or buffered rate. DUring normal stepping,-the heads are repositioned at the rate of incoming step pulses.

In the case of buffered stepping, Incoming step pulses are received at a high rate and are buffered Into counters.

When all of the steps have been received, they are Issued to the stepper drivers at a ramped stepping rate.

Each pulse will cause the heads to move either one track In or one track out, depending on the level of the DIREC-

TION IN line.

A true on the DIRECTION IN line wUI toward track 00.

cause an Inward seek: a false will result in an outward seek

'·7

1.~4 Reacl OperaUoUl

Reading data &om the d1sk Is accompUshecl by: a.

Deactivating"the WRITE GATE line.

r b.

Activating the appropriate D~ SELECT line.

c.

Assuring that the drive ts READY.

d.

Selecting the appropriate head.

1.5.5 Write Operation

Writing data onto the disk is accomplished by: a.

Activating the appropriate DRIVE SELECT Une.

b.

Assuring that the drive is READY.

c.

Clearing any write fault conditions (if that exist).

by reselceting the drive.

d.

Selecting the proper head.

e.

Activating the WRITE GATE and plactng data on the WRITE DATA

Un••

1.5.6 Head Selection

Any of the two to four possible heads can be seleded by placing the binary address of that head on the two HEAD

SELECT Unes.

1·8

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SECTION

II

ELECTRICAL INTERFACE

2.1

INTRODUCTION

The interface for a 706/712 has pin assignments.

drive control signal pin ualgnmentl per Industry standards.

See figure 2·1 for the

HOST

~

RESERVED

RESERVED

-WRITE GATE

-SEEK COMPLETl

-TRACK 00

-WR'TE FAULT

-HEAD SELECT 2'

RESERVED

-HEAD SELECT 2' •

7OeI712 ,

~~

-

2

-

•

•

7

• t

5

10

I'

13

"

3

t.

-

-

11.

17

'1

11

15

FLAT

AlIBON

20 FT. MAX.

ce"mm)

-INDEx

-

~ -~EADY a

~

-STEP

-DAIVE SELECT t

-DRIVE SILECT 2

-DAIVE IllECT 3

22

-

N

25

23

a

zr

•

21

3D

31

- DRIVI SILECT •

-DIRECTION IN

-

-

-

3Z

33 ,.

•

.

3

-

1

2

rh--=-

IfRAUEGND

..,,1P1

•

~ v

DC --..

..£:

-

~

DCGNO

A

-

X

• ~

• '2

RETURN

Y DC

• 12 RETURN rJ

GND

TWISTED PAIR

*

FIGURE 2·1. J5 INTERFACE AND J1 POWER CONNECTIONS

2·1

The sJgna11nterface consists of three categories: a.

Control Input Una b.

Control Output Una c.

Data Transfer Una

I

AD control lines are digitalin nature and either provide signals to the drive (input) or provide signals to the host (output) via the interface connector JS/P5.

The data transfer slgnall are differentialln nature. They provide data either to or from the drive. via

J6/P6.

See figure

2-2

for the

J6/P6

pin assignments.

706n12

HOST

FLAT CABLE

20 FT MAX

(8.6

mm)

--:

-

-

-

- DRIVE SELECTED

GND

SPARE

GND

SPARE

GNO

RESERVED

GND

SPARE

GND

GND

+

GND

MFM WRITE DATA

-MFM WRITE DATA

+

GND

GND

MFM READ DATA

-MFM READ DATA

GNO

GND

3

5

,

7

1

-

, ..

13

17

18

2

~

8

8

10

'1

12

15

16

19

20

..

~

J6/Pe

*

FIGURE 2·2. J6 INTERFACE CONNECTION

2.2

CONTROL INPUT

UNES

The control1nput signals are of two types; those Intended for multiplexing In a multiple drive system, and those intended to control the multiplexing. The controllnput Ilgnals to be multiplexed are: a.

The STEP signal b.

The DIRECTION SELECT signal c.

The HEAD SELECT 20 and 2 1 signals d.

The WRITE GATE signal

The signals which are intended to control the multiplexing are DRIVE SELECT 1 through DRIVE SELECT 4.

The controllnput lines have the following

.lectrical

specifications.

541.

figure 2-3 for the recommended cIrCuit.

Only one drive In the system should be terminated. h should a

220/330

ohm resistor pack. This resistor pack can be

be

disabled located at the end of the cable and terminated with by removing the jumper block located near the P5 connector. See figure 2-4 for the location.

)

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-

..

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• II

II

· .

II

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• a

•

•

• 'II

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20 FT (MAX)

(6.0

mm)

True

False

-

-

=

0.0

to 0.• V de fl lin

=

.0 mA (max)

=

2.5

to 5.25

V de " lin

=

0 mA (open)

-

-

3i026-06·A

FIGURE 2·3. CONTROL INPUT DRIVER/RECEIVER COMBINATION

REAR VIEW

DRIVE SELECT.

DRIVE SELECT

I /

3./.

j

DRIVE SELECT 2

NOTE: These eight Jumper. are for drive control line termination and .r.

to be removed from ai, but the Int drive in a multiple drive configuraUon

(r.fer to Section IX).

STEP

UNDEFINED

UNDEFINED

WRITE GATE

DRIVE SELECT 1

HEAD SELECT 21

DRIVE ALWAYS

UNDEFINED

5 LECTED

DIRECTION HEAD SELECT 2'

*

FIGURE 2·4. JUMPER LOCATIONS

2·3

..

DrIve

Select 1-4

DRIVE SELECT, when logically true, connects the drive to the control Una.

be active at a time.

Only

one DRIVE SELECT line may

Jumper options 051-4 are used to choose which DRIVE SELECT lin.

drive.

See figure 2-4 for the jumper locations.

wID

activate the Interface for that unique

.

2.2.2 Direction

10

This

signal

defines the direction

of

motion

of the read/write

heads when

the STEP bne

Is pulsed.

An

open ctrcult, .

or logical false.

defines

the direction as

"out" and

a

pulse applied

to the STEP lin.

wID move the R/W

head away from the center of the disk. U the Input is shorted to ground (logical true) and a

pulse

is applied, the heads

wID

move toward the center of the disk.

I.e.

''In.,.

2.2.3 Step

This

line causes the read/write heads

to

move In the direction

defined

by

the DIRECTION IN

line.

The motion

Is initiated at each logical

true-ta-false

transition.

Any

change In

the DIRECTION IN line must

be made before

the

leading e ige of the STEP pulse. Stepping can

be performed in

lither

the

normal or

buffered

mode:

Normal Step Mode

In

this mode.

the

read/write heads will move

at the rate

of the Incoming

STEP

pulses. The minimum

time

between successive steps is 3.0

msec, with a minimum pulse width of 500 nsec. See figure 2-5.

-DIRECTION

-STEP

-SEEK COMPLETE

~

I

~I

J

1'00

,nslC MIN'

I

--., p550nsecTYP

1

~1oon"CMIN

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I

I3.0maec MIN

*

FIGURE 2·5. NORMAL STEP MODE

(5141215T5OI TYPE UO)

~·'3-A

Buffered Step Mode

In this mode, the

STEP

pulses are received at a high rate and buffered Into a counter. After the last STEP

pulse.

the read/write heads will begin stepping the desired number of cylinders and SEEK COMPlETE (refer to paragraph

2.4.5) will go true after the heads settle on the cylinden. This mode of operation is

automatically

selected when the time between STEP pulses is less than 200

pee.

.

.

The DRIVE SElECT line may be dropped and a different drive selected 500 nsec after the last STEP pulse has been sent to the drive.

The maximum time between steps is

200 1d8C.

with a minimum pulse width of 3.0

~.

See figure 2-6.

)

)

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•

)

2·4

· u

• u

• II

• u

• \t

·

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• I

·

· '-'

· -

•• 1

· -

•• I

• !

..

,

•••

:

:

-

-

: _I

.

.

--

...

:

'.'

: ..

'

• u

.1

-STEP

-SEEK COMPLETE

-DRIVE SELECT X

NOTE: VARIES WITH SeEK L~NGTH.

11•• mMC MIN, .a.o

maec MAX.

FIGURE 2·8. BUFFERED STEP MODF

Shipping Zone

The read/write heads can be accessed to the shipping zone by doing.

seek to cylinder 353.

NOTE

STEP pulses with periods between 200 "sec curacy is not guaranteed and 3.0

msec are not permitted. Seek ac-

If.

this timing requirement is violated.

2.2.4

Head

Select

2- and

2

1

These two lines provide for the selection of each individual read/write head In a"binary coded sequence. HEAD

SELECT 2° is the least significant line. When all HEAD SELECT 11nes are false, head 0 will be seleded. Table 2·1 shows the HEAD SELECT sequence and model variations for the ing sequences.

HEAD

SELECT lines.

,"

See figure 2-7 for the tim-

TABLE 2·1. HEAD SELECT (1

=

FALSE, 0

=

TRUE)

!

HEAD SELECT LINE HEAD SELECTED HEAD SELECTED

20 2 1 701 712

1

0

1

0

0

0

1

1

0

1

IMPROPER SELECT

IMPROPER SELECT

2

3

0

1

I

HEADS SWITCHED

READ DATA

VAUD

+ WRITE GATE

WRITE DATA

(FROM CONTROLLER)

VALID

-...-..--...1

-.f

~

8 "lee MAX

-.-.-_1

- .....-

l

....1

I

8 "aec '1

~(

FORMAT SENSITIVE)

_ _ _ _I 400 MAX 1-._ _

FIGURE 2·7. HEAD SELECTION TIMING

2·5

')

2.2.5 Write Gate

The active state of this signal (logical 0 level)

enables

WRITE DATA to be Written onto the disk. The inactive state of the signal (logical 1 level) enables data to be transferred from the drive and STEP pulses to reposition the head arm.

See figure 2-7 for the tlm1ng sequences.

2.2.6 Reducecl Write ClII1'eDt and Precom,...AtloD

The 706/712 provides for automatiC reduced write current switching. Optimum precompensation 15 12 nsec and should be used on cyUnders 128 through 320.

2.3

CONTROL OUTPUT UNES

The control output signals are driven with an open collector output stage capable of sinking a maximum of 40 rnA at logical 0 (true), with a maximum voltage of 0.4 V measur.d at the driver. When the line driver is at logical 1

(false).

the driver transitor is off and the collector cut-off current is a maximum of 250 ~.

I All

J5 output lines are enabled by their respective DRIVE SELECT .lines.

Agure 2-3 shows the recommended control signal driver/recetver comblnation~

2.3.1 Track 00

This interface signal Indicates a true state (Ioglcal 0) only when the read/write heads of the seleded drive are at track 00 (the outermost track) and the access circuitry is driving current through phase one of the stepper motor.

This signal is false (logical 1) when the read/write heads of the selected drive are not at track 00. The state of this line is undefined when SEEK COMPLETE is

false.

2.3.2 ladex

The drive provides this interface signal once I!very revolution (16. 74 msec typical) to Indicate the beginning of the track.

Normally this signal is a logical 1 (false) and makes the transition to logical 0 (true) for a period of approximately 200 I1sec once each revolution (see figure 2-8).

INDEX mMC TYP

----~.~

I

.

FIGURE 2·8. INDEX TI.MING

2.3.3 Ready

This interface level, when true Oogical 0).

together with SEEK COMPLETE, Indicates the drive is ready to read.

write, or seek, and that the signals are valid. When the drive.

this

Une is false (Iogicall).

aU

seeking and writing is inhibited at

.

READY will be true after the drive is up to· speed (± 2%) for two seconds. The typical time for READY to become true after power-on is 12 seconds(21 seconds when the low power option has been utilized). After the automatic aduator recalibration process. typically six seconds. SEEK COMPLETE wiD the drive. but an additional two minutes also become true.

It is now safe to seek should be allowed for thermal expansion to stabUlze before any write operations are perfonned.

t t t

C

C

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I t t t t

C t

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-

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-

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•

•

,.

I

.,.

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·

·

J

.

.

.

I

,

·

.

2.3.4 Write Fault

This signal. when active (logical 0), Is luued to indicAte.

condltlon exists at the drive that could cause improper writing on the disk. A WRITE FAULT occun whenever one of three conditions occurs: a.

The read/write heads are Improperly ..Ieded., b.

The dc volta~e Is more than 2S percent out of tolerance.

c.

The actuator or spindle controllystem II faulted.

To reset the WRITE FAULT line, deseled the drive for at

least

500 nsec.

NOTE'

The WRITE FAULT Une will not reset of the drive.

if

the fault condition still exists after deseleetion

2.3.5 Seek Complete

The SEEK COMPLETE signal will go true Oogical 0) when the read/write heads have settled on the final track at the completion of a seek. Reading or writing should not be attempted until SEEK COMPLETE Is true.

The SEEK COMPLETE will go false In two cases: a.

A recalibration sequence Is initiated (by the drive logic) at power-on if the read/write heads are not over track 00.

Refer to paragraph 2.7.

b.

After the leading edge

2.4

DATA TRANSFER UNES of a.

STEP pulH (550 nMC typical) or the first of a series of Step pulses.

All lines associated with the transfer of data·between the drive and the host are differential in nature and may not be multiplexed.

These two pairs of balanced signals are:· a.

MFM WRITE DATA b.

MFM READ DATA

These signals are provided at the J6/P6 connector on aU drives. Figure 2-9 Ulusttates the driver/receiver combina-I tion.

See figure 2-2 for the J6/P6 interface connection.

HIGH

TRUE

26LS31

OR EQUIVALENT

FLAT CABLE

20 FT MAX

(8.8

mm)

.....- - - - - -....... 100 0

+ SIGNAL

-SIGNAL

HIGH

~--TRUE

26LS32

OR eQUIVALENT

FIGURE 2·8. DATA TRANSFER LINE DRIVER/RECEIVER COPv1BINATION

2·7

-_._-~

2.4.1

MfM Write Data

This pair of signals defines the transitions (bits) to than be written on the dlIk.

+ MFM WRITE DATA going more positive

-MFM WRITE

DATA will cause • flux reversal on the track under the selected head providing WRITE GATE

15 active.

This

signal must be driven to an Inactive state (+

MFM

WRITE DATA more negative than

-MFM WRITE

DATA) by the host system when in the rod mode.

Figure 2·10 aho.WI

the timing for MFM WRITE DATA.

- DRIVE SELECT

HEAD SELECT

+MFM VALID

READ DATA

-WRITE GATE

12

+MFM

WRITE DATA

(PRE·COMP

= nSle SINGLE LEVEL)

--,

---,

.J

81lsec

MAX f.

~ J.

50 nl.e

TVP

1+

~1~ciE;:.c

TYP °1

~--35I'I.c

MIN

-i

-i

~

35l'sec MAX i

400 nlee MAX

solnaec

____________ruui MIN to 150 nlee MAX _

200naec :t 0.1%

~ ~

FIGURE 2·10. MFM READ/WAITE DATA TIMING

2.4.2

MFM Read Data

The data recovered by reading a pre-recorded track are transmitted to the host system via the differential pair of

MFM READ DATA lines. This transition of the + MFM READ DATA line going more positive than -MFM READ

DATA lines represents a flux reversal on the track of the selected

head whUe

WRITE GATE is inactive. See figure

2·10.

2.5

SELECT STATUS

I A status line is provided at the J6/P6 connector to Inform the, host system of the selection status of th~ drive.

The DRIVE SELECT line is driven by a Tn.

open collector driver' as shown only when the drive is programmed as drive X (X iii

1, 2, in

figure

2-8.

This signal will go

active

3. or

4) by

proper placement

of the shorting plug in the

• vicinity of J5.

and DRIVE SELECT X line at J5/P5 is activated by the host system. See figure 2-4 for the jumper location.

2.6

GENERAL TIMING REQUIREMENTS

The timing diagram shown in figure 2-11 Ulustrates the nec811ary sequence of eventl (with associated timing restrictions) for the proper operation of the drive.

I

Note that a recalibrate to track 00 sequence Is Initiated at every dc power-on.

For this auto-recall sequence to function, the following conditions must be met:

Zl.

b.

The STEP input at JS/PS is h.ld

active.

The spindle Is spinning at Its regular speed.

2·8

: o~

- 0.

: :j

• -.if

- OJ

: o-.!

-

-

-

~

~

: ..

~

:

-~

~

:

.~ j

~

: 'o!

- j

-

~

-

~

-

~.

- 0'

.~

~

-

=.~

., j

~

- r;

.

~

- '..!

DC POWEAON

DISK AT SPEED

-READY

-TKOO

---I

I...-

12 SEC TVP

I I.

I

I

J

I

+f

J

r---

9.0 SEC MAX

_

_

-SEEK COMPLETE

I ~

-----~i

1__ 18

~ ~

46 male TYP male MAX -_

*

FIGURE 2·11. GENERAL CONTROL TIMING REQUIREMENT

39026·t6-C

2.7

POWER INTERFACE

These drives require only dc power for operation .

The de power to a 706/712 drive Is via connector Jl/Pl located on the solder side of the PCB. The two de vohages and their specifications, along with the Jl/Pl pin designations are shown in table 2·2.

I

Power from the + 5 and within 20 seconds of the

+ 12V supplies may be applied In any order. However. the + 5V power must be assened

+ 12V power-on application.

'*

TABLE 2·2. DC REQUIREMENTS oc

VOLTAGE PI PIN.

TOLERANCE CURRENT MAX RIPPLE (P TO P)

. 1 +12 V

~0.6

:t

V DC

1.2 V STARTING'

.75 A TYPICAL

3.9 A STARTING-

500 mV MAX

ALLOWABLE

2 + 12 V RETURN

3 +5 V RETURN

4 +5V :0.25 V DC

1.6 A TYPICAL

. 2.4 A MAX

50 mV MAX ALLOWABLE

·10SECMAX.

392521().A

2.8 FRAME GROUNDING

These drives require ac grounding of the buepl~te.

Thls grounding is accomplished in either of two ways: a.

The de voltage returns (+ 12 V and

+

5 V) are tied to the ac ground at the power supply .

b.

A separate ground wire (#18 AWG or larger) is attached to a grounding lug on the baseplate in the vicinity of the interface connectors.

2·91 2·10 (blank)

•

,

:

.

..

•

.

••

..

SECTION III

PHYSICAL INTERFACE

·-a

- . a

.

-

..

II

• II

..

"

•

•

I u

3.1

INTRODUCTION

The elecmcallnterface between a 706/712 drive and the host system Is via three connectors. The first connector,

Jl. provides the de power: the second connector, J5. provides the control signals for the drive; and the third connector. J6. provides for the radial connection of the read/Write Ilgnals.

P6

- - - - -

P5

J6 --~~

-

---------

JIl ____..........""'-

._~

~-

I

•

•

•

•

•

· ,

•

•

•

· .

•

• _I

•

•

•

•

·

•

•

· .

••

•

"

-

•

• I

"

I

•

·

·

','

•

J1

*

FIGURE 3-1. INTERFACE CONNECTOR LOCATIONS

38~·"·8

3.2 Jl/Pl CONNECTION

The dc power connector, Jl.

is mounted on the component Iide of the PCB.

Jlls a 4-pin AMP Mate·N·Lok nector.

PIN 350211·1. The recommended mating connector II AMP PIN 1-480424-0 utilizing AMP pins con-I

PIN

61473-1.

Jl. pin I, is labeled on the component side of the PCB. Wire used should be -18 AWG. Figure 3-2 U· lustrates the connector as seen on the component sid. of the drive PCB.

PIN •

3

4

1

2

DESIONAnON

+12 V

+ 12 V RETURN

+5 V RETURN

+5V

*

FIGURE 3-2. Jl CONNECTOR

3·1

I

3.3 J5/P5 CONNECTION

Connection to J5 is through a 34-pln PCB edge connector. Th. dimensions for this connector are shown In figure

3-3. The pins are numbered 1 through 34 with the odd numbered pin, located on the component and even pins located on the solder side of the PCB. Pin 2 Is located at the end of the PCB connector closest to t h e :

~

I

Jl side of the PCB, connector and is labeled.

A key slot is provided between pin.

3 and 5. The recommended mating connector for aJ.

€a

I

PS Is a Scotchflex ribbon connector.

PIN 3463-0001.

~~

--- II ~

0.036 : O.OCM

(o.a

:t 0.1)

.E-'

~I

0.400

:t 0.010

(10.2 : 0.3)

--L

BOARD THICKNESS

0.062

~ 0.007

(1.6

~ 0.2)

T

0.450

:t 0.010

0.3) (11.4 :

I

-.....J

~

0.050 NOM (1.3)

~

- 11-

0.050 NOM 0.100 NOM

~

~

I

(1.3) (2.6)

1.775

% 0.010

(~5.1

; 0.3)

I i

I I

I i

. - .

.

-.11--~;~3

NOM (2 x) I

NOTE: X.xx

(x.JUt

~

~ x.xx

x.xx)

= in.

= mm •

E-'

,

Ea~

~~

I

~6

~i

~I

,

3.4

J6/P6 CONNECTION

Connection to J6 is through a 20·pin PCB edge connector.

The pins are numbered 1 through 20 with the odd

I numbered pins located on the component side of the PCB.

The recommended mating connector for P6 is a Scotchflex ribbon connector, PIN 3461-0001. A key slot is provided between pins 3 and 5. Figure 3-4 shows the dimensions of the connector.

0.400

~ 0.010

(10.2

:t 0.3)

--L

BOARD THICKNESS

0.062

~ 0.007

(1.6

:t 0.2)

FIGURE 3·3. J5 CONNECTOR DIMENSIONS

-...II....

0.036 : 0.004

- I (O.Q

% 0.1)

T

O.ASO : 0.010

(11.~ % 0.3)

I,

...J

f.-

0.050 NOM (1.3)

... J,...

0.050 NOM (1.3)

,........

1.075

:t 0.010

(27.3

:t 0.3)

I •

I

•

I ,

I

I

Ji..

J"

0.063 NOM (1.6)

0.100 NOM (2.5)

- - -..........1

NOTE: x.xx

% x.xx

(x.xx

:t x.xx)

= in.

= mm

FIGURE 3-4. J6 CONNECTOR DIMENSIONS

3

(.1

f:.

f

~

J

~

~

~

I

~

I

~

I

~

I fa ,

(.'

I r

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3.. 2

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.

,

.

.-

.

,

)

SECTION IV

PHYSICAL SPECIFICATIONS .

·

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..

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-

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.

...

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·

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• 1':-1

·

• l.

t

-

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.

.1

t

4.1

MECHANICAL DIMENSIONS

See figure 4-1 for the dimensions of the Shugart 700 Mries

drives.

163 • 0011·0.02

141 • • 0.31-0.5)

-~

\------

SIDE Z

+ t

1.00

1203.2) MAX - - - -

038 : 002

It I : 0.5)

. . .

3.12 : 0

171.3 :

0.,

-"1.

----------T

SWAY SPACE

007511 9) MIN·

1-32 MOUNTING HOLIS ca • • o

5 II • 0031· 001

114t • • 01

02)

- e -

BonOM I

·CLEARANCE OF .O~ (3.•,0) MINIMUM IN THE Z

DIRECTION AND 01 MINIMUM FOR THE Y DIRECTION

MOTI: ••

1 I • I ' • 1ft

, • • • I • . • • • • fftm

MUST BE Pf'OV10ED FOR MACHINE SWAY.

*

FIGURE 4·1.

MOUNTING DIMENSIONS

5~ • 002

1131 7 : 0 ~J

~ 7~

C1~0

• 0

01~

• 04.

013

"I!

0015

(3.3

I 0 •• t

" a

"

• - I

"

• ,:'.1

• s.02

(21.1)

~·12.c

o

4.2 MOUNTING

The 706/712 drives are capable of being mounted In any position.

CAunON'

,These drives must 1),e mounted wtth four machine screws. The screws may be installed

In either the vertical or horizontal plains into the Iide rads. The saews must to ten inch/pounds. The required sway space is 0.075

inch.

be torqued

( c

C

(

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C

C f f f f

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4·2

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SECTION V

MEDIA DEFECTS AND ERRORS

.

...

.

.

-

..

'

.

,

5.1

ERROR MAPPING AND

QUALIFICATION

In high density digital recording storage systems, it is necessary to Increase rellabdlty and Improve operational performance.

This is done by providing an error detection and correction scheme.

For disk storage systems, the predominant error pattern is a burst of etlon occuring in one or more

tracks·.

These errors are drop-outs (absent bits). drop-ins (bits added)

1 or bits shifted from their nominal position beyond the tolerance of the data separator.

5.1.1

CauH8 of Errora

The following conditions may result in errors: a.

Marginal signal to noise ratio of the read/write circuits.

b.

Marginal characteristics of the me~ia and the read/write heads.

c.

Mispositioning of the read/write heads on the disk.

d.

Defects or imperfections in the disk media .

5.1.2

Error Definition

An can error is a discrepancy between recorded data and original data. There be transformed into a "1" or vice versa.

can be an extra or missing bit. i.e ..

a ·'0·'

Errors fall into two categories: "hard" or repeatable. Soft errors are often caused

"soft.·, Hard errors are usually the result of media defects and will be by items "a" through. "c" of paragraph 5.1.1.

and will normally not be repeatable.

.

5.1.3

Media Defect Definition

Most errors resulting from media defects are classified as hard erron.

They are attributable to small imperfections in the oxide coating of the disk, such as an impUrity within the oxide Itself.

or a saatch on the surface of the Oxide coating.

As the storage size and density of information lnaeases.

th.M

defects become more apparent to the system. Winchester technology utilizes a higher bit packing ratio than older types of drives and is therefore more susceptible to this type of error.

t

..

5·1

(J

5.1.4 Error Map

All drives are scanned for hard etTon during the manufACturing process.

AU hard errors (media defects) are logged and an error map is attached to each drive. Each defed listed contains the foUowing information a.

Track number

I b.

Head number c.

Byte

I .

count accurate to ± 4-bytes (Indicates the defective bytes as a location from physical index) d.

Length of defect in bits

The error map accompanying each drive will typically provide the locations of more hard errors than will be detected by the user system. There are situations, however, where a magnetic anomaly or extra defects caused by improper handling may cause an error that is unique to a particular format or bit pattern. Such a itself as a hard error, in addition to those reported on the error map. In the mended that the defect be added to the error map and mapped out.

.

flaw may present event this situation occurs, it is recom-

5.1.5

Uaer Error Mapping

Occasionally, errors shown on system.

the error map~ supplied with the drive will not show up as errors in the user's

Similarly, the user may find hard errors In addition to those on the error map dUring the user's functional tests

The recommended method of mapping is to aeate a defect directory at cylinder 00. This directory should include the locations of all defective areas, as well as alternate track assignments for those areas.

5.2

ERROR ACCEPTANCE CRITERIA

The drive, as received from the factory. wUl'meet the following error criteria: a.

No disk will have more than ten defective tracks.

Of these ten tracks. no more than three will contain multiple defects. Additionally, track 00 of ,all heads Is g~anteed to be error free.

b.

Errors separated one error.

by less than 20 bytes from beginning to end.

or less, 20 bytes long, are considered

5.3

SYSTEM GENERATED ERRORS·

It should be noted that errors may also be present as a result of system electrical noise, marginal timing conditions, ground loops in the dc power distribution cable. electro-magnetic interference, radio frequency interference, etc.

)

5·2

•

-. J

-

I

~

•• J

...

'.

(" -'

-:

..

.'

...

SECTION

VI

RECORDING FORMAT

..

..

.

-

•.

-

.~

-

..

..

..

..

-

.

..

6.1

TRACK fORMAT

The pupose of a format is to organize a data track Into smaller, Mquentlally numbered blocks of data called sectors.

The 706/712'5 format is a soft sectored ten identification type.

which means that the beginning of each sector is defined by a prewrit-

(10) field which contains the physical Hctor 'address, plus cylinder and head information. The 10 field is then followed by a user data field. '

"(

The soft sectored format is a slightly modified version of the IBM system 34 double density format commonly used on 8-inch floppy disk drives. The encoding method used here Is modified &equency modulation (MFM).

Figure 6-1 shows each track divided Into 32 sectors. Each sector has a data field 256 bytes in length. However, if sector interleaving is used, Gap 4 can be reduced to 32 bytes minimum to accommodate 33 sectors per track.

If sector interleaving is not used, and 33 sectors are desired, Gap 3 is 25 bytes and Gap 4 becomes 26 bytes

, minimum.

1~~fXJ1-----------------fl\..-------------------_rL

G»' SYM:

I

22 a

'.e

2M • USER DATA

~

10 ....

w~ITE

UPDATE - - - - - - - - - - - - - -

NOTES:

1.

MINIMUM TRACK CAPACITY 1CM11IYTES.

2.

WRITE TO READ RECOVERY TIME • • MICROSECONDS.

3.

HEAD SWITCHING TIME • • "MICROSECONDS•

FIGURE 8·1.

TRACK FORMAT

The beginnings of.

both the 10 field and the data field are flagged by unique characters called address marks .

An address mark is two bytes in length. The first byte is always ali "At" data pattern. This is followed by either an

"FE" pattern which is the pattern used to define an 10 address mark. or an MFS·· which is a data address panern.

The MAl" pattern violates the encode rules for MFM by omitting on 'clock transition between bits 4 and 5.

This makes the address mark panen unique to any other serial bit combination.

AllID and data field are followed by a 16·bit cyclic redundancy check (CRC) character used for data verification.

Each eRe polynomial is unique for a particular data panern.

Surrounding the 10 and data fields are gaps called Intenecord gaps.

6.2

GAP LENGTH CALCULATIONS

C,

6.2.1

Gap 1

The purpose of Gap 1 is to provide a head switching recovery period 10 that. when switching from one track to another, sequential sectors may be read Without waiting the rotational latency time. In ~ddition.

Gap 1 allows

8·1

physical position "drift" of the index pulse as a functton of drive ~emperature.

Gap 1 should be at least 22 ~1es (30 bytes recommended) 10llg to correspond with the head switching time and index drift.

Gap 1 is immediately followed by a sync field for the 10 field of the first sector.

6.2.2

Gap 2

Following the 10 field. and separating it from the data field, is Gap 2. Gap 2 provides a known area for the data field write update to occur. The remainder of this gap Also serves as the sync-~p area for the data field address mark. The length of Gap 2 is determined by the data separator lock-up performance.

6.2.3

Gap 3

Gap 3, following the data field. is a speed variation tolerance area.

This

aUows for

a

situation where a track has

I been formatted while the disk is running two percent slo'.uer (3531 rpm).

then write updated with the disk running at highest speed (3603 rpm).

Gap 3 should be at least 15 bytes In length (this includes two bytes for write tum off).

6.2.4

Gap 4

Gap 4 is a speed tolerance buffer for the entir4 track.

This allows the disk to rotate at the highest rated speed without overflowing the track dUring a format operation. The format operation which writes the 10 fields, begins with the first encountered index and continues to the next index.

6.3

WRITE PRECOMPENSATION

Whenever two bits are written in close proximity to each other, a phenomenon called pulse superposition occurs, which tends to cause the two bits to move

away

from

each

other.

This

is a large factor contributing to bit shift. Other phenomena such as random noise, speed variation.

etc .. will also cause bit

shift,

but to a lesser degree.

The

effect of bit shift can be reduced by a technique call precompensation,

which.

by detecting which

bits

wUI occur early and which bits will occur late, can effectively minimize the shift by writing these bits in the opposite direction of the expected shift. Bit shift is more apparent on the innermost dat tracks due to pulse crowding. Therefore.

precompensation should only be at track numbers greater than or equal to 128.

The optimum amount of precompensation for a 706/712 drive is 12 nsec for both early and late written bits. Table 6-1 shows various bit patterns for precompensation. Precompensation pattern detection bits are shifted through a 4-bit shift register.

The bit is written out of the third position.

1( TABLE

~1.

WRITE' PRECOMPENSATION

WRITE POS,nON o 0 0 0

000 1

001 0

001 1 o

1 0 0 o

1 0 1 o

1 1 0 o

1 1 1

100 0

100 1

101 0

10' 1

1 1 0 0

1 101

1 110

111 1

DtREcnON OF SHIFT

::

=

ON TIME CLOCK

=

LATE CLOCK

=

ON TIME DATA

=

EARLY DATA

::

= LATE DATA

:: ON TIME DATA

=

EARLY CLOCK

:: ON TIME CLOCK

:: ON TIt.4E DATA

::

::

=

LATE DATA

;:; ON TIME DATA

BIT IS WRITTEN CUT OF THIRD POSITION 310»24

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SECTION VII

CUSTOMER INSTALLABLE OPTIONS

7.1

FUll-HEIGHT FACEPLATE KIT

One of the customer instaUllble options currently available for the Shugart 706/712 disk drives is the Full-height

Faceplate Kit, PIN 061597-0. See figure 7-1.

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TORQUE SCREWS. B • TO 10 IN.-LIS.

TORQUE FRONT PANEL MOUNTING SCREWS A TO 2.5 IN.-LIS.

FIGURE 7·1. FULL HEIGHT FACEPLATE KIT

7-1

7.2 LOW-POWER SLOW START JUMPER

In

certain system configurations It may be desirable to use a Low-Power Slow Start mode of initialization of the drive.

In cases when this Is

necessary.

the mode can be selected by grounding pin 13 of the microprocessor.

( )

On early versions (i.e.

t

MLC 4 only) of the between pins 12 and 13. See figure 7-2.

706/712 PCB (PIN 26141 and 26159)

.

this is accomplished by shorting

PIN 12 PIN 13

•

(SHORT THESE PINS)

FIGURE 7·2. LOW POWER OPTION (EARLY MODELS)

On later versions (MLC 5 and above) It Is

PCB.

See figure

'-3.

necesSary to fabricate a

amaD

Jumper and install it in location E3 of the

.

(

3

NOTE: The ends of the jumper should be cut to a chi,el point to pierce the socket insulation.

FIGURE 7·3.

JUMPER INSTALLATION AND FAB.RICATION

In each of the above applications. grounding board is not necessary.

is to be applied to the solder sid. of the PCB.

and removal of the

7·2

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SECTION VIII

THEORY OF OPERATIONS

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8.1

INTRODUCTION

All of the tasks of the PCB miaoprocessor are separated into the following groups: a.

High priority time aitical tasks b.

Lesser priority time critical tasks.

c.

System initialization tasks

POWER

ON

RESET

.

-

SPINDL£

BRAKE t

STEPPER -

MOTOR ~

CONTROL

~

~

CONTROLLER

......

~

110

LOGIC

AIW

LOGIC

-

~

~

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PRE-AMP

•

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FIGURE '~1.

LOGIC DIAGRAM

8·1

SPINDLE

MOTOR

CONTROL

~

~

STEPPER

MOTOA

SPINDLE

MOTOR

~O'

8.2

HIGH PRIORITY CRITICAL TASKS (fOREGROUND)

The high priority time critical tasks consist of the following: a.

Generate the

spindle

motor

waveform

and measure

the

revolution time.

b.

Deted and accumulate the step pulses from the Interface.

c.

Generate the stepping waveforms applied to the stepper motor, ramping (up and down) including pulse width modulation.

and perform the

actuator

velocity d.

Time out the actuator damping interval.

These tasks are updated once each 90 lisec by using the mlcroprocessor'slntemal timer to generate each update.

These tasks cannot be Interrupted by another task while they are being executed.

an

interrupt for

The set of program routines associated with these task.

II collectively caned the

IIforeground."

Foreground routines are arranged so that forming any necessary they will sequlntlally,.xlcute'one after the other, with each routine peraction, then handing control to th. next routine. The last routine turns processing over to other tasks until the next timer interrupt anives, at which the foreground process starts over. See figure 8-2.

The folloWing subparagraphs detail the actual foreground routines.

8.2.1

Foreground

Loop Control

This is the entry point for the 90 routines. Refer to paragraph 8.3.

lisec Interrupt requelt which II set up at the beginning of the "background"

This routine saves the accumulator, clears the timer interrupt flag, and updates the background gate counter. Control then passes to the Spindle Motor Foreground.

8.2.2

Spindle

Motor Foreground

This measures the revolution period in lnaements of foreground time by being triggered by INDEX.

It then generates a Pulse Width Modulated (PWM) waveform to control spindle motor power. Control now passes to

Motor Fault Foreground.

,8.2.3

Motor

Fault

Foreground

This routine determines if the spindle, motor speed is correC1.

and Interrupt Return routine and

Buffering Fundion.

If It is not, controlls passed to the Foreground End all seek fundions are skipped..

If speed is correct, control passes to the Step Input

.

8.2.4 Step Input Buffering

Function

If Step Input is not enabled, this means that actuator seek.

are stilltn process, In which case this routine exits immediately to the Stepper Damping Time Out routine.

If

Slip

Input

is enabled,

this

routine adds any additional steps to the total step count; the directioJ:\ls saved: the Step Input flag

'I disabled: and the Ramp Calculate flag is set true.

Control will then pass to the Stepper Damping Time Out Routtne.

8.2.5

Stepper

Damping

Time Out

Routine

Damping can

(Background).

be enabled through the Seek Function Foreground or Actuator Lubricant Unstick Routine

If it is not enabled, the routine exits to the Seek Function Foreground. U it is enabled, the actuator is decelerated somewhat with a track arrival delay. This is followed by an additional settling delay which also allows checking for any additional step pulses. If any more step pulses are received, the routine exits early without Setting

Seek Complete true. Exit is made to Seek Fundion Foreground.

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INTERRUPT

REQUEST

VECTOR

OCD1 IENTRY

FOREGROUND

LOOP CONTROL

EVERY 10 liMe occe

SPINDLE MOTOR

FOREGROUND

0003

MOTOR FAULT

FOREGROUND

ERAA

STEP INPUT

BUFFERING

FUNCTION

Oc.A

DAMA

STEPPER DAMPING

TIME OUT

ROUTINE

0078 seEK FUNCTION

FOREGROUND

SEEK

IEXIT

FOREGROUND END

AND INTERRUPT

RETURN

~IGURE

1-2.

FOREGROUND ROUTINES SEQUENCING

8-3

8.2.6

Seek FunctioD Foregrouacl

The seek flag is set from the Seek Ramping Calculate Function (background). U the seek flag is set, then a step delay is provided to allow time for step settling. Uthe delay is not done. then the routine exits to Foregr~und End ) and Interrupt Return. Otherwise the routine gets a ramp table value and determines if ramping is up or down.

It ramping is down and seek is complete. then the actuator slew vohage Is tuned off; the seek fuetion is disabled; and the damping fuetion is enabled.

If seek is not complete, and rarpping is up or down, then step timing is saved: direction is determined; the cylinder address is updated: the new stepper phase is output on port B (see table 8-1); and the routine exits to Foreground

End and Interrupt Return.

.

TABLE 8-1.

I/O PORT CONFIGURATION

PORTA

PORT B

PORTe

PORT D

PIN NO.

PA7

PA8

PA5

PA4

PA3

PA2

PA1

PAO

PB7

PB6

PB5

PB4

PB3

PB2

PBl

,PBO

PC7

PeS

PC5

PC4

PC3

PC2

PCl

PCO

PD7

P06

POS

P04

PD3

PD2

PD1

PDQ

AssiGNMENT

+OIA

+ TRK 000

+ FAULT

-FAULT CLEAR

-READV

+ SeEK COMPLETE

UNUSED

... INDEX (

+

EDGE)

+COILA

+ COIL B

+ COIL C

+ COIL 0

-STEPPER ENABLE

UNUSED

UNUSED

UNUSED

-SLOW SPIN-UP

+ REDUCE IW

-RUN SPINDLE

+ BRAKE PICK

+ LED

UNUSED·

UNUSED

UNUSED

+SEL

-DELAY

-EXERCISE

+ ACTUATOR SLEW

· ... STEP INPUT COUNT 0

+.

STEP INPUT COUNT C

+ STEP INPUT COUNT B

+ STEP INPUT COUNT A

39~2·oe

8.2.7

Foreground End and Interrrupt Return

This routine simply restores the accumulator from the stack and returns to the background.

8.3 LESSER PRIORITY CRITICAL TASKS (BACKGROUND)

The less time critical tasks are referred to as the "background" and are performed in between foreground interrupts, after the last foreground routine has ended, but before the foreground restarts. Average foreground execution time is approximately 55 Ilsec; therefore, out of every 90 psec time period. the background has about 40 I£sec to perform its tasks.

The background tasks are arranged sequentially like the foreground. however the last background routine hands control back to the first, thereby establishing a continuous loop. For co.nvenlence in timing certain non-critical events, the background loop rate in made self-synchronous with the foreground.

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This is accomplished by allowing

the

beginning of background loop execution t~ proceed only on every fifth foreground interrupt. Therefore, background loop execution time is 450 p.SeC

(5 x 90 I£Sec). The only exception to this Is that the spindle motor background control routines ar. exempted from this "gating" process In order to minimize control system phase error.

The less time atticaJ tasks consist of the foUowing: a.

Calculating the duty cycle of the spindle motor power waveform·, based upon the measured revolution time.

b.

Monitoring the disk revolution time to generate the Drive Ready signal to the interface, and to determine if spindle motor fauks

have

occurred.

c.

Determining the necessary ramp-up and ramp-down parameters to perform a seek, given the step pulse count as received from the interface.

d.

Performing the automatic actuator reset to cylinder 0 dUring the drive power-up.

e.

Moving the actuator a fun stroke in and out twice In order to distribute the actuator bearing lubricant dUring drive power-up.

f.

Self-exercising the actuator with continuous drive exercise jumper has been Installed.

random seeks and checking for seek errors when the

The following subparagraphs detail the actual background routines. See figure 8-3.

8.3.1

Sy.tem Startup Code

This code initializes the stack pointer and binary arithmetic mode with the foUowing results (see table 8·1):

Cl.

On Port A the READY and FAULT flags are set to false. and the FAULT CLEAR line is momentarily pulsed true.

b.

On Port B the stepper coil bits are put Into Phase A and the Stepper Enable is made· false.

c.

On Port C, Reduce Write Current and Brake Pick are tru~; Run Spindle and LED are false.

d.

On Port 0 the Aduator Slew is false.

On

aU

four ports, all bits not assigned as outputs are coofigured as Inputs.

The routine then jumps to Spindle Motor InltlallzaUon .

8.3.2

Splndl~ Motor Initialization

This routine initializes the spindle motor control conltAnts and variables. The spindle brake is held at high current for about one second. Brake power is then reduced and the .pindle motor is ramped up to 100 percent for about 8 seconds, using pulse width modulation.

FuU spindle power is held for an additional X seconds while the spindle index Is counted.

If X or more Index pulses have occurred, then control goes to Seek Function Initialization. otherwise there is a spindle failure and control goes to the Miaoprocessor Control Fauh Indicator function.

8·5

SYlE... STAAT

PORT PAE.

0878

SPINDLE MOTOR

IN'T

IMTA

YES

0822 FAULT

,.P

CONTROL

FAULT

INDICATE

FUNCTION

0917

SEEK FUNCTION

INIT.

INIT COOE END

INTERRUPT TIMER

ENABLE

095B

SPINOLE MOTOR

BACKGROUND

MTRB

NO

MOTOR STATUS

MONITOR yel

WARM UP

SETTLING

EXTN COUNT DN

OA3O IKGA

SYSTEM

LOOP

IACKGND

CONTROL

NO

'YES

DRIVE ACTUATOR

SELF·EXERCISE

FUNCTION

YES

ACTUATOR LUBE

UNSTICK ROUTINE

LUBA

AUTO ACTUATOR

RESET TO TRK 0

AREA

Losa 0" INDEX

MONITOR

VES

CYLINDER

ADDAI

R£ZERO MONITOR

OA5E "AMe

SEEK AAMPtNQ

CALCULATE fUNCTION

WAITE CURRENT

CONTROL FUNCTION

OCl8

DRIVE SELECT

L£D MONITOR

LED

OCCE

BACKGROUND

COOEEND

SKEND

FIGURE 8-3. BACKGROUND ROUTINES SeQUENCING

8·6

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8.3.3

M~croproc ...or Coatrol Fault ladlcator FUDCtI~

f

This

routine removes power to the spindle motor and Rapper motor;

th8

foreground interrupts are

halted,

and the .

READY line

is set false.

The FAULT latch

Is

pulled and:

a.

If no jumpers are InstaUed, or

If

the delay Jumper and the LED is flashed u shown In tabl. 8-2.

(EI) 1I1nstaDed.

then aU motor power II removed b.

If only the exeidse Jumper (E2) IIlnstaU8d.

then the microprocessor returns to System Startup and restarts.

TABLE 1-2.

LED FAULT CODeS

IOURCI Of FAULT ..

HUMBleR OF FLASHES

RESERVED.

1

RESERVED.

2

6

7

3

~

5

SPINDLE FAILED AFTER ACHIEVING FULL SPEED SUCCESSFULLY.

ACTUATOR FAILED TO RESTORE TO CYUNDEA ZERO.

ACTUAl:oR seEK ERROR DETECTED DURING DRIVE SELF-EXERCISE.

LOSS OF SPINDLE INDEX SIGNAL

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8.3.4

Seek Function Inltlallzatloa

This

initializes the aduator seek

function control constants

and

variables. The

routine then goes directly to Initialize

Code End.

8.3.5

Initialize ~de £ad

This starts the 90 ".sec

foreground intenupts. and directly to Spindle Motor Background.

th.

system enters the continuous background

loop

by

going

8.3.6

Spindle .Motor Background

This takes the index time flag, passed from the foreground, and determines If the speed is correct.

If it is, no changes are made and the routine goes

to

the Motor StatUi

Monitor.

If the speed is not correct. the Index time error 11 lntegr.ted

and added to the current index time error to ~etermine and set the motor power factor.

The

routine then goes to the Motor Status Monitor.

8.3.7

Motor Statua Monitor t

This monitors the index time to determine if the motor speed II out of tolerance. It sets the FAULT line to true if the speed varies more the :t 1.61 percent for six revolution•.

Uthe speed drops below 92 percent for more than ten revolutions. the routine jumps to Control Fauk Indicate Fune:tton (paragraph 8.3.3). otherwise it ~s to the Warmup Settling Extension Countdown.

.

8.3.8 Warm-up Settling ED....loa Couatdo...

A countdown of two minutes allows drive warm-up time and provides longer seek settling time during warm-up.

The

routine then goes to System Background

Loop

Control.

8·7

8.3.9

Syatem Background Loop Control

If five 90 Jolsec foreground loops have occurred since thal.5t

time thiS funetton was entered, then control proceeds to Loss of Index Monitor; otherwise control goes back to Spindle Motor Background (paragraph 8.3.6).

8.3.10

Lo.. of Index Monitor

If INDEX has not occurred during the last 115 msec. then control goes to the Control Fault Indicate Function

(paragraph 8.3.3); otherwise control proceeds to Cylinder Address Rezero Monitor.

.

8.3.11

Cylinder

Address Rezero Monitor

If the actuator is on cylinder 0 and the exercise jumper (E2) is not installed. then the cylinder address variables are set to zero; otherwise control proceeds to the next step.

8.3.12

Seek Ramping Calculate Function

If Ramp Calculate is not enabled by either the Step Input Buffering Fundion (paragraph 8.2.4) or the Drive Actuator Self-exercise Function (paragraph 8.3.13). the control proceeds to the Drive Actuator Self-exercise Function.

.

If Ramp Calculate is enabled.

it accepts the step sum and direction of inputs and produces the necessary seek control values to effect a buffered seek. The actuator track zero flag i.

monitored and outward seeks from cylinder 0 are inhibited. unless the delay jumper (E1) is installed in which

CASa such seeks are allowed (this facilitates the adjustment of the crash stop and track zero flag).

.

If the exercise jumper (E2) is installed. the aduator cylinder address variable will flag to detect possible seek errors during self-exercise.

be compared with the track zero

If seek errors are detected. control goes to the Control Fault Indicate Function (paragraph 8.3.3). otherwise control passes to Drive Actuator Self-exercise Function.

8.3.13

Drive Actuator Self-exercl8e Function

If the exercise jumper (E2) is installed then this routine uses its internal random number generator to create a continuing series of pseudo-random seek values which insure full disk coverage dUring exercise.

If the delay jumper (El) is not installed. this function will delay itself for 10.msec; if it is installed. the delay will be

500 msec. If the exercise jumper (E2) is not installed the control proceeds to Actuator Lube Unstick Routine.

8.3.14

Actuator Lube Un.tlck Routine

This routine is enabled by a flag passed hom the Automatic Actuator Reset to Track Zero function. otherwise

.known·as Recal (recalibrate).

It seeks from cylinder 0 to the end cylinder and back twice.

It enables the damping function when done, and control passes to the next step .

. 8.3.15

Automadc Actuator Ra.t to Track Zero (Ree.1 Function)

Upon system start. the Seek Function Initialization (paragraph 8.3.4) sets the Recal Aag (RCFLG) to indicate that the actuator arm has not been calibrated to track zero and to provide for a ten revolution delay before Recal. The

Motor Status Monitor (paragraph 8.3.7) checks to see of the unit has been recalibrated.

If not. it checks the disk revolution period to see if the disk is running fast enough.

If it is.

RCFlG is incremented once each time the Motor StatuI Monitor is entered. After ten entries. i.e., ten disk revolutions. RCFLG is incremented to zero.

If

it is not, the routine Is exited. If it is, the actuator is stepped outward

512 steps or until track zero is found.

The Actuator Lube Unstick Routine is enabled by setting the LUBE flag (paragraph 8.3.14) and control pasSes to the Write Current Control Function.

.

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8.3.16 Write Current Control

Function

+ REDUCE IW lignal on port C. bit 6 high. when the t This routine sets greater than the write cUlTent switchovcr point

(WRITS~).

See table 8-1.

cybnder address (TRKL and TRKH) is

The routine' then passes control to Drive Seled LED Monitor.

8.3.17

DrIve Select LED Monitor

This function checks port 0.

bit 7 (+ SEl).

to see

BKPC (port C Backgroung Bit Control) Is set high.

If It is high: Indicating that the drtve Is selected. U it Is.

If bit 3 in

+ SEL is low, then bit 3ln BKPC is set low. See table 8-1.

Control now proceeds to the next routine.

8.3.18

Background Code End

This routine merely jumps to the beginning of Spindle Motor Background, continuing the background loop.

8.4 SYSTEM IN_TIALIZATION

TASKS

System initialization tasks are performed only once for each are completed.

the microprocessor foreground interrupts are started and control restart. Once most initialization tasks

I.

given to the continuous background loop. Reand make use of its time (as gated in the maining initialization tasks are completed in the background loop foreground) to time necessary events.

These initialization tasks consist of: a.

Setting up the miaoprocessor into the proper initial state.

internal registers and placing the various input and output pins of such b.

Clearing the drive fault latch.

c.

Applying power to the spindle motor and verifying that It begins to rotate properly.

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8·91 8·10 (blank)

SECTION IX

PACKAGING INSTRUCTIONS

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9.1

UNCRATING

Due to the integral spindle actuator lock, no spec14llnstrudlonl for unaating or packaging are required.

The Shugart 706/712 drives are shipped in two manners .. follows: a.

A single unit In a single carton (figure 9·1).

b.

Ten units in a single carton (figure 9·2).

It is suggested that packing materials be kept in case the unit must be returned to Shugart for repair.

Regardless.

the unit must be indiVidually packaged in comparable packing al shipped to preclude damage in shipping and handling. Damage to the unit as a result of inadequate packaging will void the warranty on the unit.

Inspection of the unit(s)" should be made in accordanc.

,

9.2

RECOMMENDED RECEMNG INSPECnON

with

the spectfications of paragraph 9.2.

9.2.1

Packaging and Identlftcatlon

The individual and paUeted containers should be inspected for exterior damage.

Each shipment contains a packing slip, listing as a minimum the Customer Purchase Order Number, quantity. stock number, dash level, and MlC level.

Each

unit

is individually protected

as shown

In

figures 9-1 and 9-2.

The container should be free of foreign matter and clean.'

9.2.2

Mechanical IDapec:tloa

The following visual checks should be made for eAch unit: a.

Verify

the model number,

serial number.

and b.

Check for loose saews and sub-assemblies.

MlC

level.

c.

Inspect for loose connectors or missing

Jumpcn.

d.

Check for exposed wires on cables and conn.eton.

9·1

FIGURE 9·1. SINGLE UNIT PACKAGING CONFIGURATION

9-2

:~ f t t f t t t t t t t

,

,

, f

, f

~

~t

E t f

~ t

C

3: t f

, t t

~.

FIGURE 1-2 TEN UNITS PACKAGING CONFIGURATION

9·3

( t

"9.2.3

FUDetiODU

latinS

Shugart recommends using the

ACe

T

-650

Tester wtth Lev.1 E-6 Software.

This tester Is speCiaDy programmed for

aU

5.25 and 8-inch fixed disk products.'

()

The functional tests performed by the

ACe

Tester arc as follows: .

o

: I

Prompt character and Indicates the program is rcady to accept

Commands

from the user.

IP = Inspect Phase command code is availAble for displaying the contents of a phase.

PP = Print Parameters. See table 9-1

TABLE

8-1.

PRINT PARAMETERS

STEP RATE ( )( 0.1 MS)

MARGIN CODe

MAX. HEAD

STEP MODE

MAX. CYLINDER

MAX. ERROR eNT

BUFFER ERROR RETRY LIMIT

PRECOMP START CYLINDER

LOW WRITE I START CYLINDER

DENSITY MODE

The following example (table 9-2) is a print out ~f th~ test program with the Printer Option for the ADC.

TABLE e.2.

TeST PROGRAM

WHICH PHASE?

0 a30

11

3

:a 3

:=

:s

0

319

:a0

=

5

.128

=200

:a 1 MKM 32+256 aG·"

() ( f t t t t t f t f f

MSJ

TMI

P21

F1/

WT/

ATI

RRI

RV/

WAJ

RAJ

WCJ

TMI

HOI

PKl

4

1

,.

1

1

1

500

1

1

1

1

1

1

353

I

SET MARGIN CODE

TEST MARGINS

=

3

SET WORST CASE PATTERN

FORMAT DISK DENSITY 1

WRITE DATA INTEGRITY TeST.

READ DATA INTEGRITY TEST

RANDOM READ DATA TeST

READ REveRSE TeST

OVERWRITE TEST

OVERREAD TEST

WORST CASE seEK TEST

TEST MARGINS

HOME THE DRIVE

MAX CYLINDER

( t

( f

9.3 PACKING FOR RESHIPPING

To prepare a drive for shipment: a.

Locate the heads to the Shipping Zone (refer to para.

1.4.8).

b.

Place the drive in the proteetlve plastic sleeve.

c.

Place this configuration Into the inner container.

d.

The inner container is to be sandwiched between the foam inserts.

e.

The entire array is then placed Into the outer container and Haled.

Failure to follow these procedures may result in damage to the drtve(s).

9-~

0 t

E

E

~ t

~ t

~

, f

,

,

,

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•

• "

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)

-1.1

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SECTION X

DRIVE INTERCONNECT

• • J

·

- • oJ

· • .1

• J

-

.J

- • J

·

• J (

...

)

• J

·

·

]

·

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J

·

·

-

.

~

.

.

•

· · ..

'

· ·

.

.

.

·

..

-

.

..

~

..

·

· ..

--

.

-

·

,

.

(

.)

· ·

·

.

-

·

.

-

..:

The electrical connection between the Shugart 706/712 and the controi system Is shown

chain configurations, the

terminating paragraph 2.3.

in

figure

10-1.

For daisynetworks

must be

r.moved

from

aD but the last

drive

in

the

chain.

Refer

to

HOST

7061712

J6

JI

DRIVE 1 -

J1

CONTROlLER

------

DATA SEPARATOR

DC

POWER

(

"-

(

J5

JI

DRIVE 2·

J1

J5 ,

Je

DRIVE 3·

J1

J5

Je

DRIVE ~

J1

-TERMINATOR NETWORK REMOVED

*

FIGURE 10-1.

MULTIPLE DRIVE CONFIGURATION

10-1/10·2 (blank)

.

-

•

.

-.

&

·

,

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-

• !, •

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,

--.

.

• r 1

SECTION

XI

'SPARE PARTS

t

L

.

,

:

:

:

=

Shugart Corporation, in its commitment to sional Spare Part/Logistic support provide service to Its customers, has available group to support the OEM cUllomer a dedicated and profesbase as well as the end user.

t

11.1

ROUTINE ORDER ENTRY

TWX, or by mail. AU verbal orders before the order is processed

In the U.S. may be placed with for confirmation or shipment.

Shugart Corporation

Routine orders (domestic open accounts) boo~ed as received but will require confirming by phone. facsimile.

purchase documents

Spares)

PHONE:

(408) 737-7900 (Ask operator for

(910) 339-9355

TWX:

.-

FACSIMILE:

(408) 735-7486

MAll:

Shugart Corporation

475 Oakmead

Parkway

Sunnyvale. CA 94086

ATIN: Spare

Parts Dept.

11.2

EMERGENCY ORDER ENTRY

Requests for parts required on an

. TWX or phone.

emergency basls

Be particularly, careful to ensure should be communicated that all applicable information to is

Shugart Corporation by either communicated.

11·11 11·2 (blank)

SECTION XII

MAINTENANCE

12.1

INTRODUCTION

The Shugart 706/712 has tion been designed to require no maintenance under normal operating conditions. This sec· will discuss those steps to be taken in the event of a .drive malfunction.

12.2

MAINTENANCE EQUIPMENT

The only equipment required ls procedure.

an ADC T-650 Tester and an oscilloscope.

Refer to paragraph 9.2.3.

for ADC test

12.3

DIAGNOSTIC TECHNIQUES

The 706/712'5 are eqUipped with a self-exerciser that supplements any diagnostic requirements.

12.4 TEST POINT LOCATIONS

Although test points are evident on the testing is reqUired of the end user.

PCB.

these are used for testing during the manufacturing operations. No

12.5 TROUBLESHOOTING

Tables 12.1 through 12.3 show the procedures for determining possible problems.

TABLE 12·1. PCB VERSUS DRIVE FAILURES

DESCRIPTION

MOST ERRORS OCCUR ON TRK 00

PROBLEM IS IN

THE DRIVE THE PCI'S

X

EXTERNAL

ERROR OCCURS ON TRK 317 X

WRITE FAULT IN WRITE MODE

ONLY SELECT HEAD 0 AND HEAD 1 NOT HEAD 2 AND 3

SYSTEM TIME OUT ERROR·

DRIVE UNABLE TO COME UP TO SPEED·

:

X

X

X

X

X

X

DRIVE NOT RUNNING TESTS WITH OTHER FIXED DRIVES·· X

BRAKE NOT FUNCTIONING RIGHT··· X

GND BUTTON NOISY X ~

-TRY WITH KNOWN GOOD PCS'S. IT COULD BE THE DRIVE OR PCS'S.

·-MAKE SURE TO CHECK THAT THE PCS'S HAVE DRIVE SELECT JUMPER AND TERMINATING JUMPERS.

---ADJUSTMENT OF BRAKE IS VERY IMPORTANT. USE 20 MIL SHIM FOR PROPER ADJUSTMENT BETWEEN BRAKE

AND SPINDLE.

12·1

fABLE 12·2. INSPECTION OF THE DRIVE"

DESCRIPTION

COVER DAMAGE/BEND IN COVER ETC.

,

LEAK IN THE COVER GASKET

CUT IN THE FLEX CABLE OR 1fRACES BROKEN IN FLEX CABLE

"

. t

.

,

,

'.

# 0•

..

'

~.

.

' °.'0 0 • • ,-

,

.

,

PR08LEII IS IN .

l\~<'-:.

THE DRIVE THEPCa..

EXTERNAL

X

X

X

PeS·S SMOKED/BURN OUT X

MISCELLANEOUS BROKEN PARTS X

X

X

X

X

X

NOISE FROM HDA MAY BE OUETO: HEAD DAMAGE

BAND BROKEN

DISC NOT CLAMPED

NOISY

DAMPER LOOSE

SPINDLE MOTOR

DRIVE NOT COMING UP TO

ON LEO

SPEED~

COUNT THE NUMBER OF FLASHES

1 TIME

2 TIME (NOT ASSIGNED)

3 TIME

4 TIME

5 TIME·

6 TIME

7TIME

-TRY WITH KNOWN GOOD PCS'S.

--MOST LIKELY THE POWER SUPPLY.

X

X

X

X

X

X

X··

3t'02·14

TABLE 12·3. SIGNALS INSPECTION

CHECK THE DIFFERENTIAL SIGNAL ON TP11 AND TP12 IN BOTH WRITE AND READ MODE ON ALL THE HEADS AND

RECORD AMPLITUDE AND RESOLUTION.

..

'

PROBLEMaSIN

DESCRIPTION

SIGNAL LOOKS OK ON SOME HEADS AND NOT ON OTHERS

SIGNAL LOOKS GOOD ON TP11 AND TP12 AND NOT ON TP1.

AND TP16

THE DRIVE THE PCB'S EXTERNAL

X·

X

DRIVE NOT HANDLING DATA

WRITE FAULT WHEN TRYING TO WRITE

X

X

X DRIVE NOT SEEKING

SIGNAL LOOKS GOOD ON TPll AND TP12 DURING WRITE MODE BUT

NO SIGNAL DURING READ MODE

X X

12.6 CHECKS AND ADJUSTMENTS

The only adjustment necessary to the 706/71215 brake adjustment after instaUlJ1g

The foUowing steps define the procedures to be followed (see figure 12·1):

a

new PCB, or when

necessary.

a.

With the control PCB Is Its normal position, note that the brake pad and spindle motor can be seen through the slot opening.

b.

Loosen the five saews securing the PCB to the drive: do not remove.

)

12·2

-

.

•

••

:

.~

:,

: ..

~

INSERT SHIM HERE

~

:\ t;:;;i.

o

...

~:

~ - - _

.... '6'

~

@

@)

@)

I

•

•

•

•

· I

•

· ,

·

:

,"

,

,

.

.

.

..

• , I

,

•

·

• ,

-

I

· -

• , J

I o

•

·~.1

• , J o

~8 o

FIGURE 12·1. LOCATIONS DIAGRAM c.

Insert a flexible 0.020 Inch (0.5 mm)

.him

between the brake pad and the spindle motor. Pull the

PCB.

from the connector end, allowing the brake pad to press firmly against the shim and spindle rotor.

d.

Tighten the two screws labeled "A" to 5 'n/lb (0.56

J) without releasing the PCB.

brake pad is pressed firmly against the rotor.

Be sure that the e f.

Insert another 0.020 Inch (0.5 mm) shim under the screws labeled "8" and tighten them individually.

Remove that shim and check for a 0.01·0.02 Inch (0.3-0.5 mm) gap between the screw head and the board when light pressure is applied against the PCB. When properly fastened. the board should be allowed to ·'float tt at the connedor edge.

Remove all shims.

12·3

g.

Push the brake pad awa~J spincUe. The stroke

: ·mn the spindle ,·otor to see that the brake has sufficient stroke to about 0.020 lnch (O.~ mm).

dear the h.

After the five mounting saews have been properly tightened.

fiD the saew heads with glyptol.

12.7

REMOVAL AND REPLACEMENT PROCEDURES

I

12.7.1 Removal of Control PCB

()

The foUowing steps define the process to be followed for the removal of the Control PCB (see figure 12·2): a.

Remove and retain the five mounting screws.

b.

Lift the Control PCB and stepper t and flex circuits.

Front Panel Rall Assembly about

2 inches (51 mm)

.

.

and unplug the spindle.

c.

Remove the PCB.

d.

Replace the Front Panel Rail Assembly and mountir:'9 screws.

~

~

i

E

I

E

E

E

E

E

~

~

I

~

E

FIGURE 12·2. REMOVAUREPLACEMENT OF CONTROL PCB

12.7.2 Replacement of Control PCB

The foUowing steps give the sequence with which to install a control PCB (see figure 12-2): a.

Remove and retain the five mounting screws.

b.

c.

Place the Control PCB on the drive at an angle••••hown. to allow the cables to be plugged in.!Place ".....

lid..

rail.

but over the stand-offs.

' J

Plug In the three circuit cables.

Be sure the cllble.

are fuUy Inserted Into position.

12·4

• f •

·

,

,

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,

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,

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•• I

.

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• I ,

-:

-"

: =-

· I

•

•

·

·

-

.

..

.

•

.

•

•

•

(t

-

-

-

-

-

.

•

.

.

.

.

•

•

I d.

e.

Lower the Control PCB carefuUy on to the ..and-offs with the cables not interferring with the spindle motor.

Be

baseplate.

sure the spindle motor

cable

Is nlot sandwiched between the miaoprocessor and the

Insert the five mounting screws through the board and Into the stand-offs but DO NOT TIGHTEN

UNTIL BRAKE ADJUSTMENT IS MADE (refer to paragraph 12.6).

12.8 ALIGNMENT PROCEDURES

The 706/712 drives require no special allgnment.

12.9 PREVENTIVE MAINTENANCE

The 706/712 drives require no preventive maintenance.

(t

• r ,

• I J

4

I •

12·51 12·8 (blank)

• II

·

-~

-

·

·

·

"

-

"II

.

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: .8

-

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:

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- J

.J

SECTION XIII

ILLUSTRATED PARTS CATALOG

-

:..~

.~

-

-

•

.

.1

.

.

~

13.1 . DESCRIPTION

The Illustrated Parts Catalog (lPC)ls arranged possible. will appear directly above the parts list

10 thlt the figure will always precede the parts listing and, when or on the left hand p~ge immediately preceding it.

The first number in the list will aly/ays refer

~o the ref.renci number of the part within the figure .

Part numbers enclosed in parenthesis refer to parts belonging to a Next Higher Assembly tance only to those customers with alternate assembU...

NHA PIN c·ustomer's quantity

(NHA) and are of impor-

Following the desaiption of these parts, the designation gives the part number of the assembly to which they pertain. When assembly. these alternate parts will be used tn lieu of the part listed directly above per assembly for these alternate parts is th! I4me unless otherwise directed.

them.

applicable to the

Assume that the

When an assembly is referred to within a figure and a further breakdown referenced number will be caUed out.

is shown on another figure. then the

(t

13.2 INDENTED LEVEL

The parts list is indented to show the levels of assembly within a figure. The major assembly will always be will be indented one space. Pans within these unindented. All parts or assemblies that attach to the assembly assemblies will be indented two spaces and so on.

13.3

QUANTITY PER ASSEMBLY.

The quantity listed is the quantity used on the major assembly. Major assemblies quantity listed.

· themselves wiD never have a

• .1

_ II

: '.i

13·1

I

Tf..---2

I

I

I

I

I .......

~

__ '

.....-~,..",a

~::tIfIiI'/I~

I

I

I I

FIGURE 13-1. SHUGART 7061712 ASSEMBLY

13·2

»tQ2-,.

._

..

~

(.

,

~

r"

(

REFERENCE

NUMBER

1·1

2

3

PAJIT

NUll." .

·28173-0

28177-0

12233-0

~ e121~2

.' DllCIUPTION

· CONTROL PCB (708)

CONTROL PCB (712)

SCREW, PHILUPS. PAN HEAD ('~ x 5118)

. WITH NYLON PAD fRONT PANEL AND RAIL ASSEMBLY

I

QUANTITY

1

5

1

(

(.

(oE

(~

(~

(~

(~

€C

[b.

.~ ~

(r

€r

.

~.

~~

€~

€~

€~

(

€ [

f (

r ( •

~(

€[ t.

~

REFERENCE

NUMBER

2-1

2

3

4

5 e

3~02·19

FIGURE 13·2. FRONT PANEL AND RAil ASSEMBLY

PART

NUMIER

11306-0

81282·1

8128&0

113384

12207-0

812i1·1

DESCRIPnON

SHOCK MOUNT

RAIL. RIGHT sloe

FRONT PANEL

LENS

SCREW. THREAD FORMING ('4-20 x 1/4)

RAIL. LEFT SIDE

QUANTITY

1

..

1

1

2

1

13·3

· lS.4

RECOMMENDED SPARE PARTS STOCKING GUIDE

The spare parts stocking guide is broken down Into three level'. The..

(level 1). Branch Office (level 2). and Depot or Headquarter. (liv.1

3).

levels

are: Site or

F~eld

Suppon

Engineer

The

quantities listed assume that the Site is replenished by the Branch Immediately and the Branch replenllhad by the Depot within 30 Days.

The inventories that the levels can m~nta1n are:

Site

Branch

Depot

1 to 20 machines

1

to 100 machine.

Depot only parts Unlimited

Branch replenishment Same as Branch ratio

Table 13-1 shows the spare parts required to support the 706/712 in the field.

PART HUM.EII

1133&0

26173-0

26177-0 .

81218-2

8128&0

81291·1

81292·1

61306-0

TABLE 13-1. SHUGART 7061712 SPARE PARTS STOCKING GUIDE

DESCRIPTION

LENS

CONTROL PCB (708)

CONTROL PCB (712)

FRONT PANEL AND RAIL ASSEMBLY

\ FRONT PANEL

RAIL. LEFT SIDE

RAI~ RIGHT SIDE

SHOCK MOUNT

QUANTITY PEA LEVEL

SITE BRANCH DEPOT

2

2

1

.-

.-

.-

.-

8

8

8

8

·2

2

.-

~

2 4

18 100

JSMQ2·20

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t) i~t) t e:~

•

•

SECTION XIV

SCHEMATIC DIAGRAMS.

The following schematic diagrams are furnished to

.'d

In malfundlon analysis.

14·1/14·2 (blank)

~

.

-_.~._._-