MP2617A, MP2617B 3A Switching Charger with NVDC Power Path Management

MP2617B

3A Switching Charger with NVDC

Power Path Management

For Single Cell Li+ Battery

The Future of Analog IC Technology

DESCRIPTION

The MP2617A and MP2617B is a monolithic switch mode battery charger with power path management for single-cell Li-ion batteries in a wide range of tablet and other portable devices.

It integrates a synchronous BUCK regulator to provide regulated voltage for powering the system output and at the same time charging the battery. This device supports both USB and high power DC adapter input. In USB mode, the input current limit can be programmed to

450mA or 825mA via the logic pins to cover the

USB2.0 and USB3.0 specifications. When the adapter input is present, the input current can also be limited in order to avoid overloading of the DC adapter. Input current limit can be programmed up to 3A.

The smart power path management allows

MP2617A and MP2617B to regulate the system voltage for powering an external load and charging the battery independently and simultaneously. This allows immediate system operation even under missing or deeply discharged battery. When the input current limit is reached, the system load is satisfied in priority, then the charger will take the remaining current to charge the battery. Additionally, the smart power path control allows an internal connection from battery to the system in order to supplement additional power to the load in the event the system power demand increases over the input limited power or the input is removed.

The MP2617A and MP2617B features high integration with all the power switches included inside. No external MOSFET, blocking diodes, or current sense resistor is required.

Two status monitor output pins are provided to indicate the battery charge status and power source status. Other features include trickle charge, battery temperature monitoring, timer and thermal limiting regulation on chip.

The MP2617A and MP2617B is available in

QFN 3mmx4mm package.

FEATURES

 4V to 10V Operating Input Voltage

 Smart Power Path Management

 Five Control Loops: Input Current Limit,

Input Voltage Limit, Constant Charge

Current, Terminal Battery Control and

Thermal Fold-Back.

 1.6MHz Switching Frequency

 Programmable Input Current Limit

 Programmable Charge Current

 Single Input for USB and AC adapter

 Cover USB2.0 and USB3.0 Input

Specification

 Fully Integrated Power Switches

 No External Blocking Diode and Sense

Resistor Required

 Charging Operation Indicator

 Built-in Programmable Charging Timer

 Thermal Limiting Regulation on Chip

 Battery Temperature Monitor

 Tiny Package Features Small Size.

APPLICATIONS

Phone

 E-Book

 GPS

 Portable Media Player

 Portable Hand-held Solution

PC

All MPS parts are lead-free, halogen free, and adhere to the RoHS directive. For MPS green status, please visit MPS website under Quality

Assurance.

“MPS” and “The Future of Analog IC Technology” are Registered

Trademarks of Monolithic Power Systems, Inc.

MP2617A, MP2617B Rev. 1.21

10/8/2015 www.MonolithicPower.com

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

© 2015 MPS. All Rights Reserved.

1

MP2617A, MP2617B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH

TYPICAL APPLICATION

MP2617A MP2617B

100

80

60

40

100

90

80

70

60

20

50

0

0 0.5

1 1.5

2 2.5

3 3.5

MP2617 Family Table

40

0

Features

Battery Charge Full Voltage

1 2 3

MP2617A MP2617B

4.35V 4.2V

MP2617A, MP2617B Rev. 1.21




2


ORDERING INFORMATION

Part Number Package Top Marking

* For Tape & Reel, add suffix –Z (e.g. MP2617AGL–Z);

PACKAGE REFERENCE

TOP VIEW

BST

SW

IN

1

2

3

SW

PGND

4

5

EN

6

20 19 18 17

7 8 9 10

16

NTC

15

14

ISET

BATT

13

12

SYS

SYSFB

11 AGND

ABSOLUTE MAXIMUM RATINGS

(1)

IN, SW .........................................-0.3V to +20V

BATT, SYS .....................................-0.3V to +6V

BST...............................................-0.3V to +26V

All Other Pins..................................-0.3V to +6V

Continuous Power Dissipation (T

A

= +25°C)

(2)

QFN20 3mmx4mm..................................... 2.6W

Junction Temperature...............................150

C

Lead Temperature ....................................260

C

Storage Temperature.................–65°C to 150°C

Recommended Operating Conditions

(3)

Supply Voltage V

IN

...........................4.5V to 10V

Operating Junction Temp. (T

J

).... -40°C to +125°C

Thermal Resistance

(4)

θ

JA

θ

JC

QFN-20 (3mmx4mm).............. 48 ...... 11...

C/W

Notes:

2) The maximum allowable power dissipation is a function of the maximum junction temperature T ambient thermal resistance θ

JA

T

A

J

(MAX), the junction-to-

, and the ambient temperature

. The maximum allowable continuous power dissipation at any ambient temperature is calculated by P

D

(MAX) = (T

J

(MAX)-T

A

)/θ

JA

. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage.

3) The device is not guaranteed to function outside of its operating conditions.

4) Measured on JESD51-7, 4-layer PCB.

MP2617A, MP2617B Rev. 1.21




3


ELECTRICAL CHARACTERISTICS

V

IN

= 5.0V, T

A

= 25

C, unless otherwise noted.

Input Power (IN)

IN Operating Range

IN Under Voltage Lockout

Threshold

V

IN

IN vs. BATT Threshold

4.0 10 V

BST Voltage Threshold V

BST

-V

SW

Switching Frequency

SYS Regulation Voltage V

SYS

1.4 1.6

V

BATT

+

0.2V

1.8 MHz

Input Current Limit I

IN

USB2.0 Mode

USB3.0 Mode

Default Mode

Programmable Mode, R

(MP2617B)

ILIM

=23k

400

750

450

825

1840 2000

500

900

2160

1840 2000 2160 mA mA mA mA

Programmable Mode, RILIM=22.47k

(MP2617A)

Programmable Mode,

RILIM=48k (MP2617A)

Input Current Limit Reference

Voltage

V

ILIM

High-side NMOS On Resistance R

H_DS(ON)

Include the BLOCK FET

Low-side NMOS On Resistance R

L

_

DS(ON)

High-side NMOS Peak Current limit

Input Voltage Clamp Threshold V

VLIM

Voltage on VLIM

Charger Enabled, USB2.0 Mode

Input Quiescent Current I

IN

Charger Enabled, USB3.0 Mode

Charger Enable, Programmable Mode

Charger Enabled, Default Mode

1840 2000 2160 mA

900 950 1000

1.1 1.14 1.18

mA

V

3.8 4.8 5.8 A

120

80

2.4

2.8

3.8

3.8

130

100 mΩ

1.49 1.52 1.55

5

5

5

5 mΩ

V mA mA mA mA

SYS to IN reverse current blocking

SYS Output (MP2617A)

Minimum SYS Regulation

Voltage

V

SYS

Disabled, EN=0V

SYS=SW=4.5V,VIN=0V, monitor VIN leakage

SYS voltage @ V float

BATT

≤3.4V, SYSFB

3.4V<V

BATT

BATT Float

≤4.2V, SYSFB float

User Programmed by SYSFB

3 5

3.45 3.6 3.75

3.5

3.5

4.63

4.63

uA

V

V

V

SYS Reference Voltage V

SYS_REF

MP2617A, MP2617B Rev. 1.21




4



(continued)

V

IN

= 5.0V, T

A

= 25


Parameters Symbol Condition Max Units

SYS Output (MP2617B)

Minimum SYS Regulation Voltage V

SYS

SYS voltage @ V

BATT

SYSFB float

≤3.4V,

3.45 3.6 3.75

V

SYS Regulation Voltage V

SYS

3.4V<V

BATT

BATT Float

≤4.2V, SYSFB float

3.5

V

BATT

+

0.2V

4.5 V

User Programmed by SYSFB 3.5 4.5 V

SYS Reference Voltage

Battery Discharge

BATT to SYS Resistance

BATT to SYS Current Limit

V

SYS_REF

Battery Charger Voltage Spec (MP2617A)

V

IN

=0V, I

SYS

=200mA, V

BATT

=4.2V

V

SYS

>V

BATT

–800mV, V

BATT

=4.2V

SYS short

1.127 1.15 1.173

V

40 50 mΩ

4 5 6 A

85 mA

Terminal Battery Voltage

Recharge Threshold at V

BATT

V

BATT

V

RECH

Recharge Hysteresis

Trickle Charge Threshold

Trickle Charger Hysteresis

Battery Charger Voltage Spec (MP2617B)

V

BATT

>V

RECH

, I

CHG

≤I

BF,

SYSFB float 4.328 4.35 4.372

V

V

SYS

<4.2V Programmed by

SYSFB Pin

SYSFB Float

SYSFB programmed

V

I

SYS

BF

-

0.04 x V

4.04 4.14 4.24

V

3.99 4.09 4.19

85

3.01 3.11 3.21

200

V mV

V mV

Terminal Battery Voltage

Recharge Threshold at V

BATT

Recharge Hysteresis

Trickle Charge Threshold

Trickle Charger Hysteresis

Battery Charger Current Spec

Trickle Charge Current

Termination Charger Current

I

BF

Maximum Limit

V

BATT

V

RECH

V

BATT

>V

RECH

, I

CHG

≤I

BF,

SYSFB float 4.179 4.2 4.221

V

V

SYS

<4.2V Programmed by

SYSFB Pin

SYSFB Float

SYSFB programmed

3.9 4.0 4.1

3.85 3.95 4.05

V

I

SYS

BF

-

0.04 x

85

V

V

V mV

2.9 3

200

3.1 V mV

I

TRICKLE

I

BF

10% I

CC

5% 10% I

CC

150 200 mA

Constant Current Mode Charge

Current

I

CC

R

ISET

R

ISET

R

ISET

MP2617A, MP2617B Rev. 1.21




5



(continued)

V

IN

= 5.0V, T

A

= 25


Parameters

ISET Reference Voltage

Battery UVLO

Symbol Condition

Rising

Falling

Idea Diode Regulation Voltage V

SYS

BATT Leakage Current I

BATT

V

BATT

V

IN

=4.2V, SYS float,

=PGND

__________

ACOK

_____________

, CHGOK

__________

ACOK

_____________

, CHGOK Pin Output

Low Voltage

__________

ACOK

_____________

,CHGOK Pin Leakage

Current

Timer

Connected to 3.3V

Trickle Charge Time C

TMR

=0.1µF, I

CHG

Total Charge Time C

TMR

=0.1µF, I

CHG

Negative Temperature Coefficient (NTC) Control

NTC Low Temp Rising

Threshold

V

THL

R

NTC

=NCP18XH103F 0°C

Hysteresis on Low Temp

Threshold

NTC High Temp Falling

Threshold

Hysteresis on High Temp

Threshold

V

THH

R

NTC

VCC Supply

VCC UVLO

VCC Output Voltage

VCC Short Circuit Current Limit

Logic

EN Input Low Voltage

EN Input High Voltage

Rising

Falling

0mA<I

VCC

<25mA, V

IN

=6V

EN Input Current

M0, M1

EN =4V

EN =0V

Logic High

Logic Low

Min Typ Max

Units

1.1 1.15 1.2 V

2.4 2.6 2.8 V

2.2 2.4 2.6 V

V

BATT

-

65mV

mV

270 350 mV

63

0.1 0.5 μA

45 Min

65 67 %V

CC

35 mV

%V

CC

70 mV

3.15 3.35 3.55 V

2.8 3 3.2 V

4.3 4.5

40

4.6 V mA

0.4 V

1.5 V

4 8

μA

-0.5 -0.1

1.5

0.4

V

V

MP2617A, MP2617B Rev. 1.21




6



(continued)

VIN = 5.0V, TA = 25


Symbol Condition Parameters

Protection

Thermal Limit Temperature

Min Typ Max

Units

120 °C

150 °C

MP2617A, MP2617B Rev. 1.21




7


TYPICAL PERFORMANCE CHARACTERISTICS

V

IN

V

IN

= 5.0V, V

BATT

= Full Range, Default Mode, I

Clamp=4.5V, L = 1.2 µH, T

IN

Limit=2A, V

SYS

=4.4V, R6 and R7 are float, I

CHG

A

= +25ºC, Test in MP2617B, unless otherwise noted.

=2A,

MP2617A, MP2617B Rev. 1.21




8



(continued)

V

IN

V

IN

= 5.0V, V

BATT


Clamp=4.5V, L = 1.2 µH, T

IN

Limit=2A, V

SYS


CHG

A


=2A,

MP2617A, MP2617B Rev. 1.21




9



(continued)

V

IN

= 5.0V, V

BATT

L = 1.2 µH, T

A


IN

Limit=2A, V

SYS



CHG

=2A,

MP2617A, MP2617B Rev. 1.21




10



(continued)

V

IN

= 5.0V, V

BATT

L = 1.2 µH, T

A


IN

Limit=2A, V

SYS



CHG

=2A,

MP2617A, MP2617B Rev. 1.21




11



(continued)

V

IN

= 5.0V, V

BATT

L = 1.2 µH, T

A


IN

Limit=2A, V

SYS



CHG

=2A,

MP2617A, MP2617B Rev. 1.21




12


PIN FUNCTIONS

Package

Pin #

Name Description

3 IN Power input of the IC from adapter or USB.

6

7

8

9

10

_____

EN

Function logic control pin of the IC. Logic low to enable the part and logic high to disable the part.

M0 Mode Select Input Pin, in combination with M1 pin, setting the input current limit mode.

M1 Mode Select Input Pin, in combination with M0 pin, setting the input current limit mode.

_____________

CHGOK

__________

ACOK

Open drain output. It is pulled low during charging. And it is pulled high through an external resistor to VCC to indicate charge completed.

Open drain output. It is pulled low to indicate the presence of a valid input power supply.

Otherwise, it is pulled high through an external resistor to VCC to indicate invalid input or removed input.

13

14

SYS DC-DC regulator output to power the system load and charge the battery.

BATT Positive battery terminal.

18

19

20

TMR Set timer out period. Connect TMR pin to AGND to disable the internal timer.

VLIM Input voltage clamp program pin.

VCC Supply voltage of the IC.

MP2617A, MP2617B Rev. 1.21




13

OPERATION


BST

IN

M1

M0

VREF

ILIM

VLIM

1.5V

Input current limit reference selector

EAO

SYSFB1

3.6V

Max(A,B)

VBATT+200mV

EA

Iref

EA

V

BAT x 2

Charge

Pump

EAO

VIN

SYS

BATT

Ideal diode regulation

EN

3.5 V coarse

LDO &

3.0 V UVLO

EN

BATTFB

VBG

CC/ CV linear charger

VCC

Converter control

EA

SYSFB

VBG

SYSFB1

HSG

Driver

LSG

Battery switch current limit

VTH

VREF_CC

EN

Bandgap

& Bias

VBG

4.5 V LDO

BATTFB

SW

SYSFB

SYSFB

SYS

4 0mO

BATT

L

C

SYS

Charger Control & Chip Logic

VIN

3 .8 V UVLO

UVLO

GND CHGOK ACOK TMR NTC

Figure 1—Function Block Diagram

ISET

MP2617A, MP2617B Rev. 1.21




14

Introduction

independently.


The MP2617A and MP2617B is a switching charger IC, with integrated smart power path management for powering the system and charging a single cell battery simultaneously and

The MP2617A and MP2617B includes input DC-

DC step down converter for wide range of DC sources and USB inputs. It has precision average input current limit to make maximum use of the allowable input power. This feature allows fast charging when powering from an USB port, and ensures the input current never exceeds the input power specification especially when the input power comes from a USB port. Additionally, the input current limit threshold can be programmed by logic inputs or a resistor to ground from the ILIM pin.

The MP2617A and MP2617B implements an onchip 40mΩ MOSFET which works as a fullfeatured linear charger with trickle charge, high accuracy constant current and constant voltage charge, charge termination, auto recharge, NTC monitor, built-in timer control, charge status indication, and thermal protection. The charge current can be programmed by an external resistor connected from the ISET pin to AGND.

The IC limits the charge current when the die temperature exceeds 120°C. the combination of the system load and battery charger. The regulator contains input current measurement and control scheme to ensure the average input current remains below the level programmed via ILIM pin or logic inputs M0&M1.

This meets the adapter capacity limit or stays in compliance with USB specification.

When the input voltage is higher than UVLO and

320mV higher than the battery voltage, input

—————— voltage OK signal is active (ACOK turns low) and the DC-DC converter soft-starts. If the input power is sufficient to supply the combination of the system load and battery charger, and the input current limit loop is not triggered. The converter output voltage V

SYS

will be regulated:

1) If BATT>3.4V, V

SYS

is approximately 0.2V above the battery voltage to minimize the power loss of the battery charger during fast charging.

2) If BATT<3.4V, V the system immediately even when a drained battery is inserted to be charged. Figure 2 shows the relationship of V as Figure 2.

SYS

SYS

is fixed at 3.6V to power

vs. V

BATT.

System voltage can also be regulated to any value between 3.6V to 4.4V in MP2617B (3.6V to

4.63V in MP2617A) by using a resistor divider on the SYSFB pin. This is shown as R6 and R7 in

Figure 10. If the SYSFB is left floating, the system program is invalid, and V

SYS

is regulated

The converter adopts fixed off-time control to extend the duty cycle (close to 100%) when the input of the converter is close to V

SYS.

The 40mΩ MOSFET works as an ideal diode to connecting the battery to the system load when the input power is not enough to power the system load. When the input is removed, the

40mΩ MOSFET is turned on allowing the battery to power up the system.

With smart power path management, the system load is satisfied in priority then the remaining current is used to charge the battery. The

MP2617A and MP2617B will reduce charging current or even use power from the battery to satisfy the system load when its demand is over the input power capacity.

Figure 1 shows the function block diagram of the

MP2617A and MP2617B.

DC-DC Step Down Converter

The DC-DC converter is a 1.6MHz constant frequency step-down switching regulator to provide the input power to the SYS, which drives

4.4V

4.2V

3.6V

V

S Y S

3.4V

V

B A TT

4.2V

Figure 2 — MP 2617B SYS Regulation

Output

200mV

MP2617A, MP2617B Rev. 1.21




15


Close to 100% duty operation, BST refresh operation makes sure the driver voltage of the

HS will be charged by turning on the LS until negative IL hit about 400mA. If the input power is insufficient to supply the combination of the system load and battery charger, the DC-DC converter will limit the total power requirement by restricting the input voltage, input current and the peak current through the MOSFET. The power path management will reduce the charge current to satisfy the external system load in priority.

According to this feature, the USB specification is always satisfied first. Even if the charge current is set larger than the USB input current limit, the real charge current will be reduced as needed.

Input Limit State

If the input power is insufficient to supply the combination of the system load and battery charger, the MP2617A and MP2617B implements three input limit control loops to reduce the charge current and satisfy the external system load in priority. The input in this case might be limited as follows: input current limit, input voltage limit and DC-DC peak current limit.

Peak Current Limit: The peak current of the high side switch of the DC-DC converter is sensed during every cycle, it is compared to the reference 4.8A. If the peak current hits the threshold, the peak current limit mode is triggered. The control of the charge current is the same with the above two limits.

Input Current Limit Setting

The current at ILIM is a precise fraction of the adapter input current. When a programming resistor is connected from ILIM to AGND, the voltage on ILIM represents the average input current of the PWM converter. And the input current approaches the programmed limit, ILIM voltage reaches 1.14V.

Input Current Limit: When the system current is higher than the programmed input current limit the input current limit loop takes the control of the converter and regulates the input current at constant value. When the battery voltage is over

3.4V, the output voltage (V

SYS

) will drop down according to the increase of the system current, and the charge current drops down after the

BATT-to-SYS switch (40mΩ MOSFET) is fully on according to V

SYS

dropping down. During this process, the system voltage is slightly higher than V

BATT

. When the battery voltage is lower than 3.4V, to maintain the minimum system voltage and ensure the system operation, the input current limit control will pull down the charge current directly to reduce the load of the converter so that the system current is satisfied in priority.

Input Voltage Limit: A resistor divider from IN pin to VLIM pin to AGND is used for the input voltage limit control. When the voltage on VLIM pin hits the reference voltage of 1.52V, the output of the input voltage limit error amplifier will drop in to control the operation duty. In this mode, the input voltage will be clamped according to the value set by the resistor divider. The control to the system voltage and charge current is the same as the one explained in the input current limit. Charge current drops down to satisfy the system current request first. This feature provides a second protection to the input power and ensures the safe operation of the input adapter. Even if a wrong adapter is inserted, the

MP2617A and MP2617B can continue operation, providing the maximum power to its load. User can program the input voltage limit value through the resistor divider from IN to VLIM to AGND.

The average input current limit can be set through the resistor connecting from ILIM to

AGND according to the following expression:

I

IN_LIM charge current:

=1.14



Table

X

R

ILIM

(kΩ)

(mA)

X varies under different charge current setting, following is a table of x selection to set the

Table1.a - MP2617B Charge Current Setting

Input Current

Limit (mA)

X

Selected

Resistor(kΩ)

490 40962 95.3

770 40796 60.4

970 40842 48

1550 40653 29.9

2000 40350 23

2990 40128 15.3

MP2617A, MP2617B Rev. 1.21




16


Table1.b - MP2617A Charge Current Setting

Table

Input Current

Limit (mA)

X

Selected

Resistor(kΩ)

480 40126 95.3

750 39737 60.4

950 40000 48

1515 39735 29.9

1950 39342 23

2910 39055 15.3

Input Voltage Limit Setting

The input voltage can be limited at a value set by a resistor divider from IN pin to VLIM pin to

AGND according to the following expression

(Typical Application Circuit):

V

IN_LIM

=1.52



R1+R2

R2

(V)

When the voltage on VLIM pin drops and hits the reference voltage 1.52V, the input voltage will be clamped to the setting value.

Add following curve shows the tested current distribution under different charge current setting of MP2617B based on Table1.a.

Battery Charger

The MP2617A and MP2617B completes charge operation consist of trickle charge, automatic charge termination, charge status indication, timer control, NTC indication, automatic recharge, and thermal limiting.

Figure 3 — Input Current Limit vs. R

LIM

When USB input, the input current limit is set internally and the programmed value is invalid.

The MP2617A and MP2617B provides typical of

450mA input current limit for USB2.0 specification and a typical of 825mA for USB3.0 specification respectively.

The user can choose to set the input current limit through the two logic pins M0 and M1 as shown in Table 2 according to its input specification.

When both M0 and M1 pins are float, they are pulled to the logic high, under this condition, the input current is limited to a default value of 2A.

When the PWM converter is out of soft start, the battery charge cycle begins, the MP2617A and

MP2617B first determines if the battery is deeply discharged. If the battery voltage is lower than the trick charge threshold (typical 3.0V), the battery charger starts in “trickle charge mode”.

The trickle charge current is limited to 10% of the programmed charge current until the battery voltage reaches 3.0V. If the charge stays in the

“trickle charging mode” for longer than 45 minutes, the “timer out” condition is triggered, the

_____________ charge is terminated and CHGOK will start blinking to indicate that the battery is unresponsive. When the battery voltage is above

3.0V, the charger is operating at “constant current mode.” The current delivered to the battery will try to reach the value programmed by the ISET pin. Depending on the available input power and system load conditions, the battery charger may or may not be able to charge at the full programmed rate. The system load is always satisfied first over the battery charge current. If the system load requirement is low, the battery can be charged at full constant current.

Table 2―Input Current Limit Setting

When the battery voltage reaches the battery full threshold, the charger enters the “constant voltage mode” operation.

End of Charge (EOC) and Indication

In constant voltage charge mode, the battery voltage is regulated at 4.2V (MP2617B) and

4.35V (MP2617A) (when SYSFB is float or SYS

MP2617A, MP2617B Rev. 1.21




17


is programmed higher than battery full threshold) and the charge current decreases naturally.

Once the charge current hits the battery full threshold I

BF

(1/10 programmed charge current), the battery is fully charged and charge cycle is terminated.

If the charge current drops below I

BF

because of any limit condition, the MP2617A and MP2617B will come out of CV mode, and the charge full detection is invalid. and charge current are calculated using the following equations:

I

CHG



1.15



1800

R

SET



(mA)

At either constant current mode or constant voltage mode, the voltage at the ISET pin is proportional to the actual charge current delivered to the battery, I

BATT

. The charge current can be calculated by monitoring the ISET pin voltage with the following formula:

A safe timer starts at the beginning of each new charge cycle and it monitors if the whole charge period is within the programmed time limit. After each charge cycle, when the battery is indicated as full, the timer counter will be reset. If the time is expired while the charging is still on going, the timer will force the MP2617A and MP2617B to

_____________ terminate charging CHGOK is blinking to indicate the fault condition.

If system voltage is programmed lower than 4.2V

(MP2617B) and 4.35V (MP2617A) by the resistor divider at the SYSFB pin, the battery will be charged most close to V

SYS current reaches the I

BF

until the charge

threshold.

Automatic Recharge

Once the battery charge cycle is completed, the

MP2617A and MP2617B turns off indicating the battery full status. During this process, the battery power may be consumed by the system load or self discharge. If the input power is always on, to ensure the battery not to be exhausted, the new charge cycle will automatically begin when the battery voltage falls below the auto-recharge threshold V

RCHG

when the SYSFB is float, and 50mV lower if the SYSFB is connected to a resistor divider. The timer will re-start when the auto-recharge cycle begins.

During the charge off state when the battery is fully charged, if the input power is recycled, or the EN signal is refreshed, the charge cycle will re-start and the timer will refresh even if the battery voltage is above the auto-recharge threshold.

Charge Current Setting

The charge current of the MP2617A and

MP2617B is programmed using a single resistor from ISET pin to ground. The program resistor

I

BATT

=

V

ISET

1.15

× I

CHG

Additionally, the actual battery charge current may be lower than the programmed current due to limited input power available and prioritization of the system load.

Battery charge full current threshold I

BF

is set internally at 10% of the programmed charge current. However, I

BF

has a 150mA maximum limit which can not be exceeded.

Logic Control

The MP2617A and MP2617B has two separate enable control pins.

_____

EN is a logic control pin that controls the

_____ operation of the whole IC. When EN is low, the

IC is enabled and the PWM converter output

_____ powers the system and the charger. When EN is high, both the PWM converter and the charger are disabled. The BATT to SYS switch turns fully on to connect the battery to power the system.

The ISET pin can be also used to control the operation of the charger. Setting ISET pin floating will disable the charger function while the output of PWM converter will continue supply power to system. On the other hand, a resistor from ISET to AGND will enable the charging at the programmed charge current.

The logic control of the ISET pin of the MP2617A and MP2617B can be realized as Figure 4. In this way, the user can choose logic low to be “off” signal or logic high to be ”on” signal with a N-

MOSFET.

MP2617A, MP2617B Rev. 1.21




18

ISET


OFF ON

R

ISET

Figure 4— ISET Logic Control

__________

Input Power Status Indication (ACOK )

An internal under voltage lockout circuit monitors the input voltage and keeps the IC in off state until the input rises over the rising threshold

(3.8V). When the input voltage decreases below threshold (3.5V), the IC will turn off, and the system load will be powered by the battery

__________ automatically. ACOK is an open-drain, activelow output that indicates the status of input power.

The input is considered valid when the input voltage is over the UVLO rising threshold, and

310mV higher than the battery voltage to ensure both the converter and the charger can operate normally. If the input voltage from an adapter or

__________ from a USB port is indicated OK, ACOK will turn low.

_____

During EN

__________ the ACOK

off or thermal shutdown conditions,

turns high to indicate no power is

__________ provided by the input to the system. The ACOK signal indicates if input supplies power to the system load or not. Any other condition can not

__________ affect the ACOK indication as long as the input power is present.

_____________

Charge Status Indication (CHGOK )

_____________

CHGOK is an open-drain, active-low output that

_____________ indicates the status of charge. CHGOK will be low during normal charging operation, turn high after charge full, and blink if a fault condition happens including NTC fault (battery temperature invalid) and timer out (bad battery).

_____________

In the event of a fault condition, CHGOK switches at 6Hz with the 50% duty cycle and enter “blinking” mode. The user should check the application circuit to find out the root cause of the fault condition if the “blinking” signal is asserted.

_____________

For no battery condition, CHGOK is blinking according to the transition between charging and charge full. The blinking frequency is determined by the cycle of charge and discharge of the output capacitor.

When the charge current to the battery is low or in the event the battery is in supplement mode

_____________ caused by the insufficient input power, CHGOK keeps low to avoid providing false charge full indication.

__________

Table 3 shows the ACOK under different charge conditions.

_____________ and CHGOK status

Table 3―Charger Status Indication

ACOK

CHGOK

Charger Status

low blinking at

6Hz

NTC fault, timer out

V

IN

absent,

EN

disable, thermal shutdown

Timer Setting

The MP2617A and MP2617B uses an internal timer to terminate charge if the timer times out.

The timer duration is programmed by an external capacitor at the TMR pin and related to the real charge current.

The trickle mode charge time is: t

Trickle _ TMR

The total charge time is: t

Total_TMR



45



C

TMR

0.1μF

(min) (I

CHG



6.5



C

TMR

0.1μF

(hr) (I

CHG



1A)



1A)

The above equations are based on 1A charge current. As a result of power path management control, charge current might vary during normal operation, under this condition, the MP2617A and MP2617B automatically takes into account this variation and adjust the timer period accordingly.

When the charge current is set larger than 1A, the safe timer period is reduced accordingly with the same TMR capacitor. If the charge current is reduced because of insufficient input power, the timer period is increased proportionally by the same rate at which the charge current is reduced.

MP2617A, MP2617B Rev. 1.21




19


If charge is stopped due to high system load, the timer is temporarily suspended.

This feature avoids indicating a false trigger indication for bad battery indication when there is little charge current delivered to the battery as a result of the insufficient input power. When the timer out condition occurs, the MP2617A and

MP2617B terminates the charge at once and

_____________

CHGOK blinks to indicate the fault status. If one of the following events happens, the timer is refreshed and the MP2617A and MP2617B restarts the charge cycle.

_____

EN /ISET signal

 Auto-Recharge

NTC Thermistor

The NTC pin allows MP2617A and MP2617B to sense the battery temperature using the Negative

Thermal Coefficient (NTC) thermistor usually available in the battery pack to ensure safe operating environment of the battery. A resistor with appropriate value should be connected from

VCC to NTC and the NTC resistor is from NTC pin to AGND. The voltage on NTC pin is determined by the resistor divider whose divide ratio as the different resistance of the NTC thermistor depends on the ambient temperature of the battery. and MP2617B from excessive temperature due to high power operation or high ambient thermal conditions. Another benefit of this feature is charge current can be set according to the requirement rather than worst-case conditions for a given application with the assurance of safe operation. The MP2617A and MP2617B will stop charging if the junction temperature rises above

150 o

C as the IC enters thermal shutdown protection.

Ideal Diode Mode

If the system current requirement increases over the preset limit of the PWM converter, the additional current will be drawn from the battery via the BATT-to-SYS switch. To avoid very large currents being drawn from the battery which might affect the reliability of the device, the

MP2617A and MP2617B controls the charge switch to work at the ideal diode mode regulating

V

SYS

to V

BATT than V

BATT

-65mV when V

SYS

is 40mV lower

is detected. Only when V

SYS higher than V

BATT

V

BATT

-40mV

is 40mV

, the charger switch exits the ideal diode mode, and the charge cycle softly restarts.

V

SYS

Enable Ideal Diode Mode

Disable Ideal Diode Mode

V

BATT

+40mV

Figure 5—Ideal Diode Mode Enable/DIsable

The MP2617A and MP2617B has an internal

NTC voltage comparator to set the upper and lower limit of the divide ratio. If NTC pin voltage falls out of this range it means the temperature is outside the safe operating range,

As a result, the MP2617A and MP2617B will stop charging and report it on indication pins.

Charging will automatically resume after the temperature falls back into the safe range.

Thermal Protection

The MP2617A and MP2617B implements thermal protection to prevent the thermal damage to the IC or surrounding components. An internal thermal sense and feedback loop will automatically decrease the charge current when the die-temperature rises to about 120 o

C. This function is referred as charge current thermal fold-back. This feature protects the MP2617A

Battery Discharge Protection

When the input power is removed or invalid, the system load will draw power from the battery via the battery switch. Under this condition, the battery switch is fully on to minimize the power loss. The MP2617A and MP2617B integrates battery discharge protection. If the battery discharge current is larger than the discharge current limit threshold I

DIS

(5A), the current will be regulated at the preset limited value. And if the current increases further, the SYS voltage starts to decrease. When V

SYS lower than V

BATT

drops to about 800mV

, SYS short condition is detected.

Under this condition, the discharge current is limited at 85mA. In the event of a short from system to GND the discharge current from the battery to the system is also limited to 85mA.

MP2617A, MP2617B Rev. 1.21




20


Furthermore, battery voltage UVLO is always monitored. If the battery voltage is lower than the battery UVLO threshold, the battery switch is turned off immediately. This feature makes sure the battery from over-discharged.

Dynamic Power Path Management (DPPM)

In the presence of a valid input source, the PWM converter will supply the current to both the system and the battery charger.

MP2617A and MP2617B then reduces the charge current until the input current falls below the input current limit and the input voltage rises above the input voltage limit. If the system current increases beyond the power allowed by the input source, additional power will be drawn from the battery via an on-chip 40mΩ MOSFET working as an ideal diode.

Additionally, if the input source is removed, the

MP2617A and MP2617B will turn on the 40mΩ

MOSFET allowing the battery to power the system load to keep the operation of the portable device.

The voltage V

SYS

is regulated based on the value of the battery voltage. When V

BATT

is higher than

3.4V, V

SYS

is regulated 200mv above V

BATT charge the battery. When V

BATT

to

is lower than

3.4V, to ensure the system can still be powered up even with a drained battery connected, V

SYS regulated at constant 3.6V.

is

When the input source is overloaded, either the current exceeds the input current limit or the voltage falls below the input voltage limit, the

Operation Flow Chart

Taking the MP2617B for example, Figure 6 shows the operation flow chart of the MP2617B while Figure 7 shows the operation process.

MP2617A, MP2617B Rev. 1.21




21


POR

Chip Enable?

No

Yes

V

IN

>3.0V?

Yes,

POR="0"

Enable BG

No，

POR="1"

BGOK="1"

Enable VREF LDO

BGOK="0"

V

BATT

>V

BATT_UVLO

?

No

System shuts down

No power to system

Yes

Battery power system

Enable discharge limit

V

IN

>V

IN_UVLO

(V

TH

)?

Yes,

UVLO="0"

No,

UVLO="1"

V

IN

>V

BATT

+310mV?

No

Yes

Enable DC-DC

DC-DC soft starts

V

SYS_REF

=max(V

BATT

+

200mV,3.6V)

V

SYS

>V

BATT

ISET OK?

?

No

Yes

BATT-to-SYS switch turns off

DC-DC starts ready?

Yes

No

Enable Battery

Charger

MP2617A, MP2617B Rev. 1.21




22


Yes

Any Limit condition triggered?

No

Yes Clamp DC-DC

EAO to regulate the part at the limit state

V

BATT

<3.4V?

V

BATT

>3.0V?

Yes

No

CC/CV Charge

Trickle Charge

I

CHG

=10%I

CC

No Yes

V

SYS

drops down,

Charge switch is fully on

Decrease I

CHG

Keep V

SYS

,

=3.6V

Yes

No

No

I

CHG

=I

BF

?

No

Yes

Charge Full, EOC=1

TMR off, clear the counter

DC-DC keeps work

V

SYS

<V

BATT

-40mV?

No

Yes

Yes

Limit condition

Removed?

No

Charge in

CV mode and

I

CHG

<I

BF

?

No

No

Satisfy System current

Charge the battery with remaining current

I

CHG

=0?

Yes

V

SYS

<V

BATT

-40mV?

Yes

V

BATT

>V

BATT_UVLO

?

Yes

No

No

Disable

Ideal Diode Mode

Yes

V

SYS

>V

BATT

+40mV?

V

BATT

<V

RCHG

?

Ideal Diode Mode:

V

SYS

=V

BATT

-65mV,

Enable discharge current limit

Battery switch shuts down,

DC-DC in over load condition,

V

SYS

drops down

Figure 6— MP2617B Operation Flow Chart under No Fault Condition

MP2617A, MP2617B Rev. 1.21




23

Normal operation voltage

UVLO

Thresohold

V

IN

0


UVLO

Threshold-Hys

Power Path Management

Battery

Supplement

Mode

I

SYS

0

I

BATT

0

I

IN_AVE

0

V

SYS

V

BATT

0

Trickle Charge

CC Charge

CV Charge

Battery

Full

I

SYS

- I

IN_LIM

Input Power

Current Limit

I

IN_LIM

Charging

Supplement

Mode-

Discharging

Charging

Selfdischarging

Auto -

Rec harging

Power off discharging

V

BATT

=4.0V

V

BATT

=3.0V

V

BATT

=3.4V

Figure 7— MP2617B Operation Process under No Fault Condition

MP2617A, MP2617B Rev. 1.21




24


APPLICATION INFORMATION

COMPONENT SELECTION

Setting the Input Current Limit

Connect a resistor from the ILIM pin to AGND to program the input current limit for different input ports. The relationship between the input current limit and setting resistor is as Table 1 and Figure 3 shown.

For USB input, the input current limit is set by the M0 and M1 logic, the setting resistor by

ILIM pin is invalid.

Setting the Charge Current

R

ISET

connecting from the ISET pin to AGND sets the charge current (I

CHG

). The relationship between the charge current and setting resistor is as following:

I

CHG



1.15



R

1800

SET



(mA)

(2)

Assume I

CHG

=2A, thus: R

ISET

=1.05kΩ.

Usually in USB mode, the charge current is always set over the USB input limit specification.

Then the MP2617A and MP2617B regulates the input current constant at the limitation value.

Thus the real CC charge current is not the setting value, it varies with different input and battery voltages.

The maximum CC charge value can be calculated as:

I

CC _ MAX



V

IN



I

ILIM

V

TC

 

( A )

(3)

Where V

TC is trickle charge threshold (3V) and η is the current charge efficiency. Assume

V

IN

=5.5V, I

ILIM

=1.5A, η=83%, thus I

CC_MAX

=2.28A.

Figure 8 shows a calculating charge current curve by limiting the input current limit based on

MP2617B.

3A

2A

1A

I

CC_MAX

I

IN_

LIM =2A

I

IN_LIM

=1.5A

I

USB3.0

=0.9A

I

US B2.0

=0.45A

Figure 8—I

CHG

3V

Battery Voltage

4.2V

Variation with Different Input

Current Limit

Setting the Input Voltage Limit

The input clamp voltage is set using a resistive voltage divider from the input voltage to VLIM pin. The voltage divider divides the input voltage down to the limit voltage by the ratio:

V

VLIM

= V

IN_LIM

×

R1

R2

+ R2

(V)

(4)

Thus the input voltage is:

V

IN_LIM

= V

VLIM

×

R1 +

R2

R2

(V)

(5)

The voltage clamp reference voltage V

VLIM

is

1.52V, and a typical value for R2 can be 10kΩ.

With this value, R1 can be determined by:

R1 = R2 ×

V

IN_LIM

V

V

VLIM

VLIM

(V)

(6)

For example, for a 4.65V input limit voltage, R2 is 10kΩ, and R1 is 20.6kΩ.

Setting the System Voltage

The system voltage can be regulated to any value between 3.6V to 4.4V by the resistor divider on SYSFB pin as R6 and R7 in Figure

10.

V

SYS



V

SYS _ REF



R 6



R 7

R 7

(7)

Where V

SYS_REF is 1.152V, the reference voltage of SYS. With a typical value for R7, 10kΩ, R6 can be determined by:

MP2617A, MP2617B Rev. 1.21




25


R 6



R 7



V

SYS



V

SYS

V

SYS _ REF

_ REF

( V )

(8)

For example, for a 4.2V system voltage, R7 is

10kΩ, and R6 is 26.5kΩ.

Selecting the Inductor

Inductor selection trades off among cost, size, and efficiency. A lower inductance value corresponds to a smaller size, but results in higher ripple currents, higher magnetic hysteretic losses, and higher output capacitances. Choosing a higher inductance value benefits from lower ripple current and smaller output filter capacitors, but results in higher inductor DC resistance (DCR) loss. From a practical standpoint, the inductor ripple current does not exceed 30% of the maximum load current under worst cases conditions. For the MP2617A and MP2617B operating with a typical 5V input voltage, the maximum inductor current ripple occurs at the corner point between trickle charge and CC charge

(V

BATT

=3V). Estimate the required inductance as:

L



V

IN





I

L _

V

BATT

MAX

V

IN



V f

BATT

S

( MHz )

(

H)

(9)

I

PEAK



I

LOAD ( MAX )



( 1



% ripple

) (mA)

(10)

2

Where V

IN

, V

BATT

, and f

S are the typical input voltage, the TC to CC charge threshold, and the switching frequency, respectively.

ΔI

L_MAX is the maximum inductor ripple current, which is usually 30% of the CC charge current.

For I

CHG

=2A, V

IN

=5V, V

BATT

=3V and f s

=1.6MHz, the calculated inductance is 1.3µH. The maximum inductor peak current exceeds 2.3A.

To optimize efficiency, chose an inductor with a

DC resistance less than 50mΩ. Choose the inductor 7447745012 from Wurth with ratings at

L=1.2µH/4.6A /21mΩ. For EMI consideration and high current application, a larger inductor such as 2.2µH is recommended to be applied.

Selecting the Input Capacitor

The input capacitor C1 from the typical application circuit absorbs the maximum ripple current from the PWM converter, which is given by

I

RMS _ MAX



I

CC _ MAX



V

TC



( V

IN _ MAX

V

IN _ MAX



V

TC

)

(A)

(11)

For I

CC_MAX

=2A, V

TC

=3V, V

IN_MAX

=14V, the maximum ripple current is 1A. Select the input capacitors so that the temperature rise due to the ripple current does not exceed 10°C. Use ceramic capacitors with X5R or X7R dielectrics because of their low ESR and small temperature coefficients. For most applications, use a 22µF capacitor.

Selecting the Output Capacitor

The output capacitor C2 from the typical application circuit is in parallel with the SYS load. C2 absorbs the high-frequency switching ripple current and smoothes the output voltage.

Its impedance must be much less than that of the system load to ensure it properly absorbs the ripple current.

Use a ceramic capacitor because it has lower

ESR and smaller size that allows us to ignore the ESR of the output capacitor. Thus, the output voltage ripple is given by:

 r





V

V

SYS

SYS



8



1



C 2

V

SYS



V f

IN

2

S



L

%

(12)

In order to guarantee the ±0.5% system voltage accuracy, the maximum output voltage ripple must not exceed 0.5% (e.g. 0.1%). The maximum output voltage ripple occurs at the minimum system voltage and the maximum input voltage.

For V

IN

=14V, V

SYS_MIN

=3.6V, L=1.2µH, f

S

=1.6MHz,

r =0.1%, the output capacitor can be calculated as:

1



V

SYS _ MIN

C 2



8

 f

S

2



V

IN

L

  r

(13)

We can then choose a 22µF ceramic capacitor.

Resistor Choose for NTC Sensor

Figure 9 shows an internal resistor divider reference circuit to limit the low temperature threshold and high temperature threshold at

65%·VCC and 33.5%·VCC, respectively. For a given NTC thermistor, select appropriate R

T1 and R

T2

to set the NTC window.

MP2617A, MP2617B Rev. 1.21




26

R

NTC_Hot temperature of the required temperature operation range, and R the NTC resistor at low temperature.

The two resistors, R

T1 temperature limit and low temperature limit to be programmed independently. With this feature, the MP2617A and MP2617B can fit most type of NTC resistor and different temperature operation range requirements.

R

T1

is the value of the NTC resistor at high

and R

T2

NTC_Cold

is the value of

and R

T2

, allow the high

values depend on the type of the

NTC resistor.

For example, for the thermistor NCP18XH103, it has the following electrical characteristic:

At 0°C, R

NTC_Cold

= 27.445kΩ;

At 50°C, R

NTC_Hot

= 4.1601kΩ.

The following equations are derived assuming that the NTC window is between 0°C and 50°C.

According to the above equations (14) and (15),

V

TH_Low

VCC

and calculate R

T1

V

TH_High from the EC table to

VCC

=7.15kΩ and R

T2

=25.5kΩ.

R

T2


NTC_Cold

R

T1



R //R

NTC_Cold



V

TH_Low

VCC

(14)

NTC_Hot

R

T1



R //R

NTC_Hot



V

TH_High

VCC

(15)

R

T1

R

NTC

VCC

NTC

Low Temp Threshold

V

TH_Low

High Temp Threshold

V

TH_High

Figure 9—NTC Function Block

PCB Layout Guideline

It is important to pay special attention to the

PCB layout to meet specified noise, efficiency and stability requirements. The following design considerations can improve circuit performance:

1) Route the power stage adjacent to their grounds. Aim to minimize the high-side switching node (SW, inductor), trace lengths in the high-current paths and the current sense resistor trace.

Keep the switching node short and away from all small control signals, especially the feedback network.

Place the input capacitor as close as possible to the IN and PGND pins.

Place the output inductor close to the IC and connect the output capacitor between the inductor and PGND of the IC.

2) For high-current applications, the balls for the power pads (IN, SW, SYS, BATT and PGND) should be connected to as much copper in the board as possible. This improves thermal performance because the board conducts heat away from the IC.

3) The PCB should have a ground plane connected directly to the return of all components through vias (two vias per capacitor for power-stage capacitors, one via per capacitor for small-signal components). It is also recommended to put vias inside the PGND pads for the IC, if possible. A star ground design approach is typically used to keep circuit block currents isolated (high-power/low-power small-signal) which reduces noise-coupling and ground-bounce issues. A single ground plane for this design gives good results. With this small layout and a single ground plane, there is no ground-bounce issue, and having the components segregated minimizes coupling between signals.

MP2617A, MP2617B Rev. 1.21




27


TYPICAL APPLICATION CIRCUITS

Adapter /USB input

C1

ON

OFF

C5

R1

R2

R3

R4

R5

R

NTC

R

ILIM

IN

M0

VLIM

ILIM

M1 EN

SYS

SYSFB

SW

MP 2617

BST

CHGOK

ACOK

VCC

BATT

NTC

TMR

ISET

GND

C4

R6

R7

C6

R

ISET

C3

L

C2

SYS Load

V

BAT

Battery

Figure 10—Typical Charge Application Circuit with V

SYS

Programmed by SYSFB Pin

Adapter /USB input

C1

ON

OFF

C5

R1

R2

R3

R4

R5

R

NTC

R

ILIM

IN

M0

VLIM

ILIM

M1 EN

SYS

SYSFB

SW

MP2617

BST

CHGOK

ACOK

VCC

BATT

NTC

C4

TMR

ISET

GND

C6

R6

R7

R

ISET

C3

L

C2

SYS Load

Figure 11—Application with Charger Disabled under No Battery Condition

MP2617A, MP2617B Rev. 1.21




28


PACKAGE INFORMATION

QFN-20 (3mmX4mm)

PIN 1 ID

MARKING

PIN 1 ID

0.10 X 45? TYP

PIN 1 ID

INDEX AREA

TOP VIEW BOTTOM VIEW

SIDE VIEW

0.10 X 45?

RECOMMENDED LAND PATTERN

NOTE:

2) EXPOSED PADDLE SIZE DOES NOT INCLUDE

MOLD FLASH.

3) LEAD COPLANARITY SHALL BE 0.10

MILLIMETERS MAX.

4) JEDEC REFERENCE IS MO-220.

5) DRAWING IS NOT TO SCALE.

NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications.

MP2617A, MP2617B Rev. 1.21 www.MonolithicPower.com

10/8/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.


29

Mouser Electronics

Authorized Distributor

Click to View Pricing, Inventory, Delivery & Lifecycle Information:

Monolithic Power Systems (MPS)

:

MP2617AGL-P MP2617AGL-Z

MP2617A, MP2617B 3A Switching Charger with NVDC Power Path Management

3A Switching Charger with NVDC

Power Path Management

For Single Cell Li+ Battery

The Future of Analog IC Technology

DESCRIPTION

FEATURES

APPLICATIONS

TYPICAL APPLICATION

ORDERING INFORMATION

PACKAGE REFERENCE

ABSOLUTE MAXIMUM RATINGS

Recommended Operating Conditions

Thermal Resistance

θ

θ

ELECTRICAL CHARACTERISTICS

ELECTRICAL CHARACTERISTICS

ELECTRICAL CHARACTERISTICS

ELECTRICAL CHARACTERISTICS

TYPICAL PERFORMANCE CHARACTERISTICS

TYPICAL PERFORMANCE CHARACTERISTICS

TYPICAL PERFORMANCE CHARACTERISTICS

TYPICAL PERFORMANCE CHARACTERISTICS

TYPICAL PERFORMANCE CHARACTERISTICS

PIN FUNCTIONS

OPERATION

APPLICATION INFORMATION

TYPICAL APPLICATION CIRCUITS

PACKAGE INFORMATION

Mouser Electronics

Authorized Distributor

Click to View Pricing, Inventory, Delivery & Lifecycle Information:

Monolithic Power Systems (MPS)

:

Related manuals

MPS

EV2681B-S-00A

MPS

EV2696A-Q-00B

MPS

MP5515