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RT7237CHGSP
Evaluation Board
Purpose
The RT7237C is a high-efficiency current mode synchronous step-down regulator that can deliver up to 2A output current from a wide input voltage range of 4.5V to 18V. This document explains the function and use of the
RT7237C evaluation board (EVB) and provides information to enable operation and modification of the evaluation board and circuit to suit individual requirements.
Table of Contents
UG7237CHGSP-00 July 2014 www.richtek.com
RT7237CHGSP
Evaluation Board
Introduction
General Product Information
General Description
The RT7237C is a high efficiency, monolithic synchronous step-down DC/DC converter that can deliver up to 2A output current from a 4.5V to 18V input supply. The RT7237C's current mode architecture and external compensation allow the transient response to be optimized over a wide range of loads and output capacitors.
Cycle-by-cycle current limit provides protection against shorted outputs and soft-start eliminates input current surge during start-up. The RT7237C also provides output under voltage protection and thermal shutdown protection. The low current (<3μA) shutdown mode provides output disconnection, enabling easy power management in battery-powered systems. The RT7237C is available in an SOP-8 (Exposed Pad) package.
Features
±1.5% High Accuracy Feedback Voltage
4.5V to 18V Input Voltage Range
2A Output Current
Integrated N-MOSFET Switches
Current Mode Control
PWM Frequency Operation : 800kHz
Output Adjustable from 0.8V to 12V
Up to 95% Efficiency
Programmable Soft-Start
Stable with Low-ESR Ceramic Output Capacitors
Cycle-by-Cycle Over Current Protection
Input Under Voltage Lockout
Output Under Voltage Protection
Thermal Shutdown Protection
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Key Performance Summary Table
Key features
Default Input Voltage
Max Output Current
Default Output Voltage
Default Marking & Package Type
Operation Frequency
Other Key Features
Protection
Evaluation board number: PCB004_V1
12V
2A
3.3V
RT7237CHGSP, PSOP-8 (Exposed Pad)
Steady 800kHz at PWM
4.5V to 18V Input Voltage Range
Programmable Soft-Start
PSM/ PWM Auto Switched
Output Under-Voltage Protection (hiccup mode):
Cycle-by-cycle Current Limit
Thermal Shutdown
RT7237CHGSP
Evaluation Board
UG7237CHGSP-00 July 2014 www.richtek.com
3
Bench Test Setup Conditions
Headers Description and Placement
RT7237CHGSP
Evaluation Board
Please carefully inspect the EVB IC and external components, comparing them to the following Bill of Materials, to ensure that all components are installed and undamaged. If any components are missing or damaged during transportation, please contact the distributor or send e-mail to [email protected].
Test Points
The EVB is provided with the test points and pin names listed in the table below.
Test point/
Pin name
VIN
VOUT
SW
EN
BS
SS
GND
Signal
Input voltage
Output voltage
Comment (expected waveforms or voltage levels on test points)
Input voltage range = 4.5V to 18V
Default output voltage = 3.3V
Output voltage range = 0.8V to 12V
(see ‘’ Output Voltage Setting’’ section for changing output voltage level)
Switching node test point
Enable test point
SW waveform
Enable signal. EN is automatically pulled high (by R4) to enable operation. Connect EN low to disable operation.
Boot strap supply test point Floating supply voltage for the high-side N-MOSFET switch
Soft-start control test point
Ground
Soft start waveform
Ground
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RT7237CHGSP
Evaluation Board
Power-up & Measurement Procedure
1. Apply a 12V nominal input power supply (4.5V < V
IN
< 18V) to the VIN and GND terminals.
2. The EN voltage is pulled to logic high by R4 (100kΩ to VIN) to enable operation. Drive EN high (>2.0V) to enable operation or low (<0.4V) to disable operation.
3. Verify the output voltage (approximately 3.3V) between VOUT and GND.
4. Connect an external load up to 2A to the VOUT and GND terminals and verify the output voltage and current.
Output Voltage Setting
Set the output voltage with the resistive divider (R1, R2) between VOUT and GND with the midpoint connected to
FB. The output is set by the following formula:
R1
V
OUT
= 0.8 x (1 + )
R2
The installed VOUT capacitors (C4, C5) are 22
μ
F, 16V X5R ceramic types. Do not exceed their operating voltage range and consider their voltage coefficient (capacitance vs. bias voltage) and ensure that the capacitance is sufficient to maintain stability and provide sufficient transient response for your application. This can be verified by checking the output transient response as described in the RT7237C IC datasheet.
UG7237CHGSP-00 July 2014 www.richtek.com
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Schematic, Bill of Materials and Board Layout
EVB Schematic Diagram
VIN
GP1
GP2
GND
10uF 10uF 0.1uF
100k
NF NF
TP4
BS
D2
2
U1
NF
SOP-8(Exposed Pad)
VIN BS
1
SW
3
TP1
EN
7
EN
GND
TP2
SS
8
SS
FB
5
COMP
6
C10
0.1uF
C11
0.1uF
D1
NF
TP3
SW
L1
6.8uH
NF
C7
3.3nF
NF
C8
17k
R3
NF
C1, C2: 10μF/50V/X5R, 1206, TDK C3216X5R1H106K
C4, C5: 22μF/16V/X5R, 1210, Murata GRM32ER61C226K
L1: 6.8
μH TAIYO YUDEN NR8040T6R8N, DCR=25mΩ
RT7237CHGSP
Evaluation Board
VOUT
GP3
75k
22uF 22uF 0.1uF
GP4
GND
24k
UG7237CHGSP-00 July 2014 www.richtek.com
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RT7237CHGSP
Evaluation Board
Bill of Materials
Reference
U1
C1, C2
C4, C5
C7
Qty
1
2 C3216X5R1H106K160AB
2
1
Part number
RT7237CHGSP
GRM32ER61C226KE20#
0603B332K500
C3, C6, C10, C11 4 C1608X7R1H104K080AA
C8, C9, C12, C13 0
L1
R1
R2
R3
R4
R5
D1, D2
TP
GP
1
4
4
0
0
1
1
1
1
NR8040T6R8N
Description
DC-DC Converter
10µF/±10%/50V/X5R
Ceramic Capacitor
22µF/±10%/16V/X5R
Ceramic Capacitor
3.3nF/±10%/50V/X7R
Ceramic Capacitor
0.1µF/±10%/50V/X7R
Ceramic Capacitor
Not Installed
6.8µH/4.0A/±30%,
DCR=25 mΩ, Inductor
75kΩ/±1%, Resistor
24 kΩ/±1%, Resistor
17 kΩ/±1%, Resistor
100 kΩ/±1%, Resistor
Not Installed
Not Installed
Test Pin
Golden Pin
Package
PSOP-8
1206
1210
0603
Manufacture
RICHTEK
TDK
MURATA
WALSIN
0603
0603
TDK
8mmx8mmx4mm TAIYO YUDEN
0603
0603
0603
0603
0603
UG7237CHGSP-00 July 2014 www.richtek.com
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RT7237CHGSP
Evaluation Board
EVB Layout
Top View (1 st layer)
UG7237CHGSP-00 July 2014
Bottom View (2 nd
Layer) www.richtek.com
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RT7237CHGSP
Evaluation Board
Component Placement Guide
—Component Side (1 st layer)
UG7237CHGSP-00 July 2014
PCB Layout
—Component Side (1 st
Layer) www.richtek.com
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RT7237CHGSP
Evaluation Board
Component Placement Guide
—Bottom Side (2 nd layer)
UG7237CHGSP-00 July 2014
PCB Layout
—Bottom Side (2 nd layer) www.richtek.com
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RT7237CHGSP
Evaluation Board
More Information
For more information, please find the related datasheet or application notes from Richtek website http://www.richtek.com.
Important Notice for Richtek Evaluation Board
THIS DOCUMENT IS FOR REFERENCE ONLY, NOTHING CONTAINED I
N THIS DOCUMENT SHALL BE CONSTRUED AS RICHTEK’S WARRANTY, EXPRESS
OR IMPLIED, UNDER CONTRACT, TORT OR STATUTORY, WITH RESPECT TO THE PRESENTATION HEREIN. IN NO EVENT SHALL RICHTEK BE LIABLE T O
BUYER OR USER FOR ANY AND ALL DAMAGES INCLUDING WITHOUT LIMITATION TO DIRECT, INDIRECT, SPECIAL, PUNITIVE OR CONSEQUENTIAL
DAMAGES.
UG7237CHGSP-00 July 2014 www.richtek.com
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