Today’s topic: 1. Basic current mirrors 2. single-stage amplifiers 3. differential amplifiers Chapter 3 1 The purpose of this Chapter is to discuss fundamental circuit building blocks. A good knowledge of these basic building blocks is critical to understanding many subjects to be discussed later. CMOS current mirrors and gain stages are emphasized here, while the general smallsignal analysis method can be applied to BJT versions. When analyzing transistor circuits to determine their small-signal behavior, it is implicitly assumed that signals are small enough that linear approximations about an operating point (Q point) accurately reflect how the circuit operates. These linear approximations may be represented schematically by replacing transistors with small-signal equivalent circuit, whose parameters (such as gm, rds etc) are determined from the operating point. A note on notations in the book and the lecture: 2 A general procedure for small-signal analysis: 3 A general procedure for small-signal analysis: 4 3.1 A simple current mirror An ideal current mirror is a two port circuit that accepts an input current Iin and produce an output current Iout=Iin. Also, an ideal current mirror will have zero input resistance but high output resistance. Both transistors are in active region (so the drain voltage of Q2 must be larger than Veff2). If Q1 and Q2 have the same size, and finite rds is ignored, then Q1 and Q2 have the same current (due to the same Vgs) However, when rds are considered, the transistor with larger Vds will have larger current. Chapter 3 Figure 01 5 A simple current mirror: input resistance We can use the following small-signal equivalent circuit to compute the input resistance of the current mirror. (Iin is open and low-frequency model is used). Then, apply a test signal voltage Vy at node V1 and measure the current iy Input resistance is given by rin = Vy/iy = Q1 is sometimes referred to as a diode-connected transistor. rin rin Chapter 3 Figure 02 6 A simple current mirror: output resistance Using the model for the input resistance from previous slides leads to a simplified small-signal equivalent circuit for the overall current mirror. . Output resistance is given by rout=Vx/ix =rds2 Chapter 3 Figure 03 7 rout = rds2 Vbias Chapter 3 Figure 01 In this configuration, as long as gate terminal is small-signal ground, the resistance looking into the drain is rds2 A simple current mirror: output resistance Using the model for the input resistance from previous slides leads to a simplified small-signal equivalent circuit for the overall current mirror. . Output resistance is given by rout=Vx/ix =rds2 Chapter 3 Figure 03 8 An example 3.1 (page 119) Estimation using low-frequency small-signal linear equivalent circuit 9 3.2 A common-source amplifier A common use of simple current mirrors is to be active loads in a single-stage amplifier. By using an active load, a high-impedance output load can be realized without using excessively large resistors or a large power supply voltage (for example, a 100k resistor load with 100μA bias current would need a power supply of at least 10V). The common-source (CS) topology is the most popular gain stage, especially when high input impedance is desired. Chapter 3 Figure 04 10 Small-signal analysis of CS: DC gain Av Assume that all transistors are in active region, the small-signal model of the CS amplifier with active load is shown below: (note the resistance R2 is made up of parallel of rds1 and rds2.) Depending on device sizes, currents and technology used, the typical gain for a CS amplifier could be between -5 to -100. Av is about one half of the intrinsic gain of Q1: if To maximize the gain, it is desirable to minimize Veff1. For a fixed bias current, this is to increase W? Rs Chapter 3 Figure 05 11 Small-signal analysis of CS: rin and rout rin Chapter 3 Figure 04 Rs rout=R2 rin= Chapter 3 Figure 05 12 An example 3.2 and 3.3 (page 121) 13 3.3 A common-drain amplifier Another general use of current mirrors is to supply the bias current for a common-drain or source follower (SF) amplifier. SF amplifiers are commonly used as voltage buffers. Chapter 3 Figure 06 14 Small-signal analysis of SF amplifier: gain Av In the small-signal model, note that the voltage-controlled current source that models the body effect of MOS transistors is included as there is finite source-body voltage (unlike CS amplifier), which may become a major limitation on the small-signal gain. Note that the voltage-controlled current source modeling the body effect produces a current that is proportional to the voltage across it, which makes it equivalent to a resistor of 1/gs1. This allows to simplify the circuit to the right-hand side. Chapter 3 Figure 07 Chapter 3 Figure 08 15 Small-signal analysis of SF: rin and rout rin 1/gm1 || rds1 || 1/gs1 rout rds2 Chapter 3 Figure 06 rin= rout= Chapter 3 Figure 07 Transform to a resistor when calculating rout Chapter 3 Figure 08 16 Example 3.4 (page 123) Hence, it can be seen that body-effect is the major source of error causing the gain of the SF amplifier to be less than 1.0. 17 3.4 A common-gate amplifier A common-gate amplifier is used as a gain stage when small input impedance is desired. Also, it is often used when the input signal is a current as small input impedance is desired. Aside from its low input impedance, the common-gate amplifier is similar to a CS amplifier as the input signal is across Gate-Source terminal and output taken from the Drain terminal. Hence, in both amplifiers, the small signal gain equals the product of gm and total impedance at the drain. Chapter 3 Figure 09 18 Chapter 3 Figure 10 Chapter 3 Figure 11 19 is Chapter 3 Figure 11 20 Comparison of the impedances Chapter 3 Figure 11 Chapter 3 Figure 08 Compare to Slide 16 If RL=rds2=rds1, rin=2/gm1 for low frequency. If RL is even larger, then rin is more than 2/gm1. 21 Small-signal analysis of CG: rout rout Ix Vx Chapter 3 Figure 11 Ix = Vx/RL – (gm1+gs1)Vs1 + (Vx-Vs1)/rds1 -(gm1+gs1)Vs1 + (Vx-Vs1)/rds1 = Vs1/Rs rout VX IX [1 ( g m g s1 ) RS RS ]rds1 RL rds1 RL rds1 If RL=rds2=rds1 and Rs=0, then not surprisingly rout=rds1/2 22 Example 3.5 (page 127) 23 3.5 Source-degenerated current mirrors Simple current mirrors presented before have relatively small output impedance. To increase this output impedance, a source degenerated current mirror can be used. Chapter 3 Figure 13 Chapter 3 Figure 12 24 Small-signal model to find rout Note that in the small-signal model to compute rout, (1) the gate voltage for both Q1 and Q2 is 0 as no small-signal current flows to the gate, (2) we neglect the body effect. gm1Vgs1 = Vgs1/rds1 Compare to Slides 22 If body effect included 0V Chapter 3 Figure 13 25 Example 3.6 (page 128) Therefore, compared to the simple two-transistor current mirror, the output impedance of source-degenerated current mirror has output impedance increased by a factor equal to (1+gm2Rs). Note also that such a formula can often be applied to moderately complicated circuits to quickly estimate the impedance looking into a node. 26 3.6 Cascode current mirrors Cascode current mirrors can be used to further increase the output impedance. Note that rout’ looking into the drain of Q2 is simply rds2. The rout looking into the drain of Q4, can be derived from the formula for sourcedegenerated current mirrors, by considering Q4 as a current source with a sourcedegenerated resistor of rds2 from Q2. rout’ Thus, the output impedance is increased by a factor of gm4rds4, which is the gain of a single transistor. Such a large increase can be important to realize single-stage amplifiers with large gains. The drawback in using a cascode current mirror is the reduction of the maximum output voltage swing. Chapter 3 Figure 14 27 vgs4 vgs2 rin rout’ Both are small-signal ground voltage 0 Chapter 3 Figure 14 Minimum output voltage What is the minimum voltage at Vout to maintain Q2 and Q4 in active region? If we assume all transistors have the same sizes and currents, and therefore the same Vgsi=Veffi+Vtni, where i=1,2,3,4, then So, the Vds2 for Q2 is larger than the minimum needed which is Veff2. Since the smallest output voltage VD4 can be VDS2+Veff2 before Q4 goes into triode region, so the minimum allowed voltage for Vout is rout’ Chapter 3 Figure 14 The loss of signal swing is a serious drawback when modern analog IC are used with low power supply of 29 1V. (Later, we will see how to address this issue). Example 3.7 (page 130) So the minimum Vout is then 2Veff+ Vtn=0.98V, which 0.77V larger than the simple current mirror while rout is increased by 30 times. rout’ Chapter 3 Figure 14 30 3.7 Cascode gain stage In modern IC design, a commonly used configuration for a single-stage amplifier is a cascode amplifier. This configuration consists of a CS transistor feeding into a CG one. In (a) below, both CS Q1 and cascode transistor Q2 are NMOS (telescopic-cascode amplifier) In (b), CS Q1 is NMOS and cascode transistor Q2 is PMOS (folded-cascode amplifier). Two major reasons for cascode stages: (1) they provide large gain when current sources are realized with cascode current mirrors; (2) they limit the voltage across Q1, minimizing short channel effects. The main drawback of cascode stages is that the output voltage swing is reduced in order to keep both Q1 and Q2 in active region when compared to the CS amplifier. 31 Chapter 3 Figure 15 Small-signal model The impedance looking into source of Q2 The impedance looking into drain of Q2 Chapter 3 Figure 16 32 Example 3.9 (page 133) Chapter 3 Figure 16 The gain in this case is only a factor of 2 larger than that for a common-source amplifier. Also, almost all of the gain is across Q2. Example 3.10 revised (page 135) Chapter 3 Figure 16 The gain and output resistance is dramatically improved compared to the previous example when a cascode current 34 mirror is used for Ibias. 3.8 Differential pair and gain stage A differential pair have identically-sized and –biased transistors Q1 and Q2. It is usually used as the input stage of a Operational Amplifier. 35 Small-signal model using T model To simplify the analysis, we ignore the output impedance of the transistors temporarily. Defining the differential input voltage as Chapter 3 Figure 18 36 Differential pair with resistive load Note that rds is neglected. RL Vout- RL Vout+ Chapter 3 Figure 17 37 Differential pair with current mirror As with the CS amplifier, we can replace the resistor by current mirrors as an active load. Then, a complete differential-input, single-ended output gain stage can be realized. This circuit is typically the first gain stage in a classical two-stage integrated OpAmp to be discussed later. From small-signal analysis of the differential pair, How to determine the small-signal output resistance rout? Chapter 3 Figure 19 38 Computing rout T model was used for Q1, Q2 and diode-connected Q3 was replaced by an equivalent resistance and hybrid-pi model for Q4. Then assuming the effect of rds1 can be ignored (since it is much larger than rs1), then D3/G3/D1 Chapter 3 Figure 20 39 Computing rout D3/G3/D1 Chapter 3 Figure 20 40

Download PDF

- Similar pages
- Modern Electronics Exercise 7
- Mid-Term Exam ENEE 306 Spring 2005 March 22, 2005
- v V
- File: h:/coursesS10/303/303finaInClaS10.doc RWN 05/17/10
- A36
- A35
- Problem A10
- phasor-based analysis and Spice models
- Student ID Number: PRELIMINARY EXAMINATION Department of Physics University of Florida
- Overture Letter Plate Inner & Outer Set Fixing and Operating