AMD E8860 / Xilinx Kintex-7 Graphic & Processing board
Because GPU and FPGA offer a formidable blend for
video applications, Interface Concept has developed the
By combining the power of the E8860 GPU and the high
ratio processing power to consumption of a Xilinx Kintex-7
FPGA with the high communication capabilities of the
OpenVPX, the IC-GRA-VPX6a can manage many video
flows in a single VPX chassis slot, allowing high cost
The IC-GRA-VPX6a is designed to mix up-to-date digital
video interfaces with still in use legacy standards such as
Stanag 3350 (with useful features: external synchronization, Vertical Interface Reference, etc.).
Its modular design means it can also be used for very
specific applications not necessarily detailed here.
Consult us to share your specifications.
Main features
The GPU part of the IC-GRA-VPX6a is based on our ICGRA-XMCc board and its AMD Mobility Radeon™ e8860,
offering 6 independent display controllers supporting resolutions from VGA (640x480) up to WQUXGA (4096 x 2160
@ 30Hz).
By routing XMC2 Jn26 IOs in X38s+X8d+X12d connection scheme to P5/P6, the IC-GRA-VPX6a can reproduce
on the backplane all the interfaces (digital/analog/TV) available the IC-GRA-XMCc (refer to the IC-GRA-XMCc Data Sheet
for details).
Graphic Processor Unit:
► AMD Radeon E8860
► 2GB on-chip GDDR5 memory (1GHz 128-bit)
► 6 independant display controllers
But the main interest is the capability to link two Display
Port outputs directly to the Kintex-7 325T through GTX
transceivers, allowing thus to process video signals in the
Moreover, direct attachment of the FPGA to the backplane
(through 24 LVDS - useable as single-ended signals - and
12 high speed TX lanes) allows to implement data flow inputs coming from external HDMI output, IR camera, video
data recorder or others. Coming whether from the embedded GPU or the backplane, it is then possible to implement
in the FPGA: signal decoding, video scaling, frame buffering, synchronization, images merging and digital (ARINC818, HDMI, DP...) or analog (VGA, Stanag3350B/C...)
video encoding.
For analog outputs, the IC-GRA-VPX6a implements two
Video DACs and External synchronization resources
which expand the analog features already delivered by
the IC-GRA-XMCa. The IC-INT-VPX6a also integrates
an EDID Eeprom for each link where the FPGA plays the
game of a Display.
As an option, it is also possible to use a second
PMC/XMC slot supporting the XMC1 Jn16 IOs in
X38s+X8d+X12d connection scheme to P3/P4 or the
PMC1 Jn14 IOs in P64s connection scheme to P2/P3.
(refer to the IC-GRA-VPX6a Data Sheet for details)
The FPGA, the GPU and the optional PMC/XMC slot are
interconnected with the OpenVPX Data Plane through a
PCI Express switch offering one or two ports on P1 and
one port on P2.
► Xilinx Kintex-7 325T (FBG900)
► 1 GByte DDR3 SDRAM memory bank
► 1 user SPI Flash Eeprom
PCIe Switch:
► One PCIe x8 port to P1, One PCIe x4 port to P2
► One PCIe x8 port to GPU, One PCIe x4 port to FPGA
► One PCIe x8 port to optional XMC (or PCI-X PMC)
► up to 6 TMDS/DisplayPorts on P5/P6 (4 exclusive with
front interfaces)
► up to 3 VGA interfaces (1 from GPU, 2 from FPGA),
configurable as :
• RGB (Sync on green, composite or seperated
(one of them available in Composite or S-Video - NTSC/PAL)
► 12 GTX TX lanes (from FPGA)
► 24 LVDS (from FPGA)
• 4 mini DisplayPorts (option)
• Console and USB port
Note: some configurations require factory settings
► PIC µ-controller for System Management (per VITA 46.11)
► Power supply monitoring / Temperature sensor...
► Status LEDs
► Engineering kit for debug: JTAG/COP...
► 6U Rear Transition Module
The IC-INT-VPX6b is a 6U x 4HP (1”) VPX board compliant
with 6U module definitions of the VITA 46.0 standard (0.80 or
0.85” : please consult us), available in air-cooled and conduction
cooled (without front I/O) versions.
AMD E8860 / Xilinx Kintex-7 Graphic & Processing board
Drivers / Firmware
Graphic Driver: For x86 architecture, the IC-GRA-VPX6a board is compatible with the Linux and Windows editions of the Catalyst drivers provided by AMD.
For other configurations - architectures / OS (Linux/OpenSource, VxWorks, Integrity, etc) - please consult us.
FPGA Firmware: concerning video processing, Interface Concept has developped a set of IPs allowing to perform HDMI or DisplayPort video decoding,
Camera Link decoding / frame buffering, Video scaling, Video interlacing, Timing/Synchronization control, HDMI/DP/VGA/STANAG3350 encoding.
Those example designs can be used to match customer needs. Furthermore, the FPGA can be used by the customers as an open platform to implement
their own IPs.
COPYRIGHT INTERFACE CONCEPT - 2014 - IC-GRA-VPX6a.v01. All names, products and services mentioned are trademarks or registred trademarks of their respective holders.
Block Diagram
Environnement Specifications:
Please consult the IC-GRA-VPX6a page at www.interfaceconcept.com.
Ordering Information:
Please contact our sales department : tel. +33 (0)2 98 577 176 - email : info@interfaceconcept.com
This document supersedes any earlier documentation relating to the products referred to herein. The information contained in this document is current at the
date of publication. It may subsequently be updated or withdrawn without notice.
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