240PIN DDR2 533 VLP Registered DIMM
TS128MQR72V5UL
1024MB With 128Mx8 CL4
Description
Placement
The TS128MQR72V5UL is a 128M x 72bits DDR2-533
Registered DIMM. The TS128MQR72V5UL consists of 9
pcs 128Mx8 bits DDR2 SDRAMs in 68 ball FBGA
package, 1 pcs register in 96 ball uBGA package, 1 pcs
PLL driver IC and a 2048 bits serial EEPROM on a
240-pin printed circuit board. The TS128MQR72V5UL is
B
a Dual In-Line Memory Module and is intended for
mounting into 240-pin edge connector sockets.
D
Synchronous design allows precise cycle control with the
E
F
use of system clock. Data I/O transactions are possible
on both edges of DQS. Range of operation frequencies,
A
programmable latencies allow the same device to be
useful for a variety of high bandwidth, high performance
memory system applications.
Features
•
RoHS compliant products.
•
JEDEC standard 1.8V ± 0.1V Power supply
•
VDDQ=1.8V ± 0.1V
•
Max clock Freq: 266MHZ; 533Mb/S/Pin.
•
Posted CAS
•
Programmable CAS Latency: 3, 4, 5
•
Programmable Additive Latency :0, 1, 2, 3 and 4
•
Write Latency (WL) = Read Latency (RL)-1
•
Burst Length: 4, 8(Interleave/nibble sequential)
•
Programmable sequential / Interleave Burst Mode
•
Bi-directional Differential Data-Strobe (Single-ended
C
I
L
J
data-strobe is an optional feature)
•
Off-Chip Driver (OCD) Impedance Adjustment
•
MRS cycle with address key programs.
•
On Die Termination
•
Serial presence detect with EEPROM
Transcend Information Inc.
G
H
K
PCB: 09-2770
1
240PIN DDR2 533 VLP Registered DIMM
TS128MQR72V5UL
1024MB With 128Mx8 CL4
Dimensions
Pin Description
Side
Millimeters
Inches
Symbol
A
133.35±0.15
5.250±0.006
A0~A13, BA0,~BA2
Address input, bank address
B
55
2.165
DQ0~DQ63
Data Input / Output.
C
63
2.480000
CB0~CB7
Data Check Bits Input/Output
D
5
0.197
DQS0~DQS8
Data strobe
E
2.5
0.0980
F
1.5±0.10
0.059±0.039
/DQS0~/DQS8
Data strobe , negative line
G
5.175
0.204
CK0, /CK0
Clock Input.
H
2.2
0.867
CKE0, CKE1
Clock Enable Input.
I
4
0.157
ODT0, ODT1
On-die termination control line
J
10
0.394
/CS0, /CS1
Chip Select Input.
K
18.3±0.15
0.72±0.006
/RAS
Row Address Strobe
L
1.27±0.10
0.050±0.004
/CAS
Column Address Strobe
/WE
Write Enable
DM0~DM8
Data-in Mask
/DQS9~/DQS17
Data strobes(Read),negative line
VDD
+1.8 Voltage power supply
VDDQ
+1.8 Voltage Power Supply for DQS
VREF
Power Supply for Reference
(Refer Placement)
Function
Serial
EEPROM
Positive
Power
VDDSPD
Supply
Transcend Information Inc.
2
SA0~SA2
Address select for EEPROM
SCL
Serial PD Clock
SDA
Serial PD Add/Data input/output
VSS
Ground
/RESET
Register and PLL control pin
/Err_Out
Parity error found in the bus
Par_In
Parity bit for address and control bus
NC
No Connection
240PIN DDR2 533 VLP Registered DIMM
TS128MQR72V5UL
1024MB With 128Mx8 CL4
Pinouts:
Pin
Pin
Pin
Pin
Pin
Pin
No
Name
No
Name
No
Name
01 VREF
41 VSS
81 DQ33
02 VSS
42 CB0
82 VSS
03 DQ0
43 CB1
83 /DQS4
04 DQ1
44 VSS
84 DQS4
05 VSS
45 /DQS8
85 VSS
06 /DQS0
46 DQS8
86 DQ34
07 DQS0
47 VSS
87 DQ35
08 VSS
48 CB2
88 VSS
09 DQ2
49 CB3
89 DQ40
10 DQ3
50 VSS
90 DQ41
11 VSS
51 VDDQ
91 VSS
12 DQ8
52 CKE0
92 /DQS5
13 DQ9
53 VDD
93 DQS5
14 VSS
54 BA2
94 VSS
15 /DQS1
55 Err_Out
95 DQ42
16 DQS1
56 VDDQ
96 DQ43
17 VSS
57 A11
97 VSS
18 /RESET
58 A7
98 DQ48
19 NC
59 VDD
99 DQ49
20 VSS
60 A5
100 VSS
21 DQ10
61 A4
101 SA2
22 DQ11
62 VDDQ
102 NC
23 VSS
63 A2
103 VSS
24 DQ16
64 VDD
104 /DQS6
25 DQ17
65 VSS
105 DQS6
26 VSS
66 VSS
106 VSS
27 /DQS2
67 VDD
107 DQ50
28 DQS2
68 Par_In
108 DQ51
29 VSS
69 VDD
109 VSS
30 DQ18
70 A10/AP
110 DQ56
31 DQ19
71 BA0
111 DQ57
32 VSS
72 VDDQ
112 VSS
33 DQ24
73 /WE
113 /DQS7
34 DQ25
74 /CAS
114 DQS7
35 VSS
75 VDDQ
115 VSS
36 /DQS3
76 /CS1
116 DQ58
37 DQS3
77 ODT1
117 DQ59
38 VSS
78 VDDQ
118 VSS
39 DQ26
79 VSS
119 SDA
40 DQ27
80 DQ32
120 SCL
NC = No Connect, RFU = Reserved for Future Use
*Please refer Block Diagram
Transcend Information Inc.
Pin
No
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
3
Pin
Name
VSS
DQ4
DQ5
VSS
*DM0,DQS9
*NC,/DQS9
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
*DM1,DQS10
*NC,/DQS10
VSS
RFU
RFU
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
*DM2,DQS11
*NC,/DQS11
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
*DM3,DQS12
*NC,/DQS12
VSS
DQ30
DQ31
VSS
Pin
No
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
Pin
Name
CB4
CB5
VSS
*DM8,DQS17
*NC,/DQS17
VSS
CB6
CB7
VSS
VDDQ
CKE1
VDD
NC
NC
VDDQ
A12
A9
VDD
A8
A6
VDDQ
A3
A1
VDD
CK0
/CK0
VDD
A0
VDD
BA1
VDDQ
/RAS
/CS0
VDDQ
ODT0
A13
VDD
VSS
DQ36
DQ37
Pin
No
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
Pin
Name
VSS
*DM4,DQS13
*NC,/DQS13
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
*DM5,DQS14
*NC,/DQS14
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
RFU
RFU
VSS
*DM6,DQS15
*NC,/DQS15
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
*DM7,DQS16
*NC,/DQS16
VSS
DQ62
DQ63
VSS
VDDSPD
SA0
SA1