Philips TDA7057AQ Data Sheet

INTEGRATED CIRCUITS

DATA SHEET

TDA7057AQ

2

×

8 W stereo BTL audio output amplifier with DC volume control

1998 Apr 07 Product specification

Supersedes data of 1997 July 15

File under Integrated Circuits, IC01

Philips Semiconductors

2

×

8 W stereo BTL audio output amplifier with DC volume control

Product specification

TDA7057AQ

FEATURES

•

DC volume control

•

Few external components

•

Mute mode

•

Thermal protection

•

Short-circuit proof

•

No switch-on and switch-off clicks

•

Good overall stability

•

Low power consumption

•

Low HF radiation

•

ESD protected on all pins.

QUICK REFERENCE DATA

SYMBOL

V

P

P out

PARAMETER supply voltage output power

GENERAL DESCRIPTION

The TDA7057AQ is a stereo BTL output amplifier with DC volume control. The device is designed for use in TVs and monitors, but is also suitable for battery-fed portable recorders and radios.

Missing Current Limiter (MCL)

A MCL protection circuit is built-in. The MCL circuit is activated when the difference in current between the output terminal of each amplifier exceeds 100 mA

(typical 300 mA). This level of 100 mA allows for single-ended headphone applications.

CONDITIONS

V

P

V

P

V

P

= 12 V; R

L

= 16

Ω

= 12 V; R

L

= 8

Ω

= 15 V; R

L

= 8

Ω

I

G v

∆

G v q(tot)

THD voltage gain voltage gain control total quiescent current total harmonic distortion

V

P

= 12 V; R

L

=

∞

P o

= 0.5 W

39.5

40.5

41.5

dB

68 73.5

− dB

−

−

22

0.3

ORDERING INFORMATION

TYPE

NUMBER

TDA7057AQ

NAME

DBS13P

PACKAGE

DESCRIPTION plastic DIL-bent-SIL power package; 13 leads (lead length 12 mm)

25

1 mA

%

VERSION

SOT141-6

1998 Apr 07 2

Philips Semiconductors

2

×


BLOCK DIAGRAM handbook, full pagewidth input 1

DC volume control 1

3

1

TDA7057AQ

V

P

4

I i

Ι

I i

13 positive output 1

11 negative output 1

Vref

STABILIZER

TEMPERATURE

PROTECTION input 2

DC volume control 2

5

7

I i

ΙΙ

I i


8 positive output 2

2 not connected

6 signal ground

12 power ground 1

9 power ground 2

MSA714

Fig.1 Block diagram.

Product specification

TDA7057AQ

1998 Apr 07 3


2

×


PINNING

SYMBOL PIN

VC1 n.c.

V l (1)

V

P

V l (2)

SGND

VC2

OUT2+

PGND2

OUT2

−

OUT1

−

PGND1

OUT1

+

DESCRIPTION

1

2

DC volume control 1 not connected

5

6

3

4 voltage input 1 positive supply voltage voltage input 2 signal ground

7

8

DC volume control 2 positive output 2

9 power ground 2



12 power ground 1

13 positive output 1


TDA7057AQ handbook, halfpage

VC1 1 n.c.

2

V I (1)

VP

V

I (2)

3

4

SGND

5

6

VC2 7 TDA7057AQ

OUT2 8

PGND2 9

OUT2 10

OUT1 11

PGND1 12

OUT1 13

MSA716

Fig.2 Pin configuration.

FUNCTIONAL DESCRIPTION

The TDA7057AQ is a stereo output amplifier with two DC volume control stages. The device is designed for TVs and monitors, but is also suitable for battery-fed portable recorders and radios.

In conventional DC volume control circuits the control or input stage is AC-coupled to the output stage via external capacitors to keep the offset voltage low.

In the TDA7057AQ the two DC volume control stages are integrated into the input stages so that no coupling capacitors are required and a low offset voltage is still maintained. The minimum supply voltage also remains low.

The BTL principle offers the following advantages:

•

Lower peak value of the supply current

•

The frequency of the ripple on the supply voltage is twice the signal frequency.

Consequently, a reduced power supply with smaller capacitors can be used which results in cost reductions.

For portable applications there is a trend to decrease the supply voltage, resulting in a reduction of output power at conventional output stages. Using the BTL principle increases the output power.

The maximum gain of the amplifier is fixed at 40.5 dB.

The DC volume control stages have a logarithmic control characteristic. Therefore, the total gain can be controlled from +40.5 dB to

−

33 dB. If the DC volume control voltage falls below 0.4 V, the device will switch to the mute mode.

The amplifier is a short-circuit protected to ground, V

P

and across the load. A thermal protection circuit is also implemented. If the crystal temperature rises above

+150

°

C the gain will be reduced, thereby reducing the output power.

Special attention is given to switch-on and switch-off clicks, low HF radiation and a good overall stability.

1998 Apr 07 4


2

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TDA7057AQ

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

CONDITIONS SYMBOL

V

P

I

ORM

I

OSM

P tot

T amb

T stg

T vj t sc

V n

PARAMETER supply voltage repetitive peak output current non-repetitive peak output current total power dissipation operating ambient temperature storage temperature virtual junction temperature short-circuit time input voltage pins 1, 3, 5 and 7

T case

< 60

°

C

MIN.

−

−

−

55

−

−

−

−

−

−

40

THERMAL CHARACTERISTICS

SYMBOL

R th j-c

R th j-a

PARAMETER thermal resistance from junction to case thermal resistance from junction to ambient in free air

VALUE

Power dissipation

Assume V

P

= 12 V and R

L

= 16

Ω

. The maximum sine wave dissipation is 2

×

1.8 W = 3.6 W.

At T amb(max)

= 60

°

C:

R th tot

= (150

−

60)/3.6 = 25 K/W.

R th tot

= R th j-c

+ R th c-hs

+ R th hs

.

R th c-hs

+ R th hs

= 25

−

4 = 21 K/W.

4

40

MAX.

18

1.25

1.5

22.5

+85

+150

150

1

5

V

A

A

W

°

C

°

C

°

C hr

V

UNIT

UNIT

K/W

K/W

1998 Apr 07 5


2

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TDA7057AQ

CHARACTERISTICS

V

P

= 12 V;T amb

= 25

°

C; f i

= 1 kHz; R

L

= 16

Ω

; unless otherwise specified (see Fig.13).

SYMBOL PARAMETER

V

P

I q(tot) voltage supply total quiescent current

Maximum gain; V

1,7

≥

1.4 V

V

P

= 12 V; R

L

=

∞

; note 1

P o output power total harmonic distortion voltage gain

THD = 10%; R

L

= 16

THD = 10%; R

L

THD=10%; R

V

P

= 15 V

L

= 8

Ω

= 8

Ω

;

Ω

P o

= 0.5 W THD

G v

V i(rms)

V o(n)

B

SVRR



V

OS



Z i

α cs



G v

 input signal handling (RMS value) G v

= 0 dB; THD < 1% noise output voltage bandwidth f i

= 500 kHz; note 2 at

−

1 dB supply voltage ripple rejection

DC output offset voltage note 4

|

V

13

- V

11

|

and |V

10

- V

8

| input impedance (pins 3 and 5) channel separation channel unbalance

R

S

= 5 k

Ω note 5

G

1

= 0 dB; note 6

Mute position; V

1

= V

7

=0.4 V

±

30 mV

4.5

−

3.0

−

−

−

39.5

34

−

15

1

−

−

40

−

−

V o(mute) output voltage in mute position V i

= 1.0 V; note 7

−

DC volume control

∆

G v gain control range l

DC volume control current V

1

CONDITIONS

= V

7

= 0 V

MIN.

68

−

20

−

8

40.5

41.5

−

210 note 3

−

38

−

−

−

0

−

−

−

TYP.

22

3.5

5.3

0.3

20

−

35

73.5

25

−

−

−

1

−

1

1

−

−

MAX.

18.5

25

200

25

45

30

V

UNIT mA

W

W

W dB dB dB

% dB

V

µ

V dB dB mV k

Ω

µ

V dB

µ

A

Notes

1. With a load connected to the outputs the quiescent current will increase, the maximum value of this increase being equal to the DC output offset voltage divided by R

L

.

2. The noise output voltage (RMS value) at f i

= 500 kHz is measured with R

S

= 0

Ω

and bandwidth = 5 kHz.

3. 20 Hz to 300 kHz (typical.

4. The ripple rejection is measured with R

S is applied to the positive supply rail.

= 0

Ω

and f = 100 Hz to 10 kHz. The ripple voltage (V ripple

= 200 mV RMS)

5. The channel unbalance is measured with V

DC1

= V

DC2

.

6. The channel unbalance at G

1

= 0 dB is measured with V

DC1

7. The noise output voltage (RMS value) is measured with R

S

= V

DC2

.

= 5 k

Ω

unweighted.

1998 Apr 07 6


2

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TDA7057AQ

MBG672

40 handbook, halfpage

Iq

(mA)

30

20

10

0

0 4 8 12 16

VP (V)

20

Fig.3

Quiescent current as a function of supply voltage.


THD

(%)

8

4

0

10

−

2

10

−

1

MBG675

(1) (2)

1

Pout (W)

10

(1) R

L

(2) R

L

= 16

Ω

.

= 8

Ω

.

Fig.4 THD as a function of output power.

MBG674


THD

(%)

8

6

4

2

0

10

− 2

(1)

(2)

10

− 1

1 10 f (kHz)

10

2

(1) G v

= 40 dB; P o

= 0.5 W.

(2) G v

= 30 dB; P o

= 0.5 W.

Fig.5 THD as a function of frequency.

1998 Apr 07 7


Po

(W)

8

4

0

0 4 8 12

(1)

(2)

MBG676

16

VP (V)

20

THD = 10%; f = 1 kHz.

(1) R

(2) R

L

L

= 8

Ω

.

= 16

Ω

.

Fig.6

Output power as a function of supply voltage.


2

×



TDA7057AQ


Pd

(W)

10

(1)

MBG677

(2)

5

0

0 4 8 12 16

VP (V)

20

(1) R

L

(2) R

L

= 8

Ω

.

= 16

Ω

.

Fig.7

Total worst case power dissipation as a function of supply voltage.

MBG667


Gv

(dB)

40

0

−

40

−

80

−

120

0 0.4

0.8

1.2

1.6

VVC (V)

2.0

Fig.8

Voltage gain as a function of volume control voltage.


Vno

(mV)

10

−

1

MBG678

10

−

2

0 0.4

0.8

1.2

1.6

VVC (V)

2.0

f = 22 Hz to 22 kHz.

Fig.9

Noise voltage as a function of volume control voltage.

1998 Apr 07 8

(1)

MBG663


SVRR

(dB)

−

20

−

40

−

60

−

80

10

−

2

10

−

1

1

(2)

10 f (kHz)

10

2

(1) V

DC

= 1.4 V; V ripple

= 0.2 V.

(2) V

DC

= 0.4 V; V ripple

= 0.2 V.

Fig.10 SVRR as a function of frequency.


2

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TDA7057AQ

2.0

handbook, halfpage

Vin

(V)

1.6

1.2

0.8

0.4

0

0 4

MBG665

8 12 16

VP (V)

20

MBG666

IVC

(

µ

A)

30

20

10

0

−

10

−

20

−

30

0 0.4

0.8

1.2

1.6

VVC (V)

2.0

THD = 1 %.

Fig.11 Input signal handling.

Fig.12 Volume control current as a function of volume control voltage.

APPLICATION INFORMATION

The application diagram is illustrated in Fig.13.

Test conditions

T amb

V

DC

= 25

°

C unless otherwise specified; V

P

= 1.4 V; f i

= 1 kHz; R

L

= 16

Ω

.

= 12 V;

The quiescent current has been measured without load impedance.

The output power as a function of the supply voltage has been measured at THD = 10%. The maximum output power is limited by the maximum power dissipation and the maximum available output current.

The maximum input signal voltage is measured at

THD = 1% at the output with a voltage gain of 0 dB.

To avoid instabilities and too high a distortion, the input ground and power ground must be separated as far as possible and connected as close as possible to the IC.

The DC volume control can be applied in several ways.

Two possible circuits are shown below the main application diagram. The circuits at the control pin will influence the switch-on and switch-off behaviour and the maximum voltage gain.

For single-end applications the output peak current must not exceed 100 mA. At higher output currents the short-circuit protection (MCL) will be active.

Thermal considerations:

At high junction temperatures (>125

°

C) the voltage gain will decrease when it is higher than 0 dB. This results in a decrease of the output voltage and an increase of the distortion level. Thus for an optimal performance of the IC the heatsink has to be designed properly.

Calculation example for application: V

P

= 15 V; R

L

= 8

Ω

, stereo sine wave; worst case sine wave power dissipation is 12 W.

For T amb(max)

= 40

°

C the thermal resistance from junction to ambient R th j-a

=

(

125 –

12

40

)

= 7.1 K/W

The thermal resistance of the heatsink becomes:

R

R th h-a th h-a

= R th j-a

−

(R th j-c

+ R th c-h

);

= 7.1

−

(4 + 0.1) = 3 K/W.

It should be noted that for ‘music power’ the power dissipation will be approximately half of the sine wave dissipation. Thus a smaller heatsink can be used.

1998 Apr 07 9


2

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8 W stereo BTL audio output amplifier with DC volume control handbook, full pagewidth input 1

Rs = 5 k

Ω

470 nF

470 nF input 2

Rs = 5 k

Ω

DCvolume

4

TDA7057AQ

3

1

I

+

i

I

−

i

5

7

STABILIZER

TEMPERATURE

MCL

PROTECTION

I

−

i

I

+

i

(1)

100 nF 220

µ

F

VP = 12 V

13 +

11

−

10 −

8

+

(2)

(2)

6 9 signal ground power ground

12 volume control

1

µ

F

1, 7 maximum voltage gain 34 dB

1 M

Ω volume control

1

µ

F

VP = 12 V

100 k

Ω

1, 7 maximum voltage gain 40 dB

22 k

Ω

MBG679

(1) This capacitor can be omitted if the 220

µ

F electrolytic capacitor is connected close to pin 5.

(2) R

L

= 16

Ω

.

Fig.13 Test and application diagram.

1998 Apr 07 10


TDA7057AQ


2

×


PACKAGE OUTLINE

DBS13P: plastic DIL-bent-SIL power package; 13 leads (lead length 12 mm) non-concave x

D

Eh

D h


TDA7057AQ

SOT141-6 d view B: mounting base side

A

2

B j E

A

L

3

L

Q c v M

1

Z e

1 w

M

13 m e

2 b p e

0 5 scale

10 mm

DIMENSIONS (mm are the original dimensions)

UNIT A A

2 b p c D

(1) d D h mm

17.0

15.5

4.6

4.2

0.75

0.60

0.48

0.38

24.0

23.6

20.0

19.6

10

E

(1) e

12.2

11.8

3.4

e

1 e

2

1.7

5.08

E h

6 j L

3.4

3.1

12.4

11.0

L

3

2.4

1.6

m

4.3

Q

2.1

1.8

v w x Z

(1)

0.8

0.25

0.03

2.00

1.45

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

OUTLINE

VERSION

SOT141-6

IEC

REFERENCES

JEDEC EIAJ

EUROPEAN

PROJECTION

ISSUE DATE

95-03-11

97-12-16

1998 Apr 07 11


2

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TDA7057AQ

SOLDERING

Introduction

There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.

A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011).

The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (T stg max

). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit.

Repairing soldered joints

Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300

°

C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400

°

C, contact may be up to 5 seconds.

Soldering by dipping or by wave

The maximum permissible temperature of the solder is

260

°

C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed

5 seconds.

DEFINITIONS

Data sheet status

Objective specification

Preliminary specification


This data sheet contains target or goal specifications for product development.

This data sheet contains preliminary data; supplementary data may be published later.

This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.

1998 Apr 07 12


2

×


NOTES


TDA7057AQ

1998 Apr 07 13


2

×


NOTES


TDA7057AQ

1998 Apr 07 14


2

×


NOTES


TDA7057AQ

1998 Apr 07 15

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United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,

Tel. +1 800 234 7381

Uruguay: see South America

Vietnam: see Singapore

Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. +381 11 625 344, Fax.+381 11 635 777

For all other countries apply to: Philips Semiconductors,

International Marketing & Sales Communications, Building BE-p, P.O. Box 218,

5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825

Internet: http://www.semiconductors.philips.com

© Philips Electronics N.V. 1998 SCA59

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.

Printed in The Netherlands

545102/1200/04/pp16 Date of release: 1998 Apr 07 Document order number: 9397 750 03255

Philips TDA7057AQ Data Sheet

INTEGRATED CIRCUITS

DATA SHEET

2

×

8 W stereo BTL audio output amplifier with DC volume control

2

8 W stereo BTL audio output amplifier with DC volume control

TDA7057AQ

Philips Semiconductors – a worldwide company

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Table of contents

Philips TDA7057AQ Data Sheet

INTEGRATED CIRCUITS

DATA SHEET

2

×

8 W stereo BTL audio output amplifier with DC volume control

2

8 W stereo BTL audio output amplifier with DC volume control

TDA7057AQ

Philips Semiconductors – a worldwide company

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Table of contents