Violin Memory 6000 Series Installation guide

Technical Report
Best Practices for Connecting Violin Memory
Arrays to IBM AIX and PowerVM
Host Attachment Guidelines for Using Violin Memory Arrays with IBM AIX and
PowerVM through Fibre Channel Connections
Version 1.1
Abstract
This technical report describes best practices and host attachment procedures for connecting
Violin flash Memory Arrays through Fibre Channel to systems running on the IBM AIX
operating system with IBM PowerVM virtualization.
Connecting Violin Memory Arrays to IBM AIX and PowerVM
Table of Contents
1
Introduction ........................................................................................................................ 3
1.1 Intended Audience ......................................................................................................... 3
1.2 Additional Resources ..................................................................................................... 3
2 Planning for AIX Installation ............................................................................................. 4
2.1 Gateway and Array Firmware ........................................................................................ 4
2.2 Minimum Recommended Patch levels for AIX ............................................................... 4
2.3 Minimum Recommended Patch Levels for VIO Partition ................................................ 4
3 Fibre Channel Best Practices............................................................................................ 5
3.1 Direct Attach Topology................................................................................................... 5
3.2 Fibre Channel SAN Topology ........................................................................................ 6
3.3 FC SAN Topology with Dual VIO Partitions .................................................................... 6
3.4 SAN Configuration and Zoning ...................................................................................... 8
4 Virtual IO (VIO Partitions) .................................................................................................. 9
5
4.1 Boot Support for Violin LUNS in PowerVM Environment ................................................ 9
Storage Configuration ......................................................................................................10
5.1 LUN Creation ................................................................................................................10
5.2 Setting NACA Bit per LUN using command-line ( vMOS 5.5.1 and below) ....................12
5.3 Initiator Group Creation.................................................................................................13
5.4 LUN Export to Initiator Group ........................................................................................14
6 LPAR/Host Configuration .................................................................................................15
6.1 Multi-Pathing Driver Considerations ..............................................................................15
6.2 MPIO PCM installation ..................................................................................................15
6.3 MPIO Fileset Installation ...............................................................................................16
6.4 LUN Discovery ..............................................................................................................17
7 Discovering LUN and Enclosure Serial no on AIX ..........................................................18
8
Deploying Multipathing with DMP....................................................................................19
8.1 Obtaining DMP Binaries ................................................................................................19
8.2 Prerequisites for DMP support on AIX for Violin Storage ..............................................19
8.3 AIX Rootability with VERITAS DMP ..............................................................................19
8.4 Installing DMP on AIX ...................................................................................................19
About Violin Memory ..............................................................................................................23
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Connecting Violin Memory Arrays to IBM AIX and PowerVM
1 Introduction
This technical report describes best practice recommendations and host attachment procedures for connecting
Violin arrays through Fibre Channel to systems running on the IBM AIX operating system with IBM PowerVM
virtualization. The information in this report is designed to follow the actual process of connecting Violin arrays
to AIX systems.
This document covers the information listed below:
• AIX 6.1
• AIX 7.1
• AIX 5.3
• PowerVM Virtualization
• SAN best practices
1.1
Intended Audience
This report is intended for IT architects, storage administrators, systems administrators and other IT operations
staff who are involved in planning, configuring and managing IBM P Series environments. The report assumes
that readers are familiar with the configuration of the following components:
• vMOS (Violin Memory Operating System) and Violin 3000 and 6000 Series Storage
• IBM P Series Server and AIX operating environments, including PowerVM virtualization
• Fibre Channel Switches and Host bus adapters
1.2
Additional Resources
IBM FAQ on NPIV in PowerVM Environments:
http://www-01.ibm.com/support/docview.wss?uid=isg3T1012037
Symantec Veritas Storage Foundation Installation Guide:
http://www.symantec.com/business/support/resources/sites/BUSINESS/content/live/DOCUMENTATION/5000/
DOC5814/en_US/dmp_install_601_aix.pdf
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Connecting Violin Memory Arrays to IBM AIX and PowerVM
2 Planning for AIX Installation
This section covers AIX platform-specific prerequisites required for a clean and successful install.
2.1
Gateway and Array Firmware
The below are the minimum supported levels for Array and Gateway Code levels for AIX Platform:
3000
6000
Minimum Recommended Array Code Level
A5.1.5
A5.5.1 HF1*
Minimum Recommended Gateway Code Level
G5.5.1
G5.5.1
Violin Array Model ------------------------------------>
vMOS 6.0 is not yet supported on AIX platform
HF1* : Hotfix 1
2.2
Minimum Recommended Patch levels for AIX
The below levels of Technology Level (TL) and Service Pack’s (SP) are strongly recommended to be
upgraded before deploying Violin Storage for use with AIX:
Patch Level ( oslevel –s)
AIX Version
6100-07-05
6.1
2.3
7.1
7100-01-04
5.3
5300-12-05
Minimum Recommended Patch Levels for VIO Partition
The below patch level is strongly recommended on the VIO partitions before deploying Violin Storage for use
with AIX:
ioslevel
4
2.1.3.10-FP-23
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3 Fibre Channel Best Practices
Host attach of Violin Storage to AIX Partitions is supported via the methods listed below:
• Direct Attach
• FC SAN Attach
3.1
Direct Attach Topology
In the topology shown in Figure 1, the host partition’s HBAs are directly connected to a Violin target. There is
no SAN switch in the topology. To achieve optimal high availability, we need to make sure we attach each HBA
to a unique gateway for high availability. This is the simplest host attach and there is no SAN configuration
involved as it is directly attached. A total of two hosts can be attached to the Violin Array in this configuration.
The below diagram shows one host attached to the array. This topology assumes use of full partitions or
fractional partitions without using any virtualization.
Figure 1. Direct Attach Topology
Power 720
D1
Dual Port
HBA 2
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D2
D3
D4
D5
D6
D7
D8
Dual Port
HBA 1
Connecting Violin Memory Arrays to IBM AIX and PowerVM
3.2
Fibre Channel SAN Topology
In the topology shown in Figure 2, the Host Partition’s HBAs are directly connected to a Violin Target via a
Fiber Channel SAN. To achieve optimal high availability, we need to make sure zone to each HBA port to each
gateway (MG) for High Availability. Multiple Hosts can be attached to the Violin Array in this configuration. The
below diagram shows one host attached to the fabric. This topology assumes use of full partitions or fractional
partitions without using any kind of virtualization.
Figure 2. Fibre Channel Topology
Power 720
D1
D2
D3
D4
D5
D6
D7
D8
Dual Port
HBA 2
Dual Port
HBA 1
20055KB
0
3.3
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Dual Fabric
SAN
20055KB
0
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1
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FC SAN Topology with Dual VIO Partitions
The topology shown on the next page shows a LPAR connected via 2 VIO Partitions to Violin Storage.
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Connecting Violin Memory Arrays to IBM AIX and PowerVM
This is a fully redundant configuration that can survive SAN failures, Gateway (Controller) failures, and HBA
failures. The Guest LPAR has 2 Virtual HBAs configured off each VIO Partition. Each VIO partition has two
physical HBA ports, each connecting to a unique Fabric that is in turned zoned to both the Gateways.
LPAR1
vfchostx
vfchosty
WWPN2
WWPN2
WWPN2
WWPN2
WWPN1
WWPN1
WWPN1
WWPN1
fcs0
fcs2
fcs1
fcs3
vfchostx
VIO1
fcs0
VIO2
fcs1
Fabric 1
p750/
vmem
Zone1
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vfchosty
fcs0
fcs1
Fabric 2
p750/
vmem
Zone2
p750/
vmem
Zone1
p750/
vmem
Zone2
Connecting Violin Memory Arrays to IBM AIX and PowerVM
3.4
SAN Configuration and Zoning
The following best practices are recommended:
• Set the SAN topology to Point-to-Point
• Set the port speed of the Switch port to 8 GB for Violin Targets
• On Brocade 8 GB Switches, please set the fillword setting to 3 for ports connected to Violin Targets.
# portcfgfillword <port> 3
3.4.1
Zoning Best Practices
• Configure WWPN based zoning or WWPN based Aliases
• Limit HBA ports (Initiators) in a zone to one. For instance, there should not be multiple Initiators in a single
zone
• Each HBA port (initiator) can be zoned to multiple Targets ( Violin WWPN Ports)
• Limit the number of paths as seen by the host to an allowable number. For example if you have 2 HBA ports
out of your server, zone each HBA port to 2 unique target ports on each gateway. I.e. avoid putting all target
ports into one zone.
• The ideal number of paths to a MPIO node is 2 or 4 paths. Adding more paths adds more resilience, but
does not yield better performance.
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4 Virtual IO (VIO Partitions)
IBM PowerVM Supports N Port Virtualization (NPIV) with 8 GB host bus adapters. NPIV allows us to virtualize
a port on a Fibre Channel switch. An NPIV-capable FC HBA can have multiple N_Ports, each with a unique
virtual WWPN. NPIV with the Virtual I/O Server (VIOS) adapter sharing capabilities allow a physical FC HBA to
be shared across multiple guest LPARs .The PowerVM implementation of NPIV enables POWER logical
partitions (LPARs) to have virtual FC HBAs, each with a unique worldwide port name (WWPN). Each virtual
Fibre Channel HBA has a unique SAN identity similar to that of a dedicated physical HBA.
It should be noted that NPIV attribute is enabled on the Switch port connected to VIO Partition on the host side
and not on the ports connected to Violin Targets.
4.1
Boot Support for Violin LUNS in PowerVM Environment
Logical partitions that connect to a VIO Partition do not have physical boot disks. Instead, they boot directly off
a Violin LUN, which needs to be mapped during LPAR configuration.
Both vSCSI and NPIV LUNS are supported for boot support.
• It is recommended to create a separate “initiator group” for boot devices when configuring Storage.
• It is required to install the Violin MPIO Driver in the VIO Partition if configuring vSCSI LUNS (for boot).The
MPIO driver ensures that there is proper multi-path support for boot devices.
• If you have a NPIV only configuration then it is not required to install the driver in the VIO partition.
• If you do need to install the Violin MPIO Driver in a VIO Partition, then please ensure that the Partition sees
only “one and only” path for during driver install. IF the Driver detects multiple paths, the install will fail. After
the driver installation is complete, one can enabled multiple paths for boot LUNS
• There are a few HBA parameters required to be set for optimal operation. These parameters are covered in
later sections of this report.
• If you are planning to upgrade AIX version on a partition when it is booting off a Violin LUN which uses NPIV,
please follow the following steps to ensure a smooth upgrade: ( Below steps are not required for vSCSI boot)
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1.
Stop application, umount file-systems, vary off volume groups.
2.
Uninstall the AIX Multipath driver package for Violin
3.
Disconnect all but one SAN path to the Partition
4.
Reboot the Partition – it will still boot from the SAN with single path into AIX
5.
Upgrade to newer AIX version and apply patches.
6.
Then install the Violin MPIO driver package for appropriate version for AIX
7.
Reboot the Partition and verify that multiple paths are discovered by MPIO for boot and data
LUNS.
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5 Storage Configuration
NOTE: This LUN configuration is identical for MPIO and DMP.
5.1
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LUN Creation
1.
Log into the Array GUI IP/hostname of the Gateway and login as admin
2.
Click on “Manage” and this will drop you directly into LUN management Screen.
3.
Create new LUNS: Click on the + sign to create new LUNS in the container. This opens up a dialog
box to create new LUNS.
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4.
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Select no of LUNs, unique names for LUNS, size for LUNS in Gigabytes, block size=512 bytes ( 4 K
Block size is not supported on AIX), select NACA ( vMOS 5.5.2 and higher). Note: Thin Provisioning is
not supported with vMOS 5.x.
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Connecting Violin Memory Arrays to IBM AIX and PowerVM
5.2
Setting NACA Bit per LUN using command-line ( vMOS 5.5.1 and below)
1.
Setting NACA bit for AIX LUNS:
vMOS 5.5.1 does not expose NACA bit from the GUI and has to be set from the command-line.
Login to the Cluster IP address of the Gateway using PUTTY(ssh) and username=admin.
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2.
Change mode to privileged user
3.
Display LUNS for NACA Bit ( this displays all the LUNS on the array ). NACA bit should be 1 for all
AIX LUNS.
4.
Set the NACA bit for the AIX LUNS. The syntax is (hit tab) lun set container <tab> name <tab> LUNname naca.
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5.
Change NACA bit for all the LUNS you plan to export on AIX Hosts and check that it is successful on
the LUNS that you want.
6.
Save the NACA bit settings
# write mem
5.3
Initiator Group Creation
Note: If setting up a VIO environment, it is recommended to set up separate Initiator Groups for LPAR boot
LUNS (one per LPAR) and data LUNS (one per cluster).
1. Create IGROUP. Create (Add) a new Initiator group (IGroup) by clicking on “add IGroup”, provide a
name unique to the hostname.
2.
Ensure that the Zoning is done and the HBA’s can see the Array Targets based on the topology
decided.
Then Select the right HBA WWPNs you want to be associated with the iGroup and hit “save.”
Then assign initiators to Igroup and click OK.
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5.4
14
LUN Export to Initiator Group
1.
Export LUNS to the IGroup by selecting them from the checkboxes and click on “export Checked
LUNS.”
2.
Select your initiator group and click “OK.”
3.
Save your configuration by committing changes by clicking on COMMIT CHANGES at the top right
hand side of the screen.
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Connecting Violin Memory Arrays to IBM AIX and PowerVM
6
LPAR/Host Configuration
Please follow the steps provide in this section for LPAR/host configuration.
6.1
Multi-Pathing Driver Considerations
Violin supports two multi-path options on AIX:
• IBM MPIO
• Symantec VERITAS DMP
NOTE : MPIO and DMP can coexist with EMC Powerpath on AIX
Violin 3000 and 6000 Arrays are supported with IBM MPIO on AIX. Violin distributes a path control module
(PCM) that supports IBM MPIO as an Active/Active Target. The PCM must be installed on the LPAR to support
multipathing using MPIO.
Violin arrays are also supported and certified with Symantec Veritas DMP and Storage Foundation 6.0.1. The
array support library for Violin is available for download from Symantec.
6.2
MPIO PCM installation
As a prerequisite to installing the PCM, it is required to set these parameters in both the guest LPAR and VIO
partitions.
6.2.1
Setting HBA Parameters
It is required to set the following attributes as follows on each of the FC protocol devices connecting to a Violin
Target depending on the MG BIOS. Please contact Violin Memory Technical Support to determine if the BIOS
version on the MG supports AIX default HBA settings. Determining the BIOS version of the MG requires a
“restricted shell license” to be installed on the MG which is not available to customers.
MG BIOS version
Dynamic tracking
fc_error_recov
VMCYL010
yes ( AIX default)
fast_fail ( AIX default)
Lower than
no
delayed_fail
VMCYL010
If required to change these values, the command examples are provided below.
Making these values effective requires a reboot of the partition.

Dynamic tracking for FC devices
# chdev -l fscsi0 -a dyntrk=no –P

FC Error Recovery
# chdev -l fscsi0 -a fc_err_recov=delayed_fail –P
It is recommended to set the following attributes as follows on each of the FC Adapter connecting to a Violin
Target to ensure that the FC layer yields maximum performance.
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
hba_num_commands
# chdev -l fcs0 -a num_cmd_elems=2048 -P

Max Transfer Size
# chdev -l fcs0 -a max_xfer_size=0x200000 -P
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NOTE: It is required to reboot the LPAR to make the above settings effective.
6.3
MPIO Fileset Installation
Download the Violin MPIO filesets from http://violin-memory.com/support after logging in with you user id.
Depending on the version of AIX you are using, you need to install the appropriate library.
AIX 7.1
7.1.0.3devices.fcp.disk.vmem
AIX 6.1
6.1.0.3devices.fcp.disk.vmem
AIX 5.3
5.3.0.3devices.fcp.disk.vmem
6.3.1
Installing the PCM
1.
Copy the library into a folder /var/tmp/violin-pcm and verify the mdchecksum from the download site.
2.
Run the AIX installer to install the library.
# smitty install (pick the input device/directory as /var/tmp/violin-pcm)
3.
Verify that the PCM is correctly installed by the below command. (An example for AIX 6.1 is shown)
# lslpp -l devices.fcp.disk.vmem.rte
Fileset
Level State
Description
---------------------------------------------------------------------------Path: /usr/lib/objrepos
devices.fcp.disk.vmem.rte 6.1.0.3 COMMITTED Violin memory array disk support for AIX 6.1
release
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6.4
LUN Discovery
After creating LUNS and exporting them to the appropriate Initiator groups, you can discover LUNS inside the
guest LPAR using cfgmgr.
# cfgmgr
1.
To identify what LUNS have been discovered,
# lsdev –Cc disk
( partial listing)
hdisk2 Available 04-00-01 VIOLIN Fibre Channel controller port
hdisk3 Available 04-00-01 MPIO VIOLIN Fibre Channel disk
hdisk4 Available 04-00-01 MPIO VIOLIN Fibre Channel disk
hdisk5 Available 04-00-01 MPIO VIOLIN Fibre Channel disk
NOTE : VIOLIN Fibre Channel Controller port is the SES device and not a usable LUN
2. To identify multiple paths detected for MPIO devices ( an example )
# lspath -l hdisk2 -F"name,parent,connwhere,path_id,status"
hdisk2,fscsi0,21000024ff35b6e2,1000000000000,0,Enabled
hdisk2,fscsi0,21000024ff3854e8,1000000000000,1,Enabled
hdisk2,fscsi2,21000024ff35b622,1000000000000,2, Enabled
hdisk2,fscsi2,21000024ff35b690,1000000000000,3, Enabled
In the above example , hdisk2 is a MPIO node which detects 4 logical paths via 2 HBA ports.
The violin PCM sets highlighted attributes on VIOLIN MPIO devices as shown below
# lsattr -El hdisk2 ( partial listing)
PCM
PCM/friend/vmem_pcm
Path Control Module
True
PR_key_value
none
Persistante reservation value
True
algorithm
round_robin
Algorithm
True
q_type
simple
Queuing TYPE
False
queue_depth
255
Queue DEPTH
True
reassign_to
120
REASSIGN unit time out value
True
reserve_policy
no_reserve
Reserve Policy
True
rw_timeout
30
READ/WRITE time out value
scsi_id
0x11300
SCSI ID
True
start_timeout
180
START unit time out value
True
timeout_policy
retry_path
Timeout Policy
True
unique_id
2A1088DBB1141F91FF2009SAN ARRAY06VIOLINfcp Unique device identifier
True
False
ww_name
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0x21000024ff3854e8
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FC World Wide Name
False
Connecting Violin Memory Arrays to IBM AIX and PowerVM
7 Discovering LUN and Enclosure Serial no on AIX
The vMOS code level , LUN serial no and Array/Enclosure Serial no can be determined by the following
command as shown below:
# lscfg -vpl hdisk29
hdisk29
U78AB.001.WZSHR28-P1-C2-T1-W21000024FF35B691-LB000000000000
MPIO VIOLIN Fibre Channel disk
Manufacturer................VIOLIN
Machine Type and Model......SAN ARRAY
EC Level....................551
<= vMOS level
Device Specific.(Z0)........000006323F081002
Device Specific.(Z1)........41202F00111
<= Container Serial No
Device Specific.(Z2)........tme-p710-02_grid_2
Device Specific.(Z3)........88DBB1141F1BB78E
<= LUN Serial No
The following screenshot highlights the Container Sr no and LUN Sr no for a LUN:
At this point, the LUNS are ready to be deployed into control of a Volume Manager. It is recommended to
reboot the LPAR at this stage as the NACA bit setting, HBA parameters changed will be effective only after a
LPAR reboot. If setting these parameters inside the VIO Partitions, it is recommended that the VIO partitions be
rebooted as well before rebooting the guest LPARs.
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8 Deploying Multipathing with DMP
If you need more information about SYMANTEC Storage Foundatio, visit: http://www.symantec.com/storagefoundation
8.1
Obtaining DMP Binaries
Storage Foundation can be downloaded from Symantec web site:
https://www4.symantec.com/Vrt/offer?a_id=24928
The Array Support Library support package for Violin is available from Symantec as well:
https://sort.symantec.com/asl
Storage Foundation documentation from Symantec can be found here:
https://sort.symantec.com/documents
This document will refer to DMP documentation whenever required.
8.2
Prerequisites for DMP support on AIX for Violin Storage
To determine AIX prerequisites for Storage Foundation, please run the installer with the pre-check option after
downloading DMP media from the correct directory.
# installer –precheck.
This option will determine the correct TL level and APAR for AIX, disk space requirements for Storage
Foundation etc. Please upgrade your server patch level appropriately and increase disk-space if determined by
the installer before installing DMP.
8.3
AIX Rootability with VERITAS DMP
VERITAS Storage Foundation supports the root/boot disk being under DMP multi-pathing control i.e. server
booting from a SAN LUN rather than a local boot disk. Rootability is an option, meaning that it is not mandatory
for boot disk to be managed by DMP. Rootability is not covered in detail in this document. Please refer to DMP
documentation if you need more details.
8.4
Installing DMP on AIX
This section provides a short description of the procedures for installing Storage Foundation on an AIX Server
where Violin Storage will be deployed. For detailed procedures, read Chapter 6 the Veritas Storage
Foundation Install guide available on http://sort.symantec.com.
8.4.1
1.
Running the Installer
Run the installer and select Dynamic Multi-Pathing as your choice to install.
# cd …./../.dvd1-aix ( the folder for DVD1)
# ./installer ( Please run this as a “root” user )
2.
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Select Option I - install a product.
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3.
Please select Option 3 ,4, or 5 depending on which stack you want to install and follow the steps as
instructed by the installer.
4.
Reboot the host if required ( prompted by the installer ).
5.
Run an installer post-check.
# ./installer –postcheck `uname-n`
8.4.2
Array Support Library for DMP
1.
Install Array Support Library (ASL) package for Violin Storage Arrays.
2.
Download the latest AIX package from https://sort.symantec.com/asl/latest.
3.
Install the ASL package. as a “root” user.
# installp -acgX -d VRTSaslapm.bff VRTSaslapm
8.4.3
DMP Patch for bos-boot Issue
There is a known issue with AIX with DMP which has been fixed in a point patch. This patch is mandatory
before deploying DMP as it can cause the system to hang during reboot intermittently if not deployed. We still
recommend that this patch be installed as it has multiple stability fixes.
This patch is available on this link and should be applied before proceeding further. The patch install
instructions are in the link.
8.4.4
Discovering LUNs Under DMP Control
Run a DMP device scan.
# vxdisk scandisks
Verify that DMP recognizes the 1st Violin Enclosure as vmem0.
# vxdmpadm listenclosure all
ENCLR_NAME
ENCLR_TYPE ENCLR_SNO
STATUS
ARRAY_TYPE LUN_COUNT
============================================================================
vmem0
VMEM
41202F00111
CONNECTED
A/A
16
disk
Disk
DISKS
CONNECTED
Disk
2
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Connecting Violin Memory Arrays to IBM AIX and PowerVM
If the Array is not recognized as a VMEM enclosure this means that the Array Support library for Violin Storage
is not installed on the server. This can be verified by running the below command. If this command returns null,
then please check if ASL update package is installed for Violin Arrays and contact Symantec Support if
required.
# vxddladm listsupport | grep -i violin
libvxviolin.so
VIOLIN
SAN ARRAY
One can verify multi-pathing at a DMP level by picking a LUN as discovered by DMP and listing the sub-paths
of a DMP node.
bash-4.2# vxdisk list ( partial listing)
DEVICE
TYPE
disk_0
auto:LVM
disk_1
auto:LVM
vmem0_a1d78869
auto
vmem0_b38211bb
auto
vmem0_dc014194
auto
vmem0_d564b754 auto
-
DISK
-
GROUP
-
STATUS
LVM (internal disk LVM Control)
LVM (internal disk LVM Control)
online-invalid ( new LUN)
online-invalid
online-invalid
LVM
We pick the LUN vmem0_a1d78869 and seek its DMP subpaths.
# vxdmpadm getsubpaths dmpnodename=vmem0_a1d78869
NAME STATE[A] PATH-TYPE[M] CTLR-NAME ENCLR-TYPE ENCLR-NAME ATTRS
======================================================================
hdisk136 ENABLED fscsi0 VMEM
vmem0
hdisk229 ENABLED fscsi2 VMEM
vmem0
hdisk322 ENABLED fscsi2 VMEM
vmem0
hdisk415 ENABLED fscsi0 VMEM
vmem0
-
8.4.5
Correlating LUNS in DMP Command-line vs. Violin Array Management GUI
The steps listed below provide an easy way to correlate LUNS from DMP Command-line v/s Array
Management GUI:
In the Violin GUI, the suffix of a LUN Sr no can be
correlated with the Array Volume ID(AVID) as
discovered by DMP
The suffix of the Sr. no of Exported LUNs will show as
the suffix of a Disk access (DA) name in DMP
Command-line.
e.g. #vxdisk list | grep -i < suffix of sr no >
21
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Connecting Violin Memory Arrays to IBM AIX and PowerVM
8.4.6
Setting Queue Depth for AIX LUNs Discovered
At this time, Violin does not ship ODM predefines for the Violin Array for DMP. As a result, LUN queue depth
needs to be set for each of the LUNs discovered by Violin Array. Violin provides a script for this purpose.
Please copy and paste this into a shell script and execute it.
echo " checking for a Violin Enclosure managed by DMP"
ENCL=`vxdmpadm listenclosure all | grep -i vmem | awk '{print $2}'`
if test "$ENCL" = "VMEM"
then
echo ""
echo "Optimizing queue depth settings for discovered Violin LUNs"
echo ""
for disk in `vxdisk path | grep -i vmem | awk '{print $1}' 2>/dev/null`
do
chdev -l $disk
\
-a clr_q=no
\
-a q_err=no
\
-a q_type=simple \
-a queue_depth=255 -P
echo "set queue depth to 255 for" $disk
done
else
echo "VIOLIN DMP enclosure is not detected please install the Array Support
for Violin Arays"
fi
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About Violin Memory
Violin Memory is pioneering a new class of high-performance flash-based storage systems that are designed to
bring storage performance in-line with high-speed applications, servers and networks. Violin Flash Memory
Arrays are specifically designed at each level of the system architecture starting with memory and optimized
through the array to leverage the inherent capabilities of flash memory and meet the sustained highperformance requirements of business critical applications, virtualized environments and Big Data solutions in
enterprise data centers. Specifically designed for sustained performance with high reliability, Violin’s Flash
Memory Arrays can scale to petabytes and millions of IOPS with low, predictable latency. Founded in 2005,
Violin Memory is headquartered in Mountain View, California. For more information about Violin Memory
products, visit www.vmem.com.