Memory Module Specifications
KVR16LE11/8I
8GB 2Rx8 1G x 72-Bit PC3L-12800
CL11 240-Pin ECC DIMM
DESCRIPTION
SPECIFICATIONS
This document describes ValueRAM's 1G x 72-bit (8GB)
CL(IDD)
11 cycles
DDR3L-1600 CL11 SDRAM (Synchronous DRAM), 2Rx8, ECC,
Row Cycle Time (tRCmin)
48.125ns (min.)
Refresh to Active/Refresh
Command Time (tRFCmin)
260ns (min.)
based on eighteen 512M x 8-bit FBGA components. The SPD is
programmed to JEDEC standard latency DDR3-1600 timing of
Row Active Time (tRASmin)
35ns (min.)
11-11-11 at 1.35V or 1.5V. This 240-pin DIMM uses gold
Maximum Operating Power
(1.35V) = 1.822 W*
low voltage, Intel ® Compatibility Tested, memory module,
contact fingers. The electrical and mechanical specifications
are as follows:
(1.50V) = 2.025 W*
UL Rating
94 V - 0
Operating Temperature
0o C to 85o C
FEATURES
Storage Temperature
-55o C to +100o C
•
JEDEC standard 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~
1.575V) Power Supply
*Power will vary depending on the SDRAM.
•
VDDQ = 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~ 1.575V)
•
800MHz fCK for 1600Mb/sec/pin
•
8 independent internal bank
•
Programmable CAS Latency: 11, 10, 9, 8, 7, 6
•
Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
•
8-bit pre-fetch
•
Burst Length: 8 (Interleave without any limit, sequential with
starting address “000” only), 4 with tCCD = 4 which does not
allow seamless read or write [either on the fly using A12 or
MRS]
•
Bi-directional Differential Data Strobe
•
Thermal Sensor Grade B
•
Internal(self) calibration : Internal self calibration through ZQ
pin (RZQ : 240 ohm ± 1%)
•
On Die Termination using ODT pin
•
Average Refresh Period 7.8us at lower than TCASE 85°C,
3.9us at 85°C < TCASE < 95°C
•
Asynchronous Reset
•
PCB: Height 1.18” (30mm), double sided component
Continued >>
Document No. VALUERAM1363-001.A00
10/04/13
Page 1
133.35
Units: millimeters
30.00
18.80
15.80
11.00
8.00
54.70
0.00
0.00
Document No. VALUERAM1363-001.A00
Page 2
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