IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 24, NO. 2, MAY 2001 163 Nondestructive Methodology for Standoff Height Measurement of Flip Chip on Flex (FCOF) by SAM C. W. Tang, Y. C. Chan, K. C. Hung, and D. P. Webb Abstract—Flip chip technology is the emerging interconnect technology for the next generation of high performance electronics. One of the important criteria for reliability is the width of the gap between the die and the substrate, i.e., the standoff height. A nondestructive technique using scanning acoustic microscopy (SAM) for the standoff height measurement of flip chip assemblies is demonstrated. The method, by means of the implementation of a pulse separation technique, time difference of the representative signals of the die bottom and water interface and water and substrate surface interface from the A-scan image can be found. Then, the corresponding standoff height can be calculated. When compared to the traditional destructive measurement method (SEM analysis on sectioned sample), this nondestructive technique yields reliable results. Index Terms—Filler particles, flip chip, nondestructive, scanning acoustic microscope, standoff height, underfill. I. INTRODUCTION T O MEET the demands of higher density, greater performance, and lighter weight in the electronics industry, flip chip technology is the emerging interconnect technology for the next generation of high performance electronics , . The most important advance in improving the flip chip reliability has been by filling the gap between chip and substrate with an appropriate underfill encapsulant. The underfill provides dramatic fatigue life enhancement by dissipating thermally induced stress between the die and the substrate. However, one of the important criteria for the reliability issue is the size of the gap between the die and the substrate, i.e., standoff height. Control of the standoff height is necessary for formation of well shaped solder joint and of a constant fillet shape for a fixed volume of underfill. Additionally, if the standoff height is too small, the filler particles in the underfill may become trapped and the not be evenly distributed, affecting the thermal performance. Moreover, if the gap is too small, some of the flux residue may remain even after cleaning, potentially causing underfill delamination. Any defects such as void or delamination in the underfill layer may result in solder fatigue failure and ruin the whole flip chip package. Traditionally, the standoff height was measured by the method of contact measurement or SEM measurement of sectioned samples. However, these methods have the respec- Manuscript received March 29, 2000; revised March 12, 2001. This work was supported by the City University of Hong Kong under Strategic Grants (Project 7000955) and the City University of Hong Kong. The authors are with the Department of Electronic Engineering, City University of Hong Kong, Kowloon, Hong Kong (e-mail: email@example.com). Publisher Item Identifier S 1521-3323(01)04312-X. Fig. 1. Six samples of flip chip on flex substrate (FCOF) assembly. tive disadvantages of lack of accuracy and being more time consuming. Ultrasonic techniques  have been used successfully for thickness measurement and material characterization in several applications primarily because they are nondestructive in nature and can yield reliable results for simple geometries. Acoustic microscopy techniques, in particular, are attractive for IC packaging applications because they afford the potential to perform these measurements over a small, localized area . Scanning acoustic microscope (SAM) is used extensively throughout the microelectronics industry to inspect flip chip packages for delamination or cracking . In this paper, we will discuss how to use this technology to measure the standoff height of a flip chip assembly. Moreover, we verify the results by the SEM measurement of the sectioned and polished samples. Our research results propose a more efficient method of nondestructive standoff height measurement. II. EXPERIMENT Flip chip on flex assemblies, as shown in Fig. 1, were used. Three types of samples were studied: assemblies with underfill (filler particles inside) after the curing process, assemblies without underfill and assemblies with underfill (without filler particles) after the curing process. The schematic of the flip chip packages investigated in this study are shown in Figs. 2 and 3. Scanning acoustic microscope (SAM) was used for data acquisition with a transducer of 230 MHz. Five positions of each 1521–3323/01$10.00 © 2001 IEEE 164 IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 24, NO. 2, MAY 2001 Fig. 2. Schematic of flip chip assembly without underfill. Fig. 5. (a) Schematic of ultrasonic wave hitting the package. (b) Corresponding A-scan image of package in (a). Fig. 3. Schematic of flip chip assembly with underfill. Fig. 4. Five measurement points on each sample. sample were scanned, as shown in Fig. 4. The sample under study was placed in the water tank of the SAM. The transducer is focused at the die bottom and water (or underfill interface). The transducer was moved to a location where the thickness of the standoff height is to be determined. Moving the transducer over any particular location (position 1 to position 5) and repeating the data acquisition can collect data from multiple locations of interest. Ultrasonic thickness is made possible by the reflection of ultrasound at interfaces between dissimilar materials. When ultrasound waves propagating in a material encounter an interface with a dissimilar material (with a different acoustic impedance), a portion of the ultrasonic energy is reflected back. Thus, when ultrasound in the acoustic microscope impinges on an assembly shown in Fig. 5(a), a “typical signal” appears on the oscilloscope. The pulse separation technique describe above is relatively straightforward . This is because the reflections from each interface can be clearly separated in the time domain (A-Scan). The reflective inspection mode is time based. A reflection from the top of the package returns earlier than a reflection from a layer within the package. The time base is used to separate layers from the package. For example, as shown in Fig. 5(b), the reflection at the water and package interface is followed by the package and die surface interface, and then by the die and die bottom interface. The thickness of either layer can be determined by measuring the time lag between the two reflections if the velocity of the ultrasound wave in either region is known. After the standoff height measurement and data acquisition using the SAM, samples were sectioned and polished. In order to validate the results obtained by the acoustic microscopy, Scanning Electron Microscope (SEM) was employed to obtain correlated destructive data. The standoff height of the flip chip assemblies was measured directly from the magnified images (320 ) of the sectioned samples. III. RESULTS Flip chip on flex assemblies samples had three interfaces in this study. For samples with underfill (either with or without filler particles)/without underfill, the following interfaces are present: 1) water and die surface interface; 2) die bottom and underfill interface (for samples with underfill) or die bottom and water interface (for samples without underfill; 3) underfill and flex substrate interface. The representative A-scan signals of these interface and the corresponding C-scan images are shown in Figs. 6 and 7 respectively. Measurements on the samples (6 nos.) without underfill on the five positions of each chip were performed. By means of the measurement of the time lag between the representative signals, the time for the ultrasonic wave to travel to-and-from the chip thickness and standoff height can be determined (Fig. 8). The standoff height can be calculated by SOH TANG et al.: NONDESTRUCTIVE METHODOLOGY FOR STANDOFF HEIGHT MEASUREMENT OF FLIP CHIP ON FLEX (FCOF) 165 Fig. 6. A-scan waveform shown in the oscilloscope: 1) water and die surface interface, 2) die bottom and water interface, and 3) water and substrate surface interface. Fig. 8. Measurement of time lapse for standoff height measurement. TABLE I STANDOFF HEIGHT OF SAMPLE 1 AT THE FIVE MEASUREMENT POSITIONS (a) (b) Fig. 7. (a) C-scan image of the die bottom. (b) C-scan image of the substrate surface. where SOH standoff height; speed of ultrasonic wave in water (samples without underfill) or underfill (samples with underfill); 1370 m/s (for water); time lag between two interfaces in an A-scan image. The chip thickness of the samples is also calculated for the sake of comparison. The calculated standoff height of the samples without underfill was shown in Table I and Fig. 9. As shown in Fig. 9, we see that the height at the five positions of the sample is not the same, suggesting that there is an intrinsic error (measurement error) or that the bottom of the chip is not perfectly planar. Whether the variation is due to an intrinsic error or imperfect plane, another experiment, the scanning electron microscopy (SEM), was performed to verify the cause of this difference. After the completion of the acoustic microscopy, two samples were sectioned and polished. Direct standoff height measurement was performed using the SEM on the magnified images, as shown in Figs. 10 and 11. The results of standoff height measurement by scanning acoustic microscope (SAM) and scanning electron microscope (SEM) are compared in order to check the validity of the data obtained by SAM (A-scan). The comparison of standoff height measurement is shown in Table II and plotted in Fig. 12. As shown in Table II, we find that the maximum deviation between standoff height measured by SAM and SEM for sample 1 is only 0.5 m, which is only a 1.36% deviation. Moreover, from Fig. 10, we see that the trend of the standoff heights of each sample measured by SEM is same as the trend by 166 IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 24, NO. 2, MAY 2001 Fig. 9. Standoff height of the six samples. SAM. Since the data and trend of the two experiments are comparable, it suggests that the deviation of standoff height within each sample is due to the imperfect plane of the sample, and the intrinsic error is very small. After our investigation on samples without underfill, we have performed the same measurement on the samples with underfill (with and without filler particles). We find that three issues arise during data acquisition by the scanning acoustic microscopy when samples with underfill were scanned. First, due to the presence of underfill, it is difficult to identify the representative signal of the substrate for standoff height calculation. Second, a reference speed of ultrasonic wave travelling in the underfill material must be known before standoff height measurement. Third, due to the irregular density of the filler particles and the density of the underfill material, and hence the speed of the ultrasonic wave varies in different locations, i.e., the reference speed of the ultrasonic wave also varies, so calculated standoff height also varies. Therefore, if samples with underfill (without filler particles) are under investigation, a control experiment must be run to determine the reference speed of the underfill. [Applying underfill to flip chip assembly with known standoff height, then by using the method described (Standoff height measurement by SAM), reference speed of the underfill can be calculated.] However, for underfill with filler particles, due to the irregular density of the filler particles, it is quite difficult to determine an accurate speed for standoff height calculation. Fig. 10. 2 SEM image—magnification of sectioned sample (20 ). IV. CONCLUSION A nondestructive technique using the SAM is demonstrated. The method, by means of the implementation of the pulse separation technique, time difference of the representative signals 2 Fig. 11. SEM image—magnification of sectioned sample (320 ). TANG et al.: NONDESTRUCTIVE METHODOLOGY FOR STANDOFF HEIGHT MEASUREMENT OF FLIP CHIP ON FLEX (FCOF) Fig. 12. 167 Comparison of standoff height measurement by SAM and SEM. TABLE II COMPARISON OF STANDOFF HEIGHT MEASUREMENT BY SAM AND SEM of the die bottom and water interface and water and substrate surface interface from the A-scan image can be found. Then, the corresponding standoff height can be calculated. When comparing the results obtained by SAM with the traditional destructive measurement method, for an average standoff height of 37.1 m, the maximum deviation between the two methods is only 0.5 m, which is a 1.36% deviation. Moreover, the trends of standoff height of each sample measured by SAM and SEM compromise with each other, which suggests that the method under our study yields reliable results. Our research results may contribute to the industry a more efficient method of nondestructive standoff height measurement. ACKNOWLEDGMENT The authors would like to thank Dr. H. Wang and H. Leung, SAE Magnetics (H. K.), Ltd., for providing the samples and their valuable discussion. REFERENCES  “Flip chip technology and markets worldwide,” TechSearch International, Inc., Ind. Rep., Mar. 1997.  E. J. Jan Vardaman and T. Goodman, “Flip chip market trends and infrastructure limitation,” in Proc. 1997 IEMT/IMC, 1997, p. 37.  K. F. Becker, F. Ansorge, and E. Zakel, “Acoustic microscopy investigation on BGA and BGA packages,” in Proc. IAMIS 97, Anaheim, CA.  S. Canumalla, G. A. Gordon, and R. N. Pangborn, “In situ measurement of Young’s modulus of an embedded inclusion by acoustic microscopy,” ASME Trans. J. Eng. Mater. Technol., vol. 119, no. 2, pp. 143–147, 1997.  J. Sigmund and M. Kearney, “TAMI analysis of flip chip packages,” Adv. Packag., July/August 1998.  S. Canmalla and L. W. Kessler, “Toward a nondestructive procedure for characterization of molding compounds,” in Proc. IEEE 35th IRPS, Denver, CO, Apr. 1997, pp. 149–155. C. W. Tang received the B.Sc. degree in mechanical engineering (with first class honors) and the M.Sc. degree (with distinction) from the University of Hong Kong, and is currently pursuing the M.Phil. degree in advanced packaging of flip chip assemblies at the City University of Hong Kong. His research interests are in advanced electronics manufacturing technology and reliability issues of no-flow underfill and anisotropic conductive film (ACF) of flip chip assemblies. Y. C. Chan received the B.Sc. degree in electrical engineering, the M.Sc. degree in materials science, and the Ph.D. degree in electrical engineering, all from the Imperial College of Science and Technology, University of London, London, U.K., in 1977, 1978, and 1983, respectively. He joined the Advanced Technology Department, Fairchild Semiconductor, Mountain View, CA, as a Senior Engineer, and worked on integrated circuits technology. In 1985, he was appointed to a Lectureship in electronics at the Chinese University of Hong Kong. Between 1987 and 1991, he worked in various senior operations and engineering management functions in electronics manufacturing (including SAE Magnetics (HK) Ltd. and Seagate Technology). He set up the Failure Analysis and Reliability Engineering Laboratory for SMT PCB in Seagate Technology (Singapore). He joined the City Polytechnic of Hong Kong (now City University of Hong Kong) as a Senior Lecturer in electronic engineering in 1991. He is currently Professor in the Department of Electronic Engineering and Director of EPA Centre. He has authored or co-authored over 100 technical publications in refereed journals and conference proceedings. His current technical interests include advanced electronics packaging and assemblies, failure analysis, and reliability engineering. 168 K. C. Hung received the B.Sc. degree in applied physics from the City Polytechnic of Hong Kong in 1993 and the Ph.D. degree in physics and materials science from the City University of Hong Kong in 1998. He currently works in the Department of Electronic Engineering, City University of Hong Kong, as a Research Fellow. He is in charge of several industrial collaborative research projects focusing on conductive adhesives and lead-free solder materials. He has authored or co-authored over 40 technical publications in refereed journals. His current research interests include advanced electronics packaging technology, lead-free soldering, reliability engineering, failure analysis, and nondestructive testing. IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 24, NO. 2, MAY 2001 D. P. Webb received the B.Sc. degree in mathematical physics (with honors) from the University of Manchester Institute of Science and Technology (UMIST), Manchester, U.K., in 1988, the M.Sc. degree in amorphous and microcrystalline electronic materials from the University of Dundee, U.K., in 1990, and the Ph.D. degree from the University of Abertay Dundee in 1994. He took up a position in the Department of Electronic Engineering at City University of Hong Kong in 1995 and is currently a Research Fellow. Projects at City University have included improvement of the wear properties of organic photoreceptor layers in xerography, and evaluation of a new fabrication technique for amorphous silicon. He is currently Principal Investigator on a City University Strategic Research Grant to study charge transport in organic electroluminescent device materials.