DATA SHEET
MOS INTEGRATED CIRCUIT
µPD76F0018
V850E/VANStormTM
32-/16-BIT SINGLE-CHIP MICROCONTROLLER
WITH CAN AND VAN INTERFACES
DESCRIPTION
The V850E/VANStorm single chip microcontroller, is a member of NEC's V850 32-bit RISC family, which match
the performance gains attainable with RISC-based controllers to the needs of embedded control applications. The
V850 CPU offers easy pipeline handling and programming, resulting in compact code size comparable to 16-bit
CISC CPUs.
The V850E/VANStorm offers an excellent combination of general purpose peripheral functions, like serial communication interfaces (UART, clocked SI), timers and measurement inputs (A/D converter), with dedicated CAN and
VAN network support. To support more than one network, two VAN interfaces and one CAN interface are implemented on chip. The device offers power-saving modes to manage the power consumption effectively under varying conditions. Thus equipped, the V850E/VANStorm is ideally suited for automotive applications.
Functions in detail are described in the following user’s manuals. Be sure to read these manuals when
you design your systems.
V850E/VANStorm User’s Manual - Hardware
V850E FamilyTM User’s Manual - Architecture
: U14879EE1V0UM00
: U14559EJ1
FEATURES
•
•
•
•
•
•
•
32-bit RISC CPU with Harvard Architecture
Full-VAN Interface: 2 channels
Full-CAN Interface: 1 channel
Serial Interfaces: 4 channels
- 3-wire mode: 2 channels
- UART mode: 2 channels
Timers: 7 channels
- 16/32-bit multi purpose timer/event counter:
3 channels
- 16-bit OS timer: 2 channel
- Watch timer: 1 channel
- Watchdog timer: 1 channel
10-bit resolution A/D Converter: 12 channels
I/O lines: 89
•
•
•
•
•
•
•
•
•
•
External Bus Interface (16-bit data / 24-bit address
bus)
Power supply voltage range: 4.5 V ≤ VDD5 ≤ 5.5 V
Frequency range: up to 20 MHz
Crystal frequency range: 4 MHz ≤ fCRYSTAL ≤ 5 MHz
Built-in voltage monitor with low voltage detection
(selectable threshold and hysteresis)
Built-in low power saving mode
Built-in clock oscillator circuit with internal PLL
Vectored interrupts: 49
Temperature range: -40 °C to +85 °C
Package: 144 QFP, 0.5 mm pin-pitch (20 x 20 mm)
ORDERING INFORMATION
Device
Part Number
Package
ROM
RAM
Oper. Freq.
V850E/VANStorm
µPD76F0018
QFP144
20 x 20 mm
256 K Flash
8K
20 MHz
The information contained in this document is released in advance of the production cycle for the device.
The parameters for the device may change before final production, or NEC Corporation may, at its own
discretion, withdraw the device prior to production.
 NEC Corporation 2002
Document No. U14832EE2V1DS00
Data Published: January 2002
µPD76F0018
INTERNAL BLOCK DIAGRAM
power supply
INT0
INT1
INT2
CPU Core
PC
RPU
16-/32-bit
16-bit
Timer
Barrel
Shifter
Flash/
ROM
System
Registers
FullCAN 1
RX0VAN0
RX1VAN0
RX2VAN0
TXVAN0
FullVAN 0
RX0VAN1
RX1VAN1
RX2VAN1
TXVAN1
FullVAN 1
TXD0
RXD0
UART0
RAM
General
Registers
Watch /
Watchdog
Timer
BRG
TXD1
RXD1
UART1
A
L
U
Ports
10-bit A/D
12 channels
BRG
SO0
SI0
SCK0
SO1
SI1
SCK1
2
LWR, UWR, RD
WAIT
CS2 - CS4
Voltage monitor
with low Voltage
Detection
Oscillator an
Clock Generator
with PLL
System Control
CSI0
BRG0
CSI1
D0 - D15
MEMC
Internal Peripheral Bus
b
Analog
inputs
CTXD1
CRXD1
A0 - A23
Hardware
Multiplier
AVREF
AVSS
AVDD
INTPE00-INTPE52
TIE0-TIE2
TCLRE0-TCLRE2
TOE10-TOE42
INTC
BRG1
Data Sheet U14832EE2V1DS00
Voltage
threshold
supply
CLKOUT
X1
X2
MODE
RESET
µPD76F0018
PIN IDENTIFICATION
A0 - A23
Address Bus
RX0VAN0 RX0VAN1
VAN Receive Data Inputs
ANI0 ANI11
Analogue Inputs
RX1VAN0 RX1VAN1
VAN Receive Data Inputs
AVDD
Power Supply +5 V
RX2VAN0 RX2VAN1
VAN Receive Data Inputs
AVREF
Analogue Reference Voltage
RXD0 RXD1
Receive Data Inputs
AVSS
Power Supply Ground
RESET
System Reset Input
CCLK
External CAN Clock Input
RD
Read Data Control Signal
CLOCKIN
External System Clock Input
SCK0 SCK1
Serial Clock
CLKSEL
Clock Selection Configuration Input
SI0 - SI1
Serial Input
CLKOUT
Clock Output
SO0 - SO1
Serial output
CVDD
Voltage Regulator Capacitor Connection
TCLRE0 TCLRE2
External Function Control Inputs
CVSS
Voltage Regulator Capacitor Connection
TIE0 - TIE2
External Count Clock Inputs
CRXD1
CAN Receive Data Inputs
TOE10 TOE42
Function Outputs (PWM)
CTXD1
CAN Transmit Data Outputs
TXD0 TXD1
Transmit Data Outputs
CS2 - CS4
Chip Select Outputs for accessing external devices
TXVAN0 TXVAN1
VAN Transmit Data Outputs
D0 - D15
Data Bus
VCMPOUT
Hysteresis Feedback Output
IC
Always connect to VSS5x
VCMPIN
Voltage Surveillance Sense Input
INT0 - INT2
External Interrupt Inputs
VDD30 VDD32
Voltage Regulator Capacitor Connection
INTPE00INTPE52
Shared External Interrupt Inputs
VDD50 VDD54
Power Supply +5 V
MODE0 MODE2
Global Operation Mode Selection Inputs
VPP0 - VPP1
Programming Voltage Inputs
NMI
Non Maskable Interrupt Input
VSS50 VSS55
Power Supply Ground
P1x - P6x
Multi-Purpose I/O Ports, shared with
other functions
VSS30 VSS32
Voltage Regulator Capacitor Connection and Ground
PALx, PAHx
Multi-Purpose I/O Ports, shared with
other functions
WAIT
Waitstate Input for external devices
PCMx
Multi-Purpose I/O Ports, shared with
other functions
LWR - UWR
Write Data Control Signal
PCSx
Multi-Purpose I/O Ports, shared with
other functions
X1
Oscillator quartz connection
PCTx
Multi-Purpose I/O Ports, shared with
other functions
X2
Oscillator quartz connection
PDLx
Multi-Purpose I/O Ports, shared with
other functions
Data Sheet U14832EE2V1DS00
3
µPD76F0018
PIN CONFIGURATION
VCMPOUT/NMI
P27/TXD0
P26/RXD0
TXVAN0
RX0VAN0
RX2VAN0
114
113
112
111
110
109
1
2
3
4
108
107
106
105
RX1VAN0
P13
P12
P11/CTXD1
5
6
7
8
9
10
11
12
13
104
103
102
101
100
99
98
97
96
P52//TOE22/INTPE22
P53/TOE32/INTPE32
P54/TOE42/INTPE42
P55/TCLRE2/INTPE52
VDD50
VSS50
14
15
16
17
18
19
20
95
94
93
92
91
90
89
P10/CRXD1
P25/SCK1
P24/SO1
P23/SI1
VSS54
VDD54
VPP1
P22/SCK0
P21/SO0
P20/SI0
PDL15/D15
PDL14/D14
PDL13/D13
PDL12/D12
PDL11/D11
PDL10/D10
PAL0/A0
PAL1/A1
PAL2/A2
PAL3/A3
PAL4/A4
PAL5/A5
PAL6/A6
PAL7/A7
PAL8/A8
PAL9/A9
21
22
23
24
25
26
27
28
29
30
PAL10/A10
PAL11/A11
PAL12/A12
PAL13/A13
31
32
33
34
35
36
88
87
86
85
84
71
72
TXVAN1
P14
P15
P16
PCS2/CS2
PCS3/CS3
PCS4/CS4
PCT0/LWR
PCT1/UWR
PCT2
PCT3
PCT4/RD
PCM0/WAIT
PCM1/CLKOUT
P60/CCLK
P61/INT0
VSS52
VDD52
P62/INT1
P63/INT2
P64/RXD1
PAL14/A14
PAL15/A15
PAH0/A16
PAH1/A17
PAH2/A18
PAH3/A19
PAH4/A20
PAH5/A21
PAH6/A22
PAH7/A23
VDD51
VSS51
RX1VAN1
RX2VAN1
RX0VAN1
67
68
69
70
83
82
81
80
79
78
77
76
75
74
73
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
VDD30
VSS30
V850E "VANStorm"
58
59
60
61
62
63
64
65
66
P42/TOE21/INTPE21
P43/TOE31/INTPE31
P44/TOE41/INTPE41
P45/TCLRE1/INTPE51
P50/TIE2/INTPE02
P51/TOE12/INTPE12
57
P32/TOE20/INTPE20
P33/TOE30/INTPE30
P34//TOE40/INTPE40
P35/TCLRE0/INTPE50
P40/TIE1/INTPE01
P41/TOE11/INTPE11
4
120
119
118
117
116
115
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
144
P30/TIE0/INTPE00
P31/TOE10/INTPE10
ANI10
ANI11
MODE2
VDD32
VSS32
X2
X1
CVSS
CVDD
MODE1
MODE0
CLOCKIN
IC
CLKSEL
RESET
VCMPIN
144-Pin Plastic QFP (Top View)
VSS55
AVDD
AVSS
AVREF
ANI0
ANI1
ANI2
ANI3
ANI4
ANI5
ANI6
ANI7
ANI8
ANI9
•
Data Sheet U14832EE2V1DS00
PDL9/D9
PDL8/D8
VSS53
VDD53
VPP0
PDL7/D7
PDL6/D6
PDL5/D5
PDL4/D4
PDL3/D3
PDL2/D2
PDL1/D1
PDL0/D0
VSS31
VDD31
P65/TXD1
µPD76F0018
Table of Contents
INTERNAL BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
PIN IDENTIFICATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
PIN CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.
PIN FUNCTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.1
1.2
2.
Port Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Other Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PROGRAMMING FLASH MEMORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.
ELECTRICAL SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
General Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3.1 Oscillator Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3.2 PLL Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3.3 I/O Capacitances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Oscillator Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.6.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.6.2 Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.6.3 External Memory Access Read Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.6.4 External Memory Access Write Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.6.5 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.6.6 Interrupt Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Peripheral Function Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
3.7.1 Timer E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
3.7.2 CSI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.7.3 UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.7.4 FVAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.7.5 FCAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.7.6 A/D Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.7.7 Voltage Comparator Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
FLASH EPROM Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
4.
PACKAGE DRAWING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.
RECOMMENDED SOLDERING CONDITIONS. . . . . . . . . . . . . . . . . . . . . . . . 35
6.
REVISION HISTORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Data Sheet U14832EE2V1DS00
5
µPD76F0018
List of Figures
Figure 1-1:
Figure 3-1:
Figure 3-2:
Figure 3-3:
Figure 3-4:
Figure 3-5:
Figure 3-6:
Figure 3-7:
Figure 3-8:
Figure 3-9:
Figure 3-10:
Figure 3-11:
Figure 4-1:
6
I/O Circuit..................................................................................................................... 13
Crystal or Resonator connection in OSC mode........................................................... 18
External Clock in Direct Mode ..................................................................................... 18
AC Test Input/Output Waveform, AC Test Load Condition ......................................... 21
Clock AC Characteristics............................................................................................. 21
External Memory Access Read Timing ....................................................................... 23
External Memory Access Write Timing........................................................................ 25
Reset Timing ............................................................................................................... 26
Interrupt Timing ........................................................................................................... 27
Timer E Characteristics ............................................................................................... 28
CSI Slave Mode Characteristics.................................................................................. 29
Flash EPROM Programming Timing ........................................................................... 33
Package Drawing ........................................................................................................ 34
Data Sheet U14832EE2V1DS00
µPD76F0018
List of Tables
Table 1-1:
Table 1-2:
Table 3-1:
Table 3-2:
Table 3-3:
Table 3-4:
Table 3-5:
Table 3-6:
Table 3-7:
Table 3-8:
Table 3-9:
Table 3-10:
Table 3-11:
Table 3-12:
Table 3-13:
Table 3-14:
Table 3-15:
Table 3-16:
Table 3-17:
Table 3-18:
Table 3-19:
Table 3-20:
Table 3-21:
Table 3-22:
Table 5-1:
Pin Functions: Ports ......................................................................................................... 8
Pin Functions: Functions ................................................................................................ 11
Absolute Maximum Ratings............................................................................................ 15
Operating Conditions...................................................................................................... 16
Oscillator Characteristics................................................................................................ 17
PLL Characteristics ........................................................................................................ 17
I/O Capacitances ............................................................................................................ 17
DC Characteristics.......................................................................................................... 19
Power Supply Currents................................................................................................... 20
Clock AC Characteristics................................................................................................ 21
External Memory Access Read Timing .......................................................................... 22
External Memory Access Write Timing........................................................................... 24
Reset Timing .................................................................................................................. 26
Interrupt Timing .......................................................................................................... 27
Timer E Characteristics .................................................................................................. 28
CSI Master Mode Characteristics................................................................................... 29
CSI Slave Mode Characteristics..................................................................................... 29
UART Characteristics ..................................................................................................... 30
FVAN Characteristics ..................................................................................................... 30
FCAN Characteristics ..................................................................................................... 30
A/D Converter Characteristics ........................................................................................ 31
Voltage Comparator Characteristics............................................................................... 31
Flash EPROM Programming Characteristics Basic Specification .................................. 32
Flash EPROM Serial Programming Operation Characteristics ...................................... 33
Soldering Conditions ...................................................................................................... 35
Data Sheet U14832EE2V1DS00
7
µPD76F0018
1.
PIN FUNCTIONS
1.1 Port Pins
Table 1-1:
Port
I/O
Function
Pin Functions: Ports
Driver Type
Alternate1
P10
CRXD0
P11
CTXD0
Alternate2
Alternate2
P12
P13
I/O
Port 1
7-bit input/output port
5-K
P14
P15
P16
P20
5
SI0
P21
5-K
SO0
P22
5
SCK0
P23
P24
I/O
SO1
5-K
P25
SCK1
P26
RXD0
P27
TXD0
P30
TIE00
INTPE00
P31
TIE10
TOE10
INTPE10
TIE20
TOE20
INTPE20
TIE30
TOE30
INTPE30
P34
TIE40
TOE40
INTPE40
P35
TIE50
TCLRE0
INTPE50
P40
TIE01
INTPE01
P41
TIE11
TOE11
INTPE11
TIE21
TOE21
INTPE21
TIE31
TOE31
INTPE31
P32
P33
P42
P43
I/O
I/O
Port 3
6-bit input/output port
Port 4
6-bit input/output port
5-K
5-K
P44
TIE41
TOE41
INTPE41
P45
TIE51
TCLRE1
INTPE51
P50
TIE0
INTPE02
P51
TIE12
TOE12
INTPE12
TIE22
TOE22
INTPE22
TIE32
TOE32
INTPE32
P54
TIE42
TOE42
INTPE42
P55
TIE52
TCLRE2
INTPE52
P60
CCLK
P61
INT0
P52
P53
P62
P63
8
SI1
Port 2
8-bit input/output port
I/O
I/O
Port 5
6-bit input/output port
Port 6
6-bit input/output port
5-K
5-K
INT1
INT2
P64
RXD1
P65
TXD1
Data Sheet U14832EE2V1DS00
µPD76F0018
Table 1-1:
Port
I/O
Function
Pin Functions: Ports
Driver Type
Alternate1
PAL0
A0
PAL1
A1
PAL2
A2
PAL3
A3
PAL4
A4
PAL5
A5
PAL6
PAL7
PAL8
I/O
A7
5-K
A8
A9
PAL10
A10
PAL11
A11
PAL12
A12
PAL13
A13
PAL14
A14
PAL15
A15
PAH0
A16
PAH1
A17
PAH2
A18
PAH4
I/O
Port AH
8-bit input/output port
5
A19
A20
PAH5
A21
PAH6
A22
PAH7
A23
PDL0
D0
PDL1
D1
PDL2
D2
PDL3
D3
PDL4
D4
PDL5
D5
PDL6
PDL7
PDL8
D6
I/O
Port DL
16-bit input/output
port
D7
5-K
D8
PDL9
D9
PDL10
D10
PDL11
D11
PDL12
D12
PDL13
D13
PDL14
D14
PDL15
D15
PCM0
WAIT
PCM1
Alternate2
A6
Port AL
16-bit input/output
port
PAL9
PAH3
Alternate2
I/O
Port CM
2-bit input/output port
5-K
CLKOUT
Data Sheet U14832EE2V1DS00
9
µPD76F0018
Table 1-1:
Port
I/O
Function
Pin Functions: Ports
Driver Type
PCS2
PCS3
Alternate1
CS2
I/O
Port CS
3-bit input/output port
5-K
CS3
PCS4
CS4
PCT0
WR0
PCT1
PCT2
WR1
I/O
Port CT
5-bit input/output port
5-K
PCT3
PCT4
10
RD
Data Sheet U14832EE2V1DS00
Alternate2
Alternate2
µPD76F0018
1.2 Other Pins
Table 1-2:
Pin Name
VDD50 - VDD54
VSS50 - VSS55
I/O
-
Function
Termination
Power supply 5 V
Driver
Type
-
Connection for external capacitiesNote
VDD30 - VDD32
VSS30 - VSS32
Pin Functions: Functions
-
-
Connection for external capacities,
connect to VSS5x
Connection for external capacities to stabilize
clock oscillator power supply
CVDD
CVSS
X1
input
X2
-
CLOCKIN
input
VPP0, VPP1
-
MODE1
-
Connection for external capacities to stabilize
clock oscillator power supply,
connect to VSS5x
See Chapter 3.4
on page 18
-
External system clock input
10 K to VSS5x
2
Flash memory programming voltage
10 K to VSS5x
-
input
Selects operating mode (internal rom / rom
less)
VDD5 or VSS5x
2
MODE0, MODE2
input
Have to be fixed to VSS
VSS5x
2
RESET
input
System reset input
CLKOUT
output
Internal CPU system clock output
-
5-K
CLKSEL
input
Clock generator operation mode
10 K VDD5x or
VSS5x
2
-
Power supply for A/D converter
VDD5x
-
VSS5x
-
AVDD
-
100 K to VDD5x
5-K
-
1
AVDD
AVSS
System clock oscillator connection pins.
AVREF
input
reference voltage input for A/D converter
NMI
input
non maskable interrupt input
VCMPOUT
output
voltage comparator feedback output
-
2
100 K to VDD5x
VCMPIN
input
voltage comparator compare input
ANI0 - ANI11
input
analog input to A/D converter
VSS5x
7
IC
input
internal connection (connect to VSS5x)
VSS5X
-
input
serial receive data input to CSI0-CSI1
100 K to VDD5x
5
100 K to VDD5x
5-K
100 K to VDD5x
5-K
100 K to VDD5x
5-K
SI0
SI1
SO0
SO1
output
serial transmit data output from CSI0-CSI1
SCK0
I/O
serial clock I/O from CSI0
100 K to VDD5x
5
SCK1
I/O
serial clock I/O from CSI1
100 K to VDD5x
5-K
100 K to VDD5x
5-K
100 K to VDD5x
5-K
serial transmit data output from UART0UART2
100 K to VDD5x
5-K
100 K to VDD5x
5-K
serial receive data input to FCAN0
100 K to VDD5x
5-K
RXD0
RXD1
TXD0
input
output
TXD1
CRXD1
input
serial receive data input to UART0-UART2
Data Sheet U14832EE2V1DS00
11
µPD76F0018
Table 1-2:
Pin Functions: Functions
Function
Termination
Driver
Type
100 K to VDD5x
5-K
Pin Name
I/O
CTXD1
output
RX0VAN0
input
RX1VAN0
input
RX2VAN0
input
100 K to VDD5x
RX0VAN1
input
100 K to VDD5x
RX1VAN1
input
RX2VAN1
input
TXVAN0
output
serial transmit data output from FVAN0
100 K to VDD5x
19
TXVAN1
output
serial transmit data output from FVAN1
100 K to VDD5x
19
CCLK
input
CAN clock input
100 K to VDD5x
5-K
D0 - D15
I/O
data bus of external bus
PDL0 - PDL15,
100 K to VDD5x
5-K
serial transmit data output from FCAN0
100 K to VDD5x
serial receive data input to FVAN0
serial receive data input to FVAN1
100 K to VDD5x
100 K to VDD5x
2
2
100 K to VDD5x
A0 -A7
A8 - A15
output
address bus of external bus
100 K to VDD5x
5
write strobe lower byte (bit 0 -7)
100 K to VDD5x
5-K
write strobe upper byte (bit 8 -15)
100 K to VDD5x
5-K
read strobe for external bus
100 K to VDD5x
5-K
A16 - A23
WR0
WR1
I/O
RD
WAIT
input
control signal input for external bus
100 K to VDD5x
5-K
CS2 - CS4
output
chip select output for external bus
PCS2 - PCS4
100 K to VDD5x
5-K
INT0 - INT2
input
external interrupt request
100 K to VDD5x
5-K
TIE0
input
Timer E channel 0 capture 0 input
100 K to VDD5x
5-K
TOE10 - TOE40
I/O
Timer E channel 0 capture 1 - 4 input/output
100 K to VDD5x
5-K
TCLRE0
input
Timer E channel 0 capture 5 input or timer
clear input
100 K to VDD5x
5-K
TIE1
input
Timer E channel 1 capture 0 input
100 K to VDD5x
5-K
TOE11 - TOD41
I/O
Timer E channel 1 capture 1 - 4 input/output
100 K to VDD5x
5-K
TCLRE1
input
Timer E channel 1 capture 5 input or timer
clear input
100 K to VDD5x
5-K
TIE2
input
Timer E channel 2 capture 0 input
100 K to VDD5x
5-K
TOE12 - TOE42
I/O
Timer E channel 2 capture 1 - 4 input/output
100 K to VDD5x
5-K
TCLRE2
input
Timer E channel 2 capture 5 input or timer
clear input
100 K to VDD5x
5-K
Note: All VDD3x power supply pins must be tied together externally. Resistance between VDD3x pins
must not exceed 0.1 Ω DC / 2.5 Ω @ 20 MHz.
12
Data Sheet U14832EE2V1DS00
µPD76F0018
Figure 1-1:
Type 1
I/O Circuit
Type 2
VDD
P-ch
IN
IN
N-ch
Type 5-K
Type 5
VDD
VDD
data
data
P-ch
P-ch
IN/OUT
IN/OUT
output
disable
N-ch
output
disable
N-ch
input
enable
input
enable
Type 19
Type 7
OUT
P-ch
+
IN
N-ch
&
data
N-ch
VREF
Data Sheet U14832EE2V1DS00
13
µPD76F0018
2.
PROGRAMMING FLASH MEMORY
The device µPD76F0018 supports the programming of the internal flash in two ways: Either by using
the flashMASTER programming tool or by performing self-programming using software functions and
I/O communications.
For programming details about both methods, see the User’s Manual. For timing characteristics about
the initial programming using flashMASTER and some more electrical data about the Flash Memory,
see Chapter: “FLASH EPROM Characteristics” on page 32.
14
Data Sheet U14832EE2V1DS00
µPD76F0018
3. ELECTRICAL SPECIFICATIONS
3.1 Absolute Maximum Ratings
Table 3-1:
Absolute Maximum Ratings
(TA = 25°C, VSS3x = 0 V)
Parameter
Supply voltage
Input voltage
Output current low
Output current high
Ratings
Unit
VDD5x
Symbol
-0.5 ~ +6.0
V
AVDD
-0.5 ~ +6.0
V
AVSS
-0.5 ~ +0.5
V
ASS5x
-0.5 ~ +0.5
V
(all except
VPP, X1, X2)
VI1
VI1 < VDD5x + 0.5 V
-0.5 ~ +6.0
V
VPP
VI3
VDD5x = 4.5 V - 5.5 V
-0.5 ~ 8.5
V
1 pin
IOL0
4.0
mA
All pins
IOL1
50
mA
group 1, 2Note 1
IOL2
18
mA
Note 2
group 3, 4
IOL3
36
mA
1 pin
IOH0
-4.0
mA
All pins
IOH1
-50
mA
group 1, 2Note 1
IOH2
-18
mA
Note 2
IOH3
-36
mA
-0.5 ~ +6.0
V
-40 ~ +85
°C
group 3, 4
Output voltage
Test Conditions
VO
VO < VDD5x + 0.5 V
Operating
temperature
TOPR
Operating
temperature
TPRG
during programming
0 ~ +70
°C
TSTGB
Before program
-55 ~ +150
°C
TSTGA
After program
-55 ~ +125
°C
Storage temperature
Notes: 1. Group 1 pins: P1, P2, VCMPOUT, TXVAN0
Group 2 pins: P3, P4, P5
2. Group 3 pins: PAL, PAH
Group 4 pins: PCS, PCT, PCM, P6, TXVAN1
Data Sheet U14832EE2V1DS00
15
µPD76F0018
3.2 Operating Conditions
Table 3-2:
Clock Mode
Operation Mode
Operating Conditions
Operating
Temperature (TA)
Supply Voltage
(VDD5x)
Direct
ModeNote 2
Inside Operation Clock
FrequencyNote 1
4 MHz ≤ fCPU ≤ 20 MHz
OSC Mode,
PLL onNote 3
ALL Modes
-40 ~ +85°C
4.5 V ~ 5.5 V
OSC Mode,
PLL off Note 4
16 MHz ≤ fCPU ≤ 20 MHz
4 MHz ≤ fCPU ≤ 5 MHz
Notes: 1. fCPU = CPU operating frequency, as output (if enabled) on the CLOCKOUT pin.
16
2.
See “External Clock in Direct mode” on page 18 for clock mode definition.
The inside clock frequency is half of the applied external frequency.
3.
See “Crystal or Ceramic Resonator connection in OSC mode (TA = -40 ~ +85°C)” on
page 18 for clock mode definition.
The inside clock frequency is the quartz frequency, multiplied by 4.
4.
See “Crystal or Ceramic Resonator connection in OSC mode (TA = -40 ~ +85°C)” on
page 18 for clock mode definition.
The inside clock frequency is the quartz frequency.
The PLL must be set permanently off by clearing the PLLEN flag.
Data Sheet U14832EE2V1DS00
µPD76F0018
3.3 General Characteristics
3.3.1 Oscillator Characteristics
Table 3-3:
Oscillator Characteristics
(TA= -40 ~ +85°C)
Parameter
Symbol
Test Conditions
Oscillation stabilization
time
TOST
OSC MODE
MIN.
TYP.
MAX.
10
Unit
ms
3.3.2 PLL Characteristics
Table 3-4:
PLL Characteristics
(TA= -40 ~ +85°C)
Parameter
PLL lock time
Symbol
Test Conditions
TPLL
OSC MODE
MIN.
TYP.
MAX.
Unit
1
ms
MAX.
Unit
15
pF
15
pF
15
pF
3.3.3 I/O Capacitances
Table 3-5:
I/O Capacitances
(TA = 25°C, VDD5x = VSS5x = 0 V)
Parameter
Input capacitance
Symbol
CI
Input/output capacitance
CIO
Output capacitance
CO
Test Conditions
MIN.
fC = 1 MHz
Unmeasured
pins
returned to 0 V
Data Sheet U14832EE2V1DS00
TYP.
17
µPD76F0018
3.4 Oscillator Recommendations
(a) Crystal or Ceramic Resonator connection in OSC mode (TA = -40 ~ +85°C)
Figure 3-1:
Crystal or Resonator connection in OSC mode
CLKSEL CLOCKIN
X1
X2
QU
C1
C2
VSS5x
CVSS
Remark:
CVSS
Values of capacitors depend on used resonator,
must be specified in cooperation with resonator manufacturer
(b) External Clock in Direct mode
Figure 3-2:
CLKSEL
External Clock in Direct Mode
CLOCKIN
X1
X2
VDD5X
External
clock
Open
CVSS
Remarks: 1. CLKSEL Termination Resistor value: 1 K to 10 K to VDD5
2. X1 Termination Resistor value: 1 K to 10 K to VSS5x
18
Data Sheet U14832EE2V1DS00
µPD76F0018
3.5 DC Characteristics
Table 3-6:
DC Characteristics
(TA = -40 ~ +85°C, VDD5x = 4.5 V ~ 5.5 V , VSS5x = 0 V)
Parameter
Symbol
all except:
P20,P22,X1
,X2,PAH,
RXVANpinsNote1
Test Conditions
MIN.
TYP.
MAX.
Unit
VIH1
0.8
VDD5x
VDD5x
V
VIL1
0
0.2
VDD5x
V
VIH2
0.7
VDD5x
VDD5x
V
Input voltage low
PAH,
RXVANpinsNote1
VIL2
0
0.3
VDD5x
V
Input voltage high
P20,22
VIHT
2.2
VDD5x
V
Input voltage low
P20,22
VILT
0
0.8
V
Input voltage high
Input voltage low
Input voltage high
Output voltage low
VDD5x
-1.0 V
VOH0
IOH0 = -3.0 mA
all except:
TXVAN0 - 1
VOL0
IOL0 = 3.0 mA
0.4
V
TXVAN0 - 1
VOL4
IOL4 = 3.2 mA
0.4
V
Output voltage high
Note 2
V
Input leakage current,
high
ILIH
VI = VDD5
5
µA
Input leakage current,
low
ILIL
VI = 0
-5
µA
Notes: 1. RXVAN-pins: RX0VAN0, RX1VAN0, RX2VAN0, RX0VAN1, RX1VAN1, RX2VAN1
2. Under this test condition, current is limited to 1.5mA for the following pins:
P1, P2, VCMPOUT
Data Sheet U14832EE2V1DS00
19
µPD76F0018
Table 3-7:
Power Supply Currents
(TA = -40 ~ +85°C, VDD5x = 4.5 V ~ 5.5 V , VSS5x = 0 V)
Parameter
Symbol
Test Conditions
IDD1D
TYP.
MAX.
Unit
Operating (fcpu = 20 MHz)
Direct Mode
65
130
mA
IDD1P
Operating (fcpu = 20 MHz)
OSC Mode x 4
65
130
mA
IDD1D1
Operating (fcpu = 16 MHz)
Direct Mode
53
110
mA
IDD1P1
Operating (fcpu = 16 MHz)
OSC Mode x 4
53
110
mA
IDD1P2
Operating (fcpu = 4 MHz)
OSC Mode x 1
14
30
mA
IDD2D
HALT (fcpu = 20 MHz)
Direct Mode
50
100
mA
IDD2P
HALT (fcpu = 20 MHz)
OSC Mode x 4
50
100
mA
IDD2D1
HALT (fcpu =16 MHz)
Direct Mode
42
85
mA
IDD2P1
HALT (fcpu = 16 MHz)
OSC Mode x 4
42
85
mA
IDD2P2
HALT (fcpu = 4 MHz)
OSC Mode x 1
11
22
mA
IDD3D
IDLE (fcpu = 20 MHz)
Direct Mode
6.5
15
mA
IDD3P
IDLE (fcpu = 20 MHz)
OSC Mode x 4
6.5
15
mA
IDD3D1
IDLE (fcpu = 16 MHz)
Direct Mode
6
14
mA
IDD3P1
IDLE (fcpu = 16 MHz)
OSC Mode x 4
6
14
mA
IDD3P2
IDLE (fcpu = 4 MHz)
OSC Mode x 1
3
8
mA
IDD4D
WATCH (fcpu = 5 MHz)
Direct Mode
0.8
3.2
mA
IDD4P
WATCH (fcpu = 5 MHz)
OSC Mode x 1
0.8
3.2
mA
IDD4P1
WATCH (fcpu = 4 MHz)
OSC Mode x 1
0.6
3.0
mA
Supply Current
20
MIN.
Data Sheet U14832EE2V1DS00
µPD76F0018
3.6 AC Characteristics
3.6.1 General
(TA = -40 ~ +85°C, VDD5x = 4.5 V ~ 5.5 V, VSS5x = 0 V, Output pin load capacitance: CL= 50 pF)
Figure 3-3:
AC Test Input/Output Waveform, AC Test Load Condition
Test Points
VDD5
0.8 VDD5
0V
0.2 VDD5
DUT
Load on test
CL =50pF
3.6.2 Clock
Table 3-8:
Parameter
Clock AC Characteristics
Symbol
Test Conditions
MIN.
MAX.
Unit
CLOCKIN input cycle
tCYCI
Direct Mode
25
125
ns
CLOCKIN input high-level width
tWCIH
Direct Mode
12
ns
CLOCKIN input low-level width
tWCIL
Direct Mode
12
ns
Figure 3-4:
CLOCKIN
(Direct mode)
Clock AC Characteristics
tCYCI
tWCIL
t WCIH
Data Sheet U14832EE2V1DS00
21
µPD76F0018
3.6.3 External Memory Access Read Timing
Table 3-9:
Parameter
External Memory Access Read Timing
Symbol
MAX.
Unit
TSAID
(2+w+wD+wAS)T - 70
ns
<11>
TSRDID
(1.5+w+wD)T - 60
ns
RD Low level width
<12>
TWRDL
(1.5+w+wD)T - 15
ns
RD High level width
<13>
TWRDH
(0.5+wAS+i)T - 23
ns
Address, CSn → RD↓
delay time
<14>
TDARD
(0.5+wAS)T - 25
ns
RD↑ → address delay
time
<15>
TDRDA
iT
ns
Data input hold time
(vs. RD↑)
<16>
THRDID
0
ns
RD↑ → data output
delay time
<17>
TDRDOD
(0.5+i)T
ns
WAIT set up time
(vs.address)
<31>
TSAW
WAIT high level width
<32>
TWWH
Data input set up time
(vs.address)
<10>
Data input set up time
(vs. RD↓)
Remarks: 1. T
22
MIN.
(1+wAS+ wD)T - 70
T
: 1/fCPU (= frequency of CLKOUT)
2.
i
: Number of idle states specified by BCC register
3.
wAS: Number of waits specified by ASC register
4.
wD : Number of waits specified by DWC1, DWC2 register; WD ≥ 1
5.
w : Number of waits due to WAIT
Data Sheet U14832EE2V1DS00
ns
ns
µPD76F0018
Figure 3-5:
External Memory Access Read Timing
TASW
T1
TW
T2
TI
CLKOUT (output)
A0-A25
(output)
CSn
WR0, WR1 (output)
<13>
<12>
<15>
RD (output)
<14>
<11>
<17>
<16>
<10>
D0-D15 (in/output)
<31>
<32>
WAIT (input)
Data Sheet U14832EE2V1DS00
23
µPD76F0018
3.6.4 External Memory Access Write Timing
Table 3-10:
Parameter
External Memory Access Write Timing
Symbol
MIN.
<20>
TDAWR
(0.5+wAS)T - 20
ns
Address set up (vs.
WR0, WR1↑)
<21>
TSAWR
(1.5+w+wD+ wAS)T -25
ns
WR0, WR1↑ →
address delay time
<22>
TDWRA
(0.5+i)T - 15
ns
WR0, WR1 High level
width
<23>
TWWRH
(0.5+i+wAS)T - 15
ns
WR0, WR1 Low level
width
<24>
TWWRL
(1+w+wD)T - 20
ns
Data output set up time
(vs. WR0, WR1↑)
<25>
TSODWR
(0.5+w+wD+ wAS)T -25
ns
Data output hold time
(vs. WR0, WR1↑)
<26>
THWROD
(0.5+i)T - 15
ns
WAIT set up time
(vs.address)
<31>
TSAW
WAIT High level width
<32>
TWWH
Address, CSn → WR0,
WR1↓ delay time
Remarks: 1. T
24
MAX.
(1+wAS+ wD)T - 70
T
: 1/fCPU (= frequency of CLKOUT)
2.
i
: Number of idle states specified by BCC register
3.
wAS: Number of waits specified by ASC register
4.
wD : Number of waits specified by DWC1, DWC2 register; WD ≥ 1
5.
w : Number of waits due to WAIT
Data Sheet U14832EE2V1DS00
Unit
ns
ns
µPD76F0018
Figure 3-6:
External Memory Access Write Timing
TASW
T1
TW
T2
TI
CLKOUT (output)
A0-A25
(output)
CSn
RD (output)
<21>
<20>
<23>
<22>
<24>
WR0, WR1 (output)
<25>
<26>
D0-D15 (in/output)
write → write
D0-D15 (in/output)
read → write
<31>
<32>
WAIT (input)
Data Sheet U14832EE2V1DS00
25
µPD76F0018
3.6.5 Reset
Table 3-11:
Parameter
RESET high-level width
RESET low-level width
RESET hold time
(from VDD5x)
Symbol
Reset Timing
Test Conditions
MIN.
tWRSH
ns
tWRSL0
STOP Mode
release, OSC
mode
TOSTNote
ms
tWRSL1
STOP Mode
release, Direct
mode
1.5
ms
tWRSL2
except STOP
Mode release
1.5
ms
tHVRSL0
OSC Mode on
power-on
TOST
ms
tHVRSL1
Direct mode on
power-on
1.5
ms
Figure 3-7:
tWRSH
Reset Timing
tWRSLn
RESET
VDD5x
VDD5x
RESET
tHVRSL
26
Unit
500
Note: TOST: Oscillation stabilization time
Remark:
MAX.
n = 0 to 2
Data Sheet U14832EE2V1DS00
µPD76F0018
3.6.6 Interrupt Timing
Table 3-12:
ParameterNote 1
Symbol
Interrupt Timing
Test Conditions
MIN.
MAX.
Unit
NMI high-level width
tWNIH
500Note 2
ns
NMI low-level width
tWNIL
500Note 2
ns
INTPEmn, INTn Note 1
high-level width
tWITHA
Analog filter
500Note 2
ns
lINTPEmn, INTnNote 1
low-level width
tWITLA
Analog filter
500Note 2
ns
INTPEmn, INTnNote 1
high-level width
tWITHD
Digital filter
5Tsam+10Note 3
ns
INTPEmn, INTnNote 1
low-level width
tWITLD
Digital filter
5Tsam+10Note 3
ns
Notes: 1. m = 0 ~ 5, n = 0 ~ 2
2.
Design constraint is 100 ns
3.
TSAM = 1/fSAM (fSAM is set by register setting in filter. fSAM = fCPU or fCPU/2 or fCPU/16)
Figure 3-8:
Interrupt Timing
tWNIH
tWNIL
tWITHA/D
tWITLA/D
NMI
INTPEmn,
INTn
Data Sheet U14832EE2V1DS00
27
µPD76F0018
3.7 Peripheral Function Characteristics
3.7.1 Timer E
Table 3-13:
Parameter Note 1
TIEmn high-level widthNote 1
Note 1
Timer E Characteristics
Symbol
Test Conditions
MIN.
tWTIHA
no filter
T Note 2 + 10
Note 2
MAX.
Unit
ns
tWTILA
no filter
T
+ 10
ns
TCLREn high-level width
tWTCHA
no filter
T Note 2 + 10
ns
TCLREn low-level width
tWTCLA
no filter
T Note 2 + 10
ns
TIEmn low-level width
Note 3 +
TIEmn high-level widthNote 1
tWTIHD
Digital filter
5Tsam
10
ns
TIEmn low-level widthNote 1
tWTILD
Digital filter
5TsamNote 3 + 10
ns
TCLREn high-level width
tWTCHD
Digital filter
5TsamNote 3 + 10
ns
TCLREn low-level width
tWTCLD
Digital filter
5TsamNote 3 + 10
ns
Notes: 1. m = 0 - 5, n = 0 - 2
2.
T = 1/fCPU
3.
TSAM = 1/fSAM (fSAM is set by register setting in filter. fSAM = fCPU or fCPU/2 or fCPU/16)
Figure 3-9:
Timer E Characteristics
tWTIHA/D
tWTILA/D
tWTCHA/D
tWTCLA/D
TIEmn
TCLREn
28
Data Sheet U14832EE2V1DS00
µPD76F0018
3.7.2 CSI
I
Table 3-14:
CSI Master Mode Characteristics
Symbol
Test Conditions
MIN.
SCK cycle time
tCYSK
Output
200
ns
SCK high level width
tWSKH
Output
0.5 tCYSK-15
ns
SCK low level width
tWSKL
Output
0.5 tCYSK-15
ns
SI set up time (to SCK ↑)
tSSISK
45
ns
SI hold time (from SCK ↑)
tHSKSI
45
ns
SO output delay time (from SCK ↓)
tDSKSO
SO output hold time (from SCK ↑)
tHSKSO
Parameter
Table 3-15:
MAX.
30
0.5 tCYSK-5
Unit
ns
ns
CSI Slave Mode Characteristics
Symbol
Test Conditions
MIN.
SCK cycle time
tCYSK
Input
200
ns
SCK high level width
tWSKH
Input
90
ns
SCK low level width
tWSKL
Input
90
ns
SI set up time (to SCK ↑)
tSSISK
50
ns
SI hold time (from SCK ↑)
tHSKSI
50
ns
SO output delay time (from SCK ↓)
tDSKSO
SO output hold time (from SCK ↑)
tHSKSO
Parameter
Figure 3-10:
MAX.
50
tWSKH
Unit
ns
ns
CSI Slave Mode Characteristics
tCYSK
tWSKL
tWSKH
SCK
tSSISK
SI
tHSKSI
Hi-Z
Input Data
tDSKSO
tHSKSO
SO
Output Data
Data Sheet U14832EE2V1DS00
29
µPD76F0018
3.7.3 UART
Table 3-16:
UART Characteristics
Parameter
Symbol
Test Conditions
Transfer rate
TUART
fCPU ≥ 5 MHz
MIN.
MAX.
Unit
312500
bps
MAX.
Unit
1
Mbps
MAX.
Unit
1
Mbps
3.7.4 FVAN
Table 3-17:
FVAN Characteristics
Parameter
Symbol
Test Conditions
Transfer rate
TFVAN
fCPU ≥ 16 MHz
MIN.
3.7.5 FCAN
Table 3-18:
30
FCAN Characteristics
Parameter
Symbol
Test Conditions
Transfer rate
TFCAN
fCPU ≥ 16 MHz
MIN.
Data Sheet U14832EE2V1DS00
µPD76F0018
3.7.6 A/D Converter
Table 3-19:
A/D Converter Characteristics
(TA = -40 ~ +85°C, VDD5x = 4.5 ~ 5.5 V, AVDD = VDD5x)
Parameter
Symbol
Resolution
Test Cond.
MIN.
TYP.
-
Overall Error
Note 1
MAX.
10
±3
AVREF = AVDD
-
Unit
Bit
±6
LSB
Conversion Time Note 2
tCONV
5
µs
Sampling Time Note 3
tSAM
0.9
µs
Analogue Input Voltage
VIAN
AVSS
AVREF
V
Reference Voltage
AVREF
AVSS
AVDD
V
Reference Voltage
Input Current Note 4
IAVREF
2
mA
AVREF = AVDD
1
Notes: 1. Quantization error is not included
2.
tCONV depends on register ADSCM1
3.
tSAM depends on register ADSCM1
4. If ADC is set to standby mode, AVREF can be disconnected externally (left open) to reduce
current consumption
3.7.7 Voltage Comparator Characteristics
Table 3-20:
Voltage Comparator Characteristics
(TA = -40 ~ +85°C, VDD5x = 4.5 V ~ 5.5 V)
Parameter
Symbol
Comparator Analog
Input voltage
VCIN
Threshold voltage
VTH
Test Conditions
MIN.
TYP.
0
VDD5x = 4.5 ~ 5.5 V
1.1
Data Sheet U14832EE2V1DS00
1.25
MAX.
Unit
VDD5x
V
1.4
V
31
µPD76F0018
3.8 FLASH EPROM Characteristics
Table 3-21:
Flash EPROM Programming Characteristics Basic Specification
Parameter
Operation frequency
Supply voltage
Maximum times of reprogramming
Symbol
Test conditions
MIN.
TYP.
MAX.
Unit
fX
4
20
MHz
VDD5x
4.5
5.5
V
VDD5x
V
8.1
V
100
times
200
µs
10
s
VPPL
Low input
-0.3
VPPH
Programming
mode
7.5
7.8
CWRT
Write time
TIWRTW
Word
(32-bit) Note 1
Write Back time / block
TWBACK
Note1
TERASCB
block
(128 KByte)Note 1
2
30
s
TERASCC
chip
(256 KByte)Note 1
20
60
s
+70
°C
100
mA
Erase time
Programming temperature
TPRG
Erase / Write current
IPPE/W
50
0
VPPH = TYP.Note 2
Notes: 1. Exclusive recovery time, firmware execution and verify
2. Measured condition after TPE (erase-time) = 100 mS
32
Data Sheet U14832EE2V1DS00
µPD76F0018
Table 3-22:
Flash EPROM Serial Programming Operation Characteristics
Parameter
Symbol
Test conditions
MIN.
TYP.
MAX.
Unit
VDD↑ setup time (to RESET↑)
TDRRR
10
ms
VDD↑ setup time (to VPP↑)
TDRPSR
10
µs
VPP↑ set time (to RESET↑)
TPSRRF
1.0
µs
Count start setup time from VPP↑
TRFCF
5T Note+ 500
µs
Times of VPP counting
TCOUNT
VPP count Hi/Low level width
TCH,TCL
VPP count rise/fall time
TVPPRF
10
1.0
ms
µs
0.2
ms
Note: T = 1/fCPU
Figure 3-11:
VDD5x
VDD5x
TCOUNT
0V
TDRPSR
VPP
Flash EPROM Programming Timing
TRFCF
TCH
VPPH
VPPL
T
TCL VPPRF
TVPPRF
TPSRRF
RESET
VDD5x
TDRRR
0V
Data Sheet U14832EE2V1DS00
33
µPD76F0018
4.
PACKAGE DRAWING
Figure 4-1:
Package Drawing
144-PIN PLASTIC LQFP (FINE PITCH) (20x20)
A
B
108
109
73
72
detail of lead end
S
C
D
R
Q
144
1
37
6
3
F
G
H
I
J
M
K
P
S
N
S
L
M
NOTE
Each lead centerline is located within 0.08 mm of
its true position (T.P.) at maximum material condition.
ITEM
A
MILLIMETERS
22.0±0.2
B
C
20.0±0.2
20.0±0.2
D
22.0±0.2
F
1.25
G
1.25
H
0.22±0.05
I
0.08
J
0.5 (T.P.)
K
1.0±0.2
L
0.5±0.2
M
0.17 +0.03
? 0.07
N
P
0.08
1.4
Q
0.10±0.05
R
3° +4°
? 3°
S
1.5±0.1
S144GJ-50-UEN
34
Data Sheet U14832EE2V1DS00
µPD76F0018
5. RECOMMENDED SOLDERING CONDITIONS
Solder this product under the following recommended conditions.
For details of the recommended soldering conditions, refer to information document Semiconductor
Device:
Mounting Technology Manual (C10535E).
For soldering methods and conditions other than those recommended, consult NEC.
Table 5-1:
Soldering Method
Soldering Conditions
Soldering Condition
Symbol of Recommended Soldering
Condition
Infrared reflow
Package peak temperature: 230°C, Time:
30 seconds max. (210°C min.), Number of
times: 2 max.,
Number of days: 3 Note 1
IR30-103-2
VPS
Package peak temperature: 215°C, Time:
30 seconds max. (210°C min.), Number of
times: 2 max.,
Number of days: 3 Note 1
VP15-103-2
Partial heating
Pin temperature: 300°C max.,
Time: 3 seconds max. (per side of device)
-
Notes: 1. After that, prebaking is necessary at 125°C for 10 hours.
2. The number of days refers to storage at 25°C, 65% RH MAX after the dry pack has been
opened.
Caution:
Do not use two or more soldering methods in combination (except partial heating
method).
Data Sheet U14832EE2V1DS00
35
µPD76F0018
NOTES FOR CMOS DEVICES
1
PRECAUTION AGAINST ESD FOR SEMICONDUCTORS
Note:
Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and
ultimately degrade the device operation. Steps must be taken to stop generation of static electricity
as much as possible, and quickly dissipate it once, when it has occurred. Environmental control
must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using
insulators that easily build static electricity. Semiconductor devices must be stored and transported
in an anti-static container, static shielding bag or conductive material. All test and measurement
tools including work bench and floor should be grounded. The operator should be grounded using
wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need
to be taken for PW boards with semiconductor devices on it.
2
HANDLING OF UNUSED INPUT PINS FOR CMOS
Note:
No connection for CMOS device inputs can be cause of malfunction. If no connection is provided
to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence
causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels
of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused
pin should be connected to V DD or GND with a resistor, if it is considered to have a possibility of
being an output pin. All handling related to the unused pins must be judged device by device and
related specifications governing the devices.
3
STATUS BEFORE INITIALIZATION OF MOS DEVICES
Note:
Power-on does not necessarily define initial status of MOS device. Production process of MOS
does not define the initial operation status of the device. Immediately after the power source is
turned ON, the devices with reset function have not yet been initialized. Hence, power-on does
not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the
reset signal is received. Reset operation must be executed immediately after power-on for devices
having reset function.
36
Data Sheet U14832EE2V1DS00
µPD76F0018
6. REVISION HISTORY
Version
Date
(xx.xx.2002)
Author
0.1
25.05.2000
E. Gebing
1st Preparation PPI
1.0
23.05.2001
E. Gebing
Preliminary Data Sheet
2.0
14.01.2002
E.Gebing
Data Sheet
2.1
23.01.2002
E.Gebing
Data Sheet
Remarks
Data Sheet U14832EE2V1DS00
37
µPD76F0018
Regional Information
Some information contained in this document may vary from country to country. Before using any NEC
product in your application, pIease contact the NEC office in your country to obtain a list of authorized
representatives and distributors. They will verify:
•
Device availability
•
Ordering information
•
Product release schedule
•
Availability of related technical literature
•
Development environment specifications (for example, specifications for third-party tools and
components, host computers, power plugs, AC supply voltages, and so forth)
•
Network requirements
In addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary
from country to country.
NEC Electronics Inc. (U.S.)
NEC Electronics (France) S.A.
NEC Electronics Hong Kong Ltd.
Santa Clara, California
Tel: 408-588-6000
800-366-9782
Fax: 408-588-6130
800-729-9288
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Tel: 01-3067-58-00
Fax: 01-3067-58-99
Hong Kong
Tel: 2886-9318
Fax: 2886-9022/9044
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Duesseldorf, Germany
Tel: 0211-65 03 01
Fax: 0211-65 03 327
• Branch The Netherlands
NEC Electronics (France) S.A.
Representación en España
Madrid, Spain
Tel: 091-504-27-87
Fax: 091-504-28-60
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Eindhoven, The Netherlands
Tel: 040-244 58 45
Fax: 040-244 45 80
Milano, Italy
Tel: 02-66 75 41
Fax: 02-66 75 42 99
• Branch Sweden
NEC Electronics (UK) Ltd.
NEC Electronics Hong Kong Ltd.
Seoul Branch
Seoul, Korea
Tel: 02-528-0303
Fax: 02-528-4411
NEC Electronics Singapore Pte. Ltd.
Novena Square, Singapore
Tel: 253-8311
Fax: 250-3583
NEC Electronics Taiwan Ltd.
Taeby, Sweden
Tel: 08-63 80 820
Fax: 08-63 80 388
Milton Keynes, UK
Tel: 01908-691-133
Fax: 01908-670-290
Taipei, Taiwan
Tel: 02-2719-2377
Fax: 02-2719-5951
NEC do Brasil S.A.
Electron Devices Division
Guarulhos-SP, Brasil
Tel: 11-6462-6810
Fax: 11-6462-6829
J01.2
38
Data Sheet U14832EE2V1DS00
µPD76F0018
MS-DOS and MS-Windows are either registered trademarks or trademarks of Microsoft
Corporation in the United States and/or other countries.
PC/AT and PC DOS are trademarks of IBM Corp.
The related documents in this publication may include preliminary versions. However, preliminary
versions are not marked as such.
The export of this product from Japan is regulated by the Japanese government. To export this
product may be prohibited without governmental license, the need for which must be judged by th
customer. The export or re-export of this product from a country other than Japan may also be
prohibited without a license from that country. Please call an NEC sales representative.
The information in this document is current as of 23.01.2002. The information is subject to change without
notice. For actual design-in, refer to the latest publications of NEC’s data sheets or data books, etc., for
the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are
available in every country. Please check with an NEC sales representative for availability and additional
information. No part of this document may be copied or reproduced in any form or by any means without
prior written consent of NEC. NEC assumes no responsibility for any errors that may appear in this
document. NEC does not assume any liability for infringement of patents, copyrights or other intellectual
property rights of third parties by or arising from the use of NEC semiconductor products listed in this
document or any other liability arising from the use of such products. No license, express, implied or
otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC or others.
Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
circuits, software and information in the design of customer’s equipment shall be done under the full
responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third
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the quality, reliability and safety of NEC semiconductor products, customers agree and acknowledge that
the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property
or injury (including death) to persons arising from defects in NEC semiconductor products, customers must
incorporate sufficient safety measures in their design, such as redundancy, fire-containment and antifailure features. NEC semiconductor products are classified into the following three quality grades:
“Standard”, “Special” and “Specific”. The “Specific” quality grade applies only to semiconductor products
developed based on a customer-designated “quality assurance program” for a specific application. The
recommended applications of a semiconductor product depend on its quality grade, as indicated below.
Customers must check the quality grade of each semiconductor product before using it in a particular
application.
"Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal
electronic equipment and industrial robots.
"Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, antidisaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support).
"Specific": Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC semiconductor products is “Standard“ unless otherwise expressly specified in
NEC's data sheets or data books, etc.
If customers wish to use NEC semiconductor products in applications not intended by NEC, they must
contact an NEC sales representative in advance to determine NEC's willingness to support a given
application.
Notes: (1) “NEC” as used in this statement means NEC Corporation and also includes its majority-owned
subsidiaries.
(2) “NEC semiconductor products” means any semiconductor product developed or manufactured
by or for NEC (as defined above).
M5 2000.03
Data Sheet U14832EE2V1DS00
39
µPD76F0018
40
Data Sheet U14832EE2V1DS00
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