Philips-DVDR-1000-Service-Manual

DVD-Video Recorder
DVDR1000
/001 /021 /051 /691
CL 16532095_000.eps
140801
Contents
1
2
3
4
5
6
7
Page
Technical Specifications And Connection
Facilities
Warnings, Laser Safety Instructions And Notes
Directions For Use
Mechanical Instructions And Exploded Views
Diagnostic Software Descriptions And
Troubleshooting
Block and Wiring Diagram
Block Diagram
Wiring Diagram
Electrical Diagrams And Print-Layouts
Power Supply
(Diagram 1)
Power Supply
(Diagram 2)
Display Panel
(Diagram 1)
Flap Motor Driver Part
Front AV Part
IR & Standby Panel
Analog Board: All In One 1
(Diagram 1)
Analog Board: All In One 2
(Diagram 2)
Analog Board: Tuner / Demodul. (Diagram 3)
Analog Board: In / Out 1
(Diagram 4)
Analog Board: In / Out 2
(Diagram 5)
Analog Board: In / Out 3
(Diagram 6)
Analog Board: In / Out 4
(Diagram 7)
Analog Board: Sound Processing (Diagram 8)
Analog Board: Follow Me
(Diagram 9)
Analog Board: VPS
(Diagram 10)
2
5
7
33
37
91
92
Diagram
93
94
99
103
104
105
106
107
108
109
110
111
112
113
114
114
PWB
95-98
95-98
100->
103
105
119->
119->
119->
119->
119->
119->
119->
119->
119->
119->
Contents
Page
Analog Board: Power Supply (Diagram 11)
Analog Board: Audio Converter (Diagram 12)
Analog Board: RGB-YUV Conv. (Diagram 13)
Analog Board: Digital In / Out (Diagram 14)
Analog Board: Fan Control
(Diagram 15)
DVIO Front Board
DVIO Board: 1394 Interface
(Diagram 1)
DVIO Board: Microprocessor (Diagram 2)
DVIO Board: FIFO & Control
(Diagram 3)
DVIO Board: DVCODEC
(Diagram 4)
DVIO Board: A/V Output
(Diagram 5)
Digital Board
(Diagram 1)
Digital Board
(Diagram 2)
Digital Board
(Diagram 3)
Digital Board
(Diagram 4)
Digital Board
(Diagram 5)
Digital Board
(Diagram 6)
Digital Board
(Diagram 7)
Digital Board
(Diagram 8)
8 Electrical Alignments
9 Circuit Descriptions And
List Of Abbreviations
10 Spare Part List
115
116
117
117
118
127
128
129
130
131
132
137
138
139
140
141
142
143
144
157
158
303
307
119->
119->
119->
119->
119->
127
133->
133->
133->
133->
133->
145->
145->
145->
145->
145->
145->
145->
145->
©
Copyright 2001 Philips Consumer Electronics B.V. Eindhoven, The Netherlands.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic, mechanical,
photocopying, or otherwise without the prior permission of Philips.
Published by MT 0168 Service PaCE
Printed in the Netherlands
Subject to modification
3122 785 11600
GB 2
1.
DVDR1000 /0x1 /691
Technical Specifications and Connection Facilities
1. Technical Specifications and Connection Facilities
1.1
General:
Mains voltage
Mains frequency
Power consumption mains
Power consumption standby
Power consumption low power
stand-by
1.2
: 230V (198 -264V
AC) for Europe/Asia
: 50 Hz - 60Hz
: < 32 W
: <7W
and PHILIPS standard test pattern
video signal:
Harmonic distortion (1 kHz):
1.2.7
RF Tuner
Test equipment:Fluke 54200 TV Signal generator
Test streams:PAL BG Philips Standard test pattern
1.2.1
1.2.2
RF - Loop Through:
Frequency range
Gain: (ANT IN - ANT OUT)
1.2.3
1.2.4
1.3
Analogue Inputs
1.3.1
SCART II (Connected to TV)
: 45 MHz - 860 MHz
: -4 dB /±2 dB
Pin Signals:
1 - Audio R
2 - Audio R
3 - Audio L
4 - Audio GND
5 - Blue/Chroma
GND
6 - Audio L
7 - Blue out/
Chroma in
8 - Function
switch
Radio Interference:
input voltage /3 tone method (+40
dB min)
: typ. 80 dBm V at
75W
Receiver:
PLL tuning with AFC for optimum reception
Frequency range:
: 45.25 MHz - 860
MHz
Sensitivity at 40 dB S/N
: ³ 60dBm V at 75W
(video unweighted )
1.2.5
Video Performance:
Audio Performance:
Audio Performance Analogue - HiFi:
Frequency response at SCART 1
(L+R) output:
: 40 Hz - 15 kHz / ±
1.5 dB
S/N according to DIN 45405, 7,
1967
:
and PHILIPS standard test pattern
video signal:
: -50 dB unweighted
Harmonic distortion ( 1 kHz, ± 25
kHz deviation ):
: 0.5 %
Audio Performance NICAM:
Frequency response at SCART
1(L+R) output:
S/N according to DIN 45405, 7,
1967
: 40 Hz - 15 kHz ± 1.5
dB
:
2.5 min. PAL
75 V, 75
: ± 62.5 kHz
: ± 100 kHz
1.8V RMS
1.8V RMS
0.7Vpp ± 0.1V into 75 Ohm (*)
<2V = TV
>4.5V / <7V = asp. ratio 16:9 DVD
>9.5V / <12V = asp. ratio 4:3
DVD
9 - Green GND
10- P50 control
11- Green
0.7Vpp ± 0.1V into 75 Ohm (*)
12- Nc
13- Red/Chroma
GND
14- fast switch
GND
15- Red out/
Chroma out 0.7Vpp ± 0.1V into 75 Ohm (*)
± 3dB 0.3Vpp Chroma (burst)
16- fast switch
RGB/ CVBS or Y <0.4V into 75 Ohm = CVBS
>1V / <3V into 75 Ohm = RGB
17- Y/CVBS
GND
18- fast switching
GND
19- CVBS/Y/RGB
sync
1Vpp ± 0.1V into 75 Ohm (*)
20- CVBS/Y
21- Shield
Channel 25 / 503,25 MHz,
Test pattern: PAL BG PHILIPS standard test pattern,
RF Level 74 dBV
Measured on SCART 1
Frequency response:
: 1 MHz - 4.00 MHz
± 2 dB
Group delay ( 0.1 MHz - 4.4 MHz )
: 0 nsec ± 30 nsec
1.2.6
:
:
Tuning Principle
automatic B,G, I, DK and L/L’detection
manual selection in "STORE" mode
System:
PAL B/G, PAL D/K, SECAM L/L’, PAL I
-60 dB unweighted
0.1 %
Tuning
Automatic Search Tuning
scanning time without antenna
stop level (vision carrier)
Maximum tuning error of a
recalled program
Maximum tuning error during
operation
: <3W
:
:
1.3.2
SCART I (Connected to AUX)
Pin Signals:
1 - Audio R
1.8V RMS
2 - Audio R
3 - Audio L
1.8V RMS
4 - Audio GND
5 - Blue/Chroma
GND
Technical Specifications and Connection Facilities DVDR1000 /0x1 /691
6 - Audio L
7 - Blue in/
Chroma out ± 3dB 0.3Vpp Chroma (burst)
8 - Function
switch
9 - Green GND
10- P50 control
11- Green
12- Nc
13- Red/Chroma
GND
14- fast switch
GND
15- Red in/
Chroma in
16- fast switch
RGB/ CVBS
or Y
17- CVBS GND
18- fast switching
GND
19- CVBS/Y/RGB
sync
1Vpp ± 0.1V into 75 Ohm (*)
20- CVBS/Y
21- Shield
(*) for 100% white
1.3.3
Audio
Input voltage
Input impedance
: 2 Vrms
: >10kW
Video - Cinch
Input voltage
Input impedance
: 1 Vpp ± 0.1V
: 75 W
Input impedance C
1.3.5
: 1Vpp ± 0.1V
: 75 W
: burst 300 mVpp ±
{x} dB
: 75 W
1.4.2
1.4.3
Audio (EXT1)
Input voltage
Input impedance
: 2 Vrms
: >10k W
Video (EXT4)
Input voltage
Input impedance
: 1 Vpp ± 0.1V
: 75 W
YC Input Rear (Hosiden; EXT3)
Bandwidth
1.5
Audio Performance
1.5.1
Cinch Output Rear
Output voltage 2 channel mode
Output voltage 5.1 channel Dolby
Channel unbalance (1kHz)
Crosstalk 1kHz
Crosstalk 20Hz-20kHz
Frequency response 20Hz- 20kHz
Signal to noise ratio
Dynamic range 1kHz
Dynamic range 20Hz-20kHz
Distortion and noise 1kHz
Distortion and noise20Hz-20kHz
Intermodulation distortion
Phase non linearity
Level non linearity
Mute (spin-up, pause, access)
Outband attenuation:
1.6
Digital Output
1.6.1
Coaxial
CDDA/ LPCM (incl MPEG1)
MPEG2, AC3 audio
DTS
All outputs loaded with 75 Ohm
SNR measurements over full bandwidth without weighting.
1.4.1
1.6.2
CVBS Output Rear (EXT4)
SNR Luminance
SNR Chrominance AM
: > -65 dB
: > -65 dB
:
:
:
:
> -65 dB
> -65 dB
> -65 dB
5 MHz ± 1 dB
: > -65 dB on all
output
: 5 MHz ± 1 dB
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
2Vrms ± 1.5dB
1.41Vrms ± 1.5dB
<0.85dB
>105dB
> 95dB
± 0.1dB max
>100 dB
>90dB
>88dB
>90dB
>80dB
>87dB
± 1o max.
± 0.5dB max.
>100dB
> 50dB above
25kHz
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
2Vrms ± 1.5dB
1.41Vrms ± 1.5dB
<0.85dB
>105dB
> 95dB
± 0.1dB max
>100 dB
>90dB
>88dB
>90dB
>80dB
>87dB
± 1o max
± 0.5dB max
>100dB
> 50dB above
25kHz
Scart Audio
Output voltage 2 channel mode
Output voltage 5.1 channel Dolby
Channel unbalance (1kHz)
Crosstalk 1kHz
Crosstalk 20Hz-20kHz
Frequency response 20Hz- 20kHz
Signal to noise ratio
Dynamic range 1kHz
Dynamic range 20Hz-20kHz
Distortion and noise 1kHz
Distortion and noise20Hz-20kHz
Intermodulation distortion
Phase non linearity
Level non linearity
Mute (spin-up, pause, access)
Outband attenuation:
Video Performance
: > -65 dB
: 5 MHz ± 1 dB
SCART (RGB)
SNR
1.5.2
GB 3
YC Output Rear (Hosiden ; EXT3)
SNR
SNR C - AM
SNR C - PM
Bandwidth Y
Cinch Audio/Video Line Input Rear
1 - GND
2 - GND
3 - Input voltage
Y
1Vpp ± 0.1V/ 75 W
4 - Input voltage
C
Burst 300 mVpp ± {x} dB/ 75 W
1.4
SNR Chrominance PM
Bandwidth Luminance
Audio/Video Front Input Connectors
Video - YC (Hosiden)
Input voltage Y
Input impedance Y
Input voltage C
1.3.4
1.
Optical
identical to coaxial
: according IEC958
: according IEC1937
: according IEC1937,
amendment 1
GB 4
1.
DVDR1000 /0x1 /691
1.7
Digital Video Input (IEEE 1394)
1.7.1
Applicable Standards
Technical Specifications and Connection Facilities
Implementation according:
IEEE Std 1394-1995
IEC 61883 - Part 1
IEC 61883 - Part 2 SD-DVCR (02-01-1997)
Specification of consumer use digital VCR’s using 6.3 mm
magnetic tape - dec.1994
Mechanical connection according:
Annex A of 61883-1
1.7.2
Audio Quality
Output voltage 2 channel mode
Channel unbalance (1kHz)
Crosstalk 1kHz
Crosstalk 20Hz-20kHz
Frequency response 20Hz- 12kHz
Signal to noise ratio
Dynamic range 1kHz
Dynamic range 20Hz-20kHz
Distortion and noise 1kHz
Distortion and noise 20Hz-20kHz
Intermodulation distortion
Phase non linearity
Level non linearity
Mute (spin-up, pause, access)
Outband attenuation
1.8
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
2Vrms +/- 1.5dB
Tbd
> 95 dB
> 95 dB
+/- 0.2dB max
>85 dB
tbd
Tbd
>75dB
>75dB
>80dB
tbd
tbd
tbd
tbd
P50 System Control
Via SCART pin nr 10
1.9
Dimensions and Weight
Place and height of feet
Apparatus tray closed
Apparatus tray open
Weight without packaging
Weight in packaging
: acc. to Philips
Harmonisation line
: WxDxH :435 x 330 x
110
: WxDxH :435 x 470 x
110
: ca. 8.8 Kg ± 0.5 kg
: ca. Tbc (>9 Kg)
1.10 Laser Output Power & Wavelength
1.10.1 DVD
Output power during reading
Output power during writing
Wavelength
: 0.8mW
: 20mW
: 660nm
1.10.2 CD
Output power
Wavelength
: 0.3mW
: 780nm
Warnings And Laser Safety Instructions DVDR1000 /0x1 /691
2.
GB 5
2. Warnings And Laser Safety Instructions
GB
WARNING
NL
All ICs and many other semi-conductors are
susceptible to electrostatic discharges (ESD).
Careless handling during repair can reduce
life drastically.
When repairing, make sure that you are
connected with the same potential as the
mass of the set via a wrist wrap with
resistance.
Keep components and tools also at this
potential.
F
WAARSCHUWING
Alle IC’s en vele andere halfgeleiders zijn
gevoelig voor elektrostatische ontladingen
(ESD).
Onzorgvuldig behandelen tijdens reparatie
kan de levensduur drastisch doen
verminderen.
Zorg ervoor dat u tijdens reparatie via een
polsband met weerstand verbonden bent met
hetzelfde potentiaal als de massa van het
apparaat.
Houd componenten en hulpmiddelen ook op
ditzelfde potentiaal.
D
ATTENTION
Tous les IC et beaucoup d’autres semiconducteurs sont sensibles aux décharges
statiques (ESD).
Leur longévité pourrait être considérablement
écourtée par le fait qu’aucune précaution
n’est prise a leur manipulation.
Lors de réparations, s’assurer de bien être
relié au même potentiel que la masse de
l’appareil et enfiler le bracelet serti d’une
résistance de sécurité.
Veiller a ce que les composants ainsi que les
outils que l’on utilise soient également a ce
potentiel.
WARNUNG
I
Alle IC und viele andere Halbleiter sind
empfindlich gegen elektrostatische
Entladungen (ESD).
Unsorgfältige Behandlung bei der Reparatur
kann die Lebensdauer drastisch vermindern.
Sorgen sie dafür, das Sie im Reparaturfall
über ein Pulsarmband mit Widerstand mit
dem Massepotential des Gerätes verbunden
sind.
Halten Sie Bauteile und Hilfsmittel ebenfalls
auf diesem Potential.
AVVERTIMENTO
Tutti IC e parecchi semi-conduttori sono
sensibili alle scariche statiche (ESD).
La loro longevita potrebbe essere fortemente
ridatta in caso di non osservazione della piu
grande cauzione alla loro manipolazione.
Durante le riparazioni occorre quindi essere
collegato allo stesso potenziale che quello
della massa dell’apparecchio tramite un
braccialetto a resistenza.
Assicurarsi che i componenti e anche gli
utensili con quali si lavora siano anche a
questo potenziale.
D
GB
Safety regulations require that the set be restored to its original condition
and that parts which are identical with those specified be used.
NL
Bei jeder Reparatur sind die geltenden Sicherheitsvorschriften zu beachten.
Der Originalzustand des Gerats darf nicht verandert werden.
Fur Reparaturen sind Original-Ersatzteile zu verwenden.
I
Veiligheidsbepalingen vereisen, dat het apparaat in zijn oorspronkelijke
toestand wordt terug gebracht en dat onderdelen, identiek aan de
gespecifieerde worden toegepast.
Le norme di sicurezza esigono che l’apparecchio venga rimesso nelle
condizioni originali e che siano utilizzati pezzi di ricambiago idetici a quelli
specificati.
F
Les normes de sécurité exigent que l’appareil soit remis a l’état d’origine et
que soient utilisées les pièces de rechange identiques à celles spécifiées.
SHOCK, FIRE HAZARD SERVICE TEST:
CAUTION: After servicing this appliance and prior to returning to customer, measure the resistance between
either primary AC cord connector pins (with unit NOT connected to AC mains and its Power switch ON), and the
face or Front Panel of product and controls and chassis bottom,
Any resistance measurement less than 1 Megohms should cause unit to be repaired or corrected before AC
power is applied, and verified before return to user/customer.
Ref.UL Standard NO.1492.
NOTE ON SAFETY:
Symbol : Fire or electrical shock hazard. Only original parts should be used to replace any part with symbol
Any other component substitution(other than original type), may increase risk or fire or electrical shock hazard.
“Pour votre sécurité, ces documents
doivent être utilisés par des
spécialistes agrées, seuls habilités à
réparer votre appareil en panne.”
CL 96532065_002.eps
120799
GB 6
2.
DVDR1000 /0x1 /691
Warnings And Laser Safety Instructions
LASER SAFETY
This unit employs a laser. Only a qualified service person should remove the cover or attempt to service this
device, due to possible eye injury.
LASER DEVICE UNIT
Type:
Wave length:
Output Power:
(out of objective)
Beam divergence:
SemiconductorlaserGaAlAs
660 nm (DVD)
780 nm (VCD/CD)
20 mW (DVD+RW writing)
0,8 mW (DVD reading)
0,3 mW (VCD/CD reading)
60 degree
USE OF CONTROLS OR ADJUSTMENTS OR PERFORMANCE OF PROCEDURE OTHER THAN THOSE
SPECIFIED HEREIN MAY RESULT IN HAZARDOUS RADIATION EXPOSURE.
AVOID DIRECT EXPOSURE TO BEAM
WARNING
The use of optical instruments with this product will increase eye hazard.
Repair handling should take place as much as possible with a disc loaded inside the player
WARNING LOCATION: INSIDE ON LASER COVERSHIELD
CAUTION VISIBLE AND INVISIBLE LASER RADIATION WHEN OPEN AVOID EXPOSURE TO BEAM
ADVARSEL SYNLIG OG USYNLIG LASERSTRÅLING VED ÅBNING UNDGÅ UDSÆTTELSE FOR STRÅLING
ADVARSEL SYNLIG OG USYNLIG LASERSTRÅLING NÅR DEKSEL ÅPNES UNNGÅ EKSPONERING FOR STRÅLEN
VARNING SYNLIG OCH OSYNLIG LASERSTRÅLNING NÄR DENNA DEL ÄR ÖPPNAD BETRAKTA EJ STRÅLEN
VARO! AVATTAESSA OLET ALTTIINA NÄKYVÄLLE JA NÄKYMÄTTÖMÄLLE LASER SÄTEILYLLE. ÄLÄ KATSO SÄTEESEEN
VORSICHT SICHTBARE UND UNSICHTBARE LASERSTRAHLUNG WENN ABDECKUNG GEÖFFNET NICHT DEM STRAHL AUSSETSEN
DANGER VISIBLE AND INVISIBLE LASER RADIATION WHEN OPEN AVOID DIRECT EXPOSURE TO BEAM
ATTENTION RAYONNEMENT LASER VISIBLE ET INVISIBLE EN CAS D'OUVERTURE EXPOSITION DANGEREUSE AU FAISCEAU
CAUTION
ONLY QUALIFIED SERVICE PERSONNEL SHOULD REMOVE THE COVER
OR ATTEMPT TO SERVICE THIS DEVICE.
CL 16532095_052.eps
140801
English
Philips DVD
recorder
DVD Video
player
From now on you will enjoy full-length movies with true
cinema picture quality, and stereo or Multi-channel
sound (depending on the disc, and on your playback setup).You will find your recorder remarkably easy to use,
by way of the On-Screen Display and recorder display,
in combination with the remote control.
With it, you will be able to record TV programmes or
to edit and archive your own camcorder recordings.
Superb digital picture and sound quality, quick access to
the tracks you have recorded and extensive playback
features contribute to a completely new video
experience.
Remote control
If any item should be damaged or missing, please inform
your supplier without delay.
l Place the recorder on a firm, flat surface.
l Keep away from domestic heating equipment and
direct sunlight.
l In a cabinet, allow about 2.5 cm (1 inch) of free
space all around the recorder for adequate
ventilation.
l The lense may cloud over when the DVD recorder
is suddenly moved from cold to warm surroundings.
Playing a CD/DVD is not possible then. Leave the
DVD recorder in a warm environment for two
hours before use, so the moisture can evaporate.
l The recorder should not be exposed to dripping or
splashing, no object filled with liquids, such as vases,
should be placed on the recorder.
Placement
Keep the packaging materials; you may need them to
transport your recorder in the future.
Caution:
Do not use solvents such as benzine, thinner,
commercially available cleaners, or anti-static
spray intended for analogue discs.
Do not use commercially available cleaning discs
to clean the lens, as these discs may damage the
optical unit.
INTRODUCTION 9
Caution:
Do not mix old and new batteries. Never mix
different types of batteries (standard, alkaline,
etc.). This may reduce the lifetime of the
batteries.
l Open the battery compartment cover.
l Insert two 'AA' (LR-6) batteries as indicated inside
the battery compartment.
l Close the cover.
Loading the batteries
l When a disc becomes dirty, clean it with a cleaning
cloth. Wipe the disc from the centre out.
Some problems may occur because the disc inside the
recorder is dirty. To avoid these problems clean your
discs regularly, in the following way:
Cleaning discs
First check and identify the contents of your DVD
recorder package, as listed below:
- DVD recorder
- Remote Control Handset with separately-packed
batteries
- 2-core power cord
- SCART cable
- S-video cable
- Antenna (aerial) cable
- Audio cable
- Video cable
- DVD+RW disc
- User Manual
- Warranty card
Box contents
3.
INTRODUCTION 8
DVD+RW
pre-recorded DVD
Your Philips DVD recorder is a recorder and player
for digital video discs, with a two-way compatibility
to the universal DVD Video standard. This means that:
- existing pre-recorded DVD Video discs can be
played on your Philips DVD recorder and
- recordings, made on your Philips DVD recorder, can
be played on existing DVD Video players and
DVD-ROM drives.
DVD+ReWritable (DVD+RW) is the next step in video
technology. DVD+RW uses phase-change media, the
same technology that formed the basis for CDReWritable. A high-power laser is used to change the
reflectivity of the recording layer. This process can be
repeated more than a thousand times.
DVD (Digital Versatile Disc) is the new storage medium
that combines the convenience of the Compact Disc
with the latest advanced digital video technology.
DVD Video uses state-of-the-art MPEG2 data
compression technology to register an entire movie on a
single 5-inch disc. DVD’s variable bitrate compression,
running at up to 9.8 Mbits/second, captures even the
most complex pictures in their original quality.
The crystal-clear digital pictures have a horizontal
resolution of over 500 lines, with 720 pixels (picture
elements) to each line. This resolution is more than
double that of VHS, superior to Laser Disc, and entirely
comparable with digital masters made in recording
studios.
DVD Video Recorder
English
3.
Introduction
Directions For Use DVDR1000 /0x1 /691
GB 7
Directions For Use
English
EXT 3
EXT 1
TO TV I/0
2
10 INSTALLATION
If your TV set is not equipped with a SCART connector,
you can connect the DVD recorder with the S-video
(Y/C) sockets.
EXT 4
EXT 2
AUX- I/0
TV
l Connect the bottom SCART connector (EXT 1) to
the corresponding connector on the TV set, using
the SCART cable supplied (2) as shown in the
drawing.
To obtain the highest possible picture and sound quality
from your TV set it is recommended to use the SCART
connector on both DVD recorder and TV set.
Connecting to a TV set
l Remove the antenna (aerial) cable plug from your
TV set and insert it into the antenna socket at the
back of the DVD recorder.
l Plug one end of the antenna (aerial) cable supplied (1)
into the TV socket on the DVD recorder and the other
end into the antenna input socket on your TV set.
EXT 3
EXT 1
TO TV I/0
EXT 4
EXT 3
EXT 1
TO TV I/0
EXT 2
AUX- I/0
TV
5
l Connect the Video (CVBS) output socket (yellow)
to the corresponding input socket on the TV set
using the video cable supplied (4).
l Connect the audio Left (white) and Right (red)
output sockets to the corresponding sockets on the
TV set using the audio cable supplied (5).
Video (CVBS) connection
If your TV set is not equipped with S-video sockets, then
connect the DVD recorder with the CVBS sockets to
your TV set.
EXT 4
EXT 2
AUX- I/0
5
EXT 4
EXT 3
EXT 1
TO TV I/0
EXT 2
AUX- I/0
TV
6
8
AMPLIFIER
7
Note:
If the audio type of the digital output does not match the
capabilities of your receiver, the receiver will produce a
strong, distorted sound. The audio type of the DVD disc in
play is displayed in the Status Window, when changing the
language. 6 Channel Digital Surround Sound via digital
connection can only be obtained if your receiver is equipped
with a Digital Multi-channel decoder.
If you do not have a digital coaxial audio cable, you may
use the supplied video cable (4).
l Connect the recorder’s digital audio output to the
corresponding input on the receiver. Use a digital
coaxial cable (7) or a digital optical audio cable (8).
Digital Multi-channel sound
Digital Multi-channel connection provides the optimum
sound quality. For this you need a Multi-channel A/V
receiver that supports one or more of the audio types
supported by your DVD recorder (MPEG 2, Dolby
Digital and DTS). For this you can check the receiver
manual and the logos on the front of the receiver.
INSTALLATION 11
l If you have a receiver with two-channel analogue
stereo without any of the above mentioned sound
systems, connect the audio Left and Right output
sockets to the corresponding sockets on your
receiver, amplifier or stereo system. Use the audio
cable supplied (6).
Connecting to a receiver with two channel
analogue stereo
l Connect the recorder to the TV set as described in
chapter ‘Connecting to a TV set’.
Connecting to a TV set equipped with a
Dolby Pro Logic decoder
l Connect the recorder to the TV set and connect the
recorder’s audio Left and Right output sockets to the
corresponding inputs on the Dolby Pro Logic
Audio/Video receiver, using the audio cable supplied (6).
l Make the appropriate Sound settings for Analogue
Output in the user preferences menu.
Connecting to a receiver equipped with
Dolby Pro Logic
l Connect the recorder’s digital audio output to the
corresponding input on your receiver. Use the
supplied video (CVBS) cable (7) or an optional
digital optical audio cable (8).
l After installation you will need to activate PCM on
the DVD recorder’s digital output (see ‘User
Preferences’).
Connecting to a receiver equipped with
two channel digital stereo (PCM)
If you cannot connect your DVD recorder to an A/V
receiver with Multi-channel decoder, choose one of the
following alternatives.
DVDR1000 /0x1 /691
Connecting to the antenna
Caution:
Do not connect the recorder’s audio output to
the phono input of your audio system in order to
avoid damage to your equipment.
TV
Connecting to A/V receiver or A/V
amplifier with digital Multi-channel
decoder
l Connect the S-video output socket to the
corresponding input socket on the TV set, using the
supplied S-video cable (3).
l Connect the audio Left and Right output sockets to
the corresponding sockets on the TV set using the
audio cable supplied (5).
The best possible sound quality is obtained by
connecting your DVD recorder to an A/V receiver with
Multi-channel decoder (Dolby Digital, MPEG 2 and DTS).
Connecting to audio equipment
S-video (Y/C) connection
3.
- Please refer to your TV set, VCR, Stereo System and
any other User Manual(s) as necessary to make the
optimal connections.
- Do not connect the power until all other connections
are made.
- Do not connect your DVD recorder to your TV set
via your VCR, because the video quality could be
distorted by the copy protection system.
- For better sound reproduction you can connect the
recorder audio outputs to your amplifier, receiver,
stereo system or A/V equipment. For this see
‘Connecting to A/V receiver or A/V amplifier’.
Connections - back side of your
DVD recorder
Installation
GB 8
Directions For Use
English
English
EXT 4
4
EXT 1
TO TV I/0
EXT 2
AUX- I/0
2
Set top box
EXT 3
3
5
1
3
Camcorder
2
PANEL
4
l If you have a DV or Digital 8 camcorder, connect
the i-link DV input socket (1) to the corresponding
output socket on the camcorder using the i-link
cable of your camcorder.
l If you have a Hi-8 or S-VHS(C) camcorder, connect
the S-video input socket to the corresponding
output socket on the camcorder, using the S-video
cable supplied (2) and connect the audio cable (4)
supplied.
l Otherwise connect the Video input socket (yellow)
to the corresponding output socket on the
camcorder using the video cable supplied (3) and
connect the audio Left (white) and Right (red) input
sockets to the corresponding sockets on the
camcorder using the audio cable supplied (4).
Camcorder connection
Connections - frontside of your
DVD recorder
Note:
Always check if the local mains voltage matches the required
220V - 240V.
When the recorder is in the Standby position, it is still
consuming some power.
If you wish to disconnect your DVD recorder completely from
the mains, withdraw the plug from the AC Outlet.
When the DVD recorder is disconnected from the mains, TV
channels and timer data will be stored typically 1 year.
l Make sure that all necessary connections are made
before connecting the DVD recorder to the power
supply.
l Plug the power cable supplied into the Power
connector on the rear of the recorder.
l Plug the mains plug into an AC outlet.
Power supply
TM
TM
TM
TM
TM
INSTALLATION 13
Easy Link
loading data from TV -
please wait
Follow TV
Notes:
Preferences have to be set in the order in which the item
menus will appear on the screen.
If the recorder is switched off while setting user preferences,
all preferences have to be set again after switching the
recorder on again.
The ‘virgin mode’ will only be concluded after the preferences
for the last item have been confirmed.
When preferences are taken over from your TV set, the
message ‘Easy Link loading data from TV - please
wait’ will appear.
Menus for which no preferences are available will be
displayed. They have to be set manually.
TM
When your TV set is equipped with EasyLink , Cinema
Link , NEXTVIEW Link , SmartLink , Q-Link or
MegaLogic , the TV settings will be taken over from the
TV set but they cannot be changed manually afterwards.
Automatic setting
If the ‘virgin mode screen’ does not appear, your DVD
recorder has been installed already. You may still change
the settings via the ‘installation menu’.
Depending on the kind of TV set, preferences will have
to be set manually or they will be taken over
automatically from the TV set.
In ‘virgin mode’ you may have to set your preferences
for some of the recorder features.
After switching on the DVD recorder for the very first
time the ‘virgin mode screen’ will appear.
First time set-up: virgin mode
3.
12 INSTALLATION
Note:
If the power is off or Low Power Standby is selected (see
User Preferences - features), the signal from EXT 2 will not
be passed on to the TV set on EXT 1.
1
TV
For installation of a decoder, see ‘User Preferences’ ‘Installation’.
- Satellite receiver or Set top box,
- VCR,
- DVD Video player
Most pre-recorded video cassettes and DVD discs are
copy protected. If you try to copy them the display
shows ‘COPY PROTECT’.
Use the top SCART connector (EXT 2) on your DVD
recorder to make connections to a:
Connecting to other equipment
Directions For Use DVDR1000 /0x1 /691
GB 9
English
GB 10
3.
DVDR1000 /0x1 /691
Directions For Use
English
MUTE
TUNER
P
PREVIOUS
REVERSE
STOP
TV/DVD
PAUSE
REC/OTR
SLOW
NEXT
FORWARD
PLAY
STANDBY
CLEAR
MUTE
TIMER
P
TUNER
SELECT
PREVIOUS
REVERSE
STOP
TV/DVD
PAUSE
REC/OTR
SLOW
NEXT
FORWARD
PLAY
STANDBY
l Press RECORD or REC/OTR again to obtain a
30-minute increment.
l Shortly after pressing REC/OTR, OTR can be
cancelled by pressing CLEAR.
10: 15 pm
l Insert a recordable DVD+RW disc.
l Use CHANNEL 3 or CHANNEL 4 (on the
recorder) or P+, P- or the digit keys 0-9 (on the
remote control) to select the programme number
(programme name) from which you wish to record.
l Press RECORD (on recorder) or REC/OTR (on
remote control) twice.
‰ A recording will be made of 30 minutes.
‰ The required end time of the recording is shown
in the timer box on screen. The remaining recording
time is shown in the status box on screen and on
the display.
T/C
a
Recording with automatic switch-off (OTR
One-Touch Recording)
T/C
a
3.
16 QUICK START
l Insert a recordable DVD+RW disc.
l Use CHANNEL 3 or CHANNEL 4 (on the
recorder) or P+, P- or the digit keys 0-9 (on the
remote control) to select the programme number
(programme name) from which you wish to record.
When a TV channel transmits a channel name, it will be
shown on the display and on screen.
l Press RECORD (on recorder) or REC/OTR
(on remote control).
‰ RECORD is shown on the display.
l Press 9 STOP to stop recording.
‰ MENU UPDATE is shown on the display.
Recording
Normally, the DVD recorder displays the contents of
the disc on screen. Use the TUNER key in order to
switch to the internal tuner, or whichever other source
is selected, if you want to check the input before starting
a recording. Press TUNER again to go back to disc
mode.
Checking input
Manual recording
The virgin mode will only occur after the very first start
up of the recorder. In virgin mode you may have to set
your personal preferences for some of the recorder’s
most relevant items. See virgin mode in the previous
chapter.
STANDBY/ON
l Switch on the TV set and select the programme
number that you have chosen for video playback
(see operating manual for your TV set).
l Press B STANDBY/ON.
‰ The recorder display lights up, and the ‘virgin
mode screen’ appears.
Switching on
Recording and playback are the basic functions of your
DVD recorder. In this chapter the elementary
operations for recording or playing a disc are presented
separately for quick reference purposes.
Detailed information on different modes, settings and
features can be found in the chapter ‘Operation’.
Quick start
Directions For Use DVDR1000 /0x1 /691
GB 11
GB 12
3.
DVDR1000 /0x1 /691
Directions For Use
Directions For Use DVDR1000 /0x1 /691
3.
GB 13
GB 14
3.
DVDR1000 /0x1 /691
Directions For Use
English
AUDIO
Y
SUBTITLE
Z
REPEAT
ANGLE
REPEAT
ZOOM
a
DIM
Repeat All
Scan
The system menu bar contains a ‘Temporary Feedback
Field’ with information concerning prohibited actions,
playback modes, available angles, etc.
Temporary Feedback Field
Zoom
Angle
Time search
Slow motion
Chapter/Index
Fast motion
Picture by Picture
Title/Track
Subtitle language
Sound
User preference
Audio language
PART 2
PART 1
Menu bar icons
A number of recorder functions can be controlled via
the system menu bar. You can navigate between the two
parts of the system menu bar with the t (left cursor)
and the u (right cursor) key.
SCAN
TUNER
T/C
The System menu bar can be called up by pressing any of
the following keys on the remote control: SYSTEM
MENU, T/C, ANGLE }, SUBTITLE Z, AUDIO Y
and ZOOM a.
System menu bar
On-screen display information
l You can navigate between the various items of the
user preferences menu with the v (up cursor) and
the w (down cursor) key. To select an item press u
(right cursor) key.
Installation
Record settings
Remote control settings
Feature settings
Language settings
Sound settings
Picture settings
User preference menu icons
The following functions can be operated via the user
preference menu.
l Press SYSTEM MENU on the remote control.
l Select
in the system menu bar and press w
(down cursor).
‰ The user preferences menu appears.
l Use the t u v w (left right up down cursor) keys
to toggle through the menus, sub menus and
submenu options.
‰ When a menu item is selected, the cursor keys
(on the remote control) to operate the item are
displayed next to the item.
l Press OK to confirm and return to the main menu.
User preference menu operation
Action prohibited
Resume
Child Safe
Child Lock On
Angle
Repeat A-B
Repeat A to end
Repeat Chapter
Repeat Track
Repeat Title
---
---
off
off
on
on
off
off
disc error
no disc
Video-CD
DVD-Video
DVD+RW
Disc type icons
OPERATION 25
The status box displays the current status of the
recorder and the disc type loaded.
Status box
l By pressing SYSTEM MENU the system menu bar
will disappear from the screen.
--
--
3.
24 OPERATION
DVD-Audio
DVD-RAM
The following disc types cannot be used at
all, neither for recording nor for playback:
ReWritable
CD-RW
Plays if it contains Audio CD.
Recordable
CD-R
Plays if it contains Audio CD.
(Super) Video CD
Depending on the material on the disc (a movie, video
clips, a drama series, etc.) these discs may have one or
more tracks, and tracks may have one or more indexes,
as indicated on the disc case. To make access easy and
convenient, your recorder lets you move between
tracks, and between indexes.
Super Audio CD
Of hybrid SACD discs, the CD layer can be played.
CD Digital Audio
You can play digital audio CDs in conventional style
through a stereo system, using the keys on the remote
control and/or front panel, or via the TV set using the
on-screen display (OSD).
Directions For Use DVDR1000 /0x1 /691
GB 15
English
GB 16
3.
DVDR1000 /0x1 /691
Directions For Use
Directions For Use DVDR1000 /0x1 /691
3.
GB 17
English
30 OPERATION
180 minutes
better than
S-VHS picture quality
LP
(Long Play)
240 minutes
To exit press
SYSTEM MENU
SP
Off
Off
On
Stndrd
Direct record
With the Direct Record function switched On and the
DVD recorder switched to standby, the channel number
selected on your television will be automatically taken
over by the DVD recorder, at the moment it starts
recording. This only applies for televisions connected via
SCART, Easy Link and NEXTVIEW Link. Factory setting is
Off.
l In the record settings menu, select ‘Direct record’.
l Select On. If you select Off, the function will be
switched off.
l Confirm with OK.
l To end, press SYSTEM MENU.
l Alter the recording mode with t or u (left right
cursor).
l Confirm with the OK key.
l To end, press SYSTEM MENU.
Record mode
Direct record
Sat record
Auto chapters
LP/EP rec mode
Record settings
For playback, the correct recording mode will
automatically be selected. Depending on the selected
mode the available recording time on a disc varies.
l In the record settings menu, select ‘Record mode’.
EP
better than
(Extended Play) VHS picture quality
120 minutes
pre-recorded
DVD quality
SP
(Standard Play)
60 minutes
best possible
picture quality
HQ
(High Quality)
Total recording
time
Picture quality
Mode
DVDR1000 /0x1 /691
Remote control used
If you want to use the remote control of a Philips DVD
player instead of the standard DVD recorder remote
control, select ‘DVD player’. Factory setting is ‘DVD
recorder’.
Key sound
The recorder makes a ‘beep’ sound upon every key
command given via recorder or remote control keys.
Select ‘Off’ to disable this sound. Factory setting is ‘On’.
Remote Control settings
Record Settings
Record mode
By selecting a recording mode you define picture quality
of recordings and maximum recording time for a disc.
3.
PBC
This feature allows you to disable or enable the PBC
(Playback Control) menu of VCD discs. See under
‘Special VCD features’: Factory settings is ‘On’.
When Autoresume is set to ‘Off’, the recorder will
start playing from the beginning of a disc. In this case you
can still resume when
appears on screen by
pressing 2 PLAY. Factory setting is ‘On’.
GB 18
Directions For Use
Directions For Use DVDR1000 /0x1 /691
3.
GB 19
MUTE
TIMER
P
TUNER
SELECT
PREVIOUS
REVERSE
STOP
TV/DVD
PAUSE
REC/OTR
SLOW
NEXT
FORWARD
PLAY
STANDBY
The DVD recorder stores all the information mentioned
above in a timer block. You can programme up to six
timer blocks, one month in advance.
The DVD recorder needs the following information for
every programmed recording:
- the date on which the recording is to be made;
- the channel;
- the start and stop time of the recording;
- VPS/PDC on or off;
- the recording mode (HQ, SP, LP or EP).
Timer programming
l Press RECORD or REC/OTR again to obtain a
30 minute increment.
l Shortly after pressing REC/OTR, OTR can be
cancelled by pressing CLEAR.
TIMER
SELECT
l Press u (right cursor).
To exit Press TIMER
ShowView programming
Timer programming
Timer list
Timer
RECORDING 35
A ShowView programming number is a number of up to
nine digits, printed in most TV guides next to the start
time of a TV programme.
All the information required for a programming is
contained encoded in the ShowView programming
number.
l Press TIMER on the remote control.
l Select ‘ShowView programming’ with v (up
cursor) or w (down cursor).
CLEAR
Timer programming with ’ShowView’
When all Timer blocks are full, the options timer
programming and ShowView programming cannot be
accessed. For clearing a timer block, see ‘How to clear a
timer block’.
DVDR1000 /0x1 /691
10: 15 pm
l Insert a recordable DVD+RW disc.
l Use CHANNEL 3 or CHANNEL 4 (on the
recorder) or P+, P- or the digit keys 0-9 (on the
remote control) to select the programme number
(programme name) from which you wish to record.
l Press RECORD (on the recorder) or REC/OTR
(on the remote control) twice.
‰ A recording will be made of 30 minutes.
‰ The required end time of the recording is shown
in the timer box on screen. The remaining recording
time is shown in the status box on screen and on
the display.
T/C
CLEAR
What is ’VPS’/‘PDC’?
With ’VPS/PDC’, the TV station controls the
beginning and the length of the programmed
recording. This means that the video recorder
switches itself on and off at the right time even if a
TV programme you have programmed begins earlier
or finishes later than expected.
Usually the start time is the same as the VPS/PDC
time. If, however, in the TV guide, in addition to a TV
programmes start time, a different VPS/PDC time is
given, e.g.: ’20.15 (VPS 20.14)’, you must enter ’20.14’
as the start time exactly to the minute. If you want
to enter a time that differs from the VPS/PDC time,
you must switch off ’VPS/PDC’.
3.
a
Recording with automatic switch-off (OTR
One-Touch Recording)
English
GB 20
Directions For Use
English
To store
Press OK
11:35
End
To store
Press OK
VPS
PDC
SP
Rec
Mode
TIMER
SELECT
l Press u (right cursor).
l Enter the date with v (up cursor) or w (down
cursor), or with the digit keys 0-9.
To exit Press TIMER
ShowView programming
Timer programming
Timer list
Timer
l Press TIMER on the remote control.
l Select ‘Timer programming’ with v (up cursor) or
w (down cursor).
CLEAR
Timer programming without ‘ShowView’
l Confirm with OK.
‰ The data has been stored in a timer block.
l To end, press TIMER.
l Make sure that you inserted a recordable disc. If you
inserted a write-protected disc recording will be
refused.
l Switch off with B STANDBY/ON.
LP/SP
Press SELECT
NED 1
09
09:35
Prog. Start
ShowView programming
Timer
Date
3.
36 RECORDING
l
l
l
l
‰ The data will appear on the TV screen.
Use SELECT to select the programming key at
daily or weekly intervals. Mo-Fr: Recording at daily
intervals from Mondays to Fridays inclusive. Weekly:
Recording at weekly intervals on the same day of
the week.
Press u (right cursor).
Use SELECT to switch VPS/PDC on or off.
‰ When VPS/PDC is switched on, the start time is
marked with an asterisk.
Use SELECT to select the recording mode (HQ,
SP, LP, EP).
Please enter
programme number
Timer
ShowView programming
l Enter the entire ShowView programming number
(up to nine digits) printed in your TV guide next to
the start time of a TV programme. If you made a
mistake, you can correct it with CLEAR.
l Confirm with OK.
l If the ShowView system does not recognize the TV
channel, the message ‘Please enter programme
number’ will appear on screen. Select the required
programme number (programme name) with t u
(left right cursor) and confirm with OK.
Mo Fr Weekly
Press SELECT
ShowView programming
Timer
Directions For Use DVDR1000 /0x1 /691
GB 21
English
N E D 1 09: 35 P M
R T L 2 21: 00 P M
VRT
20: 30 A M
09
12
14
*
*
To exit
Press TIMER
38 RECORDING
l Select the timer block you want to check or alter
with w or v (down up cursor).
l Press u (right cursor).
l Select what you want to check or alter with t or u
(left right cursor).
l Alter data with w or v (down up cursor) or with
the digit keys 0-9.
l Confirm with OK.
l To end, press TIMER.
l Switch off by pressing B STANDBY/ON.
To change
Press
Rec
Mode
11: 35 S P 23: 00 S P 22: 00 S P
VPS PDC End
T o t a l r e c o r d t i m e : 05: 30
Prog. Start
Date
Timer list
Timer
l Press u (right cursor).
SELECT
Press TIMER on the remote control.
Select Timer list with w or v (down up cursor).
Press u (right cursor).
Select the timer block you want to clear with w or
v (down up cursor).
l Press CLEAR.
l Confirm with OK.
l Switch off by pressing TIMER.
l
l
l
l
TIMER
l The disc may invite you to select an item from a
menu. If the selections are numbered, press the
appropriate numerical key; if not, use the w v u t
(down up right left cursor) keys to highlight your
selection, and press OK.
Notes:
- Since it is usual for DVD movies to be released at different
times in different regions of the world, all players have region
codes and discs can have an optional region code. If you load
a disc of a different region code to your recorder, you will see
the region code notice on the screen. The disc will not play,
and should be unloaded.
- The region code is stated on a label on the
back side of your recorder.
- Regional coding is not applicable for
recordable DVD discs.
l Insert a pre-recorded DVD-Video disc.
‰ When ‘autoresume’ is set to ‘On’ (see ‘User
Preferences’) playback starts automatically from the
point where it was stopped, the last time the disc
was played.
‰ When ‘autoresume’ is set to ‘Off’, the disc will
play from the start of the disc. You can however
resume play from the point at which you stopped,
the last time the disc was played, by pressing
2 PLAY when
appears on screen.
‰ The currently playing title and chapter number
are displayed on the recorder display. The elapsed
time is shown also.
Some DVD discs are produced in a way that requires
specific operation or allows only limited operation
during playback. In these cases the recorder may not
respond to all operating commands. When this occurs,
please refer to the instructions in the disc inlay. When a
appears on the TV screen, the operation is not
permitted by the recorder or the disc.
Playing a pre-recorded DVDVideo disc
EDIT
REC/OTR
PAUSE
SLOW
PLAY
NEXT
FORWARD
PLAYBACK 39
l Insert a (Super) Video CD.
‰ When ‘autoresume’ is set to ‘On’ (see ‘User
Preferences’) playback starts automatically from the
point where it was stopped, the last time the disc
was played.
‰ The disc may invite you to select an item from a
menu. If the selections are numbered, press the
appropriate numerical key 0-9.
l To stop play at any time, press 9 STOP.
‰ The default screen will appear.
Playing a (Super) Video CD disc
PREVIOUS
REVERSE
STOP
l To stop play at any time, press 9 STOP.
‰ The default screen will appear, giving information
about the current status of the recorder.
Note:
During playback you can display and enter the menu by
pressing DISC MENU.
DVDR1000 /0x1 /691
To exit Press TIMER
ShowView programming
Timer programming
Timer list
CLEAR
How to clear a timer block
3.
Timer
l Press TIMER on the remote control.
l Select ‘Timer list’ with w or v (down up cursor).
How to check or alter a timer block
Playback
GB 22
Directions For Use
English
English
Y
Z
REPEAT
REPEAT
a
DIM
STOP
PREVIOUS
REVERSE
PAUSE
EDIT
/
SLOW
PLAY
NEXT
FORWARD
INDEX 2
TRACK 1
CHAPTER 2
INDEX 3
VIDEO CD
CHAPTER 3
DVD VIDEO
CHAPTER 2
INDEX 1
INDEX 2
TRACK 2
CHAPTER 1
TITLE 2
Note:
- If the number has more than one digit, press the keys in
rapid succession.
- If the system menu bar is on screen, make sure the
icon
is selected.
When a title on a disc has more than one chapter or a
track has more than one index, you can move to
another chapter/index as follows:
l Press K NEXT during play to select the next
chapter/index.
l Press J PREVIOUS during play to return to the
beginning of the current chapter/index. Rapidly press
J PREVIOUS twice to step back to the previous
chapter/index.
l To go directly to any chapter or index, enter the
chapter or index number using the numerical keys
0-9.
Moving to another chapter/index
INDEX 1
CHAPTER 1
TITLE
1
Note:
- If the number has more than one digit, press the keys in
rapid succession.
- If the system menu bar is on screen, make sure the
icon
is selected.
l Press T/C.
l Press K NEXT during play to step forward to the
next title.
l Press J PREVIOUS during play to return to the
beginning of the current title. Rapidly press
J PREVIOUS twice to step back to the previous
title.
l To go directly to any title or track, enter the title
number using the numerical keys 0-9.
PAUSE
EDIT
REC/OTR
SLOW
NEXT
FORWARD
PLAY
EDIT
0 1/8 1/4 1/2 1
PAUSE
EDIT
REC/OTR
SLOW
NEXT
FORWARD
PLAY
EDIT
l Use t u (left right cursor) keys to select previous
or next picture.
l Press 2 PLAY to exit picture by picture mode.
l Press v (up cursor) to exit the picture by picture
menu.
You can also step forward by using the ; PAUSE
repeatedly on the remote control.
l Select
(picture by picture) in the system menu
bar.
l Use the w (down cursor) key to enter the picture
by picture menu.
‰ The recorder will now go into pause mode.
PREVIOUS
REVERSE
STOP
Still Picture and Step Frame
l Use the t u (left right cursor) keys to select the
required speed: -1, -1/2, -1/4 or -1/8 (backward);
1/8, 1/4, 1/2 or 1 (forward).
l Select 1 to play at normal speed again.
l If ; PAUSE is pressed, the speed will be set to 0.
l Press 2 PLAY to exit slow motion mode.
l Press v (up cursor) to delete the slow motion menu.
You can also select Slow motion speeds by using the
H SLOW key on the remote control.
- 1 - 1 /2 - 1 / 4 - 1 / 8
l Select (Slow motion) in the system menu bar.
l Use the w (down cursor) key to enter the slow
motion menu.
‰ The recorder will now go into pause mode.
PREVIOUS
REVERSE
STOP
Slow Motion
EDIT
REC/OTR
PAUSE
SLOW
PLAY
NEXT
FORWARD
PREVIOUS
EDIT
NEXT
1
4 8 32
DIM
a
ZOOM
ANGLE
REPEAT
REPEAT
Z
SUBTITLE
SCAN
Y
AUDIO
PLAYBACK 41
‰
appears on screen.
l To exit repeat mode, press REPEAT a third time.
‰
appears on screen.
l To repeat the entire disc, press REPEAT a second
time.
Video CDs - Repeat track/disc
l To repeat the currently playing track, press REPEAT.
‰
appears on screen.
l To exit repeat mode, press REPEAT a fourth time.
‰
appears on screen.
l To repeat the entire disc, press REPEAT a third time.
‰
appears on screen.
l To repeat the currently playing title, press REPEAT
a second time.
DVD Discs - Repeat chapter/title/disc
l To repeat the currently playing chapter, press
REPEAT.
Repeat
l Use the t u (left right cursor) keys to select the
required speed: -32, -8 or -4 (backward); 4, 8,
32 (forward).
l Select 1 to play at normal speed again.
l Press 2 PLAY to exit fast motion mode.
l Press v (up cursor) to delete the fast motion menu.
To search forward or backward through different speeds,
you can also press 5 REVERSE or 6 FORWARD
again.
-32 -8 -4
l Select
(Fast motion) in the system menu bar.
l Use the w (down cursor) keys to enter the fast
motion menu.
PREVIOUS
REVERSE
STOP
Search
3.
40 PLAYBACK
AUDIO
SUBTITLE
ANGLE
ZOOM
SCAN
TUNER
T/C
When a disc has more than one title or track, you can
move to another title as follows:
Moving to another title/track
Note: Unless stated otherwise, all operations described are
based on remote control operation. A number of operations
can also be carried out via the system menu bar on the
screen. (see ‘System menu bar operation’)
General features
l Insert a DVD+RW disc.
‰ If the inserted disc is write-protected, playback
starts automatically otherwise the Index Picture
Screen appears.
l Press ) PLAY.
‰ Playback starts automatically from the point
where it was stopped the last time the disc was
played or recorded. If you want to start playback
from the beginning of the disc, you can do so via the
Index Picture Screen (see ‘Index Picture Screen’).
‰ If the disc is a new blank disc, the display will
show ‘EMPTY DISC’.
l With J PREVIOUS and K NEXT you can go to
the previous or next title.
l To stop playback at any time, press 9 STOP.
‰ You return to the Index Picture Screen.
Playing a DVD+RW disc
Directions For Use DVDR1000 /0x1 /691
GB 23
English
English
Y
SCAN
Z
REPEAT
a
DIM
REPEAT
AUDIO
SUBTITLE
ANGLE
ZOOM
Y
Z
REPEAT
a
DIM
42 PLAYBACK
l Use the digit keys 0-9 to enter the required start
time. Enter hours, minutes and seconds in the box.
‰ Each time an item has been entered, the next
item will be highlighted.
l Press OK to confirm the start time.
‰ The time entry box will disappear and play starts
from the selected time position.
The Time Search function allows you to start playing at
any chosen time stamp.
l Select
(Time Search) in the system menu bar.
l Press w (down cursor).
‰ The recorder will now go into pause mode.
‰ A time entry box appears on the screen showing
the elapsed playing time of the current disc.
Time search
Plays the first 10 seconds of each chapter/index on the
disc.
l Press SCAN.
l To continue play at your chosen chapter/index,
press SCAN again or press 2 PLAY.
SCAN
AUDIO
SUBTITLE
ANGLE
REPEAT
ZOOM
CLEAR
TIMER
SELECT
‰ The picture will change accordingly.
l Press OK to confirm the selection.
‰ The panning icons appear on the screen: w v u
t (down up right left cursor) and OK.
l Use the w v u t (down up right left cursor) keys
to pan all over the screen.
l When OK is pressed only the zoomed picture will
be shown on the screen.
l If you wish to zoom at any moment, press a Zoom
and select the required zoom factor as described
above.
l Press 2 PLAY to exit zoom mode.
press OK to pan
The Zoom function allows you to enlarge the video
image and to pan through the enlarged image.
l Select a Zoom in the system menu bar.
l Press w v (down up cursor) to activate the Zoom
function and select the required zoom factor; 1.33
or 2 or 4.
‰ The recorder will go into pause mode.
‰ The selected zoom factor appears below the
Zoom icon in the system menu bar and ‘Press OK
to pan’ appears below the system menu bar.
DVDR1000 /0x1 /691
Scan
‰
repeat appears on screen, and the repeat
sequence begins.
l To exit the sequence, press REPEAT A-B.
‰
appears on screen.
l Press REPEAT A-B again at your chosen end
point;
Y
SCAN
Z
REPEAT
a
DIM
REPEAT
A/CH
AUDIO
SUBTITLE
ANGLE
T/C
ZOOM
Zoom
3.
To repeat or loop a sequence in a title:
l Press REPEAT A-B at your chosen starting point;
Repeat A-B
GB 24
Directions For Use
English
REVERSE
PAUSE
EDIT
SLOW
NEXT
FORWARD
1
track<
time<
2 78
14
total tracks<
total time
1 12 78
REVERSE
STOP
PAUSE
REC/OTR
SLOW
PLAY
FORWARD
PAUSE
EDIT
SLOW
NEXT
FORWARD
1
2
3
4
5
6
7
8
TRACKS
AUDIO CD
9 10 11 12 ...
l Press K NEXT during play to step forward to the
next track.
l Press J PREVIOUS during play to return to the
beginning of the current track. Rapidly press
J PREVIOUS twice to step back to the previous
track.
l To go directly to any track, enter the track number
using the numerical keys 0-9.
PREVIOUS
REVERSE
Moving to another track
l To search forwards or backwards through the disc
at 4x normal speed, press 5 REVERSE or 6
FORWARD.
‰ Search begins.
l To step up to 8x normal speed, press 5 REVERSE
or 6 FORWARD again.
‰ Search goes to 8x speed, and the sound is muted.
l To return to 4x normal speed, press 5 REVERSE
or 6 FORWARD again.
l If the TV set is on, search speed and direction are
indicated on the screen each time 5 REVERSE or
6 FORWARD is pressed.
l To end the search, press 2 PLAYor 9 STOP as
desired.
Search
ANGLE
SCAN
Y
AUDIO
Y
Z
REPEAT
a
DIM
SCAN
AUDIO
SUBTITLE
ANGLE
REPEAT
ZOOM
DIM
a
ZOOM
ANGLE
REPEAT
REPEAT
Z
SUBTITLE
SCAN
Y
AUDIO
Plays the first 10 seconds of each track on the disc.
l Press SCAN.
l To continue play at your chosen track, press SCAN
again or press 2 PLAY.
Scan
To repeat or loop a sequence:
l Press REPEAT A-B at your chosen starting point;
‰ Repeat A appears on screen.
l Press REPEAT A-B again at your chosen end
point;
‰ Repeat A-B appears on the display, and the
repeat sequence begins.
l To exit the sequence, press REPEAT A-B again.
Repeat A-B
l To repeat the currently playing track, press
REPEAT.
‰ Repeat track appears on screen.
l To repeat the entire disc, press REPEAT a second
time.
‰ Repeat disc appears on screen.
l To exit repeat mode, press REPEAT a third time.
Z
SUBTITLE
REPEAT
REPEAT
a
DIM
ZOOM
Repeat track/disc
PLAYBACK 45
3.
44 PLAYBACK
l To stop play at any time, press 9 STOP.
‰ The number of tracks and the total playing time
will be shown on the screen and the recorder
display.
play<<
repeat track
Audio disc mode
l Insert the disc.
‰ After loading the disc, playback starts
automatically.
‰ If the TV set is on, the Audio CD screen appears.
‰ During play, the current track number and its
elapsed playing time will be shown on the screen
and the recorder display.
Playing an audio CD
l Make sure PBC is switched On. See ‘User
Preferences-features settings’.
l Load a (Super) Video CD with PBC and press
2 PLAY.
‰ The PBC menu appears on screen.
l Go through the menu with the keys indicated on the
TV screen until your chosen passage starts to play.
If a PBC menu consists of a list of titles, you can
select a title directly.
l Enter your choice with the numerical keys 0-9.
l Press RETURN to go back to the previous menu.
PREVIOUS
PLAY
Playback Control (PBC)
REC/OTR
l Press ; PAUSE during play.
l To return to play, press 2 PLAY.
STOP
Pause
Special VCD features
Directions For Use DVDR1000 /0x1 /691
GB 25
English
English
EDIT
SLOW
NEXT
FORWARD
PLAY
EDIT
Change code
Features
off
46 ACCESS CONTROL
Note: Reconfirmation of the 4-digit PIN code is necessary
when: The code is entered for the very first time (see above);
The code is changed (see ‘Changing the 4-digit code’);
The code is cancelled (see ‘Changing the 4-digit code’);
Both Child Lock and Parental Control are switched Off and
the code is requested.
l Select Ç using w v (down up cursor).
l Press OK or t (left cursor) to confirm and press
SYSTEM MENU to exit the menu.
‰ Now unauthorized discs will not be played unless
the 4-digit code is entered.
l Select É to deactivate the Child Lock.
PBC
Low power standby
Change country
Autoresume
on
Status box
Child lock
off
Parental
level
---
Access control
--
l Select Access control in the features menu
using w v (down up cursor) and press u (right
cursor).
l Enter a 4-digit PIN code of your own choice using
the digit keys 0-9.
l Enter the code a second time.
l Move to Child lock using w v (down up cursor).
l Move to Ç / É using the u (right cursor) key.
PAUSE
REC/OTR
Access Control
l Insert the disc.
‰ Playback starts automatically.
l Press 9 STOP while { is visible.
‰ | will appear and the disc is now banned i.e. it is
not Child safe any longer.
Securing discs
the child-safe list
Choose 'Play always' to insert the disc in Play always
Play once
locked
Note: Double sided DVD discs may have a different ID for
each side. In order to make the disc ‘Child safe’, each side
has to be authorized.
Multi volume VCD disc may have a different ID for each
volume. In order to make the complete set ‘Child safe’, each
volume has to be authorized.
EDIT
REC/OTR
PAUSE
SLOW
PLAY
NEXT
FORWARD
EDIT
---
off
Enter code
on
Features
off
off
Change code
PBC
Low power standby
Change country
Autoresume
on
Parental
level
Child lock
Status box
---
Access control
--
-Features
off
l Enter your 4-digit PIN code using the digit keys 0-9.
If necessary enter the code a second time.
l Move to Parental level using w v (down up cursor).
l Move to the Value Adjustment bar using u (right
cursor).
PBC
Low power standby
Autoresume
Status box
Access control
--
l Select Access control in the features menu
using w v (down up cursor) and press u (right
cursor).
PREVIOUS
REVERSE
STOP
Activating/Deactivating Parental Control
Movies on pre-recorded DVD discs may contain scenes
not suitable for children. Therefore discs may contain
‘Parental Control’ information which applies to the
complete disc or to certain scenes on the disc.
These scenes are rated from 1 to 8 and alternative, more
suitable scenes are available on the disc. Ratings are
country dependent. The ‘Parental Control’ feature allows
you to prevent discs from being played by your children
or to have certain discs played with alternative scenes.
Parental Level (DVD-Video only)
ACCESS CONTROL 47
Note: If you forgot your code, press 9 STOP four times
while in the access control PIN code box and exit with OK.
Access control is now switched off. You can then enter a new
code as described above.
l Select Access control in the features menu
using w v (down up cursor) and press u (right
cursor).
l Enter the old code.
l Move to Change code using w (down cursor).
l Press u (right cursor).
l Enter the new 4-digit PIN code.
l Enter the code a second time and reconfirm with
OK.
l Press SYSTEM MENU to exit the menu.
Changing the 4-digit code
l Select Access control in the features menu
using w v (down up cursor) and press u (right
cursor).
l Enter the four digit PIN code.
l Move to Change country using w (down cursor).
l Press u (right cursor).
l Select a country using w v (down up cursor).
l Press OK or t (left cursor) to confirm and press
SYSTEM MENU to exit the menu.
Country
l Use the w v (down up cursor) keys or the
numerical keys 0-9 on the remote control to select
a rating from 1 to 8 for the disc inserted.
Rating 0 (displayed as ‘– –’):
Parental Control is not activated. The disc will be played
in full.
Ratings 1 to 8 (1 = childsafe - 8 = adults only):
The disc contains scenes not suitable for children. If you
set a rating for the recorder, all scenes with the same
rating or lower will be played. Higher rated scenes will
not be played unless an alternative is available on the
disc. The alternative must have the same rating or a
lower one. If no suitable alternative is found, play will
stop and the 4-digit code has to be entered.
l Press OK or t (left cursor) to confirm and press
SYSTEM MENU to exit the menu.
DVDR1000 /0x1 /691
PREVIOUS
REVERSE
STOP
l Insert the disc.
‰ The ‘Child protect’ dialog will appear. You will be
asked to enter your secret code for ‘Play once’ or
‘Play always.’ If you select ‘Play once’, the disc
can be played as long as it is in the recorder and the
recorder is in the On position. If you select ‘Play
always’, the disc will become Child safe
(authorized) and can always be played even if the
Child lock is set to On.
Authorizing discs when Child Lock is
activated
3.
Activating/deactivating the child lock
When activating Child lock, only discs that are authorised
can be played without PIN code.
The recorder memory maintains a list of 50 authorized
(‘Child safe’) disc titles. A disc will be placed in the list
when ‘Play Always’ is selected in the ‘Child protect’ dialog.
Each time a ‘Child safe’ disc is played it will be placed on
top of the list. When the list is full and a new disc is
added, the least recently used disc will be removed from
the list.
Child Lock (DVD and VCD)
Access control
GB 26
Directions For Use
English
Directions For Use DVDR1000 /0x1 /691
3.
GB 27
English
50 MANAGING DISC CONTENT
l Press OK on the remote control to confirm.
‰ The messages ‘This will take ...’ and ‘Press OK
to confirm’ will appear to indicate how long the
action will take.
l Press OK on the remote control to confirm.
‰ ‘Processing...’ and a progress bar are shown
until the action is completed.
Make edits DVD compatible
Press OK
Unprotected
Protection
Erase disc
Summer holiday
Disc name
Settings for Summer holiday
PAUSE
EDIT
REC/OTR
SLOW
NEXT
FORWARD
PLAY
Hidden
Current chapter
Divide title
Use picture as index
Delete all chapter markers
Delete chapter marker
Press OK
Favourite scene selection
Insert chapter marker
1
l Use w or v (down up cursor) to toggle through the
menu’s functions:
play
1
l Press the EDIT key on the remote control.
‰ The video image is overlayed with a transparant
edit menu. Title and chapter information appear in
an information box at the top of the screen.
PREVIOUS
REVERSE
STOP
Edit in playback mode
Each title consists of chapters. With the FSS menu any
chapter can be made hidden or made visible again.
Normally, during recording, chapter markers are inserted
automatically every five to six minutes (this setting can be
changed in the record settings menu). After the recording
is finished, you can manually add and remove chapter
markers via the FSS menu. Both automatically generated
and manually inserted chapter markers can be removed.
Hidden
Divide title
Use picture as index
Delete all chapter markers
Delete chapter marker
Favourite scene selection
Current chapter
2
Insert chapter marker
1
After editing, the modified version of a title is the default
playback version. The original can be accessed via the
‘Play full title’ option in the title settings menu. Other
DVD players may still play the original. To guarantee
that the edited version will play on these DVD players,
choose ‘Make edits DVD-compatible’ in the disc
settings menu.
Use picture as index
To define the current video frame as a miniature picture
to be used for this title’s entry in the Index Picture
Screen.
l You can use ; PAUSE and/or x SLOW to
accurately choose the desired picture.
l Press OK on the remote control to confirm.
‰ ‘Updating menu’.
Delete all markers in title
To delete all chapter markers (manually and
automatically generated) for this title.
l Press OK on the remote control to confirm.
‰ ‘Deleting markers’ will appear.
Delete chapter marker
To delete the chapter marker at the beginning of the
current chapter.
l Press OK on the remote control to confirm.
‰ ‘Deleting markers’ will appear.
l Select Visible or Hidden with the u (right cursor)
keys.
l Press OK on the remote control to confirm.
play
Hide chapters
Initially all chapters are visible. You can hide chapters or
make them visible again on playback. In edit mode
however hidden chapters are displayed in a dimmed mode.
PAUSE
EDIT
REC/OTR
SLOW
NEXT
FORWARD
PLAY
EDIT
Divide title
Use picture as index
Press OK
Hidden
Delete chapter marker
Delete all chapter markers
Favourite scene selection
Current chapter
2
Insert chapter marker
1
MANAGING DISC CONTENT 51
If you want to divide one title into more than two titles,
use the above procedure several times.
The Index Picture Screen will show two titles instead of
one. Both will have the same name. If you want to
change the name, you can do so in the title settings
menu. For one of the two resulting titles, a new index
picture is created.
l Press OK on the remote control to confirm.
‰ ‘Dividing title...’ is shown until the action is
completed. This divide operation cannot be undone.
play
l On the Index Picture Screen, select the title you
want to divide.
l Press 2 PLAY.
l Go to the point where you want to divide the title
and press ; PAUSE.
l Press EDIT.
‰ The Favourite Scene Selection menu is shown.
l Select ‘Divide title’.
PREVIOUS
REVERSE
STOP
Divide a title
If you want to divide one title into two seperate titles,
do the following:
DVDR1000 /0x1 /691
l If the Disc Settings menu shows the option ‘Make
edits DVD-compatible’, select this option. If the
menu does not show this option, then your disc is
already compatible, and no conversion is needed.
If one or more titles have been edited (see ‘Favourite
Scene Selection’), then the edits will play on your DVD
recorder, but a DVD player may show the original
versions instead of the edits. You can prepare your discs
so that also a DVD player will show the edited version.
Making your edits DVD-compatible
With the EDIT key on the remote control the
Favourite Scene Selection (FSS menu) for editing
functionality can be called up. The basic function of any
edit operations is to improve accessibility and handling of
your recordings. For instance: scenes you do not want
to see during playback (e.g. commercials during a movie)
can be marked as chapters and made hidden. During
playback you will see your recording without the hidden
chapters as one sequence.
l In the Disc Info Screen press u (right cursor).
‰ You will now enter the ‘disc settings’ menu.
l Select ‘Erase disc’ and press OK.
‰ The message ‘This will erase all titles’ is
displayed.
l Press OK to confirm or t (left cursor) to cancel.
‰ ‘Erasing disc’ is shown until the action is
completed.
‰ After the disc has been erased the Index Picture
Screen will show the free space on the disc.
Insert chapter marker
To insert a chapter marker on the current position of
the title that is playing.
l Press OK on the remote control to insert a marker.
The maximum number of chapter markers per title is 99.
Per disc the maximum number of chapter markers is 254.
When this maximum is reached the on-screen message
‘Too many chapters’ appears. You have to delete some,
before inserting new chapter markers.
3.
Note: In between the scenes the picture may freeze for a
short moment.
Favourite Scene Selection
Erasing a disc
English
GB 28
Directions For Use
English
REC/OTR
PAUSE
SLOW
PLAY
NEXT
FORWARD
T/C
Z
REPEAT
REPEAT
SUBTITLE
a
ANGLE
DIM
ZOOM
SCAN
Y
AUDIO
TUNER
EDIT
REC/OTR
PAUSE
SLOW
PLAY
NEXT
FORWARD
3.
52 MANAGING DISC CONTENT
PREVIOUS
REVERSE
STOP
l Press the EDIT key on the remote control during
recording.
‰ A chapter marker is inserted at the current
position. ‘Inserting marker’ appears in the status
box at the top of the screen. The maximum number
of chapter markers per title is 99. Per disc the
maximum number of chapter markers is 254. When
this maximum is reached the on-screen message
‘Too many chapters’ appears. You have to delete
some, before inserting new chapter markers.
Edit in record mode
Any remaining video material that is not overwritten,
which may include the last part of the original title, is
maintained. You can access these titles from the Index
Picture Screen.
The video recording will now be appended from this
point. Video material beyond this point is overwritten.
This may include titles following the current title.
If you want to append a video recording to an earlier
recorded title, do the following.
l On the Index Picture Screen, select the title to
which you want to add a video recording.
l Press 2 PLAY.
l At the point where you want to append the title
press ; PAUSE.
l To monitor the video input you may press TUNER.
l Press RECORD (on the recorder) or REC/OTR
(on the remote control).
PREVIOUS
REVERSE
STOP
Append recording
Directions For Use DVDR1000 /0x1 /691
GB 29
GB 30
3.
DVDR1000 /0x1 /691
Directions For Use
Directions For Use DVDR1000 /0x1 /691
3.
GB 31
English
CLEAR
MUTE
TIMER
SELECT
P
-
MUTE
P+
P0-9
B
TUNER
P
AOC . . . . . . . . . . . . . . 046, 057
Acura . . . . . . . . . . . . . . . . . 036
Admiral . . . . . . . . . . . . 120, 490
Adyson . . . . . . . . . . . . . . . . 244
Aiko . . . . . . . . . . . . . . . . . . 119
Akai . . . . . . . . . . . . . . . . . . 057
Akura . . . . . . . . . . . . . 245, 291
Alaron . . . . . . . . . . . . . 206, 243
Alba . . . 064, 036, 245, 063, 398
Allorgan . . . . . . . . . . . . . . . 321
America Action. . . . . . . . . . 207
Amplivision . . . . . . . . . . . . . 244
Amstrad. . . . 198, 398, 036, 064
Anam . . . . . . . . . . . . . 207, 036
Anitech . . . . . . . . . . . . . . . . 036
Arcam . . . . . . . . . . . . . 243, 244
Asuka . . . . . . . . . . . . . . . . . 245
Atlantic . . . . . . . . . . . . . . . . 233
Audiosonic . . . . . . . . . 064, 136
Audiovox. . . . . . . 119, 207, 478
Autovox . . . . . . . . . . . . . . . 233
BPL . . . . . . . . . . . . . . . . . . . 309
58 APPENDIX
PREVIOUS
REVERSE
STOP
TV/DVD
PAUSE
REC/OTR
SLOW
NEXT
FORWARD
PLAY
STANDBY
BSR . . . . . . . . . . . . . . . . . . . 321
BTC . . . . . . . . . . . . . . . . . . 245
Bang & Olufsen . . . . . . . . . . 592
Basic Line . . . . . . . . . . 036, 245
Baur. . . . . . . . . . . 064, 037, 581
Baysonic . . . . . . . . . . . . . . . 207
Beaumark . . . . . . . . . . . . . . 205
Beko . . . . . . . . . . . . . . . . . . 397
Belcor . . . . . . . . . . . . . . . . . 046
Bell & Howell . . . . . . . . . . . 181
Beon . . . . . . . . . . . . . . . . . . 064
Binatone . . . . . . . . . . . . . . . 244
Blaupunkt . . . . . . . . . . . . . . 581
Blue Sky . . . . . . . . . . . . . . . 245
Blue Star . . . . . . . . . . . . . . . 309
Boots . . . . . . . . . . . . . . . . . 244
Bradford . . . . . . . . . . . . . . . 207
Brandt. . . . . . . . . . . . . . . . . 136
Britannia . . . . . . . . . . . . . . . 243
Brockwood . . . . . . . . . . . . . 046
Broksonic . . . . . . . . . . 263, 490
Bush . . 064, 398, 245, 036, 063,
. . . . . . . . . . . . . . 309, 321, 401
CCE . . . . . . . . . . . . . . 064, 244
CS Electronics. . . . . . . . . . . 243
next TV programme number
previous TV programme number
choose TV channel
switch TV to standby
Remote control set-up codes
for television
T/C
a
PAUSE
REC/OTR
SLOW
NEXT
FORWARD
PLAY
STANDBY
a
CLEAR
MUTE
TIMER
SELECT
P
CXC . . . . . . . . . . . . . . . . . . 207
Candle. . . . . . . . . . . . . 057, 083
Carnivale. . . . . . . . . . . . . . . 057
Carrefour . . . . . . . . . . . . . . 063
Carver . . . . . . . . . . . . . . . . 081
Cascade . . . . . . . . . . . . . . . 036
Cathay . . . . . . . . . . . . . . . . 064
Celebrity. . . . . . . . . . . . . . . 027
Centurion . . . . . . . . . . . . . . 064
Cimline . . . . . . . . . . . . . . . . 036
Cineral . . . . . . . . . . . . 478, 119
Citizen . . . . 083, 057, 066, 087,
. . . . . . . . . . . . . . . . . . . . . . 119
Clarivox . . . . . . . . . . . . . . . 064
Clatronic. . . . . . . . . . . . . . . 397
Concerto . . . . . . . . . . . . . . 083
Condor . . . . . . . . . . . . 347, 397
Contec. . . . . 036, 063, 207, 243
Craig . . . . . . . . . . . . . . . . . . 207
Crosley . . . . . . . . . . . . . . . . 081
Crown . . . . 397, 036, 064, 066,
. . . . . . . . . . . . . . . . . . 207, 445
Crystal . . . . . . . . . . . . . . . . 458
Curtis Mathes . . . 087, 057, 066,
. . . . . . 074, 078, 081, 083, 120,
. . . . . . . . . . 172, 181, 193, 478
Cybertron. . . . . . . . . . . . . . 245
Daewoo . . . 119, 046, 401, 478,
. . . . . . . . . . . . . . 036, 064, 066
Dainichi. . . . . . . . . . . . . . . . 245
Dansai . . . . . . . . . . . . . . . . . 064
Dayton . . . . . . . . . . . . . . . . 036
Daytron . . . . . . . . . . . . . . . 046
Decca . . . . . . . . . . . . . 064, 099
Denon. . . . . . . . . . . . . . . . . 172
Dixi . . . . . . . . . . . . . . . 036, 064
Dual Tec . . . . . . . . . . . . . . . 244
Dumont. . . . . . . . 044, 046, 097
Electroband. . . . . . . . . . . . . 027
Elin . . . . . . . . . . . . . . . . . . . 064
Elite. . . . . . . . . . . . . . . 245, 347
Elta . . . . . . . . . . . . . . . . . . . 036
Emerson . . . 263, 207, 205, 206,
. . . . . . 490, 309, 066, 046, 181
Envision. . . . . . . . . . . . . . . . 057
Erres . . . . . . . . . . . . . . 039, 064
Expert . . . . . . . . . . . . . . . . . 233
Ferguson . . . . . . . . . . . 136, 064
Fidelity . . . . . . . . . . . . . . . . 243
Finlux . . 064, 132, 097, 099, 206
l Switch on your television set.
l Press and hold the RETURN and SELECT key
simultaneously for at least 3 seconds.
l Release both keys.
l Point the remote control to your TV set.
l Press and hold the B STANDBY key.
‰ Your TV set switches off when the right code is
found.
l When your TV set switches off, immediately release
the B STANDBY key.
‰ Your remote control is now re-programmed.
l This complete procedure may take up to 2 minutes.
PREVIOUS
REVERSE
STOP
TV/DVD
Alternative procedure:
DVDR1000 /0x1 /691
Some other keys normally operate the DVD recorder,
but will operate the TV set when you keep the button
on the side of the remote control pressed:
- E + increase TV volume
- E - decrease TV volume
- c
mute TV
a
If your TV set does not respond to the remote control,
you can re-programme your remote control. Below you
will find a list of all available remote control codes for
various TV brands. The following procedure reprogrammes your remote control:
l Look up the set-up code for your TV set in the
code list below.
l Press and hold the RETURN and SELECT key
simultaneously for at least 3 seconds.
l Release both keys.
l Enter, within 30 seconds, the correct three-digit
code with the digit keys 0-9.
l If the selected code does not work with your TV
set, or if the brand of your TV set is not in the list,
try out the codes one after the other.
3.
Your DVD recorder remote control can transmit
several commands to TV sets of different brands.
The following keys will always operate the TV set:
Using your DVD recorder
remote control with your TV set
Appendix
GB 32
Directions For Use
Display board 1004
⇒ Remove 6 screws 33 → 38
(board → front)
⇒ demount the board
⇒
demount the board
IR/STBY Board 1004
⇒ remove screw 30
(board → front)
remove screw 72
(flap motor assy → frame 181)
remove the feet (251 → 254)
and the bottomplate (231)
⇒ unlock the front from the
frame by releasing
successively 6 snaps
(1 on the left, 2 in the middle,
1 on the right and 2 in the
bottom of the frame. The
snaps in the bottom can be
released inside the set
via the holes in the bottom.
⇒
⇒
Front assy
⇒ open the tray and remove the
tray front 65
⇒ remove 4 screws 75 → 78
(front assy → frame 181)
⇒
demount the board
FRONT AV Board1004
⇒ remove screws 31+32
(board → front)
backplate)
release the snaps of 4 spacers
(board → frame)
⇒ demount the board
⇒
Analog board 1003
⇒ remove the connections
⇒ remove 1 screw(206)
(board → frame)
⇒ remove screws (cinches →
⇒
⇒
Remove the connections
Remove 4 screws 207 → 210
(Digital board → frame 181)
⇒ demount the board.
Digital board 1001
⇒
Remove 2 screws 217 and 218
(DVIO board → frame 181)
⇒ Release the snaps of 2 spacers
(DVIO board → Digital board)
⇒ demount carefully the board.
(board to board connection to
the Digital board)
DVIO board 1005
Progressive Scan board 1007
(Only for DVDR1000/171)
⇒ release snaps of 3 spacers
⇒ demount the board
rearside to remove
Cover 151
⇒ Remove 9 screws
171→174 at both sides
175→179 at the rearside
⇒ Lift the cover at the
↑
↓
demounting
mounting
DVDR LOADER 81
the tray front 65
Remove 4 screws
200 → 203 (loader 81→ frame 181)
Demount the DVDR loader
⇒
⇒
front jumps off from the loader.
demount the loader
Push the white pin of the slider at the bottom
side of the loader in the direction indicated by
the arrow. Open the unlocked tray.
⇒ Remove the connections to the loader
⇒ Remove 4 screws (192 → 194)
(air filter 191 → loader 81)
⇒ Remove screw 196
(air filter inlet 198 → frame 181)
⇒ Remove air filter assy
⇒ Remove 4 screws
200 → 203 (loader 81→ frame 181)
⇒ Lift the loader a the rear side. The tray
CL 16532095_061.eps
140801
⇒ Release the snaps of 2 spacers
183 and 184 (board → frame)
⇒ Demount the board
Switched Operating Power supply 1002
⇒ Remove the connections
⇒ Remove screws 204 → 205
(board → frame)
⇒ Remove screw 268
(mains inlet → backplate)
In case the loader is defective and cannot be
opened electrically, you can open the tray
after demounting the loader as follows:
Manually removal of tray front 65
⇒
⇒
⇒ Remove the connections
⇒ Remove 4 screws (192 → 194)
(air filter 191 → loader 81)
⇒ Remove screw 196
(air filter inlet 198 → frame 181)
⇒ Remove air filter assy
⇒ Open the tray and remove
4.1
FRONT DV Board 1006
⇒ Remove screw 17
(board → front)
⇒ demount the board
See exploded view for item numbers
DISMANTLING INSTRUCTIONS
Mechanical Instructions DVDR1000 /0x1 /691
4. Mechanical Instructions
Dismantling Instrutions
4.
GB 33
FRONT AV IN
IR/STBY
DISPLAY
I/O ANALOG
SOPS
CL 16532095_062.eps
140801
DVDR1000 /0x1 /691
FRONT DV IN
DIGITAL
4.
DVIO
DVDR LOADER
4.2
PROGRESSIVE
SCAN
/171 ONLY
GB 34
Mechanical Instructions
Exploded View
Mechanical Instructions DVDR1000 /0x1 /691
4.3
Service Hints
4.3.1
DVDR Module VAE8010/01
4.
GB 35
This module, item 81 in exploded view, must be exchanged
completely in case of failure. A new unit can be ordered with
codenumber 9305 025 81001.
4.3.2
Service Positions
Front
Figure 4-4
Digital Board
After demounting of DVIO board, the top side of the digital
board is in reach. To reach the bottom side of the digital
board, the DVDR module must be demounted together with
the digital board. Connected to each other, the assembly can
be set in a service position. In this position, the bottom side
of the digital board and the servo board are in reach to be
serviced.
Figure 4-1
DVIO Board
To put the DVIO board in a service position, an extender
board must be used. This extender board can be ordered
with codenumber 3104 128 07770.
Figure 4-5
Figure 4-2
Figure 4-6
Analog Board
To put the analog board in service position, demount the
assembly of analog board and backplate as follows:
1. Remove 3 screws from the backplate to the frame
2. Remove the screw from the backplate to the mains inlet
of the power supply
3. Remove the screw of the analog board to the frame
Figure 4-3
GB 36
4.
DVDR1000 /0x1 /691
Mechanical Instructions
4. Release the snaps of the 4 spacers of the analog board
to the frame.
Turn the assembly of the backplate and the analog board
against the loader.
Figure 4-7
Figure 4-8
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
5.
GB 37
5. Diagnostic Software and Faultfinding Trees
Due to the complexity of the DVD recorder, the time to find a
defect in the recorder can become long. To reduce this time,
the recorder has been equipped with Diagnostic and Service
software (DS). The DS offers functionality to diagnose the
DVDR hardware and tests the following:
• Interconnections between components
• Accessibility of components
• Functionality of the audio and video paths
This functionality can be accessed via several interfaces:
1. End user/Dealer script interface
2. Player script interface
3. Menu and command interface
5.1
End User/Dealer Script Interface
5.1.1
Description
The End user/Dealer script interface gives a diagnosis on a
stand alone DVD recorder; no other equipment is needed.
During this mode, a number of hardware tests (nuclei) are
automatically executed to check if the recorder is faulty. The
diagnosis is simply a "fail" or "pass" message. If the message
"FAIL" appears on the display, there is apparently a failure in
the recorder. If the message "PASS" appears, the nuclei in
this mode have been executed successfully. There can be
still a failure in the recorder because the nuclei in this mode
don't cover the complete functionality of the recorder.
5.1.2
17
AudioEncI2c
16
AudioEncAccess this nucleus tests the HIO8 interface lines between the host decoder and the audio encoder
15
AudioEncSramAccess
check of the access of the SRAM
by the audio encoder (address
and data lines)
14
AudioEncSramWrR
tests the SRAM connected to the
audio encoder
13
AudioEncInterrupt
tests the interrupt line between
the host decoder and the audio
encoder
12
VsmAccess
checks the data and address bus
and the interrupt register of the
VSM
11
VsmInterrupt
checks both interrupt lines between the VSM and the host decoder
10
VsmSdramWrR
tests the entire SDRAM of the
VSM
9
Clock11_289MHz switches the A_CLK of the micro
clock to 11.2896 MHz
8
Clock12_288MHz switches the A_CLK of the micro
clock to 12.288 MHz
7
BeS2Bengine
checks the S2B interface with the
Basic Engine by sending an echo
command
6
DisplayEcho
checks the interface between the
host processor and the slave
processor on the display board
5
AnalogueEcho
checks the interface between the
host processor and the microprocessor on the analogue board
4
AnalogueNvram
checks the NVRAM on the analogue board
3
AnalogueTuner
checks whether the tuner on the
analogue board is accessible
2
LoopAudioUserDealer
tests the components on the audio signal path
Host decoder
Analogue board
Audio encoder
VSM
1
LoopVideoUserDealer
tests the components on the video signal path
VIP
VSM
Host decoder
Contents
Unplug the power cord
Hold key <PLAY> pressed
while you plug the recorder
During the test, the following display
is shown: the counter counts down
from the number of nuclei to be run
before the test finishes. Example:
SET O.K.?
NO
YES
To exit DEALER SCRIPT, unplug the power cord
CL 16532095_068.eps
150801
Figure 5-1
checks the I2C connection between the host decoder and the
audio encoder
The End use/Dealer script executes all diagnostic nuclei that
do not need any user interaction and are meaningful on a
standalone DVD recorder. The nuclei called in the End user/
Dealer script are the following:
5.2
Player Script Interface
22
HostdSdramWrR check of all memory locations of
the 4MB SDRAMS
5.2.1
Description
21
HostdDramWrR
check of all the DRAMS
20
HostdI2cNvram
check of the data line and the
clock line of the I2C bus between
the host decoder and NVRAM
19
SAA711XI2c
checks the interface between the
host I2C controller and the Video
Input Processor SAA7118
18
VideoEncI2c
checks the interface between the
host I2C controller and the Video
Encoder SAA6750
The Player script will give the opportunity to perform a test
that will determine which of the DVD recorder's modules are
faulty, to read the error log and to perform an endurance loop
test. To successfully perform the tests, the DVD recorder
must be connected to a TV set.
To be able to check results of certain nuclei, the player script
expects some interaction of the user (i.e. to approve a test
picture or a test sound). Some nuclei (e.g. nuclei that test
functionality of the DVDR module) require that a DVD+RW
disc is inserted.
Only tests within the scope of the diagnostic software will be
executed hence only faults within this scope can be detected.
GB 38
5.2.2
5.
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
Structure of the Player Script
The player script consists of a set of nuclei testing the
hardware modules in the DVD recorder: the Display PWB,
the Digital PWB, the Analogue In/Out PWB and the DVDR
module.
Nuclei run by the player test need some user interaction; in
the next table this interaction is described. The player test is
done in two phases:
STEP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
•
•
Interactive tests: this part of the player test depends
strongly on user interaction and input to determine
nucleus results and to progress through the full test.
Reading the error log information can be useful to
determine any errors that occurred recently during
normal operation of the DVD player.
The loop test will perform the same nuclei as the dealer
test, but it will loop through the list of nuclei indefinitely.
DESCRIPTION
Press OPEN/CLOSE and STOP at the same time and POWER ON the recorder to start the
playerscript
The local display shows FPSEGMENTS. Press PLAY to start the test.
First the starburst pattern is lit, then the horizontal segments are lit, followed by the vertical
segments and the last test is light all segments test. After each of the 4 tests the user has to
confirm that the correct pattern was lit.
Press PLAY to confirm that the correct pattern was lit (four times if the FPSEGMENTS test
was successful).
Press RECORD to indicate that the correct pattern was not successfully lit.
Press STOP to skip this nucleus.
The local display shows FPLABELS. Press PLAY to start the test.
Press PLAY to confirm that all labels are lit.
Press RECORD to indicate that not all labels are lit.
Press STOP to skip this nucleus.
The local display shows FPLIGHT ALL. Press PLAY to start the test.
Press PLAY to confirm that everything was lit.
Press RECORD to indicate that not all patterns are lit.
Press STOP to skip this nucleus.
The local display shows FPLED. Press PLAY to start the test.
Press PLAY to confirm that the led is lit.
Press RECORD to indicate that the led is not lit.
Press STOP to skip this nucleus.
The local display shows FPFLAP OPEN. Press PLAY to start the test.
Press PLAY to confirm that the flap has opened.
Press RECORD to indicate that the flap did not open.
Press STOP to skip this nucleus.
The local display shows FPKEYBOARD. Press PLAY to start the test.
Attention all keys have to be pressed to get a positive result!
Press PLAY for more than one second to confirm that all the keys were pressed and shown
on the local display. If not all the keys were pressed, a FAIL message will appear on the
local display.
Press RECORD for more than one second to indicate that not all keys were pressed and
shown on the local display.
Press STOP for more than one second to skip this nucleus.
The local display shows FPREMOTE CONTROL. Press PLAY to start the test.
Press PLAY to confirm that a key on the remote control was pressed and shown on the
local display. Only one key has to be pressed to get a successful result.
Press RECORD to indicate that the key on the remote control was pressed but not shown
on the local display.
Press STOP to skip this nucleus.
The local display shows FPDIMMER. Press PLAY to start the test.
Press PLAY to confirm that the text on the local display was dimmed.
Press RECORD to indicate that the text on the local display was not dimmed.
Press STOP to skip this nucleus.
The local display shows FPBEEPER. Press PLAY to start the test.
Press PLAY to confirm that the beeper on the front panel sounded.
Press RECORD to indicate that the beeper on the front panel did not sound.
Press STOP to skip this nucleus.
The local display shows FPFLAP CLOSE. Press PLAY to start the test.
Press STOP to skip this nucleus.
The local display shows ROUTE VIDEO. Press PLAY to start the test.
Press STOP to skip this nucleus.
The local display shows ROUTE AUDIO. Press PLAY to start the test.
Press STOP to skip this nucleus.
The local display shows COLOUR-BAR ON. Press PLAY to start the test.
Press STOP to skip this nucleus.
The local display shows PINK NOISE ON. Press PLAY to start the test.
Press STOP to skip this nucleus.
The local display shows PINK NOISE OFF. Press PLAY to start the test.
Press STOP to skip this nucleus.
The local display shows SINE ON. Press PLAY to start the test.
Press STOP to stop the sine.
Press STOP to skip this nucleus.
The local display shows COLOUR-BAR OFF. Press PLAY to start the test.
Press STOP to skip this nucleus.
The local display shows BERESET. Press PLAY to start the test.
Press STOP to skip this nucleus.
The local display shows BETRAY OPEN. Press PLAY to start the test.
Press STOP to skip this nucleus.
The local display shows BETRAY CLOSE. Press PLAY to start the test.
Press STOP to skip this nucleus.
The local display shows BEWRITE READ. Press PLAY to start the test.
Press STOP to skip this nucleus.
The local display shows BETRAY OPEN. Press PLAY to start the test.
Press STOP to skip this nucleus.
The local display shows BETRAY CLOSE. Press PLAY to start the test.
Press STOP to skip this nucleus.
The local display shows READ ERRORLOG. Press PLAY to start the test.
Press STOP to skip this nucleus.
If the player test succeeded, the user/dealer script will start in an endless loop.
If the player test failed, the local display will display FAIL and the error code
NUCLEUS
2
502
503
520
504
522
505
506
518
514
523
712
713
120
115
116
117
121
603
616
615
617
616
615
633
CL 16532095_063.pdf
140801
Figure 5-2
PRESS <PLAY> IF OK
PRESS <RECORD> IF NOT OK
PRESS <PLAY> IF OK
PRESS <STOP> TO ABORT
PRESS <PLAY> IF OK
PRESS <STOP> TO ABORT
PRESS <PLAY> IF OK
PRESS <STOP> TO ABORT
PRESS <STOP>
TO SKIP TEST
CHAPTER
PCM
EP+
MPEG
CHAPTER
HQ SP L:P
-30
-20
DD DIGITAL DTS
SAVCD
-10
PCM
EP+
0
TOTAL
OVER
MANUAL
MONITOR
TOTAL
MANUAL
MONITOR
DIGITAL
TIMER
REMAIN
SAT
AM
NICAM
PM
CHANNEL
STEREO
RECORD
VPS/PDC
SAP
DECODER
-30
DIGITAL
AM
PM
-20
NICAM
TIMER
REMAIN
SAT
CHANNEL
-10
0
STEREO
RECORD
VPS/PDC
OVER
SAP
DECODER
LED BECOMES RED
PRESS <STOP>
TO SKIP TEST
PRESS <PLAY> IF OK
PRESS <RECORD> IF NOT OK
-40
TRACK TIME
PRESS <STOP>
TO SKIP TEST
PRESS <PLAY> IF OK
PRESS <RECORD> IF NOT OK
TRACK TIME
PRESS <STOP>
TO SKIP TEST
PRESS <PLAY> IF OK
PRESS <RECORD> IF NOT OK
PRESS <PLAY>
TO START TEST
-40
DVD
PROLOGIC
TRACK
RW
TITLE
PRESS <PLAY>
TO START TEST
DTS
HQ SP L:P
DD DIGITAL
SAVCD
MPEG
DVD
PROLOGIC
TRACK
RW
TITLE
PRESS <PLAY>
TO START TEST
I
PRESS <PLAY>
TO START TEST
II
FRONTPANEL TEST
I
Unplug the power cord
II
Hold 2 keys
<OPEN/CLOSE> + <PLAY>
simultaneously pressed while
you plug the recorder
PRESS ALL KEYS AT LEAST ONCE
SEE TABLE FOR KEY CODES
XX TIMES
PRESSED
PRESS <STOP>
TO SKIP TEST
FLAP OPENS
PRESS <STOP>
TO SKIP TEST
SEARCH <<
SEARCH >>
TITLE <
TITLE >
AUTOMAN
REC VOLUME
MANUAL UP
MANUAL DOWN
CHANNEL UP
CHANNEL DOWN
STANDBY/ON
PANEL
OPEN/CLOSE
STOP
PLAY
RECORD
FRONT KEY NAME
001
002
00C
00D
00B
005
006
000
00E
00A
009
004
003
008
007
FRONT KEY CODE
PRESS <PLAY> MORE THAN 1S IF TEST IS OK
PRESS <RECORD> MORE THAN 1S IF TEST IS NOT OK
HEXADECIMAL
KEY CODE
PRESS <PLAY>
TO START TEST
PRESS <PLAY>
TO START TEST
PRESS <STOP>
TO SKIP TEST
PRESS AT LEAST ONE KEY
ON THE REMOTE CONTROL
SEE TABLE FOR RC KEY CODES
XX TIMES
PRESSED
43
ONLY FOR TV
ONLY FOR TV
1E
1F
ONLY FOR TV
01
02
03
04
05
06
07
08
09
00
C8
EE
F7
85
4B
4E
13
1D
3B
2A
TV/DVD
STANDBY
STOP
REC/OTR
PLAY
REVERSE
PAUSE
SLOW
FORWARD
PREVIOUS
EDIT
NEXT
DISC
SYSTEM
UP
LEFT
RIGHT
DOWN
RETURN
OK
CLEAR
TIMER
SELECT
VOL +
VOL P+
PMUTE
1
2
3
4
5
6
7
8
9
0
T/C
TUNER
ZOOM
ANGLE
SUBTITLE
AUDIO
DIM
REPEAT
REPEAT A-B
SCAN
0C
31
37
2C
29
30
22
28
21
CF
20
54
0F
58
5A
5B
59
83
5C
41
FE
FA
RC KEY CODE
RC KEY NAME
TO EXIT TEST: PRESS ONE OF FOLLOWING KEYS
ON THE LOCAL KEYBOARD
PRESS <PLAY> IF TEST IS OK
PRESS <RECORD> IF TEST IS NOT OK
HEXADECIMAL
RC KEY CODE
PRESS <PLAY>
TO START TEST
PRESS <PLAY> IF OK
PRESS <RECORD> IF NOT OK
PRESS <STOP>
TO SKIP TEST
DIGITAL BOARD TEST
FLAP CLOSES
PRESS <STOP>
TO SKIP TEST
PRESS <PLAY> IF OK
PRESS <RECORD> IF NOT OK
BEEP IS AUDIBLE
PRESS <PLAY>
TO START TEST
PRESS <PLAY>
TO START TEST
PRESS <PLAY>
TO START TEST
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
5.
GB 39
Remark
In case of failure, the display shows " FAIL 00000 ". The
description of the shown error code can be retrieved in the
survey of Nuclei Error Codes (paragraph 5.4). Once an error
occurs, it is not possible to continue the player script. Unplug
the set and restart the player script. By pressing the STOP
key, it is possible to jump over the failure and to continue the
player script.
CL 16532095_069.eps
150801
GB 40
5.
FRONTPANEL
TEST
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
DIGITAL BOARD &
ANALOG BOARD
TEST
BASIC ENGINE
TEST
press <PLAY> to execute
press < STOP > to skip
press <PLAY> to execute
press <NEXT > to skip
press <PLAY> to execute
press < STOP > to skip
press <PLAY> to execute
press <STOP> to skip
INSERT DVD +RW DISC TO EXECUTE
WRITE / READ TEST
press <PLAY> to execute
press < STOP > to skip
press <PLAY> to execute
press <STOP> to skip
press <PLAY> to execute
press < STOP > to skip
press <PLAY> to execute
press <NEXT > to skip
press <PLAY> to execute
press <NEXT > to skip
press <PLAY> to execute
press <STOP> to skip
press <PLAY> to execute
press < STOP > to skip
press <PLAY> to execute
press <STOP> to skip
press <STOP> to continue
<PLAY>
press <STOP> to skip
press <PLAY> to execute
PRESS <STOP>
TO STEP DOWN
NO ERRORS LOGGED
PRESS <STOP>
TO STEP DOWN
PRESS <RECORD>
TO STEP UP
PRESS <RECORD>
TO STEP UP
PRESS <PLAY> TO CONTINUE
CL 16532095_070.eps
150801
IF ERROR
To exit PLAYER SCRIPT, unplug the power cord
Figure 5-3
5.2.3
ErrorLog
Explanation:
The application errors will be logged in the NVRAM. The
maximum number of error bytes that will be visible is 19. The
last reported error is shown as DN D0000000, the oldest
visible error as D0000000 UP and the errors in between as
DN D0000000 UP. DN stands for DOWN, UP stands for
UPWARDS. The shown error codes are identical to the
Nuclei Error Codes (paragraph 5.4).
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
5.2.4
5.3.2
Trade Mode
TRADE MODE
Error Handling
Error code
Nucleus number
Nucleus group number
IF TRADE MODE ON
UNPLUG THE RECORDER
GB 41
[ XX YY ZZ ]
When the recorder is in Trade Mode, the recorder cannot be
controlled by means of the front key buttons, but only by means
of the remote control.
IF TRADE MODE OFF
5.
CL 06532152_013.eps
051200
UNPLUG THE RECORDER
Figure 5-6
PRESS 2 KEYS
SIMULTANEOUSLY
PRESS 2 KEYS
SIMULTANEOUSLY
<STOP> + <OPEN/CLOSE>
<STOP> + <OPEN/CLOSE>
PLUG THE RECORDER
PLUG THE RECORDER
RECORDER IS IN TRADE MODE
WHEN PRESSING FRONT
KEYS, THE RECORDER
DOESN'T RESPOND
RECORDER IS IN NORMAL MODE
WHEN PRESSING FRONT
KEYS, THE RECORDER
WILL RESPOND
CL 16532095_071.eps
150801
Figure 5-4
5.3
Menu and Command Mode Interface
5.3.1
Nuclei Numeration
Each nucleus has a unique number of four digits. This
number is the input of the command mode.
[ XX YY
]
Nucleus number
Nucleus group number
CL 06532152_012.eps
051200
Figure 5-5
The following groups are defined:
Group number Group name
0
Basic / Scripts
1
Host decoder (Sti5505 and memory)
2
Audio / video encoder (DVDR only)
3
VSM (DVDR only)
4
NVRAM
5
Front Panel
6
Basic Engine
7
Analogue board (DVDR only)
8
DVIO (DVDR only)
9
Loop nuclei (DVDR only)
10
Library sub nuclei (I2C nuclei)
11
User interface
12
Furore (SACD only)
13
DAC (SACD only)
14
Miscellaneous
The nucleus group numbers and nucleus numbers are the
same as above.
5.3.3
Command Mode Interface
Set-Up Physical Interface Components
Hardware required:
• Service PC
• one free COM port on the Service PC
• special cable to connect DVD recorder to Service PC
The service PC must have a terminal emulation program
(e.g. OS2 WarpTerminal or Procomm) installed and must
have a free COM port (e.g. COM1). Activate the terminal
emulation program and check that the port settings for the
free COM port are: 19200 bps, 8 data bits, no parity, 1 stop
bit and no flow control. The free COM port must be connected
via a special cable to the RS232 port of the DVD recorder.
This special cable will also connect the test pin, which is
available on the connector, to ground (i.e. activate test pin).
Code number of PC interface cable: 3122 785 90017
GB 42
5.
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
Activation
Plug the recorder to the mains and the following text will
appear on the screen of the terminal (program):
DVD Video Recorder Diagnostic Software version 48
Basic SDRAM Data bus test passed
Basic SDRAM Address bus test passed
Basic SDRAM Device test passed
(M) enu, (C) ommand or (S) 2B-interface?
DD:>
[M] : @ C
CL 16532095_073.eps
150801
Figure 5-7
The first line indicates that the Diagnostic software has been
activated and contains the version number. The next lines
are the successful result of the SDRAM interconnection test
and the basic SDRAM test. The last line allows the user to
choose between the three possible interface forms. If
pressing C has made a choice for Command Interface, the
prompt (“DD>”) will appear. The diagnostic software is now
ready to receive commands. The commands that can be
given are the numbers of the nuclei.
[xx yy] Number Nuclei
207
Audio Encoder I2C
208
SAA7118 select input
VSM [03]
[xx yy] Number Nuclei
300
Register Access
301
SDRAM Access
302
SDRAM Write Read
303
Interrupt lines
304
VSM Interconnection
305
UART
NVRAM [04]
[xx yy] Number Nuclei
400
Reset
401
Read
402
Modify
403
UniqueNr Read
Command Overview
We provide an overview of the nuclei and their numbers. This
overview is preliminary and subject to modifications.
404
Read Error Log
407
Reset Error Log
409
Line2 Region-Code Reset
Host Decoder [01]
410
UniqueNr Store
[xx yy] Number Nuclei
100
Checksum Flash
101
Flash Write Access 1
102
Flash Write Access 2
[xx yy] Number Nuclei
103
Flash Write Read
500
Echo
104
SdRam Write Read
501
Version
105
SdRam Write Read Fast
502
Segment
Dram Write Read
503
Label
Dram Write Read Fast
504
Led
108
Hardware Version
505
Keyboard
109
Mute On
506
Remote-Control
110
Mute Off
507
Segment Starburst
115
Pink Noise On
508
Segment Vertical
Pink Noise Off
509
Segment Horizontal
Sine On
514
Beeper
Sine Burst 1kHz
515
Discbar
Sine Burst 12kHz
516
Discbar Dots
Colour-bar On
517
Vu / Grid
Colour-bar Off
518
Dimmer
NvramWrR
519
Blinking
NvramI2c
520
Light All Segments
Boot Version
522
Flap Open
131
Application Version
523
Flap Close
132
Diagnostics Version
106
107
116
117
118
119
120
121
122
123
130
133
Download Version
134
Write / read I2C message to / from digital
board
Audio Video Encoder [02]
[xx yy] Number Nuclei
200
Video Encoder I2C
202
SAA711x I2C
203
Audio Encoder SRAM Access
204
Audio Encoder Access
205
Audio Encoder SRAM Write Read
206
Audio Encoder Interrupts
Front Panel [05]
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
Basic Engine [06]
727
S2B Pass
Set virgin bit
728
Clear Virgin Bit
729
Write / read I2C message to / from analogue board
730
Store external presets
601
S2B Echo
602
Version
603
Reset
604
Focus On
605
Focus Off
606
Disc Motor On
[xx yy] Number Nuclei
607
Disc Motor Off
800
608
Radial On
801
Reset DVIO
609
Radial Off
802
DVIO Access
615
Tray In
803
Get DVIO error codes
616
Tray Out
804
Get DVIO module Ids
617
Write Read
618
Write Read Endless Loop
619
Selftest
620
BE Test
621
Laser Test
622
Spindle (Disc) Motor Test
623
Focus Test
624
Sledge Motor Test
625
Sledge Motor Slow
626
Tilt
627
EEPROM Read
628
EEPROM Write
629
Optimise Jitter
630
Radial ATLS Calibration
631
Get Statistics Information
DVIO [08]
Check DVIO board presence
Loop Nuclei [09]
[xx yy] Number Nuclei
900
Digital Audio Loop
901
Audio User Dealer Loop
902
Digital Video Loop
903
Digital Video VBI Loop
904
System Video Loop
905
System Video VBI Loop
906
Video User Dealer Loop
907
Video VBI User Dealer Loop
908
System Audio Loop SCART
909
System Audio Loop CINCH
910
Digital DVIO Video Loop
632
Reset Statistics Information
633
BE Read Error Log
634
BE Reset Error Log
[xx yy] Number Nuclei
638
Get Self Test Result
1400
639
Radial Initialisation
1401
Clock 12.288 MHz
1412
Progressive Scan I2C
1413
Progressive Scan test image on
1414
Progressive Scan test image off
Miscellaneous [14]
Analogue Board [07]
[xx yy] Number Nuclei
Clock 11.289 MHz
Scripts [00]
700
Echo
703
Boot Version
[xx yy] Number Nuclei
704
Hardware Version
1
UserDealer Script
705
Clock Adjust
2
Player Script
706
Tuner
707
Frequency Download
708
Data Slicer
709
Sound Processor
710
AV Selector
711
Nvram
712
Route Video
713
Route Audio
714
Validate CVBS
715
Set Slash Version
716
Application Version
717
Diagnostics Version
718
Download Version
719
Initiate Output Of Clock Reference
720
Adjust Clock reference
721
Adjust Bargraph Level
723
Revirginize Recorder
724
Flash Checksum
726
Tuner frequency selection
GB 43
[xx yy] Number Nuclei
[xx yy] Number Nuclei
600
5.
5.3.4
Menu Mode Interface
Activation
Plug the recorder to the mains and the following text will
appear on the screen of the terminal (program):
GB 44
5.
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
5. Download Version
DVD Video Recorer Diagnostic Software version 48
Basic SDRAM Data bus test passed
Basic SDRAM Address bus test passed
Basic SDRAM Device test passed
(M) enu, (C) ommand or (S) 2B-interface?
[M] : @ M
Colourbar Menu
1. Colourbar On
2. Colourbar Off
Main Menu
1.
2.
3.
4.
5.
6.
7.
8.
9.
Digital Board
Analogue Board
Front Panel
Basic Engine
DVIO
Progressive Scan Board
Loop tests
Log
Scripts
Audio Mute Menu
1. Audio Mute On
2. Audio Mute Off
->
->
->
->
->
->
->
->
->
Pink Noise Menu
1. Pink Noise On
2. Pink Noise Off
Select>
CL 16532095_074.eps
150801
Sine Generate Menu
1. Sine On
2. Sine Burst 1kHz
3. Sine Burst 12kHz
Figure 5-8
The first line indicates that the Diagnostic software has been
activated and contains the version number. The next lines
are the successful result of the SDRAM interconnection test
and the basic SDRAM test. The last line allows the user to
choose between the three possible interface forms. If
pressing M has made a choice for Menu Interface, the Main
Menu will appear.
Menu Structure
The following menu structure is given after starting up the
DVD recorder in menu mode. The symbol ® indicates that
the current menu choice will invoke the display of a submenu.
Main Menu
1. Digital Board ®
2. Analogue Board ®
3. Front Panel ®
4. Basic Engine ®
5. DVIO ®
6. Progressive Scan Board ®
7. Loop Tests ®
8. Log ®
9. Scripts ®
Digital Board Menu
1. Host Decoder ®
2. VSM ®
3. AVENC ®
4. NVRAM ®
Host Decoder Menu
1. Flash Checksum
2. Flash1 Write Access
3. Flash2 Write Access
4. Flash Write/Read
5. Host SDRAM Write/Read
6. Host SDRAM Fast Write/Read
7. Host DRAM Write/Read
8. Host DRAM Fast Write/Read
9. I2C NVRAM
10. NVRAM Write/Read
11. Engine S2B Echo
12. Versions ®
13. Audio Mute ®
14. Colourbar ®
15. Pink Noise ®
16. Sine Generate ®
Digital Board Versions Menu
1. Hardware Version
2. Bootcode version
3. Applications Version
4. Diagnostics Version
VSM Menu
1. Register Access
2. SDRAM Access
3. VSM SDRAM Write/Read
4. Interrupt Lines
5. VSM Interconnection
6. UART
AVENC Menu
1. Video Encoder ®
2. Audio Encoder ®
3. Video Input Processors ®
Video Encoder Menu
1. I2C Access
Audio Encoder Menu
1. I2C Access
2. Interrupt Line
3. Encoder Register Access
4. SRAM Write/Read
5. SRAM Access
Video Input Processors Menu
1. SAA711X I2C Access
NVRAM Menu
1. Read Error Log
2. Reset Error Log
3. Read DVIO Unique ID
Analogue Board Menu
1. Echo
2. Show Guide Channels
3. Video Routing
4. Audio Routing
5. Flash Checksum
6. Versions ®
7. Components ®
8. Re-virginize Recorder ®
Analogue Board Versions Menu
1. Hardware Version
2. Bootcode version
3. Application version
4. Diagnostics version
5. Download version
Analogue Components Menu
1. Tuner
2. Data Slicer
3. Sound Processor
4. AV Selector
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
Analogue Board Re-virginize Menu
1. Re-virginize Recorder
2. Set Virgin-bit
3. Clear Virgin-bit
4. Store external presets
DVIO Menu
1. Check Presence
2. Reset
3. Access
4. Error Codes
5. Module Identifiers
Front Panel Menu
1. Echo
2. Version
3. Flap Control ®
4. Segment Test ®
5. Light Labels
6. Led test
7. Keyboard test
8. Remote Control
9. Beep
10. Disc Bar
11. Disc Bar Dots
12. Vu Grid
13. Dimmer
14. Blink
15. Light All Segments
Progressive Scan Board Menu
1. I2C Access
2. Test Image On
3. Test Image Off
Loop Tests Menu
1. Digital Board Loops ®
2. User/Dealer Loops ®
3. System Loops ®
4. Basic Engine Loops ®
Digital Board Loops Menu
1. Digital Audio Loop
2. Digital Video Loop
3. Digital Video Loop VBI
Flap Control Menu
1. Open Flap
2. Close Flap
User/Dealer Loops Menu
1. User/Dealer Audio Loop
2. User/Dealer Video Loop
3. User/Dealer Video Loop VBI
Segment Test Menu
1. Starburst
2. Light Horizontal Segments
3. Light Vertical Segments
4. Light All Segments
Basic Engine Error Log
1. Read Error Log
2. Reset Error Log
Basic Engine Spindle Motor Menu
1. Spindle Motor On
2. Spindle Motor Off
3. Spindle Motor Test
Basic Engine Radial Menu
1. Radial On
2. Radial Off
3. Radial Initialisation
4. Radial ATLS Calibration
Basic Engine Sledge Menu
1. Sledge test
2. Sledge test slow
GB 45
Basic Engine Tray Menu
1. Tray In
2. Tray Out
5. NVRAM
Basic Engine Menu
1. Reset
2. S2B Pass
3. S2B Echo
4. Version
5. Self Test
6. Get Self Test Result
7. Basic Engine Test
8. Laser Test
9. Focus Test
10. Tilt Test
11. Optimise Jitter
12. Statistics Info
13. Log ®
14. Spindle Motor ®
15. Radial ®
16. Sledge ®
17. Tray ®
5.
System Loops Menu
1. System Video Loop
2. System Video Loop VBI
3. System Audio Loop SCART
4. System Audio Loop SCART
Basic Engine Loops Menu
1. Basic Engine write read
2. Basic Engine write read endless loop
Log Menu
1. Read Error Log
2. Reset Error Log
Script Menu
1. User/Dealer Script
2. Player Script
5.4
Nuclei Error Codes
In the following table the error codes will be described.
Error Nr Error String
10000
"Checksum is OK"
10001
"segment name Checksum doesn't match" or
"segment name segment not found"
10100
""
10101
"FLASH 1 Write access test failed"
10200
""
10201
"FLASH 2 Write access test failed"
10300
""
10301
"FLASH write test failed"
10302
"FLASH write command failed"
10303
"FLASH write test done max. number of times"
10400
""
10401
"HostDec SDRAM Memory data bus test goes
wrong."
GB 46
5.
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
Error Nr Error String
Error Nr Error String
10402
" HostDec SDRAM Memory address bus test goes
wrong."
12203
"No NVRAM acknowledge"
12204
"NVRAM time-out"
" HostDec SDRAM Physical memory device test
goes wrong."
12205
"NVRAM Write/Read back failed"
12300
""
10500
""
12301
"I2C bus busy before start"
10501
" HostDec SDRAM Memory data bus test goes
wrong."
12302
"NVRAM read access time-out"
" HostDec SDRAM Memory address bus test goes
wrong."
12303
"No NVRAM read acknowledge"
12304
"NVRAM read failed"
13000
"Bootcode application version : bootversion"
10403
10502
10503
" HostDec SDRAM Physical memory device test
goes wrong."
13001
"Can not find version in FLASH."
10600
""
13100
"Recorder application version : recorderversion"
10601
"HostDec DRAM Memory data bus test goes
wrong."
13101
"Can not find version in FLASH."
13200
"Diagnostics application version : diagversion"
"HostDec DRAM Memory address bus test goes
wrong."
13201
"Can not find version in FLASH."
13300
"Download application version : downloadversion"
10603
"HostDec DRAM Physical memory device test
goes wrong."
13301
"Can not find version in FLASH."
20000
""
10700
""
20001
"I2C bus busy before start"
10701
"HostDec DRAM Memory data bus test goes
wrong."
20002
"Video Encoder access time-out"
10702
"HostDec DRAM Memory address bus test goes
wrong."
20003
"No acknowledge from Video Encoder"
20004
"No data send/received to or from Video Encoder"
10703
"HostDec DRAM Physical memory device test
goes wrong."
20005
"SAA711x VIP can not be initialised"
10602
20200
""
"I2C bus busy before start"
10800
"Host Decoder version(cut) number: version
number" "Digital hardware version"
20201
20202
"SAA711X VIP access time-out"
10801
"Can not find version in FLASH."
20203
"No acknowledge from SAA711X VIP"
10900
""
20204
"No data received from SAA711X VIP"
10901
"Error muting audio"
20300
""
11000
""
20301
11001
"Error demuting audio"
"Error audio encoder SRAM access cannot initialise I2C"
11500
""
20302
"Error audio encoder SRAM access cannot reset
DSP through I2C"
20303
"Error audio encoder SRAM access cannot download boot"
11501
"Init of I2C failed"
11502
"The selection of the clock source failed"
11504
"The demute of the audio failed"
11600
""
11601
"Init of I2C failed"
11602
"The mute of the audio failed"
11700
""
11701
"Init of I2C failed"
11702
"The muting of the audio failed"
11703
"The demute of the audio failed"
11704
"The selection of the clock source failed"
11707
"Setup of Front panel failed"
11708
"Sine on Front panel keyboard failed"
11800
""
11801
"Init of I2C failed"
11802
"The muting of the audio failed"
20304
"Error audio encoder cannot download test code"
20305
"Error audio encoder cannot obtain result of test"
20306
"Error audio encoder SRAM access stuck-at-zero
data line "
20307
"Error audio encoder SRAM access stuck-at-one
data line "
20308
"Error audio encoder SRAM access stuck-at-one
address line "
20309
"Error audio encoder SRAM access address line
address line x is connected to data line data line
y"
20310
"Error audio encoder SRAM access address lines
address line x and address line y are connected "
20311
"Error audio encoder SRAM access data lines
data line x and data line y are connected "
20312
"Error audio encoder SRAM access illegal data received"
11803
"The demute of the audio failed"
11804
"The selection of the clock source failed"
11805
"Error cannot start VSM audio in port"
20400
""
11900
""
20401
"Error audio encoder access cannot initialise I2C"
11901
"Init of I2C failed"
20402
11902
"The muting of the audio failed"
"Error audio encoder access cannot reset DSP
through I2C"
11903
"The demute of the audio failed"
20403
"Error audio encoder accessing ICR register"
11904
"The selection of the clock source failed"
20404
11905
"Error cannot start VSM audio in port"
"Error audio encoder access stuck-at-zero of data
line "
12000
""
20405
12100
""
"Error audio encoder access stuck-at-one of data
line "
12200
""
20406
"Audio encoder access data lines data line x and
data line y are interconnected "
20500
""
12201
"I2C bus busy before start"
12202
"NVRAM access time-out"
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
5.
GB 47
Error Nr Error String
Error Nr Error String
20501
"Error audio encoder SRAM WRR cannot initialise
I2C"
30102
"VSM SDRAM Bank1 Memory addressbus test
goes wrong."
20502
"Error audio encoder SRAM WRR cannot reset
DSP through I2C"
30103
"VSM SDRAM Bank1 Physical memory device
test goes wrong."
20503
"Error audio encoder WRR cannot download boot"
30104
20504
"Error audio encoder cannot download test code"
" VSM SDRAM Bank2 Memory databus test goes
wrong."
20505
"Error audio encoder SRAM WRR cannot obtain
result of test"
30105
" VSM SDRAM Bank2 Memory addressbus test
goes wrong."
20506
"Error audio encoder WRR SRAM stuck-at-zero
data bit "
30106
" VSM SDRAM Bank2 Physical memory device
test goes wrong."
20507
"Error audio encoder WRR SRAM stuck-at-one
data bit "
30200
""
30201
"VSM SDRAM Bank1 Memory databus test goes
wrong."
20508
"Error audio encoder WRR SRAM data lines data
line x and data line y are connected"
30202
20509
"Error audio encoder WRR SRAM illegal data received"
"VSM SDRAM Bank1 Memory addressbus test
goes wrong."
30203
20600
""
"VSM SDRAM Bank1 Physical memory device
test goes wrong."
20601
"Error audio encoder interrupt cannot initialise
I2C"
30204
" VSM SDRAM Bank2 Memory databus test goes
wrong."
20602
"Error audio encoder interrupt cannot reset DSP
through I2C"
30205
" VSM SDRAM Bank2 Memory addressbus test
goes wrong."
20603
"Error audio encoder cannot download test code"
30206
20604
"Error audio encoder interrupt cannot download
boot"
" VSM SDRAM Bank2 Physical memory device
test goes wrong."
30300
""
20605
"Error occurred accessing VSM"
30301
20606
"Audio encoder interrupt not received"
"VSM interrupt register A has a -stuck at- error for
value:"
20700
""
30302
20701
"Error audio encoder I2C cannot reset DSP
through I2C"
"VSM interrupt register B has a -stuck at- error for
value:"
30303
"Interrupt A wasn't raised."
30304
"Interrupt B wasn't raised."
30305
"Interrupts A and B were raised."
20702
20703
"Error audio encoder cannot download boot"
"Error audio encoder cannot download TEST
code"
30400
""
"VSM SDRAM Bank1 Memory databus test goes
wrong."
20704
"Error audio encoder I2C bus busy"
30401
20705
"Error audio encoder I2C cannot write slave address"
30402
20706
"Error audio encoder I2C no acknowledge received"
"VSM SDRAM Bank1 Memory addressbus test
goes wrong."
30403
20707
"Error audio encoder I2C cannot send/receive data"
"VSM SDRAM Bank1 Physical memory device
test goes wrong."
30404
20708
"Error audio encoder received data through I2C
was invalid"
" VSM SDRAM Bank2 Memory databus test goes
wrong."
30405
" VSM SDRAM Bank2 Memory addressbus test
goes wrong."
30406
" VSM SDRAM Bank2 Physical memory device
test goes wrong."
30500
""
20800
""
20801
"I2C access failed."
20802
"SAA7118 VIP can not be initialised."
20803
"Invalid input"
30000
""
30001
"VSM SDRAM Bank1 Memory databus test goes
wrong."
30002
"VSM SDRAM Bank1 Memory addressbus test
goes wrong."
30003
"VSM SDRAM Bank1 Physical memory device
test goes wrong."
30004
" VSM SDRAM Bank2 Memory databus test goes
wrong."
30501
"Communication with the analogue board fails."
30502
"Echo test to analogue board returned wrong
string."
40000
""
40001
"NVRAM Reset; I2C failed"
40100
"NVRAM address = 0xaddress -> Byte value =
0xvalue"
40101
"NVRAM Read; I2C failed"
40102
"NVRAM Read; Invalid input"
" VSM SDRAM Bank2 Memory addressbus test
goes wrong."
40200
""
40201
"NVRAM Modify; I2C failed"
" VSM SDRAM Bank2 Physical memory device
test goes wrong."
40202
"NVRAM Modify; Invalid input"
40300
"DV Unique ID = id"
30007
"VSM SDRAM Bank1 VSM interrupt register A has
a -stuck at- error for value:"
40301
"NVRAM Read DV Unique ID; I2C failed"
40400
"\r\n Error log:\r\n errorString \r\n Ö "
30008
"VSM SDRAM Bank2 VSM interrupt register A has
a -stuck at- error for value:"
40401
"NVRAM error log; I2C failed"
40402
"NVRAM error log is invalid"
40403
"Front panel failed"
30005
30006
30100
""
30101
"VSM SDRAM Bank1 Memory databus test goes
wrong."
40700
""
40701
"NVRAM error log reset; I2C failed"
GB 48
5.
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
Error Nr Error String
Error Nr Error String
40900
"Region code Change counter is reset"
50704
"The user skipped the FP-starburst test."
40901
"NVRAM region code reset; I2C failed"
50705
41000
""
"The user returned an unknown confirmation: confirmation "
41001
"NVRAM Store DV Unique ID; I2C failed"
50800
""
"NVRAM Store DV Unique ID; Invalid input"
50801
"Execution of the command on the analogue
board failed."
"The frontpanel could not be accessed by the analogue board."
41002
50000
""
50007
"Execution of the command on the analogue
board failed."
50802
50008
"The frontpanel could not be accessed by the analogue board."
50803
"The frontpanel did not show vertical segments."
50804
"The user skipped the FP-vertical segments test."
50009
"The echo from the frontpanel processor was not
correct."
50805
"The user returned an unknown confirmation: confirmation "
50100
" Front panel version: FPversion "
50900
""
50102
"Execution of the command on the analogue
board failed."
50901
"Execution of the command on the analogue
board failed."
50103
"The frontpanel could not be accessed by the analogue board."
50902
"The frontpanel could not be accessed by the analogue board."
50200
""
50903
50204
"Execution of the command on the analogue
board failed."
"The frontpanel did not show horizontal segments."
50904
50205
"The frontpanel could not be accessed by the analogue board."
"The user skipped the FP-horizontal segments
test."
50905
50206
"The frontpanel did not show a starburst."
"The user returned an unknown confirmation: confirmation "
50207
"The user skipped the FP-which pattern test."
51400
""
50208
"The user returned an unknown confirmation: confirmation "
51401
"Execution of the command on the analogue
board failed."
50209
"The frontpanel did not show horizontal segments."
51402
"The frontpanel could not be accessed by the analogue board."
50210
"The frontpanel did not show vertical segments."
51403
"The beeper did not sound."
50300
""
51404
"The user skipped the FP-Beep test."
50304
"Execution of the command on the analogue
board failed."
51405
"The user returned an unknown confirmation: confirmation"
50305
"The frontpanel could not be accessed by the analogue board."
51500
""
51501
"Execution of the command on the analogue
board failed."
50306
"The frontpanel did not light all labels."
50307
"The user skipped the rest of the FP-label test."
51502
50308
"The user returned an unknown confirmation:
confirmation"
"The frontpanel could not be accessed by the analogue board."
51503
"The discbar did not display properly."
""
51504
"The user skipped the discbar test."
50404
"Execution of the command on the analogue
board failed."
51505
"The user returned an unknown confirmation:
confirmation"
50405
"The frontpanel could not be accessed by the analogue board."
50400
51600
""
51601
"Execution of the command on the analogue
board failed."
50406
"The LED's could not be turned on."
50407
"The user skipped the rest of the FP-LED test."
51602
50408
"The user returned an unknown confirmation:
confirmation"
"The frontpanel could not be accessed by the analogue board."
51603
"The discbar dots did not display properly."
""
51604
"The user skipped the discbar dots test."
"Front panel Keyboard; test failed"
51605
"The user returned an unknown confirmation:
confirmation"
50500
50502
50503
"Front panel Keyboard; test aborted"
50504
"Front panel Keyboard; not all keys were pressed"
50505
"Front panel keyboard I2C connection failed"
50600
""
50602
"Front panel Remote control; test failed"
51700
""
51701
"Execution of the command on the analogue
board failed."
51702
"The frontpanel could not be accessed by the analogue board."
50603
"Front panel Remote control; test aborted"
51703
"The VU grid did not display properly."
50604
"Front panel remote control; can not access FP"
51704
"The user skipped the VU gridtest."
50605
"Front panel remote control; no user input received"
51705
"The user returned an unknown confirmation:
confirmation"
50700
""
51800
""
50701
"Execution of the command on the analogue
board failed."
51801
"Execution of the command on the analogue
board failed."
50702
"The frontpanel could not be accessed by the analogue board."
51802
"The frontpanel could not be accessed by the analogue board."
50703
"The frontpanel did not show a starburst."
51803
"The frontpanel could not be dimmed."
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
5.
GB 49
Error Nr Error String
Error Nr Error String
51804
"The user skipped the FP-Dim test."
60602
"Parity error from Basic Engine to Serial"
51805
"The user returned an unknown confirmation:
confirmation"
60603
"Communication time-out error"
60604
"Unexpected response from Basic Engine"
51900
""
60700
""
51901
"Execution of the command on the analogue
board failed."
60701
"Basic
Engine
0xerrornumber"
51902
"The frontpanel could not be accessed by the analogue board."
60702
"Parity error from Basic Engine to Serial"
60703
"Communication time-out error"
51903
"The frontpanel did not show segments blinking."
60704
"Unexpected response from Basic Engine"
51904
"The user skipped the FP-blinking test."
60800
""
51905
"The user returned an unknown confirmation:
confirmation"
60801
"Basic
Engine
0xerrornumber"
returned
returned
error
error
number
number
52000
""
60802
"Parity error from Basic Engine to Serial"
52001
"Execution of the command on the analogue
board failed."
60803
"Communication time-out error"
52002
"The frontpanel could not be accessed by the analogue board."
60804
"Unexpected response from Basic Engine"
60805
"Radial loop could not be closed"
52003
"The frontpanel did not show all segments lit."
52004
"The user skipped the FP-light all segments test."
52005
"The user returned an unknown confirmation:
confirmation"
52200
""
52201
"Communication with Analogue Board fails."
52202
"Frontpanel can not be accessed by the Analogue
Board."
52300
""
52301
"Communication with Analogue Board fails."
60900
""
60901
"Basic
Engine
0xerrornumber"
"Parity error from Basic Engine to Serial"
"Communication time-out error"
60904
"Unexpected response from Basic Engine"
61500
""
61501
"Basic
Engine
0xerrornumber"
returned
error
"Parity error from Basic Engine to Serial"
61503
"Communication time-out error"
61504
"Unexpected response from Basic Engine"
""
61600
""
60100
""
61601
60101
"Basic
Engine
0xerrornumber"
"Basic
Engine
0xerrornumber"
number
returned
error
"Parity error from Basic Engine to Serial"
"Communication time-out error"
"Unexpected response from Basic Engine"
60102
"Parity error from Basic Engine to Serial"
60103
"Communication time-out error"
61604
"Unexpected response from Basic Engine"
61700
""
60105
"Echo loop could not be closed"
61701
"BE tray-in command failed"
60106
"Wrong echo pattern received"
61702
"BE read-TOC command failed"
60200
"Version: nr1.nr2.nr3"
61703
"BE VSM interrupt initialisation failed"
60201
"Basic
Engine
0xerrornumber"
error
number
61704
"BE set irq command failed"
61705
"BE no disc or wrong disc inserted"
"BE rec-pause command failed"
60202
"Parity error from Basic Engine to Serial"
61706
60203
"Communication time-out error"
61707
"BE VSM BE out DMA initialisation failed"
60204
"Unexpected response from Basic Engine"
61708
"BE VSM BE out initialisation failed"
60205
"Front Panel failed."
61709
"BE VSM BE out DMA start failed"
60300
""
61710
"BE VSM BE out start failed"
60301
"Basic-Engine time-out error"
61711
"BE rec command failed"
60400
""
61712
"BE VSM out underrun error occurred"
60401
"Basic
Engine
0xerrornumber"
61713
"BE record complete interrupt not raised"
returned
error
number
number
61602
61603
returned
number
61502
60000
60104
number
60903
"Frontpanel can not be accessed by the Analogue
Board."
error
error
60902
52302
returned
returned
61714
"BE get irq command failed"
60402
"Parity error from Basic Engine to Serial"
61715
"BE no interrupt was raised by BE"
60403
"Communication time-out error"
61716
"BE VSM DMA out not finished"
60404
"Unexpected response from Basic Engine"
61717
"BE stop command after writing failed"
60405
"Focus loop could not be closed"
61718
"BE VSM Sector processor initialisation failed"
61719
"BE VSM sector processor DMA initialisation
failed"
60500
""
60501
"Basic
Engine
0xerrornumber"
61720
"BE VSM sector processor DMA start failed"
60502
"Parity error from Basic Engine to Serial"
61721
"BE VSM sector processor start failed"
60503
"Communication time-out error"
61722
"BE seek command failed"
60504
"Unexpected response from Basic Engine"
61723
"BE VSM sector processor error occurred"
60600
""
61724
"BE read timeout occurred"
60601
"Basic
Engine
0xerrornumber"
61725
"BE stop command after reading failed"
returned
returned
error
error
number
number
GB 50
5.
Diagnostic Software and Faultfinding Trees
DVDR1000 /0x1 /691
Error Nr Error String
Error Nr Error String
61726
"BE difference found in data at disc sector
0xdiscsector"
62804
"Unexpected response from Basic Engine"
62805
"BE write EEPROM; invalid input"
"This nucleus cannot be executed because the
Self-Test failed"
62900
""
62901
"Basic
Engine
0xerrornumber"
61727
returned
error
number
61800
""
61801
"BE i2c initialisation failed"
62902
"Parity error from Basic Engine to Serial"
61802
"This nucleus cannot be executed because the
Self-Test failed"
62903
"Communication time-out error"
62904
"Unexpected response from Basic Engine"
61900
""
62905
"Radial loop could not be closed"
61901
"The SelfTest failed with result: 0xnr1 0xnr2
0xnr3"
63000
""
63001
"Basic
Engine
0xerrornumber"
63002
"Parity error from Basic Engine to Serial"
63003
"Communication time-out error"
63004
"Unexpected response from Basic Engine"
63100
" Number of times Tray went Open/Closed : nr1"
" Total hours the CD laser was on : nr2"
" Total hours the DVD laser was on : nr3"
" Total hours the write laser was on : nr4"
63101
"Basic
Engine
0xerrornumber"
63102
"Parity error from Basic Engine to Serial"
63103
"Communication time-out error"
63104
"Unexpected response from Basic Engine"
61902
"Basic
Engine
0xerrornumber"
returned
error
61903
"Parity error from Basic Engine to Serial"
61904
"Communication time-out error"
61905
"Unexpected response from Basic Engine"
62000
""
62001
"Self-Test :
errorstring1
Laser-Test : errorstring2
SpindleM-Test: errorstring3
SledgeM-Test : errorstring4
Focus-Test : errorstring5"
62100
"The forward sense level is 0xlevel"
62101
"Basic
Engine
0xerrornumber"
62102
returned
error
number
number
"Parity error from Basic Engine to Serial"
62103
"Communication time-out error"
62104
"Unexpected response from Basic Engine"
62200
""
62201
"The BE-self-diagnostic-spindle-motor-test failed"
62202
"Basic
Engine
0xerrornumber"
returned
returned
error
error
63200
""
63201
"Basic
Engine
0xerrornumber"
63202
"Parity error from Basic Engine to Serial"
63203
"Communication time-out error"
returned
error
number
number
number
63204
"Unexpected response from Basic Engine"
63300
Momentary errors (Byte 1 - Byte 7) : 0xb1 0xb2
0xb3 0xb4 0xb5 0xb6 0xb7
Cumulative errors (Byte 1 - Byte 7): : 0xb1 0xb2
0xb3 0xb4 0xb5 0xb6 0xb7
Fatal errors (Oldest - Youngest) : : 0xb1 0xb2
0xb3 0xb4 0xb5
63301
"Basic
Engine
0xerrornumber"
63302
"Parity error from Basic Engine to Serial"
"Parity error from Basic Engine to Serial"
63303
"Communication time-out error"
"Communication time-out error"
63304
"Unexpected response from Basic Engine"
"Unexpected response from Basic Engine"
63400
""
62400
""
63401
62401
"The BE-self-diagnostic-sledge-motor-test failed"
"Basic
Engine
0xerrornumber"
62402
"Basic
Engine
0xerrornumber"
63402
"Parity error from Basic Engine to Serial"
63403
"Communication time-out error"
"Unexpected response from Basic Engine"
returned
error
number
62203
"Parity error from Basic Engine to Serial"
62204
"Communication time-out error"
62205
"Unexpected response from Basic Engine"
62300
""
62301
"The BE-focus-test failed"
62302
"Basic
Engine
0xerrornumber"
62303
62304
62305
returned
returned
error
error
number
number
returned
returned
error
error
62403
"Parity error from Basic Engine to Serial"
63404
62404
"Communication time-out error"
63500
""
62405
"Unexpected response from Basic Engine"
63501
62500
""
"Basic
Engine
0xerrornumber"
62600
""
63502
"Parity error from Basic Engine to Serial"
63503
"Communication time-out error"
62700
62701
"BE EEPROM address = address -> Byte value =
0xvalue"
"Basic
Engine
0xerrornumber"
returned
error
number
returned
error
number
number
number
63504
"Unexpected response from Basic Engine"
63505
"errorstring
The basic engine will reject all player commands"
62702
"Parity error from Basic Engine to Serial"
63900
""
62703
"Communication time-out error"
63901
62704
"Unexpected response from Basic Engine"
"Basic
Engine
0xerrornumber"
62705
"BE read EEPROM; invalid input"
63902
"Parity error from Basic Engine to Serial"
""
63903
"Communication time-out error"
"Basic
Engine
0xerrornumber"
63904
"Unexpected response from Basic Engine"
70000
"Echo test OK"
"Parity error from Basic Engine to Serial"
70001
"Echo test returned wrong string."
"Communication time-out error"
70002
"Communication with Analogue Board fails"
62800
62801
62802
62803
returned
error
number
returned
error
number
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
5.
GB 51
Error Nr Error String
Error Nr Error String
70300
"SoftwareVersion"
71801
70301
"Can not find segment in FLASH ROM on the Analogue Board"
"Can not find segment in FLASH ROM on the Analogue Board"
71802
"Communication with Analogue Board fails"
70302
"Communication with Analogue Board fails"
72300
""
70400
"HardwareVersion"
72301
70401
"Can not find segment in FLASH ROM on the Analogue Board"
"Clearing the NVRAM on the Analogue Board
fails"
72302
"Communication with Analogue Board fails"
70402
"Communication with Analogue Board fails"
72400
70500
"Clock adjusted OK"
"segment checksum is : checksum which is correct" for every segment
70501
"Can not adjust the clock on the Analogue Board."
72401
70502
"Wrong date/time text size."
70503
"Communication with Analogue Board fails"
"segment could not be found" or "segment checksum is : checksumC ,however it should be : checksumE" for every segment
70600
"Tuner accessibility test OK"
72402
"Communication with Analogue Board fails"
70601
"Can not access tuner on the Analogue Board."
70602
"Communication with Analogue Board fails"
70700
"Frequency download OK"
70701
"Wrong frequency table size."
70702
73000
""
73001
"Storing the external presets on the Analogue
Board fails"
73002
"Communication with Analogue Board fails"
80000
"The DVIO module is present in the system."
"Can not download the frequency table into the
analogue NVRAM."
80001
"The DVIO module is not present in the system."
"Can not download the frequency table into the
analogue NVRAM."
80100
"The DVIO module has been reset OK."
80101
"The DVIO module is not present in the system."
"Communication with Analogue Board fails"
80102
"The DVIO module could not be reset."
"Data slicer test OK"
80103
"Could not initialise I2C before Reset."
70801
"Test of the Data slicer on the Analogue Board
fails."
80200
"The accessibility of the DVIO module is OK."
80201
"The DVIO board is not present in this DVDR."
70802
"Communication with Analogue Board fails"
80202
"Could not initialise I2C."
70900
"Sound Processor test OK"
80203
"Unable to reset the DVIO module."
70901
"Test of the Sound Processor on the Analogue
Board fails."
80204
"Unable to receive the reset indication from the
DVIO module."
70902
"Communication with Analogue Board fails"
80205
71000
"AV Selector test OK"
"Unable to send the configuration to the DVIO
module."
71001
"Test of the AV Selector on the Analogue Board
fails."
80206
"Unable to download the chip ID to the DVIO module."
71002
"Communication with Analogue Board fails"
80207
71100
"NVRAM test OK"
"Unable to set the mode of the DVIO module to
IDLE."
71101
"Test of the NVRAM on the Analogue Board fails."
80208
"Software Error in function HandleStateAwaitingReply !!"
80209
"Maximal number of retries reached by HandleStateSending !!"
80210
"Maximal number of retries (NACKs) reached
(HandleStateSending)"
80211
"We
tried
to
receive
a
reply
for
DVIO_MAX_RETRIES_ACKREPLY times !!"
80212
"We
tried
to
receive
a
reply
DVIO_MAX_RETRIES_REPLY times !!"
for
80213
"We
tried
to
receive
an
DVIO_MAX_RETRIES_ACK times!!"
for
70703
70704
70800
71102
"Communication with Analogue Board fails"
71200
"Video routing on the Analogue Board OK"
71201
"Routing the video on the Analogue Board fails."
71202
"Invalid input."
71203
"Communication with Analogue Board fails"
71300
"Audio routing on the Analogue Board OK"
71301
"Routing the audio on the Analogue Board fails."
71302
"Invalid input."
71303
"Communication with Analogue Board fails"
71400
"Audio routing on the Analogue Board OK"
71401
"Can not access switching matrix."
71402
"CVBS signal is invalid."
71403
"Communication with Analogue Board fails"
Ack
80214
"VSM UART error timeout transmitting command"
80215
"VSM UART error timeout receiving reply"
80216
"VSM UART frame error occurred receiving from
DVIO board"
80217
"VSM UART parity error occurred receiving from
DVIO board"
71500
""
71501
"Invalid slash version, default slash version is set."
71502
"Setting the slash version on the Analogue Board
fails."
80218
"The confirmation/indication from the DVIO module is invalid."
71503
"Communication with Analogue Board fails"
80300
"The accessibility of the DVIO module is OK."
71600
"ApplicationVersion"
80301
"The DVIO board is not present in this DVDR."
71601
"Can not find segment in FLASH ROM on the Analogue Board"
80302
"Could not initialise I2C."
80303
"Unable to reset the DVIO module."
80304
"Unable to receive the reset indication from the
DVIO module."
71602
"Communication with Analogue Board fails"
71700
"DiagnosticsVersion"
71701
"Can not find segment in FLASH ROM on the Analogue Board"
80305
"Unable to send the configuration to the DVIO
module."
71702
"Communication with Analogue Board fails"
80306
71800
"DownloadVersion"
"Unable to download the chip ID to the DVIO module."
GB 52
5.
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
Error Nr Error String
Error Nr Error String
80307
"Unable to set the mode of the DVIO module to
IDLE."
90011
"Error digital loop audio cannot start audio encoder"
80308
"Software Error in function HandleStateAwaitingReply !!"
90012
"Error cannot start VSM audio in DMA port"
90013
"Error cannot start VSM audio in port"
"Maximal number of retries reached by HandleStateSending !!"
90014
"Error transfer data from audio encoder to VSM"
90015
"Error cannot start VSM AV out DMA port"
"Maximal number of retries (NACKs) reached
(HandleStateSending)"
90016
"Error cannot start VSM AV out port"
80311
"We
tried
to
receive
a
reply
for
DVIO_MAX_RETRIES_ACKREPLY times !!"
90017
"Error transfer data from VSM to host decoder"
90018
80312
"We
tried
to
receive
a
reply
DVIO_MAX_RETRIES_REPLY times !!"
for
"Error digital loop audio data in host memory and
VSM memory differ"
90019
80313
"We
tried
to
receive
an
DVIO_MAX_RETRIES_ACK times!!"
for
"Error digital loop audio data is not a valid MPEG
stream"
90020
"Error digital loop audio data is not a digital silence"
80309
80310
Ack
80314
"VSM UART error timeout transmitting command"
80315
"VSM UART error timeout receiving reply"
80316
"VSM UART frame error occurred receiving from
DVIO board"
90100
""
90101
"Error routing the audio back to the digital board."
90102
"Error cannot initialise I2C"
90103
"Error cannot initialise VIP"
90104
"Error cannot set ADC enable pin"
"The confirmation/indication from the DVIO module is invalid."
90105
"Error cannot set VSM audio clock"
90106
"Error preparing the 12kHz audio-sine"
80400
"The accessibility of the DVIO module is OK."
90107
"Error cannot initialise audio encoder"
80401
"The DVIO board is not present in this DVDR."
90108
"Error cannot initialise VSM audio in port"
80402
"Could not initialise I2C."
90109
"Error cannot initialise VSM audio in DMA port"
80403
"Unable to reset the DVIO module."
90110
"Error cannot initialise VSM audio out DMA port"
80404
"Unable to receive the reset indication from the
DVIO module."
90111
"Error cannot initialise audio VSM out port"
90112
"Error cannot initialise host decoder audio in"
80405
"Unable to send the configuration to the DVIO
module."
90113
"Error loop audio user/dealer cannot start audio
encoder"
80406
"Unable to download the chip ID to the DVIO module."
90114
"Error cannot start VSM audio in DMA port"
90115
"Error starting the 12kHz audio-sine"
80407
"Unable to set the mode of the DVIO module to
IDLE."
90116
"Error transfer data from audio encoder to VSM"
80408
"Software Error in function HandleStateAwaitingReply !!"
90117
"Error cannot start VSM AV out DMA port"
90118
"Error cannot start VSM AV out port"
80409
"Maximal number of retries reached by HandleStateSending !!"
80317
80318
"VSM UART parity error occurred receiving from
DVIO board"
90119
"Error transfer data from VSM to host decoder"
90120
"Error: audio data in host memory and VSM memory differ"
80410
"Maximal number of retries (NACKs) reached
(HandleStateSending)"
90121
80411
"We
tried
to
receive
a
reply
for
DVIO_MAX_RETRIES_ACKREPLY times !!"
"Error: audio data in host memory contains wrong
frequency: frequency Hz"
90122
80412
"We
tried
to
receive
a
reply
DVIO_MAX_RETRIES_REPLY times !!"
for
"Error: audio data in host memory contains silence!"
90123
"There is no correct audio frame in the buffer"
80413
"We
tried
to
receive
an
DVIO_MAX_RETRIES_ACK times!!"
for
Ack
90124
"The audio frame has an illegal version bit"
90125
"The audio frame has an illegal bitrate-index"
80414
"VSM UART error timeout transmitting command"
90126
"The audio frame has an illegal sampling rate"
80415
"VSM UART error timeout receiving reply"
90127
"The CRC of the audio frame is wrong"
80416
"VSM UART frame error occurred receiving from
DVIO board"
90128
"The audio frame is not MPEG-I layer II !"
90129
"Error cannot de-mute DAC on analogue board"
"VSM UART parity error occurred receiving from
DVIO board"
90200
""
90201
"Initialisation of I2C failed"
"The confirmation/indication from the DVIO module is invalid."
90202
"Initialisation of VIP and EMPIRE failed"
80417
80418
90000
""
90001
"Error cannot initialise I2C"
90002
"Error cannot initialise VIP"
90203
"Initialisation of PLL / Link failed."
90204
"Next descriptor address set wrong."
90205
"Turning on the colourbar failed"
90206
"No I2C communication possible to start video encoder."
90003
"Error cannot clear ADC enable pin"
90004
"Error cannot set VSM audio clock"
90207
"Starting the video encoder failed."
90005
"Error cannot initialise audio encoder"
90208
90006
"Error cannot initialise VSM audio in port"
"Transfer of data from video encoder to VSM
failed."
90007
"Error cannot initialise VSM audio in DMA port"
90209
"Stopping the encoder failed."
90008
"Error cannot initialise VSM audio out DMA port"
90210
"Turning off the colourbar failed."
90009
"Error cannot initialise host decoder audio in"
90211
"Cannot intialize hostdecoder parallel input"
90010
"Error cannot initialise audio VSM out port"
90212
"Cannot initialise VSM AV-out DMA port"
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
5.
GB 53
Error Nr Error String
Error Nr Error String
90213
"Cannot initialise VSM AV-out port"
90419
90214
"Cannot start VSM AV-out DMA port"
"The data in the hostdecoder is not equal to a colourbar"
90215
"Cannot start VSM AV-out port"
90420
90216
"Transfer of data from VSM to host decoder
failed."
"The video encoder did not return the Group Of
Picture count."
90421
90217
"VSM and Hostdec memory do not match (compared after transfer)"
"The video encoder did not receive data from the
VIP."
90422
90218
"Decoding of the video data in the hostdecoder
memory failed"
"Execution of the command on the analogue
board failed."
90423
"Initialisation of VIP and EMPRESS failed"
90219
"The data in the hostdecoder is not equal to a colourbar"
90424
"The video encoder did not return the current status."
90220
"The video encoder did not return the Group Of
Picture count."
90425
"The video encoder timed out in BUSY mode. (no
VIP input)"
90221
"The video encoder did not receive data from the
VIP."
90426
"The video encoder did not return the current bitrate."
90223
"Initialisation of VIP and EMPRESS failed"
90427
90224
"The video encoder did not return the current status."
"The video encoder did not switch to ENCODING
mode."
90428
90225
"The video encoder timed out in BUSY mode. (no
VIP input)"
"The video encoder could not start from STOP/
IDLE mode."
90429
90226
"The video encoder did not return the current bitrate."
"The video encoder did not switch from IDLE to
STOP mode."
90500
""
90227
"The video encoder did not switch to ENCODING
mode."
90501
"Initialisation of I2C failed"
90502
"I2C communication to VIP failed"
"The video encoder could not start from STOP/
IDLE mode."
90503
"Initialisation of VIP failed"
90504
"Generation of Close Caption data failed"
"The video encoder did not switch from IDLE to
STOP mode."
90505
"VIP not locked to video signal"
90506
"Initialisation of VBI Extractor failed
""
90507
"No CC data received"
90301
"Initialisation of I2C failed"
90508
"Closed Caption data overrun"
90302
"I2C communication to VIP failed"
90509
"Closed Caption data does not match"
90303
"Initialisation of VIP failed"
90510
"Switch off ColourBar failed"
90511
"Execution of the command on the analogue
board failed."
90228
90229
90300
90304
"Generation of Close Caption data failed"
90305
"VIP not locked to video signal"
90306
"Initialisation of VBI Extractor failed
90600
""
90307
"No CC data received"
90601
"Initialisation of I2C failed"
90308
"Closed Caption data overrun"
90602
"Initialisation of VIP and EMPIRE failed"
90309
"Closed Caption data does not match"
90603
"Initialisation of PLL / Link failed."
90310
"Switch off ColourBar failed"
90604
"Next descriptor address set wrong."
90400
""
90605
"Turning on the colourbar failed"
90401
"Initialisation of I2C failed"
90606
90402
"Initialisation of VIP and EMPIRE failed"
"No I2C communication possible to start video encoder."
90403
"Initialisation of PLL / Link failed."
90607
"Starting the video encoder failed."
90404
"Next descriptor address set wrong."
90608
"Transfer of data from video encoder to VSM
failed."
90405
"Turning on the colourbar failed"
90406
"No I2C communication possible to start video encoder."
90609
"Stopping the encoder failed."
90610
"Turning off the colourbar failed."
90407
"Starting the video encoder failed."
90611
"Cannot intialize hostdecoder parallel input"
90408
"Transfer of data from video encoder to VSM
failed."
90612
"Cannot initialise VSM AV-out DMA port"
90613
"Cannot initialise VSM AV-out port"
90409
"Stopping the encoder failed."
90614
"Cannot start VSM AV-out DMA port"
90410
"Turning off the colourbar failed."
90615
"Cannot start VSM AV-out port"
90411
"Cannot intialize hostdecoder parallel input"
90616
90412
"Cannot initialise VSM AV-out DMA port"
"Transfer of data from VSM to host decoder
failed."
90617
"VSM and Hostdec memory do not match (compared after transfer)"
90413
"Cannot initialise VSM AV-out port"
90414
"Cannot start VSM AV-out DMA port"
90415
"Cannot start VSM AV-out port"
90618
90416
"Transfer of data from VSM to host decoder
failed."
"Decoding of the video data in the hostdecoder
memory failed"
90619
90417
"VSM and Hostdec memory do not match (compared after transfer)"
"The data in the hostdecoder is not equal to a colourbar"
90620
"Decoding of the video data in the hostdecoder
memory failed"
"The video encoder did not return the Group Of
Picture count."
90621
"The video encoder did not receive data from the
VIP."
90418
GB 54
5.
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
Error Nr Error String
Error Nr Error String
90622
"Execution of the command on the analogue
board failed."
90901
"Error routing the audio back to the digital board."
90902
"Error cannot initialise I2C"
90623
"Initialisation of VIP and EMPRESS failed"
90903
"Error cannot initialise VIP"
90624
"The video encoder did not return the current status."
90904
"Error cannot set ADC enable pin"
90905
"Error cannot set VSM audio clock"
90625
"The video encoder timed out in BUSY mode. (no
VIP input)"
90906
"Error preparing the 12kHz audio-sine"
"The video encoder did not return the current bitrate."
90907
"Error cannot initialise audio encoder"
90908
"Error cannot initialise VSM audio in port"
90626
90909
"Error cannot initialise VSM audio in DMA port"
90910
"Error cannot initialise VSM audio out DMA port"
"The video encoder could not start from STOP/
IDLE mode."
90911
"Error cannot initialise audio VSM out port"
90912
"Error cannot initialise host decoder audio in"
"The video encoder did not switch from IDLE to
STOP mode."
90913
"Error loop audio user/dealer cannot start audio
encoder"
90700
""
90914
"Error cannot start VSM audio in DMA port"
90701
"Initialisation of I2C failed"
90915
"Error starting the 12kHz audio-sine"
90702
"I2C communication to VIP failed"
90916
"Error transfer data from audio encoder to VSM"
90703
"Initialisation of VIP failed"
90917
"Error cannot start VSM AV out DMA port"
90704
"Generation of Close Caption data failed"
90918
"Error cannot start VSM AV out port"
90705
"VIP not locked to video signal"
90919
"Error transfer data from VSM to host decoder"
90706
"Initialisation of VBI Extractor failed
90920
"Error: audio data in host memory and VSM memory differ"
90921
"Error: audio data in host memory contains wrong
frequency: frequency Hz"
90922
"Error: audio data in host memory contains silence!"
90923
"There is no correct audio frame in the buffer"
90627
90628
90629
"The video encoder did not switch to ENCODING
mode."
90707
"No CC data received"
90708
"Closed Caption data overrun"
90709
"Closed Caption data does not match"
90710
"Switch off ColourBar failed"
90711
"Execution of the command on the analogue
board failed."
90800
""
90801
"Error routing the audio back to the digital board."
90802
"Error cannot initialise I2C"
90803
90804
"Error cannot initialise VIP"
"Error cannot set ADC enable pin"
90805
"Error cannot set VSM audio clock"
90806
"Error preparing the 12kHz audio-sine"
90807
"Error cannot initialise audio encoder"
90808
"Error cannot initialise VSM audio in port"
90809
"Error cannot initialise VSM audio in DMA port"
90810
"Error cannot initialise VSM audio out DMA port"
90811
"Error cannot initialise audio VSM out port"
90812
"Error cannot initialise host decoder audio in"
90813
"Error loop audio user/dealer cannot start audio
encoder"
90814
"Error cannot start VSM audio in DMA port"
90815
"Error starting the 12kHz audio-sine"
90816
"Error transfer data from audio encoder to VSM"
90817
"Error cannot start VSM AV out DMA port"
90818
"Error cannot start VSM AV out port"
90819
"Error transfer data from VSM to host decoder"
90820
"Error: audio data in host memory and VSM memory differ"
90821
"Error: audio data in host memory contains wrong
frequency: frequency Hz"
90822
"Error: audio data in host memory contains silence!"
90823
"There is no correct audio frame in the buffer"
90824
"The audio frame has an illegal version bit"
90825
"The audio frame has an illegal bitrate-index"
90826
"The audio frame has an illegal sampling rate"
90827
"The CRC of the audio frame is wrong"
90828
"The audio frame is not MPEG-I layer II !"
90829
"Error cannot de-mute DAC on analogue board"
90900
""
90924
"The audio frame has an illegal version bit"
90925
"The audio frame has an illegal bitrate-index"
90926
"The audio frame has an illegal sampling rate"
90927
"The CRC of the audio frame is wrong"
90828
"The audio frame is not MPEG-I layer II !"
90929
"Error cannot de-mute DAC on analogue board"
140000 ""
140001 "I2C to Clock failed" or "I2C initialisation failed"
140100 ""
140101 "I2C to Clock failed" or "I2C initialisation failed"
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
Loop Tests
5.5.2
The following loops can be distinguished:
• Loops performed on the digital board only
• User Dealer loops performed on the digital and analogue
board
• System loops performed via an external connection:
outputs are looped back to the inputs.
5.5.1
Nucleus 900: Digital Audio Loop
This nucleus tests the audio path through the digital board
NUCLEUS 900: AUDIO LOOP DIGITAL
GB 55
Nucleus 901: Audio User Dealer Loop
A PCM audio sine of 12kHz is generated in the Sti5505 for a
while and sent to the analogue board. The signal coming
from the analogue board is encoded again and sent to the
memory of the host decoder for comparison. This nucleus
tests the components on the audio signal path:
• Host decoder Sti5505
• Flex connection between connector 1602 (digital board)
and connector 1900 (analogue board)
• DAC
• Op-amp
• Scart switch STV6410
• ADC
• Audio Encoder
• VIP
• VSM
ANALOGUE BOARD
NUCLEUS 901: AUDIO USER DEALER LOOP
ANALOGUE BOARD
7507
STV6410
7002
7004
ADC
7100
DAC
DIGITAL BOARD
7552
VIP
7202
VIP_ICLK: 27MHz
connector
1900
connector
1900
connector
1602
connector
1602
STI 5505
DIGITAL BOARD
I2S
7703
I2S
7552
AUDIO ENCODER
7202
7100
VIP
GND
7410
STI 5505
VSM
EMPIRE
CL 16532095_075.eps
150801
Figure 5-9
VIP_ICLK: 27MHz
5.5
5.
7703
AUDIO ENCODER
7100
7410
VSM
EMPIRE
CL 16532095_076.eps
150801
Figure 5-10
GB 56
5.5.3
5.
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
Nucleus 902: Digital Video Loop
5.5.4
A colourbar generated in the host decoder is looped through
the VIP, Empire, and VSM and checked again in the host
decoder. The following components are tested on the video
signal path:
• VIP
• Empire
• VSM
• Host decoder
Nucleus 903: Digital Video VBI Loop
Nucleus for testing the components on the video VBI signal
path:
• The VIP
• The VSM
• The Host Decoder
This is done by using the internal test signal source (digital
board only)
NUCLEUS 903: DIGITAL VIDEO VBI LOOP
NUCLEUS 902: DIGITAL VIDEO LOOP
ANALOGUE BOARD
ANALOGUE BOARD
7507
STV6410
7507
STV6410
DIGITAL BOARD
DIGITAL BOARD
7552
7202
VIP
7552
7202
VIP
VIP_ICLK: 27MHz
VIP_ICLK: 27MHz
STI 5505
STI 5505
7703
AUDIO ENCODER
7703
7100
AUDIO ENCODER
VSM
7100
7410
VSM
7410
EMPIRE
EMPIRE
CL 16532095_078.eps
150801
CL 16532095_077.eps
150801
Figure 5-12
Figure 5-11
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
5.5.5
Nucleus 904: System Video Loop
5.5.6
Nucleus for testing the components on the video signal
system path:
• The VIP
• The video encoder
• The VSM
• The host decoder
• The analogue board
On the analogue board the video signal will be routed to the
SCART (EUROPE) or CINCH (NAFTA). There it will be
looped back externally by means of the proper cable
5.
GB 57
Nucleus 905: System Video VBI Loop
This nucleus tests the components on the video signal path:
• The VIP
• The VSM
• The Host Decoder
The video CVBS signal is routed to the output of the
analogue board where it will be looped back by means of an
external cable
NUCLEUS 905: SYSTEM VIDEO VBI LOOP
NUCLEUS 904: SYSTEM VIDEO LOOP
SCART AUX
SCART TV
ANALOGUE BOARD
SCART AUX
SCART TV
ANALOGUE BOARD
7507
STV6410
7507
connector
1954
connector
1954
connector
1601
connector
1601
STV6410
connector
1954
connector
1954
DIGITAL BOARD
7552
connector
1601
DIGITAL BOARD
7202
VIP
connector
1601
VIP_ICLK: 27MHz
7552
STI 5505
7202
VIP
VIP_ICLK: 27MHz
STI 5505
7703
AUDIO ENCODER
7100
VSM
7410
7703
EMPIRE
AUDIO ENCODER
7100
VSM
7410
CL 16532095_080.eps
150801
EMPIRE
Figure 5-14
CL 16532095_079.eps
170801
Figure 5-13
GB 58
5.5.7
5.
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
Nucleus 906: Video User Dealer Loop
5.5.8
Nucleus for testing the components on the video signal
system path:
• The VIP
• The video encoder
• The VSM
• The host decoder
• The analogue board
On the analogue board, the video signal is internally routed
back to the digital board.
Nucleus 907: Video VBI User Dealer Loop
This nucleus tests the components on the video VBI signal
path:
• The VIP
• The VSM
• The Host Decoder
The signal is routed back internally on the analogue board
NUCLEUS 907: VIDEO VBI USER DEALER LOOP
NUCLEUS 906: VIDEO USER DEALER LOOP
ANALOGUE BOARD
ANALOGUE BOARD
7507
STV6410
7507
connector
1954
connector
1954
STV6410
connector
1954
connector
1954
connector
1601
connector
1601
connector
1601
DIGITAL BOARD
connector
1601
7552
DIGITAL BOARD
7202
VIP
VIP_ICLK: 27MHz
7552
STI 5505
7202
VIP
VIP_ICLK: 27MHz
STI 5505
7703
AUDIO ENCODER
7100
VSM
7410
7703
EMPIRE
AUDIO ENCODER
7100
VSM
7410
CL 16532095_082.eps
150801
EMPIRE
CL 16532095_081.eps
150801
Figure 5-15
Figure 5-16
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
5.5.9
Nucleus 908: System Audio Loop Scart
Nucleus for testing the components on the audio signal path:
• The hostdecoder
• The analogue board
• The audio encoder
• The VSM
On the analogue board, audio is passed to the SCART
connector, where a SCART cable needs to be used to loop
back the audio signal to the digital board
NUCLEUS 908: SYSTEM AUDIO LOOP SCART
SCART AUX
SCART TV
ANALOGUE BOARD
7507
STV6410
7002
7100
7004
DAC
ADC
connector
1900
connector
1602
connector
1900
DIGITAL BOARD
connector
1602
7552
7202
VIP
VIP_ICLK: 27MHz
STI 5505
7703
AUDIO ENCODER
7100
7410
VSM
EMPIRE
CL 16532095_083.eps
150801
Figure 5-17
5.
GB 59
GB 60
5.
Diagnostic Software and Faultfinding Trees
DVDR1000 /0x1 /691
5.5.10 Nucleus 909: System Audio Loop CINCH
Nucleus for testing the components on the audio signal path:
• The hostdecoder
• The analogue board
• The audio encoder
• The VSM
On the analogue board the audio is passed to the CINCH
connector, where a CINCH cable needs to be used to loop
back the audio signal to the digital board
NUCLEUS 909: SYSTEM AUDIO LOOP CINCH
CINCH OUT (NAFTA)
CINCH IN (NAFTA)
ANALOGUE BOARD
7507
STV6410
7002
7100
7004
DAC
ADC
connector
1900
connector
1602
connector
1900
DIGITAL BOARD
connector
1602
7552
7202
VIP
VIP_ICLK: 27MHz
STI 5505
7703
AUDIO ENCODER
7410
7100
VSM
EMPIRE
CL 16532095_084.eps
150801
Figure 5-18
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
5.6
Faultfinding Trees
5.6.1
General
PLAYBACK MODE
Plug Recorder
to the mains.
No disc loaded
Standby LED changes
from green to red.
Display shows time
NOK
Check PSU(see chapter 5.6.2)
Check Analog PCB(see chapter 5.6.4)
Check Front PCB(see chapter 5.6.5)
NOK
Check Trade Mode(see chapter 5.2.4)
Check Front PCB(see chapter 5.6.5)
Check Digital PCB(see chapter 5.6.3)
NOK
Check Front PCB(see chapter 5.6.5)
Check Basic Engine(see chapter 5.6.3)
NOK
Check Digital PCB(see chapter 5.6.3)
Check Basic Engine(see chapter 5.6.3)
NOK
Check Digital PCB(see chapter 5.6.3)
Check Analog PCB(see chapter 5.6.4)
OK
Press "STOP" button
Standby LED changes
from Red to Green.
Display shows successively
"READING"
"NO DISC"
OK
Press "OPEN/CLOSE" button
Display shows successively
"OPENING"
"TRAY OPEN"
Tray is open
OK
Insert DVD Disc
Press "OPEN/CLOSE" button
Display shows successively
"CLOSING"
"READING"
Recorder starts playback of
DVD-disc
OK
Audio & Video OK ?
OK
Playback DVD OK
CL 16532095_243.eps
170801
5.
GB 61
GB 62
5.
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
RECORD MODE
Insert DVDR Disc
Display shows:
- Disc content
- Source
- DVD+RW
- Disc Bar
NOK
- Check Basic Engine(see chapter 5.6.3)
OK
Press NEXT button to
select empty title
Press "RECORD" button
Recording starts
NOK
OK
- Check Analog PCB(see chapter 5.6.4)
- Check Digital PCB(see chapter 5.6.3)
- Check Basic Engine(see chapter 5.6.3)
- Check DVDR Disc
Press "STOP" button
Menu update
Check recorded title
NOK
- Check Basic Engine(see chapter 5.6.3)
- Check DVDR Disc
OK
Recording OK
CL 16532095_242.eps
170801
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
5.6.2
5.
GB 63
Power Supply
Remove all the connectors from the PSU
Check DC voltages on connector 0205:
+12Vstby, +5V2stby, -5Nstby, -Vgnstby, +33Vstby
None of the voltages are present
+12Vstby and +5V2stby are oke.
All voltages are present.
Check +12Vreg circuit:
- D6210, C2210, C2212
Check +Vreg circuit:
- D6240, C2240, C2242
Check Prot_3V3 circuit:
- D6215, C2214, C2215,
- R3520, R3521, D6520
Check +33Vstby circuit:
- D6200, C2200, R3200, D6201, R3201
Check -5Nstby circuit:
- D6220, C2220, IC7220, C2222, C2221
Check FLYB circuit:
- D6221, T7241, R3220, R3221, R3222,
R3223.
Check -Vgnstby circuit:
- D6230, C2230, R3230, D6231, R3233,
R3234, C2235.
Standby voltages are oke. Check DC
voltages on connectors 0207 and 0209.
Connector 0207:
+3V3, +5V, -5V, +12V.
Connector 0209:
+3V3, +12V, +5V, -5V, STBY_ctrl.
Connect PSU to a mains isolated variac.
Turn the input voltage up and measure
voltage across C2125. Do not exceed
max. mains voltage indicated on player.
This voltage must be +/- 1.41 x Vin AC.
If not oke, check supply path of failed
supply voltages.
Check if STBY_ctrl is LOW.
- Check standby control path via digital
board to analog board.
Check primary circuit:
- F1120, D6151, D6152, D6153, D6154,
- R3120, L5120, L5520, C2125.
If fuse 1120 is defective, always check
Q7125, D6145, T7140, Rsense (R3133,
R3134, R3135, R3136 and R3137).
Check with an oscilloscope Vds and Vg
of Q7125.
NO
Is PSU ticking?
YES
Check power switch circuit:
- Q7125, D6130, D3131, D6132
- D6145, D6146, L5125
- C2136
- R3131, R3132, R3133, R3134
- R3135, R3136, R3137, R3146
Check start-up circuit:
- R3125, R3126, R3141, R3132
- Q7125, L5131, R3150, C2146
Check +12V circuit:
must be present for the other voltages
- Q7511, T7512, D6511, D6512,
- R3511, R3513, R3514, L551, C2512.
Check +3V3 circuit:
- Q7520, Q7521, L5520, C2521, F1520,
- R3522, R3523, R3524, R3525, C2520.
Check +5V circuit:
- Q7501, Q7502, L5501, C2502, R3501
- R3502, R3503, R3504, C2540.
Check +3V3E circuit:
- Q7505, Q7506, D6505, L5505, C2506,
- R3505, R3506, R3507, R3508, C2502.
Check -5V circuit:
- Q7515, D6515, L5515, C2515, R3515.
If oke, the power supply seems to be ok.
Check the other boards in the player
for the cause of the overload.
Check Control circuit
- T7140, D6141, D6142, L5131,
- C2144, C2145, C2147, C2151
- R3151, R3147, R3148, R3150
Check Regulation circuit
- T7251, Q7200, R3250, R3253
- R3254, R3255, R3256, C2251
Check Overvoltage circuit
- T7142, D6143, D6144,
- R3149, R3144, C2152, C2142
Check Overload circuit
- T7141, T7143, R3145, R3143,
- R3142, C2143.
CL 16532095_085.eps
150801
Figure 5-19
GB 64
5.6.3
5.
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
Digital Board
Start-Up DSW
START UP DSW
NOT OK
OK
Check Power Supplies on con. 1900
(ION should be LOW)
NOK
- Check connection to PSU
- Check Power Supply
OK
Check that Sysclk_5505 on I819
appears earlier then Resetn_5505
is high on I202
NOK
- Check IC 7202
- Check IC 7916-C
- Check IC 7801
OK
Check VDD_STi(+3V3) on I272
Check VDDA(+3V3) on I275
Check VDDA_PCM(+3V3) on I252
NOK
- Check IC 7202
- Check R 3266
- Check L 5200, 5201 and 5202
OK
Check EMI_PROCCLK(50MHz)
on I181
NOK
- Check IC 7100
OK
Check if F201 is HIGH and I201 is LOW
Check if I208 is LOW and I209 is HIGH
NOK
- Check IC 7202
- Check L 5200
OK
Check TCK (HIGH) on I247
Check TDI (HIGH) on I248
Check TMS (HIGH) on I249
Check TRST (LOW) on I250
NOK
- Check IC 7202
OK
Check if service pin is LOW on testpoint I207
NOK
- Check Jumper 4206
OK
Check VDD_MEM(+3V3) on I306
Check VDD_MEM1(+3V3) on I310
NOK
- Check L 5300
- Check L 5302
NOK
- Check L 5100
- Check L 5101
NOK
- Check IC 7202
- Check IC 7305
OK
Check VCC3_VSM(+3V3) on I100
Check VCC3_VSM_MEM(+3V3) on I141
OK
Check LOW pulses on EMI_CE3n
on pin 126 of IC 7202
OK
Check activity on EMI_CE3n(pin1 of IC 7305)
Check activity on ROMH_CEn(pin6 of IC 7305)
Check activity on EMI_OEn(pin29 of IC 7301)
NOK
- Check IC 7305
- Check IC 7301
- Check IC 7202
OK
Check if FLASH_OEn is LOW on I245
Check if EMI_RWn is HIGH(pin133 of IC7202)
NOK
- Check IC 7202
- Check IC 7302 and IC 7304
- Check IC 7100
OK
Check for short circuits or open circuits on the
IC pins which are connected to the EMI-bus
OK
START UP DSW
OK
CL 16532095_086.eps
150801
Figure 5-20
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
5.
GB 65
Power Part Check
POWER PART CHECK DIGITAL BOARD
USE DIGITAL BOARD CIRCUIT DIAGRAMS 1 2, 3, 4, 5, 7 AND 8 AND DIGITAL BOARD BOTTOM VIEW TESTPOINTS
Power On and exit
stand-by mode
OK
Check +3V3 on Testpoints I901, I902 and I903
Check +12V on Testpoint I907
Check +5V on Testpoint I906
Check -5V on Testpoint I908
NOK
- Check connection to PSU
- Check PSU
OK
NOK
Vcc3_VSM(+3V3) on testpoint I100
Vcc3_VSM_mem(+3V3) on testpoint I141
Vdd_sti(+3V3) on tespoint I272
check L5100
NOK
NOK
check L5101
check L5200
OK
NOK
Vdd_mem(+3V3) on testpoint I306
check L5300
NOK
Vdd_mem1(+3V3) on testpoint I310
check L5302
NOK
Vdd_mem2(+3V3) on testpoint I307
check L5301
OK
NOK
Vcc_VE__mem(+3V3) on tespoint I410
check L5400
NOK
Vcc_VE_mem_2(+3V3) on tespoint I413
check L5404
NOK
Vdd_Empire(+3V3) on tespoint I402
check L5402
OK
NOK
VDDA_7118(+3V3) on testpoint I592
VDDA_1A(+3V3) on testpoint I585
VDDA_2A(+3V3) on testpoint I586
VDDA_3A(+3V3) on testpoint I587
VDDA_4A(+3V3) on testpoint I588
check L5558
NOK
check L5552
NOK
check L5553
NOK
check L5554
NOK
check L5555
OK
NOK
VDDE_7118(+3V3) on testpoint I591
VDDI_7118(+3V3) on testpoint I590
VDD_LVC32(+3V3) on testpoint I589
check L5557
NOK
check L5556
NOK
check L5560
OK
VDSP(+3V3) on testpoint I705
NOK
VDDS_OSC(+5V) on tespoint I822
VDD5_MK2703(+5V) on testpoint I823
VCC5_4046(+5V) on testpoint I824
VCC3_CLK_BUF(+3V3) on testpoint I825
check L5701
NOK
NOK
NOK
NOK
check L5803
check L5805
check L5813
check L5807
OK
Power Part OK
CL 16532095_087.eps
150801
Figure 5-21
GB 66
5.
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
Reset and Clock Check
RESET & CLOCK CHECK DIGITAL BOARD
USE DIGITAL BOARD CIRCUIT DIAGRAMS 1,2,7 AND 8 AND DIGITAL BOARD BOTTOM VIEW TESTPOINTS
Power on and exit
stand-by mode
Resetn_5505(+3V3) on testpoint I202
Resetn_VIP(+3V3) on pin 6 of IC7916
Resetn_VSM(+3V3) on testpoint I111
NOK
- Check IC7913, IC7916 and IC7918
- Check R4918, R4919 and R4920
- Check IC7202 and IC7100
OK
Resetn_BE(+3V3) on testpoint I916
Resetn_DSP(+3V3) on testpoint I913
Resetn_DVIO(+3V3) on testpoint I578
NOK
- Check IC7913
- Check IC7918
- Check R3927
OK
Sysclk_VSM(27MHz) on testpoint I817
Sysclk_5505(27MHz) on testpoint I819
27M_clk_PS(27MHz) on testpoint I821
NOK
- Check Oscillator 7802
- Check IC7801
- Check R3807, R3803 and R3819
OK
acc_aclk_pll(12MHz) on testpoint I803
NOK
- Check Oscillator 7802
- Check IC7800 and 7801
- Check R3802
OK
EMI_PROCCLK(50MHz) on testpoint I181
NOK
- Check IC7202
- Check R3208
- Check IC7100
OK
DSP_clk(8MHz) on testpoint I710
NOK
- Check IC7704
- Check IC7703
- Check R4700
OK
VIP_ICLK(27MHz) on testpoint I101
NOK
- Check IC7552
- Check IC7100
- Check R3554
OK
VSM_M_CLKOUT(27MHz) on testpoint I188
NOK
- Check IC7100
- Check IC7202
- Check R3208
OK
Reset- & clock signals are OK
Figure 5-22
CL 16532095_088.eps
150801
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
DSW Memory Tests
DSW MEMORY TESTS
Start Diagnostic Software
and select Command mode
Flash Checksum
Command: 100
NOK
- Check IC 7302
- Check IC 7304
NOK
- Check IC 7300
- Check IC 7301
NOK
- Check IC 7306
- Check IC 7307
NOK
- Check I2C-signals
- Check NVRAM
OK
DRAM Test
Command: 106
OK
SDRAM Test
Command: 104
OK
NVRAM I2C Test
Command: 123
NVRAM Write Read Test
Command: 122
OK
MEMORY PART OK
CL 16532095_089.eps
150801
Figure 5-23
5.
GB 67
GB 68
5.
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
DSW VSM Tests
DSW VSM TESTS
Start Diagnostic Software
and select Command mode
VSM Interconnection Test
Command: 304
NOK
- Check IC 7100
OK
VSM SDRAM Test
Command: 302
NOK
- Check IC 7101
OK
VSM Interrupt Test
Command: 303
NOK
- Check IC 7100
- Check IC 7202
OK
VSM PART OK
CL 16532095_090.eps
150801
Figure 5-24
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
DSW Audio Video Encoder Tests
DSW AUDIO VIDEO ENCODER TESTS
Start Diagnostic Software
and select Command mode
Video Encoder I2C Test
Command: 200
NOK
- Check IC 7202
- Check IC 7410
NOK
- Check IC 7202
- Check IC 7703
OK
Audio Encoder I2C Test
Command: 207
OK
Audio Encoder Access Test
Command: 204
NOK
- Check IC7703
OK
Audio Encoder SRAM Write Read
Command: 205
NOK
- Check IC 7703
- Check IC 7700, IC7701
and IC7702
OK
Audio Encoder Interrupt Test
Command: 206
NOK
- Check IC 7703
- Check IC 7100
- Check IC7202
OK
I2C SAA7118 Test
Command: 202
NOK
- Check IC 7552
- Check IC 7202
OK
AUDIO ENCODER PART OK
CL 16532095_091.eps
150801
Figure 5-25
5.
GB 69
GB 70
5.
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
DSW Audio Part Check
DSW AUDIO PART CHECK
Start Diagnostic Software
and select Command mode
Audio Clock Test
Command: 1400
Measure ACC_ACLK_PLL on I803
(11.289MHz)
NOK
- Check IC 7202
- Check IC 7917
- Check IC 7800
OK
Audio Clock Test
Command: 1401
Measure ACC_ACLK_PLL on I803
(12.288MHz)
NOK
- Check IC 7202
- Check IC 7917
- Check IC 7800
OK
Check AD_CLK on testpoint I256
NOK
- Check IC 7103
OK
Host Pink Noise ON
Command: 115
Check AD_BCLK(3.072MHz) on pin14 of con.1602
Check AD_WCLK(48KHz) on pin12 of con.1602
Check AD_ACLK(12.288MHz) on pin9 & 16 of con.1602
Check AD_DATAO(Activity) on pin11 of con.1602
Check AD_SPDIF(Activity) on pin2 of con.1602
NOK
- Check IC 7103
- Check IC 7202
NOK
- Check IC 7103
- Check IC 7202
NOK
- Check IC 7100
- Check IC 7703
NOK
- Check IC 7100
- Check IC 7703
OK
Host Pink Noise OFF
Command: 116
Check AD_BCLK(3.072MHz) on pin14 of con.1602
Check AD_WCLK(48KHz) on pin12 of con.1602
Check AD_ACLK(12.288MHz) on pin9 & 16 of con.1602
Check AD_DATAO(No Activity) on pin11 of con.1602
Check AD_SPDIF(No Activity) on pin2 of con.1602
OK
Audio I2S Encoding Path Test
Command: 900
Check AE_BCLK(3.072MHz) on pin21 of con.1602
Check AE_WCLK(48KHz) on pin20 of con.1602
Check AE_DATAI(Activity) on pin18 of con.1602
Check AE_DATAO(Activity) on testpoint I155
OK
Video Encoding Path Test
Command: 902
Check VIP_ICLK(27MHz) on testpoint I101
Check VIP_VS(50Hz) on testpoint I401
Check VE_DSn(Activity) on testpoint I104
Check VE_DTACKn(Activity) on testpoint I414
OK
Mute ON Test --> Command: 109
Check Mute level(high) on testpoint I609
Mute OFF Test --> Command: 110
Check Mute Level(low) on testpoint I609
NOK
- Check IC 7917
OK
AUDIO PART OK
CL 16532095_092.eps
150801
Figure 5-26
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
DSW Video Part Check
DSW VIDEO PART CHECK
Start Diagnostic Software
and select Command mode
Gateway Test to Analog Board
Command: 700
NOK
- Check Analog Board
- Check IC 7100
OK
Color Bar ON Test
Command: 120
OK
Check Red Video Out on pin 5 of con.1601
Check Green Video Out on pin 3 of con.1601
Check Blue Video Out on pin 1 of con.1601
Check CVBS Video Out on pin 11 of con.1601
Check Y-Video Out on pin 9 of con.1601
Check C-Video Out on pin 7 of con.1601
NOK
- Check T7600, T7606, T7610
T7615, T7620 and T6725
- Check IC 7202
OK
Check HSYNC on testpoint I274
Check VSYNC on testpoint I273
NOK
- Check IC 7202
OK
Color Bar OFF Test
Command: 121
OK
VBI(Vertical Blanking Interval) Loopback Test
Command: 903
Check the Color Bar on the TV creen
NOK
- Check IC 7202
- Check IC 7552
- Check IC 7100
OK
VIDEO PART OK
CL 16532095_093.eps
150801
Figure 5-27
5.
GB 71
GB 72
5.
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
DSW Basic Engine Check
DSW BASIC ENGINE TESTS
Start Diagnostic Software
and select Command mode
Basic Engine S2B Echo Test
Command: 601
NOK
- Check IC 7202
- Check Basic Engine
OK
Basic Engine Tray Open Test
Command: 616
NOK
- Check Basic Engine
OK
Insert a DVDRW video disc
OK
Basic Engine Tray Close Test
Command: 615
NOK
- Check Basic Engine
OK
Basic Engine S2B Write Read Test
Command: 617
NOK
- Check Basic Engine
- Check IC 7100
OK
BASIC ENGINE PART OK
CL 16532095_094.eps
150801
Figure 5-28
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
Waveforms
Waveforms Digital Board
I817
Sysclk_VSM
2V / div DC
I821
20ns / div
I803
20ns / div
I101
2V / div DC
I710
10ns / div
2V / div DC
VIP_ICLK
I188
20ns / div
2V / div DC
20ns / div
acc_aclk_pll
2V / div DC
EMI_PROCCLK
2V / div DC
Sysclk_5505
2V / div DC
27M_clk_PS
2V / div DC
I181
I819
50ns / div
DSP_clk
10ms / div
VSM_M_CLK
20ns / div
CL 16532095_095.eps
150801
Figure 5-29
5.
GB 73
GB 74
5.
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
Waveforms Digital Board
AD_WCLK; AE_WCLK
2V / div AC
10us / div
AD_DATAO; AE_DATAO; AE_DATAI
2V / div AC
5us / div
R_OUT
200mV / div AC
I273
2V / div DC
2V / div AC
200ns / div
AD_SPDIF
2V / div AC
250ns / div
G_OUT
20us / div
CVBS_OUT
200mV / div AC
AD_BCLK; AE_BCLK
20us / div
VSYNC
20ms / div
200mV / div AC
I274
2V / div DC
2V / div AC
I401
50ns / div
VIP_VS
2V / div DC
5ms / div
B_OUT
20us / div
Y_OUT
200mV / div AC
AD_ACLK
200mV / div AC
20us / div
C_OUT
20us / div
200mV / div AC
20us / div
HSYNC
20ms / div
Figure 5-30
CL 16532095_096.eps
150801
MP
F800
F3201
F3202
F3203
F3204
F3205
F3206
F3207
F0017
F0001
F803
F900
F902
F8111
F303
F9336
F8105
F8107
F810
F811
F8104
F8101
F8110
F5306
F8102
F8202
F8203
F8204
F8205
F8108
F8109
F8201
F513
F517
F519
F534
F525
F5001
F5003
F5004
F5019
F5021
F516
F518
F531
X
Y
Signal
Signal
Name
Description
F_MODE
Fact. Mode
12V
12 V Supply
5V
5 V Supply
5NSTBY
5 V Supply
VGNSTBY
Supply GND
33STBY
33 V Supply
FLYB
Controls PS
GNDA
Ground Analogue
3VD
3V3 Supply
GNDD
Ground Digital
INT Clock
Clock Adjust
5STBY2
5V AIO
IReset
Inverse Reset
5M
5 V Motor
5SW
5SW
8SW
8SW
SDA
IIC1
SCL
IIC1
SCL1
IIC2
SDA1
IIC2
IPOR1
IPOR to DC
12STBY
12 V to DC
5STB
5 V to DC
8SW
8 SW to FRONT
VGNSTBY
VGN to DC
A_DATA
To DIGI
D_DATA
To DIGI
A_RDY
To DIGI
D_RDY
To DIGI
INT
TO DC
RC
TO DC
IRESET_DIG
TO DIGI
GNDA
SC1 GND A
ARIn_SC1
SC1 A R IN
ALIn_SC1
SC1 A L IN
YCVBSIN_SC1
SC1 Y IN
GNDV
SC1 GND V
AROut_SC2
SC2 A R Out
ALOutSC2
SC2 A L Out
GNDA
SC2 GND A
YCVBSOut_SC2
SC2 Y Out
GNDV
SC2 GND V
AROut_SC1
SC1 A R Out
ALOutSC1
SC1 A L Out
YCVBSOut_SC1
SC1 Y Out
Signal
Type
Condition
PS IN
PS IN
PS IN
PS IN
PS IN
DC Gen
GND
PS IN
GND
Count Out
DC Out
DC Out *
DC Out
DC Out
DC Out
IIC IO
IIC IO
IIC IO
IIC IO
DC OUT
DC Out
DC Out
DC Out
GND
DC IN
DC IN
DC IN
DC IN
DC IN
DC IN
DC IN
DC IN
NF IN
NF IN
V IN
GND
NF Out
NF Out
GND
V Out
GND
NF Out
NF Out
V Out
Part
AIO1
1932 1
1932 2
1932 3
1932 4
1932 5
1932 6
1932 7
1900 17
1900 01
7811 7
7803 12
7803 115
1987 12
7703 21
2321
1981 6
1981 8
3804
3805
1981 5
1981 2
1981 11
1953 6
1981 3
1982 2
1982 3
1982 4
1982 5
1981 9
1981 10
1982 1
1950 4A
1950 2A
1950 6A
1950 20A
1950 21A
1950 1B
1950 3B
1950 4B
1950 19B
1950 21B
1950 1A
1950 3A
1950 19A
Schematics
Name Coord.
AIO1 C10
PS
C1
PS
C1
PS
C1
PS
C1
PS
D1
PS
D1
PS
D1
DAC B1
DAC E1
AIO1 H5
AIO2 D3
AIO2 D2
AIO1 F14
TU B10
PS
B6
AIO1 E13
AIO1 E13
AIO1 A9
AIO1 A9
AIO1 E13
AIO1 D13
AIO1 F13
IO1
I1
AIO1 E13
AIO1 H13
AIO1 H13
AIO1 H13
AIO1 H13
AIO1 F13
AIO1 F13
AIO1 H13
IO1 E14
IO1 E13
IO1 E14
IO1 I13
IO1 H14
IO4
C9
IO4
C9
IO4
C9
IO4
C9
IO4
C9
IO1 E14
IO1 E14
IO1 G13
MP
F5002
F5006
F5020
F536
F521
F515
F524
F527
F530
F5007
F5008
F5011
F5015
F5016
F5401
F5402
F5403
F5405
F5407
F5409
F5412
F5414
F5416
F5418
F5420
F5422
F5301
F5303
F5304
F5307
F5309
F012
F013
F014
F0002
F0003
F0005
F0007
F0009
F0011
F0012
F0014
F0016
F010
F011
F331
F334
F336
X
Y
Signal
Name
ARIn_SC2
ALIn_SC2
YCVBSIN_SC2
BC_SC1
8_SC1
P50_SC1
Gout_SC1
RCOut_SC1
FBOut_SC1
BC_SC2
8_SC2
Gin_SC2
RCin_SC2
FBin_SC2
A_V
GNDV
A_U
A_Y
A_C
A_YCVBS
D_CVBS
D_Y
D_C
D_R
D_G
D_B
AFCRI
AFCLI
CVBSFIN
CFIN
YFIN
DAINOPT
DAINCOAX
DAOUT
A_BCLK
A_WCLK
A_DAT
A_PCMCLK
D_BCLK
D_WCLK
D_DATA0
D_PCMCLK
D_KILL
ARDAC
ALDAC
RCALOut
RCAROut
RCVBSOut
Signal
Description
SC2 A R IN
SC2 A L IN
SC2 Y IN
SC1 BC
SC1 Pin 8
SC1 P50
SC1 G Out
SC1 RC Out
SC1 FB Out
SC2 B IN C Out
SC2 Pin 8
SC2 G In
SC2 RC In
SC2 FB In
A_V to DIGI
GNDV to DIGI
A_U to DIGI
A_Y to DIGI
A_C to DIGI
AYCVBS to DIGI
D_CVBS f. DIGI
D_Y f. DIGI
D_C f. DIGI
D_T f. DIGI
D_G f. DIGI
D_B f. DIGI
A R from FC
A L from FC
CVBS from FC
C from FC
Y from FC
A D Opt to DIGI
A D Coax to DIGI
A D from DIGI
BCLK from DIGI
WCLK from DIGI
A Data to DIGI
PCMCLK from DIGI
BCLK from DIGI
WCLK from DIGI
A Data from DIGI
PCMCLK from DIGI
A Kill from DIGI
A R from DAC
A L from DAC
A L Rear Cinch Out
A R Rear Cinch Out
V Rear Cinch Out
Figure 5-31
CLK In
CLK In
Data Out
CLK In
CLK In
CLK In
Data In
CLK In
DC In
NF Out
NF Out
NF Out
NF Out
V Out
Signal
Type
NF IN
NF IN
Sin IN
Sin Out*
DC Out
DC Out
Sin Out
Sin Out
DC Out
Sin In*
DC Out
Sin In
Sin In
DC In
Sin Out
GND
Sin Out
V Out
Sin Out
V Out
V In
V In
Sin In
Sin In
Sin In
Sin In
NF In
NF In
V In
Sin In
V In
Part
1950 2B
1950 6B
1950 20B
1950 7A
1950 8A
1950 10A
1950 11A
1950 15A
1950 16A
1950 7B
1950 8B
1950 11B
1950 15B
1950 16B
1954 01
1954 02
1954 03
1954 05
1954 07
1954 09
1954 12
1954 14
1954 16
1954 18
1954 20
1954 22
1953 1
1953 3
1953 4
1953 7
1953 9
1900 20
1900 21
1900 20
1900 2
1900 3
1900 5
1900 7
1900 9
1900 11
1900 12
1900 14
1900 16
7002 1
7002 7
1958 4B
1958 5B
1959 1B
Schematics
Name Coord.
IO4
C9
IO4
C9
IO4
F9
IO1 E13
IO1 F13
IO1 F14
IO1 F13
IO1 G14
IO1 H13
IO4
D9
IO4
D9
IO4
D9
IO4
E9
IO4
E9
IO1
I3
IO1
I4
IO1
I4
IO1
I4
IO1
I4
IO1
I4
IO1
I5
IO1
I5
IO1
I5
IO1
I6
IO1
I6
IO1
I6
IO1
I1
IO1
I1
IO1
I1
IO1
I2
IO1
I2
DAC A1
DAC A1
DAC A1
DAC E2
DAC D2
DAC D2
DAC D2
DAC D2
DAC D2
DAC C2
DAC C2
DAC C2
DAC C9
DAC E9
IO3
E9
IO3
E9
IO3
C9
5.6.4
Measurement Point Overview for EURO
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
5.
GB 75
Analogue Board
Measurement Points Overview
CL 16532095_097.eps
150801
X
Y
Signal
Name
ARCRI
ARCLI
RCVBSIn
RSVHSYIn
RSVHSCIn
RSVHSYOut
RSVHSCOut
DVAR
GNDA
DVAL
IF
IF In
GNDFV
GNDFV
40.4
AGC
SYNC
DIG OUT L
DIG OUT H
OPT OUT
FAN OUT
FAN IN
ION
BE_FAN
FB
GNDD
Signal
Description
A L Rear Cinch In
A R Rear Cinch In
V Rear Cinch In
Y Rear SVHS In
C Rear SVHS In
Y Rear SVHS Out
C Rear SVHS Out
A R from DIGI
GNDA
A L from DIGI
IF Out
IF In
GND FV
GND FV
40.4 Trap
AGC
SYNC from Sepa.
Digital Out Low
Digital Out High
Optical Out
FAN Out
FAN In
ION_FAN
BE_FAN
FBIN SC2
GNDD
Signal
Type
NF In
NF In
V In
V In
Sin In
V Out
Sin Out
Sin In
GND
Sin In
DC Out
Sin In
GND
GND
Sin Out
DC Out
Freq Out
GND
Sin Out
DC Out
DC Out
DC In
DC Out
DC Out
DC Out
GNDD
Part
1958 1A
1958 2A
1959 2A
1955 3B
1955 4B
1955 3A
1955 4A
1960 1
1960 2
1960 4
1705 11
1705 11
1705 12
1700 3
1700 1
3701
7803 33
1954 2
1945 3
1943 1
1984 1
1985 1
1982 6
1982 8
1982 9
1982 10
Schematics
Name Coord.
IO2
D2
IO2
E2
IO2
C2
IO2
B2
IO2
B2
IO3
A9
IO3
A9
AP
D1
AP
D1
AP
D1
TU
C3
TU
C3
TU
C2
TU
B6
TU
B5
TU
A4
AIO1 F6
DIGI B4
DIGI A4
DIGI D3
FACO C5
FACO F1
AIO1 H13
AIO1 I13
AIO1 I13
AIO1 I13
MP
F800
F3201
F3202
F3203
F3204
F3205
F3206
F3207
F0017
F0001
F803
F900
F902
F8111
F303
F9336
F8105
F8107
F810
F811
F8104
F8101
F8110
F5306
F8102
F8202
F8203
F8204
F8205
F8108
F8109
F8201
F5103
F5101
F5906
F5806
F510
F509
F5201
F5105
F5104
F5202
F5905
F5801
F5805
F5802
X
Y
Signal
Name
F_MODE
12V
5V
5NSTBY
VGNSTBY
33STBY
FLYB
GNDA
3VD
GNDD
INT Clock
5STBY2
IReset
5M
5SW
8SW
SDA
SCL
SCL1
SDA1
IPOR1
12STBY
5STB
8SW
VGNSTBY
A_DATA
D_DATA
A_RDY
D_RDY
INT
RC
IRESET_DIG
ARIn_2
ALIn_2
GNDV
GNDV
ARout_1
ALout_1
RCVBSOut2
ARIn_1
ALIn_1
RCVBSIn
Y_OUT
U_IN
Y_IN
V_IN
Signal
Description
Fact. Mode
12 V Supply
5 V Supply
5 V Supply
Supply GND
33 V Supply
Controls PS
Ground Analogue
3V3 Supply
Ground Digital
Clock Adjust
5V AIO
Inverse Reset
5 V Motor
5SW
8SW
IIC1
IIC1
IIC2
IIC2
IPOR to DC
12 V to DC
5 V to DC
8 SW to FRONT
VGN to DC
To DIGI
To DIGI
To DIGI
To DIGI
TO DC
TO DC
TO DIGI
A R IN 2
A L IN 2
GND V
GND V
A R Out 1
A L Out 1
SC1 Y Out
A R IN 1
A L IN 1
Y IN
Y Out
U IN
Y IN
V IN
Signal
Type
Condition
PS IN
PS IN
PS IN
PS IN
PS IN
DC Gen
GND
PS IN
GND
Count Out
DC Out
DC Out *
DC Out
DC Out
DC Out
IIC IO
IIC IO
IIC IO
IIC IO
DC OUT
DC Out
DC Out
DC Out
GND
DC_In
DC_In
DC_In
DC_In
DC_In
DC_In
DC_In
NF IN
NF IN
GND
GND
NF Out
NF Out
V Out
NF IN
NF IN
Sin IN
Sin Out*
Sin In*
Sin In
Sin In
Part
AIO1
1932 1
1932 2
1932 3
1932 4
1932 5
1932 6
1932 7
1900 17
1900 01
7811 7
7803 12
7803 115
1987 12
7703 21
2321
1981 6
1981 8
3804
3805
1981 5
1981 2
1981 11
1953 6
1981 3
1982 2
1982 3
1982 4
1982 5
1981 9
1981 10
1982 1
1958 3A
1958 1A
1957 6A
1956 6A
1959 5B
1959 4B
1997 1B
1959 1A
1959 4A
1997 2A
1957 5A
1956 1B
1956 5A
1956 2B
Schematics
Name Coord.
AIO1 C10
PS
C1
PS
C1
PS
C1
PS
C1
PS
D1
PS
D1
PS
D1
DAC B1
DAC E1
AIO1 H5
AIO2 D3
AIO2 D2
AIO1 F14
TU B10
PS
B6
AIO1 E13
AIO1 E13
AIO1 A9
AIO1 A9
AIO1 E13
AIO1 D13
AIO1 F13
IO1
I1
AIO1 E13
AIO1 H13
AIO1 H13
AIO1 H13
AIO1 H13
AIO1 F13
AIO1 F13
AIO1 H13
IO3 E13
IO3 E14
IO1 H12
IO1
I8
IO1 E13
IO1 D13
IO3
A8
IO2
E2
IO2
E2
IO2
C2
IO1 I12
IO1 I10
IO1
I9
IO1 I10
5.
DVDR1000 /0x1 /691
Figure 5-32
Remark:
Indicator * means more than one signal type
MP
F5101
F5103
F5202
F5503
F5504
F338
F337
F6001
F6002
F6004
F700
F701
F702
F703
F704
F705
F812
F4202
F4203
F4204
F806
F807
F8206
F8208
F8209
F8210
Measurement Point Overview for NAFTA
GB 76
Diagnostic Software and Faultfinding Trees
CL 16532095_098.eps
150801
MP
F5401
F5402
F5403
F5405
F5407
F5409
F5412
F5414
F5416
F5418
F5420
F5422
F5301
F5303
F5304
F5307
F5309
F012
F013
F014
F0002
F0003
F0005
F0007
F0009
F0011
F0012
F0014
F0016
F010
F011
F513
F512
F5205
F5503
F5504
F338
F337
F6001
F6002
F6004
F700
F701
F702
F703
F705
F812
F330
X
Y
Signal
Name
A_V
GNDV
A_U
A_Y
A_C
A_YCVBS
D_CVBS
D_Y
D_C
D_R
D_G
D_B
AFCRI
AFCLI
CVBSFIN
CFIN
YFIN
DAINOPT
DAINCOAX
DAOUT
A_BCLK
A_WCLK
A_DAT
A_PCMCLK
D_BCLK
D_WCLK
D_DATA0
D_PCMCLK
D_KILL
ARDAC
ALDAC
ALOut_2
AROut_2
RCVBSOut1
RSVHSYIn
RSVHSCIn
RSVHSYOut
RSVHSCOut
DVAR
GNDA
DVAL
IF
IF In
GNDFV
GNDFV
AGC
SYNC
RC IN
Signal
Description
A_V to DIGI
GNDV to DIGI
A_U to DIGI
A_Y to DIGI
A_C to DIGI
AYCVBS to DIGI
D_CVBS f. DIGI
D_Y f. DIGI
D_C f. DIGI
D_T f. DIGI
D_G f. DIGI
D_B f. DIGI
A R from FC
A L from FC
CVBS from FC
C from FC
Y from FC
A D Opt to DIGI
A D Coax to DIGI
A D from DIGI
BCLK from DIGI
WCLK from DIGI
A Data to DIGI
PCMCLK from DIGI
BCLK from DIGI
WCLK from DIGI
A Data from DIGI
PCMCLK from DIGI
A Kill from DIGI
A R from DAC
A L from DAC
A L Rear Out 2
A R Rear Out 2
V Rear Cinch Out1
Y Rear SVHS In
C Rear SVHS In
Y Rear SVHS Out
C Rear SVHS Out
A R from DIGI
GNDA
A L from DIGI
IF Out
IF In
GND FV
GND FV
AGC
SYNC from Sepa.
Remote Control In
Part
1954 01
1954 02
1954 03
1954 05
1954 07
1954 09
1954 12
1954 14
1954 16
1954 18
1954 20
1954 22
1953 1
1953 3
1953 4
1953 7
1953 9
1900 20
1900 21
1900 20
CLK In 1900 2
CLK In 1900 3
Data Out 1900 5
CLK In 1900 7
CLK In 1900 9
CLK In 1900 11
Data In 1900 12
CLK In 1900 14
DC In 1900 16
NF Out 7002 1
NF Out 7002 7
NF Out 1958 4B
NF Out 1958 5B
V Out 1997 5C
V In
1955 3B
Sin In 1955 4B
V Out 1955 3A
Sin Out 1955 4A
Sin In
1960 1
GND
1960 2
Sin In
1960 4
DC Out 1705 11
Sin In 1705 11
GND
1705 12
GND
1700 3
DC Out
3701
Freq Out 7803 33
DC Out 1993 2
Signal
Type
Sin Out
GND
Sin Out
V Out
Sin Out
V Out
V In
V In
Sin In
Sin In
Sin In
Sin In
NF In
NF In
V In
Sin In
V In
Schematics
Name Coord.
IO1
I3
IO1
I4
IO1
I4
IO1
I4
IO1
I4
IO1
I4
IO1
I5
IO1
I5
IO1
I5
IO1
I6
IO1
I6
IO1
I6
IO1
I1
IO1
I1
IO1
I1
IO1
I2
IO1
I2
DAC A1
DAC A1
DAC A1
DAC E2
DAC D2
DAC D2
DAC D2
DAC D2
DAC D2
DAC C2
DAC C2
DAC C2
DAC C9
DAC E9
IO1 B13
IO1 C13
IO3
A8
IO2
B2
IO2
B2
IO3
A9
IO3
A9
AP
D1
AP
D1
AP
D1
TU
C3
TU
C3
TU
C2
TU
B6
TU
A4
AIO1 F6
IO3
E2
X
Y
Signal
Name
DIG OUT L
DIG OUT H
OPT OUT
FAN OUT
FAN IN
ION
BE_FAN
FB
GNDD
Remark:
Indicator * means more than one signal type
MP
F4202
F4203
F4204
F806
F807
F8206
F8208
F8209
F8210
Signal
Description
Digital Out Low
Digital Out High
Optical Out
FAN Out
FAN In
ION_FAN
BE_FAN
FBIN SC2
GNDD
Signal
Type
GND
Sin Out
DC Out
DC Out
DC In
DC Out
DC Out
DC Out
GNDD
Part
1954 2
1945 3
1943 1
1984 1
1985
1982 6
1982 8
1982 9
1982 10
Schematics
Name Coord.
DIGI B4
DIGI A4
DIGI D3
FACO C5
FACO F1
AIO1 H13
AIO1 I13
AIO1 I13
AIO1 I13
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
Figure 5-33
5.
CL 16532095_099.eps
150801
GB 77
GB 78
5.
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
Power Part Check
RESET AND CLOCK CHECK ANALOG BOARD
Check internal Power supply voltages
5M on testpoint F9340
NOK
check Fuse 1327
12STBY on testpoint F810
NOK
check Fuse 1326
NOK
check IC 7332
NOK
check
NOK
check Fuse 1325
NOK
check
8STBY on pin 3 of IC7332
8SW on testpoint F9336
5STBY on testpoint F9333
5SW on testpoint F303
5STBY2 on testpoint F900
5STBY_uP on IC7803
NOK
NOK
- ISTBY HIGH?
- T7329, T7324, MOSFET7321
- ISTBY HIGH?
- T7329, T7324, MOSFET7323
check L5901, IC7900
check L5903, IC7803
OK
Power Part OK
Figure 5-34
CL 16532095_100.eps
150801
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
DSW Check Analogue Board
DSW CHECK ANALOGUE BOARD
Start Diagnostic Software
and select Command mode
Echo Test Analogue Board
Command: 700
NOK
- Check Reset signal(+5V) on F902
- Check Clock(20MHz) on I915
- Check connection to Digital Board
- Check IC 7803
OK
Boot Code Version Test
Command: 703
Analogue Flash Checksum Test
Command: 724
NOK
- Check IC 7906
OK
Hardware Version Check
Command: 704
NOK
- Check IC 7906
OK
Clock Adjust Test
Command: 705 2001 07 16 09 15 45
NOK
(YYYY MM DD HH MM SS)
- Check IC 7811
- Check x-tal 1602
OK
Tuner Test
Command: 706
NOK
- Check tuner 1705
OK
Frequency Download Test
Command: 707
NVRAM Test
Commdo: 711
NOK
- Check IC 7815
OK
Data Slicer Test
Command: 708
NOK
- Check IC 7990
OK
Sound Processor Test
Command: 709
NOK
- Check IC 7600
OK
Audio Video Selector Test
Command: 710
NOK
- Check IC 7507
OK
DCW CHECK ANALOGUE
BOARD OK
CL 16532095_101.eps
150801
Figure 5-35
5.
GB 79
GB 80
5.
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
Routing Audio and Video
This nucleus routes the video signals on the analogue board
to the destination determined by the input parameters
The paths that are available for video routing and their
description(Europe version)
Route Video
Nucleus Number: 712
Description
PATH ID
00
DESCRIPTION
Input signal is VIDEO(CVBS) from digital board and will be re-routed back to
the digital board.
Input signal is from FRONT VIDEO(CVBS) IN and will be routed to the digital
board.
Input signal is from REAR VIDEO(CVBS) IN and will be routed to the digital
board.
Input signal is from FRONT S-VIDEO(Y/C) and will be routed to the digital
board.
Input signal is from REAR S-VIDEO(Y/C) and will be routed to the digital
board.
Input signal is CVBS from SCART1 and will be routed to the digital board.
Input signal is CVBS from SCART2 and will be routed to the digital board.
No routing.
Input signal is VIDEO(CVBS) from ANTENNA IN and will be routed to
SCART1.
Input signal is VIDEO(CVBS) from SCART1 and will be routed to SCART2.
Input signal is VIDEO(CVBS) from SCART2 and will be routed to SCART1.
No routing.
Input signal is from REAR VIDEO(CVBS) IN and will be routed to SCART1 and
SCART2.
Input signal is from FRONT VIDEO(CVBS) IN and will be routed to SCART1.
Input signals VIDEO(CVBS and Y/C) from SCART 1 will be routed to SCART2.
Input signal is from REAR S-VIDEO(Y/C) IN and will be routed to SCART2.
Input signal is from FRONT S-VIDEO(Y/C) IN and will be routed to SCART2.
No routing
No routing
Input signals VIDEO(RGB and FAST BLANKING) from SCART2 will be routed
to the corresponding pins of SCART1.
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
CL 16532095_064.pdf
140801
The paths that are available for video routing and their
description (Nafta region)
Path ID
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
Description
Input signal is VIDEO(CVBS) from digital board and will be re-routed back to
the digital board.
Input signal is from FRONT VIDEO(CVBS) IN and will be routed to the digital
board.
Input signal is from REAR VIDEO(CVBS) IN and will be routed to the digital
board.
Input signal is from FRONT S-VIDEO(Y/C) IN and the signal received will be
routed to the digital board.
Input signal is from REAR S-VIDEO(Y/C) IN and will be routed to the digital
board.
Input signal is from YUV IN and will be routed to the digital board.
No routing.
No routing.
Input signal is VIDEO(CVBS) from ANTENNA IN and will be routed to
VIDEO(CVBS) OUT and .
Input signal is from YUV IN and will be routed to YUV OUT.
No routing.
No routing.
Input signal is from REAR VIDEO(CVBS) IN and will be routed to REAR
VIDEO(CVBS) OUT.
Input signal is from FRONT VIDEO(CVBS) IN and will be routed to REAR
VIDEO(CVBS) OUT.
Input signal is from REAR S-VIDEO(Y/C) IN and will be routed to REAR SVIDEO(Y/C) OUT.
Input signal is from FRONT S-VIDEO(Y/C) IN and will be routed to REAR SVIDEO(Y/C) OUT.
CL 16532095_065.pdf
140801
Example
DD:> 712 01
71200: Video routing on the Analogue Board OK.
Test OK @
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
Route Audio
Nucleus Number: 713
Description
This nucleus routes the audio on the analogue board to the
destination determined by the input parameters
Path ID
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
5.
The paths that are available for audio routing and their
description (Europe version)
Description
Input signal is VIDEO(CVBS) from digital board and will be re-routed back to
the digital board.
Input signal is from FRONT AUDIO IN and will be routed to the digital board.
Input signal is from REAR AUDIO IN and will be routed to the digital board.
Input signal is AUDIO from SCART1 and will be routed to the digital board.
Input signal is AUDIO from SCART2 and will be routed to the digital board.
No routing.
No routing.
No routing.
Input signal is VIDEO(CVBS) and AUDIO from ANTENNA IN and will be
routed to SCART1.
Input signal is VIDEO(CVBS) and AUDIO from SCART1 and will be routed to
SCART2.
Input signal is VIDEO(CVBS) and AUDIO from SCART2 and will be routed to
SCART1.
Input signal is AUDIO from dvio board and will be routed to SCART1.
No routing.
No routing.
No routing.
No routing.
No routing.
Input signal is from REAR AUDIO IN and will be routed to SCART1.
Input signal is from FRONT AUDIO IN and will be routed to SCART1.
CL 16532095_066.pdf
140801
The paths that are available for audio routing and their
description (Nafta region)
Path ID
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
Description
Input signal is VIDEO(CVBS) from digital board and will be re-routed back to
the digital board.
Input signal is from FRONT AUDIO IN and will be routed to the digital board.
Input signal is from REAR AUDIO IN 1 and will be routed to the digital board.
Input signal is from REAR AUDIO IN 2 and will be routed to the digital board.
No routing.
No routing.
No routing.
No routing.
Input signal is VIDEO(CVBS) and AUDIO from ANTENNA IN and will be
routed to VIDEO(CVBS) OUT and REAR CINCH OUT 2.
No routing.
Input signal is from REAR AUDIO CINCH IN 1 and will be routed to REAR
AUDIO CINCH OUT 2.
Input signal is from FRONT AUDIO CINCH IN and will be routed to REAR
AUDIO CINCH OUT 2.
No routing.
No routing.
No routing.
No routing.
Input signal is AUDIO from dvio board and will be routed to AUDIO CINCH
OUT 2.
CL 16532095_067.pdf
140801
EXAMPLE
DD:> 713 00
71300: Audio routing on the Analogue Board OK.
Test OK @
GB 81
GB 82
5.6.5
5.
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
Display Board
TROUBLESHOOTING DISPLAY BOARD
• Check supply voltage
NO DISC
POWER ON
⇒
⇒
⇒
⇒
Connector1916-2
Connector1916-3
Connector1916-11
Connector1916-12
12STBY
VGNSTB
5STBY
5M
+12V
-32V
+5V
+5.2V
• Check filament voltage
NO
DISPLAY?
12STBYSI
⇒ Testpoint F177
⇒ AC voltage is created via oscillator circuit (7152-7153).
⇒ Check heater voltage on testpoints F161 and F163
+12V
3.2VAC, -24,4VDC, 42 kHz.
• Check oscillator frequency of 12MHz at pin 91 of IC7156
• Check I2C bus SDA / SCL nucleus 500 of diagnostic software
• Check version of software nucleus 501 of diagnostic software
• Diagnostic software : Player script of Front panel
YES
Key Function
NO
• Diagnostic software “Player script” : Keyboard test.
• Check appropriate key and resistor
YES
• Check if voltage at connector 1915-2 is 5V when power on (green light)
Standby LED ?
NO
• Check if voltage at base of Tr 7141 is 2V when power on (green light).
• Check if voltage at base of Tr7141 is 0V when switching to standby (red light)
• Diagnostic software “Player script” : LED test.
YES
• Check presence of low pulses at pin 5 of connector 1917 while pressing a key on remote control.
Remote control?
NO
• Check IR receiver 7140.
• Diagnostic software “Player script” : Remote control test.
YES
• Check power supply 5M
Flap Motor?
NO
+5V
• Check switches 1178 and 1179
• Check Flap motor assy
• Diagnostic software “Player script” : Flap motor test
YES
DISPLAY PCB OK.
CL 16532095_102.eps
150801
Figure 5-36
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
5.6.6
5.
GB 83
DVIO Board
Power Part Check
POWER PART CHECK DVIO
USE DVIO BOARD CIRCUIT DIAGRAMS 1 2, 3, 4 AND 5 AND DVIO TOP VIEW TESTPOINTS
Power On and exit
stand-by mode
OK
+5V on pin 40 of connector 1500
NOK
Check connector 1500
to Digital board
NOK
Check L 5200
Check C 2512
+3V3 on testpoint F029
OK
+5V_Proc on testpoint F216
OK
EA_VPP(+5V) on testpoint F204
NOK
Check L 5200
Check R 4200
Check IC 7203
OK
PSEN(+5V) on testpoint F203
NOK
Check IC 7203
Check IC 7204
OK
+3V3_FPGAIO on testpoint F311
+3V3_FPGAINT on testpoint F312
+3V3_SDRAM on testpoint F313
NOK
Check L 5302
Check L 5303
Check L 5304
OK
+3V3_IEEE_PLL on testpoint F138
+3V3_IEEE_A on testpoint F139
+3V3_IEEE_D on testpoint F140
+3V3_LINK on testpoint F141
NOK
Check IC7106
Check L 5108
Check L 5106
Check L 5109
Check L 5110
Check L 5103
OK
+Vcc_DV_RAM(+3V3) on testpoint F417
+35V_DV_EDO(+3V3) on testpoint F425
+3V3_DV on testpoint F416
NOK
Check L 5404
Check L 5403
Check L 5402
OK
Power Part OK
Figure 5-37
CL 16532095_103.eps
150801
GB 84
5.
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
Reset and Clock Check
RESET & CLOCK CHECK DVIO
USE DVIO BOARD CIRCUIT DIAGRAMS 2, 3, 4 AND 5 AND DVIO TOP VIEW TESTPOINTS
Power On and exit
stand-by mode
Enable DVIO board:
- press channel up or down
untill the display shows CAM3
- press tuner key in order to
switch to the DV-source
The red LED above the
DV-input will light up.
NOK
OK
Check Reset signal (LOW)
on testpoint F202
NOK
- Check connection
to Front DVIO
- Check IC 7203
- Check T 7207
- Check R 3523
- Check IC 7203
- Check T 7202
OK
Check uP clock
on testpoint F201
(11,05MHz)
NOK
- Check x-tal1200
- Check IC 7203
- Check R 3201
OK
Check CLOCKAUDTMP
on testpoint F303
(8,192MHz)
NOK
- Check IC 7303
- Check IC 7307
- Check R 3315
OK
Check Clock 27MHz
on testpoint F305
NOK
- Check IC 7308
- Check IC 7303
- Check R 3317
OK
Check Clock 27M_DV
on testpoint F307
(27MHz)
NOK
- Check IC 7308
- Check IC 7404
- Check R 3318
OK
Check Clock 27M_CON
on testpoint F308
(27MHz)
NOK
- Check IC 7308
- Check IC 7500
- Check R 3319
OK
Reset- and clock signals
are OK
Figure 5-38
CL 16532095_104.eps
150801
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
DSW DVIO Tests
DSW DVIO TESTS
Start Diagnostic Software
and select Command mode
DVIO Board Presence Test
Command: 800
NOK
- Check DVIO Board
- Check Connector 1500
NOK
- Check IC7303
- Check IC 7203
OK
Reset DVIO Test
Command: 801
OK
DVIO Access Test
Command: 802
NOK
- Check DVIO Board
- Check Connector 1500
- Check Digital Board
OK
DVIO Module ID's Test
Command: 804
NOK
- Check IC 7303
- Check IC 7404
OK
DVIO DSW CHECK OK
CL 16532095_105.eps
150801
Figure 5-39
5.
GB 85
GB 86
5.
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
Functional Test
FUNCTIONAL TEST VIDEO PICTURE DVIO BOARD
1) Connect a camera to the DV-input
2) Press channel up or down untill
the display shows CAM3
3) Press Tuner key in order to switch
to the DV-source
4) Picture on screen?
LED is blinking fast,
No cable detected
NO
LED is blinking slow
cable detected, no video
- Check front DVIO PCB
(Bypass front PCB by connecting
directly on DVIO PCB)
- Check +3V3_IEEE of IC7106
- Check optocoupler 7100
- Check Camera
YES
LED is Burning permantly
(Video & Cable detected)
Blinking blocks in
the picture
Non moving vertical
lines in the picture
- Check IC7301
- Check IC7302
- Check IC7305
- Check IC7306
- Check IC7404
- Check IC7402
- Check IC7403
Normal picture
Functional test
video picture
DVIO PCB OK
CL 16532095_106.eps
150801
Figure 5-40
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
5.
GB 87
Waveforms
Waveforms DVIO
F201 uP_clock
2V / div DC
F303 Clockaudtmp
100ns / div
2V / div DC
F305 Clock 27MHz
2V / div DC
50ns / div
F307 Clock 27M_DV
20ns / div
2V / div DC
20ns / div
F016 Clock 27M_CON
2V / div DC
20ns / div
CL 16532095_107.eps
150801
Figure 5-41
GB 88
5.6.7
5.
DVDR1000 /0x1 /691
Diagnostic Software and Faultfinding Trees
Progressive Scan
Video Part Check
VIDEO PART CHECK PROGRESSIVE SCAN
Start DVDR-Player and play a
colorbar from a DVD testdisc
OK
Check YUV_IN(0:7) signals
on connector 1100
NOK
- Check connection to Digital Board
- Check Digital Board
NOK
- Check connection to Digital Board
- Check Digital Board
NOK
- Check IC 7102-A
- Check IC 7100-A
NOK
- Check IC 7101
- Check IC 7104
NOK
- Check IC 7101
- Check R 3130 and R 3131
OK
Check FRAME_IN on testpoint I134
Check HS_IN on testpoint I133
OK
Check VS_IN on testpoint I151
OK
Check activity on Y_OUT(0:7) of IC7101
Check activity on Cr_OUT(0:7) of IC7101
Check activity on Cb_OUT(0:7) of IC7101
OK
Check HSOUT on testpoint I156
Check VSOUT on testpoint I157
OK
Check DAC-A/Y on testpoint I114
Check DAC-B on testpoint I113
Check DAC-C on testpoint I115
NOK
- Check IC 7104
OK
Check Y-signal on testpoint I153
Check Cb-signal on testpoint I154
Check Cr-signal on testpoint I155
NOK
- Check IC 7105
- Check IC 7106
- Check R3118, R3134 and R3157
OK
Video Part Progressive Scan OK
Figure 5-42
CL 16532095_108.eps
150801
Diagnostic Software and Faultfinding Trees DVDR1000 /0x1 /691
5.
GB 89
Waveforms
Waveforms Progressive Scan
I113
500mV / div AC
I115
500mV / div AC
I134
2V / div DC
I153
500mV / div AC
DAC-B
10us / div
DAC-C
10us / div
FRAME_IN
10ms / div
Y-signal
10us / div
I114
500mV / div AC
I133
2V / div DC
I151
2V / div DC
I154
500mV / div AC
DAC-A/Y
10us / div
HS_IN
20us / div
I155
500mV / div AC
Cb-signal
10us / div
10us / div
I157
VSOUT
2V / div DC
10ms / div
YUV_IN
VS_IN
10ms / div
Cr-signal
2V / div DC
I156
2V / div DC
10ms / div
HSOUT
10us / div
Y_OUT; Cr_OUT; Cb_OUT
2V / div DC
20us /div
CL 16532095_109.eps
150801
Figure 5-43
GB 90
5.
DVDR1000 /0x1 /691
Personal Notes:
Diagnostic Software and Faultfinding Trees
Block and Wiring Diagram. DVDR1000 /0x1 /691
6.
91
6. Block and Wiring Diagram.
Blockdiagram DVDR1000
BLOCKDIAGRAM DVDR1000
ANALOG BOARD
FAN
12VDC
INTELLIGENT
CONTROL
AUDIO L
AUDIO R
FRONT
Analog input
1911
A1
1
AFCRI
1953
2
AFCLI
CVBSFIN
3
A1
4
V1
A1
9
ANALOG AUDIO VIDEO
A1
3
V1
4
6
8SW
CFIN
DVIO
V3
9
YFIN
V2
INPUT/OUTPUT
8SW
7
+3V3
DRAM
V3
9
+12V
CONTROL
uP
CFIN
8
+5V
AUDIO DIGITAL
CVBSFIN
6
1500
8
S-VIDEO
AFCLI
5
V2
7
AFCRI
2
5
CVBS
P50
1
YFIN
DV_HS_OUT
8051
DV_VS
DV CODEC
DV_CLK
VSM_UART2 4
FRONT
Digital Video input
YUV(7:0)
1
A2
4
AUDIO L/R
ANA_R
ANA_L
1954
CVBS_Y_IN
Y_IN
C_IN
60
CVBS_OUT_B
V9
Y_OUT_B
V10
C_OUT_B
V11
CVBS-RGB-Y/C
DATA
&CONTROL
A2
AUDIO L/R
YUV-YCVBS/C
V8
SRAM
U_IN
IEEE 1394
V7
AUDIO DAC
V_IN
FPGA
ANALOG AUDIO L/R
V6
LINK
4
V5
PHY
PROCESSING &
SOURCE
SELECTION
1960
1501
1101
4
V4
1001
(DATA+CONTROL+PSU)
4
AUDIO OPTICAL
R_OUT_B
V12
G_OUT_B
V13
B_OUT_B
V14
SCART II
AUXI/O
12
14
16
18
20
22
22 20 18 16 14
DIGITAL PCB
DVD & RW ENGINE
1402
1501
DRAM
TRAY CONTROL
I2S
VSM
SERVO
SRAM
BE_LOADN
DISC
FRONT-END I2S or //
READ
LASER
5
S2B
6
A3
S2B
WRITE
ANAL.VIDEO
1900
AUDIO ENCODER I2S
AE_BCLK
S-VIDEO
AD_DATAI
18
MPEG
AV
DECODER
+ HOST
(Sti5505)
1
ION
5
20
21
MPEG AUDIO
ENCODING
Stream
Manager
RESETN_BE
VIDEO INPUT
PROCESSING
SCARTI
TO TV
- I/O
4
IRESET_DIG
1602
AE_WCLK
AUDIO MPEG1
BE_FAN
1982
VSM_UART1
10
MPEG VIDEO
ENCODING
EMPIRE
VIDEO MPEG2
1600
DIG.VIDEO
1902
FRONT-END I2S
7
1601
COAX_IN
3
OPT_IN
S-VIDEO
4
2
SPDIF
7
MUTEN
9
AD_ACLK
CVBS
A4
11
DIG. AUDIO
AD_DATAO
12
AD_WCLK
14
AD_BCLK
AUDIO PCM I2S
DAC
CVBS
EMI BUS
DRAM
3
4
5
6
7
8
1
2
3
4
5
6
7
9
8
CLOCK
&
BACKUP
1603
1
8
6
4
2
1
8
6
4
2
1
2
2MB
SDRAM
RS232
1900
1000
1
FLASH 4MB
-5V
GND
ION
+5V
GND
GND
+12V
GND
+3V3
+3V3
+3V3
+3V3
+12V
GND
-5V
GND
+4V6E
GND
+5V
+3V3
SDRAM
ANTENNE INPUT
TUNER
TV OUT
10 11 12
-5Nstby
-Vgnstby
FLYB
GND
1
2
3
4
5
6
7
1
2
3
4
5
6
7
I2C
SCL
SDA
IPOR1
INT
5M
+12Vstby
5STBY
-Vgnstby
2
INFRA RED
EYE
+33Vstby
PSU
INT/IPOR1
+5V2stby
SERVICE
PSU
PSU
+12Vstby
1981
7
2
TITLE
TRACK
TOTAL
CHAPTER
TRACK TIME
REMAIN
CHANNEL
5STBY
3 11 12
9
5
6
8
1916
DIGITAL PCB
VPS/PDC
AM
1
2
3
4
5
6
7
8
9
10 11 12
PM
FRONT PROCESSOR
DISPLAY & CONTROL
OPEN/CLOSE
PLAY
STOP
RECORD
REC-LEVEL
RELEASE
CHANNEL
MANUAL
TRACK
SEARCH
+12V
GND
GND
8
FLYB
7
+33Vstby
6
-5V
-Vgnstby
GND
-5Nstby
+4V6E
5
+5V2stby
GND
4
+12Vstby
+5V
3
-5V
2
ION
OVER
SAP
GND
-10
0
STEREO
+5V
-20
NICAM
+3V3
GND
-30
DIGITAL
0205
0207
1
GND
-40
MANUAL
0209
DECODER
GND
OVER
RECORD
+12V
0
PCM
TIMER
+3V3
-10
DTS
SAT
+3V3
-20
AC-3
MONITOR
+3V3
-30
MPEG
EP+
+3V3
-40
PROLOGIC
HQ SP L:P
ENGINE
SAVCD
I
RW
II
DVD
MAINS
AC
MULTI-MODE SOPS
CL 16532095_240.eps
210801
Block and Wiring Diagram. DVDR1000 /0x1 /691
6.
92
Wiring Diagram
8001
WIRING DIAGRAM
1602 1900
1962
7
6
5
4
3
2
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
FAN
EH
8015
1102
1
2
3
4
5
6
7
1962
GND
Y
GND
Cb
GND
Cr
GND
7
1
ANALOG
8015
1984
1
21
8006
ANA_R
GNDA
GNDA
ANA_L
1900
1982
22
1
1954
10
1
22
8002
8004
8006
pH-pH LF SHIELDED
12 1
1
1960
1953
1981
8001
1
2
3
4
9
1
1932
4
1
8007
pH
EH
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
(only for NAFTA)
1
8
1000
1
1
0209
0207
1
1
2
EH
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
1402
SERVO
24
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
B_OUT_B
GNDD
G_OUT_B
GNDD
R_OUT_B
GNDD
C_OUT_B
GNDD
Y_OUT_B
GNDD
CVBS_OUT_B
GNDD
GNDD
CVBS_Y_IN
GNDD
C_IN
GNDD
Y_IN
GNDD
U_IN
GNDD
V_IN
8004
1600 1982
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
GNDD
GNDD
NC
GNDD
BE_DATA_WR
GNDD
BE_SYNC
GNDD
BE_FLAG
GNDD
BE_BCLK
GNDD
BE_DATA_RD
GNDD
BE_WCLK
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
GNDD
BE_RXD
GNDD
BE_TXD
BE_CPR
BE_IRQn
BE_SUR
BE_V4
GNDD
BE_LOAD
GNDD
BE_FAN
RESETn_BE
GNDD
GNDD
1
2
3
4
5
6
10
9
8
7
6
5
7
4
8
3
9
2
10
1
GNDD
FB
BE_FAN
ANA_WE
ION
VSM_UART1_RTSn
(D_RDY)
VSM_UART1_CTSn
(A_RDY)
VSM_UART1_TX
(D_DATA)
VSM_UART1_RX
(A_DATA)
IRESET_DIG
1101
7
12
8
0205
1
8003
1200
24
8008
1
DVIO
1100
FAN
pH
30
1501
DIGITAL
60
BOARD
TO
BOARD
60
1900 12 1 1603 7
2
1
1201
1500
1102
1
PROGRESSIVE
SCAN
1
1601
15 1101 1
1
15 1100
1501
22
1
1
1
1600
SERVICE
INTERFACE
1
4
7
4
1
1101
10
1601 1954
GNDD
SPDIF
COAX_IN
OPT_IN
+5V
+3V3
MUTEN
GNDD
AD_ACLK
GNDD
AD_DATAO
AD_WCLK
GNDD
AD_BCLK
GNDD
AD_ACLK
GNDD
AD_DATAI
GNDD
AE_WCLK
AE_BCLK
GNDD
1100 1402
EH
EH
1
1602
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
8003
PSU
7
8009
22
1
8002
8014
8012
pH-pH LF SHIELDED
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
FLAP MOTOR
1
WIRE WRAP
1917
DISPLAY
7
1911
8011
1200 1100
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
7
8014
9
1
4
12
1
1001 1002
1000
1
4
GND
YUV_IN(7)
GND
YUV_IN(6)
+3V3
YUV_IN(5)
+3V3
YUV_IN(4)
+5V
YUV_IN(3)
GND
YUV_IN(2)
GND
YUV_IN(1)
GND
YUV_IN(0)
GND
CLK_27MHZ
GND
HS_IN
FRAME_IN
SCL
SDA
GND
FRONT
AV INPUT
FRONT
DV INPUT
8012
1
2
8013
1
2
3
4
TPB1TPB1+
TPA1TPA1+
1
2
3
4
5
6
7
8
9
IR & STBY
1
pH
1916
12
M
1918
1
2
EH
SOLDERED
1
2
3
4
5
6
7
+12Vstby
+5V2stby
-5Nstby
-Vgnstby
+33Vstby
FLYB
GND
1
2
3
4
5
6
7
8
8009
+3V3
+5V
GND
+4V6E
GND
-5V
GND
+12V
1
2
3
4
5
6
7
8
9
10
11
12
+3V3
+3V3
+3V3
+3V3
GNDD
+12V
GNDD
GNDD
+5V
ION(STBY_ctrl
GNDD
-5V
8011
8005
LED+
LED-
8008
8007
8005
pH-pH
1915
8013
IEEE WIRE
AFCRI
GNDA
AFCLI
VBSFIN
GNDV
8SW
CFIN
GNDV
YFIN
1
2
3
4
5
6
7
8
9
10
11
12
TEMP_SENSE
12VSTBY
VGNSTBY
-GNDD
IPOR1
SDA
GNDD
SCL
INT
RC
5STBY
5M
CL 16532095_241.eps
160801
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
93
7. Electrical Diagrams And Print-Layouts
Power Supply
1
2
3
4
5
6
7
8
9
10
11
12
POWER SUPPLY
1R5
33K
2201
3201
6201
47u
2211
100u
680u
2210
2130
5125
2214
2m2
3127
220K
3128
+5Vstby
1u
BYW29EX
0240
Heatsink
6221
6144
3221
7220
L7905
BAV21
6220
11
IN
3
GND
E
-5Nstby
OUT
1
2220
220u
2152
BYV27-200
22K
-5V
2
BAV21 BZX284-B15
330p
D
100n
7
FLYB
4K7
3222
4K7
16
6143
3223
BC857B
7241
2K2
8
+5V
5240
3220
68R
Vreg
6240
17
2241
BAV21
0260
MECHPART
13
2221
2223
3151
2145
100K
470n
2143
100n
E
+3V9
STPS745FP
100u
3150
2K2
2K2
6142
C
100u
2K2
+12Vstby
10u
+3.9V
6215
12
2240
-13V
3147
2144
10u
1N4004
1000u
22K
1R5
3134
3135
68p
BYW29EX
B
+12V
5210
Vd
3149
22K
3152
6211
0210
Heatsink
Vs
100n
2147
3145
100R
2153
3148
2151
7140
BC847B
470n
Vg
47R
3146
-0.07V
(-0.3V)
7143
BC847B
3132
470p
7125
STP5NB60FP
+33Vstby
15
2136
47R
2146
220p
BAV21
6146
2K7
6145
3131
6141
22K
BAS216
2141
BAS216
3141
3139
470p
2140
100n
100K
3142
3143
100n
1K
6140
BC857B
7141
2142
1K
D
3144
220p
BC847B
7142
2139
220R
C
3140
BAS216
30V
(20V)
6210
2
MECHPART
0125
6130
1M
6131
1M
2K7
+33V
+12Vreg
6132
3125
6125
47p
3126
3200
BYD33J
10
14
83R
1N4006
1N4004 1N4004 1N4004
6154
1N4006
10n
1N4006
6152
BYD33J
3 5120 4
1125
1N4006
2129
220K
UF1922P4
2
1
1R5
3133
2u2
6153
5131
CT286D8
4
68u
5115
1n
0101-1
HSC0528 1
6151
2125
220n
2120
3122
680K
3120
V
B
300V
2u2
VALUE
2119
HSC0528 2
1n
5110
2200
1124
1120
0101-2
A
+33Vctrl
6200
100n
2131
BZX79-C33
A
0290
Heatsink
18
0205
2251
3253
3255
3254
47K
22n
7251
TL431CZ
4K7
470R
+12Vstby
1
+5Vstby
2
-5Nstby
3
-Vgnstby
4
+33Vstby
5
FLYB
6
2235
330u
10K
3234
10K
3233
47R
-Vgnstby
6231
F
2230
100u
BYD33J
BZX79-C33
3230
6230
7
EH-B
F
+4.4V
(+1.7V)
Vreg
1
TCET1102
7200
3250
G
3256
3
+12Vreg
G
4K7
470R
(.....V) MEASURED IN STANDBY
2
Prot_3V3
Vdrain (no disc loaded)
Vdrain (standby)
Vgate (no disc loaded)
Vgate(standby)
Vsource(standby)
Vsource (no disc loaded)
H
H
50V/div DC
5us/div
50V/div DC
5us/div
10V/div DC
5us/div
10V/div DC
5us/div
500mV/div DC
5us/div
500mV/div DC
5us/div
CL 16532095_024.eps
080801
1
2
3
4
5
6
7
8
9
10
11
12
0101-1 B1
0101-2 A1
0125 C6
0205 F12
0210 C8
0240 D8
0260 D8
0290 E9
1120 A2
1124 A4
1125 B4
2119 B4
2120 B3
2125 B6
2126 B6
2127 A4
2129 B6
2130 B7
2131 A7
2136 C7
2139 D3
2140 C4
2141 D4
2142 D2
2143 E3
2144 E4
2145 E4
2146 C5
2147 D5
2151 E5
2152 E7
2153 D5
2200 B9
2201 B10
2210 B9
2211 B10
2212 B9
2214 C9
2215 C9
2220 E9
2221 E10
2222 E10
2223 E10
2230 F9
2235 F10
2240 D9
2241 D10
2242 D9
2251 G9
3120 B3
3122 B3
3123 B2
3125 B5
3126 B5
3127 B7
3128 B7
3129 A5
3131 C6
3132 C6
3133 D6
3134 D6
3135 D6
3139 D4
3140 C5
3141 C4
3142 C3
3143 D3
3144 D2
3145 D4
3146 D5
3147 D5
3148 E5
3149 E7
3150 D6
3151 E4
3152 D5
3200 A10
3201 B10
3220 E11
3221 E11
3222 D11
3223 D11
3230 F9
3233 F9
3234 F10
3250 G8
3253 G9
3254 G10
3255 G9
3256 G9
5110 A3
5115 B3
5120 B4
5121 B4
5125 C7
5131 B7
5210 B10
5240 D9
6125 B7
6128 A4
6129 A5
6130 D7
6131 D7
6132 D7
6140 C5
6141 D4
6142 D6
6143 E6
6144 E6
6145 C4
6146 C6
6151 B5
6152 B5
6153 B5
6154 B5
6200 A9
6201 B10
6210 B9
6211 B9
6215 C9
6220 E8
6221 E8
6230 F8
6231 F9
6240 D9
7125 C6
7140 D4
7141 D3
7142 D2
7143 D3
7200 G7
7220 E9
7241 D11
7251 G8
9110 A3
9115 B3
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
Power Supply
1
2
3
4
5
7.
94
6
7
8
9
10
11
12
POWER SUPPLY
A
0209
1
+3V3
2
+3V3
3
+3V3
0221
MECHPART
0207
1
+3V3
1520
2u2
3A15
MP
+3V3
7520
STP16NE06 2520
1
100u
3523
2K2
3522
1K
3521
680R
22n
7
4
8
10
STBY_ctrl
11
8
4K7
7521
TL431CZ
12
-5V
3524
+12V
B
9
+5V
7
+12V
2
6
+12V
3
6
-5V
3
C
5
5
2521
1K5
6520
Prot_3V3
BAS216
+5V
4
+3V3
EH-B
2
+4V6
3525
510R
B
3520
+3V9
5520
A
EH-B
C
5501
+5V
D
4K7
BZX79-C6V8
10K
6515
+4V6
+33Vctrl
+12V
100n
10u
2513
1N4004
E
2511
3511
10K
7512
BC847B
100n
10K
STBY_ctrl
3514
47K
2506
10u
5511
2512
7511
10K
3516
3515
+12V
5505
100u
BYV10-40
+12Vreg
IRLML2502
E
6505
2515
100u
4K7
7502
TL431CZ
3504
2
+5V
-5V
10u
+12V
6512
5515
100u
IRLML2502
3513
-5Nstby
6511
7515
3
BZX284-C8V2
3503
680R
2K2
3501
22n
1
2502
4K7
2501
D
100u
7501
IRLML2502
3502
2u2
3512
+5Vstby
F
F
0200
0201
0202
G
G
H
H
CL 16532095_025.eps
080801
1
2
3
4
5
6
7
8
9
10
11
12
0200 G10
0201 G11
0202 G11
0207 B8
0209 A10
0221 B3
1520 B4
2501 D4
2502 D5
2506 F4
2511 E9
2512 E10
2513 E11
2515 E8
2520 B4
2521 B5
3501 D3
3502 D4
3503 D4
3504 E4
3511 E9
3512 E9
3513 F9
3514 E10
3515 E7
3516 E7
3520 B3
3521 C3
3522 C3
3523 C4
3524 C4
3525 B4
5501 C4
5505 E4
5511 D10
5515 D7
5520 B4
6505 E3
6511 E9
6512 D9
6515 E7
6520 B2
7501 D3
7502 E3
7511 E9
7512 E9
7515 D7
7520 B3
7521 C3
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
95
Layout Power Supply (Top View)
0101 A1
0125 B3
0200 A3
0201 A7
0202 A5
0205 A6
0207 B6
0209 B6
0210 A5
0221 A6
0240 A5
0260 A5
0290 B5
1120 B1
1520 B5
2119 A2
2120 B1
2125 B2
2126 B2
2127 B1
2129 A3
2130 A3
2131 A4
2136 A3
2147 B4
2200 A5
2210 A5
2211 A6
2212 A5
2214 A5
2215 A5
2220 B5
2221 A7
2230 A5
2235 A7
2240 A5
2241 A6
2242 A4
2502 B6
2506 B7
2512 A6
2515 B7
2521 B6
3120 B1
3122 B1
3123 A1
3125 B2
3126 B2
3127 A3
3128 A3
3129 B2
3131 B3
3132 B3
3133 A2
3134 A3
3135 A3
3141 B3
3146 B3
3148 B2
3149 A3
3150 B3
3152 B3
3200 A6
3223 A6
3230 A6
3250 A5
3254 A4
3501 B7
3514 A6
5110 A1
5115 A1
5120 A2
5121 A1
5125 A3
5131 A4
5210 A6
5240 A5
5501 A7
5505 A7
5511 A6
5515 B7
5520 B5
6125 A3
6128 B1
6129 B1
6130 A3
6131 A3
6132 A3
6140 B3
6142 B2
6143 B2
6151 B2
6152 A2
6153 A2
6154 A2
6200 B4
6201 A7
6210 A5
6211 A6
6215 A5
6220 B4
6221 A4
6230 A4
6231 A7
6240 A4
6505 A7
6512 A6
6515 B7
7125 A3
7200 B4
7220 B5
7251 B4
7502 A7
7520 A5
7521 A6
9110 B1
9115 A1
9207 B6
9209 B6
9214 A4
9215 A4
9220 B5
9221 A6
9222 A7
9250 B4
9251 B4
9511 A6
9512 A6
9520 A5
9521 A5
CL 16532095_048.eps
100801
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
96
Layout Power Supply (Overview Bottom View)
2139
2140
2141
2142
A2
A2
A3
A2
2143
2144
2145
2146
A2
A2
A2
A3
2151
2152
2153
2201
A2
B3
A3
B7
2222
2223
2251
2501
A5
B7
A4
A7
2511
2513
2520
3139
B6
A6
B6
A3
3140
3142
3143
3144
PART 1
CL 16532095_49a.eps
A4
A2
A2
A2
3145
3147
3151
3201
A2
A4
A2
B6
3220
3221
3222
3233
B6
B6
B6
B7
3234
3253
3255
3256
B7
A4
A4
A4
3502
3503
3504
3511
B7
B7
B6
B6
3512
3513
3515
3516
B6
B7
B7
A7
3520
3521
3522
3523
B5
B5
B6
B6
3524
3525
6141
6144
B6
B6
A3
A3
6145
6146
6511
6520
A3
B3
B6
B5
7140
7141
7142
7143
A2
A2
A2
A2
7241
7501
7511
7512
B6
A7
B6
B7
7515 B7
PART 2
CL 16532095_49b.eps
CL 16532095_049.eps
100801
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
97
Layout Power Supply (Part 1 Bottom View)
CL 16532095_49a.eps
100801
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
98
Layout Power Supply (Part 2 Bottom View)
CL 16532095_49b.eps
100801
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
99
Display Panel
1
2
3
4
5
6
Display Part
7
8
9
10
11
12
0206
II
I SAP
OVER
STEREO
0
NICAM
20
10
DIGITAL
30
MANUAL
PCM
40
OVER
DTS
0
AC-3
10
MPEG
20
30
PROLOGIC
40
-24.4VDC
3.2VAC
2
6155
BAW56W
6168
BAW56W
6159
1N4148
1N4148
6157
1N4148
6158
1N4148
6167
6166
1N4148
1N4148
6165
1N4148
6161
BAW56W
6164
1
6
10K
F168
I252
10K
3147
3146 I251
I250
I230
F174
F175
4100
2K2
I260
I237
I217
I259
BAW56W
6174
6173
BAW56W
BAW56W
6172
BAW56W
2158
100n
GNDD GNDD GNDD
G
3145
10K
2179
10n
OPEN/CLOSE
1163 I227
220R
<
SEARCH
TRACK < 470R
1165 I246
3184
3185
3186
1K
MANUAL
1166 I238
2K2
CHANNEL
1167 I239
4K7
3187
PLAY
1168 I240
3188
10K
STOP
1169 I241
47K
3189
RECORD
1170 I243
2K2
3183
3190
10n
1171 I244
<
H
GNDD
5STBY
GNDD
3194
2K2
2177
10n
10K
I242 3175
1172
4K7
1173 I236
3198
2K2
I159 3196
1177
1K
1176 I156
3195
470R
I157 3199
1175
220R
1174 I158
3197
220R
>
SEARCH
TRACK > 470R
1157 I231
3191
3176
3177
1K
>
MANUAL
1158 I232
4K7
2K2
1K
>
CHANNEL
1159 I233
GNDD
7164
3178
5STBY
I152 3151
5
2166
5STBY 5STBY
5STBY
12STBYSI
4
2164
15p
32kHz-Option15p
1u
GNDD 5STBY
GNDD
3165
2K2
GNDD
+5V
7165
PDTC124EU
<
RELEASE
1160 I234
+11.5V
6198
MCL4148
3179
+5V
I214
2175
soll DT-26 sein
5STBY
10K
1156
GNDD
3148 I249
F171
I258
REC-LEVEL
1161 I235
I254
7
100n
50V
2159
GNDD
GNDD
30 31 96 93 94
5STBY
2K2
10
3
1153
10n
2165
P22
P21
P20
VAREF
VASS
P47
P46
P45
P44
P43
P42
P41
P40
P53
P52
P51
P2
SW_1179
SW_1178
MD1
MD2
470n
32kHz Option
GNDD
BEEPER
14
6171
6170
GNDD
P67
P66
P65
P64
P63
P62
P61
P60
P77
P76
P75
P74
P73
P72
P71
P70
P86
4 25 26 27 28 17 18 19 20 21 22 23 24
F172
I153
I262
I216
I261
I257
2173
7160-C
HEF4093BT
8
BAW56W
VGNSTBY1
G8
G9
I168
G10
I169
G11
G12
I170
I171
G13
I172
G14
G15
I173
I175
I174
G1
P77
G2
I154
I161
G3
I162
G4
I163
G5
I164
I165
G1
G2
G3
G4
G5
G6
G7
G8
G9
G10
G11
G12
G13
G14
G15
G6
I166
P8
I199
G7
P50
P07
P06
P05
3
8-BIT
A/D
CONV
F
To Motor Driver Part
1
P04
P03
P02
P01
P00
P16
P15
P14
P17
97 98 99 100
9 10 11 12
P4
7158
2172 I155 PDTC124EU
1K5
7166
BC847BW
GNDD
7160-B
7160-A
HEF4093BT HEF4093BT
1
5
4
2
6
2163
LOW FR
GNDD
8
3171
4M7
MCL4148
10n
not used
15p
not used
GNDD
7
P5
5STBY GNDD
delete for
RCwired_HW
4151
2169
6156
2162
CST
12M
1154
6
3170
GNDD
3
GENERATOR
I212
XOUT 91
GNDD
12MHz
32K768
DT-38
5
270R
11 9
13
P87
P85
P83
P82
P81
P80
P97
P96
P94
P93
P92
P91
P90
PD7
P84
WATCHDOG
GNDD
I211
XIN 89
HIGH FR
CLOCK
P0
P1
P13
P31
P3
I255
470p
7160-D
HEF4093BT
12
I167
P7
P6
I200
P5
I202
I201
P3
P4
I203
P2
P1
I245
I204
I160
P15
P16
I192
I191
P13
P14
I193
P11
P12
I194
I196
I195
P9
I197
P10
P24
I198
P22
I184
P23
PD6
PD5
PD4
PD3
PD2
P95
TC2 TC1
TIMING GENERATOR
I213
5STBY
E
15p
not used
+5V
2
ETC1
SIO0/1
1162 I228
3180
1K
16-BIT
TIMER/
COUNTERS
TEST 95
PF0
I229 3182
+5V
GNDD
100n
47u
2151
2150
F176
EXPANSION
TIMER/
COUNTER 1
TIMER
I256
2171
GNDD
5STBY1
GNDD
3192
I183
P21
I185
P20
I187
I186
P18
P19
PD1
TC4
13 14 15 16
F173
GNDD
SYSTEM CONTROLLER
STANDBY CONTROLLER
TIME BASE
TIMER
I215
I224
GNDD
RAM
PF1
P30
10K
INTERFACES
P12
83
SERIAL
SIO3
I2C BUS
P11
I206
P33
PF2
P10
84
P33
I207
P35
PF3
NC
1
I188
P17
I190
I189
P37
P36
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26
P25
P24
P23
P22
P21
P20
P19
P18
P17
P16
P15
P14
P13
P12
P11
P10
P9
P8
P7
P6
P5
P4
P3
P2
P1
85
10K
10K
3154
3193
10K
3169
VGNSTBY
8-BIT
TIMER/
COUNTER
P32
68K
3162
86
I208
5STBY1
VDD3 51
TLCS-870/X
CPU
DATA MEMORY
INTERRUPT CONTROLLER
PE0
10n
F1701
I209
P36
I218
VGNSTBY1
RESET_ 92
PF4
P37
F167 -31.1V
VKK 87
PE1
2170
F1702
PROGRAM MEMORY
ROM
PE2
74
I210
VSS2 90
D
VDD2 32
10K
3
2
5STBY
75
PE3
3156
F1703
I182
VSS1 29
PE4
GNDD
4
GNDD
F1704
76
P6
VDD1 88
5STBY
to IR-board
STBYLED
F1705
77
I181
P25
for RCwired_HW only
5
I180
5STBY
TEMP_SENSE
IRR
B
P7
1K
2167
I225
10u
LAL04
CABLE TREE
1917
KEYIN
78
100R
7157
4K7
5150
I
6169
P8
PE5
PF
BZX384-C2V7
6154 I253 9100
100n
2174
100n
100n
2160
2161
3172
220n
6
TITLE
67 68 69
VFT DRIVE CIRCUIT
3167
3168
5STBY
F1706
I179
P9
PD
3164 I247
GNDD
7
TRACK
PE6
82
+5V
H
GNDD
P77
I248 68K
3174
PH-B
79
P26
-32V
BC847BW
+5.2V
I178
P30
P28
-31.3V 3161
GNDD
100p
5M
80
P27
3166
3173
F1612
12
I177
for RCwired only
5STBY
+5V
P31
81
270R
+5V
F1611
-31.1V
BC847BW
7155
+5V
F1610
11
6152
PE7
I176
P29
5STBY 5STBY 5STBY
+5V
10
I205
P32
P34
9 F1609
INT
5STBY
GNDD
10K
F1608
8
RC
GNDD
2168
F1607
7
SCL
5STBY 12STBY
+5V
GNDD
SDA
CHAPTER
PE
VGNSTBY1
I226
F1606
6
GNDD
5M
100n
50V
2156
F1605
GNDD 12STBY
F1603
F1604
5M
from/to analog-board
G
F1602
5
TOTAL
66 67 68 69 70 71 72 73 58 59 60 61 62 63 64 65 49 50 52 53 54 55 56 57 41 42 43 44 45 46 47 48 33 34 35 36 37 38 39 40
PD0
7156
TMP88CU77F
VGNSTBY1
3163
10K
VGNSTBY
+2.5V
4
GNDD
IPOR1
TIME TRACK
6197
1N4148
6176 1N4148
6178 1N4148
6180 1N4148
1N4148 6175
GNDD
1N4148 6177
GNDD
1N4148 6179
47K
6182
5K6
10n
3159
5K6
E
3
REMAIN
6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
BAW56W
1 2 3
C
I222
VGNSTBY
CHANNEL
VGNSTBY1
1N4148
6195 1N4148
1N4148 6196
6193 1N4148
1N4148 6194
6191 1N4148
1N4148 6192
6189 1N4148
1N4148 6190
6187 1N4148
1N4148 6188
6185 1N4148
VPS/PDC
A
F166
5R6
GNDD
2
6160
BAW56W
PM
F169
12STBY
DVD+RW
+6V
3160
1N4148 6181
3153 I263
MCL4148 I223 5R6
3150
GNDD
F1601
SAVCD
AM
1N4148 6186
6183
7152
+6V
6151
-1.3V
VGNSTBY
HQ
STN3NE06
I220
I221
7153
BC847BW
3157
100n
SP
47n GNDD
GNDD
2180 I219
TEMP_SENSE
L:P
47n
7151
BC847BW
1
MONITOR
BAW56W
2K2
22K
3155
3158
100n
2155
Type:ZL
330u /16V
2154
VGNSTBY1
SAT
2152
C
1916
TIMER
1N4148
+11.9V
2157
1N4148 6184
F165
+5.9V
F
RECORD
not used
2153
GNDD
D
DECODER
BZX284-C6V8
1
3
10u
LAL04
GNDD
F162
B
5
4
22K
3152
+12V
VGNSTBY1
BJ801GNK
7150
6150
5153
S16977-03
5151 F177
F178 250mA
PSC
F164
F163
1150 F160
12STBYSI
+12V
+11.9V
DISPLAY HOLDER
-24.4VDC
3.2VAC
F161
6
12STBY
A
13
GNDD
BC847BW
7
8
I
9
10
11
12
CL 16532095_031.eps
080801
13
0206 A12
1150 A1
1153 F12
1154 G13
1156 I6
1157 I10
1158 I9
1159 I9
1160 I9
1161 I9
1162 I8
1163 H12
1165 H10
1166 H9
1167 H9
1168 H9
1169 H9
1170 H8
1171 H8
1172 I12
1173 I11
1174 I10
1175 I10
1176 I11
1177 I11
1916 F1
1917 I1
2150 I2
2151 I3
2152 B3
2153 B3
2154 B1
2155 B1
2156 F1
2157 D1
2158 E13
2159 E12
2160 F1
2161 F2
2162 E13
2163 F13
2164 G13
2165 F12
2166 G13
2167 H3
2168 H2
2169 H5
2170 I8
2171 H3
2172 H6
2173 H8
2174 F2
2175 G11
2177 I12
2179 H12
2180 C1
3145 H12
3146 G10
3147 G11
3148 G9
3150 D1
3151 I7
3152 A2
3153 C3
3154 F3
3155 B2
3156 I7
3157 C3
3158 B2
3159 D2
3160 C3
3161 E4
3162 F4
3163 D1
3164 G4
3165 I7
3166 G3
3167 G4
3168 G3
3169 F3
3170 G6
3171 I8
3172 G2
3173 H2
3174 H4
3175 I12
3176 I9
3177 I9
3178 I9
3179 I9
3180 I8
3182 I6
3183 H8
3184 H10
3185 H9
3186 H9
3187 H9
3188 H9
3189 H8
3190 H8
3191 I10
3192 I1
3193 F3
3194 I12
3195 I11
3196 I11
3197 I10
3198 I11
3199 I11
4100 G10
4151 H6
5150 H2
5151 B1
5153 B2
6150 A4
6151 C2
6152 B9
6154 F3
6155 B13
6156 H4
6157 A13
6158 A13
6159 A13
6160 A11
6161 A12
6164 A12
6165 A12
6166 A12
6167 A13
6168 A13
6169 B9
6170 D12
6171 D13
6172 D13
6173 D13
6174 D13
6175 D5
6176 D4
6177 D4
6178 D4
6179 D4
6180 D4
6181 D4
6182 D4
6183 B3
6184 A3
6185 B4
6186 A4
6187 B4
6188 A4
6189 B4
6190 A4
6191 B4
6192 A5
6193 B5
6194 A5
6195 B5
6196 A5
6197 B6
6198 H7
7150 A5
7151 C2
7152 C3
7153 C3
7155 E4
7156 D6
7157 G2
7158 H7
7160-A H5
7160-B H4
7160-C H4
7160-D H3
7164 I6
7165 H7
7166 I6
9100 E3
F160 A1
F1601 F1
F1602 F1
F1603 F1
F1604 F1
F1605 G1
F1606 G1
F1607 G1
F1608 G1
F1609 G1
F161 A3
F1610 G1
F1611 G1
F1612 H1
F162 B1
F163 A3
F164 A3
F165 B3
F166 C3
F167 E12
F168 G11
F169 D3
F1701 I1
F1702 I1
F1703 I1
F1704 I1
F1705 I1
F1706 I1
F171 G7
F172 G7
F173 H5
F174 G10
F175 G10
F176 H3
F177 A1
F178 A1
I152 I7
I153 G7
I154 D10
I155 H7
I156 I11
I157 I10
I158 I10
I159 I11
I160 D8
I161 D10
I162 D10
I163 D10
I164 D10
I165 D10
I166 D9
I167 D9
I168 D11
I169 D11
I170 D11
I171 D11
I172 D11
I173 D11
I174 D11
I175 D10
I176 D5
I177 E5
I178 E5
I179 E5
I180 E5
I181 E5
I182 E5
I183 D7
I184 D7
I185 D7
I186 D6
I187 D6
I188 D6
I189 D6
I190 D6
I191 D8
I192 D8
I193 D8
I194 D8
I195 D7
I196 D7
I197 D7
I198 D7
I199 D9
I200 D9
I201 D9
I202 D9
I203 D9
I204 D8
I205 D5
I206 F5
I207 F5
I208 F5
I209 F5
I210 E5
I211 F12
I212 F12
I213 G12
I214 G12
I215 G4
I216 G8
I217 G9
I218 F4
I219 C1
I220 C2
I221 C2
I222 E3
I223 C2
I224 H4
I225 G2
I226 H4
I227 H12
I228 I8
I229 I6
I230 G10
I231 I10
I232 I9
I233 I9
I234 I9
I235 I9
I236 I11
I237 G9
I238 H9
I239 H9
I240 H9
I241 H9
I242 I12
I243 H8
I244 H8
I245 D8
I246 H10
I247 G4
I248 E4
I249 G9
I250 G10
I251 G10
I252 G10
I253 E3
I254 I4
I255 H6
I256 G7
I257 G7
I258 G8
I259 G9
I260 G9
I261 G8
I262 G7
I263 C3
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
100
Layout Display Panel (Top View)
CL 16532095_047.eps
090801
Layout Display Panel (Overview Bottom View)
PART 1
CL 16532095_46a.eps
PART 2
CL 16532095_46b.eps
CL 16532095_046.eps
100801
2121
2122
2123
2124
2151
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174
2175
2177
2179
2180
3121
3122
3123
3124
3125
3126
3127
3128
3129
3130
3133
3134
3145
A3
A3
A5
A5
A7
A9
A9
A8
A5
A5
A8
A9
A5
A5
A5
A5
A5
A7
A8
A8
A2
A8
A7
A3
A9
A7
A3
A2
A8
A4
A3
A4
A3
A4
A3
A3
A4
A4
A4
A4
A3
A7
3146
3147
3148
3150
3151
3153
3155
3158
3159
3160
3162
3163
3165
3169
3170
3171
3172
3173
3174
3175
3176
3177
3178
3180
3182
3183
3184
3185
3186
3187
3188
3189
3190
3191
3192
3193
3194
3195
3196
3197
3198
3199
A7
A7
A7
A8
A7
A8
A8
A8
A9
A8
A8
A8
A9
A8
A7
A7
A8
A8
A8
A2
A2
A1
A1
A2
A9
A7
A3
A3
A1
A1
A1
A1
A1
A2
A7
A7
A7
A1
A1
A2
A2
A1
4100
4110
4151
6150
6151
6152
6154
6155
6156
6160
6161
6168
6169
6170
6171
6172
6173
6174
6198
7151
7152
7153
7155
7156
7157
7158
7160
7164
7165
7166
9103
9125
9127
9142
A7
A8
A7
A8
A9
A8
A8
A6
A8
A7
A7
A6
A7
A5
A5
A6
A6
A6
A9
A9
A8
A8
A8
A6
A8
A7
A7
A7
A9
A9
A6
A8
A6
A3
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
101
Layout Display Panel (Part 1 Bottom View)
CL 16532095_46a.eps
100801
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
102
Layout Display Panel (Part 2 Bottom View)
CL 16532095_46b.eps
100801
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
103
Flap Motor Driver Part
1178 D3
1179 E3
1918 C4
2120 A3
Layout Front AV Part
3125 B2
3126 B3
3127 C3
3128 D1
3121 B1
3122 B1
3123 C1
3124 A2
2121 C3
2122 C3
2123 E1
2124 E1
1
3129 D2
3130 D2
3131 D2
3132 E2
3133 C2
3134 A1
7120-A B3
7120-B C3
2
Flap Motor Driver Part
A
C100 E4
F120 A3
F121 A3
F1801 B4
F1802 B4
I120 B2
I121 B2
I122 B3
3
I123 C2
I124 C2
4
5M
A
6K8
F121
I120
3121
7
MD1
100R
4
3K9
5M
3125
B
GNDM
5
7120-B
L2722
3
2
F1801
1
F1802
2
C
4
3127
GNDM
3133
82K
2122
22K
10n
MD2
10K
3128
5M
5M
SW_1178
3
4
1
2
1K
CL 16532095_035.eps
080801
3132
1179
SW_1179
1K
10n
10n
GNDD
2124
From / to DC
2123
E
D
1178
10K
3130
3129
3131
10K
GNDM
From / to DC
3
4
1
2
E
C100
GNDD
GNDD
GNDM
GNDD
CL 16532095_034.eps
080801
1
A2
A2
EH-B
1918
100n
I124
22K
6
2121
10K
3122
3123
GNDM
I123
C
D
1910
1911
B
I122
From DC
A3
A3
A3
A2
A2
A2
A1
A3
A3
A3
A3
A3
A2
A2
A2
A2
A2
A1
A1
8
I121
3126
From DC
GNDM
7120-A
L2722
1
2
1R
3124
10K
3134
F120
470u
2120
5M
2100
2101
2102
2103
2104
2105
2106
3100
3101
3102
3103
3104
3105
3106
3107
3108
3109
3111
3112
2
3
4
3113
4101
4102
6100
6101
6102
6103
6104
7100
7101
A1
A3
A2
A3
A3
A2
A1
A1
A3
A2
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
104
Front AV Part
3
4
5
6
F1008
3101
8
2101
1K
I101
7100
BC847BW
1u
A
GND_FC
4K7
3104
680K
3103
4101
3102
2102
YKC22-0489 7
1910-B
1M
6100
6
330p
AR
I100
2100
3100
A
8
NOT_USED
470K
8SW_FC
Front AV Part
7
100n
2
8SW_FC
1
F1007
GND_FC
GND_FC
3106
11
2104
1K
I103
7101
BC847BW
1u
C
GND_FC
4K7
3109
680K
3108
4102
3107
2105
YKC22-048910
1910-C
1M
6101
9
330p
AL/MONO
I102
8SW_FC
F1005
NOT_USED
100n
C
B
2103
3105
GND_FC
8SW_FC
GND_FC
GND_FC
470K
GND_FC
8SW_FC
DF3A6.8FU
B
DF3A6.8FU
GND_FC
GND_FC
D
F1002
12
GND_FC
GND_FC
150R
75R
3111
13
YKC22-0489
1910-A
GND_FC
3110
6102
CVBS
GND_FC
1
F1108
2
F1107
3
F1106
4
F1105
5
F1104
6
F1103
7
F1102
8
F1101
9
F1001
DF3A6.8FU
GND_FC
GND_FC
GND_FC
1911
F1109
AFCRI_FC
GND_FC
AFCLI_FC
GND_FC
8SW_FC
CFIN_FC
GND_FC
YFIN_FC
6103
GND_FC
75R
GND_FC
3112
PH-S
E
D
CVBSFIN_FC
E
DF3A6.8FU
3
4
1
2
1910-D
GND_FCGND_FC
6104
I104
F
DF3A6.8FU
100n
2106
F
GND_FC
GND_FC
75R
YKC22-0489
3113
5
GND_FC
CL 16532095_036.eps
080801
GND_FC
1
2
3
4
5
6
7
8
1910-A D1
1910-B B1
1910-C C1
1910-D F1
1911 D8
2100 A6
2101 A5
2102 B4
2103 C6
2104 C5
2105 D4
2106 F2
3100 A5
3101 A3
3102 B4
3103 B5
3104 B6
3105 C5
3106 C3
3107 D4
3108 D5
3109 D6
3110 D4
3111 D2
3112 E2
3113 F2
4101 B5
4102 D5
6100 A3
6101 C3
6102 D3
6103 E3
6104 F3
7100 A6
7101 C6
F1001 E2
F1002 D2
F1005 C2
F1007 B1
F1008 A2
F1101 E8
F1102 E8
F1103 D8
F1104 D8
F1105 D8
F1106 D8
F1107 D8
F1108 D8
F1109 D8
I100 A4
I101 A5
I102 C4
I103 C5
I104 F2
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
105
IR and Standby Panel
2
IR & STANDBY
3
I144 3144
I145
A
5VSTBY
10K
3143
5VSTBY
4
390R
1
Layout IR and Standby Panel
A
I146
3136
7143
BC857BW
4K7
I147
3137
7142
BC847BW
4K7
B
I148
7141
PDTC124EU
LTL-14CHJ
6140 2
GND
B
GND
5VSTBY
5VSTBY
C
I149
3149
IRR
GND
TEMP_SENSE
F1503
4
F1504
3142
5
F1505
47K
6
F1506
7
F1507
t
3135
1140
STBY
GND
4999
I143
7140
TSOP2236
2 VS
E
CTRL
CIRCUIT
DEM
2140
22u
1 OUT
GND
BAND
PASS
INP
E
AGC PIN
3 GND
GND
CL 16532095_037.eps
080801
GND
1
D
5VSTBY
GND
CABLE TREE
NOT USED
I141
GND
3
220R
D
KEYIN
F1502
7145
BC847BW
4K7
3140
STBYLED
2
5VSTBY
5VSTBY
F1501
2322640
NC
I139
3141
1
C
7144
BC857BW
4K7
1915
I140
390R
I142 3139
10K
3138
1
1140 D2
1915 C1
2140 E2
3135 E1
3136 A3
3137 B3
3138 C2
3139 C3
3140 E2
3141 C3
3142 D2
3143 A2
3144 A3
3149 C3
4999 D4
6140 B4
7140 E3
7141 B1
7142 B3
7143 A3
7144 C3
7145 C3
F1501 D1
F1502 D1
F1503 D1
F1504 D1
F1505 D1
F1506 D1
F1507 D1
I139 C3
I140 C4
I141 D2
I142 C3
I143 E3
I144 A3
I145 A2
I146 A3
I147 B3
I148 B4
I149 C3
2
3
4
CL 16532095_038.eps
080801
3137
3137
3138
3139
3140
3141
3142
3143
3144
3149
4999
7141
7142
7143
7144
7145
A1
A1
A2
A2
A2
A2
A1
A1
A1
A2
A1
A2
A1
A1
A2
A2
1140
1915
2140
3135
6140
7140
A2
A1
A1
A1
A2
A1
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
106
Analog Board: All in One 1
4K7
27
28
29
I886
100R
P63|PMW7
PC3|AIN14
PA5|PWM3|HWR_
PC4|AIN15
PA3|PWM2
P80|CTLIN
PWM1
P81|DFGIN
PWM0
P82|RMTIN
PA2|CR|TPG00
P83|EXT
PA1|HA|TPG05
PA0|PV|PH
P84|DPGIN
P85|CFGIN
P86|CSYNCIN
P87|COMPIN
36
37
38
39
P97|TPG11
P96|TPG10
GNDD
VGNSTBY
12STBY
E0
ST24E16
7815 E1
E2
1
3
100R 5,2V 5
SCL
4 0V
5,2V
6 0V
7
3914
WC_
VSS
109 I843
0V
2 0V
108 I844
107 I845
3840
106 I846
100R
102 I948
3844
100R
101 I848
1K
3846
100 I849
3847
1K
99
I862
3K3
98
I863
I864
96
I865
95
I867
C
SCL
3841
F8112 4801
GNDD 1987
1981
1
3889
1
1K
3865
12STBY
VGNSTBY
GNDD
100R
91
GNDD
89
SDA
88
GNDD
87
SCL
86
100n
D
GNDD
GNDD
TEMP_SENSE
2823
100p
not used
2809
100p
not used
2808
SDA
10K
97
100R I946
2K2
3834
2K2
3833
100R
3836
not used
10K
3823
I833 3819
PB4|SDA1
100R
PB5|SCL1
1K
I832 3818
P50|INT4|TI3
100R
P51|INT3|TI2
I831 3817
I830 3816
P52|INT2|TI1
I829
P64|PWM8
PC2|AIN13
5STBY2
5STBY
8
F8008
5SW
7
F8007
8SW
6
not used
F8003
5NSTBY
IPOR_EPG
PH-B
INT_EPG
5
F8006
4
F8001
100p
not used
2805
F8005
3
1980
2
1
2K2
F811
100p
2804
not used
F810
SCL1
GNDD
SDA1
5SW
A_YCVBS
GNDD
A_YCVBS
from VPS
SDA1
to TU, AP, VPS
3805
3804
2n2
100K
2K2
3802
FOME
from FOME
SCL1
to TU, AP, VPS
2801
not used
P53|INT1
P65|PWM9
10K
3879
TMP93C071
PC1|AIN12
85
84
42
F8101 2
2
F8102 3
3
F8103 4
4
F8104 5
5
F8105 6
6
12STBY
VGNSTBY
GNDD
IPOR1
F8106 7
7
8
F8108 9
9
F8109 10
10
F8110 11
11
PH-B
41
E
SDA
F8107 8
GNDD
SCL
INT
RC
5STBY
12
5M
F
PH-B
5M
F8111
40
6807
GNDD
100R
100R
3890
100R
3864
3863
100R
2K2
3885
I854
3870
100R
3K3
I855
3869
10K
I856
3868
100R
I857
3897
for SATCONTROL only
I861
I858
1K
3884
470u
not used
2813
220m
2811
for HDR only
6805
10K
P70|TXD
P67|PWM11
P66|PWM10
I875
from PS
I892
MCL4148
G
5STBY2
I880
2
3
4
5
5
3875
F8206
6
1K
F8207
7
10K
3880
D_DATA
F8208
8
3814 for SAA7118 (VIP) only F8209
9
I813
F808
GNDD
F8210
6
7
8
9
10
ION
WE
BE_FAN
FB
10
GNDD
BE_FAN
FBIN_SC2
WE
RC
YUV_ON
GNDD
CL 16532095_009.eps
070801
11
12
13
H
D_RDY
FMN
ISTBY
TEMP
GNDD
SW_CAB_FAN
GNDA
4
GNDD
SW_BE_FAN
GNDA
GNDA
A_YCVBS
0,1V
F8204
100R
FL_READY
7813
BC847BW
I878
3
F8205
ADDRESS
REGISTER
4
I877
5,1V
F8203
A_RDY
CLOCK /
SC1YC_H
10K
47R
CONTROL
LOGIC
VSS
3881
3886
2
A_DATA
SC2RGB_H
3887
BC857BW
7812
I881
1
IRESET_DIG
DIVIDER
VMUTE
100R
GNDA
I 2 C-BUS
INTERFACE
1982
F8201
F8202
5STBY2
CALENDAR
6 SCL
5,1V
5 SDA
5,1V
I876
7811
PCF8593T
I822
100R
12K
SATCO
3878
470K
100K
P71|RXD
P44|AIN7
ION_FAN
3877
SCL
SDA
GNDA
I888 3882
3873
2,5V
2 OSCO OSCILLATOR
4,8V
F803
7 INT_
0V
3 RESET
I874
RESET
5,1V
330R
I887
22K
10K
3872
18p
2815
10n
2814
I882 3883
2817
SYNC 3
5
3888
P72|CTS_
PC0|AIN11
B
0V
10n
1u
2816
5,1V
8
VDD
I872
2818
I885
GND
1
P43|AIN6
VCC
110 I842
GNDD
1 OSCI
DT-38
32K768
6
SYNC
SEPA
V.SEPA
GNDD
1802
PHASE
COMP
330R
I871
3876
7
VCC
8
2 HD
4
P73|SDA0
P47|AIN10
GNDD
3874
5SW
1n
H
H.OSC
GNDD
I870
100n
2812
1
P74|SCL0
P42|AIN5
7803-B
VGNSTBY
GNDD
SDA
119 I841
3898
10K
7810
GNDA
BA7046F
P41|AIN4
P45|AIN8
12STBY
IPOR
GNDD
F804
GNDD
P75|SO0
P40|AIN3
35
GNDD
5SW
P76|SI0
3867
I898
10K
3861
1n
2810
G
GNDD
33
34
5STBY2
7809
BC847BW
22K
not used
4906
PDTA124EU
7807
F812
BAS385
I896
3862
31
GNDD
2K2
3857
I899
I970
32
I897
16_SC2
10K
3896
5SW
100n
2827
220K
3895
5SW
30
P77|SCK0
P57|TI0|AIN2
P46|AIN9
5STBY2
5STBY
5STBY2
5STBY
26
47K
FLYB
I
3830
3860
3866
5NSTBY
5SW
6K8
3859
100K
100K
3858
8SW
5SW
F_MODE
3899
24
PB3|SCK1
PB2|SO1|SI1
120 F800
I903
23
4K7
GNDA
8SW
3915 I945
100R
for SW contr. (FACO) only 3916
22
I859
1
I983
21
I974
100R
3894
GNDA
5NSTBY
5,2V
for SW contr. (FACO) only 3917
10K
I973
not used
GNDD
A
8
I852
20
I866
4K7
IPFAIL
F
5SW
14
5STBY2
I853
I839
2
P95|TPG13
10K
3891 not used
3845
10K
3849
7805
BC847BW
100K
GNDD
3828
100R
GNDD
P94|TPG04
3893
25
GNDA
F8004
100R
13
AIO1
F8002
3826
3
P93|TPG03
19
P56|TI4|AIN1
P92|TPG02
I838
4
P91|TPG01
3892
KIR
E
100R
3871
17
18
5
P90|TPG12
16
I971
5STBY2
GNDD
GNDD
3856
100K
10K
3835
4K7
3820
3839
10K
10K
15
I976
10K
I894 3855
27K
3801
GNDD
GNDD
I977
10K
I975 3851
4K7
3852
14
3850
100K
3853
10
I972
4u7
3843
5STBY
100K
9
I979
10K
KIL
GNDA 5NSTBY BC857BW
7806
I893
I980
P54|INT0
P55|TI5|AIN0
6
100R
47K
I891
2822
8
I978
3848
5STBY2
to EPG
12
5STBY2 5STBY2
I981
5STBY
5SW
GNDD
GNDD
3824
5SW
11
6K8
I982
7
10K
BC857BW
I890 7804
3808
10K
3825
470n
3821
4u7
I810 3831
GNDD
GNDD
10
GNDD
10K
2821
GNDD
I807
7801
BC847BW
220R
3812 I835
3800
680K
MCL4148
11 12STBY
220p
2803
I818
I817
I819
I821
I815
I837
I836
470n
680K
4K7
2802
GNDD
2807
9
GNDD
P50
IS1
IS2
WSRO
WSFI
WSRI
VD
WU
100n
47u
6803
1K
3854
100K
7800-C
TL074
8
7817
BC847BW
GNDD
GNDD
3813
GNDD GNDD
4
470n
1%
11
3832
2832
2831
GNDD
7800-B
TL074
2820 I809
7 I808
10
9
3803
BAS385 I823
33K
I804 3809
4K7
6
D
GNDD
3838
470n
C
3811
3810
100K
MCL4148
11 12STBY
10K
4
8
5STBY2
5NSTBY
GNDD
F802 2806 I806 5
7
GNDD
7816
BC847BW
I801
3837
B
13
6
6801
7800-D
TL074
14 6802
3842
GNDD
ARADC
2K7 1%
3822
100K
3815
11
4
470n
100K
A
2K7 1%
2
7800-A
TL074
2819
I803 12
1 I802
3807
4
470n
1K 1%
F801 2800 I800 3
12STBY
3829
ALADC
5
I820
All In One 1
4
AFC
3
AGC_MUTE
2
I816
1
14
I
1802 H4
1980 A10
1981 D13
1982 H14
1987 D14
2800 A1
2801 A8
2802 A4
2803 A7
2804 A9
2805 A9
2806 B1
2807 B4
2808 D12
2809 D12
2810 F3
2811 G6
2812 G1
2813 G6
2814 H4
2815 H5
2816 H3
2817 H3
2818 I6
2819 A2
2820 B2
2821 B4
2822 C4
2823 D14
2827 F2
2831 A3
2832 A4
3800 B4
3801 A7
3802 A8
3803 A8
3804 A9
3805 A9
3807 A2
3808 A7
3809 B4
3810 A2
3811 A4
3812 B6
3813 A4
3814 I13
3815 A2
3816 B8
3817 B9
3818 B9
3819 B9
3820 B6
3821 B5
3822 A1
3823 B10
3824 C4
3825 C5
3826 A10
3828 A10
3829 B2
3830 E6
3831 C4
3832 C1
3833 B12
3834 B12
3835 B6
3836 B11
3837 B2
3838 B4
3839 C6
3840 C10
3841 C11
3842 B4
3843 D5
3844 D10
3845 D5
3846 D11
3847 D10
3848 D3
3849 D4
3850 D2
3851 D4
3852 D1
3853 D1
3854 C2
3855 E3
3856 B7
3857 F4
3858 E1
3859 E2
3860 E6
3861 G5
3862 F3
3863 F10
3864 F10
3865 E10
3866 E5
3867 G8
3868 G9
3869 G9
3870 G9
3871 B8
3872 G5
3873 G6
3874 G7
3875 H13
3876 H3
3877 H5
3878 I4
3879 F6
3880 H8
3881 I5
3882 I1
3883 H3
3884 G7
3885 G9
3886 I4
3887 I2
3888 I1
3889 D11
3890 G11
3891 D6
3892 D6
3893 D5
3894 E1
3895 F2
3896 F6
3897 G8
3898 G2
3899 D11
3914 C14
3915 C13
3916 F11
3917 F11
4801 D13
4906 G2
6801 A7
6802 A3
6803 B3
6805 F6
6807 F13
7800-A A2
7800-B B2
7800-C B3
7800-D A3
7801 A7
7803-B D8
7804 D1
7805 D3
7806 E2
7807 F5
7809 F4
7810 H1
7811 H7
7812 I3
7813 I5
7815 B13
7816 A3
7817 B3
F800 C10
F8001 A10
F8002 A10
F8003 A11
F8004 A11
F8005 A11
F8006 A11
F8007 A11
F8008 A11
F801 A1
F802 B1
F803 H5
F804 G5
F808 I10
F810 A9
F8101 D13
F8102 E13
F8103 E13
F8104 E13
F8105 E13
F8106 E13
F8107 E13
F8108 E13
F8109 F13
F811 A9
F8110 F13
F8111 F13
F8112 D13
F812 F6
F8201 H13
F8202 H13
F8203 H13
F8204 H13
F8205 H13
F8206 H13
F8207 H13
F8208 I13
F8209 I13
F8210 I13
I800 A1
I801 A3
I802 A2
I803 A2
I804 B3
I806 B1
I807 C3
I808 B2
I809 B2
I810 C3
I813 I11
I815 A5
I816 A5
I817 A6
I818 A6
I819 A6
I820 A5
I821 A5
I822 I9
I823 A7
I829 B8
I830 B8
I831 B9
I832 B9
I833 B9
I835 A6
I836 A5
I837 A5
I838 D6
I839 D6
I841 C10
I842 C10
I843 C10
I844 C10
I845 C10
I846 C10
I848 D10
I849 D10
I852 F10
I853 F10
I854 G9
I855 G9
I856 G9
I857 G8
I858 G8
I859 D7
I861 G8
I862 D10
I863 D10
I864 D10
I865 D10
I866 D6
I867 E10
I870 G5
I871 H4
I872 H5
I874 H5
I875 H5
I876 H5
I877 I6
I878 I5
I880 I4
I881 I4
I882 H3
I885 H2
I886 G1
I887 I1
I888 I1
I890 D1
I891 D2
I892 F14
I893 E2
I894 D2
I896 F3
I897 F4
I898 F5
I899 F2
I903 F11
I945 B13
I946 C14
I948 D10
I970 E7
I971 D6
I972 C6
I973 E6
I974 D6
I975 D3
I976 D6
I977 C6
I978 C6
I979 C6
I980 C6
I981 C6
I982 A7
I983 F11
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
107
Analog Board: All in One 2
2
3
4
5
6
7
8
9
10
11
12
13
AIO2
5STBY2
FL_READY
TS
SAWS
SB1
PSS
IPOR
All In One 2
14
5STBY2
Pos. 3920, 3921, 3922, 7902, 7903, 7904 are for "ON-BOARD-PROGRAMMING"
7900
TL7705
2900
3902
10n
4K7
GNDD
10K
3900
47K
10K
3901
4K7
A
3911
3918
6
5
RESET
VS
A
7
RESETQ_ SENSE
2
RESIN_
I942 1 REF
5STBY2
8
I943
3
2901
CT
1K
3905
1K
3903
I902
1K
12STBY
not used
5STBY2
GNDD
GNDD
220n
2903
4
100n
B
3904
2902
GND
47u
1
B
GNDD
GNDD
I905
3920
F938
D0
59
F901
3925
H
117
0,2V
39
F913
A10
36
F914
A9
34
F915
A8
32
A7
30
F917
A6
D7
44
F918
A5
D6
42
F919
A4
D5
40
A3
D4
38
F921
A2
D3
35
F922
A1
D2
33
A0
D1
31
D0
29
F920
F923
116
0,1V
I915
27p
2910
I
GNDD
2911
AT-49
20M00
GNDD
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
2909
2918
A12
A11
A10
A9
A8
A7
A6
DQ5
A5
DQ4
A4
DQ3
A3
DQ2
A2
DQ1
A1
DQ0
A0
VCC
37
5STBY_F
I914
1994
DQ12
A13
33K
A15
3
3906
2
GNDD
GNDD
10
4
A13
A1
9
5
A12
A2
8
A11
7
A3
7
A4
6
8
A9
A5
5
18
A8
A6
4
19
A7
A7
3
20
A6
A12
2
21
A5
A14
1
22
A4
A13
26
23
A3
A8
25
24
A2
A9
24
25
A1
A11
23
A10
21
M29F800AT
7906
A16
2
A14 GND
A15
31
A13
A14
3
14
A14
A0
6
1
A12
WE_
OE_
A11
A10
A9
A8
A7
A6
CE_
I|O7
I|O6
A5
I|O5
A4
I|O4
A3
I|O3
A2
I|O2
A1
I|O1
A0
VCC I|O0
CY62256 28
7905
5,1V
not used
27
A13
28
22
A12
4
20
A11
25
A10
23
A9
26
19
D7
A8
27
18
D6
A7
5
17
D5
A6
6
16
D4
A5
7
15
D3
A4
8
13
D2
A3
9
12
D1
A2
10
11
D0
A1
5STBY_uP
A0
NC
10n
2907
3913
100K
16
GND
A16
A15
A14
WE_
A13
OE_
A12
CE1_
A11
A10
A9
A8
A7
CE2
F
29
24
22
5STBY_uP
30
5STBY2
5STBY_uP
5STBY
F900
I|O7
21
D7
20
D6
19
D5
18
D4
17
D3
15
D2
14
11
A0 VCC I|O0
12
13
32
CY62128
7907
D1
A6
I|O6
A5
I|O5
A4
I|O4
A3
I|O3
A2
I|O2
A1
I|O1
5903 I947
GNDD
GNDD
GNDD
D0
GNDD
G
5901
100MHZ
100MHZ
GNDD
GNDD
100n
A11
DQ13
A14
A16
2906
F912
DQ14
1
47u
A12
41
F916
NC
DVCC2
ADREF
AM8|16_
DVCC3
DVCC1
113 2,2V 112
2,1V
114
13
43
A15
GNDD
GNDD
5STBY2
43
A13
F
L
A
S
H
A17
5STBY
F936
D1
F910
F911
DQ15|A-1
A18
48
2905
D0
D2
45
17
1u
44
A14
A16
GNDD
45
F935
F909
A17
RB_
A19
2904
F934
D1
D3
15
GNDD
E
16
100n
D2
D4
A15
A18
2917
46
D5
A16
F908
NC4
GNDD
26
100n
F933
47
F906
E_
2916
D3
48
13
G_
NC3
100n
F932
A17
F905
NC2
2915
F931
D4
D6
14
100n
D5
49
D7
A18
28
2914
F930
D8
A19
F904
5,1V
11
SRAM 128Kx8
D6
50
D9
W_
SRAM 32Kx8
F929
D10
RP_
NC1
9
10K
0V
12
100n
12STBY
3922
GNDD
GNDD
7904
BSH111
5STBY 5STBY2
F940
I
220K
not used
not used
A10
A0
5STBY2
CL 16532095_010.eps
070801
1
2
3
4
5
H
100n
4903
G
D7
D11
BYTE_
10
F903
WE
47
VSS2VSS1
I936
TMP93C071
7901
PMBT2369
5,1V
I847 3912
not used
not used
I935
I934
81 0V
P25|A21
5,1V
80 0V
P24|A20
79
A19
78
A18
77
A17
76
A16
75
A15
74
A14
73
A13
72
A12
71
A11
70
A10
69
A9
68
A8
67
A7
66
A6
65
A5
64
A4
63
A3
62
A2
61
A1
60
A0
D
3921
220K
GNDD
F941
51
D12
F939
46 27
I937
82 0,1V
5904
52
D13
83 5,1V
100MHZ
53
D14
P26|A22
GNDD
GNDD
7803-A
D15
P27|A23
GNDD
54
RD_
GNDD GNDD
PB0|XT1
F
GNDD
PA4|WR_
PB1|XT2
55
11
P60|PWM4|CS0_
X1
56
12
33p
57
104
P61|PWM5|CS1_
X2
103
58
27p
2908
Bead
105
22R
90
RESET_
EA_
92
I984
I904
F928 5902
93
111
DGND1
I901
F927
P62|PWM6|CS2_
DGND2|ADGND
94
DGND3
I900
5,1V
E
4902
1K
3910
100R
3908
100R
5,1V
115
12STBY
7903
BSH111
F902
118
3909
3907
100R
5STBY_uP
GNDD
C
GNDD
GNDD
D
F942
F943
F925
F924
F926
2912
10n
220K
7909
PDTC124EU
C
10K
F937
PDTA124EU
7908
3919
4901
not used
12STBY
7902
BSH111
6
7
8
9
10
11
12
13
14
1994 H3
2900 A2
2901 B14
2902 B13
2903 B14
2904 G14
2905 G14
2906 G14
2907 E14
2908 F1
2909 H6
2910 I2
2911 I3
2912 C7
2914 G12
2915 G13
2916 G13
2917 G13
2918 I6
3900 A13
3901 A12
3902 A2
3903 B4
3904 B4
3905 B4
3906 E9
3907 D1
3908 D1
3909 D1
3910 D1
3911 A12
3912 D13
3913 E13
3918 A6
3919 C8
3920 C3
3921 D12
3922 I7
3925 H2
4901 C2
4902 D11
4903 I8
5901 G14
5902 E1
5903 G13
5904 I6
7803-A E2
7900 A14
7901 D13
7902 B3
7903 D11
7904 I8
7905 H9
7906 H7
7907 H11
7908 C7
7909 C6
F900 G14
F901 H1
F902 D2
F903 E4
F904 E4
F905 E4
F906 E4
F908 E4
F909 F4
F910 F4
F911 F4
F912 F4
F913 F4
F914 F4
F915 F4
F916 G4
F917 G4
F918 G4
F919 G4
F920 G4
F921 G4
F922 G4
F923 H4
F924 C8
F925 C10
F926 C2
F927 E1
F928 E1
F929 G1
F930 G1
F931 G1
F932 G1
F933 G1
F934 G1
F935 G1
F936 H1
F937 C3
F938 D11
F939 D11
F940 I8
F941 H8
F942 C13
F943 C12
I847 D13
I900 D1
I901 E1
I902 B1
I904 E1
I905 C6
I914 H2
I915 H3
I934 E4
I935 D4
I936 E4
I937 D4
I942 B13
I943 B14
I947 G14
I984 E1
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
108
Analog Board: Tuner / Demodulator
1700 B5
1701 C5
1702 D5
1703 E10
1705 B2
2700 A3
2701 A4
2702 A4
2703 A7
2704 A7
2705 A9
2706 A7
2707 A10
2708 A10
2709 A8
2715 D7
2716 A3
2717 A1
2718 E8
3700 A3
2710 A8
2711 C3
2712 D3
2713 A1
2714 D7
1
3706 A8
3707 A7
3708 A4
3709 A9
3710 D10
3701 A6
3702 A9
3703 A2
3704 A4
3705 A9
2
3711 A1
3712 D4
3713 D5
3714 C4
3715 D10
3721 E10
3722 E9
3723 E7
3724 D7
3725 E9
3716 C1
3717 E8
3718 E4
3719 C2
3720 B1
3
3726 D9
3727 E8
3728 E8
3729 E5
3730 E5
5702 A5
5703 B9
5704 E3
5705 A1
5706 A3
4701 C4
4702 E5
5009 E9
5700 A2
5701 A10
4
5707 E10
6700 B4
6701 C4
6702 E4
6703 E6
5
7700 A10
7701 B5
7702 C5
7703 B7
7704 D10
7705 E7
7706 E9
7707 E4
7708 D2
7709 E9
6
I706 C5
I707 C6
I708 C6
I709 A7
I710 B7
F704 B5
F705 A4
I701 A6
I703 A4
I704 B4
F303 B10
F700 C3
F701 C3
F702 C2
F703 B6
7
I711 A7
I712 B8
I713 A8
I714 B8
I717 A9
I732 E9
I733 E10
I734 D10
I735 E8
I736 D9
I718 A10
I719 E7
I720 A4
I730 E10
I731 E10
8
I737 D10
I739 D7
I741 D7
I751 E4
I752 D4
9
I753 E4
I756 B1
I757 B1
I758 B1
I759 A1
I760 A1
I761 A1
I762 A3
I763 A3
I764 D3
10
Tuner/Demod.
TU
5
SDA1
100R
I706 1
6u8
5701
18K
3705
F303
21
I708
3
5SW
5,2V 3
2,8V 5
1
2V 12
9
13
10
5
6
7
5K6
3726
SB1
680R
6u8
5009
3725
1K
3717
47u
2718
100R
4K7
3724
I735
330R
3
2 TPS
GNDFV
GNDFV
GNDFV
8
GNDFV
9
E
3721
I731 270R
3K3
2K7
7706
BC857BW
I730
15u
1703
1
3728
3727
I733
5707
7709
BC847BW
3722
1n
2715
I719
GNDFV
VFV
SB1
MCL4148
GNDFV
I732
SIF1
6703
AGC_MUTE
5K6
3730
5K6
GNDFV
4
GNDFV
PSS
3729
7707
BC847BW
D
BC857BW
7704
3715
GNDFV
7705
BC847C
GNDFV
3
2u2
2714
GNDFV
GNDFV
GNDFV
5SW
5SW
100K
4702
GND
3
3723
1u
1SS356
GNDFV
3710
100R I737
2
5
11
I734
I739
6K8
3713
3712
6702 I751
GNDFV
2
1702
OFWK9656M
not used
L
H
H
L
I753
4K7
L
L
H
L
1
4
3718
SEC L'
H
L
H
L
5704
SEC L
H
L
L
H
I752
SAWS
PAL I
PAL D/K
SEC D/K
PSS
SB1
SAWS
TS
PAL B/G
SEC B/G
E
2K2
I741
1n
GNDFV
10u
FM-PLL DEMODULATOR
I736
2712
C
8
QSS MIXER
INTERCARRIER MIXER
AM DEMODULATOR
SIF
AMPLIFIER
3,2V 24
2V
VIDEO DEMODULATOR
AND AMPLIFIER
SIF INTERCARRIER
AGC MODE SWITCH
5SW
7708
PDTC124EU
B
VOLTAGE
REFERENCE
GNDFV
I764
20
16
VCO
TWD
FPLL
VIF
AMPLIFIER
3,3V 2
GNDFV
D
10n
2708
2707
18K
2705
3709
100n
5V
2,7V
17
TUNER VIF
AGC
AGC
3,3V 1
I707
5
GNDFV
GNDFV
2,7V
18
GNDFV
3,5V
19
GNDFV
220n
I714
3706
330R
2,5V
7
GNDFV
3V
2u2 low leakage
100n 2703
I711
22K
6
3,2V 23
4K7
3714
4701
not used
1SS356
6701
4K7
3719
4
GNDFV GNDFV
AFC
DETECTOR
4
2
1n
F701
14
1701
OFWG3956M
7702
PDTC124EU
F700
15
5703
GNDFV
GNDFV
5SW
22
A
AFC
3
7KMY
N750
7700
PDTC124EU
GNDFV
1
4
8p2
SB1
7
2
2710
I718
0V
5SW
TDA9818
3
F703
7701
PDTC124EU
2711
7703
5 3,3V
2
8
6
3,1V
11
5SW
AFC-ADJUST
0,9V
1700
OFWK3953M
I704
8
4 3,3V
1
F702
GNDFV
2706
I710
GNDFV
12 13 14 15
C
3707
4K7
3708
7
470p
8
F704
6
GND
1
I709
NC
SDA
3716 I757
6
GNDFV
10
SCL
AGC-ADJUST
5K6
0,7V
NC|ADC
5702
3
2
2702
1SS356
4
AS
GNDFV GNDFV
GNDFV
TS
100R
3
IF
7KMY
4
120p
220p
6700
GNDFV
3720 I756
TU
2701 I720
I717
3702
2704
I703
3704
6u8
5706
I762
100u
2716
2
B
7
9
VCC +33V
I701
I712 2709 I713
680R
100R
33K
22u
3700
3703
150K
2700
5700
Bead
1705
UV1316K 1
AGC
GNDFV
SCL1
5SW
I763
I758
GNDFV
3701
40,4-ADJUST
47n
2u2
2717
GNDFV GNDFV
I759
3711
I760
2713
A
5SW
10u
5705 I761
33STBY
F705
CL 16532095_011.eps
070801
10
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
109
Analog Board: In / Out 1
KIL
from AIO1
KIL
3534 I523
68R
100R
2
3
I522
6500
V
GNDA
GNDA GNDA
470p
2546
GNDV
18A
GNDV
19A
20A
6506
GNDV
1K
0350808190
1950-3
MT1
GNDV
MT2
GNDA GNDV
3555
6508
F534
150R
VD
to AIO1
10K
I
GNDV
GNDV
3554
75R
C570
GNDA
GNDV
H
3552
1K
3553
3547
21A
GNDV
6505
DF3A6.8FU
GNDV
I521
GNDV
from / to IO4
GNDV
CL 16532095_012.eps
080801
10
11
12
G
GNDV
F531
F530
3549
100n
7513
BC847BW
I507
AROUT_SC2
ARIN_SC2
ALOUT_SC2
ALIN_SC2
FBIN_SC2
8_SC2
GIN_SC2
BIN_SC2
RCIN_SC2
YCVBSOUT_SC2
YCVBSIN_SC2
BC_KILL_DC
from IO4
COUT_SC2
BZM55-C6V8
17A
GNDV
5STBY
I512
SC1YC_H
from AIO1
RCOUT
16A
FBOUT
GNDV
9
GNDV
15A
GNDV
2540
7512
BC847BW
100R
8
GNDV
14A
F525
3550
10u 16
3551
13A
F527
I508 3545
6504
5STBY
2534
AFEL
from AP
to IO3
D_CVBS
D_Y
to IO3
to IO3
D_C
AFER
from AP
7
F
12A
GNDV
1K
3546
GNDV
10u 16
I513
21 F5421
22 F5422
D_B
GNDV
6
P50
GNDV
68R
FMN
5
10A
1n
100n
7510
BC847BW
I505
I510
I511
V
3530
100K
3529
6507
GNDV
100R
GNDV
1u
2549
1u
1u
2538
1u
2537
D_G
GNDV
D_R
D_C
GNDV
GNDV
D_Y
GNDV
D_CVBS
GNDV
GNDV
GNDV
A_YCVBS
A_C
A_G
GNDV
A_B
GNDV
4
GNDV
F515
11A
BZM55-C6V8
10n
5STBY
I520
from / to Digital Board
8A
9A
F524
2527
3543
2551
P50
I524 3536
GNDV
20 F5420
19
18 F5418
17
16 F5416
15
14 F5414
13
12 F5412
11
10 F5410
9 F5409
8
7 F5407
6
5 F5405
4
3 F5403
2 F5402
1 F5401
GNDV
1954
A_R
from YUV _CON
from YUV _CON
A_R
A_B
from YUV _CON
A_G
CFIN
to IO2
YFIN
to IO2
YFIN
CFIN
GNDV
8SW
GNDV
GNDV
F5309
9
8
F5306
F5307
7
6
F5304
5
4
F5303
3
AFCLI
CVBSFIN
1
GNDV
GNDV
GNDV GNDVGNDV GNDV
ALIN
7A
GOUT
BC817-25W(COL) I551
GNDV
7511
I552
3544
2550
GNDA
GNDV
2539
8SW
10u 16
10u 16
2533
2532
F5301
1
2
GNDA
from Front A/V Board
delete for HDR
GNDV
GNDV
GNDV
1953
PH-B
AFCRI
I
GNDV
GNDV
6A
GNDV
F536
8SC1
68R
GNDA
E
GNDA
F521
GNDV
4401
ALOUT
4A
GNDA
F519
68R
I554 3548 I506
not used
BZM55-C6V8
470p
2545
3519
100K
GNDV
7508
BC847BW
3A
5A
GNDV
3537
I553
GNDV
4400
not used
V
3508
470p
2547
1K
3514
100K
3515
3526
100K
2523
7509
BC847BW
AROUT
2A
ARIN
GNDV
68R
2535
1u
D
1A
F518
6503
470R
BC817-25W(COL)
7515
I555
GNDA
GNDA
I587
1u
2524
H
V
SCART 1
F516
BZM55-C6V8
3535
5STBY
100R
2525
V
BZM55-C6V8
I550
100n
2529
I537
I535
I534
I536
I533
2536
100n
3523
GNDA
2530
2531
3562
100R
GNDA
6502
100n
50 I549
3532
470R
5STBY
4K7
G
3520
F513
GNDA
GNDV
1u 10
BZM55-C6V8
I548
I543
47K
470R
2518
I542
3533
100n
I556
1u
GNDA
GNDA
50
6501
GNDA
I540
I538
I557
I532
3542
3531
51
470R
470R I531
I530
100n
3541
2526
GNDV
2514
I539
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
2528
I547
54
49
V
F517
BZM55-C15
LIN-VCR
100R
4u7
470R
52
3517
I541
1u
BIN-AUX
YCVBSIN-VCR
3528
I586
GNDA
2515
1K
VREF
C
3563
1950-1
GNDA
55
53
CVBS
6 YKC21-4157
1952-C
GNDV
7505
BC817-25W(COL)
7506
BC817-25W(COL)
4K7
5
I582
I584
KIL
3538
YCVBSIN-TV
GIN-AUX
56
3522
82R
GNDV1
57
3516
GNDA
470R
3527 I504
GNDV
LIN-TV
25
58
3540
CIN-TV
RCIN-AUX
59
1K
SLB-VCR
8STBY
1u
GNDA
GNDV
4K7
47u
3539
VCCA
60
4K7
YIN-AUX
SLB-AUX
100n
2507
I568
RCOUT-TV
LOUT-TV
YCVBSOUT-TV
RIN-TV
F
YCVBSIN
from IO2
CIN
from IO2
8 YKC21-4159
1951-C
3511
50
4u7
470p
P50
50
2502
2503
2548
KIR
from AIO1
P50
from AIO1
YCVBSIN_SC1
to FOME
from DAC
from DAC
ARDAC
2K7
3501
I569
I571
I570
LOUT-AUX
COUT-VCR
ROUT-AUX
I574
YCVBSOUT-VCR
AOUT-RF
VOUT-RF
GNDV3
I572
I573
100n
2506
VCCV3
FILTER
COUT-AUX
SLB-TV
1u
VFV
from TU
A
2nd REAR_OUT
470R
3518 I583
I544 GNDA
2510
10K
3568
32
AR
F511
3513
75R
KIR
50
I585
61
3567
I529
GNDA
I545
I509
2509
25
62
100n
2522
31
YCVBSIN-AUX
63
10
I528
1u
9
B
GNDV
4u7
100u
29
30
LOUT-CINCH
I546
2521
I527
GNDV
1u
2519
28
ROUT-TV
64
2520
I526
47u
CIN-VCR
2517
2508
GOUT-TV
RIN-VCR
27
1
ROUT-CINCH
BIN-ENC
GNDV
2
VCC12
LIN-ENC
26
3
SDA
GIN-ENC
I525
GNDV
4
BOUT-TV
RIN-ENC
25
GNDV
1u
24
5
ROUT-VCR
RCIN-ENC
I516
100n
2513
47p
2512
47p
2511
23
6
SCL
LIN-STB
22
100R
7
ADD
CIN-ENC
I515
3525
AL
GNDA
100n
7504
BC847BW
I502
GNDA
GNDA
LOUT-VCR
RIN-STB
21
8
FBIN-ENC
RIN-AUX
20
FBIN-AUX
YCVBSIN-ENC
I514
2516
I575
I576
19
GNDV2
VCCV2
100n
18
GNDV
E
YCVBSOUT-AUX
1K
FBOUT-TV
LIN-AUX
100R
17
GNDV
3524 GNDV
3521
I518
3512
100R
GNDV
GNDV
7507
STV6410A 16 15 14 13 12 11 10 9
BAS385
2544
3570
100K
16_SC2
to AIO1
GNDA
I503
GNDV
VCCV1
6509
I517
SCL
from AIO1
SDA
from AIO1
100n
2505
12STBY
7
100R
GNDA
8STBY
3K3
3561
3560
470K
GNDV
GNDV GNDV
D
8STBY
5NSTBY
3K9
100n
3559
2541
GNDV
C
3565
7503
BC817-25W(COL)
4K7
GNDV
22K
WU
to AIO1
470R
3510 I501
GNDA
F510
GNDA
I581
2504
8STBY
3558
I558
7502
BC817-25W(COL)
GNDA
GNDV
F509
3564
100R
I560
I559
7517
BC857BW
2nd REAR_OUT
I580
BZM55-C6V8
2542
100n
I/O 1
not used
5STBY
YIN-ENC
I563
7514
BC857BW
GNDV
14
GNDV
BC847BW 47K
CVBSIN-STB
B
13
3509
KIR
47K
3557
7516
12
4K7
COUT_SC2
3556
I561
YCVBSIN_SC1
5STBY
YCVBSIN_SC2
GNDV
5STBY
5STBY
11
7501
BC857BW
2K2
GNDV
I566
2K2
3504
12STBY
2K7
3500
5STBY
8SW
10
470R
3507 I500
4u7
I564
BC857BW
7500
8STBY
9
3502
A
5NSTBY
100n
GNDV
ALDAC
GNDV
ARADC
to ADC, AIO1
100n
5STBY
2501
2500
8
ALADC
to ADC, AIO1
5STBY
7
3506
A_YCVBS
BIN_SC2
GIN_SC2
RCIN_SC2
from PS
from PS
from PS
from PS
from PS
to YUV_CON
6
3505
In / Out 1
5
220R
4
3503
3
220R
2
to AIO1, VPS
1
13
14
1950-1 E14
1950-3 H14
1951-C A14
1952-C C14
1953 I1
1954 I3
2500 A5
2501 A6
2502 A8
2503 B8
2504 B13
2505 C4
2506 C5
2507 C9
2508 C11
2509 C11
2510 D11
2511 E2
2512 E2
2513 E3
2514 E9
2515 E12
2516 E2
2517 E2
2518 E9
2519 E2
2520 F7
2521 F8
2522 F2
2523 F9
2524 H5
2525 H2
2526 F4
2527 F12
2528 G2
2529 G6
2530 G2
2531 G2
2532 H1
2533 H1
2534 H12
2535 H7
2536 G6
2537 G6
2538 G6
2539 H7
2540 I14
2541 C1
2542 B3
2544 D2
2545 D13
2546 D14
2547 A13
2548 B13
2549 G7
2550 G9
2551 G10
3500 A5
3501 A6
3502 A11
3503 A5
3504 A6
3505 A6
3506 A7
3507 A12
3508 A13
3509 A11
3510 A12
3511 B14
3512 B12
3513 B13
3514 C13
3515 C12
3516 C13
3517 C14
3518 C12
3519 D12
3520 D14
3521 D3
3522 D12
3523 D14
3524 D2
3525 D2
3526 D11
3527 D12
3528 E9
3529 E13
3530 E13
3531 E8
3532 E11
3533 F12
3534 F11
3535 F9
3536 F12
3537 F10
3538 F12
3539 F9
3540 F10
3541 G5
3542 G5
3543 G11
3544 G9
3545 G13
3546 G12
3547 I12
3548 H11
3549 H12
3550 H12
3551 H11
3552 H13
3553 I12
3554 I14
3555 H14
3556 B4
3557 B4
3558 C2
3559 C2
3560 B2
3561 B3
3562 D13
3563 C14
3564 A13
3565 A13
3567 F8
3568 F8
3570 D2
4400 H3
4401 H3
6500 C13
6501 F12
6502 F13
6503 F13
6504 G13
6505 H14
6506 H13
6507 E12
6508 I13
6509 D2
7500 A5
7501 A7
7502 A12
7503 B12
7504 B13
7505 D13
7506 D12
7507 C4
7508 F12
7509 F9
7510 G12
7511 F10
7512 H12
7513 H12
7514 B2
7515 F9
7516 B3
7517 B2
C570 I13
F509 A13
F510 A13
F511 B14
F513 E14
F515 F14
F516 E14
F517 E14
F518 E14
F519 E13
F521 F14
F524 F13
F525 G14
F527 G14
F530 H13
F5301 I1
F5303 I1
F5304 I1
F5306 I1
F5307 I1
F5309 I2
F531 G13
F534 I13
F536 E14
F5401 I3
F5402 I3
F5403 I3
F5405 I4
F5407 I4
F5409 I4
F5410 I4
F5412 I5
F5414 I5
F5416 I5
F5418 I6
F5420 I6
F5421 I6
F5422 I6
I500 A12
I501 A12
I502 B12
I503 C13
I504 D12
I505 G11
I506 H11
I507 H11
I508 G13
I509 C12
I510 H7
I511 H7
I512 I7
I513 I7
I514 D4
I515 D4
I516 E4
I517 D2
I518 D3
I520 I11
I521 H13
I522 H12
I523 F11
I524 F12
I525 E4
I526 E4
I527 E4
I528 F4
I529 F4
I530 F5
I531 F5
I532 F5
I533 G6
I534 G6
I535 G6
I536 G6
I537 G6
I538 F6
I539 E7
I540 E7
I541 E9
I542 E9
I543 E11
I544 D11
I545 D9
I546 D9
I547 E7
I548 E7
I549 F7
I550 F7
I551 F10
I552 G10
I553 F10
I554 H11
I555 G8
I556 F8
I557 F6
I558 C1
I559 B2
I560 B3
I561 B3
I563 B2
I564 A6
I566 A6
I568 C6
I569 C6
I570 C6
I571 C6
I572 C6
I573 C6
I574 C6
I575 C5
I576 C4
I580 A12
I581 A12
I582 C13
I583 C13
I584 D12
I585 D7
I586 E7
I587 F9
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
110
Analog Board: In / Out 2
6
WSRI
to AIO1
5SW
5SW
100R
1 IN1
GND 8
2 CTLA
OUT 7
6402
DF3A6.8FU
100n
75R
3406
2401
75R
3405
GNDV
5SW
7400
BA7652AF
10n
100R
6403
DF3A6.8FU
10u
5400
100K
3418
3404
2B
B
GNDV
YCVBSIN
to IO1
VCC 6
3 IN2
REAR_IN
3407
F5202
YKC21-4158
1959-A
GNDV
I416
I406
C
GNDV
GNDV
10n
6405
DF3A6.8FU
4
2404
IN3 5
2405
YFIN
from IO1
10n
75R
CVBS
I407
100R
2
3408
C
4 CTLB
GNDV
2402
GNDV
GNDV
B
I417
LOGIC
GNDV
I/O 2
47u
4B
F5504
2403
Y/C IN
3403 I402 2400 I404
F5503
100n
3B
10
5SW
1B
Y
C
9
A
GNDV
1955-B
TCX0310
8
100K
A
3402
REAR_IN
S-CONN
7
100K
In / Out 2
5
5SW
from PS
4
IS1
from AIO1
3
3419
2
IS2
from AIO1
1
5SW
2
D
GNDV
4
YKC21-4157
1952-A
GNDV
D
7401
BA7652AF
GNDV
not used
5SW
GND 8
2 CTLA
OUT 7
3 IN2
VCC 6
LOGIC
GNDA
4 CTLB
IN3 5
I412
1
E
GNDV
2408
GNDV
1
2
3
10K
F
GNDV
WSFI
to AIO1
ARCRI
to AP
GNDA
CFIN
from IO1
1n
3414
V
GNDA
100K
GNDA
CTLA CTLB OUT
L
L
IN1
L
H
IN2
L
H
IN3
MUTE
H
H
ARCLI
to AP
not used
3417
F
YKC21-41592
1951-A
3416
3
3415
GNDA
5SW
100K
GNDA
I411
10K
1n
CIN
to IO1
3413
I410
I414
100n
2406
GNDV
2407
100K
I409
10K
2
YKC21-3620
1958-A
3411
3
V
F5103
10K
3409
1
3412
E
1 IN1
F5101
3410
REAR_IN
AL /
MONO
AR
4
5
6
7
8
9
CL 16532095_013.eps
080801
10
1951-A F1
1952-A D1
1955-B A1
1958-A E1
1959-A C1
2400 B5
2401 B2
2402 C9
2403 C9
2404 C4
2405 C9
2406 E4
2407 E8
2408 E9
3402 A3
3403 B4
3404 B4
3405 B2
3406 B2
3407 C3
3408 C2
3409 E5
3410 E2
3411 E2
3412 E5
3413 E9
3414 F9
3415 F9
3416 F2
3417 F2
3418 A5
3419 A6
5400 A8
6402 B4
6403 B3
6405 C2
7400 B6
7401 D6
F5101 D2
F5103 E2
F5202 C2
F5503 B2
F5504 B2
I402 B5
I404 B5
I406 C5
I407 C4
I409 E4
I410 E5
I411 E8
I412 E8
I414 E9
I416 C8
I417 B10
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
111
Analog Board: In / Out 3
2
In / Out 3
3
4
5SWS
5SW
5
6
7
8
9
REAR_OUT I/O 3
5SW
1955-A
TCX0310
I432
3423
100n
82K
D_C
from IO1
10u
5430
6dB
I436
OB2 12
6dB
8 GND3
100K
3435
2440
22u
100u
2441 I439
I440
1955-C
TCX0310
5
2438
100n
GNDV
1
3 YKC21-4158
1959-B
F336
3436
GNDV
6432
CVBS
GNDV
8STBY
5SW
5SW
2
I450
47K
1K5
F9203
3448
10R
10R
not used
5
2
4
I453
3447 I449
F9202
3454
I451 3444
6437
BAV99W
SATCONTROL
BC327-40
7432
8
2450
5NSTBY
100n
GNDA
F340 1
7434-B
MC33078 GNDA
7
2K2
7431
BC817-25W(COL)
4K7
1
2
3
GNDA
7
5NSTBY
F331
4
AL
F334
5
AR
4
KIR
6
from AIO1
from AIO1
KIL
GNDA
DF3A6.8FU
470p
7433
BC817-25W(COL)
2447
3451 I457
GNDA
100R
I456
6440
470R
3450
from DAC
from DAC
ALDAC
ARDAC
5
3446
4
AL
6
AR
5
GNDA
GNDA
YKC21-4159
1951-B
not used
GNDA
GNDA
CL 16532095_014.eps
080801
7
8
E
6 YKC21-3620
1958-B
GNDA
GNDA
3445
4K7
from AIO1
BZM55-C6V8
4904
delete for HDR
GNDD
GNDD
I446
10u
SATCO
GNDD
2443
to AIO1
GNDD
GNDA
1K
NC
6
GNDA
RC
for RC only
6438
YKC21-3478
1991
1n
3
2445
2
RC IN
I459
100K
3453
6439
3441
3442 I455
470p
GNDD
VCC_HA
5
D
3440
100R
470R
10u
for SATCONTROL only
I454
3439
DF3A6.8FU
I445
2446
2442
HPL
4
EH-B
100K
3452
100u
2444
5NSTBY
F330
I458
5STBY
1
GNDD
F341 3
4406
GNDA
HPR
GNDA
8STBY
4
1956
2
4405
6
3
1992
YKB21-5130 GNDD
GNDV
GNDV
7434-A GNDA
8
MC33078
1
3
6436
BAV99W
GNDD
3 YKC21-4157
1952-B not used
100n
I452
C
1
DF3A6.8FU
F
B
from AIO1
2449
E
7
WSRO
GNDV
D
6
GNDV
DF3A6.8FU
6431 GNDV
75R
C
A
S_CONN
68R
GNDV
I438
OC2 9
3433
22u
not used
OC1 10
75E
10n
47u
2436
22u
7 INC
Y
C
DF3A6.8FU
6430 GNDV
GNDV
100u
2448
I437
NC2
1
2432
2431
I435
OB1 13
75E
5 GND2
6 NC1
470K
GNDV
2437
4 INB
4A
GNDV
I441
OA2 14
F337
4K7
5SWS
3 GND1
75R
GNDV
GNDV
2434
3431
GNDV
82K
I431
3424
82K
from IO1
GNDV
22u
OA1 15
75E
3A
10n
D_CVBS
3437
B
GNDV
2439
3434
5SWS
22u
3425
from IO1
6dB
F338
2A
2430
D_Y
2 INA
I433
I434
3438
I430
VCC 16
3432
100K
2433
470K
from AIO1
4404
1 MUTE
VMUTE
1A
not used
3455
100K
5SW
5STBY2 5STBY
7430
BA7660FS
470K
5SWS
3426
5SW
from PS
A
5STBY
from PS
5STBY2
from AIO2
GNDV
to headphone
1
9
F
1951-B F9
1952-B C9
1955-A A9
1955-C B9
1956 D9
1958-B E9
1959-B C9
1991 F1
1992 E1
2430 B6
2431 A4
2432 A5
2433 A1
2434 A4
2436 B5
2437 C1
2438 C5
2439 B1
2440 B4
2441 B5
2442 E5
2443 F5
2444 E3
2445 F2
2446 E7
2447 F8
2448 B4
2449 C7
2450 D7
3423 C1
3424 B1
3425 B1
3426 A1
3431 B6
3432 A7
3433 B7
3434 B1
3435 A6
3436 C7
3437 B1
3438 B5
3439 E6
3440 E8
3441 E5
3442 E6
3444 D3
3445 F6
3446 F8
3447 D2
3448 D2
3450 F5
3451 F6
3452 E4
3453 E3
3454 D3
3455 A2
4404 A4
4405 D9
4406 D9
4904 F4
5430 A4
6430 A8
6431 B8
6432 C8
6436 D4
6437 D1
6438 F2
6439 E8
6440 F8
7430 A2
7431 E7
7432 D3
7433 F7
7434-A D7
7434-B D8
F330 E2
F331 E9
F334 E9
F336 C9
F337 A9
F338 A9
F340 D9
F341 D9
F9202 D2
F9203 D2
I430 A2
I431 B2
I432 C2
I433 A4
I434 A4
I435 B4
I436 B4
I437 B4
I438 C4
I439 B5
I440 B6
I441 B5
I445 E6
I446 F6
I449 D2
I450 D3
I451 D3
I452 D3
I453 D4
I454 E7
I455 E6
I456 F7
I457 F7
I458 D9
I459 E3
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
112
Analog Board: In / Out 4
5
I479
3460
GNDA
4u7
GNDA
3466
I480
100R
I473
3467
7461
BC817-25W(COL)
3470
100K
GNDA
GNDV
10B
F5011
D
11B
GNDV
6462
12B
13B
GNDV
14B
GNDV
GNDV
F5015
15B
16B
6465
5
75R
F5021
6
7
21B
GNDV
GNDV
F
GNDV
YCVBSIN_SC2
to IO1
YCVBSOUT_SC2
from IO1
FBIN_SC2
to IO1, AIO1
RCIN_SC2
to IO1
8_SC2
to IO1
BIN_SC2
to IO1
SC2RGB_H
from AIO1
GIN_SC2
to IO1
4
DF3A6.8FU
6466
GNDV
GNDV
GNDV
3
GNDV
BZM55-C6V8
6463
75R
3481
68R
20B
YCVBSIN
3483
3485
1K
F
YCVBSOUT
I476 3484
GNDV
I478
E
19B
F5020
GNDV
150R
7464
BC847BW
GNDV
GNDV
18B
F5019
I471 3486
3482 I477
GNDV
GNDV
FBIN
17B
GNDV
BZM55-C6V8
1u
2469
MCL4148
6468
GNDV
BZM55-C6V8
6464
75R
2465
390R
3457
GNDV
100R
BC_KILL_DC
to IO1
8SC2
9B
GNDV
F5010
not used
BIN/COUT
RCIN
GNDV 100n
2
4403
8B
F5016
I483
COUT_SC2
from IO1
75R
3478
GNDV
3480
2466
GNDA
7463
BC817-25W(COL)
5STBY
GNDV
7B
GIN
GNDV
1K5
3458
5NSTBY
1
GNDV
ALIN
10n
4K7
C
6B
F5007
BZM55-C6V8
I460
ALOUT
4B
5B
GNDA
P50
to I/O 1
not used
3479
ARIN
GNDA
GNDA
BZM55-C15
6461
47K
3477
470R
AROUT
3B
F5008
GNDA
I482
2B
F5004
3474
BZM55-C6V8
3476
1K
1%
6460
68R
GNDV
GNDV
GNDA F5006
F5003
3473
I461
4K7
10K
3459
3475
7466
BC817-25W(COL)
E
GNDA
GNDV
I463
3489
GNDA
50
7462
BC847BW
470R
D
GNDA
1B
F5002
GNDV
I462
I481
2463
4u7
82R
3472
100n
2464
I465
1950-2
F5001
3471
5STBY
SCART 2
100K
3469
4K7
470p
25
2468
470R
47u
B
GNDA
3488
V
I474
3468
2462
3465
3464
100K
50
B
GNDA
GNDA
V
GNDA
V
2461
100K
3463
I469
A
V
7460
BC817-25W(COL)
3462
I472
3461
470p
100R
2467
25
5NSTBY
C
9
3487
470R
47u
5NSTBY
from PS
5STBY
from PS
I464
4K7
5STBY
8
I/O 4
2460
A
7
6
AROUT_SC2
from IO1
KIR
from AIO1
ARIN_SC2
to IO1
ALIN_SC2
In / Out 4
4
ALOUT_SC2
from IO1
3
KIL
from AIO1
2
to IO1
1
CL 16532095_015.eps
080801
8
9
1950-2 C9
2460 A5
2461 B5
2462 B5
2463 C5
2464 C2
2465 E6
2466 E2
2467 A7
2468 B7
2469 E2
3457 E6
3458 E2
3459 D1
3460 A6
3461 A6
3462 A8
3463 A5
3464 B7
3465 B8
3466 B6
3467 B6
3468 B8
3469 C5
3470 C6
3471 C8
3472 C1
3473 D3
3474 D5
3475 D2
3476 D3
3477 D5
3478 D7
3479 E2
3480 E6
3481 E7
3482 F5
3483 F7
3484 F8
3485 F6
3486 F8
3487 A8
3488 B8
3489 D1
4403 D8
6460 D3
6461 D5
6462 D8
6463 E7
6464 E7
6465 F7
6466 F9
6468 E1
7460 A7
7461 B7
7462 C2
7463 E3
7464 F6
7466 D1
F5001 C9
F5002 C9
F5003 C9
F5004 C9
F5006 C8
F5007 D9
F5008 D9
F5010 D9
F5011 D9
F5015 E9
F5016 E9
F5019 E9
F5020 E9
F5021 F9
I460 D2
I461 D3
I462 C1
I463 D2
I464 A6
I465 C5
I469 A5
I471 F8
I472 A7
I473 B7
I474 B6
I476 F8
I477 E5
I478 F6
I479 A7
I480 B7
I481 D1
I482 D2
I483 E2
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
113
Analog Board: Sound Processing
1
2
3
4
5
6
7
8
9
Sound Processing
AP
8SW
GNDA
GNDD
100n
2603
10u
RESETQ
17 I2S_DA_IN1
22
10n
I620
56p
2609
I619
SIF1
S1...4
FM1
FM2
NICAM A
NICAM B
3 ANA_INDEMODULATOR
2 ANA_IN+
I2SL/R
I2SL/R
DACM_R
D/A
LOUDSPEAKER R
2608
GNDA
C
I622
B
GNDD
I606
21 I2S_DA_IN2
2607
4K7
3602
10n
10u
I605
6600
19
26
10u
16 I2S_DA_OUT
DVSUP
MCL4148
7600
MSP3415G
11
2606
GNDD
STBYQ
15 I2S_WS
2604
5600
34
CAPL_M
33
10u
2602
10n
10u
42
AHVSUP
QFP44
14 I2S_CL
B
10K
2605
100R
4
9
VREFTOP
13 I2C_DA
3603
D_CTR_IO1
12 I2C_CL
8
ADR_SEL
I624
I623
ADR_CL
3601
100R
A
3600
GNDA
18 10
SCL1
I604
I603
GNDD
TESTEN
5SW
I601
D_CTR_IO0
8SW
2601
C670
GNDA
2600
4601
I600
8SW
5SW
A
SDA1
I602
5SW
GNDD
LOUDSPEAKER
DACM_L
LOUDSPEAKER L
27
D/A
GNDD
56p
C
2610
2u2
EH-B
3606
41 SC1_IN_R
1K
3607
40 SC1_IN_L
A/D
SCART-R
HEADPHONE L
38 SC2_IN_R
31
29
35
39
DVSS
44
23 24 28 32
20
GNDD
GNDA
NC
1
5
7
I611
25
AVSS
1K
ASG
3605
AHVSS
SCART Switching Facilities
ARCLI
2u2
SC1_OUT_L
5SW
100u
GNDA
2
3
AFEL
4
5
E
GNDA
GNDA
6
1600
I609
HC-49/U
18M432
F
10n
10u
2622
10u
2623
F
2620
5601 I613 5602 I612
1
AFER
D/A
37 SC2_IN_L
1K
VREF1
2615 I615
SCART-L
VREF2
2u2
E
30
2616
ARCRI
I614
SC1_OUT_R
D/A
AVSUP
3604
I617
D
GNDA
SCART-R
1K
2614 I616
4u7
1n
2625
HEADPHONE R
2617
DVAL
F6004
SCART-L
2612
I607
3p3
4
A/D
2621
3
GND
2u2
36
XTAL_OUT
F6002
AGNDC
XTAL_IN
2
2624
3p3
F6001
10n
DFP
TP
GND
1
GNDA
D
from DV - Board
DVAR
IDENT
1n
IDENT
43 MONO_IN
1960
GNDD
GNDA
6
CL 16532095_016.eps
080801
GNDD
7
8
9
1600 F7
1960 D1
2600 A6
2601 A6
2602 A7
2603 A7
2604 A9
2605 B8
2606 B8
2607 C2
2608 C9
2609 C2
2610 C8
2612 D8
2614 E1
2615 E1
2616 E8
2617 E8
2620 F7
2621 F7
2622 F5
2623 F6
2624 D2
2625 D2
3600 A8
3601 B1
3602 B9
3603 B2
3604 E2
3605 E2
3606 D2
3607 D2
4601 A5
5600 A8
5601 F5
5602 F6
6600 B9
7600 B6
C670 A3
F6001 D1
F6002 D1
F6004 D1
I600 A4
I601 A6
I602 A7
I603 A7
I604 A8
I605 B7
I606 B7
I607 D8
I609 F7
I611 F7
I612 F6
I613 F5
I614 E2
I615 E2
I616 E2
I617 E2
I619 C2
I620 C1
I622 C2
I623 B2
I624 B2
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
114
Analog Board: Follow Me
Analog Board: VPS
2
7950 D4
7951 B2
7952 B3
F950 A3
I951 B2
I952 B2
I953 C2
I954 C3
I963 E1
3994 E1
3995 E3
5990 A4
5991 A3
7990 B1
I987 E3
2
GNDV
5SW
1 CVBS
6
2
4
GNDV
GNDV
I961
3966
33K
2957
SDA1
47u
2991
BLAN 12
CTRL
Address
TIME BASE
R 8
DISPLAY
3993 I988 16 SCL
3994 I989 17 SDA
100n
2990
Data
Address
CTRL
GNDV
25 VSSO
D
G9
INTERFACE
I2C BUS
B 10
INTERFACE
100R
E
MEMORY
SYNTHETIZER
100R
TEST2
7
E
GNDV
26
GNDV
11
Y 15
14
13
E
3995
10K
GNDV
1
VFV
YCVBSIN_SC1
I963
CL 16532095_018.eps
080801
CL 16532095_017.eps
080801
2
3
4
1
C
FREQUENCY
33K
3964
33K
3963
180p
I999
47K
27
8 PAGES
OSCILLATOR
23 XTO
TEST1
47K
I992 3991
COR_
10M
SCL1
GNDV
2955
D
24 XTI
I998
GNDV
9
8
I959
3960
1u
33K
2956
2n2
33K
3962
3965
I960
I958
GNDV
E
33K
180p
2953
21 VCR_|TV
20
3990
1u
10M
GNDV
2954
5SW
I957
3959
3961
5SW
2n2
GNDV
GNDV
2952
4
5
11
10
I956
DATA EXTRACTION
RGBREF
2996
22p
D
DV_ 19 I991
DATA
PROCESSING
I987
22p
HC-49/U
13M875
7950-C
LM339D
7950-A
LM339D
DATA DECODING
SYNCHRONIZING
ODD_|EVEN
2995
GNDV
7950-D
LM339D
I997
14
2
13
3958
4K7
I990
Data
Data
GNDV
1990
I955
3
100n
C
B
22
Clock
VSSD
2K2
100n
18
VSSA
C
28 CBLK
I996
I954
4K7
3955 I962
5SW
5SW
2994 I995
GNDV
VDDA
3992
5
I993
7990
STV5348
GNDV
GNDV
L23
B
POL
B
2992
GNDV
GNDV
MA_|SL
10u
FFB
GNDV
BC847BW
7951
7952
BC847BW
2951
2993
15K
GNDV
VDDD
GNDV
6
3953
I952
I953
10u
5990
A
5SW
CLAMPING
D
4
5SW
47K
12
A
I994
2K2
I997 C1
I998 D1
I999 D1
5SW
22K
3957
I994 B1
I995 C1
I996 C1
3
GNDV
3954
3956
I991 C4
I992 C4
I993 B2
5991
I951
3952
C
I988 D1
I989 D1
I990 B4
VPS
A
100K
3951
1
7
3
5SW
7950-B
LM339D
4K7
3991 C4
3992 B2
3993 D1
FOME
4K7
B
2995 C1
2996 D1
3990 C4
1
4
3950
A
2992 A3
2993 B1
2994 C1
1990 D1
2990 A4
2991 A4
F950
GNDV
100n
I959 D3
I960 E1
I961 E3
I962 C2
STTV
Follow Me
2950
I955 C1
I956 D1
I957 D1
I958 D3
3
FOME
1
3966 E4
7950 A2
7950 D2
7950 D2
3962 E2
3963 E3
3964 E3
3965 E2
3958 C3
3959 D1
3960 D3
3961 E1
3954 B1
3955 C2
3956 C1
3957 C1
A_YCVBS
3950 A1
3951 A3
3952 B1
3953 B3
100n
2954 D2
2955 D4
2956 E1
2957 E3
5SW
2950 A1
2951 B3
2952 D2
2953 D4
2
3
4
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
115
Analog Board: Power Supply
1
2
3
4
6
5
7
8
9
PS
5M
Power Supply
12STBY
A
A
1
8STBY
GNDA
GNDA
GNDA
100u
2325
2
not used
OUT
100n
2331
GND
330n
2324
47u
GNDA
GNDA
220K
3321
3338
3339
220K
5STBY
I340
100u
7324
PDTC124EU
GNDA
GNDA
I341
GNDA
7330
7331
BC847BW
BC847BW
1324
2
3
4
5NSTBY
to AIO1, DAC_ADC,YUV,
IO1, IO3, IO4
to AIO1
VGNSTBY
to TU
33STBY
to AIO1
IPFAIL
F
FLYB
E
5
not used
5STBY
5.2V / 0V
7322
BC847BW
I326
0V / 5.3V
10K
3336
47R
I325 3322
GNDA
GNDA
to DAC_ADC,AIO1
GNDA
F9333
5STBY
470n
2329
3340
220K
GNDA
F9332
1A
PSC
5SW
1
100u
D
12.3V / 0V
F9330
E
2328
GNDA
I339
D
GNDA
F9341
10K
F3207
3326
7
100K
F3206
220K
6
100n
F3205
C
F9342
5SW
500mA
PSC
3337
5
1325
F9338
F9347
47n
4
F3204
2SK2839
2322
3
F9343
5.3V / 0V
3325
GNDA
F3202
F3203
2323
FLYB
100n
2SK2839
2321
7321
33STBY
2
7323
VGNSTBY
17.9V / 0V
250mA
5NSTBY
F9346
not used
12V
F3201
1996
1
5V
GNDA
I324
1932
4320
C
2332
33STBY
1A
PSC
1326
8SW
220K
EH-B
B
F9336
500mA
PSC
1327
2330
not used
delete for HDR
B
I345
3
IN
F9345
F9340
F9344
7332
I337 0V / 5.3V
3323
10K
I338
7329
BC847BW
GNDA
3335
ISTBY
4K7
GNDA
CL 16532095_019.eps
080801
6
7
8
9
F
1324 E8
1325 C8
1326 B2
1327 B2
1932 C1
1996 D4
2321 C6
2322 D6
2323 D6
2324 B3
2325 B4
2328 C8
2329 E2
2330 B3
2331 B4
2332 B8
3321 C7
3322 E6
3323 F6
3325 D6
3326 D7
3335 F9
3336 F8
3337 D6
3338 D3
3339 D2
3340 E2
4320 D4
7321 C5
7322 F6
7323 D5
7324 D7
7329 F8
7330 E2
7331 E3
7332 A4
F3201 C1
F3202 C1
F3203 C1
F3204 C1
F3205 C1
F3206 D1
F3207 D1
F9330 E8
F9332 E9
F9333 E9
F9336 B6
F9338 C8
F9340 B2
F9341 C9
F9342 C9
F9343 C8
F9344 A3
F9345 B3
F9346 C2
F9347 C2
I324 C6
I325 F6
I326 F6
I337 F8
I338 F8
I339 D6
I340 E2
I341 D3
I345 A4
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
116
Analog Board: Audio Converter
22n
I034
11 WS
F014
I035
12 DI12
13 DI34
14 DI56
22R
F0005
F0003
7005
LF33CV
IN
D
7
GNDD
6
A_DAT
5
GNDD
4
2027
OUT
22R
GNDA GNDA
GNDA
1R5
3010
5K1
GNDA
1R5
GNDA
I011
4K7
3V3DD
4K7
3V3DD
1
2
1R5
1R5
3019
GNDD
1%
D
8STBY
1%
GNDA
I027
100n
VREF 2
47u
ADC
2012
1 VINL
8
4
I018
12 WS
GNDA
DC-CANCEL
FILTER
DIGITAL DATAO 13
INTERFACE
6 SFOR
VSSD VSSA
10
15
I023
100n
GNDA
GNDA
GNDA
5NSTBY
3032
3022
I014
5K1
47u
11 BCK
1%
F
2018
220p
I020
3
GNDA
GNDD GNDA
GNDD
GNDA
CL 16532095_020.eps
080801
4
E
2014
100n
2017
I019
ADC
ALDAC
to IO1, IO3
6
I022
3 VINR
GNDA
7002-B
MC33078
F011
7
GNDA
VREFP 5
VREFN 4
2011
47K
CLOCK
CONTROL
4R7
2016
47p
3018
47K
3023
47p
I016
7 PWON
47p
GNDD
16
9 100n
VDDA VDDD
3028
1n
GNDD
I026
2019
DECIMATION
FILTER
not used
1%
3013
F
12K
2007
3012
I013
100n
8 SYSCLK
3024
I017
3021
1%
5
1%
not used 2021
47u
3020
12K
I039
7004 GNDA
UDA1360TS
14 FSEL
not used 2020
ARADC
from IO1
47u
2015
I038
I037
3029
GNDA
3011
I012
2009
I015
8STBY
3009
not used
3V3DD
GNDD
GNDD
22R
ALADC
from IO1
22R
22R
GNDA
2013
2001
5001
1
Bead
E
3015
GNDD
GNDD
F0002
F0001
not used 2022
3
2
1%
3008
A_WCLK
A_BCLK
C
4K7
VREFA
30
I030
GNDD GNDD GNDD
GNDD
3014
1%
3V3DD
220p
GNDA
3016
47p
A_PCMCLK
GND
4K7
ARDAC
to IO1, IO3
2
100n
F0007
VSSA
3
I025
3006
VO4 2
VO6 5
VDDA
6
I029
GNDD
not used2023
8
DAC'S
1%
2010
GNDD
GNDD
4K7
4 VO5
D_BCLK
9
I010
1%
GNDD
F0009
GNDD
10
VO2N 31
7002-A
MC33078
1 F010
3
4K7
F0011
GNDD
GNDD
29 VO1N
I024
3017
F0012
D_WCLK
11
3005
330p
22R
GNDD
2003
12
I009
10u
D_DATA0
3030
2028
13
F0014
100n
GNDD
GNDD
14
VO2P 32
1 VO3
not used 2029
GNDD
15
D_PCMCLK
C
F0016
16
GNDD
2030
17
D_IKILL
28 VO1P
3007
GNDD
B
GNDD
DS 26
2002
10u
3VD
TST2 22
VOL/MUTE/DEEMPH
NC INTERPOL FILTER
15
NOISE SHAPER
2008
5002
L3MODE 17
8
100u
5003
18 F0017 5004
GNDD
7
47p
19
5VD
5NSTBY
L3DATA 19
16 SYSCLK
DAINOPT
8STBY
L3CLK 18
47u
20
GNDD
DEEM0 25
100n
2006
21
DAINCOAX
DEEM1 24
GNDD
3V3DD I036
3003
B
5VDD
Bead
to DIGIO
22
DAOUT
27 TST1
GNDD
5000
10K
3027
1900 FMN
22R
3025
GNDD
I031
MUTE 23
2005
DAOUT
A
10K
F013
DAC_ADC
STATIC 9
3002
2000
GNDD
CONTROL
INTERFACE
I033
9
I032
330p
3V3DD
10K
3004
47p
not used
2026
47p
2025
47p
2024
MCL4148
to DIGIO
GNDD
8
100K
BC857BW
7000
GNDD
20
VSSD
DIGITAL
INTERFACE
from DIGIO
7
3001
7001
UDA1328T 21
VDDD
10 BCK
22n
2004
from DIGIO
DAINCOAX
6
I028
47u
F012
22R
I001
DAINOPT
GNDD
GNDD
GNDD
GNDD
not used
4K7
3026
A
5
3000
6000
IPFAIL
from AIO1
4
5NSTBY
Audio
Converter
3
from PS
2
from PS
1
5
6
7
8
9
1900 B1
2000 A4
2001 E1
2002 C7
2003 C4
2004 C4
2005 D5
2006 D5
2007 D8
2008 D7
2009 D4
2010 E8
2011 E6
2012 E6
2013 E1
2014 E8
2015 F1
2016 F5
2017 F6
2018 F8
2019 E5
2020 F2
2021 F2
2022 E3
2023 D3
2024 A2
2025 A3
2026 A3
2027 D3
2028 D4
2029 C3
2030 C3
3000 A2
3001 A7
3002 A6
3003 B4
3004 A3
3005 B7
3006 C7
3007 C7
3008 C6
3009 C8
3010 C6
3011 D7
3012 D7
3013 F2
3014 D2
3015 E2
3016 D2
3017 D7
3018 E6
3019 E6
3020 E2
3021 F2
3022 F8
3023 E3
3024 E3
3025 B2
3026 A2
3027 B2
3028 F5
3029 C8
3030 C3
3032 F8
5000 B3
5001 E1
5002 B3
5003 B1
5004 B1
6000 A1
7000 A6
7001 A4
7002-A B8
7002-B E8
7004 E4
7005 C3
F0001 E1
F0002 E2
F0003 D2
F0005 D2
F0007 D2
F0009 D2
F0011 C2
F0012 C2
F0014 C2
F0016 C2
F0017 B1
F010 C9
F011 E9
F012 A1
F013 A1
F014 A1
I001 A1
I009 B6
I010 C6
I011 D6
I012 D6
I013 D5
I014 F6
I015 E3
I016 E3
I017 F3
I018 F3
I019 F3
I020 F3
I022 E8
I023 F5
I024 B8
I025 C8
I026 D8
I027 E8
I028 A4
I029 C4
I030 C5
I031 A6
I032 A7
I033 A4
I034 A4
I035 A4
I036 B4
I037 E3
I038 E1
I039 F1
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
117
Analog Board: Digital In / Out
4
I496 100n
5VDD
3204
B
I208
3205
not used for SA7118
15K
3206
2480
C
DAOUT
from DAC_ADC
10n
3490
4470
7470-A
PC74HCU04D
1
A
Y
I490
2
3
470R
A
3495
5
I489
2K2
A
A
6
3218
I225
3224
1K5 1%
I226
3221
1K5 1%
3222
3220
1K2
4K7 1%
1K
2
4201
A_B
GNDD
1
OPTICAL
OUT
VIN
GND
5VDD
E
1
1942
GP1FA550RZ
VCC
1K
F4205
3
OUT
GND
2
GNDD
CL 16532095_021.eps
080801
4
D
VCC
not used
DAINOPT
to DAC_ADC
3
GNDD
GNDD
3498
1%
OPTICAL
IN
CL 16532095_022.eps
080801
1
2
C
5
GNDD
1943
GP1FA550TZ
3
GNDD
E
5VDD
to I/O 1
Y` = R - V x 1,402
U = B/2 - 0,169R - 0,331G
V = R/2 - 0,419G - 0,081B
1
delete for
HDR
to I/O 1
12
F4204
3497
A_R
100R
Y
GNDD
F488
1941-B
YKC21-3600
2
100R
to I/O 1
100R
3225
A
3429
560R
4
2
DAOUT
from DAC_ADC
A_G
100R
I224
3219
10
I486
D
3223
GNDV
E
4202
I216
D
2481
750R 1%
1K 1%
4K7 1%
3215
3213
3214
4K7 1%
4203
7200-B
TSH95
7
5
1K5 1%
3212
GIN_SC2
from IO1
Y
2470
6
7470-F
PC74HCU04D
13
I215
Y
I492
100n
7470-E
PC74HCU04D
I213
D
4
7470-C
PC74HCU04D
GNDV
I214
Y
1
GNDD
10u
7470-B
PC74HCU04D
11
3211
2479
4471
47R
I212
GNDD
2
750R 1%
3210
5K62 1%
6K8 1%
C
1948
YKC21-3416
not used
not used
GNDD
8
B
GNDD
3
GNDD
GNDD GNDD
3443
2
6RG
DIGITAL
OUT
1
BZX284-C6V8
3209
75R
100n
I211
3208
150p
2477
3
3494 F4202 2
2484
7200-A
TSH95
1
1K5 1%
1945
F4203 3 YKC21-3479
33p
3207
RCIN_SC2
from IO1
Ground not connected
to the rear plane
2473 I487
6
1
A
GNDD
100n
750R 1%
I210
GNDD
I497
3496
I209
5VD1
3456
1K 1%
B
4
2
not used
100K
GNDV
GNDV
5470
3
DIGITAL
IN
GNDD
GNDD
I485
not used
DAINCOAX
to DAC_ADC
GNDD
1
5
2474
GNDV
5STBY 5NSTBY
B
10K
7201
PDTC124EU
9
GNDD
3491
YUV_ON
from AIO1
I205
2486
11
I204
100K
3203
3202
12
15K
3201
7200-C
TSH95
10
F4102
1941-A
YKC21-3600
100n
100K
3492
GNDD
3
75R
100R
3493
3427
2471
A
F4103
not used
2485
Vss
BZX284-C6V8
Y
7470-D
PC74HCU04D
14
3428
Vcc
9
GNDD
not used
GNDD
I206
1K 1%
BIN_SC2
from IO1
4
DIGIO
5VD1
7
I203
I207
C
3
330R
3499
GNDV
I495
1u
22K
3200
47u
2203
22n
GNDV
A
8
2483
GNDV
A
5VD1
5VDD
from DAC_ADC
13
750R 1%
5NSTBY
from PS
5STBY
2202
15
GNDV
from PS
7200-D
TSH95
16
4
47u
22n
2201
2200
14
I490 C2
I492 C3
I495 A1
I496 A2
I497 B1
F4204 D3
F4205 E4
F488 D4
I485 A2
I486 D3
I487 B3
I489 C1
Digital In / Out
I202
I201
GNDV
YUV_CON
7470-D A1
7470-E C2
7470-F D2
F4102 A4
F4103 A4
F4202 B4
F4203 A4
4471 C2
5470 B2
6470 A3
6471 C3
7470-A C2
7470-B C2
7470-C C2
3494 B3
3495 C2
3496 C1
3497 D2
3498 E3
3499 A1
4470 C1
2
5VDD
5STBY
A
1
5STBY
5NSTBY
3429 D3
3443 D4
3456 B1
3490 C1
3491 A1
3492 A2
3493 A3
2481 E2
2483 A1
2484 D3
2485 B4
2486 B1
3427 A2
3428 A2
1n
RGB-YUV-Conv.
2471 A3
2472 A3
2473 B3
2474 B3
2477 D3
2479 C3
2480 B1
1941-A A4
1941-B C4
1942 E4
1943 D4
1945 A4
1948 B4
2470 C3
100n
3
I226 E2
I213 D1
I214 D2
I215 D1
I216 D3
I224 E2
I225 E2
not used
6471
2
I207 A1
I208 B3
I209 C2
I210 C2
I211 C1
I212 C2
150p
6470
1
I201 A2
I202 A3
I203 A4
I204 A4
I205 A3
I206 A2
4203 D4
7200-A C3
7200-B D3
7200-C A3
7200-D A2
7201 B4
2472
3222 E2
3223 D4
3224 E4
3225 E4
4201 D4
4202 D4
3214 D2
3215 E2
3218 E1
3219 E2
3220 E3
3221 E1
100K
3208 C1
3209 C1
3210 C2
3211 D1
3212 D1
3213 D1
3202 B2
3203 B2
3204 B3
3205 B3
3206 B3
3207 C1
not used
Analog Board: RGB-YUV-Converter
2200 A1
2201 A1
2202 A3
2203 A3
3200 A4
3201 A1
3
4
E
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
118
Analog Board: Fan Control
3974 F1
3975 F2
3976 F3
3977 A2
3978 B5
3979 B4
3980 D3
3981 F4
1
7970-C E3
7970-D D2
7971 B5
7972 D5
7973 B1
7974 C2
7975 C2
F805 B5
3996 A4
3997 A5
4905 C5
6970 C3
6971 C4
6972 C3
7970-A E4
7970-B B3
3982 E3
3983 F3
3984 E5
3985 D1
3986 E1
3987 C4
3988 E1
3989 D5
2
3
I932 B1
I933 E3
I924 F3
I925 C3
I926 F2
I927 D1
I928 D1
I929 D4
I930 E4
I931 D5
F806 C5
F807 F1
F813 B5
F814 C5
I920 B2
I921 B3
I922 B4
I923 E2
4
10R
for SW contr. only
7
7970-B
LM324D
BSH111
C
3980
7970-D
4 LM324D
10K
I928
3940
3941
33K
F814 F806
GNDD
EH-B
7972
BC847BW
I931 3989
22K
delete for
SW contr.
10K
13
1n
2984
3970 I923
12STBY
220K
GNDD GNDD
1
56K
3975
t
not used
3974
GNDA
18K
GNDD
2
39K
15K
TEMP
to AIO1
CL 16532095_023.eps
080801
I924
3
F
3981
GNDD
3976
GNDD
BE_FAN
to AIO1
1K
2
11
9
11
1K
E
7970-A
LM324D
4
1 I930 3984
I933
56K
I926
3973
7970-C
LM324D
8
4
3982
10
3983
33K
27K
3971
3988
3
F
from AIO1
GNDD
GNDD
12STBY
12STBY
F807
D
ION_FAN
from AIO1
SW_BE_FAN
11
TEMP_SENSE
from AIO1
C
MOT
2
GNDD
10n
12
I929
2983
I927
3986
1K
for SW contr. only
GNDD
14
E
3987
470R
3972
3948
delete for SW contr.
5K6
3985
12STBY
GNDD
MCL4148
10u
10K
1
I925
2970
3943
ION_FAN
from AIO1
B
1984
12STBY
6972
7974
BC847BW
F813
125mA
MP13
MCL4148
220K
D
2982
12STBY
6971
6970
4K7
7975
3944
F805
not used
4
5
GNDD
A
12STBY
BC636
7971
1K
100u
for SW contr. only
5SW
1983
5SW
I922
3979
I921
4905
6
for SW contr. only
7973
BC847BW
10K
3947
10n
11
I920
MCL4148
GNDD
12STBY
10R
10R
3997
10R
10R
10R
3978
3996
100n
100u
2981
3969
2985
22K
SW_CAB_FAN
3968
3942
2K2
B
2980
GNDD
I932
from AIO1
22K
3977
A
3967
from PS
FACO
12STBY
5SW
Fan Control
12STBY 3946
Personal Notes:
5
12STBY
from PS
3948 D2
3967 A3
3968 A3
3969 A4
3970 E2
3971 E1
3972 C3
3973 F2
2985 B3
3940 C4
3941 D4
3942 B1
3943 C1
3944 C1
3946 B1
3947 B4
1983 C5
1984 C5
2970 C2
2980 A2
2981 A3
2982 C3
2983 D4
2984 E1
4
5
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
119
Layout Analog Board (Overview Top View)
1323
1324
1326
1327
1600
1700
1701
1702
1703
1703
1802
1900
1910
1911
1932
1941
1942
1943
1943
1948
1950
1951
1952
1953
C8
C9
C9
C6
C7
C9
B9
B9
B8
A9
A3
B1
C3
C3
C9
A3
A3
A4
A3
A3
A7
A5
A9
C7
1954
1955
1956
1958
1959
1960
1980
1981
1982
1983
1984
1987
1990
1991
1992
1994
1996
2000
2003
2004
2006
2007
2010
2011
B4
A8
B4
A5
A9
C7
B3
C5
B3
A1
B1
C6
C6
A1
A2
B2
C9
A3
A4
A4
A4
A5
A5
A5
2012
2013
2015
2017
2018
2020
2021
2022
2023
2024
2025
2026
2028
2029
2030
2201
2203
2328
2330
2331
2332
2336
2400
2403
A5
A5
B4
A5
A5
B1
B1
B1
B1
B1
B1
B1
A4
B1
A3
A5
B5
C8
A4
A5
C8
B6
A8
A8
2405
2406
2407
2408
2430
2431
2433
2434
2436
2437
2438
2439
2440
2441
2442
2443
2444
2446
2448
2449
2450
2460
2461
2462
A8
A8
A8
A8
A9
A9
A9
A9
A9
A9
A9
A9
A9
A9
A3
A6
A2
A5
A9
B4
B4
A6
A6
A6
2463
2464
2466
2469
2470
2471
2479
2480
2483
2484
2486
2500
2501
2502
2503
2508
2509
2510
2512
2513
2514
2517
2520
2521
A5
A7
A7
A7
A3
A3
A3
A2
A3
A2
A3
B7
B7
A5
A5
A6
A6
A6
B6
A6
A7
B6
B7
B6
2522
2523
2523
2528
2529
2530
2530
2532
2533
2533
2537
2538
2539
2541
2542
2544
2547
2600
2602
2603
2608
2612
2614
2615
PART 1
CL 16532095_40a.eps
B6
A7
C6
B6
B6
B6
A7
C6
C7
B7
B6
B6
B7
B7
B7
B3
A6
B7
B7
B8
B8
B7
C7
C7
2622
2624
2625
2700
2703
2708
2714
2716
2717
2718
2800
2801
2803
2804
2806
2810
2811
2812
2813
2816
2817
2818
2820
2831
C8
C7
C7
A9
C9
A8
B8
B9
B9
B8
A4
B3
B3
B3
A4
B4
A3
B4
A3
B3
B3
A3
A3
A4
2901
2903
2918
2950
2951
2952
2953
2956
2957
2970
2980
2982
2983
2984
2985
2991
3000
3001
3005
3006
3008
3009
3010
3011
B1
A3
A1
C5
C5
B5
B5
B6
B5
A1
A4
A1
A2
A2
A1
C6
A5
A5
A5
A5
A4
A5
A4
A5
3012
3018
3021
3022
3028
3029
3032
3110
3201
3202
3203
3207
3208
3210
3211
3214
3402
3403
3404
3409
3412
3413
3414
3415
A5
A5
A5
A5
A4
A5
A5
C4
B5
B5
B5
B5
B5
B5
B5
B5
A8
A8
A8
A8
A8
A8
A8
A8
3418
3419
3423
3427
3428
3429
3431
3432
3433
3434
3435
3437
3439
3440
3441
3442
3455
3456
3457
3458
3459
3464
3465
3470
B3
B3
A9
A3
A3
A2
A9
A8
A9
A9
A8
A9
A5
A5
A5
A5
A9
A2
A7
A7
A7
A6
A6
A6
3471
3472
3473
3474
3475
3477
3479
3489
3490
3491
3492
3496
3499
3500
3501
3502
3503
3503
3504
3506
3507
3517
3521
3523
A6
A7
A7
A7
A7
A7
A7
A7
A2
A3
A3
A2
A3
B7
B7
A6
B7
B7
B7
B7
A6
A6
B3
A7
3523
3526
3528
3531
3532
3533
3533
3536
3537
3537
3538
3539
3539
3541
3542
3560
3561
3564
3568
3570
3600
3600
3601
3603
B6
A6
B6
B6
A6
A6
A7
B7
A7
B7
B7
A7
B7
B6
B6
B7
B7
A6
A7
B3
C8
B8
C8
C8
3604
3605
3707
3725
3801
3802
3803
3804
3807
3808
3812
3814
3815
3817
3818
3819
3821
3822
3829
3830
3832
3837
3839
3840
C7
C7
A9
B8
B3
B3
B3
B3
A4
B3
B3
B3
A4
B3
B3
C6
B3
A3
A3
A3
A4
A3
B3
B2
3841
3844
3847
3848
3850
3852
3853
3854
3855
3856
3857
3859
3860
3861
3862
3863
3864
3865
3866
3867
3868
3869
3870
3872
B2
B2
B2
B3
A5
A5
A6
A3
A5
B3
B4
A5
B5
B4
B4
A2
A2
B2
B3
A2
A2
A2
A2
A3
3874
3875
3876
3877
3878
3879
3880
3881
3882
3883
3884
3885
3886
3887
3888
3890
3891
3892
3896
3897
3898
3901
3903
3904
A3
B3
B4
A3
A3
A3
A2
A3
B4
B3
A3
A2
B3
B4
B4
B2
A3
A3
B3
A2
B4
B1
B2
B2
3905
3906
3908
3910
3911
3912
3916
3917
3918
3920
3921
3922
3930
3940
3941
3942
3943
3944
3946
3947
3948
3951
3952
3953
B2
A1
B2
B2
B1
B1
B2
B2
B1
A2
A1
A1
C5
A2
A2
A1
A1
A1
A1
A1
A2
C5
C5
C5
3961
3962
3963
3964
3965
3966
3967
3968
3969
3970
3971
3972
3973
3975
3976
3977
3979
3980
3981
3982
3983
3984
3985
3986
B5
B5
B5
B5
B5
B5
A2
A2
A2
A2
A2
A2
A2
A2
A2
A1
A1
A2
A1
A1
A1
A2
A2
A2
3987
3988
3989
3993
3994
3996
3997
4202
4405
4406
4470
4471
4801
4901
4902
4903
4906
5000
5002
5003
5009
5400
5430
5470
A2
A2
A2
C6
C6
A2
A2
B3
B4
B4
A2
A2
C5
A1
A1
A1
B4
A4
A3
B2
B8
A8
A8
A3
5601
5602
5701
5702
5703
5703
5704
5706
5707
5902
5990
6000
6304
6309
6461
6463
6468
6471
6801
6803
6807
6970
6971
6972
C8
C7
B9
C9
B9
C9
B9
B9
A8
B2
C6
A5
A7
B3
A7
A7
A7
A3
B3
A3
B2
A1
A1
A1
7000
7001
7002
7003
7004
7200
7315
7316
7317
7321
7323
7332
7400
7401
7430
7431
7432
7434
7462
7466
7470
7500
7501
7502
A5
A4
A5
A4
A4
B5
A7
B7
B7
C8
C8
A4
A8
A8
A9
A5
A1
B4
A7
A7
A2
B7
B7
A6
7507
7509
7514
7600
7705
7709
7800
7801
7803
7804
7805
7806
7807
7809
7810
7811
7812
7813
7815
7900
7901
7902
7903
7904
B6
A7
B7
B7
C9
B8
A4
B3
B2
A3
B3
A5
B4
B4
B4
A3
B3
A3
B2
B1
B1
A2
A1
A1
7906
7950
7970
7971
7972
7973
7974
7975
7990
A1
C5
A1
A1
A2
A1
A1
A1
C6
PART 2
CL 16532095_40b.eps
CL 16532095_040.eps
100801
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
120
Layout Analog Board (Part 1 Top View)
CL 1653240a.eps
090801
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
121
Layout Analog Board (Part 2 Top View)
CL 16532095_40b.eps
090801
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
122
Layout Analog Board (Overview Bottom View)
2001
2002
2005
2008
2009
2014
2016
2019
2027
2100
2101
2102
2103
2104
2105
2106
2200
2202
2321
2322
2323
2324
2325
2401
A6
A5
A6
A5
A6
A5
A5
A6
A6
C7
C7
C7
C7
C7
C7
C6
A5
B5
C2
C2
C2
A6
A6
A1
2402
2404
2432
2445
2447
2465
2467
2468
2472
2473
2474
2477
2481
2485
2504
2505
2506
2507
2511
2513
2516
2518
2519
2524
A2
A1
A1
A9
A5
A2
A3
A3
A8
A7
A7
A7
A6
A7
A1
B4
A4
B4
B5
B4
B4
B4
B5
B6
2526
2527
2529
2531
2534
2540
2545
2546
2548
2549
2551
2601
2603
2604
2606
2607
2609
2610
2616
2617
2620
2621
2623
2701
B4
A3
C1
B4
A2
A2
A3
A4
A4
B4
A3
C3
B3
B2
B2
B2
C3
B3
B3
B3
B3
B3
C3
C1
2702
2704
2705
2706
2707
2709
2710
2711
2712
2713
2715
2802
2805
2807
2808
2809
2814
2815
2819
2821
2822
2823
2827
2832
C1
A1
B2
B2
B1
B2
B1
C1
B1
A1
B1
B6
B7
A7
B8
B8
A7
A7
A6
A7
B7
A7
C1
A6
2900
2902
2903
2904
2906
2907
2908
2909
2910
2911
2912
2914
2915
2916
2917
2954
2955
2981
2990
2992
2993
2994
2995
2996
B8
B9
B9
A9
B5
B8
B8
A9
B8
B8
B9
B8
B8
B7
B8
B5
B5
A8
C4
C4
C4
C4
C4
C4
3002
3003
3004
3007
3013
3014
3015
3016
3017
3019
3020
3023
3024
3025
3026
3027
3030
3100
3101
3102
3103
3104
3105
3106
A6
A6
A6
A5
B9
B9
B9
B9
A5
A6
A5
A6
A6
B9
B9
B9
B9
C7
C7
C7
C7
C7
C7
C7
3107
3108
3109
3111
3112
3113
3200
3204
3205
3206
3209
3212
3213
3215
3218
3219
3220
3221
3222
3223
3224
3225
3321
3322
C7
C7
C6
C6
C6
C6
A5
B5
B5
B5
B5
B5
B5
B5
B5
B5
B5
B5
B5
B5
B5
B5
C1
C1
3322
3323
3325
3326
3335
3336
3337
3338
3339
3340
3405
3406
3407
3408
3410
3411
3416
3417
3424
3425
3426
3436
3438
3443
A4
C1
C2
C2
C2
C1
C2
C1
C1
C1
A2
A1
A1
A1
A5
A5
A5
A5
A1
A1
A1
A1
A1
A7
3444
3445
3446
3447
3448
3450
3451
3452
3453
3454
3460
3461
3462
3463
3466
3467
3468
3469
3476
3478
3480
3481
3482
3483
A8
A5
A5
A8
A8
A5
A5
A9
A9
A8
A4
A4
A4
A4
A3
A3
A3
A3
A3
A3
A3
A3
A2
A2
3484
3485
3486
3487
3488
3493
3494
3495
3497
3498
3508
3509
3510
3511
3512
3513
3514
3515
3516
3518
3519
3520
3522
3524
A2
A2
A2
A4
A3
A8
A7
A8
A6
A7
A4
A4
A4
A4
A1
A1
A1
A4
A4
A4
A4
A3
A4
B4
3524
3527
3529
3530
3534
3538
3540
3543
3544
3545
3546
3547
3548
3549
3550
3551
3552
3553
3554
3555
3562
3563
3565
3567
B4
A4
A3
A3
A3
A3
A3
A3
A3
A3
A3
A2
A3
A3
A3
A2
A2
A2
A2
A2
A3
A4
A4
A3
3602
3606
3607
3700
3701
3702
3703
3704
3705
3706
3708
3709
3710
3711
3712
3713
3714
3715
3716
3717
3718
3719
3720
3721
B2
B3
B3
B1
A1
B1
A1
C1
B2
B2
C1
B2
C2
A1
B1
B1
C1
B2
A1
B2
B1
B1
A1
B2
3722
3723
3724
3726
3727
3728
3729
3730
3800
3805
3809
3810
3811
3813
3816
3820
3823
3824
3825
3826
3828
3831
3833
3834
B2
C2
B1
B2
B2
B2
B1
B1
B6
B7
A6
A6
A6
B6
B7
B7
B7
B7
B7
B7
B7
B7
B8
B8
3835
3836
3838
3842
3843
3845
3846
3849
3851
3858
3871
3873
3889
3893
3894
3895
3899
3900
3902
3907
3909
3913
3914
3915
B7
B7
A7
A7
A7
A7
B8
A7
A7
A5
B7
A7
B8
A7
C1
C1
B8
B8
B8
B8
B8
B9
B8
B8
3919
3925
3954
3955
3956
3957
3958
3959
3960
3974
3978
3990
3991
3992
3995
4101
4102
4201
4203
4320
4400
4401
4403
4404
B9
B8
C5
C5
C5
C5
C5
B5
B5
A5
A9
C4
C4
C4
C4
C7
C7
B5
B5
C1
B3
B3
A3
A1
4601
4701
4702
4904
4905
4999
5001
5004
5700
5901
5903
5904
5991
6100
6101
6102
6103
6104
6402
6403
6405
6430
6431
6432
B3
C1
B1
A7
A9
A9
A6
B9
A1
B5
B8
A9
C4
C7
C7
C6
C6
C6
A2
A2
A1
A2
A2
A1
6436
6437
6438
6439
6440
6460
6462
6464
6465
6466
6470
6500
6501
6502
6503
6505
6506
6507
6508
6600
6700
6701
6702
6703
A9
A8
A9
A5
A5
A3
A3
A3
A3
A2
A8
A1
A3
A3
A3
A2
A3
A3
A2
B2
C1
C1
B1
C1
6802
6803
7100
7101
7201
7322
7324
7329
7330
7331
7433
7460
7461
7463
7464
7503
7504
7505
7506
7508
7510
7511
7512
7513
A6
A7
C7
C7
B5
C2
C2
C2
C1
C1
A5
A4
A3
A3
A2
A4
A1
A4
A4
A3
A3
A3
A3
A2
7700
7701
7702
7704
7705
7706
7707
7708
7816
7817
7903
7907
7908
7909
7951
7952
35336
B1
B1
C1
B2
B1
B2
B1
B1
A6
A6
B8
B8
B9
B9
C5
C5
A3
PART 2
CL 16532095_39b.eps
PART 1
CL 16532095_39a.eps
CL 16532095_039.eps
100801
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
123
Layout Analog Board (Part 1 Bottom View)
CL 16532095_39a.eps
090801
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
124
Layout Analog Board (Part 2 Bottom View)
CL 16532095_39b.eps
090801
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
125
Layout Analog Board (Testlands Top View)
CL 16532095_051.eps
100801
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
126
Layout Analog Board (Testlands Bottom View)
RCVBSIn
RCVBSOut
Gout_SC1
RSVHSCIn
RSVHSYIn
RSVHSCOut
AGC
GNDFV
RSVHSYOut
8_SC1
YCVBSOut_SC1
P50_SC1
BC_SC1
AROut_SC1
RCOut_SC1
ARIn_SC1
YCVBSIN_SC1 FBOut_SC1 GNDV
GNDV
ALOut_SC1
YCVBSIN_SC2 FBin_SC2
RCin_SC2
RCAROut
RCALOut
ALIn_SC1
DIG OUT H
ARCLI
GNDA
OPT OUT
ARCRI
DIG OUT L
FAN_IN
8_SC2 ALOut_SC2 AROut_SC2
Gin_SC2
BC_SC2
GNDA
FAN_OUT
ARIn_SC2
DAINCOAX
ALDAC
INT Clock
ARIn_SC2
SYNC
ARDAC
IF
5SW
8SW
5STBY2
SDA1
GNDD
SCL1
D_PCMCLK
A_WCKL
DAOUT
GNDFV
IF-In
40.4
ADATA
GNDV
A_V
A_U
A_Y
FB
BE_FAN
ION
IRESET_DIG
A_RDY
D_RDY
SCL
D_BCLK
IReset
3VD
D_DATA
12STBY
A_YCVBS
D_CVBS
D_Y
D_C
D_WCLK
A_DAT
GNDD
A_C
GNDA
A_PCMCLK
D_DATAO
D_KILL
A_BCLK
DAINOPT
D_R
D_G
DVAR
FLYB
33STBY
VGNSTBY
5NSTBY
AFCRI
AFCLI
CVBSFIN
8SW
GNDA
DVAL
CFIN
5V
12V
YFIN
D_B
SDA
INT
SCL
5M
5STB
IPOR1
RC
5M
VGNSTBY
CL 16532095_050.eps
100801
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
127
DVIO Front Board
0002 C3
0003 D3
1000 B1
1001 B2
Layout DVIO Front Board
1002 A1
2000 A2
2001 A1
2002 D2
2003 D2
3000 D2
1
5000 B2
5001 C2
6000 A2
6001 C2
2
3
0002
0003
1000
1001
1002
2000
2001
2002
2003
2004
2005
3000
5000
5001
6000
6001
DVIO FRONT BOARD
2005
1n
A
2004
1n
4n7
2001
2
4n7
1
2000
A
6000
1002
PH-S
TLMH3100
5V
GND GND1394
GND GND1394
B
B
1000
54030
1001
1318141 5
1
5000
DLW31S
2
6 7 8
GND1394
4
3
3
4
5001
2
C
6
5
1
DLW31S
6001
GND1394
C
310412124452
0002
SM6T
4n7
CL 16532095_033.eps
080801
2003
4n7
GND1394
2002
D
EARTH SPRING
0003
1M
D
3000
GND1394
GND
GND
CL 16532095_032.eps
080801
1
2
3
C1
A2
C1
B2
C2
B1
B1
B2
A1
C1
C2
B2
B2
B2
B1
A1
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
128
DVIO Board: 1394 Interface
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1394 INTERFACE
F112
D0 13
F113
D1 14
F114
3172
D2 15
F115
D3 16
F116
3176
34 TPB3+
TESTM2 21
F161
33 TPB3TRANSMIT
DATA
ENCODER
2172
PLL
CLOCK
AGND1
F164 54 FILTER
XTAL OSC.
AGND2
47R
12p
3116
F185 57 XO
GND_IEEE
F137
61 50 49 41 32 26
GND_IEEE
GND_IEEE
39K
3138
OPTION
39K
10R
42 PD1
10R 3174
F178 1n250V
2164 F102
41 PD2
2165 1n250VF103
10R
F179
1n
+3V3_IEEE_D
AV1 LAYER
TRANSMITTER
AND
RECEIVER
LINK
CORE
F158 34 PD7
3185
10K
3189
2166 F104
F180
3188
F127
A1D3 71
F128
A1D4 74
F129
LINKFIFO_DQ(4)
A1D5 75
F130
LINKFIFO_DQ(5)
A1D6 76
F131
A1D7 77
F132
A1CLK 58
F133
LINK_AVCLK
A1SYNC 57
F134
LINK_AVSYNC
A1VALID 61
F135
LINK_AVVALID
A1SYNCI 59
F136
LINK_AVFSYNC
3191
46 CTL1
54 LREQ
250V
+3V3_LINK 48 ISO_
1n
2169 F107
1n
B
LINKFIFO_DQ(3)
LINKFIFO_DQ(6)
LINKFIFO_DQ(7)
3175
C
F143
A1ERR0 53
F144
A2D0 89
F163
55 SCLK
AV2 LAYER
TRANSMITTER
AND
RECEIVER
E
GND_IEEE
+3V3
+3V3_LINK
10K
A1ERR1 52
250V
+3V3_IEEE
LINKFIFO_DQ(2)
A1ENDPCK 56
250V
47R
LINKFIFO_DQ(1)
A1ENKEY 60
F105
F182 1n 2168 F106
F183
LINKFIFO_DQ(0)
47 CTL0
250V
10R F181 2167 1n
10R
GND_IEEE
A1D2 70
9KB BUFFER
MEMORY
F153 37 PD4
F156 35 PD6
53 52
GND_IEEE
F125
40 PD3
250V
PHY
GND_IEEE
F124
A1D1 69
43 PD0
F154 36 PD5
PD 7
8
A1D0 68
30 CYI
250V
F177 2162 1n F101
RESET_ 1
64 63 18 17 10
2161 F100
F176
3171
10R 3190
56 XI
F146
2171
F160
F162
CX-11F
24M576
12p
2170
TESTM1 22
AGND3
1102
35 TPA3-
AGND4
GND_IEEE
F126
GND_IEEE
CMC|LKON 27 F159
PORT 3
7103
PDI1394L21
6
3168
39K
3169
39K
3170
39K
3181
10K
3186
10K
5K1
5K1
PC2 30
36 TPA3+
AGND5
3187
37 TPB2-
94 88 78 72 64 49 45 39 32 24 13
VDD
3153
39K
3184
PLLGND2
5K1
F157
DGND1
5K1
E8
LINK_CYCLEOUT
33 CYO
10R
PC1 29
DGND2
3182
38 TPB2+
F175
PHY_CNA
A
+3V3_LINK
3167
39K
3154
39K
3155
39K
3179
10K
3183
10K
3180 F155
LINK
2K2
CTL1 12
LINKFIFO_DQ(7:0)
3
2
GND_IEEE
PC0 28
DGND3
56R
C
D
PORT 2
39 TPA2-
AGND6
5K1
GND_IEEE
40 TPA2+
3178
100n
3177
DGND4
56R
3103
CTL0 11
F111
ARBITR’N
AND
CONTROL
STATE
MACHINE
LOGIC
DGND5
270p
OPTION
F110
{LINK_CYCLEOUT,LINK_AVCLK,LINK_AVSYNC,LINK_AVVALID,LINK_AVFSYNC,LINK_AVERR1,LINK_AVERR0,LINK_CSn,LINK_INTn}
OPTION
42 TPB1-
DGND6
3173
10K
3102
DVDD2
DVDD3
PLLVDD
LREQ 3
I5
7100 +3V3
TLP6274
1
390R
F109
43 TPB1+
F121
2163
F108
SYSCLK 9
LINK
INTERFACE
44 TPA1-
F120
3163
CNA 31
2
1
GND_IEEE
ISO_ 62
45 TPA1+
F119
F149
LPS 2
PLLGND1
3
CPS 23
PHY_LPS
250V
1n
3166
1u
GND_IEEE
F118
4
F145
2143
3152
3K3
56R
56R
3165
3164
7 6 5
F123
FROM FRONT
DV INPUT PCB
GND_IEEE
BIAS
VOLTAGE
46 TPBIAS1
AND
2159 F151 47 TPBIAS2 CURRENT
GENERATOR
2160 1u F152 48 TPBIAS3
OPTION
OPTION
1u
GND_IEEE
1101 8
4
3193
39K
3194
39K
3195
39K
3196
39K
F122
2158
5
RECEIVED
DATA
DECODER/
TIMER
6K34 F150 60 R1
F025
6
DVDD4
DVDD5
AVDD1
AVDD2
AVDD3
20 19
+3V3_IEEE_D
+3V3_IEEE_D
7101
58PDI1394P11A
3108
39K
3107
39K
3106
39K
3105
3K3
A
B
AVDD4
55 51 25 24
3148 F148 59 R0
+3V3_IEEE_PLL
+3V3_IEEE_D
DVDD1
+3V3_IEEE_A
LINK_AVERR1
LINK_AVERR0
3192
A2D1 90
F165
10K 3197
A2D2 91
F166
3198
A2D3 92
F167
10K 3199
A2D4 95
F168
3100
A2D5 96
F169
10K 3101
A2D6 97
F170
3104
A2D7 98
F171
10K 3109
10K
10K
E
10K
A2CLK 84
A2SYNC 83
D
10K
F172
3110
10K
A2VALID 86
F117
7105
TLP627
4
A2ENDPCK 82
1
3
F
A2ENKEY 99
390R
3112
2K2
3111
A2SYNCI 85
A2ERR1 80
F173
2
F
A2ERR0 81
OPTION
GND_IEEE
5107
4101
+3V3
100MHZ
5106
7106
HFP143YL
100n
2174
+3V3
5108
+3V3_IEEE
100MHZ
12
F147
11
+3V3
+VOUT2
+VIN1
+VOUT1
+VIN2
+VIN3
DC
GND_IEEE GND_IEEE
5109
F139
+3V3_IEEE_A
8
+3V3
100n
2179
100n
2178
100n
2177
100n
2176
10u
2175
100MHZ
7
+5V
1
29 RESET_
D8 1394_RSTn
2
3
2K2
G
10u
2173
100MHZ
3113
+3V3_IEEE_PLL
11
DC
COM2
-VIN1
COM1
-VIN2
5
65
6
66
67
GND_IEEE
GND_IEEE GND_IEEE GND_IEEE GND_IEEE GND_IEEE
H
5110
+3V3_IEEE
100n
2187
100n
2186
100n
2185
100n
2184
100n
2183
10u
CLK25
RES2
8-BIT
INTERFACE
RES3
2180
+3V3
250V
4n7
2188
250V
4n7
2189
51
62
250V
4n7
2190
GND_IEEE GND_IEEE GND_IEEE GND_IEEE GND_IEEE GND_IEEE
GND_IEEE
HA1 21
PA(1)
HA2 20
PA(2)
HA3 19
PA(3)
HA4 18
PA(4)
HA5 17
PA(5)
HA6 16
PA(6)
HA7 15
PA(7)
NC
100
PAD(0)
HD1 9
PAD(1)
HD2 8
PAD(2)
HD3 7
PAD(3)
HD4 4
PAD(4)
HD5 3
PAD(5)
HD6 2
PAD(6)
H
PAD(7)
WR_ 26
PWRn
RD_ 27
PRDn
LINK_CSn
CS_ 25
GND_IEEE
INT_ 28
I
F174
LINK_INTn
GND
5103
100n
2157
100n
100n
2156
2155
100n
2154
100n
2153
100n
2152
100n
2151
100n
2150
100n
2149
100n
2148
100n
2147
+3V3_LINK
100n
100MHZ
F141
2146
+3V3
93 87 79 73 63 50 44 38 31 23 12
G
PA(8)
HD0 10
HD7 1
250V
47n
Isolated power and signals
PA(0)
HA8 14
RES1
1M
+3V3_IEEE_D
2182
100u
CONTROL
AND
STATUS
REGISTERS
3114
F140
100MHZ
2181
ASYNC
TRANSMITTER
AND
RECEIVER
F138
HA0 22
I
PA(0:15)
5
+3V3_LINK
+3V3
1K
PAD(7:0)
3115
{SRAMCE0n,SRAMRDn,PINT0n,PINT1n,PALE,PPSENn,PWRn,PRDn,PRSTn,PT0,PT1,ROMCEn,SRAMCE1n}
CL 16532095_026.eps
080801
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1101 A1
1102 D2
2143 A8
2146 I5
2147 I5
2148 I6
2149 I6
2150 I6
2151 I7
2152 I7
2153 I7
2154 I7
2155 I8
2156 I8
2157 I8
2158 A2
2159 A3
2160 B2
2161 B8
2162 B8
2163 B1
2164 B8
2165 C8
2166 C8
2167 C8
2168 D8
2169 D8
2170 D1
2171 D2
2172 D3
2173 G3
2174 G4
2175 H3
2176 H3
2177 H3
2178 H4
2179 H4
2180 H8
2181 H2
2182 H3
2183 H3
2184 H3
2185 H4
2186 H4
2187 H5
2188 H8
2189 I8
2190 I8
3100 D13
3101 E13
3102 A6
3103 A7
3104 E13
3105 E7
3106 E6
3107 E6
3108 E6
3109 E13
3110 E13
3111 F7
3112 F8
3113 G9
3114 H8
3115 I12
3116 D3
3138 A8
3148 A3
3152 D8
3153 E8
3154 D8
3155 D8
3163 A7
3164 B2
3165 B2
3166 B8
3167 D8
3168 E8
3169 E8
3170 E9
3171 B7
3172 B7
3173 B2
3174 B7
3175 C13
3176 C7
3177 C1
3178 C2
3179 D9
3180 C3
3181 E9
3182 C2
3183 D9
3184 C2
3185 C6
3186 E9
3187 C2
3188 C7
3189 C7
3190 D7
3191 D7
3192 D13
3193 D6
3194 D6
3195 D6
3196 D7
3197 D13
3198 D13
3199 D13
4101 F8
5103 I5
5106 F2
5107 F8
5108 G7
5109 G2
5110 H2
7100 A8
7101 A5
7103 A12
7105 F8
7106 G8
F025 A1
F100 B8
F101 B8
F102 B8
F103 C8
F104 C8
F105 C8
F106 D8
F107 D8
F108 A6
F109 B6
F110 B6
F111 B6
F112 B6
F113 B6
F114 B6
F115 B6
F116 C6
F117 F7
F118 B2
F119 B2
F120 B2
F121 B2
F122 A2
F123 C1
F124 B12
F125 B12
F126 B9
F127 B12
F128 B12
F129 B12
F130 B12
F131 B12
F132 C12
F133 C12
F134 C12
F135 C12
F136 C12
F137 E3
F138 F5
F139 G5
F140 H5
F141 I9
F143 D12
F144 D12
F145 A8
F146 D2
F147 G7
F148 A3
F149 A6
F150 A3
F151 A3
F152 B3
F153 C9
F154 C9
F155 C3
F156 C9
F157 C3
F158 C9
F159 C6
F160 C3
F161 D3
F162 D2
F163 D12
F164 D3
F165 D12
F166 D12
F167 D12
F168 D12
F169 E12
F170 E12
F171 E12
F172 E12
F173 F8
F174 I12
F175 A8
F176 B7
F177 B7
F178 B7
F179 C7
F180 C7
F181 C7
F182 D7
F183 D7
F185 D3
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
129
DVIO Board: Microprocessor
1
2
3
4
5
6
7
8
9
10
11
12
13
14
MICROPROCESSOR
PAD(0:7)
PAD(0:7)
Micro processor
+5V_PROC
100p
F200
21
3201 F232 20
F201
10
32
F203
F233
3524
PALE
+5V
XTAL1
AD0
XTAL2
AD1
AD2
F214
35
F213
44
VCC
47R
12p
PPSENn
7204
BST82
33
RST
EA_VPP
AD3
AD4
PSEN_
AD5
ALE
AD6
10R
+5V_PROC
AD7
14
16
PT1
F230
17
4206
18
Option
19
RXD
T2
TXD
T2EX
INT0_
INT1_
T0
ECI
PORT1
1K
13
15
F204
+5V
7209
PDTC144EU
11
PINT1n
CEX0
CEX1
CEX2
T1
WR_
CEX3
RD_
CEX4
A8
NC
3
TXD
F211
4207
4
G6
D
G6
PINT0n
RTSn
2
ISPn
7206
BSS84
F217
7208
74HCT1G04 5
RXD
PT0
BAS316
6201 F231 3221
+5V_PROC
10K
3223
C
G9
PORT3
4200
+12V
PWRn
1
A
A9
PRDn
A10
Option
PORT2
1
23
NC
12
A11
A12
A13
34
A14
A15
VSS
43
PAD(0)
1
42
PAD(1)
11
41
PAD(2)
40
PAD(3)
PAD(0)
2
39
PAD(4)
PAD(1)
38
PAD(5)
37
PAD(6)
36
PAD(7)
2
3
4
5
F206
6
F207
7
F208
Option
3214
1K
3215
1K
3216
1K
Option
3217
1K
8
9
G4
PORT1_1
F205
+5V_PROC
+5V_PROC
7200
74HCT573
Board ID
B
2205
1K
2206
7202
PDTC144EU
PRSTn
1200
12p
3523
7203
P89C51
DSX840GA
11M05
10K
3522
2200
F202
SRAM
EXPANDER
+5V_PROC
PORT0
A
EN
Vcc
C1
GND
20
PA(0)
7201
CY62256 28
21
VCC
10
PA(1)
23
PA(2)
24
PA(3)
25
PA(4)
26
19
PA(0)
3
18
PA(1)
PAD(2)
4
17
PA(2)
PA(5)
1
PAD(3)
5
16
PA(3)
PA(6)
2
PA(7)
3
PA(8)
4
1D
PAD(4)
6
15
PA(4)
PAD(5)
7
14
PA(5)
PAD(6)
8
13
PA(6)
PA(9)
5
PAD(7)
9
12
PA(7)
PA(10)
6
PA(11)
7
PA(12)
8
PA(13)
9
PA(14)
10
24
PA(8)
25
PA(9)
26
PA(10)
27
PA(11)
28
PA(12)
29
PA(13)
30
PA(14)
31
PA(15)
I|O0
A1
I|O1
A2
I|O2
A3
I|O3
A4
I|O4
A5
I|O5
A6
I|O6
A7
I|O7
11
PAD(0)
12
PAD(1)
13
PAD(2)
15
PAD(3)
16
PAD(4)
17
PAD(5)
18
PAD(6)
19
PAD(7)
20
SRAMCE0n
22
SRAMRDn
27
PWRn
B
A8
A9
A10
CE_
A11
OE_
A12
WE_
C
A13
A14 GND
14
G9
CTSn
A0
PALE
D
22
E
E
{SRAMCE0n,SRAMRDn,PINT0n,PINT1n,PALE,PPSENn,PWRn,PRDn,PRSTn,PT0,PT1,SRAMCE1n}
F
PA(0:15)
+5V
PA(0:15)
F
F212
5200
+5V_PROC
+5V
+5V
5201
100n
2204
100n
2203
100n
2202
100n
2201
100MHZ
G
2520
G
100n
H
TLMH3100
1
F210
2
PH-S
To front DV input PCB
100n
2207
330R
6200
3224
Option
F219
1201
F216
H
F221
7207
PDTC144EU
I
I
CL 16532095_027.eps
080801
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1200 A4
1201 G9
2200 A4
2201 G2
2202 G2
2203 G2
2204 G3
2205 B4
2206 B3
2207 H9
2520 G9
3201 B5
3214 C8
3215 C8
3216 C8
3217 C8
3221 C3
3223 C2
3224 H8
3522 A2
3523 A3
3524 B5
4200 C3
4206 D5
4207 D4
5200 F2
5201 G8
6200 H8
6201 C3
7200 A9
7201 A10
7202 B2
7203 A5
7204 B2
7206 C3
7207 H8
7208 C1
7209 D2
F200 A5
F201 B5
F202 A2
F203 B2
F204 D3
F205 C7
F206 C7
F207 C7
F208 C7
F210 G9
F211 C5
F212 F3
F213 B2
F214 B5
F216 G9
F217 C2
F219 G8
F221 H8
F230 C5
F231 C3
F232 B5
F233 B5
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
130
DVIO Board: Fifo & Control
1
2
3
FIFO & CONTROL
4
5
6
7
8
9
10
11
12
13
14
LINKFIFO_DQ(7:0)
{LINK_CYCLEOUT,LINK_AVCLK,LINK_AVSYNC,LINK_AVVALID,LINK_AVFSYNC,LINK_AVERR1,LINK_AVERR0,LINK_CSn,LINK_INTn}
PAD(7:0)
{SRAMCE0n,SRAMRDn,PINT0n,PINT1n,PALE,PPSENn,PWRn,PRDn,
PRSTn,PT0,PT1,SRAMCE1n}
{TDI,TCK,TDO,TMS}
PA(0:15)
+3V3_FPGAIO
4300
4301
TCK
F329
TMS 25
13 F330
TDI
GND
4302
TMS
11 14 18 19 20 21 22 24 26 29 30
4303
5300 F314
OPTION
DCLK
12
F302
7303/34
D
4 XTO
EPROM
8 OE|FS
F315
3315
33R
24
28
128
132
VDD
TDI
TDO
TMS
TCK
DCLK
CLKUSR
CE_
CEO_
MSEL
STATUS_
CONFIG_
CONF-DONE
INIT-DONE
D0
D1
D2
D3
CLKA 1
CONFIGURABLE
MULTIPLEXER
AND DIVIDE
LOGIC
CLOCKGENAUD
7
PLL
BLOCK
VCCINT
F303
100n
7307
CY2071AS
OSC
46
80
77
150
135
OE
INIT_CONFn
CEn
2304
100MHZ
3 XTI
184
144
6
102
TDI
{DATA,DCLK,OE,INIT_CONFn,CEn}
+3V3_PLL
19
107
38
47
DATA
CLKB 5
181
CLKC 6
FIFOA_D(6)
GND
FIFOA_A(15)
2
FIFOA_A(1)
FIFOA_D(1)
169
174
159
162
140
FPGA / EPLD
DATA
WS_
RS_
CS_
CS
RDY_|BSY
+5V_PROC
178
187
100n
7304
FXO-35F
2303
4
VDD
VCO
3
FO
3312 F300
F338
10R
VSS
2
F317
5301
+3V3_PLL
7308
CY2071AS
OSC
8 OE|FS
PLL
BLOCK
EPROM
F305
CLKA 1
F001 3317
CLKB 5
F321 3318
CLKC 6
F307
G
CLOCKGENAUD
AUD_BCLK
AUD_WS
AUD_MUTE
CLK27M_CON
33R
B1
2
F331
G6
CLK27M_DV
F323 3319
GND
3327
D1
3320
3321
3325
F339
F341
2-C7 PORT1_1
F308
F304
47R F340
47R F400
47R
F306
47R
F342 3322
F1 CLOCKGENVID
D3
F332
47R
5-G7 RESETn
BUFENn_VID
BUFENn_AUD
+3V3
3313 F318
3314
10K
F320
6300
LD1117
H
3
+5V
IN
OUT
2
10K
AUD_SDI
AUD_SDO
F325
3328
F336
47R
+3V3_PLL
47u
1
2302
100n
2301
GND
PHY_LPS
A8
3316
10K
GND
1394_RSTn
G9
FIFOA_CEn0
5
28
FIFOA_WEn
+3V3_SRAM
FIFOA_CEn1
7302
8 24 CY7C1019BV33-10VC
VCC
5
CE_ WE_
FIFOA_OEn
OE_
12
28
FIFOA_WEn
FIFOA_OEn
B
PA(15)
PA(14)
PA(13)
PA(12)
PA(11)
PA(10)
PA(9)
PA(8)
PAD(7)
PAD(6)
PAD(5)
PAD(4)
PAD(3)
PAD(1)
PAD(0)
LINK_CSn
LINK_INTn
LINK_AVVALID
LINK_AVFSYNC
LINK_CYCLEOUT
LINK_AVSYNC
LINK_AVERR1
LINK_AVERR0
PT0
PT1
LINKFIFO_DQ(0)
LINKFIFO_DQ(1)
LINKFIFO_DQ(2)
LINKFIFO_DQ(3)
LINKFIFO_DQ(4)
LINKFIFO_DQ(5)
LINKFIFO_DQ(6)
LINKFIFO_DQ(7)
FIFOA_A(0)
1
FIFOA_A(1)
2
FIFOA_A(2)
3
FIFOA_A(3)
4
FIFOA_A(4)
13
FIFOA_A(5)
14
FIFOA_A(6)
15
FIFOA_A(7)
16
FIFOA_A(8)
17
FIFOA_A(9)
18
FIFOA_A(10)
19
FIFOA_A(11)
20
FIFOA_A(12)
21
FIFOA_A(13)
29
FIFOA_A(14)
30
FIFOA_A(15)
31
FIFOA_A(16)
32
A0
A1
A2
PHY_CNA
FIFOA_CEn1
FIFOA_CEn0
FIFOA_OEn
FIFOA_A(0)
FIFOA_A(2)
FIFOA_A(3)
FIFOA_A(4)
FIFOA_A(5)
FIFOA_A(6)
FIFOA_A(7)
FIFOA_A(8)
FIFOA_A(9)
FIFOA_A(10)
FIFOA_A(11)
FIFOA_A(12)
FIFOA_A(13)
FIFOA_A(14)
FIFOA_A(16)
FIFOA_D(0)
FIFOA_D(2)
FIFOA_D(3)
FIFOA_D(4)
FIFOA_D(5)
FIFOA_D(7)
FIFOA_WEn
FIFOB_CEn1
FIFOB_CEn0
FIFOB_OEn FIFOB_A(0)
FIFOB_A(2)
FIFOB_A(3)
FIFOB_A(4)
FIFOB_A(5)
FIFOB_A(6)
FIFOB_A(7)
FIFOB_A(8)
FIFOB_A(9)
FIFOB_A(10)
FIFOB_A(11)
FIFOB_A(12)
FIFOB_A(13)
FIFOB_A(14)
FIFOB_A(15)
FIFOB_A(16)
FIFOB_D(0)
FIFOB_D(1)
FIFOB_D(2)
FIFOB_D(3)
FIFOB_D(4)
FIFOB_D(5)
FIFOB_D(6)
FIFOB_D(7)
FIFOA_A(0)
1
FIFOA_A(1)
2
FIFOA_A(2)
3
A3
I|O7
27
FIFOA_D(7)
FIFOA_A(3)
4
A4
I|O6
26
FIFOA_D(6)
FIFOA_A(4)
13
A5
I|O5
23
FIFOA_D(5)
FIFOA_A(5)
14
22
FIFOA_D(4)
FIFOA_A(6)
15
11
FIFOA_D(3)
FIFOA_A(7)
16
10
FIFOA_D(2)
FIFOA_A(8)
17
FIFOA_D(1)
FIFOA_A(9)
18
FIFOA_D(0)
FIFOA_A(10)
19
FIFOA_A(11)
20
FIFOA_A(12)
21
FIFOA_A(13)
29
FIFOA_A(14)
30
FIFOA_A(15)
31
FIFOA_A(16)
32
A6
I|O4
A7
I|O3
A8
I|O2
A9
I|O1 7
6
A10 I|O0
A11
A12
A13
A14
A15
A16
GND
9 25
G6
ISPn
12
CE_ WE_
OE_
A0
A1
A2
A3
I|O7
27
FIFOA_D(7)
A4
I|O6
26
FIFOA_D(6)
A5
I|O5
23
FIFOA_D(5)
22
FIFOA_D(4)
11
FIFOA_D(3)
10
FIFOA_D(2)
A6
I|O4
A7
I|O3
A8
I|O2
A9
I|O1 7
FIFOA_D(1)
6
FIFOA_D(0)
A10 I|O0
A12
D
A13
A14
A15
A16
GND
9 25
FIFOA_A(16:0)
FIFOA_D(7:0)
+3V3_SRAM
FIFOB_CEn0
7305
8 24 CY7C1019BV33-10VC
VCC
5
12
CE_ WE_
28
OE_
FIFOB_A(0)
1
FIFOB_A(1)
2
FIFOB_A(2)
3
FIFOB_A(3)
4
FIFOB_A(4)
13
FIFOB_A(5)
14
FIFOB_A(6)
15
FIFOB_A(7)
16
FIFOB_A(8)
17
FIFOB_A(9)
18
FIFOB_A(10) 19
FIFOB_A(11) 20
FIFOB_A(12) 21
FIFOB_A(13) 29
FIFOB_A(14) 30
FIFOB_A(15) 31
FIFOB_A(16) 32
FIFOB_WEn
+3V3_SRAM
FIFOB_CEn1
FIFOB_OEn
A0
A1
A2
FIFOB_A(0)
1
FIFOB_A(1)
2
FIFOB_A(2)
3
FIFOB_A(3)
4
I|O7
27
FIFOB_D(7)
FIFOB_D(6)
A4
I|O6
26
FIFOB_A(4)
13
I|O5
23
FIFOB_D(5)
A5
FIFOB_A(5)
14
I|O4
22
FIFOB_D(4)
A6
FIFOB_A(6)
15
11
FIFOB_D(3)
FIFOB_A(7)
16
10
A3
A7
I|O3
FIFOB_D(2)
A8
I|O2
FIFOB_A(8)
17
I|O1 7
FIFOB_D(1)
A9
FIFOB_A(9)
18
6
FIFOB_D(0)
FIFOB_A(10)
19
FIFOB_A(11)
20
FIFOB_A(12)
21
FIFOB_A(13)
29
FIFOB_A(14)
30
FIFOB_A(15)
31
FIFOB_A(16)
32
A10 I|O0
CE_ WE_
OE_
A11
A12
A13
A14
A15
A16
GND
9 25
FIFOB_WEn
FIFOB_A(1)
7306
8 24CY7C1019BV33-10VC
VCC
5
C
A11
A8
12
28
FIFOB_WEn
FIFOB_OEn
A0
A1
A2
I|O7
27
FIFOB_D(7)
A4
I|O6
26
FIFOB_D(6)
A5
I|O5
23
FIFOB_D(5)
A6
I|O4
22
FIFOB_D(4)
11
FIFOB_D(3)
10
FIFOB_D(2)
A3
A7
I|O3
A8
I|O2
A9
I|O1 7
FIFOB_D(1)
6
FIFOB_D(0)
A10 I|O0
A12
H
A13
A14
A15
A16
GND
9 25
{AUD_BCLK,AUD_WS,AUD_MUTE,AUD_SDI,AUD_SDO}
1
2
3
5
6
7
8
9
10
100MHZ
F313
11
HAD(7:0)
+3V3
+3V3_SRAM
12
100n
+3V3
100n
100n
2323
100n
2322
+3V3_FPGAINT
100n
2331
5304
F312 +3V3
100n
2321
100MHZ
100n
2320
+3V3
100n
2319
100n
100n
2317
100n
2316
100n
2315
100n
2314
100n
2313
100n
2312
100n
2311
100n
2310
100n
2309
100n
2308
2306
100n
2307
4
+3V3_FPGAIO
100n
2330
5303
F311 +3V3
2318
5302
G
A11
{DV_LCn,DV_ERRn,DV_DRQn,DV_DTACKn,DV_ASn,DV_PDn,DV_DSUn,DV_RWn,DV_VS,DV_HS_IN,DV_RSTn,DV_HS_OUT,DV_DSLn}
100MHZ
F
FIFOB_D(7:0)
I
+3V3
E
FIFOB_A(16:0)
7
25
43
62
78
95
110
129
147
165
182
199
F301
10R
ROMCEn
SRAMCE0n
SRAMRDn
SRAMCE1n
PINT0n
PINT1n
PALE
PPSENn
PWRn
PRDn
PRSTn
100n
2329
+3V3
4 XTO
7301
8 24 CY7C1019BV33-10VC
VCC
100n
2328
7303/40
100n
7
VDD
CONFIGURABLE
MULTIPLEXER
AND DIVIDE
LOGIC
CLOCKGENVID 3 XTI
2305
100MHZ
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
+3V3_SRAM
LINK_AVCLK
3300
100n
2327
F
1
2
3
4
5
10
11
12
13
14
15
16
17
18
20
21
22
23
29
30
31
32
33
34
35
36
37
39
40
41
42
48
49
50
51
52
53
54
55
56
57
58
59
60
61
64
65
66
67
68
69
F337
100n
2326
VC
HAD(7)
HAD(6)
HAD(5)
HAD(4)
HAD(3)
HAD(2)
HAD(1)
HAD(0)
DV_LCn
DV_ERRn
DV_DRQn
DV_DTACKn
DV_ASn
DV_PDn
DV_DSUn
DV_RWn
DV_VS
DV_HS_IN
DV_RSTn
DV_HS_OUT
DV_DSLn
70
71
72
73
74
75
76
81
82
83
84
85
86
87
88
89
90
91
92
93
94
97
98
99
100
101
103
104
105
106
108
109
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
133
134
136
137
138
139
141
142
143
145
146
151
152
153
154
155
156
157
158
160
161
163
164
167
168
170
171
172
173
175
176
177
179
180
185
186
188
189
190
191
192
193
194
195
196
197
198
201
202
203
204
205
206
207
208
2324
1
DEV-OE
DEV-CLR_
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQ64
DQ65
DQ66
DQ67
DQ68
DQ69
DQ70
DQ71
DQ72
DQ73
DQ74
DQ75
DQ76
DQ77
DQ78
DQ79
DQ80
DQ81
DQ82
DQ83
DQ84
DQ85
DQ86
DQ87
DQ88
DQ89
DQ90
DQ91
DQ92
DQ93
DQ94
DQ95
DQ96
DQ97
DQ98
DQ99
DQ100
DQ101
DQ102
DQ103
DQ104
DQ105
DQ106
DQ107
DQ108
DQ109
DQ110
DQ111
DQ112
DQ113
DQ114
DQ115
DQ116
DQ117
DQ118
DQ119
DQ120
DQ121
DQ122
DQ123
DQ124
DQ125
DQ126
DQ127
DQ128
DQ129
DQ130
DQ131
DQ132
DQ133
DQ134
DQ135
DQ136
DQ137
DQ138
DQ139
DQ140
DQ141
DQ142
DQ143
DQ144
DQ145
DQ146
DQ147
DQ148
DQ149
DQ150
DQ151
DQ152
100n
2325
E
+3V3_FPGAINT
Two independant SRAM banks of 256kx8
DATA
F328
TCK 32
NC
4304
31 F335
28
VCCIO
TDO
TMS
TCK
F324
TDO
ROM
3306
1K
3305
1K
VPP
CASC_
DATA
7303
EPF6024
1K
OE
1
4
5
6
8
9
100n
23 27
3
VCCSEL
7
INIT_CONFn
DCLK
CEn
OE
C
CS_
VPPSEL
F327
INIT_|CONF
F326 10
B
16 15 17
DCLK
VCC
7300
EPC2
F334 2
3307
3304
3303
3301
2300
A
+3V3_FPGAIO
200
183
166
149
131
112
96
79
63
45
27
9
148
130
111
44
26
8
TDI
+3V3_FPGAIO
F333
PAD(2)
SRAM
+3V3_FPGAIO
1K
1K
1K
A
CL 16532095_028.eps
080801
13
14
I
2300 A3
2301 H1
2302 H2
2303 E1
2304 C2
2305 F2
2306 I4
2307 I4
2308 I4
2309 I4
2310 I5
2311 I5
2312 I5
2313 I5
2314 I5
2315 I6
2316 I6
2317 I6
2318 I8
2319 I8
2320 I8
2321 I9
2322 I9
2323 I9
2324 I11
2325 I11
2326 I11
2327 I11
2328 I12
2329 I12
2330 I12
2331 I12
3300 B8
3301 B1
3303 B1
3304 B1
3305 B4
3306 B4
3307 C4
3312 E2
3313 H5
3314 H4
3315 D3
3316 I5
3317 G2
3318 G2
3319 G2
3320 G5
3321 G5
3322 G5
3325 G5
3327 F4
3328 H5
4300 B4
4301 B4
4302 B4
4303 C4
4304 B5
5300 C2
5301 F1
5302 I4
5303 I8
5304 I11
6300 H1
7300 B2
7301 A12
7302 A14
7303 A5
7304 E1
7305 E12
7306 E14
7307 D1
7308 F1
F001 F2
F300 E2
F301 I5
F302 C3
F303 C3
F304 G5
F305 G2
F306 G5
F307 G2
F308 G2
F311 I5
F312 I9
F313 I12
F314 C2
F315 D2
F317 F2
F318 H5
F320 H5
F321 G2
F323 G2
F324 B3
F325 H2
F326 B2
F327 B2
F328 B3
F329 B3
F330 B3
F331 G4
F332 G5
F333 A2
F334 B2
F335 B3
F336 H5
F337 A7
F338 E2
F339 G4
F340 G5
F341 G4
F342 G5
F400 G5
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
131
DVIO Board: DVCODEC
2400 I6
2401 I6
2402 I6
2403 I7
2404 I7
2405 I7
2406 I8
2407 I8
2408 I8
1
2409 I8
2410 I10
2411 I10
2412 I11
2413 I11
2414 I11
2415 I12
2416 I13
2417 I13
2
2418 I14
2419 I14
2420 I14
2421 I15
3400 B4
3401-A G6
3
3401-B H6
3401-C G6
3401-D H6
4
3402-A G5
3402-B H5
3402-C G5
3405 F3
5400 H10
5401 H13
3402-D H5
3403 G6
3404 H7
5
5402 I5
5403 I10
5404 I13
6
7400 C13
7401 C14
7402 C8
7403 C10
7404 C4
F027 B4
7
F401 F4
F402 F4
F403 F3
F404 G6
F405 G7
F406 G5
8
F407 F5
F408 F5
F409 H6
9
F410 G6
F412 F6
F413 F6
F414 F6
F416 I9
F417 I15
F418 G7
F419 F6
F420 H6
10
F421 H6
F422 H7
F425 I12
11
F426 F4
12
13
14
15
DVCODEC
A
A
DRAM
IO(11)
IO(14)
IO(13)
IO(12)
IO(15)
A(0:8)
B
AUD_BCLK
3405
AUD_SDI
F403
47R
A(7)
A(6)
A(5)
11
A(3)
A(2)
A(1)
12
32
A(0)
+3V3_DV
F426
I|O9
I|O10
I|O11
NC1
I|O13
NC2
I|O14
NC3
I|O15
RAS_
WEn
LCASn
UCASn
LCAS_
RASn
UCAS_
+3V3_DV
WE_
OE_
10 IO(7)
33 IO(8)
34 IO(9)
35 IO(10)
36 IO(11)
I|O6
I|O7
I|O8
I|O9
I|O10
I|O11
38 IO(12)
I|O12
39 IO(13)
11
40 IO(14)
12
32
41 IO(15)
NC1
I|O13
NC2
I|O14
NC3
I|O15
14 RASn
RAS_
31 LCASn
LCAS_
30 UCASn
13
UCAS_
WEn
29
22 37 42
WE_
OE_
IO(18)
5
IO(19)
7
IO(20)
8
IO(21)
9
IO(22)
10 IO(23)
33 IO(24)
34 IO(25)
35 IO(26)
36 IO(27)
38 IO(28)
LCASn 35
39 IO(29)
UCASn34
40 IO(30)
11
41 IO(31)
15
14 RASn
16
31 LCASn
36
30 UCASn
13
40
WEn
I|O0
I|O1
I|O2
I|O3
I|O4
I|O5
I|O6
I|O7
I|O8
I|O9
I|O10
I|O11
I|O12
LCAS_
I|O13
UCAS_
I|O14
NC1
I|O15
2
IO(0)
3
IO(1)
4
IO(2)
5
IO(3)
7
IO(4)
8
IO(5)
9
IO(6)
10
IO(7)
41
IO(8)
42
IO(9)
43 IO(10)
44 IO(11)
NC3
RAS_
OE_
NC5
29
WE_
6
LCASn 35
47 IO(13)
UCASn 34
48 IO(14)
11
49 IO(15)
15
18
16
RASn
36
33
17
40
WEn
25
I|O0
I|O1
I|O2
I|O3
I|O4
I|O5
I|O6
I|O7
I|O8
I|O9
I|O10
I|O11
46 IO(12)
NC2
NC4
1
VCC3
IO(6)
I|O5
4
7401
GM71V18163CT
A(0) 21
A0
A(1) 22
A1
A(2) 23
A2
24
A(3)
A3
A(4) 27
A4
A(5) 28
A5
29
A(6)
A6
A(7) 30
A7
A(8) 31
A8
32
A9
20
A10
19
A11
25
VCC2
9
I|O4
IO(17)
6
VCC1
IO(5)
I|O3
3
1
VCC3
8
I|O2
IO(16)
VCC2
IO(4)
I|O1
2
VCC1
IO(3)
7
VCC3
5
VCC1
VCC3
VCC2
I|O7
I|O8
IO(2)
I|O0
I|O12
LCAS_
I|O13
UCAS_
I|O14
NC1
I|O15
2 IO(16)
3 IO(17)
C
4 IO(18)
5 IO(19)
7 IO(20)
8 IO(21)
9 IO(22)
10 IO(23)
41 IO(24)
D
42 IO(25)
43 IO(26)
44 IO(27)
46 IO(28)
47 IO(29)
48 IO(30)
49 IO(31)
E
NC2
NC3
RAS_
NC4
OE_
NC5
26 45 50
WE_
18
RASn
33
17
WEn
26 45 50
22 37 42
F
F412
F413
F414
+3V3_DV
F405
F418
F422 47R
3404
F421
DV_VS
HAD(7:0)
OPTION
G
DV_HS_IN
G2
1Mx16 devices are used as 256kx16
47R
F404 +3V3_DV
3403
CLK27M_DV
+3V3_DV
47R
F410
47R
3401-C
47R
47R
CRTL{RASn,LCASn,UCASn,WEn}
YUV(5) 3401-B
YUV(6)
YUV(7) 3401-D
F420
YUV(4)
3402-B
YUV(1)
YUV(2)
YUV(3)
YUV(0)
H
3402-D
F409
47R
G
F407
3402-C
F408
47R
F419
47R 3401-A
+3V3_DV
+3V3_DV
47R
F406
3402-A
+3V3_DV
+3V3_DV
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
F
I|O6
I|O12
A(4)
+3V3_DV
I|O5
4
21
VSS3
+3V3_DV
I|O4
IO(1)
6
VSS2
A(8)
I|O3
3
1
VSS1
IO(2)
IO(1)
IO(0)
I|O2
IO(0)
+VCC_DV_RAM
VSS3
VIDEO BUS
VCC1
DRAM-D28
VSS24
DRAM-D27
VCC3.3-24
DRAM-D26
DRAM-D25
DRAM-D24
VSS23
DRAM-D23
VCC3.3-23
DRAM-D22
DRAM-D21
DRAM-D20
VSS22
DRAM-D19
VCC3.3-22
DRAM-D18
DRAM-D17
DRAM-D16
VSS21
DRAM-D15
VCC3.3-21
DRAM-D14
DRAM-D13
DRAM-D12
VSS20
DRAM-D11
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
VSS26
HOST-RST_
HOST-CS_
HOST-R|W_
HOST-DSU_
HOST-DSL_
HOST-PD_
HOST-AS_
VSS25
DRAM-D31
VCC3.3-25
DRAM-D30
DRAM-D29
AUDIO
INTERFACE
IO(3)
+35V_DV_EDO
I|O1
2
VSS2
F402
F401
IO(6)
IO(5)
IO(4)
I|O0
7400
GM71V18163CT
A(0) 21
A0
A(1) 22
A1
A(2) 23
A2
24
A(3)
A3
A(4) 27
A4
A(5) 28
A5
29
A(6)
A6
A(7) 30
A7
A(8) 31
A8
32
A9
20
A10
19
A11
VSS1
AUD_WS
IO(7)
+35V_DV_EDO
21
VSS3
+3V3_DV
IO(10)
IO(9)
IO(8)
7403
GM71V18163CJ
A(0) 17
A0
A(1) 18
A1
A(2) 19
A2
20
A(3)
A3
A(4) 23
A4
A(5) 24
A5
25
A(6)
A6
A(7) 26
A7
A(8) 27
A8
28
A9
16
A10
15
A11
VSS1
+3V3_DV
+35V_DV_EDO
6
+VCC_DV_RAM
+VCC_DV_RAM
VSS3
E
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
VSS2
+3V3_DV
DV CODEC
VCC3.3-20
DRAM-D10
DRAM-D9
DRAM-D8
VSS19
DRAM-D7
VCC3.3-19
DRAM-D6
DRAM-D5
DRAM-D4
VSS18
DRAM-D3
VCC3.3-18
DRAM-D2
DRAM-D1
DRAM-D0
VSS17
DRAM-A8
VCC3.3-17
DRAM-A7
DRAM-A6
DRAM-A5
VSS16
DRAM-A4
VCC3.3-16
DRAM-A3
DRAM-A2
DRAM-A1
VSS15
DRAM-A0
VCC3.3-15
DRAM-WE_
DRAM-LCAS_
DRAM-UCAS_
VSS14
DRAM-RAS_
VCC3.3-14
VID-RDY
VID-DTACK_
VID-OE_
VSS1
HAD(5)
HAD(6)
HAD(7)
DRAM ADDRESS BUS
+3V3_DV
HAD(4)
DRAM CTRL
HAD(1)
HAD(2)
HAD(3)
SYNCHRONOUS
VIDEO INTERFACE
D
DRAM DATA [ 0...31] BUS
VIDEO BUS CLOCK INPUTS
+3V3_DV
HAD(0)
GENERAL
PURPOSE I/O
DV_DTACKn
DV_DRQn
DV_ERRn
DV_LCn
VCC3.3-1
HOST-16|8_
GPIO0
GPIO1
GPIO2
GPIO3
VSS1
HOST-DTAC_
HOST-DRQ_
HOST-ERR_
HOST-LC_
VCC3.3-2
HOST-AD0
VSS2
HOST-AD1
HOST-AD2
HOST-AD3
VCC3.3-3
HOST-AD4
VSS3
HOST-AD5
HOST-AD6
HOST-AD7
VCC3.3-4
HOST-AD8
VSS4
HOST-AD9
HOST-AD10
HOST-AD11
VCC3.3-5
HOST-AD12
VSS5
HOST-AD13
HOST-AD14
HOST-AD15
VCC3.3-6
AUD-WS
VSS6
AUD-BCLK
AUD-SDO
HOST AD BUS [ 0....15 ]
+3V3_DV
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
VCC3.3-7
AUD-SDI
RES1
VSS7
RES2
RES3
RES4
VCC3.3-8
RES5
VSS8
RES6
RES7
RES8
VCC3.3-9
VID-D0
VSS9
VID-D1
VID-D2
VID-D3
VCC3.3-10
VID-D4
VSS10
VID-D5
VID-D6
VID-D7
VCC3.3-11
TEST
VSS11
VID-CLK1
VID-CLK0
RES9
VCC3.3-12
VID-VS
VSS12
VID-HS
VID-FLD
RES10
VCC3.3-13
RES11
VSS13
C
7402
GM71V18163CJ 1
A(0) 17
A0
A(1) 18
A1
A(2) 19
A2
20
A(3)
A3
A(4) 23
A4
A(5) 24
A5
25
A(6)
A6
A(7) 26
A7
A(8) 27
A8
28
A9
16
A10
15
A11
VCC2
+VCC_DV_RAM
7404
NW701
VSS2
+3V3_DV
+35V_DV_EDO
IO(18)
IO(17)
IO(16)
IO(19)
IO(22)
IO(21)
IO(20)
IO(23)
+35V_DV_EDO
IO(26)
IO(25)
IO(24)
IO(27)
IO(30)
IO(29)
IO(28)
IO(31)
+3V3_DV
10K
3400
F027
+35V_DV_EDO
B
DV_RWn
DV_DSUn
DV_DSLn
DV_PDn
DV_ASn
DV_RSTn
IO(31:0)
YUV(7:0)
H
{DV_LCn,DV_ERRn,DV_DRQn,DV_DTACKn,DV_ASn,DV_PDn,DV_DSUn,DV_RWn,DV_VS,DV_HS_IN,DV_RSTn,DV_HS_OUT,DV_DSLn}
OPTION
OPTION
5401
+5V
100MHZ
100MHZ
{AUD_BCLK,AUD_WS,AUD_MUTE,AUD_SDI,AUD_SDO}
100n
2420
100n
2419
100n
2418
100n
2416
100n
2415
100n
2414
100n
2413
100n
2412
+VCC_DV_RAM
100MHZ
2417
+35V_DV_EDO +3V3
+3V3
100n
F417 +3V3
5404
F425
100MHZ
2411
+3V3
2410
100n
100n
2409
2408
100n
2407
100n
2406
100n
2405
100n
2404
100n
2403
100n
2402
100n
2401
100n
+3V3
100n
5403
+3V3_DV
2400
I
F416
100MHZ
100n
5402
+3V3
I
100n
5400
+5V
2421
{DV_LCn,DV_ERRn,DV_DRQn,DV_DTACKn,DV_ASn,DV_PDn,DV_DSUn,DV_RWn,DV_VS,DV_HS_IN,DV_RSTn,DV_HS_OUT,DV_DSLn}
CL 16532095_029.eps
080801
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
132
DVIO Board: Audio & Video Output
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AUDIO & VIDEO OUTPUT
5500
+3V3_dly
A
100n
100MHZ
2500
+3V3
A
Clock delay
7500-B
74LVC04A
CLK27M_CON
1
2
B
3
14
4
5
7
7
7
F507 11
4500
6
OPTION
14
7
5501
8 F039
B
7
3502
F003
33R
F006
5 3504-D 4
33R
F012
F041
F042
100MHZ
2501
14
10 9
+3V3
C
+3V3_dly
7500-D
74LVC04A
4503
14
14
G2
+3V3_dly
7500-E
74LVC04A
7500-C
74LVC04A
4501
7500-A
74LVC04A
+3V3_dly
7
3504-B 2
7
3505-B 2
33R
F043
F044
2502 100n
OPTION
+3V3_dly
4502 F024
+3V3_dly
F009
C
33R
100n 2503
2504 100n
1500
179161
3
32
17
29
1
4
26
23
21
22
23
24
25
26
27
28
F015 29
30
RTSN
F050
F014
+3V3
F051
20
22
20
F030
F053
19
27
18
19
33R
14
16
30
F048
F049
13
33
F011 17
F019
Buffer
F021
7 3506-B 2
F052
33R
F
F029 +3V3
E
2505
47u
2506
+3V3
100n
100n
7506
UDA1334ATS
31
32
AUD_BCLK
34
AUD_WS
2 WS
35
36
AUD_SDO
3 DATAI
13
VDDA
1 BCK
4
VDDD
DIGITAL
INTERFACE
PLL
PLL0 10
F
SFOR0 11
33R
F018
+5V
F028
100n
2513
+12V
RESETn
G4
F031
F032
D1
G
2507
47u
2508
F017 33
F023
5 3506-D 4
F054
DAC
+3V3
ISPN
39
40
41
42
43
44
45
46
47
48
DE-EMPHASIS
+5V
INTERPOLATION FILTER
8 MUTE
AUD_MUTE
NOISE SHAPER
9 DEEM|CLKO
F026
CTSN
50
52
53
54
55
56
F036
57
58
F035
TDO
F038
59
60
F037
TMS
TXD
SFOR1 7
6 SYSCLK|PLL1
+5V
51
F034
C4
38
49
E8
OPTION
37
3518 F502
D7
100R
F033
RXD
C4
2514
14 VOL
VOR 16
F504
47u F503
VSSA
15
VSSD
VREF-DAC
5
12
F506
2515
F505 3519 F000
F319 2
100R
47u
PH-S
1501
1
3
TCK
H
100n
2519
47u
TDI
2518
4
G
H
F002
To digital PCB
YUV(7:0)
To analog PCB
1
5 3505-D 4
+3V3
10n
12
16
2517
37
15
33R
F047
9
14
F022
3521
8
11
35
DV_HS_OUT
DV_VS
AUD_BCLK
AUD_SDI
AUD_WS
2
38
36
F046
6
1
12
F008 13
220K
40
11
F020
5502
41
F016
D
F500
5
10
DAC
3
44
F045
9
5503
46
43
F040
2
F013
F501
1
8
DAC
1
7
2509
E
47
6
F010
3520
39
4
5
220K
34
F005
10n
28
45
YUV(7)
YUV(6)
YUV(5)
YUV(4)
YUV(3)
YUV(2)
YUV(1)
YUV(0)
F007
3504-C
2516
24
BUFENn_AUD
33R
3
33R 3505-A 1
8
3505-C 33R
6
3
3525 2
33R
1
33R
3506-A
8
1
33R 6 3506-C 3
6
21
47u
25
15
2
3
100n
2511
G4
10
EN1
EN2
EN3
EN4
GND
D
48
F004
8
47u
VC
1
BUFENn_VID
3504-A 1
4
1
2512
7 18 31 42
100n
7505
74LVC16244AD
2510
100n
{DV_LCn,DV_ERRn,DV_DRQn,DV_DTACKn,DV_ASn,DV_PDn,DV_DSUn,DV_RWn,DV_VS,DV_HS_IN,DV_RSTn,DV_HS_OUT,DV_DSLn}
{TDI,TCK,TDO,TMS}
{AUD_BCLK,AUD_WS,AUD_MUTE,AUD_SDI,AUD_SDO}
Shielding connection on mounting holes
7
Hole 4.0 mm with Cu
Hole 4.9mm
1503
+3V3_dly
7500-F
74LVC04A
14
12
13
1502
I
0003
0004
0008
0005
I
Hole 3.6 mm
0007
0006
GND_IEEE
OPTION
1
2
CL 16532095_030.eps
080801
3
4
5
6
7
8
9
10
11
12
13
14
0003 I3
0004 I3
0005 I4
0006 I5
0007 I5
0008 I4
1500 C7
1501 G14
1502 I2
1503 I2
2500 A1
2501 C3
2502 C3
2503 C3
2504 C3
2505 E12
2506 E12
2507 E11
2508 E11
2509 F6
2510 F8
2511 F9
2512 G8
2513 G5
2514 G11
2515 G13
2516 G10
2517 G13
2518 H12
2519 H12
3502 C5
3504-A D5
3504-B C5
3504-C D5
3504-D C5
3505-A D5
3505-B C5
3505-C D5
3505-D E5
3506-A D5
3506-B F5
3506-C E5
3506-D F5
3518 G10
3519 G13
3520 G10
3521 G13
3525 D5
4500 B4
4501 B4
4502 B3
4503 B5
5500 A1
5501 C4
5502 E12
5503 E12
7500-A B2
7500-B B2
7500-C B3
7500-D B5
7500-E B4
7500-F I1
7505 D3
7506 F11
F000 G13
F002 H13
F003 C6
F004 D6
F005 D7
F006 C6
F007 D6
F008 D7
F009 C6
F010 D6
F011 E7
F012 C6
F013 D6
F014 E7
F015 F7
F016 D6
F017 F7
F018 F7
F019 E6
F020 D6
F021 F6
F022 E6
F023 F6
F024 B3
F026 G9
F028 F5
F029 E9
F030 E6
F031 G7
F032 G7
F033 G9
F034 G7
F035 H8
F036 H7
F037 H8
F038 H7
F039 B5
F040 E3
F041 C5
F042 C5
F043 C5
F044 C5
F045 E4
F046 E4
F047 E4
F048 E4
F049 E4
F050 E5
F051 E4
F052 F4
F053 E5
F054 F5
F319 G14
F500 E12
F501 E12
F502 G11
F503 G11
F504 G13
F505 G13
F506 G12
F507 B4
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
133
Layout DVIO Board (Overview Top View)
PART 1
CL 1653242a.eps
PART 2
CL 1653242b.eps
CL 16532095_042.eps
160801
1101
1102
1200
1201
1500
1501
2143
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187
2188
2189
2190
2200
2201
2202
2203
2204
2205
2206
2207
2300
2301
2302
2303
2304
2305
2306
2307
2308
2309
2310
2311
2312
A1
A1
A3
A3
B3
A3
B2
C1
B1
B1
B1
B1
B1
B1
B1
C1
C1
C1
C1
A1
A1
A1
B1
B1
A1
B1
B1
B1
B1
B1
B1
A1
B1
A1
B1
B1
A1
B1
A1
A1
A1
B1
A1
B1
B1
B1
B1
B1
B1
B1
B2
A2
A3
B2
B3
B2
B2
A3
B3
A3
C1
D3
C3
C3
D2
D3
C2
C2
C2
B2
B2
B2
C1
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412
2413
2414
2415
2416
2417
2418
2419
2420
2421
2500
2501
2502
2503
2504
2505
2506
2507
2508
2509
2510
2511
2512
2513
2514
2515
2516
2517
2518
2519
2520
3100
3101
3102
3103
3104
3105
3106
3107
3108
3109
3110
C1
C1
C2
C2
C2
C2
C2
C2
C1
C1
C1
C1
D1
D1
D2
C2
D2
D2
D2
B3
B3
B3
B3
B3
B3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
D3
C3
C3
D3
D3
D3
A3
A3
A3
A3
A3
A2
A2
A2
A2
B3
B3
B3
B3
B3
A3
A3
A2
A3
A2
A2
A3
C1
C1
B1
B1
C1
B1
B1
B1
B1
C1
C1
3111
3112
3113
3114
3115
3116
3138
3148
3152
3153
3154
3155
3163
3164
3165
3166
3167
3168
3169
3170
3171
3172
3173
3174
3175
3176
3177
3178
3179
3180
3181
3182
3183
3184
3185
3186
3187
3188
3189
3190
3191
3192
3193
3194
3195
3196
3197
3198
3199
3201
3214
3215
3216
3217
3221
3223
3224
3300
3301
3303
3304
3305
3306
3307
3312
3313
3314
3315
3316
3317
3318
3319
3320
B1
B2
B1
B1
C1
A1
B2
B1
B1
B1
B1
B1
A1
A1
A1
B2
B1
B1
B1
B1
B1
B1
A1
B1
B1
B1
A1
A1
B1
A1
B1
A1
B1
A1
A1
B1
A1
B1
B1
B1
B1
C1
B1
B1
B1
B1
C1
C1
C1
A3
B3
B3
B3
B3
B3
B1
A3
B2
C1
C1
C1
C1
C1
C1
C2
B2
C2
D2
B2
D2
D3
D3
C3
3321
3322
3325
3327
3328
3400
3401
3402
3403
3404
3405
3502
3504
3505
3506
3518
3519
3520
3521
3522
3523
3524
3525
4101
4200
4206
4207
4300
4301
4302
4303
4304
4500
4501
4502
4503
5103
5106
5107
5108
5109
5110
5200
5201
5300
5301
5302
5303
5304
5400
5401
5402
5403
5404
5500
5501
5502
5503
6201
6300
7100
7101
7103
7105
7106
7200
7201
7202
7203
7204
7206
7207
7208
B3
D2
B3
C3
B2
B3
B3
B3
C3
C3
B3
A3
A3
A3
A3
A2
A3
A3
A3
B3
B3
B2
A3
B2
B3
B3
B3
C1
C1
C1
C1
C1
A3
A3
A3
A3
C1
B1
B2
B2
A1
B1
B3
A3
C2
D3
B2
C3
C2
C3
C3
C3
C3
C3
A3
A3
A2
A2
B3
C3
B2
A1
B1
B1
A2
B2
B2
B3
B3
B2
B1
A3
B2
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
134
Layout DVIO Board (Part 1 Top View)
CL 16532095_42a.eps
090801
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
135
Layout DVIO Board (Part 2 Top View)
CL 16532095_42b.eps
090801
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
136
Layout DVIO Board (Testlands Bottom View)
+3V3
AUDIO R
AUD_SDA
uP-CLOCK
AUDIO L
+5V
+3V5
+3V3
CLK27M_con
+3V3
+3V3
+3V3
AUD_BCLK
AUD_WS
+5V
RESET
+5V
+3V3
+3V3
+3V3
+3V3
+3V3
+3V3
CLK27M_DV
CLOCKAUDTMP
+3V3
CLOCK 27MHz
CL 16532095_043.eps
080801
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
137
Digital Board: VSM, Buffer Memory and Bit Engine Interface
1100 C1
1101 H1
2100 A6
2101 A6
2102 A6
2103 A6
2104 A6
2105 A6
2106 A6
2107 A6
2108 A6
2109 A6
2110 A6
2111 A5
2112 A5
2113 A5
2122 B14
2123 B15
2124 B15
2125 B15
2126 B15
2127 A13
2128 B1
2129 H9
2114 A5
2115 A5
2116 A5
2117 A5
2118 A5
2119 A5
2120 B13
2121 B14
1
2813 F13
2814 F13
2818 H15
2819 G13
2821 G15
2906 D1
2907 D1
2908 E1
2
2917 F1
2918 H1
2919 H2
2920 H2
3100 D11
3101 F11
3102 E3
3103 B15
2909 E1
2910 E1
2911 F1
2912 F1
2913 H1
2914 G1
2915 G1
2916 F1
3104 C4
3105 C4
3106 C4
3107 C4
3108 D4
3109 D4
3110 D4
3111 B3
3
3112 B3
3113 B3
3114 B3
3115 B4
3116 B4
3117 F11
3118 B4
3119 C2
4
3120 H9
3121-A D3
3121-B D3
3121-C D3
3121-D D3
3122-A D3
3122-B D3
3122-C D3
5
3122-D D3
3123 H9
3124 B7
3125 A7
3126 A7
3804 G12
3805 H12
3809 G13
3810 H13
3811 H13
3812 H15
3814 G15
3820 H12
3914 D1
3915 D1
3916 E1
3925 G1
3926 G1
3927 G2
4100 C15
5100 A4
5101 A13
5102 B1
5103 H9
3917 E1
3918 E1
3919 F1
3920 F1
3921 F2
3922 F2
3923 F2
3924 G2
6
5813 F13
7100 B11
7101 B15
7102 B1
7103 H8
7806 G14
7901 G4
I100 A5
7
I109 H11
I110 H12
I111 B4
I112 B4
I113 B4
I114 B4
I115 C4
I116 C4
I101 B11
I102 C11
I103 C11
I104 C11
I105 A1
I106 B1
I107 H11
I108 H11
8
I117 C4
I118 C4
I119 C4
I120 C3
I121 C3
I122 C2
I123 C3
I125 C3
9
I141 A13
I142 D11
I143 D11
I144 D4
I146 D4
I147 D11
I148 D4
I149 E11
I126 H8
I127 C3
I128 H10
I129 D3
I131 D3
I135 D4
I137 D4
I139 D4
10
I150 E4
I151 E4
I152 E11
I153 E11
I154 E11
I155 E11
I156 E4
I157 E4
I158 E11
I159 E4
I160 E11
I161 E4
I162 E11
I163 E4
I164 E11
I165 E4
11
I166 E11
I167 A7
I168 F7
I169 B12
I181 G7
I185 G7
I188 A7
I189 C12
I190 C15
I191 A7
I192 A7
I193 A7
I194 F5
I195 F5
I196 F5
I197 F5
12
I812 G13
I813 H13
I814 H15
I824 F13
I828 G13
I909 G1
I916 G1
I923 D1
I266 D4
I268 D4
I269 D4
I807 G15
I808 G15
I809 G13
I810 G13
I811 G13
13
I924 D1
I925 E1
I926 E1
I927 E1
I928 E1
I929 F1
I930 F1
I931 F1
I932 F1
I933 G1
I934 G1
14
15
VERSATILE STREAM MANAGER (VSM), BUFFER MEMORY & BITENGINE INTERFACE
{VSM_M_LDQM,VSM_M_UDQM,VSM_M_WEn,VSM_M_RASn,VSM_M_CASn,VSM_M_CLKEN,VSM_M_CLKOUT}
I931
11
I932
2916
10
I933
2915
9
I934
10p
3922
10p
3923
10p
3924
2914
10p
47R
47R
47R
VCC3_CLK_BUF
47R
7901
74HC1G04GW 5
GNDD
17
10K
GNDD
2-F14, 6-A8
ACLK
47 DQ11
ACC_ACLK_OSC
ACC_ACLK_PLL 8-B1
48 DQ12
50 DQ13
AUDIO ENCODER
I152
7-E14 DATA STREAM BUS
AE_CSn
I158
I160
I162
I164
I166
51 DQ14
53 DQ15
5
1
BE_FAN
I916
4
RESETn_BE
2920 22p
1101
FMN
2919 10p
1
2918 10p
OPTION
2
2913 10p
3
+3V3
47R
C6
GNDD
2129
100n
BE_CTRL
I126
B8
2
ACLK
100MHZ
4
5
6
7
8
VCC3_VSM_MEM
100n
100n
100n
2125
2124
2126
100n
10K
3103
OPTION
4100
6
+5V
7806
16
74HCT9046AD
GNDD
3
14
VIP_FID
2819
I809
68p
I810
7
3804
3809 12K
I811
11
I828 3810
2K 1%
3K
1%
3811 220K
I812
I813
6
12
15
9
I128
I107
I108
I109
5
NTH5G16P
I110
B9
VCC
COMPI PC1O|PCPO
SIGI
PC2O
2
I807
13
I808
3814
15K
C1A
2821
C1B
R1
R2
DEMO
RB
VCOO
10
2u2
4
I814
VCOI
INH
GND
H
GNDD
8
GNDD
GNDD
GNDD
ACLK_ST
9
GNDD
F14
10
CL 16532095_001.eps
070801
11
12
13
G
PLL
47R
3
100n
52 46 12
I824
1R
3120
2
E
VSSQ
54 41 28
VCC5_4046
E13
1
1
DECODE
COMMAND
VSS
1
GNDD
A8 33
F
+5V
GNDD
3820
AD_ACLK
A7 32
GNDD
3805 1R
3123
4
3
A6 31
A9 34
t
5
D
A4 29
A5 30
A10 22
GNDD
7103
74HCT1G125
GNDD
H
5103
100MHZ
A3 26
GNDD
EMI_CONTROL
3
A2 25
JTAG_CHAIN3
EMI_ADDRESS(21:1)
3927
A1 24
COLUMN
DEDCODER
40 36
I181
NC
A0 23
BANK
CTRL
LOGIC
COLUMN
ADDR
COUNTER/
LATCH
47R
I10
BA1 21
A11 35
GNDD
D14
2122
100n
I/O GATING
DQM DATA LOGIC
READ DATA LATCH
WRITE DRIVERS
NC
EMI_DATA(15:0)
BE_LOADN
2123
2121
100n
4u7
45 DQ10
VCC3_VSM
C
GNDD
BA0 20
ROW
ADDR
MUX
44 DQ9
3100
RAS_ 18
SENSE AMPLIFIERS
42 DQ8
I147
I149
162
163
164
165
166
172
173
COUNTER
REFRESH
M_D15
M_D14
M_D13
M_D12
M_D11
M_D10
M_D9
M_D8
M_D7
M_D6
M_D5
M_D4
M_D3
M_D2
M_D1
M_D0
HO_D15
206 HO_D14
207 HO_D13
1 HO_D12
2 HO_D11
3 HO_D10
4
HO_D9
6
HO_D8
7
HO_D7
8
HO_D6
9
HO_D5
11
HO_D4
12 HO_D3
13 HO_D2
14 HO_D1
16
HO_D0
2120
2127
98
96
93
91
88
86
83
81
82
84
87
89
92
94
97
99
68
65
69
63
66
64
61
59
56
54
53
55
58
60
M_A13
M_A12
M_A11
M_A10
M_A9
M_A8
M_A7
M_A6
M_A5
M_A4
M_A3
M_A2
M_A1
M_A0
74
70
76
75
79
HO_A22
HO_A21
HO_A20
HO_A19
HO_A18
HO_A17
HO_A16
HO_A15
HO_A14
HO_A13
HO_A12
HO_A11
HO_A10
HO_A9
HO_A8
HO_A7
HO_A6
HO_A5
HO_A4
HO_A3
HO_A2
HO_A1
27
28
179
180
184
185
186
187
188
189
190
191
193
194
195
196
197
198
199
200
202
203
204
205
HO_BEN1
HO_BEN0
HO_RWn
13 DQ7
CAS_ 17
REG MODE
DQMH DQML
+3V2
2
4
11 DQ6
5813
I168
BE_IRQ
3926 47R
6
HO_WAIT
HO_PROCCLK
I11
3921
OPTION
3925
I909
5505_odd_even
8 DQ4
10 DQ5
I143
I153
I154
I155
BANK0
MEMORY
ARRAY
(4,096x256x16)
B
22u
12
2917
7
EXT_INT3
47R
GNDD
10p
TCK
TDI
TDO
TMS
TRSTn
TEST0
TEST1
GNDD
2912
8
CPUINT0
CPUINT1
3920
I930
13
171
EXT_INT0
170
EXT_INT1
168
EXT_INT2
167
19
18
14
I159
I161
I163
I165
I185
I929
15
E14
4K7
VSS_182
1
3102
50
49
182
VSS_130
130
VSS_78
78
VSS_26
26
3
2
CPUINT0
C12 CPUINT1
VCC3_VSM
AE_IRQn
I156
I157
7 DQ3
I142
176
AE_BCLK
177
AE_WCLK
178
AE_DATA
D_PAR_DVALID
I195
I197 155
I194 154
I196 132
4
174
5 DQ2
CS_ 19
WE_ 16 I190
2818
GNDD
47R
2909
OPTION
10p
GNDD
I927
3918
47R
2910
OPTION
10p
GNDD
I928
3919
47R
2911
OPTION
10p
GNDD
5
AE_CS
VSS_208
VSS_192
VSS_175
VSS_161
VSS_150
VSS_135
VSS_116
VSS_100
VSS_90
VSS_80
VSS_67
VSS_57
VSS_46
VSS_36
VSS_21
VSS_10
10p
I926
3917
A9
OPTION
160
51
158
159
143
157
4 DQ1
CLK 38
22R
47R
I144
I146
I148
I150
I151
ACC_ACLK_DAI
ACC_ACLK_DEC
ACC_ACLK_OSC
ACC_ACLK_PLL
ACC_FID
ACC_PWM
208
192
175
161
150
135
116
100
90
80
67
57
46
36
21
10
2908
I167
I192
1R
1R
I191
VSM
D_PAR_REQ
D_PAR_D0
D_PAR_D1
D_PAR_D2
D_PAR_D3
D_PAR_D4
D_PAR_D5
D_PAR_D6
D_PAR_D7
D_PAR_DVALID
D_PAR_SYNC
D_PAR_STR
D_V4
D_WCLK
24
7
GNDD
30
33
34
39
40
42
43
35
37
38
29
32
45
44
2 DQ0
CTRL
LOGIC
3812
OPTION
I135
I137
I139
I266
I268
I269
5-G6
4-A6
MPEG2 VIDEO
CKE 37
ADDRESS REGISTER
GNDD
47R
10p
I925
3916
6
OPTION
8 33R
7 33R
8 33R
7 33R
6 33R
5 33R
6 33R
5 33R
VSS_155
VSS_154
VSS_132
VSS_24
2907
8
47R
10p
I924
3915
10
9
3121-A1
3121-B2
3122-A1
3122-B2
3122-C3
3122-D4
3121-C3
3121-D4
3914
2906
3125
3126
I193
DVDR VERSATILE STREAM MANAGER
VDD
I189
VIP_ERROR
VE_DTACKn
VE_DSn
1
BANK0
ROWADDR
LATCH &
DECODER
39 DQMH
142 I102
128 I103
127 I104
109
110
111
112
113
114
115
117
118
119
120
121
122
123
124
125
27 14
VDDQ
100n 2814
13
11
M_CASn
M_RASn
M_Wen
M_UDQM
M_LDQM
72
71
BE_BCLK
BE_WCLK
BE_DATI
BE_DATO
BE_SYNC
BE_FLAG
BE_V4
3
I169
15 DQML
DATA OUTPUT REGISTER
101
102
103
104
105
106
107
9
DATA INPUT REGISTER
10R
10R
10R
10R
10R
10R
10R
FRONTEND INTERFACE
I923
1R
UART2_RTSn
5-F12
VIP_ICLK
4u7 2813
14
3104
3105
3106
3107
3108
3109
3110
VE_VIP_ERROR
VE_DTACKn
VE_DSn
VE_D0
VE_D1
VE_D2
VE_D3
VE_D4
VE_D5
VE_D6
VE_D7
VE_D8
VE_D9
VE_D10
VE_D11
VE_D12
VE_D13
VE_D14
VE_D15
49 43
131
133
134
136
137
138
139
140
141
7101
MT48LC4M16A2TG GNDD
GNDD
2K2
15
G
149
UART2_RX
151
UART2_TX
153
UART2_CTSn
152
DIGITAL VIDEO (CCIR656)
2K2
FMN
F
I116
I117
I118
I119
UART1_CTSn
20
3119
I120
I121
I123
I125
I127
I129
I131
TO BITENGINE
1100
E
145
UART1_RX
146
UART1_TX
147
UART1_RTSn
148
HO_CSLn
HO_CSHn
BE_BCLK
I122
12
VBI_ICLK
VBI_IPD0
VBI_IPD1
VBI_IPD2
VBI_IPD3
VBI_IPD4
VBI_IPD5
VBI_IPD6
VBI_IPD7
UART2
GNDD
D
I112
I113
I114
I115
100MHZ
I101
3101
8-D6
GND
C
SYSCLK
RESETn
7100
SAA7333HL
I111
3
2
47
48
M_CLKOUT
M_CLKEN
8-F1
SYSCLK_VSM
RESETn_VSM
I141 +3V3
5101
3117
4
1
GNDD
UART1
1K2
GNDD
22
23
BCLK_CTRL
VDD_201
VDD_183
VDD_169
VDD_156
VDD_144
VDD_126
VDD_108
VDD_95
VDD_85
VDD_73
VDD_62
VDD_52
VDD_41
VDD_31
VDD_15
VDD_5
4K7
4K7
4K7
4K7
10K
10K
NC7SZ58 5
6
VCC
I106
B8
47R
B
3111
3112
3113
3114
3115
3116
GNDD
7102
I188
+3V3
3118
22n
100n
100n
100n
100n
VCC3_VSM
100MHZ
OPTION
25
+5V
+5V
+5V+5V
+5V
+5V
+3V3
2128
VDD_181
181
VDD_129
129
VDD_77
77
VDD_25
+3V3
5102
201
183
169
156
144
126
108
95
85
73
62
52
41
31
15
5
I105
+3V3
A
VCC3_VSM_MEM
VSM_M_D(15:0)
+3V3
3124
5100 I100
GNDD
2103
2102
2101
2100
2118
2117
2116
2115
2114
2113
2112
2111
2110
2109
2108
2107
2106
2105
2104
4u7
2119
A
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
VSM_M_A(13:0)
14
15
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
138
Digital Board: AV Decoder STI5505
5
6
7
8
9
10
11
12
13
OPTION
AV DECODER STI5505
YC(7) 1 3212-A8
VCC3_RST_BUF
F
128
133
121
122
129
132
124
125
126
135
127
123
RAS1n_OR_HOLDREQ
R|W_|DMAACK
WE0n
100p
4212
1n
2241
4214
100R
YC(0) 4 3213-D5
100R
GNDD
GNDD
8-I1 27M_CLK_PS
21
2234
+3V3
GNDD
19
2235
GNDD
CPUINT1
I12
5505_VS_PS
VDD_STI
CPUINT0
18
I222
10p
OPTION
17
2236
+5V
GNDD
16
I225
10p
OPTION
15
2237
GNDD
14
I227
10p
13
100R
3215
100R
11
2238
GNDD
10
I232
10p
OPTION
9
2239
8
7
2240
GNDD
OPTION
2200
GNDD
6
I210
10p
5
I212
OPTION
C
4
10p
3
2201
GNDD
2
10p
1
10K
3264
4211
10K
4210
3263
B
10p
OPTION
3214
12
I230
OPTION
A
20
I217
10p
OPTION
I2C BUS
SCL
1200
SDA
GNDD
30
31
32
33
41
23
25
IRQ0
IRQ1
GNDD
TEST1
TEST2
TEST3
TEST4
TEST5
I250
188
186
189
187
190
TCK
TDI
TDO
TMS
VDD_STI
2K2
3211
I249
191
192
193
194
195
196
197
14
PIO-4|0
PIO-4|1
PIO-4|2
PIO-4|3
PIO-4|4
PIO-4|5
PIO-4|6
PIO-4|7
22
I213
10p
OPTION
GNDD
D
PCM-OUT1
24
AD_DATA1
I251
I252
48
VSSA_PCM
50
VREF_PCM
49
10u
2207
VDDA_PCM
3266
VDD_STI
220R
GNDD
PORT 0 I/O
PORT 1 I/O
PORT 2 I/O
PORT 3 I/O
PORT 4 I/O
JTAG
IRQ
TEST
I253
3267
I231 2209
10K
3n3
E
GNDD
AUDIO OUT
GNDD
AC3
WE1n
CAS0n_OR_HOLDACK
CAS1n_OR_DMAREQn
CE1n
CE2n
CE3n
CSn
RAS0n_OR_CE4n
OEn
uP ST20cpu
SCLK
PCM_OUTO
PCM_CLK
LRCLK
SPDIF_OUT
AUDIO
LPCM
DECODER
MPEG1/2
43
44
45
46
47
3210
3216
I254
1R I255
I256
I257
I258
F
10R
ACLK_ST
VIDEO
MPEG
R_OUT
G_OUT
B_OUT
C_OUT
CVBS_OUT
Y_OUT
Video
demultiplexer
VDD_STI
I10
VIDEO_OUT
Audio
A/V/Sub
G
23
2233
YC(1) 3 3213-C6
OPTION
JTAG1_TMS
JTAG1_TRSTn
JTAG1_TD_HD_TO_CON
VDD_STI
VDD_STI
10K
10K
JTAG1_TD_CON_TO_HD
JTAG1_TCK
I247
201
202
203
204
205
206
207
2
PIO-3|2
PIO-3|3
PIO-3|4
PIO-3|5
PIO-3|6
PIO-3|7
PIO-3|0
PIO-3|1
GNDD
OPTION
GNDD
100R
I12 5505_HS
3241
I248
3242
I214
3243
I234
3K3
3253
10K
VDD_STI
RX1P 8-H10
RESETn_EMPIRE
4-A8
OSlinkIN
OSlinkOUT
CPU_Reset
CPU_Analyse
ErrorOUT
RTS1P
F202
F203
I241
I242
I243 4209
I244
I245
I246
CTS1P
FRONTEND INTERFACE
YC(0)
YC(1)
YC(2)
YC(3)
YC(4)
YC(5)
YC(6)
3-F5, 3-F8
Flash_Oen
BE_CPR
BE_SUR
BCLK_CTRL
VDD_STI
10K
3252
I237
I238
I239 3221
22R
I240
I200
F4
3
5
6
7
8
I236
GNDD
PIO-2|3
PIO-2|4
PIO-2|5
PIO-2|7
3251
9
10
198
199
11
12
13
4203
PIO-1|0
PIO-0|3
PIO-0|4
PIO-0|5
PCM-OUT2|PIO-0|6
PIO-0|7
PIO-0|0
OPTION
3209-D
4
5
3209-C10K
3
6
10K
23209-B7
10K
13209-A8
10K
TRSTn
2205
100p
2204
BE_RXD
BE_TXD
GNDD
I207
I206 AD_DATA2
I209 3254
10K
15
16
17
20
21
22
28
27
26
29
116
136
137
134
138
ADR17
ADR18
ADR19
ADR20
ADR21
BRM2
BRM1_OR_BOOTFROMROM
BRM0_OR_OSLINK_SEL
173
174
175
176
177
178
179
180
181
182
183
ADR11
ADR12
ADR13
ADR14
ADR15
ADR16
ADR7
ADR8
ADR9
ADR10
161
162
163
164
165
166
167
168
169
170
ADR1
ADR2
ADR3
ADR4
ADR5
ADR6
DATA11
DATA12
DATA13
DATA14
DATA15
100R
24
I211
10p
GNDD
SYSTEM USE
MEMORY interface
10K
3207
I259
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
YC(3) 1 3213-A8
I223
2232
GNDD
2210
E
148
147
146
145
144
143
142
141
151
152
153
154
155
156
157
158
D
DATA8
DATA9
DATA10
GNDD
7202
STi5505
3240
PIO-2|0
SYSTEM DATA Bus
EMI_D(15:0)
F204
C1
RSTn
AUXCLK
READY
PPC_CLK
DMAXFER
PPCn_MODE
EMI_A(21:1)
3K3
TX1P 8-G10
SYSTEM ADDRESS Bus
100R
JTAG_CHAIN1
3K3
F201
I201
I202
RESETn_5505
I203 8-F6
3201
82R
3208
82R
3250
I208
10K
SYSTEM CONTROL BUS
BE_CTRL
SERVICES
OS_BOOT
I215
YC(4) 4 3212-D5
GNDD
YC(2) 2 3213-B7
G4
GNDD
100R
YC(0:7)
4206
GNDD
100R
YC(5) 3 3212-C6
4104
GNDD
I204
I205
I235
4
GNDD GNDD
GNDD
4103
13
GNDD
3200
I145
4102
7
GNDD
3217
100R
VSS
11
GNDD
PIO-1|2
PIO-1|3
PIO-1|4
PIO-1|5
PIO-1|6
PIO-1|7
NVRAM
14
OPTION
VDD_STI
WC_
3237
3218
100R
SCL
1K5
3K3
3206
3205
I229
5
FRONTEND INTERFACE
SDA
1K5
OPTION
3K3
E2
3K3
E1
E3
+5V
3236
VDD_STI
7
E0
VDD_STI
3239
6
GNDD
3238
3
4202
4201
4200
B
I221
8
VCC
DCU_OSLINKn
2
I220
100n
7200
M24C64
1
I219
I224
2202
OPTION
OPTION
3204 10K
OPTION
3203 10K
3202 10K
+5V
I216
+5V
100R
+5V
100R
+5V
+5V
OPTION
12
4101
100R
YC(6) 2 3212-B7
RESETn_5505 8-F6
D_PAR_DVALID
{SDA,SCL}
C
7916-D
74LVC125A
OPTION
I2C BUS
A
14
TO PROGRESSIVE SCAN
4
100n
3
2208
2
330p
1
ENCODER
DECODER
57
56
55
63
64
62
I260
I261
I262
I263
I264
I265
G
2
3
4
5
7
8
9
10
I_REF_DAC_RGB
59
15K
680R
I277
3270
330R
H
3273
V_REF_DAC_RGB
I_REF_DAC_YCC
66
58
I287
10K
I288
V_REF_DAC_YCC
65
3269 820R I276
1%
3272
OSD_ACTIVE
117
OPTION
3274
I274
118
51
HSYNCn
ODD_OR_EVEN
4213
4u7
11
2228
2229
2231
GNDD
6
100n
I275
I286
2227
100n GNDD
5201
4u7
GNDD
4u7
{HD_M_AD(11:0),HD_M_DQ(15:0),HD_M_DQML,HD_M_DQMU,HD_M_CLK,HD_M_WEN,HD_M_CS1n,HD_M_CS0n,HD_M_CASN,HD_M_RASN}
1
4u7
8-G1SYSCLK_5505
100n
SDRAM Interface
5202
1-F4 5505_odd_even
C13 5505_VS_PS
C13 5505_HS
2230
VDD_STI
VDD_STI
VDD_STI
2226
100n GNDD
VDD_STI
2225
100n GNDD
VDD_STI
2224
100n GNDD
VDD_STI
2223
100n GNDD
VDD_STI
2222
100n GNDD
VDD_STI
2221
100n GNDD
2220
100n GNDD
VDD_STI
VDD_STI
I283
I284
I285
I278
I279
I280
I281
I282
2218
100n
GNDD
2219
100n
GNDD
VDD_STI
VDD_STI
2217
100n
GNDD
VDD_STI
2216
100n
GNDD
VDD_STI
2215
100n
GNDD
VDD_STI
2213
100n
GNDD
2214
100n
GNDD
VDD_STI
GNDD
VDD_STI
VDD_STI
I
100u
2203
+3V25
2212
100n
GNDD
VDD_STI
BLM31
VDD_STI
+3V3
2211
100n
GNDD
GNDD
I272
5200
I273 52
VSSA2
VSSA1
54
61
VDDA2
GND15
172
60
VDD15
171
VDDA1
GND14
160
53
VDD14
159
GND17
GND13
150
VDD17
VDD13
149
200
GND12
140
208
VDD12
139
VDD16
GND11
131
GND16
VDD11
130
185
GND10
120
184
VDD10
119
MEMCLKIN
MEMCLKOUT
DQML
DQMU
SDCS0n
SDCS1n
SDCASn
SDRASn
SDWEn
84
85
89
88
90
104
76
91
105
DQ13
DQ14
DQ15
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
92
93
94
97
98
99
100
101
106
107
108
109
112
113
114
115
AD6
AD7
AD8
AD9
AD10
AD11
AD0
AD1
AD2
AD3
AD4
AD5
VDD7
95
78
79
80
81
69
70
71
72
73
74
82
83
GND6
87
VDD9
VDD6
86
GND9
GND5
77
111
VDD5
75
GND8
GND4
68
110
VDD4
67
103
GND3
35
VDD8
VDD3
34
GND7
GND2
19
96
VDD2
102
GND1
DQ0
DQ1
SDRAM CONTROLLER
DATA
PIXCLK_27MHz
Subpicture
decoder
ADDRESS
18
H
Subpicture
2
IS
VDD1
B_DATA
B_WCLK
B_BCLK
B_FLAG
B_SYNC
B_V4
4
I270
I271
36
40
37
38
39
42
1
I267
FRONT-END
Interface
FRONTEND INTERFACE
1%
I
1%
1%
GNDD
CL 16532095_002.eps
070801
12
13
14
1200 D14
2200 C14
2201 C14
2202 A5
2203 I1
2204 A7
2205 A7
2207 E13
2208 E14
2209 E14
2210 E13
2211 I3
2212 I3
2213 I3
2214 I4
2215 I4
2216 I4
2217 I4
2218 I5
2219 I5
2220 I9
2221 I9
2222 I9
2223 I9
2224 I10
2225 I10
2226 I10
2227 I11
2228 I11
2229 I11
2230 I10
2231 I10
2232 A14
2233 A14
2234 A14
2235 A14
2236 A14
2237 B14
2238 B14
2239 B14
2240 C14
2241 B12
3200 B6
3201 D6
3202 A3
3203 A3
3204 A3
3205 A5
3206 A5
3207 G1
3208 D6
3209-A C8
3209-B C8
3209-C C8
3209-D C8
3210 F13
3211 D11
3212-A A13
3212-B A13
3212-C A13
3212-D A13
3213-A A13
3213-B B13
3213-C B13
3213-D B13
3214 C13
3215 C13
3216 F13
3217 C7
3218 C7
3221 D8
3236 A7
3237 A8
3238 B6
3239 B6
3240 B9
3241 D10
3242 D11
3243 D11
3250 D6
3251 C7
3252 C8
3253 C9
3254 D6
3263 D12
3264 D12
3266 D14
3267 E14
3269 I12
3270 I12
3272 I12
3273 I12
3274 I12
4101 A9
4102 A11
4103 A9
4104 A11
4200 B3
4201 B3
4202 B3
4203 D8
4206 C7
4209 C9
4210 D12
4211 D12
4212 B12
4213 I11
4214 B12
5200 I1
5201 I11
5202 I11
7200 A4
7202 D2
7916-D A10
F201 D6
F202 D9
F203 D9
F204 B9
I145 A11
I200 B12
I201 D6
I202 D6
I203 D6
I204 D7
I205 D8
I206 D7
I207 D7
I208 D6
I209 D6
I210 C14
I211 A14
I212 C14
I213 A14
I214 D11
I215 C5
I216 A5
I217 A14
I219 B3
I220 B3
I221 B3
I222 A14
I223 A14
I224 A5
I225 A14
I227 B14
I229 B5
I230 B14
I231 E14
I232 B14
I234 D10
I235 D8
I236 D8
I237 D8
I238 D8
I239 D8
I240 D8
I241 D9
I242 D9
I243 D9
I244 D9
I245 D9
I246 D9
I247 D10
I248 D11
I249 D11
I250 D11
I251 D13
I252 D14
I253 E14
I254 F14
I255 F14
I256 F14
I257 F14
I258 F14
I259 F2
I260 G13
I261 G13
I262 G13
I263 G13
I264 G13
I265 G13
I267 G2
I270 H2
I271 H2
I272 I2
I273 H11
I274 I12
I275 I11
I276 I12
I277 I12
I278 I8
I279 I8
I280 I8
I281 I8
I282 I8
I283 I8
I284 I8
I285 I8
I286 I11
I287 I12
I288 I12
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
139
Digital Board: System Memory & AV Decoder Buffer Memory
4
5
6
SYSTEM MEMORY ( FLASH + DRAM )
& AV DECODER BUFFER MEMORY
7
8
9
10
11
12
13
14
SDRAM INTERFACE
19 BA
32
E
I|O14
NC2
I|O15
NC3
RAS_
GNDD
LCAS_
VSS3
VSS2
VSS1
UCAS_
WE_
OE_
36
15
I|O9
A10
I|O10
A11
I|O11
38
I|O12
11
39
12
40
32
41
NC1
I|O13
NC2
I|O14
NC3
I|O15
14
RAS_
31
GNDD
LCAS_
30
UCAS_
13
29
WE_
OE_
10
8
33
7
34
6
35
5
36
4
38
3
39
2
40
1
41
48
14
17
31
16
30
9
13
26
29
I302
22 37 42
11
DRAM
DRAM
GNDD
28
I304 12
GNDD
VDD_MEM
47
A6
DQ6
A7
DQ7
A8
DQ8
A9
DQ9
A10
DQ10
A11
DQ11
A12
DQ12
A13
DQ13
A14
DQ14
A15
DQ15|A-1
20
40
19
42
18
44
8
30
7
32
6
34
5
36
4
39
3
41
2
43
1
45
48
A16
A17
RY|BY_
15
17
16
A18
9
A19
NC1
CE_
NC2
OE_
NC3
10
26
13
I303
28
14
11
WE_
I30512
RESET_
BYTE_
47
VDD_MEM
DQ2
A3
DQ3
A4
DQ4
A5
DQ5
A6
DQ6
A7
DQ7
A8
DQ8
A9
DQ9
A10
DQ10
A11
DQ11
A12
DQ12
A13
DQ13
A14
DQ14
A15
DQ15|A-1
RY|BY_
20 A10
35
38
LCKE
35 CLK
40
42
3304
VDD_MEM2
I301
10K
34 CKE
44
17 RAS_
30
16 CAS_
32
15 WE_
34
36 DQMH
36
NC1
NC2
NC3
27 46
I/O CONTROL
SENSE AMP
OUTPUT BUFFER
VSS
4
100n
100n
GNDD
VDD_MEM2
E
15
10
I307
100MHZ
+3V3
13
7307
MT48LC1M16A1TG
14
1
19 BA
25
7
13 38 44
VDDQ
GNDD
F
BANK
SELECT
DQ0 2
DQ1 3
21 A0
DATA INPUT
22 A1
REGISTER
G
28 A5
29 A6
SYSTEM CONTROL BUS
30 A7
{EMI_RWn,FLASH_OEN,EMI_RAS1n,EMI_OEn,EMI_CAS1n,EMI_CAS0n,EMI_RAS0n,EMI_CE3n}
31 A8
ROW DECODER
27 A4
ROW BUFFER
REFRESH COUNTER
ADDRESS REGISTER
24 A3
LWE
DQ3 6
14
14
LCKE
35 CLK
3
6
3305
2
VDD_MEM2
5
I308
10K
7
17 RAS_
GNDD
I309
VDD_MEM
16 CAS_
VDD_MEM
I
14
34 CKE
18 CS_
7
GNDD
7305-D
74LVC00AD
12
14
11
13
15 WE_
7305-C
74LVC00AD
9
LCBR
7305-B
74LVC00AD
4
512Kx16
512Kx16
DQ6 11
36 DQMH
EMI_A(21)
LCBR
6
DQ15 49
33
VSSQ
4
10 41 47
CL 16532095_003.eps
070801
GNDD
8
9
10
11
H
DQ14 48
NC 37
26 50
7
DQ13 46
HOST SDRAM
GNDD
5
DQ11 43
LQDM
10
4
DQ9 40
DQ10 42
LWCBR
VSS
GNDD
DQ8 39
I
14 DQML
8
7
G
DQ7 12
DQ12 45
LATENCY &
BURST LENGTH
LWE
7
3
COLUMN
DECODER
PROGRAMMING
REGISTER
LRAS
TIMING REGISTER
H
7305-A
74LVC00AD
1
COL. BUFFER
20 A10
DQ4 8
DQ5 9
LCAS
VDD_MEM
100n
LRAS
32 A9
2323
DQ2 5
LDQM
VDD_MEM
2
2312
45
23 A2
1
2311
10 41 47
HOST SDRAM
43
GNDD
GNDD
D
VSSQ
26 50
FLASH
GNDD
33
LQDM
27 46
FLASH
DQ15 49
NC 37
VDD
BYTE_
DQ14 48
LWCBR
41
WE_
RESET_
C
DQ13 46
LATENCY &
BURST LENGTH
LWE
14 DQML
5301
OE_
DQ11 43
DQ12 45
PROGRAMMING
REGISTER
LCBR
39
+3V3
CE_
COLUMN
DECODER
LRAS
18 CS_
A18
A19
ROW DECODER
32 A9
33
A16
A17
ROW BUFFER
REFRESH COUNTER
31
LCBR
21
38
DQ1
COL. BUFFER
VCC3
A9
22 37 42
F
VCC2
I|O8
18
DQ5
35
A1
A2
100n
12
I|O13
NC1
16
I|O7
A8
9
DQ4
A5
22
100n
11
35
A7
19
DQ3
A4
23
33
2319
I|O12
28
I|O6
8
A3
31
100n
I|O11
34
A6
20
DQ2
2318
I|O10
A11
27
I|O5
21
7
DQ1
A2
100n
A10
26
33
A5
5
A1
2317
I|O9
A9
10
I|O4
22
DQ9 40
DQ10 42
2316
I|O8
I|O3
A4
23
4
31 A8
DQ8 39
100n
I|O7
A8
25
9
A3
3
DQ0
29
DQ7 12
2315
A7
24
8
VCC1
VCC3
VCC2
I|O6
23
I|O2
30 A7
VCC
512Kx16
DQ6 11
100n
15
A6
7
I|O1
24
A0
512Kx16
2314
16
I|O5
20
A2
DQ0
29
B
DQ5 9
100u
28
A5
5
A1
24
29 A6
GNDD
37
25
VCC
A0
28 A5
100n
DQ4 8
OUTPUT BUFFER
D
I|O4
19
I|O0
25
2
27 A4
2307
7304
AM29LV160DT
37
GNDD
21
GNDD
7302
AM29LV160DT
DQ3 6
2321
27
I|O3
A4
18
4
GNDD
24 A3
DQ2 5
LDQM
I/O CONTROL
26
A3
3
VDD_MEM
LWE
SENSE AMP
25
I|O1
I|O2
A2
A0
6
REGISTER
LCAS
24
I|O0
17
2
VSS3
23
1
21
VSS2
20
A1
7301
GM71V18163CJ
100n
VSS2
100n
2306
100u
VSS1
100n
22 A1
23 A2
VSS2
100n
2305
DATA INPUT
+3V3
2320
VSS1
100n
2302
VSS1
19
6
VDD_MEM
100MHZ
100n
2304
GNDD
VCC1
18
C
A0
GNDD
DQ0 2
21 A0
ADDRESS REGISTER
2303
I310
100n
2301
1
VDDQ
BANK
SELECT
LRAS
+3V3
+3V3
2300
7300
GM71V18163CJ
I306
5300
100u
B
A
13 38 44
DQ1 3
VDD_MEM1
100MHZ
17
7
2322
+3V3
5302
25
VDD
VDD_MEM1
+3V3
1
2310
2308
7306
MT48LC1M16A1TG
SYSTEM ADDRESS Bus
TIMING REGISTER
A
2309
VDD_MEM2
SYSTEM DATA Bus
2313
100n
100n
3
100n
2
100n
1
12
13
14
2300 B2
2301 B2
2302 B2
2303 B4
2304 B4
2305 B4
2306 B6
2307 B9
2308 A13
2309 A13
2310 A13
2311 A13
2312 A14
2313 A14
2314 F13
2315 F13
2316 F14
2317 F14
2318 F14
2319 F14
2320 B6
2321 F13
2322 B2
2323 H6
3304 D11
3305 H11
5300 B6
5301 E11
5302 B2
7300 C1
7301 C3
7302 B6
7304 B8
7305-A H8
7305-B H7
7305-C I8
7305-D I7
7306 A12
7307 F12
I301 D11
I302 F5
I303 F8
I304 F6
I305 F8
I306 B6
I307 E12
I308 H11
I309 I7
I310 B4
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
140
Digital Board: Video Encoder, Empire & Buffer Memory
5
6
7
8
9
10
VIDEO ENCODER : EMPIRE & BUFFER MEMORY
5-E13
VIP_HS
5-F14
10K
3404
VE_DTACKn
4403
5-E13
VIP_VS
VDD
VDDCO
BASED
LINE
100n 2416
100n 2417
100n 2419
100n 2420
100n 2421
100n 2422
D
100n 2423
100n 2424
I413 +3V3
5404
+3V3
VCC3_VE_MEM_2
100MHZ
GNDD
E
4 3410-D5
2 3410-B7
33R
1 3410-A8
33R
GNDD
C
100n 2418
2u2
87
86
85
84
74
73
72
71
YUV7
YUV6
YUV5
YUV4
YUV3
YUV2
YUV1
YUV0
PROCESSING
100n 2414
100n 2415
2426
91
90
89
VSYNC
HSYNC
FID
START
99
98
97
SCL
SDA
MAD
TRANSCEIVER
-BUS C 2 I
CONTROL
GLOBAL
204
194
176
166
152
142
120
110
100
94
88
66
58
48
38
28
16
6
182
180
178
162
134
132
130
128
126
82
80
78
76
26
24
22
3 3410-C6
VE_M_D(63:0)
B
100n 2413
27 MHz
BASED
MACROBLOCK
PROCESSING
ASIP
BASED
BITSTREAM
PROCESSING
dangle
4u7
2425
5-E13
I401
I416
100R
100R
3405
93
125
124
122
121
CSN
I-MN
URQN
LRQN
VCLK
138
139
140
141
143
144
145
146
148
149
150
151
153
154
155
156
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
GENERATION
CLOCK
136
135
123
DTACK-RDY
96
119
118
117
116
114
113
112
111
109
108
107
106
104
103
102
GPIO11
GPIO10
GPIO9
GPIO8
GPIO7
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0
FAD-RDYN
FAD-EN
FAD-RWN
DS-RDN
AS-ALE
158
165
164
163
161
160
159
GNDD
I408
3406
VIP_ICLK
RESETN_EMPIRE
I407
4405
VE_DSn
184
NC
TDO
TEST
CS-TEST
TDI
TMS
TCK
TRST
AND SCAN TEST
BOUNDARY SCAN TEST
BOX FOR
TEST CONTROL
DATA OUTPUT PORT
OEN
WEN
RASN
CASN
2u2
GNDD
69
68
67
65
+3V3
2412
E
GPIO PORT
+3V3
100MHZ
GNDD
DRAM INTERFACE
VCC3_VE_MEM
100MHZ
I409
5402
VDD_EMPIRE
+3V3
33R
33R
33R
33R
33R
33R
33R
33R
33R
5400
+3V3
4K7
I402
8
7
6
5
1
2
3
4
I410
GNDD
I403
A
3407
3408-A 1
3408-B 2
3408-C 3
3408-D 4
3409-A 8
3409-B 7
3409-C 6
3409-D 5
GNDD
3402
I415
DATA63
DATA62
DATA61
DATA60
DATA59
DATA58
DATA57
DATA56
DATA55
DATA54
DATA53
DATA52
DATA51
DATA50
DATA49
DATA48
DATA47
DATA46
DATA45
DATA44
DATA43
DATA42
DATA41
DATA40
DATA39
DATA38
DATA37
DATA36
DATA35
DATA34
DATA33
DATA32
DATA31
DATA30
DATA29
DATA28
DATA27
DATA26
DATA25
DATA24
DATA23
DATA22
DATA21
DATA20
DATA19
DATA18
DATA17
DATA16
DATA15
DATA14
DATA13
DATA12
DATA11
DATA10
DATA9
DATA8
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
D
4K7
52
51
50
49
47
46
45
44
42
41
40
39
37
36
35
34
32
31
30
29
20
19
18
17
15
14
13
12
10
9
8
7
5
4
3
2
208
207
206
205
203
202
201
200
198
197
196
195
193
192
191
190
188
187
186
185
175
174
173
172
170
169
168
167
EMPIRE
10K
3401
VSSCO
VIDEO ENCODER
3403
I414
MEM-ST
GNDD
4K7
OPTION
F12
101
C
1
11
21
33
43
53
63
70
92
95
105
115
137
147
157
171
189
199
23
25
27
75
77
79
81
83
127
129
131
133
177
179
181
183
VSS
7410
3400
C9
DIGITAL VIDEO (CCIR656)
VIP_YUV(7:0)
RESETN
I404
I405 4406
I406 4407
GNDD
VDD_EMPIRE
JTAG_CHAIN3
VIP_RTS1
OPTION
C10
SAA6750H
13
{SCL,SDA}
SCL
SDA
VE_DATA(15:0)
B
12
I2C BUS
VDD_EMPIRE
MPEG2 VIDEO
A
11
4404
4
VIP_FID
3
ADR8
ADR7
ADR6
ADR5
ADR4
ADR3
ADR2
ADR1
ADR0
2
64
62
61
60
59
57
56
55
54
1
33R
GNDD
VE_M_CTRL
33R
VE_M_A(8:0)
2403 100n
I|O6
I|O7
I|O8
I|O9
I|O10
I|O11
I|O12
11
12
32
NC1
I|O13
NC2
I|O14
I|O15
NC3
RAS_
GNDD
LCAS_
I
VSS3
VSS2
DRAM
VSS1
UCAS_
WE_
OE_
7
8
9
10
33
34
35
36
I|O2
I|O3
I|O4
I|O5
I|O6
I|O7
I|O8
I|O9
I|O10
I|O11
38
I|O12
39
11
40
12
41
32
NC1
I|O13
NC2
I|O14
I|O15
NC3
14
RAS_
31
GNDD
LCAS_
30
UCAS_
13
I411
29
I412
DRAM
22 37 42
GNDD
WE_
OE_
4
5
7
8
9
10
33
34
35
36
I|O2
I|O3
I|O4
I|O5
I|O6
I|O7
I|O8
I|O9
I|O10
I|O11
38
I|O12
39
11
40
12
41
32
NC1
I|O13
NC2
I|O14
I|O15
NC3
14
RAS_
31
GNDD
LCAS_
30
UCAS_
13
29
DRAM
WE_
OE_
3
4
5
7
8
9
10
33
34
35
36
1
6
21
VCC3
I|O1
2
VCC2
GNDD
I|O0
VCC1
21
VCC3
6
VCC2
3
1
VCC1
I|O1
2
2411 100n
7403
GM71V18163CJ
17
A0
18
A1
19
A2
20
A3
23
A4
24
A5
25
A6
26
A7
27
A8
28
A9
16
A10
15
A11
GNDD
I|O0
I|O1
I|O2
I|O3
I|O4
I|O5
I|O6
I|O7
I|O8
I|O9
I|O10
I|O11
38
I|O12
39
11
40
12
41
32
NC1
I|O13
NC2
I|O14
I|O15
NC3
14
RAS_
31
GNDD
LCAS_
30
UCAS_
13
DRAM
29
VSS3
I|O5
5
GNDD
I|O0
VSS3
I|O4
4
21
VSS2
I|O3
3
6
22 37 42
22 37 42
22 37 42
GNDD
GNDD
GNDD
WE_
OE_
2
3
4
5
6
7
8
9
10
11
2
3
4
5
7
G
8
9
10
33
34
35
36
H
38
39
40
41
14
31
30
I
13
29
CL 16532095_004.eps
070801
{VE_M_RASn,VE_M_CASn,VE_M_WEn,VE_M_OEn}
1
F
2410 100n
2408 100n
7402
GM71V18163CJ
17
A0
18
A1
19
A2
20
A3
23
A4
24
A5
25
A6
26
A7
27
A8
28
A9
16
A10
15
A11
VSS1
I|O2
1
VSS3
I|O1
2
VCC3
GNDD
I|O0
VCC1
VCC3
VCC2
VCC1
21
VSS2
H
6
VSS1
G
1
2409 100n
VCC3_VE_MEM_2
2407 100n
2405 100n
7401
GM71V18163CJ
17
A0
18
A1
19
A2
20
A3
23
A4
24
A5
25
A6
26
A7
27
A8
28
A9
16
A10
15
A11
VCC2
2402 100n
7400
GM71V18163CJ
17
A0
18
A1
19
A2
20
A3
23
A4
24
A5
25
A6
26
A7
27
A8
28
A9
16
A10
15
A11
2406 100n
VCC3_VE_MEM_2
2404 100n
VSS2
VCC3_VE_MEM
2401 100n
VSS1
2400 100n
VCC3_VE_MEM
F
12
13
2400 F3
2401 F3
2402 F3
2403 F6
2404 F6
2405 F6
2406 F9
2407 F9
2408 F9
2409 F12
2410 F12
2411 F12
2412 E3
2413 B11
2414 B11
2415 C11
2416 C11
2417 C11
2418 C11
2419 D11
2420 D11
2421 D11
2422 D11
2423 D11
2424 D11
2425 B12
2426 E12
3400 A6
3401 A6
3402 B6
3403 A6
3404 A8
3405 A9
3406 A9
3407 F9
3408 F10
3408 F10
3408 F10
3408 F10
3409 F10
3409 F10
3409 F10
3409 F10
3410 E11
3410 E11
3410 E11
3410 E11
4403 A10
4404 A10
4405 A8
4406 B5
4407 B5
5400 E3
5402 A12
5404 E12
7400 F2
7401 F5
7402 F8
7403 F11
7410 B4
I401 B9
I402 A11
I403 B7
I404 B5
I405 B5
I406 B5
I407 A8
I408 B9
I409 B7
I410 E3
I411 I4
I412 I4
I413 D12
I414 A7
I415 A7
I416 B9
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
141
Digital Board: Video Input Processor (VIP) & DVIO Interface
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VIDEO INPUT PROCESSOR ( VIP ) & DIVIO INTERFACE
+5V_Buffer
A
2645 100n
GNDD
7644
BC847B
100n
48
47
50
49
3V3_PHY
VSM_UART2_TX
G
52
51
54
53
56
55
58
57
60
59
I578
A6
RESETN_DVIO
LOAD_DVN
8-E13
1-C11
vip_error
VSM_UART2_RX
GNDD
4552
4-A10
F14
BST82
7554
10K 3560
10K 3559
7553
BST82
I555
I554
100R
4u7
3553
3552
I557
I556
2576 100n
2580
2575 100n
2573 100n
2574 100n
2572 100n
100R
4u7
2561 100n
2588
2586 100n
2585 100n
2584 100n
2583 100n
2582 100n
2590 100n
2589 100n
2581 100n
2591 100n
2592 100n
4u7
2593 100n
2594
4u7
2571 100n
3563
GNDD
GNDD
GNDD
GNDD
I559
B3
E2
G2
J1
L1
M3
K4
H4
F4
D4
C5
C9
D12
H12
M4
M8
M11
C8
C10
F12
J12
M5
SDA M9
SCL P10
INT_A N9
P9
AUDIO
CLK
OUTPUT FORMATTER I-PORT
VIDEO FIFO
VERTICAL SCALING
HORIZONTAL FINE(PHASE-) SCALING
LINE FIFO BUFFER
E
VDD_LVC32
3554 1R
VIP_ICLK
+3V3
I569
I571
I574
I575
14
+3V3
7551-C
74LVC32AD
9
8
VSSI
GNDD
7
100n
100MHZ
I573
10
VSSE
I589
5560
VDD_LVC32
DV_IN_HS
11
14
2587
GNDD
7551-D
74LVC32AD
E13
12
VIP_IGP1
13
VIP_RTS1
F
G6
7
GNDD
GNDD
G
VDD_LVC32
3562
GNDD
N11
P12
P11
M12
DIGITAL VIDEO (CCIR656)
GNDD
1R
CX-11F
24M576
VIDEO/TEXT
ARBITER
ASCLK
ALRCLK
AMCLK
AMXCLK
VIP_HS 4-A10
VIP_IGP1 F14, E5
VIP_FID 1-H12
VIP_VS 4-A9
GNDD
5550
VIP ANALOG VIDEO INPUT
VXDD
VDDA4A
VDDA3A
VDDA2A
VDDA1A
H-PORT
TDI
TCK
4u7
2596
100n 2595
B2
B13
B14
C3
C4
C12
C13
N1
N2
N3
N13
N14
P2
RES1
RES2
RES3
RES4
RES5
RES6
RES7
RES8
RES9
RES10
RES11
RES12
RES13
EXMCLR
P3
N4
P5
P13
D13
C14
A13
B12
A12
CE
RESON
TEST0
TEST1
TEST2
TEST3
TEST4
TEST5
3557
4K7
X-PORT
XTAL
GPO
VIP_RTS1
A1
H
100n 2562
4u7
2565
VSSA
22p
TMS
VIDEO
CLK
I582
GND_PHY
BCS-SCALER
AOUT
TRST
TDO
4u7
M1
BOUNDARY
SCAN
K13
L14
K14
K12
G14
G12
H11
H14
H13
J14
J13
K11
M14
L13
N12
L12
D5
D9
D11
G11
L4
L8
L11
D7
D10
F11
J11
L5
L9
45
I576
GNDD
CBCR
A5
B5
C6
B6
D6
43
46
+12V
SYNC
TDO
TDI
TRSTN
TCK
TMS
44
100n
+5V
S
IGP1
IGP0
IGPV
IGPH
IDP0
IDP1
IDP2
IDP3
IDP4
IDP5
IDP6
IDP7
ICLK
IDQ
ITRDY
ITRI
2K2
GNDD
VSM_UART2_RTSn
41
VBI DATA
SLICER
CBCR
I550
100n
39
42
I572
S
TEXT
FIFO
RAW
HPD0
HPD1
HPD2
HPD3
HPD4
HPD5
HPD6
HPD7
+5V
2577
40
2558 100n
GNDD
Y
YCBCR
D14
E11
E13
E12
E14
F13
F14
G13
+5V
2578
LUM
PROC
C2
L2
A4
M2
J4
H3
E4
C1
F
Y
S
1ST TASK IIC REG MAP SCALER
2ST TASK IIC REG MAP SCALER
4K7
GNDD
14
DV_IN_DATA(0:7)
UART2
VDD_LVC32
JTAG_CHAIN3
10K
AE_WCLK
I566
I567
I568
CR
COMB
FIL
VIDEO INPUT PROCESSOR
dangle
7551-A
74LVC32AD
1
14
dangle
3
7551-B
74LVC32AD
4
6
2
5
7
VDDE_7118
2555 100n
2556 100n
2557 100n
GNDD
CB
CHROM
PROC
C
FIR-PREFILTER
PRESCALER
37
AE_BCLK
E11
+3V3
I583
38
I563
I564
I565
S
3555
35
C
D
I584
33
36
100MHZ
VDDI
SCALER EVENT CONTROLLER
E3 DV_IN_HS
E1 DV_IN_VS
34
2552 100n
2553 100n
2554 100n
GNDD
CR
RAW
VDDE
DIGITAL VIDEO (CCIR656)
E1 DV_IN_CLK
31
+3V3
I562
Y
CB
COMP
PROC
YCBCRS
29
32
2551 100n
GNDD
R
G
B
YCBCR
30
+3V3
I561
DECODER OUTPUT CONTROL
27
2550 100n
GNDD
A|13
A|14
A|1D
A|21
A|22
A|23
A|24
A|2D
A|31
A|32
A|33
A|34
A|3D
A|41
A|42
A|43
A|44
A|4D
XRDY
XPD0
XPD1
XPD2
XPD3
XPD4
XPD5
XPD6
XPD7
XCLK
XDQ
XRH
XRV
XTRI
28
VSM_UART2_CTSn
K2
L3
K3
G4
G3
H2
J3
H1
E3
F2
F3
G1
F1
B1
D2
D1
E1
D3
VDDA
IIC REGISTER MAP
FAST
SWITCH
DELAY
A6
A8
B8
A9
B9
A10
B10
A11
C11
A7
B7
C7
D8
B11
25
FSW
A|11
DV_IN_DATA(0)
DV_IN_DATA(1)
DV_IN_DATA(2)
DV_IN_DATA(3)
DV_IN_DATA(4)
DV_IN_DATA(5)
DV_IN_DATA(6)
DV_IN_DATA(7)
23
26
M13
J2
K1 A|12
CVBS_OUT_B_7118
I580
I577
24
I560
4554
CONTROL
24M576_OUT
21
AD-PORT
2560
22
E13
VIP_IGP1
DV_IN_HS G8
N6
N8
P8
M7
L7
P7
N7
L6
M6
P6
19
OPTION
GNDD
ADP0
ADP1
ADP2
ADP3
ADP4
ADP5
ADP6
ADP7
ADP8
20
I547
XTAL
XTALI
XTOUT
I570
AE_DATAI
17
A3
B4
A2
+3V3
15
18
22p
+3V3
16
GNDD
P4
N5
M10
N10
L10
GNDD
100n
+3V3
13
7552
SAA7118E
I581
2570
14
I545
I590 5556
GNDD
LLC
LLC2
RST0
RST1
RTCO
G8 DV_IN_VS
E
11
GNDD
+3V3
B
+3V3
100MHZ
+3V3
4555
2559
I549
12
2K2
OPTION
I558
VIP_FB
ANALOG INPUT CONTROL
H8 DV_IN_CLK
9
I579
I548
10
100MHZ
3556
I543
5557
I591
+3V3
I593
5559
+3V3
ANALOG1 ANALOG1 ANALOG1 ANALOG1
+ ADC1
+ ADC1
+ ADC1 + ADC1
I546
5
7
VDDE_7118
100MHZ
I592
GNDD
RESETn_VIP
CLKEXT
D
6
8
GNDD
GNDD
GNDD
E6
I541
+3V3
5558
+3V3
GNDD
AGND
AGNDA
VXSS
I544
3
75R
I542
1
4
3558
I540
4u7
2569
TO DIVIO BOARD
1501
84816
2
+3V3
100n 2566
100MHZ
100n 2568
+3V3
+3V3
2567
I588
5555
DV_IN_DATA(0:7)
100MHZ
+3V3
+3V3
2563
3647
+3V3
100MHZ
I587
5554
100MHZ
I586
100n 2564
+3V3
GNDD
GNDD
I585
5552
+3V3
C
GNDD
+3V3
560R
2K2
2579
22n
5553
-5V_Buffer
VDDE_7118
2646
3561
180R
3645
B
I643
3646
I644
100R
SCL
SDA
I642
3648
CVBS_OUT_B
A
I2C BUS
{SDA,SCL}
GNDD
7
GNDD
GNDD
H
GNDD
C3
I
I
CL 16532095_005.eps
070801
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1501 C2
2550 E5
2551 E5
2552 E5
2553 E5
2554 E5
2555 F5
2556 F5
2557 F5
2558 F5
2559 H7
2560 H7
2561 B10
2562 B7
2563 B7
2564 B7
2565 C6
2566 C6
2567 C6
2568 C5
2569 C5
2570 E1
2571 C10
2572 C10
2573 C10
2574 C10
2575 C10
2576 C10
2577 F1
2578 F3
2579 B12
2580 C11
2581 B9
2582 B9
2583 B10
2584 B10
2585 B10
2586 B10
2587 F14
2588 B10
2589 B9
2590 B9
2591 B9
2592 B9
2593 B9
2594 B8
2595 D8
2596 D8
2645 A3
2646 B4
3552 C12
3553 C12
3554 E11
3555 G8
3556 D6
3557 G6
3558 D5
3559 B12
3560 B12
3561 F13
3562 G8
3563 G7
3645 B3
3646 B3
3647 B3
3648 A2
4552 G6
4554 E5
4555 D5
5550 G7
5552 B7
5553 B6
5554 B6
5555 C5
5556 C11
5557 B11
5558 B8
5559 C8
5560 F13
7551-A G13
7551-B G14
7551-C F12
7551-D F14
7552 D6
7553 B12
7554 B13
7644 A3
I540 C1
I541 C3
I542 D1
I543 D3
I544 D1
I545 D3
I546 D1
I547 D3
I548 D1
I549 E1
I550 G9
I554 C12
I555 C12
I556 C12
I557 C12
I558 D5
I559 D11
I560 E6
I561 E6
I562 E6
I563 E6
I564 E6
I565 E6
I566 F6
I567 F6
I568 F6
I569 F11
I570 F1
I571 F11
I572 F6
I573 F13
I574 F11
I575 F11
I576 F6
I577 G7
I578 F2
I579 G7
I580 G7
I581 G7
I582 G3
I583 G8
I584 H8
I585 B7
I586 B6
I587 B6
I588 C5
I589 F14
I590 C11
I591 B10
I592 C8
I593 C8
I642 A2
I643 B3
I644 B3
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
142
Digital Board: A / V Interface
4
5
6
A / V INTERFACE
I649
7
8
9
10
2618
VIP ANALOG VIDEO INPUT
I650
I652
100n
2609
I653
I645
3605
100n
1R
3629
100n
2629
22
2613
3609
A
2608
21
20
100n
AUDIO OUT
18
3632
560R
AD_ACLK
I654
16
22R
2614
100n
I655
GNDD
14
3631
3643
I638
13
100R
I639
12
1R
75R
3634
100n
11
3644
OPTION
3630
9
3604
GNDD
180R
100n
AD_ACLK
3610
100n
1R
75R
3614
GNDD
OPTION
GNDD
5601
+5V
100MHZ
7601
74HCT1G125
GNDD
VIDEO_OUT
+5V
100n
22p
GNDD
5600
4
I641
3
1
1602
GNDD
3619
4
GNDD
D
10R
I600
22
I601
I622
5605
7600
BC847B
21
7606
BC847B
15u
20
1%
1K
430R
47p
3607
2607
47p
2606
3606
430R
1%
19
18
3608
1%
1K
3603
430R
47p
3602
2602
47p
2601
3601
430R
I602
1%
I604
17
16
GNDD
GNDD
GNDD
GNDD
GNDD
GNDD
GNDD
-5V_Buffer
15
I605
14
-5V_Buffer
13
{R_OUT_B,G_OUT_B,B_OUT_B,C_OUT_B,CVBS_OUT_B,Y_OUT_B}
F
+5V_Buffer
+5V_Buffer
12
I606
11
2615
+5V
2610
I607
100n
+5V
10
GNDD
9
100n
GNDD
GNDD
GNDD
GNDD
GNDD
4u7
2630
5
I612
4
GNDD
-5V_Buffer
-5V
+5V_Buffer
1
GNDD
2625
UART1
+5V
+5V
H
I615
D9
IRESET_DIG
GNDD
100n
10
GNDD
100n
9
GNDD
8
GNDD
GNDD
GNDD
GNDD
7
IOn
3628
430R
3627
47p
2627
47p
1%
GNDD
GNDD
2626
3626
430R
1%
1K
1%
3624
430R
3622
47p
2622
47p
2621
3621
430R
1%
7625
BC847B
15u
8-D13 ANA_WE
1K
7620
BC847B
15u
I
I625
5625
I626
5620
I648
BE_FAN
H2
GNDD
4605
I616
6
I617
5
I619
4
I620
3
FB
2
GNDD
1
-5V_Buffer
-5V_Buffer
1
2
3
GNDD
4
5
6
7
8
G
1601
2634
+5V_Buffer
F
2
-5V_Buffer
4u7
-5V_Buffer
E
3
I614
I631
5607
2620
6
I610
GNDD
GNDD
H
7
4u7
1K
3618
430R
3617
47p
2617
47p
2616
3616
GNDD
+5V_Buffer
4u7
GNDD
1%
+5V
1K
1%
1%
3613
1%
430R
3612
2612
47p
2611
3611
430R
47p
15u
G
I629
5606
7615
BC847B
15u
7610
BC847B
430R
I624
5610
8
I608
I623
5615
ANALOG BOARD
INTERFACE CONTROL
GNDD
C
{V_IN,U_IN,Y_IN,C_IN,CVBS_Y_IN}
GNDD
GNDD
15u
E
5
I613
2
100n
I621
6
I611
B
GNDD GNDD
100n
2600
7
+5V
C8
+5V
+5V
+3V3
A
1
2605
+5V_Buffer
22p
2604
2603
3
+5V_Buffer
GNDD
I627
5
2
22p
2641
GNDD
MUTEN
OPTION
2619
OPTION
I658
GNDD
22p
2642
100n
22p
2643
2637
2644
3633
560R
I657
8
I609
22R
C
D
10
I640
100R
I647
15
I637
100R
2633
B
2628
17
I635
3641
GNDD
3642
I656
19
I603
OPTION
180R
12
AUDIO ENCODER
DATA STREAM BUS
100n
I651
11
ANALOG BOARD INTERFACE AUDIO IN / OUT
3
ANALOG BOARD INTERFACE VIDEO IN / OUT
2
75R
1
9
10
11
FMN 1600
CL 16532095_006.eps
070801
12
I
1600 I12
1601 H12
1602 D12
2600 E3
2601 E2
2602 E2
2603 D10
2604 C10
2605 D7
2606 E5
2607 E6
2608 A3
2609 A3
2610 F3
2611 G2
2612 G2
2613 A6
2614 B6
2615 F7
2616 G5
2617 G6
2618 A6
2619 C6
2620 H3
2621 I2
2622 I2
2625 H7
2626 I5
2627 I6
2628 B3
2629 A3
2630 G8
2633 B6
2634 H8
2637 C6
2641 C10
2642 C10
2643 C10
2644 C9
3601 E2
3602 E3
3603 E3
3604 C9
3605 A6
3606 E5
3607 E6
3608 E6
3609 A6
3610 C6
3611 G2
3612 G3
3613 G3
3614 C6
3616 G5
3617 G6
3618 G6
3619 D10
3621 I2
3622 I3
3624 I3
3626 I5
3627 I6
3628 I6
3629 A4
3630 B4
3631 B6
3632 A3
3633 C3
3634 B6
3641 A9
3642 B9
3643 B9
3644 B9
4605 I11
5600 E2
5601 D9
5605 E5
5606 G8
5607 H8
5610 G2
5615 G5
5620 I2
5625 I5
7600 E3
7601 D9
7606 E6
7610 G3
7615 G6
7620 I3
7625 I6
I600 D11
I601 E11
I602 E11
I603 A11
I604 E11
I605 F11
I606 F11
I607 F11
I608 G11
I609 C11
I610 G11
I611 C11
I612 G11
I613 C11
I614 G11
I615 H11
I616 I11
I617 I11
I619 I11
I620 I11
I621 E2
I622 E6
I623 G6
I624 G2
I625 I6
I626 I2
I627 C10
I629 G9
I631 H9
I635 A11
I637 B11
I638 B11
I639 B11
I640 B11
I641 C11
I645 A3
I647 B3
I648 I11
I649 A5
I650 A5
I651 A3
I652 A3
I653 A3
I654 B5
I655 B5
I656 B3
I657 C5
I658 C5
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
143
Digital Board: Audio Encoder DSP & Buffer Memory
1
2
3
4
5
6
7
8
9
10
11
12
13
14
DSP_A(14)
2710
DSP_A(15)
100n
93
94
97
98
2711
12 I703
3711 10K
I719
135
28
3712 10K
I720
134
I2C BUS
I704
B6
44
RESETn_DSP
I
DSP_A(8)
30
DSP_A(12)
31
I706
32
I|O4
22
DSP_D(20)
A7
I|O3
11
DSP_D(19)
A8
I|O2
A9
I|O1 7
DSP_D(17)
6
DSP_D(16)
A10 I|O0
10K
I727
I701
I700
3700
I709
I708
I707
7 3719-B 2
33R
8 3719-A 1
33R
MODD|IRQD_
BB_
BG_
TA_
BR_
WR_
RD_
CAS_
AA3|RAS3_
DE_
TRST_
TMS
TDI
TDO
TCK
PCAP
EXTAL
CLKOUT
RESET_
SCK|SCL
Serial
Host
Interface
(SHI)
MISO|SDA
MOSI|HA0
SS_|HA2
54
90
SDO4|SDI1|PC7
SDO3|SDI2|PC8
127 75
81
87
96
PORT D
Digital Audio
Transmitter
(DAX)
PORT A
External Data Bus
POWER INPUT (GND)
19
SDO5|SDI0|PC6
SDO2|SDI3|PC9
HREQ_
48
FST|PC4
HCKT|PC5
104 112 120 130 58
66
39
9
SDO1|PC10
SDO0|PC11
ACI|PD0
ADO|PD1
26
100 101 102 105 106 107 108 109 110 113 114 115 116 117 118 121 122 123 124 125 128 131 132 133
TIO0
SYSTEM DATA Bus
42
41
40
37
D
36
35
34
33
SYSTEM ADDRESS Bus
32
Vdsp
31
3-H1
22
EMI_RWn
21
EMI_OEn
30
AE_CSn 1-E11
F3
24
AE_IRQn
3713
I716
23
Vdsp
4K7
+3V2
15
13
AUDIO ENCODER
DATA STREAM BUS
17
14
12
3724
16
3725
33R
11
10
7
6
G
5
GNDD
4
OPTION
28
4703
27
29
I725
60
VIP_FID
4704
VIP_VS 4-B9, 5-E13
H
Extremely short
GNDD
GNDD
GNDD
GNDD
GNDD
GNDD GNDD
GNDD
A12
SRAM_DATA
A13
F
33R
DSP_D(18)
A11
DSP_D(23:0)
A14
A15
I
A16
GND
9 25
SRAM
GNDD
1
E
4K7
33R
33R
53719-D 4
63719-C 3
Vdsp
I710
VCCH
VCCS2
VCCS1
VCCC2
VCCC1
PORT C
Enchanced
Serial
Audio
Interface
(ESAI)
Interupt /
Mode Control
MODC|IRQC_
47
10
VCCD4
SCKT|PC3
43
DSP_D(23)
29
A6
3
MODA|IRQA_
DSP_D(22)
21
DSP_A(4)
A5
DSP_D(21)
HCKR|PC2
DSP_D(21)
DSP_A(0)
DSP_D(22)
I|O5 23
FSR|PC1
A17
DSP_D(20)
20
26
2
A16
DSP_D(19)
DSP_A(3)
I|O6
3706
SCKR|PC0
DSP_D(18)
19
A4
Vdsp
A15
DSP_D(17)
DSP_A(7)
DSP_D(23)
HA2|HA9|PB10
HACK|HRRQ|PB15
DSP_D(16)
18
27
HA1|HA8|PB9
HOREQ|HTRQ|PB14
DSP_D(15)
17
DSP_A(11)
I|O7
H7|HAD7|PB7
HA0|HAS|PB8
A14
DSP_D(14)
DSP_A(15)
A3
H4|HAD4|PB4
A13
DSP_D(13)
16
10K
I724
Vdsp
A2
H3|HAD3|PB3
HCS|HA10|PB13
DSP_D(12)
DSP_A(14)
143
H0|HAD0|PB0
HDS|HWR|PB12
MODB|IRQB_
C
64
HRW|HRD|PB11
DSP_D(11)
15
I723
71
A12
DSP_D(10)
DSP_A(10)
10K
63
A11
DSP_D(9)
DSP_A(6)
14
3705
A1
A10
D8
13
144
PORT A
External Address Bus
A9
DSP_D(8)
DSP_A(2)
1
I722
62
External
Bus Control
A8
D7
4
I721
100R
67
H6|HAD6|PB6
D6
DSP_A(1)
100R
68
PORT B
Host
Interface
(HDIO8)
Port
DSP_D(7)
3
3707
3708
52
H1|HAD1|PB1
A7
DSP_D(6)
DSP_A(5)
SCL
SDA
50
A6
DSP_D(0)
H
2
DSP_A(9)
A0
51
A5
GNDP
G
DSP_A(15:0)
{SCL,SDA}
1
DSP_A(13)
69
H5|HAD5|PB5
D5
OE_
136
70
A4
D4
CE_ WE_
I718
137
A3
DSP_D(5)
5
3710 10K
I717
141 140 139 142 138 53
Clock and PLL JTAG /
OnCE Port
POWER INPUT (VCC)
DSP_D(4)
I702
Vdsp
GNDD
8 24
VCC
3709 10K
61
H2|HAD2|PB2
A2
D3
F
99
1u
46
A1
DSP_D(3)
7702
CY7C1019BV33-10VC
59
3714
92
55
10K
DSP_A(13)
89
38
GNDD
Vdsp
1K
Vdsp
DSP_A(12)
10K
3704
DSP_A(11)
3718
3715
E
88
I714
NC
DSP_A(10)
85
10K
D23
GNDD
GNDD
84
10K
3717
I713
D22
DSP_A(9)
83
3716
I712
D21
DSP_A(8)
82
25
D20
GND
9 25
DSP_A(7)
8
D19
DSP_A(6)
GNDD
D18
SRAM
A16
65
D2
GND
9 25
A15
79
103 111 119 129 57
D17
32
A16
DSP_A(5)
78
86
D16
31
DSP_A(4)
A14
77
80
AA2|RAS2_
A15
DSP_A(12)
A13
76
126 74
AA1|RAS1_
30
DSP_A(3)
73
A0
91
D15
DSP_A(8)
DSP_A(2)
A12
72
56
D14
A14
DSP_A(1)
5 3723-D 4
33R
5 3720-D 4
33R
3720-C
6
3
33R
7 3720-B 2
33R
8 3720-A 1
33R
5 3721-D 4
33R
6 3721-C 3
33R
3721-B
7
2
33R
8 3721-A 1
33R
8 3722-A 1
33R
7 3722-B 2
33R
6 3722-C 3
33R
5 3722-D 4
33R
3723-C
6
3
33R
7 3723-B 2
33R
8 3723-A 1
33R
18
AA0|RAS0_
29
A11
DSP_A(0)
Vdsp
B
D13
DSP_A(4)
DSP_D(8)
95
D12
A13
DSP_D(9)
6
49
D11
21
I|O1 7
A10 I|O0
20
D10
20
DSP_A(0)
A9
45
D9
DSP_A(3)
A12
I|O2
10K
+3V2
PINIT|NMI_
A11
A8
470n
GNDD 7703
DSP56362
VCCD3
19
10
DSP_D(10)
VCCD2
18
DSP_A(7)
DSP_D(11)
VCCA3
DSP_A(11)
DSP_D(12)
11
VCCD1
DSP_D(0)
22
VCCA2
DSP_D(1)
6
I|O3
VCCA1
I|O1 7
A10 I|O0
17
I|O4
A7
3702
1u
2705
2701
D1
SRAM
A9
DSP_A(15)
A6
GNDD
2704 4u7
DSP_D(2)
32
I|O2
16
8MHz
D0
31
A8
15
DSP_A(14)
I|O5
Vdsp
GNDD
DSP_D(1)
DSP_A(12)
10
DSP_D(2)
DSP_A(10)
A5
+3V2
AUDIO ENCODER
GNDS2
30
DSP_D(3)
23
DSP_D(13)
GNDS1
DSP_A(8)
DSP_D(4)
11
DSP_D(14)
GNDH
29
22
DSP_D(15)
26
GNDC2
DSP_A(4)
I|O3
27
I|O6
GNDC1
21
I|O4
A7
I|O7
A4
GNDD4
20
DSP_A(0)
A6
DSP_A(6)
14
A3
GNDD3
DSP_A(3)
I|O5
13
GNDD2
19
A5
4
DSP_A(2)
2K2
3
2
VCCQL4
18
DSP_A(7)
23
DSP_D(5)
DSP_A(1)
OUT
GND
VCCQL3
DSP_A(11)
DSP_D(6)
10K
GNDD
GNDD1
17
DSP_D(7)
26
2702 100n
2703 100n
GNDA4
DSP_A(15)
27
I|O6
10n
VCCQL2
16
I|O7
A4
2700
A2
GNDA3
15
DSP_A(14)
A3
A1
VCCQL1
DSP_A(10)
3
VCCQH3
DSP_A(6)
14
DSP_A(5)
GNDA2
13
A2
A0
GNDA1
4
DSP_A(2)
A1
2
VCCQH2
DSP_A(1)
1
DSP_A(9)
VCCQH1
3
DSP_A(13)
7704
FXO-31FL 4
VDD
1
TS
OSC
2713 100n
GNDQ4
DSP_A(5)
A0
+3V3
2712 100n
I711
2
3701
3703
Vdsp
5701
+3V2
GNDQ3
D
1
DSP_A(9)
28
I705
VCCP
C
DSP_A(13)
OE_
+3V3 Vdsp
GNDQ2
B
28
12
GNDQ1
OE_
CE_ WE_
GNDD
DSP_A(15:0)
CE_ WE_
5
12
DSP_D(23:0)
5
1u
7701
CY7C1019BV33-10VC 8 24
VCC
GNDD
GNDP1
1u
7700
CY7C1019BV33-10VC 8 24
VCC
A
I726
5700
100n
2709
100n
2707
SRAM_CTRL
JTAG_CHAIN2
100MHZ
2708
SRAM_ADDRESS
2706
DSP_D(23:0)
A
Vdsp
Vdsp
AUDIO ENCODER DSP & BUFFER MEMORY
2
CL 16532095_007.eps
070801
3
4
5
6
7
8
9
10
11
12
13
14
2700 B6
2701 C6
2702 B7
2703 B7
2704 C7
2705 C7
2706 A2
2707 A2
2708 A4
2709 A4
2710 F2
2711 F2
2712 B7
2713 B7
3700 B10
3701 B11
3702 B11
3703 B11
3704 G13
3705 G5
3706 G5
3707 G5
3708 G5
3709 F5
3710 F5
3711 F5
3712 F5
3713 E14
3714 E14
3715 H13
3716 C13
3717 C13
3718 C13
3719-A C12
3719-B C12
3719-C C11
3719-D C11
3720-A D6
3720-B D6
3720-C D6
3720-D D6
3721-A E6
3721-B D6
3721-C D6
3721-D D6
3722-A E6
3722-B E6
3722-C E6
3722-D E6
3723-A F6
3723-B E6
3723-C E6
3723-D C6
3724 F13
3725 F13
4703 G14
4704 H14
5700 B7
5701 B7
7700 A1
7701 A4
7702 F2
7703 C6
7704 B9
I700 B10
I701 B10
I702 F1
I703 F2
I704 G2
I705 B7
I706 I1
I707 B10
I708 B10
I709 B11
I710 C9
I711 C7
I712 C12
I713 C12
I714 C12
I716 E13
I717 F6
I718 F6
I719 F6
I720 F6
I721 G6
I722 G6
I723 G6
I724 G6
I725 H13
I726 A9
I727 B11
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
144
Digital Board: System Clock Generation, Reset, Power Supply I/O Expanders & Service Connection
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SYSTEM CLOCK GENERATION, RESET, POWER SUPPLY I/O EXPANDERS & SERVICE CONNECTION
100n 2806
7
8
RESETn_DSP
G5
I806
10
( not used )
ADC_ENABLEN
7
P4 PORTS
BIT 8
3911
100R
SCL
GNDD
7916-B
74LVC125A
C5
6
4919
RESETn_VIP
11
6
120R
3
5
P2
6 I919
H5
7
BE_LOADN
9
LOAD_DVN
POWER-ON
RESET
P6 11
8 VSS
4918
RESETn_5505
GNDD
GNDD
8
I920
I921
GNDD
I922
PCB Version control
9
GNDD
10
7
GNDD
GNDD
I822
G
5803
VDD5_OSC
GNDD
5602
+5V
+5V
I818
3807
I12
SYSCLK_5505
3
4
82R
7802
4 FXO-31FT
3806
22R
7
3
OSC
7602-A
74HCT14D
TS
I630
2
GNDD
GNDD
6
14
VCC3_CLK_BUF
1
+3V3
7
GNDD
Hole 4.0 mm with Cu
0001
1903
1904
1905
10
+3V3
GNDD
7602-B
74HCT14D
13
I646
3
14
11
12
7
100MHZ
4u7 2807
I
2
82R
5807
100n 2808
27M_CLK_PS
I825
14
I820
3819
C13
14
7801-A
74LVC04A
7602-F
74HCT14D
GNDD
GNDD
GNDD
3654
2809
7602-D
74HCT14D
GNDD
+5V
7
100R
-5V_Buffer
GNDD
GNDD
1
2
GNDD
GNDD
3
4
GNDD
I
3656 F604
3655
10K
3657
6
6K8
100K
GNDD
GNDD
2648
1n5
I636
9
GNDD
CL 16532095_008.eps
070801
GNDD
4
5
6
7
8
9
10
11
12
H
F603
100n
14
8
3
6K8
GNDD
I634
100K
GNDD
1906
3652
GNDD
7
3653
10K
100K
4
7
GNDD
3651 F602
3650
-5V_Buffer
14
1
1n5
I632
5
7
7602-E
74HCT14D
VCC3_CLK_BUF
2647
7602-C
74HCT14D
GNDD
I821
G
GNDD
F601
100R
7
2
H
3649
1
GND
GNDD
7
5
14
1
VDD
OUT
+5V
F600
2
4u7 2803
7801-B
74LVC04A
100n 2804
+5V
VCC3_CLK_BUF
1603-7
PH-S
I628
100MHZ
{SERVICES,TX1P,RX1P,RTS1P,CTS1P}
100MHZ
14
F
7
5
I819
E
P7 12
7916-C
74LVC125A
C6
G3
+5V
OPTION
2801
GNDD
P1
( not used )
P5 10
14
14
I816
16 VDD
ANA_WE
L3_STROBE
2
I C BUS
CONTROL
INPUT
FILTER
P3
SHIFT 8 BIT I/O
P4
REGISTER
PORTS
+5V
100n
RESETn_5505
15 SDA
D
I10
4
GNDD
7801-C
74LVC04A
3803
+3V3
4
VCC3_CLK_BUF
I817
4917
14 SCL
7
GNDD
SYSCLK_VSM
5
3901
100R
47K
4
OPTION
I915 3929
2
14
7
F
IN
NC
P0
100R
+3V2
RESET_
LP FILTER
3902
SDA
1
INTERRUPT
LOGIC
SERVICE CONNECTOR
3818
5
VCC3_RST_BUF
VCC3_CLK_BUF
22R
C4
7913
MC33464N
GNDD
22R
GNDD
C
4K7
GNDD
I815
2 A1
I904
5
7
7
GNDD
3 A2
IRESET_DIG
6
2
1 A0
10K
H10
1
7801-E
74LVC04A
14
I826
10
100n
OPTION
3
4920
RESETn_VSM
7918-B
74LCV08AD
4
OPTION
12
GNDD
12
+3V3
47K
14
3900
+5V
+5V
7
14
2925
100n
7916-A
74LVC125A
14
13
I908
100n
7900
PCF8574T
13 INT_
GNDD
2901
100n
10K
GNDD
3913
100MHZ
2802
GNDD
C4
+3V3
2K2
+3V3
3928
8
7
2900 100n
13
+3V3
GNDD
E
GNDD
-5V
B
11
7918-D
74LCV08AD
12
7
5802
3801
10
2924
+5V
11
RESETn_BE
14
7801-F
74LVC04A
SDA
9
+3V3
4K7
3905
14
H2
VCC3_CLK_BUF
100MHZ
ION
GNDD GNDD
7801-D
74LVC04A
GNDD
SCL
I906
C11
VCC3_CLK_BUF
D
8
100n
5901
BLM31
+5V
I917
VSS 8
OPTION
9
GNDD
100R
VDD 16
POWER-ON
RESET
12 P7
4800
SCL 14
SDA 15
SHIFT
REGISTER
I912 10 P5
MUTEN
C
I/O
7
GNDD
3912
I914 11 P6
GNDD
INPUT
FILTER
6
+3V3
2923
47K
3908
GNDD
2
BUS C I
CONTROL
P3
I911 9
GNDD
GNDD
I827
P2
+5V
4K7
3904
3815
2K2
47K
I913
P1
6
I905
I907
3903
3
1
7918-C
74LCV08AD
9
I910 5
5
100n
OPTION
GND
CRYSTAL
X2 8
OSC
14
( not used )
Centre_on_stereo
4
+3V3
+12V
A2 3
P0
A
I903 3
100n
GNDD
1900
PH-B
I902 2
+3V3
2922
A1 2
I901 1
47K
3907
BUFFER
3
7803
BC847B
2
4
A0 1
INTERRUPT
LOGIC
LP FILTER
100MHZ
2921
GNDD
3906
B
X1 1
4 27M OUTPUT
3817
I805
7
GNDD
I804
S1 6
3816
75R
E11
CLK SYNTHESIS
CTRL CIRC. AND
BUFFER
F3
GNDD
INT_ 13
S0 7
PLL
5 CLK OUTPUT
2
100K
acc_aclk_pll
I802
3
RESETN_DVIO
I918
7917
PCF8574T
GNDD
VDD
3802
10K
7800
MK2703S
2
I803
3800
100n
GNDD
4u7 2805
100MHZ
+5V
2800
7918-A
74LCV08AD
1
{SCL,SDA}
14
100n
GNDD
+3V3
BLM31 5900
+3V3
100n
+5V
4921
5805
2903
100n
I823
VDD5_MK2703
I2C BUS
GNDD
2902
A
+3V3
POWER SUPPLY
5801
100MHZ
2904
13
14
0001 I1
1603-7 G14
1900 A14
1903 I2
1904 I3
1905 I3
1906 I3
2647 H14
2648 I14
2800 A2
2801 E9
2802 D6
2803 G6
2804 G5
2805 A5
2806 A5
2807 I6
2808 I5
2809 I12
2900 D10
2901 E10
2902 C11
2903 A11
2904 A6
2921 A13
2922 A13
2923 B13
2924 B13
2925 B13
3649 G13
3650 H13
3651 H13
3652 H14
3653 I11
3654 H13
3655 I13
3656 I13
3657 I14
3800 A4
3801 E3
3802 B1
3803 F2
3806 H4
3807 H2
3815 A4
3816 B4
3817 B4
3818 E3
3819 I2
3900 D11
3901 D11
3902 E11
3903 E13
3904 E14
3905 E14
3906 F13
3907 F14
3908 F14
3911 B11
3912 B11
3913 D8
3928 D8
3929 E9
4800 C5
4917 E8
4918 F6
4919 E6
4920 D6
4921 A11
5602 G13
5801 A7
5802 D6
5803 G6
5805 A5
5807 I6
5900 A13
5901 B13
7602-A G10
7602-B H11
7602-C H12
7602-D I12
7602-E H9
7602-F H10
7800 A3
7801-A H4
7801-B G4
7801-C F4
7801-D D1
7801-E E3
7801-F E1
7802 G5
7803 B4
7900 D11
7913 E9
7916-A D7
7916-B E7
7916-C F7
7917 A10
7918-A A7
7918-B D8
7918-C B7
7918-D C7
F600 G13
F601 G13
F602 H13
F603 H13
F604 I13
I628 G13
I630 G12
I632 H12
I634 H12
I636 I12
I646 H11
I802 B2
I803 B1
I804 B4
I805 B2
I806 B4
I815 E3
I816 F3
I817 F2
I818 G3
I819 G2
I820 I3
I821 I2
I822 G5
I823 A5
I825 H5
I826 E3
I827 C3
I901 A14
I902 A14
I903 A14
I904 D8
I905 A14
I906 B14
I907 A13
I908 B14
I910 B8
I911 B8
I912 B8
I913 B6
I914 B8
I915 E9
I917 B11
I918 A11
I919 D13
I920 E13
I921 F13
I922 F13
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
145
Layout Digital Board (Overview Top View)
PART 3
CL 16532095_45c.eps
PART 1
CL 16532095_45a.eps
PART 2
CL 16532095_45b.eps
PART 4
CL 16532095_45d.eps
CL 165320956_045.eps
090801
1100
1101
1200
1501
1600
1601
1602
1603
1900
2100
2101
2102
2103
2106
2107
2108
2109
2110
2111
2112
2113
2114
2119
2127
2128
2200
2201
2202
2203
2204
2205
2207
2208
2211
2212
2213
2215
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2229
2230
2231
2232
2233
2234
2235
2236
2237
2238
2239
2240
2241
2300
2305
2306
2307
2320
2321
2322
2323
2400
2401
2402
2403
2406
2412
2416
2417
2418
2419
2425
2426
2562
2563
2564
2565
2566
2567
2568
2569
2580
2587
2588
2594
2596
A4
A3
C5
C2
A1
A1
C1
A1
A3
B4
B4
B4
B4
A3
A3
A3
A3
A3
B3
B3
B3
B3
B3
A3
A4
C5
C5
B1
C5
B4
B4
B5
B5
B4
B4
B5
B5
B5
B5
A5
A5
A5
A4
A4
A4
A4
B4
B4
B4
B5
B5
B5
B5
B5
C5
C5
C5
C5
C5
C5
C5
C5
A4
A4
A4
A4
A4
A5
A5
A5
A3
A3
A3
A3
A2
A3
B2
B2
B1
A1
B2
A2
C1
B1
C1
B1
C1
B1
C2
B2
C1
C1
C1
C1
B2
2600
2601
2602
2603
2604
2608
2609
2610
2611
2612
2613
2614
2615
2616
2617
2618
2619
2620
2621
2622
2628
2629
2630
2633
2634
2637
2641
2642
2643
2644
2645
2646
2647
2648
2700
2702
2703
2704
2705
2706
2707
2708
2709
2710
2711
2712
2801
2802
2803
2804
2805
2806
2807
2808
2813
2814
2818
2819
2821
2906
2907
2908
2909
2910
2911
2912
2913
2914
2915
2916
2917
2918
2919
2920
2924
3100
3101
3102
3104
3105
3106
3107
3111
3112
3113
3114
3115
3116
3117
3118
3119
3124
3125
3126
3201
A1
A1
A1
B1
C1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
C1
C1
C1
C1
A1
A1
A2
A1
B4
B4
C4
C5
C5
C4
C4
C3
C3
C2
C2
C4
C4
A3
A3
A3
C4
B3
A3
A3
C4
B4
B3
B4
B4
A4
A4
A4
A4
A3
A3
A3
A3
A3
A3
A3
A3
A3
A3
A3
A2
B4
B2
B4
B3
B3
B3
B3
B3
B3
B3
B3
B3
B3
B4
A3
A4
A3
B3
A3
A3
3202
3203
3204
3205
3206
3207
3208
3209
3210
3216
3217
3218
3236
3237
3238
3239
3241
3242
3243
3250
3251
3252
3253
3254
3263
3264
3266
3274
3400
3401
3402
3403
3404
3406
3407
3408
3409
3410
3552
3553
3559
3560
3562
3601
3602
3603
3604
3605
3609
3610
3611
3612
3613
3614
3617
3618
3619
3621
3622
3624
3629
3630
3631
3632
3633
3634
3641
3642
3643
3644
3645
3646
3647
3648
3701
3705
3707
3708
3709
3710
3711
3712
3720
3721
3723
3804
3805
3809
3810
3811
3812
3814
3820
3914
3915
B1
B1
B1
B1
B1
A4
A3
B4
B5
B5
B4
B4
B4
B4
B5
B4
B4
B4
B4
A4
B4
B4
B4
A4
B4
B4
B5
A4
B2
B2
B2
B2
B2
B1
A2
A1
A1
A1
C1
C1
C1
C1
C2
A1
A1
A1
B1
A1
A1
A1
A1
A1
A1
A1
A1
A1
B1
A1
A1
A1
A1
A1
A1
A1
A1
A1
C1
C1
C1
C1
A1
A1
A1
A1
C4
C4
C4
C4
C4
C4
C4
C4
C4
C4
C4
B4
B4
B4
B4
B4
B4
B4
B4
A4
A4
3916
3917
3918
3919
3920
3921
3922
3923
3924
3925
3926
3927
3929
4101
4102
4103
4104
4200
4201
4202
4203
4206
4212
4214
4403
4404
4405
4605
4917
4918
5100
5101
5102
5200
5201
5202
5300
5301
5302
5400
5402
5404
5550
5552
5553
5554
5555
5556
5557
5558
5559
5560
5600
5601
5602
5606
5607
5610
5615
5620
5701
5802
5803
5805
5807
5813
7100
7102
7200
7202
7302
7304
7400
7401
7402
7410
7551
7552
7553
7554
7600
7601
7610
7615
7620
7644
7700
7701
7702
7703
7704
7806
7901
A4
A4
A3
A3
A3
A3
A3
A3
A3
A3
A3
A3
C4
A3
A3
A3
A3
B1
B1
B1
B4
B4
C5
C5
B1
B1
B2
A3
B5
A4
B3
A3
A4
C5
B5
B5
A4
A5
A5
A3
B2
A2
C2
B1
B1
B1
B2
C1
C1
C1
B2
C1
A1
B1
A1
A1
A1
A1
A1
A1
C5
A3
A3
B4
A3
C4
B3
A4
B1
B4
A5
A4
A3
A2
A2
A2
C1
C2
C1
C1
A1
B1
A1
A1
A1
A1
C3
C3
C2
C4
C5
B4
A3
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7.
146
Layout Digital Board (Part 1 Top View)
CL 16532095_45a.eps
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7.
147
Layout Digital Board (Part 2 Top View)
CL 16532095_45b.eps
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7.
148
Layout Digital Board (Part 3 Top View)
CL 16532095_45c.eps
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7.
149
Layout Digital Board (Part 4 Top View)
CL 16532095_45d.eps
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7.
150
Layout Digital Board (Testlands Bottom View)
EMI_PROCCLK
+3V3
+3V3 Resetn_5505
SYSCLK_5505
+3V3
Resetn_BE
27M_CLK_PS
SYSCLK_VSM
+5V
Resetn_VSM
+3V3
+5V
+3V3
-5V
-5V
+5V
+3V3
+3V3
+3V3
+3V3
+3V3
VSM_M_
CLKOUT
+3V3
VIP_VS
VIP_ICLK
5505_odd_even
+3V3
+12V
+3V3
+5V
5505_HS
5505_VS_PS
+3V3
+3V3
+3V3
+3V3
DSP_CLK
+3V3
+3V3
AOUT
AE_DATAO
+5V
+3V3 Resetn_DSP
ACC_ACLK_PLL
+5V
VIP_FID
Resetn_DVIO
+3V3
VE_DSn
VE_DTACKn
+3V3
+3V3
24M576_OUT
AD_CLK
+3V3
+3V3
CL 16532095_041.eps
160801
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7.
151
Layout Digital Board (Mapping Testlands )
CL 16532095_41m.eps
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7.
152
Layout Digital Board (Overview Bottom View)
Part 1
CL 16532095_44a.eps
Part 3
CL 16532095_44c.eps
Part 2
CL 16532095_44b.eps
Part 4
CL 16532095_44d.eps
CL16532095_044.eps
090801
2104
2105
2115
2116
2117
2118
2120
2121
2122
2123
2124
2125
2126
2129
2209
2210
2214
2228
2301
2302
2303
2304
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319
2404
2405
2407
2408
2409
2410
2411
2413
2414
2415
2420
2421
2422
2423
2424
2550
2551
2552
2553
2554
2555
2556
2557
2558
2559
2560
2561
2570
2571
2572
2573
2574
2575
2576
2577
2578
2579
2581
2582
2583
2584
2585
2586
2589
2590
2591
2592
2593
2595
2605
2606
2607
2625
2626
2627
2701
2713
2800
2809
2900
2901
2902
A2
A3
B3
B3
B3
B3
B3
B3
B3
B3
A3
B3
B3
A3
B1
B1
B1
B1
A2
A2
A2
A2
A2
A2
A2
B2
A2
A2
A1
A1
A1
B1
A1
A1
A4
A4
A4
A4
A4
A4
A4
B4
B4
B4
A4
A4
A4
A4
A4
C5
C5
C5
C4
C4
C4
C4
C4
C4
C4
C4
C5
C4
C5
C5
C4
C5
C4
C4
C4
C3
C5
C5
C4
C5
C4
C4
C5
C5
C5
C4
C4
C5
C4
A5
A5
A5
A5
A5
A5
C2
C2
B3
A5
B2
B2
B2
2903
2904
2921
2922
2923
2925
3103
3108
3109
3110
3120
3121
3122
3123
3200
3211
3212
3213
3214
3215
3221
3240
3267
3269
3270
3272
3273
3304
3305
3405
3554
3555
3556
3557
3558
3561
3563
3606
3607
3608
3616
3626
3627
3628
3649
3650
3651
3652
3653
3654
3655
3656
3657
3700
3702
3703
3704
3706
3713
3714
3715
3716
3717
3718
3719
3722
3724
3725
3800
3801
3802
3803
3806
3807
3815
3816
3817
3818
3819
3900
3901
3902
3903
3904
3905
3906
3907
3908
3911
3912
3913
3928
4100
4209
4210
4211
C2
C2
A4
A4
A4
A4
A3
B3
B3
B3
A3
B2
B2
A3
B1
B2
B1
B1
B1
B1
B2
A2
B1
B1
B1
B1
B1
A2
A1
B4
C5
C4
C5
C5
C5
C5
C4
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
C2
C2
C2
C2
C2
C2
C2
C2
C2
C2
C2
C2
C2
C3
C3
B3
A3
B3
A3
A3
A2
B3
B3
B3
A3
A3
B2
B2
B2
B2
B2
B2
B2
B2
B2
B2
B2
C2
C2
A3
B2
B2
B2
4213
4406
4407
4552
4554
4555
4703
4704
4800
4919
4920
4921
5103
5605
5625
5700
5801
5900
5901
7101
7103
7300
7301
7305
7306
7307
7403
7602
7606
7625
7800
7801
7802
7803
7900
7913
7916
7917
7918
B1
B4
B4
C5
C5
C5
B4
B4
B2
A3
A3
C2
A3
A5
A5
C2
C2
A3
A4
B3
A3
A2
A2
A1
A2
A1
A4
A5
A5
A5
B3
A3
A3
B2
B2
C2
A3
B2
C2
Electrical Diagrams And Print-Layouts DVDR1000 /0x1 /691
7.
153
Layout Digital Board (Part 1 Bottom View)
CL 16532059_44a.eps
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7.
154
Layout Digital Board (Part 2 Bottom View)
CL 16532059_44b.eps
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7.
155
Layout Digital Board (Part 3 Bottom View)
CL 16532059_44c.eps
090801
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7.
156
Layout Digital Board (Part 4 Bottom View)
CL 16532059_44d.eps
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Alignments DVDR1000 /0x1 /691
8.
GB 157
8. Alignments
ADJUSTMENT INSTRUCTIONS ANALOGUE BOARD
Test equipment:
2 HF - AGC adjustment [3707]:
1. Dual-trace oscilloscope
Voltage range
: 0.001 ~ 50 V/div
Frequency
: DC ~ 50 MHz
Probe
: 10:1, 1:1
Service tasks after replacement of IC 7703:
Purpose: Set amplifier control.
Symptom, if incorrectly set:
Picture jitter if input level is too low and picture distortion
if input level is too high.
2. DVM (Digital voltmeter)
3. Frequency counter
TP
4. Sinus generator
Sinus
: 0 ~ 50 MHz
Tuner
1705
Pin 11
(F700,
IF-out)
5. Test pattern generator
How to read the adjustment procedures:
DVDR mode:
Example using:
DVDR TUNER
Connecting point
(Test Point) of
measuring
equipment
TP
ADJ.
MODE
Pin 2 of
Con.1911
(FMRV)
R3054
TUNER
DISC
MEAS.EQ.
FrequencyCounter
Disc
R3707
DISC
INPUT
INPUT
Set tuned to
channel 27
4,5mV(74dBµV)
on aerial input
PAL white picture,
audio IF on,
no modulation
MEAS.EQ.
SPEC.
Oscilloscope
Video Pattern
Generator
550mVpp +/-50mV
(use a 10:1 probe )
Service tasks after replacement of coil 5702:
Purpose: To attenuate the band I carrier rests.
Symptom, if incorrectly set:
Bad picture quality when the filter attenuates the picture
carrier (38.9MHz).
TP
ADJ.
MODE
INPUT
SPEC.
3,800MHz
±10kHz
OFW
1700
Pin 1
(F704)
L5702
DISC
Measuring
equipment
Disc needed for
adjustment
MODE
3 Attenuating the 40.4 MHz [5702]:
(SECAM only)
Test signal
required for the
adjustment and
feed-in point
Adjustment
component
ADJ.
Adjustment
Specification
TUNER
40.4 MHz, 300mVrms
at Tuner 1705, Pin 11
(F700, IF-out)
MEAS.EQ.
SPEC.
Oscilloscope,
Sinus Generator,
Counter
adjust minimum
amplitude
Front End (FV)
Service tasks after replacement of IC 7703, coil L5702 and L5703:
If the adjustment is correct the signal at pin 1 of OFW [1700] must be
smaller than the input signal amplitude by at least 5 dB.
1 AFC Adjustment:
Purpose: Correct adjustment of demodulator AFC - circuit
Symptom, if incorrectly set:
Bad or disturbed TV channel reception.
PAL - AFC adjustment [5703]:
TP
IC 7703
Pin 17
(I976)
ADJ.
L5703
DISC
MODE
INPUT
TUNER
38,9MHz 500mVpp
at Tuner 1705, Pin 11
(F700, IF-out)
MEAS.EQ.
SPEC.
DC Voltmeter
Frequ. Generator
2,5V ±0,2V
CL 16532095_110.eps
150801
GB 158
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
9. Circuit-, IC Descriptions and List of Abbreviations
9.1
Multi-Mode SOPS 50PS203
9.1.1
Why Multi-Mode SOPS?
Using ordinary SOPS results in a decrease of the efficiency
at low output loads due to the increase of the switching
frequency.
The Multi-Mode SOPS will reduce the switching frequency at
low loads but still preserves valley switching.
9.1.2
Block Diagram
Rectifier
Lightning
Protection
Vi
6200
5131
33Vstby
EMI
FILTER
MAINS
4
6201
6211
2260
6210
2125
+12Vstby
6215
+ Vb
Overvoltage
protection
Overload
protection
7142
7141
2140
+12Vreg
2
6140
7125
Power
switch
3141
2141
+3V9
2214
6221
FLYB
2146
feed forward
7140
2211
2210
7220
6220
7143
-5Nstby
2220
Rsense
Control
-Vreg
2222
6230
6142
-Vgnstby
2220
8
2151
6144
6143
6231
2235
6240
7
5.2Vstby
2240
2241
7200
7251
Regulation
+12Vreg
CL 16532095_111.eps
150801
Figure 9-1
9.1.3
Circuit Description
Input Circuit
The input circuit consists of a lightning protection circuit and
an EMI filter.
The lightning protection comprises R3120, sparkgaps 1124
and 1125. D6128, 6129, C2127 and R3129 are optional.
L5110, L5115, C2120 and L5120 form the EMI filter. It
prevents inflow of noises into the mains.
Primary Rectifier/smoothing Circuit
The AC input is rectified by diodes 6151,6152, 6153, 6154
and smoothed into C2125. The voltage over C2125 is
approximately 300V. It can vary from 200V to 390V.
Start Circuit
This circuit is formed by R3125, 3126, R3141, C2140 and
R3132.
When the power plug is connected to the mains voltage, the
MOSFET 7125 will start conducting as soon as the gate
voltage reaches a treshold value. A current starts to flow in
primary winding 2-4. The MOSFET will be fed forward via
winding 7-8, R3150 and C2146.
+Vb Supply and Negative Regulation Voltage
The positive part of the voltage over winding 7-8 will be
rectified via R3150, D6140 and charged via R3140 into
C2140. The voltage over C2140 has a value of +30 till +40V.
This value depends on the value of the mains voltage Vi and
the load.
The negative part of the voltage over winding 7-8 will be
rectified via R3150, D6142 and charged into C2151. The
voltage over C2151 has a value of -15V and is used as
regulation voltage.
Control Circuit
The control circuit exists of T7140, D6141, C2144 and 2145,
C2147, R3147 and 3148.
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
Power Switch Circuit
This circuit comprises MOSFET 7125, Rsense formed by
R3133, 3134, 3135, 3136 and 3137, R3131, R3132, D6146.
Diodes 6130, 6131 and 6132 protect the control circuit in
case of failure of the MOSFET.
Regulation Circuit
The regulation circuit comprises opto-coupler 7200, which
isolates the base voltage of transistor 7140 at the primary
side from a reference component 7251 at the secondary
side. The TL431(7251) can be represented by two
components:
• a very stable and accurate reference diode
• a high gain amplifier
K
R
2.5V
A
CL 96532065_071.eps
130799
Figure 9-2
Overload Protection Circuit
This circuit consists of R3145, C2143, a thyristor circuit
formed by T7141 and T7143, R3143 and R3142. When the
output is shortened, the thyristor circuit will start to conduct
and switch off the supply voltage over C2140. This results in
a switching of f of the drain current of the MOSFET 7125 and
the output will be disabled. The start circuit will try to start up
the power supply again. If the circuit is still shortened, the
complete start and stop sequence will repeat. The power
supply comes in a hiccup mode (is ticking).
Overvoltage Protection Circuit
This circuit consists of R3149, D6144, 6143, R3144, C2142
and T7142.
When the regulation circuit is interrupted due to an error in
the control loop, the regulated output voltage will increase
(overvoltage). This overvoltage is sensed on the primary
winding 7-8.
When an overvoltage is detected, the circuit will start up the
thyristor circuit T7141-7143. The power supply will come in a
hiccup mode as long as the error in the control loop is
present.
GB 159
Secondary Rectifier/Smoothing Circuit
There are 6 rectifier/smoothing circuits on the secondary
side. Each voltage depends on the number of windings of the
transformer.
From these circuits a lot of voltages are derived and fed to 3
connectors. The following voltages are present at the output:
Connector 209
Functional use: to Digital board + Dvio board
1. +3V3(for dig pcb + DVio)
2. +3V3(for dig pcb + DVio)
3. +3V3(for dig pcb + DVio)
4. +3V3(for dig pcb + DVio)
5. GND(for dig pcb + DVio)
6. +12V(for dig pcb + DVio)
7. GND(for dig pcb + DVio)
8. GND(for dig pcb + DVio)
9. +5V(for dig pcb + DVio)
10. STBY control(for dig pcb + DVio)
11. GND(for dig pcb + DVio)
12. -5V(for dig pcb + DVio)
The +12V is switched off by the STBY_ctrl signal.
When the +12V is switched off, also the +3V3, +5V and -5V
are switched off. All these voltages are low drop regulated.
Connector 0205
Functional use: to analogue board + display board + flap
motor
‘STBY‘ indicates that the voltage will not be switched off in
the standby situation.
1. +12VSTBY(= +12V Standby, for display heating, 8Vstby)
2. +5VSTBY(= +5V Standby; general use)
3. -5NSTBY(= -5V Standby; neg. voltage for drivers)
4. VGNSTBY(= -32V Standby; for display grids)
5. +33STBY(= +33V Standby; for tuner)
6. FLYB(flyback pulse for power fail + measurement)
7. GNDA(Ground for the analogue board)
Connector 0207
Functional use: to engine
1. +3V3(for engine servo board)
2. +5V(for engine servo board)
3. GND(for engine servo board)
4. +4V6E(for engine analog part)
5. GND(for engine servo board)
6. -5V(for engine servo board)
7. GND(for engine motor currents)
8. +12V(for engine motor currents)
This circuit is fed by supply voltage +Vb via R 3141. This
circuit controls the conduction time and the switching
frequency of the power switch circuit. It switches off the
MOSFET as soon as the voltage over Rsense reaches a
certain value. This value depends on the error voltage at the
emittor of T7140, which can be positive or negative (+/0,66V). The voltage fed back by the regulation circuit defines
this error voltage.
TL431 will conduct from cathode to anode when the
reference is higher than the internal reference voltage of
about 2.5V. If the reference voltage is lower, the cathode
current is almost zero.
The cathode current flows through the LED of the optocoupler. The collector current of the opto-coupler will adjust
the feedback level of the error voltage at the emittor of T7140.
9.
9.2
Display Board
9.2.1
Operation Unit DC (DC Part)
The core element of the operation unit DC is the
microcontroller TMP88CU77ZF [7156]. The TMP88CU77ZF
is an 8 bit microcontroller fitted with 96kB ROM and 3kB RAM
and is responsible for following functions:
• Integrated VFD driver
• Timer
• Evaluation of the keyboard matrix
• Decoding the remote control commands from the infrared receiver pos. 6170
• Activation of the display
• Motor driver
The system clock is generated with the 12MHz quartz (Pos.
1153).
9.2.2
Evaluation of the Keyboard Matrix
There are 15 different keys on the display board. A resistor
network is used to generate a specific direct voltage value,
depending on the key pressed, via the resistors 3145, 3171,
3183 and 3194 on the analog/digital (A/D) ports (7156 Pin 17,
18, 19, 20). Pressing keys simultaneously may lead to
undesired functions!
GB 160
9.2.3
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
IR Receiver and Signal Evaluation
9.2.5
The IR receiver [7140] contains a selectively controlled
amplifier as well as a photo-diode. The photo-diode changes
the received transmission (approx. 940nm) in electrical
pulses, which are then amplified and demodulated. On the
output of the IR receiver [7140], a pulse sequence with TTLlevel, which corresponds to the envelope curve of the
received IR remote control command, can be measured. This
pulse sequence is input into the controller for further signal
evaluation via input IRR [7156, pin 2].
9.2.4
Motor Driver Flap
The flap-motor is controlled via the 2 Port-Pins (MD1, MD2)
of the P (7156, Pin 12, Pin 100). The motor driver part is
constructed as a bridged dual power operational amplifier.
Between the IC outputs (7120, Pin1, Pin3) and a Boucherot
circuit (2121, 3126) suppresses a spurious 3MHz oscillation
from the output stage. The two ports-pins (MD1, MD2) of the
P are PWM-outputs and are controlled in the following way:
The STBY-LED is a red/green bi-color-LED and is controlled
via the STBYLED-signal of the P (7156 Pin 10) in the
following way:
H
L
open
H
PWM(H)
close
L
PWM(L)
Status of the Set
red
STBY
green
ON
Analogue Board Europe
9.3.1
Microprocessor TMP93C071F
The microcontroller „AIO“ TMP93C071F is a 16bit
microcontroller with internal ROM and 8kB RAM. It includes
the following functions:
• A/D converters
• composite sync input
• I2C bus interface
Following connection to the mains, a positive pulse on the
reset input on the P is generated by the reset-IC TL7705
(Pos.7900). The system clock is generated with the 20MHz
quartz (Pos. 1994).
MD2
off
Colour of STBY LED
9.3
Flap Motor:
MD1
Bi-Color LED (Standby and ON)
9.3.2
Bus Systems
The communication between the P and the other functional
groups is via the I2C-bus (SDA, SCL). The clock rate is
approx. 95kHz.
Functional groups on the I2C bus:
• E2PROM ST24E16 (Pos. 7815)
• Tuner (Pos. 1705)
• Matrix-switch STV6410 (Pos. 7507)
• Audio IC / MSP (Pos. 7600)
• Display board (Pos. 1987)
• VPS-IC (Pos. 7990).
Duty Cycle 50% for OPEN and CLOSE
Duty Cycle app. 10% for CLOSE
9.3.3
E2PROM
The E2PROM ST24E16 (Pos. 7815) is an electric erasable
and programmable, non-volatile memory. The E2PROM
stores data specific to the device, such as the AFC-reference
value, clock-correction-factor, etc. The data is accessed by
the P via the I2C-bus.
Duty Cycle app. 10% for OPEN
9.3.4
CL 16532095_112.eps
150801
VPS, PDC, Teletext (Europe Only)
The STV5348 (Pos. 7990) is a VPS, PDC, and Teletext
Decoder with an external 13,875Mhz quartz.
The following data formats are identified:
• VPS (Timer data and station name)
• PDC Format 2 (Timer data and station name)
• PDC Format 1 (station name and time)
• TXT header line (time for „time download“)
Figure 9-3
For the detection of the end-positions of the flap there are two
switches (1178, 1179) installed and the information is
evaluated from the P via the signals SW_1178 and
SW_1179.
9.3.5
FOME
Flap Switches:
SW1
SW2
open
L
H
closed
H
L
moving
H
H
error
L
L
The FOME-circuit compares the video signal coming from
the tuner and the one coming from the Scart-plug 1. If the
video-signals are identical the output of the FOME-circuit is
low.
9.3.6
Fan Control
The fan control circuit is necessary to control the speed of the
cabinet fan (Pos. 1984) according to the requirements in
temperature and noise. The temperature is measured via an
NTC on the display board (Pos. 3145). When the
temperature is lower than 25°C the fan-voltage is approx. 5V
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
and will reach approx. 10V at a temperature of 40°C. It is also
possible to switch off the fan via the control line ION_FAN.
The circuit generates also two control-signals: TEMP goes to
the P and BE_FAN is the control-line for the basic engine fan.
9.3.7
Power Supply
Audio Demodulator
Sound processor MSP 3415G
The MSP 3415G [7600] is a multistandard sound processor
which can demodulate FM Mono/Stereo, NICAM and AM
signals. The incoming signal is first controlled and then
digitised. The digital signal is then demodulated in 2 separate
channels. In the first MSP channel, FM and NICAM (B/G/I/D/
K) are demodulated, whereas in the second MSP channel,
FM and are demodulated again (NICAM L corresponds to
NICAM B/G). These demodulated signals are selected
digitally in the I/O and switched to the D/A converter on the
outputs. Amplitude and bandwidth of the demodulated audio
signals can be determined in the MSP using the
corresponding commands via the I2C bus. The audio signal
from the tuner is available at the pins 30 AFER and 31 AFEL.
Front End (TU, AP Part)
The Front End Comprises the Following Parts:
• Tuner [1705]
• IF amplifier & video demodulator IC TDA 9818 [7703]
• Sound processor MSP3415G [7600]
IF Selection
The IF frequency of the video carrier is 38.9 MHz for all
systems except SECAM L' (33.9 MHz).
A quasi-split audio system is used. Separate surface-wave
filters (SAW) are required. [1700], [1701] for video, [1702] for
audio. [1700] Is switched into the signal path for DK/ISECAM L/L' reception, if the signal SAWS is “high”. In this
case the switches [7701], [7702] are open and the diode
[6700] is conducting. [1701] Is switched into the signal path
for BG reception, if the signal SAWS is “low”. Then the switch
[7708] is open and the diode [6701] is conducting. For DK/ISECAM L/L' reception, an additional circuit for suppressing
the adjacent channel audio carrier is provided, which is set
using coil [5702] to maximum suppression at 40.4MHz.
IF Demodulator
TDA 9818
The IF signal from the tuner is processed by the demodulator
IC TDA 9818 [7703]. The signal PSS to pin3 switches
between demodulation of positive SECAM or negative PAL
modulated video carriers. A QSS-audio-IF signal SIF1 is
generated for demodulation in the sound processor [7600].
The audio-IF carrier is selected in the audio SAW filter
[1702]. This filter is switched for SECAM L’. If the signal SB1
is “high”, the switch [7707] is closed and the diode [6702] is
not conducting. For all other standards the diode [6702] is
conducting and the switch [7707] is open. The output signal
from this SAW filter is first processed in the TDA 9818. Audio
carriers are converted from the tuner IF level into the audio
IF position and further processed in the audio demodulator
[7600]. The AFC coil [5703] on the TDA 9818 is adjusted so
that when a frequency of 38.90 MHz is supplied to the IF
output of the tuner, the AFC voltage on pin 17 of the TDA
9818 is 2.5V. The setting of the picture carrier frequency for
SECAM L in the TDA 9818 is achieved by connecting pin 7
of the IC via a resistor [3702] to earth. The switch [7700] and
the signal SB1 "high" do this. The HF-AGC is set using the
AGC controller [3707] so that, with a sufficiently large
antenna input signal (74 dBV), the voltage at the IF output of
the tuner [1705] pin 11 is 500 mVpp. This setting must be
carried out, when the audio carrier is switched off. The
demodulated video signal appears on pin 16 [7703]. The
demodulator AGC voltage at pin4 is used to determine the
antenna signal strength after a buffer [7705] with the signal
AGC_MUTE. In the opposite direction this line may be used
to mute the demodulator to avoid cross talk in all cases,
where the tuner signal is not needed. In this case a „high“
signal is sent via AGC_MUTE and the conducting diode
[6703] to pin4. The video trap [1703] reduces adjacent
channel video and sound carrier remainders in the video for
BG standards. For all other standards the switch [7704] and
signal TS "low" bypass this trap. In this cases the selectivity
GB 161
of the SAW filter [1700] is sufficient. A frequency response
correction is achieved by the inductance [5009] for not BG
standards. This correction is not preferred for SECAM L' and
therefore shorts circuited by [7709], if the signal SB1 is
“high”. The demodulated video signal VFV is available after
the buffer and limiting stage for noise peaks [7706]. The FMPLL demodulator function of TDA 9818 is not used and
deactivated by the resistor [3726].
The 5SW and 8SW supply are switched off in case of standby
from the P via the ISTBY-line. This is possible for powersave. The ISTBY-line must be low in case of STBY. There is
also a „power fail“ circuit on the PS-schematic which is
necessary to mute AUDIO when IPFAIL is low.
9.3.8
9.
9.3.9
Input/Output Video-Routing (Europe-Version)
General Description:
The complete Video- I/O-switching is basically realised by
the I/O switch STV6410A. It is controlled via IIC-Bus-0 (SDA/
SCL) by the all in one C on the analogue board. The STV
6410 has three YCVBS switches, three chroma switches and
one RGB switch. All switches have 6-dB amplification on the
outputs. The YCVBS inputs have bottom clamp, the chroma
inputs have average clamp, and the RGB inputs have bottom
clamp circuits at the inputs. The R/C inputs can be switched
to average clamp for chroma signals via I2C bus.
The IC has also one slow blanking monitor and one fast
blanking switch for fast RGB insertion (see detailed
description in chapter 1.5). Two pre-selectors BA 7652 are
additionally used: One for switching between Rear CVBS, YRear and Front, the second for switching between ChromaRear and Front signal. Both pre-selectors are controlled via
IS1 and IS2 from the analogue board C.
CVBS Signals:
There are four CVBS input connection possibilities: Front
chinch (E6), Rear Chinch (E4), Scart 1 (E1) and Scart 2 (E2).
Rear Chinch In is routed via the pre selector BA 7652; the
other signals are connected direct to the STV 6410. The
selected CVBS signal is routed to Rear Chinch Out (via BA
7660, 6dB amplification, 75 Ohm driver) and to Scart 1.
Independent of the input signal quality (CVBS, S-Video or
RGB) the digital board supplies also S-Video and RGB
signals to the corresponding socket.
S-Video Signals:
There are also four S-Video input connection possibilities:
Front In (E5), Rear In (E3), Scart 1 and Scart 2. For S-Video
from Scart this option has to be switched on in the OSD
menu. The pre-selectors and the STV 6410 do the signal
selection (for detailed routing see overview). Also the video
quality will be S-Video, the digital board supplies also CVBS
to the corresponding sockets. The S-Video signal that is
coming from the digital board is routed via BA 7660 (6-dB
amplification and 75-Ohm driver) to the S-Video Rear Out
socket.
RGB Signals:
The Scart 2 RGB input signal (Decoder socket) is connected
to the RGB switch of STV 6410 and to the digital board in
parallel. The RGB from Scart 2 is routed to Scart 1 in low
GB 162
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
power standby mode. The direct connection (not via STV
6410) is for loop through and REC. The RGB signal, which is
coming from the digital board, is connected to the RGB
encoder input of the STV 6410 and is routed to Scart 1 in all
other modes.
As the Scart-connection can carry either RGB- or Y/C-signals
it is necessary to define the available and selected signalproperty. While Pin15 of Scart (Red or Chroma-upstream) is
fully handled via STV6410A the Pin7 (Blue or Chromadownstream) has to be extra set.
• Scart1: Pin42 of C (SC1YC_H-line):
– Low ( Blue-Out on SC1
– High ( Chroma-In on SC1
• Scart2: Pin41 of C (SC2RGB_H-line):
– Low ( Chroma-Out on SC2
– High ( Blue-In on SC2
Detection of Status-Information
Pin-8 (Slow-Blank):
Level-detection of Pin-8 (Scart-1 and -2) is realised by using
STV6410A. It can be readout via IIC-Bus by the CC-C. To
obtain the status of Scart1-Pin8, Bit 0 & 1 of register 06h must
be set to 0 (Input-mode). The corresponding bits for
verification of Scart2-Pin8-status are set to input-mode as
default.
Meaning of Read-Register-Bits:
• Bit 7 & 6: not used
• Bit 5 & 4: Status Scart-2/Pin8:
– 0 1 Low-level
– 1 0 Medium-level (16:9)
– 1 1 High-level (4:3)
• Bit 3 &2: not used
• Bit 1 & 0: Status Scart-1/Pin8:
– 0 1 Low-level
– 1 0 Medium-level (16:9)
– 1 1 High-level (4:3)
Pin-16 (Fast Blank):
Only the status/level of Scart-2/Pin16 must be detected; this
is realised by using PortC3/AIN14 (Pin25) of the CC-C as an
Analogue-input.
• ADC-value lower or equal 24h ( Pin16 low (no RGBsignals)
• ADC-value greater 24h ( Pin16 high (RGB present on
Scart-2)
To avoid misdetection a “software-integration” (result is first
valid if it was 3-times the same) must be implemented,
determination has to be done approx. every 47msec (no
multiple of V-sync).
WSS on Y/C-Plug:
Picture-Ratio-Information (16:9 or 4:3) on SVHS-connections
is coded via the average DC-level of the Chroma-signal-line,
detection is realised by using an analogue-input-port of the
CC-C.
• ADC- value lower or equal 40h ( 4:3-picture-ratio
delivered
• ADC-value greater 40h ( 16:9-picture-ratio available on
plug
Y/C-Rear is determined via Port40/AIN3 (Pin14) of CC
(WSRI-line) and Port41/AIN4 (Pin15) is used for Y/C-Front
(WSFI-line).
Generation of Status-Information
Pin-8 (Slow Blank):
Only on Scart-1 the Slow-Blank-Status (Level of Pin8) must
be created, which is done via IIC-Bus-register 06h (Bits 0 &
1) of the STV6410A.
Pin-16 (Fast Blank):
Only the status/level of Pin16-Scart1 must be controlled; this
is realised by using the FB-switch-capabilities of the
STV6410A, which are set via IIC-Bus-register 04h (bits 4 &
5).
WSS on Y/C-Plug:
The appropriate DC-level on Chroma-signal-line for Y/CRear-Out is produced via Port57 (Pin10) of the CC-C
(WSRO-line).
• 4:3 - Picture-ratio supported on Y/C-Plug: Port57 set to 0
• 16:9 - Picture-ratio supported on Y/C-Plug: Port57 set to
1
9.3.10 Audio Routing Analogue board (Europe / Nafta)
General Description:
The Audio- I/O switching is realised by the STV6410 I/O
switch.
By I2C Bus (SDA-0/SCL-0) it is possible to control all the
Audio in- and outputs (for detailed Information we refer to the
STV6410 routing overview).
Analog audio coming from DV-Board and second rear Cinch
input is routed via MSP3415 to the STV 6410. After selecting
the audio source via STV 6410, the signal must be
transformed into the digital domain. For this, the UDA
1360TS (ADC) is responsible. An input-voltage of up to
2Vrms can be handled from the IC´s. For further processing,
the UDA 1360TS (ADC) delivers the data-in I2S format to the
digital-board. After a certain delay the (processed) data come
back from the digital board to the UDA 1328 (DAC). The UDA
1328 (DAC) transforms the I2S data back into the analog
domain and feeds the signals direct to the MC33078 (OPV).
From the MC33078 (OPV) the signals are delivered back to
the STV 6410 and also direct to the 2nd rear out Cinch. The
other outputs (Scart, Cinch) are supported by the STV 6410.
Detailed Description STV 6410:
The STV 6410 is an I2C bus controlled audio and video
switch matrix, which is able to handle audio input signals up
to 2 Vrms. The used outputs are equipped with internal level
adjustment possibility. Low distortion and very good channel
separation is a typical peculiarity of this IC. The output
resistance is very low and the frequency bandwidth is up to
50 kHz.
Detailed Description UDA 1360:
The UDA 1360TS is a stereo Analog-to-Digital Converter
employing bitstream conversion techniques.
The UDA supports the I2S-bus data format and the MSBjustified data format with word lengths of up to 20 bits. The IC
supports also 2Vrms input signals and is designed for 3V3
supply voltage.
The device is able to handle system clocks of 256fs and
384fs.
Typical THD+N at 0dB is -85dB and a S/N performance up to
97dB is possible.
Detailed Description UDA 1328:
The UDA1328 is a 6 channel DAC employing bitstream
conversion techniques, which can be used either in L3
microcontroller mode or in static pin mode.
The UDA 1328 supports the I2S-bus data format with word
lengths of up to 24 bits.
Digital sound features can be controlled with the L3 interface.
System clock can be set to 256fs or 384fs.
The Device also provides 2 high quality differential outputs.
Typical THD+N at 0dB is -95dB and a S/N of up to 106dB is
possible.
Supply voltage is 3V3.
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
Detailed Description MC 33078:
The MC33078 is a dual operational amplifier for audio
applications.
It offers low voltage noise (4,5nV/ ÖHz) and high frequency
performances (15MHz Gain Bandwidth product, 7V/s slew
rate).
In addition the MC33078 has a very low distortion (0,002%).
9.
GB 163
Figure 9-4
FOME
6
1959
Rear Cinch In (E4)
CVBS
5
CVBS
Rear Cinch Out
IS2
IS1
1953 CVBSFIN
Front Cinch In (E6 CVBS)
VFV
1959
7
6
FRONT
END
TU
7
7
6
BA7660
6
6
D_Y
D_R
D_G
D_B
1954
C
D_C
D_CVBS
4
FROM FRONT
A/V BOARD
4
Y
1955
Y/C Rear Out
4
2
5
1
5
7400
WU to
AIO1
7430
20
Y/C Rear In
(E3)
5
BA7652
Wake
up
15
(Y/CVBS)
VideoOut
19
3
Y
(Y/CVBS)
VideoIn
7
C
1955
5
7401
16 8
WSRI
11
4
5
2
Y/C Front In
(E5 SVID)
1953
WSFI
4
CFIN
BA7652
3
FROM FRONT
A/V BOARD
YFIN
3
6
34
I2 C
1
SDA 22
SCL 21
RIN_AUX 37
RIN_VCR 47
RIN_TV 56
RIN_STB 39
RIN_ENC 43
LIN_AUX 35
LIN_VCR 49
LIN_TV 53
LIN_STB 41
LIN_ENC 45
YIN_ENC 38
YIN_AUX 26
YCVBSIN_TV 52
CVBSIN_STB
YCVBSIN_VCR 50
YCVBSIN_ENC 36
CIN_TV 54
YCVBSIN_AUX 24
CIN_VCR 48
CIN_ENC 40
RCIN_AUX 28
RCIN_ENC 42
C SWITCH
RGB SWITCH
FB SWITCH
C SWITCH
C SWITCH
6dB
6dB
6dB
6dB
6dB
L_ENC
L_STB
L_VCR
L_AUX
R_AUX
R_VCR
R_STB
R_ENC
MUTE
L_ENC
L_STB
L_TV
L_AUX
R_ENC
R_STB
R_AUX
R_TV
MUTE
L_ENC
L_STB
L_TV
L_VCR
R_VCR
R_TV
R_STB
R_ENC
MUTE
L_ENC
L_STB
L_TV
L_VCR
L_AUX
R_ENC
R_STB
R_TV
R_VCR
R_AUX
MUTE
TV SWITCH
VCR SWITCH
AUX SWITCH
CINCHSWITCH
0/6dB
-14dB
-14dB
-14dB
0/6dB
0/6dB
STEREO/
MONO
STEREO/
MONO
STEREO/
MONO
0/6dB
SLOW BLANK,
I/O MONITOR
64 ROUT_TV
2 LOUT_TV
8 AOUT_RF
60 ROUT_VCR
62 LOUT_VCR
4 ROUT_AUX
6 LOUT_AUX
58 ROUT_CINCH
59 LOUT_CINCH
31 SLB_AUX
27 SLB_VCR
25 SLB_TV
7 YCVBSOUT_VCR
5 COUT_VCR
15 YCVBSOUT_AUX
13 COUT_AUX
3 YCVBS/OUT_TV
11 FILTER
9 VOUT_RF
1 RCOUT_TV
61 BOUT_TV
6dB
63 GOUT_TV
TRAP
7507
17 FBOUT_TV
6dB
STV6410
FOME
6dB
-14dB
Y/CVBS SWITCH
CVBS_STB
CVBS/Y_ENC
CVBS/Y_AUX
CVBS/Y_TV
6dB
Y_AUX
Y_ENC
MUTE
R/C_ENC
C_ENC
C_TV
C_AUX
MUTE
Y/CVBS SWITCH
CVBS/Y_ENC
CVBS/Y_VCR
CVBS_STB
CVBS/Y_TV
Y_ENC
MUTE
R/C_ENC
C_ENC
C_VCR
C_TV
MUTE
Y/CVBS SWITCH
CVBS/Y_AUX
CVBS/Y_ENC
CVBS/Y_VCR
CVBS_STB
Y_AUX
Y_ENC
MUTE
R/C_AUX
R/C_ENC
C_ENC
C_VCR
MUTE
GIN_AUX 30
GIN_ENC 44
BIN_AUX 32
4V
0V
AIO 1
B_ENC
B_AUX
G_ENC
G_AUX
R/C_ENC
R/C_AUX
MUTE
I2C BUS
DECODER
BIN_ENC 46
FBIN_AUX 18
FBIN_ENC 19
1
4
1950-2
R/C G B/C BL SW AudInL AudOutL AudInR AudOutR
SCART 2 DOWN TO VCR / SAT / DVD / DECODER
4
20
(Y/CVBS)
VideoIn
19
15
1950-1
VD to
AIO1
7
16
8
6
3
1
1954
A_YCVBS
A_C
A_ B
A_G
A_R
to VIP
SAA7718
CL 16532095_113.eps
150801
4
SC1YC_H
2
R/C G B/C BL SW AudInL AudOutL AudInR AudOutR
11
VPS
(Y/CVBS)
VideoOut
SCART 1 UP TO TV / MONITOR
DVDR1000 /0x1 /691
3
6
SC2RGB_H
WSRO
7
TO DIGITAL BOARD
BLOCK DIAGRAM VIDEO IN/OUT EUROPE-VERSION
9.
FROM DIGITAL BOARD
GB 164
Circuit-, IC Descriptions and List of Abbreviations
6410-02.EPS
AL
Figure 9-5
4
6
1900
I2S
AFCRI
AFCLI
AR
AL
Rear Cinch
1958
out
FROM
DIGITAL
BOARD
1953
Front Cinch in
FRONT
END
FROM
FRONT
A/V BOARD
3
DAC
41
40
38
15
7
7002
11
MC33078
12
2
MSP3415
8
19
37
7001
20
ALDAC
ARDAC
30 AFER
6
3
2
4
1
I2C
1
GIN_ENC 44
CIN_VCR 48
CIN_ENC 40
RCIN_AUX 28
RCIN_ENC 42
CIN_TV 54
34
SDA 22
SCL 21
RIN_AUX 37
RIN_VCR 47
RIN_TV 56
RIN_STB 39
RIN_ENC 43
LIN_AUX 35
LIN_VCR 49
LIN_TV 53
LIN_STB 41
LIN_ENC 45
YIN_ENC 38
YIN_AUX 26
YCVBSIN_TV 52
CVBSIN_STB
YCVBSIN_VCR 50
YCVBSIN_ENC 36
4V
0V
C SWITCH
RGB SWITCH
FB SWITCH
C SWITCH
C SWITCH
6dB
6dB
6dB
6dB
6dB
L_ENC
L_STB
L_VCR
L_AUX
R_AUX
R_VCR
R_STB
R_ENC
MUTE
L_ENC
L_STB
L_TV
L_AUX
R_ENC
R_STB
R_AUX
R_TV
MUTE
L_ENC
L_STB
L_TV
L_VCR
R_VCR
R_TV
R_STB
R_ENC
MUTE
L_ENC
L_STB
L_TV
L_VCR
L_AUX
R_ENC
R_STB
R_TV
R_VCR
R_AUX
MUTE
TV SWITCH
VCR SWITCH
AUX SWITCH
CINCHSWITCH
6dB
0/6dB
-14dB
-14dB
-14dB
0/6dB
0/6dB
0/6dB
STEREO/
MONO
STEREO/
MONO
STEREO/
MONO
SLOW BLANK,
I/O MONITOR
64 ROUT_TV
2 LOUT_TV
8 AOUT_RF
60 ROUT_VCR
62 LOUT_VCR
4 ROUT_AUX
6 LOUT_AUX
58 ROUT_CINCH
59 LOUT_CINCH
31 SLB_AUX
27 SLB_VCR
25 SLB_TV
7 YCVBSOUT_VCR
5 COUT_VCR
15 YCVBSOUT_AUX
13 COUT_AUX
3 YCVBS/OUT_TV
11 FILTER
9 VOUT_RF
1 RCOUT_TV
61 BOUT_TV
17 FBOUT_TV
19
63 GOUT_TV
STV6410
7507
20
(Y/CVBS) (Y/CVBS)
VideoIn VideoOut
6dB
TRAP
4
6dB
-14dB
Y/CVBS SWITCH
CVBS_STB
CVBS/Y_ENC
CVBS/Y_AUX
CVBS/Y_TV
6dB
Y_AUX
Y_ENC
MUTE
R/C_ENC
C_ENC
C_TV
C_AUX
MUTE
Y/CVBS SWITCH
CVBS/Y_ENC
CVBS/Y_VCR
CVBS_STB
CVBS/Y_TV
Y_ENC
MUTE
R/C_ENC
C_ENC
C_VCR
C_TV
MUTE
Y/CVBS SWITCH
CVBS/Y_AUX
CVBS/Y_ENC
CVBS/Y_VCR
CVBS_STB
Y_AUX
Y_ENC
MUTE
R/C_AUX
R/C_ENC
C_ENC
C_VCR
MUTE
GIN_AUX 30
BIN_AUX 32
B_ENC
B_AUX
G_ENC
G_AUX
R/C_ENC
R/C_AUX
MUTE
I2C BUS
DECODER
BIN_ENC 46
FBIN_AUX 18
FBIN_ENC 19
4
YCVBSIN_AUX 24
1950-2
AudInL AudOutL AudInR AudOutR
31 AFEL
8
SW
7600
16
R/C G B/C BL
SCART 2 DOWN TO VCR/ SAT/ DVD/ DECODER
(Y/CVBS) (Y/CVBS)
VideoIn VideoOut
UDA1328
12
SIF1
DVAR
DVAL
ARCLI
ARCLI
1705 7703
DV-Audio in
1960
FROM
AR
DVIO
BOARD
8
5
1958
Rear Cinch in
7
15
11
7
8
SW
6
3
2
1
ADC
7004
I2S
1900
TO
DIGITAL
BOARD
CL 16532095_114.eps
150801
UDA1360
12
1950-1
AudInL AudOutL AudInR AudOutR
to AudioLevel meter
16
R/C G B/C BL
SCART 1 UP TO TV/ MONITOR
6410-02.EPS
BLOCK DIAGRAM AUDIO IN/OUT EUROPE-VERSION
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 165
GB 166
9.
DVDR1000 /0x1 /691
9.4
Analog Board Nafta version
9.4.1
Microprocessor TMP93C071F
Circuit-, IC Descriptions and List of Abbreviations
IF Selection
The IF frequency of the video carrier is 45.75 MHz. A quasisplit audio system is used. Separate surface-wave filters
(SAW) are required. [1701] for video, [1702] for audio.
The microcontroller „AIO“ TMP93C071F is a 16bit
microcontroller with internal ROM and 8kB RAM. It includes
the following functions:
• A/D converters
• composite sync input
• I2C bus interface
The following connection to the mains, a positive pulse on the
reset input on the P is generated by the reset-IC TL7705
(Pos.7900).
The system clock is generated with the 20MHz quartz (Pos.
1994).
9.4.2
IF Demodulator
TDA 9817
The IF signal from the tuner is processed by the demodulator
IC TDA 9817 [7703]. A QSS-audio-IF signal SIF1 is
generated for demodulation in the sound processor [7600].
Audio carriers are converted from the tuner IF level into the
audio IF position and further processed in the audio
demodulator [7600]. The AFC coil [5703] on the TDA 9817 is
adjusted so that when a frequency of 45.75 MHz is supplied
to the IF output of the tuner, the AFC voltage on pin 17 of the
TDA 9817 is 2.5V. The HF-AGC is set using the AGC
controller [3707] so that, with a sufficiently large antenna
input signal (74 dBV) the voltage at the IF output of the tuner
[1705] pin 11 is 500 mVpp. This setting must be carried out,
when the audio carrier is switched off. The demodulated
video signal appears on pin 16 [7703]. The demodulator AGC
voltage at pin4 is used to determine the antenna signal
strength after a buffer [7705] with the signal AGC_MUTE. In
the opposite direction this line may be used to mute the
demodulator to avoid crosstalk in all cases, where the tuner
signal is not needed. In this case a „high“ signal is sent via
AGC_MUTE and the conducting diode [6703] to pin4. The
video trap [1703] reduces adjacent channel video and sound
carrier remainders in the video. The demodulated video
signal VFV is available after the buffer and limiter stage for
noise peaks [7706]. The FM-PLL demodulator function of
TDA 9817 is not used and deactivated by the resistor [3726].
Bus Systems
The communication between the P and the other functional
groups is via the I2C-bus (SDA, SCL). The clock rate is
approx. 95kHz.
Functional groups on the I2C bus:
• E2PROM ST24E16 (Pos. 7815)
• Tuner (Pos. 1705)
• Matrix-switch STV6410 (Pos. 7507)
• Audio IC / MSP (Pos. 7600)
• Display board (Pos. 1987)
9.4.3
E2PROM
The E2PROM ST24E16 (Pos. 7815) is an electric erasable
and writeable, non-volatile memory. The E2PROM stores
data specific to the device, such as the AFC-reference value,
clock-correction-factor, etc. The data is accessed by the P
via the I2C-bus.
9.4.4
Audio Demodulator
Sound processor MSP 3445G
The MSP 3445G [7600] is a NTSC sound processor.
Amplitude and bandwidth of the demodulated audio signals
can be determined in the MSP using the corresponding
commands via the I2C bus. The audio signal from the tuner
is available at the pins 30 AFER and 31 AFEL.
FOME
The FOME (Follow Me) -circuit compares the video signal
coming from the tuner and the one coming from the Scartplug 1. If the video-signals are identical the output of the
FOME-circuit is low.
9.4.8
9.4.5
The fan control circuit is necessary to control the speed of the
cabinet fan (Pos. 1984) according to the requirements in
temperature and noise. The temperature is measured via an
NTC on the display board (Pos. 3145). When the
temperature is lower than 25°C the fan-voltage is approx. 5V
and will reach approx. 10V at a temperature of 40°C. It is also
possible to switch off the fan via the control line ION_FAN.
The circuit generates also two control-signals: TEMP goes to
the P and BE_FAN is the control-line for the basic engine fan.
9.4.6
Power Supply
The 5SW and 8SW supply are switched off in case of Stby
from the P via the ISTBY-line. This is possible for powersave. The ISTBY-line must be low in case of STBY. There is
also a „power fail“ circuit on the PS-schematic which is
necessary to mute AUDIO when IPFAIL is low.
9.4.7
Video-Routing (Nafta Version)
Fan Control
Front End (TU, AP Part)
The front end comprises the following parts:
• Tuner [1705]
• IF amplifier & video demodulator IC TDA 9817 [7703]
• Sound processor MSP3445G [7600]
General Description:
The complete Video- I/O-switching is basically realised by
the I/O switch STV6410A, which is controlled via IIC-Bus-0
(SDA/SCL) by the all in one C on the analogue board. The
STV 6410 has three YCVBS, three chroma, and one RGB
switch which is not used in the Nafta I/O. All switches have 6dB amplification on the outputs. The YCVBS inputs have
bottom clamp, the chroma inputs have average clamp, and
the RGB switch has bottom clamp circuits at the inputs. The
R/C inputs can be switched to average clamp for chroma
signals via I2C bus.
Two pre-selectors BA 7652 are additionally used: One for
switching between Y- Rear and Front, the second for
switching between Chroma- Rear and Front signal. Both preselectors are controlled via IS1 and IS2 from the analogue
board C.
CVBS Signals:
There are two CVBS input connection possibilities: Front
chinch (E5) and Rear Chinch In (E3). Both CVBS sources are
connected direct to the STV 6410 and routed to Rear Out 1
and Rear Out 2 via the 75-Ohm driver BA 7623. Both CVBS
output sockets are connected to BA 7623 in parallel.
Independent of the input signal quality (CVBS, S-Video or Y/
UV) the digital board supplies also S-Video and Y/UV signals
to the corresponding sockets.
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
S-Video Signals:
There are also two S-Video input connection possibilities:
Front (E4) and Rear (E2) S-Video In which are connected to
the pre-selector IC's BA 7652. One is used for Y, the other for
Chroma switching. The output of the pre-selector switches is
connected to the STV 6410, and then the signal is routed via
the 75-Ohm driver BA 7623 to the Rear Out S-Video socket.
Also the video quality will be S-Video, the digital board
supplies also CVBS and Y/UV to the corresponding sockets.
Y/UV Signals:
The Y/UV In signal is routed direct to the digital board, there
is no Y/UV IN -> Y/UV Out loop through in low power
standby. As the digital board supplies only RGB signals, a
RGB Y/UV matrix is used. This matrix consists of the
operational amplifier TSH95 which generates the U and V
signals according the formulas: 2U=B-0,338R-0,661G,
2V=R-0,838G-0,161B. Then the signals are routed to the UV
Output sockets via the 75-Ohm driver BA 7623. The
corresponding Y signal is coming from the digital board via
the STV 6410. The 75 Ohm Y socket is driven by the 75-Ohm
driver BA 7623 and finally connected to the of the Y/UV
Output.
Detection of Status-Information
WSS on Y/C-Plug:
• Picture-Ratio-Information (16:9 or 4:3) on SVHSconnections is coded via the average DC-level of the
Chroma-signal-line, detection is realised by using an
analogue-input-port of the CC-C.
• ADC- value lower or equal 40h ( 4:3-picture-ratio
delivered
• ADC-value greater 40h ( 16:9-picture-ratio available on
plug
• Y/C-Rear is determined via Port40/AIN3 (Pin14) of CC
(WSRI-line) and Port41/AIN4 (Pin15) is used for Y/CFront (WSFI-line).
Generation of Status-Information
WSS on Y/C-Plug:
The appropriate DC-level on Chroma-signal-line for Y/CRear-Out is produced via Port57 (Pin10) of the CC-C
(WSRO-line).
• 4:3 - Picture-ratio supported on Y/C-Plug: Port57 set to 0
• 16:9 - Picture-ratio supported on Y/C-Plug: Port57 set to
1
9.4.9
Audio routing Analogue board (Europe / Nafta)
General Description:
The Audio- I/O switching is realised by the STV6410 I/O
switch.
By I2C Bus (SDA-0/SCL-0) it is possible to control all the
Audio in- and outputs (for detailed Information we refer to the
STV6410 routing overview).
Analog audio coming from DV-Board and second rear Cinch
input is routed via MSP3415 to the STV 6410. After selecting
the audio source via STV 6410, the signal must be
transformed into the digital domain. For this, the UDA
1360TS (ADC) is responsible. An input-voltage of up to
2Vrms can be handled from the IC´s. For further processing,
the UDA 1360TS (ADC) delivers the data-in I2S format to the
digital-board. After a certain delay the (processed) data come
back from the digital board to the UDA 1328 (DAC). The UDA
1328 (DAC) transforms the I2S data back into the analog
domain and feeds the signals direct to the MC33078 (OPV).
From the MC33078 (OPV) the signals are delivered back to
the STV 6410 and also direct to the 2nd rear out Cinch. The
other outputs (Scart, Cinch) are supported by the STV 6410.
9.
GB 167
Detailed Description STV 6410:
The STV 6410 is an I2C bus controlled audio and video
switch matrix, which is able to handle audio input signals up
to 2 Vrms. The used outputs are equipped with internal level
adjustment possibility. Low distortion and very good channel
separation is a typical peculiarity of this IC. The output
resistance is very low and the frequency bandwidth is up to
50 kHz.
Detailed Description UDA 1360:
The UDA 1360TS is a stereo Analog-to-Digital Converter
employing bitstream conversion techniques.
The UDA supports the I2S-bus data format and the MSBjustified data format with word lengths of up to 20 bits. The IC
supports also 2Vrms input signals and is designed for 3V3
supply voltage.
The device is able to handle system clocks of 256fs and
384fs.
Typical THD+N at 0dB is -85dB and a S/N performance up to
97dB is possible.
Detailed Description UDA 1328:
The UDA1328 is a 6 channel DAC employing bitstream
conversion techniques, which can be used either in L3
microcontroller mode or in static pin mode.
The UDA 1328 supports the I2S-bus data format with word
lengths of up to 24 bits.
Digital sound features can be controlled with the L3 interface.
System clock can be set to 256fs or 384fs.
The Device also provides 2 high quality differential outputs.
Typical THD+N at 0dB is -95dB and a S/N of up to 106dB is
possible.
Supply voltage is 3V3.
Detailed Description MC 33078:
The MC33078 is a dual operational amplifier for audio
applications.
It offers low voltage noise (4,5nV/ÖHz) and high frequency
performances (15MHz Gain Bandwidth product, 7V/s slew
rate).
In addition the MC33078 has a very low distortion (0,002%).
5
Figure 9-6
1
IS2
IS1
FROM FRONT
A/V BOARD
4
1953
Front Cinch In
FRONT
END
CVBSFIN
VFV
V
U
10 7200
Matrix
4
2
5
5
1
1955
Y/C Rear In
WSRI
C
5
BA7652
1955
Y
3
7
YS_IN
Y
YUV In
5
U
Y/C Front In
FROM FRONT
A/V BOARD
1953
WSFI
4
5
BA7652
1955
CFIN
7
4
GIN_AUX 30
CIN_VCR 48
CIN_ENC 40
RCIN_AUX 28
RCIN_ENC 42
CIN_TV 54
34
SDA 22
SCL 21
RIN_AUX 37
RIN_VCR 47
RIN_TV 56
RIN_STB 39
RIN_ENC 43
LIN_AUX 35
LIN_VCR 49
LIN_TV 53
LIN_STB 41
LIN_ENC 45
YIN_ENC 38
YIN_AUX 26
YCVBSIN_TV 52
CVBSIN_STB
YCVBSIN_VCR 50
4V
0V
C SWITCH
RGB SWITCH
FB SWITCH
C SWITCH
C SWITCH
6dB
6dB
6dB
6dB
6dB
L_ENC
L_STB
L_VCR
L_AUX
R_AUX
R_VCR
R_STB
R_ENC
MUTE
L_ENC
L_STB
L_TV
L_AUX
R_ENC
R_STB
R_AUX
R_TV
MUTE
L_ENC
L_STB
L_TV
L_VCR
R_VCR
R_TV
R_STB
R_ENC
MUTE
L_ENC
L_STB
L_TV
L_VCR
L_AUX
R_ENC
R_STB
R_TV
R_VCR
R_AUX
MUTE
TV SWITCH
VCR SWITCH
AUX SWITCH
CINCHSWITCH
0/6dB
-14dB
-14dB
-14dB
0/6dB
0/6dB
0/6dB
7 YCVBSOUT_VCR
6 LOUT_AUX
58 ROUT_CINCH
59 LOUT_CINCH
31 SLB_AUX
27 SLB_VCR
25 SLB_TV
STEREO/
MONO
STEREO/
MONO
64 ROUT_TV
2 LOUT_TV
8 AOUT_RF
60 ROUT_VCR
62 LOUT_VCR
STEREO/
MONO 4
ROUT_AUX
SLOW BLANK,
I/O MONITOR
5 COUT_VCR
15 YCVBSOUT_AUX
13 COUT_AUX
3 YCVBS/OUT_TV
11 FILTER
9 VOUT_RF
1 RCOUT_TV
63 GOUT_TV
6dB
6dB
TRAP
1955
17 FBOUT_TV
61 BOUT_TV
STV6410
6dB
-14dB
Y/CVBS SWITCH
CVBS_STB
CVBS/Y_ENC
CVBS/Y_AUX
CVBS/Y_TV
6dB
Y_AUX
Y_ENC
MUTE
R/C_ENC
C_ENC
C_TV
C_AUX
MUTE
Y/CVBS SWITCH
CVBS/Y_ENC
CVBS/Y_VCR
CVBS_STB
CVBS/Y_TV
Y_ENC
MUTE
R/C_ENC
C_ENC
C_VCR
C_TV
MUTE
Y/CVBS SWITCH
CVBS/Y_AUX
CVBS/Y_ENC
CVBS/Y_VCR
CVBS_STB
Y_AUX
Y_ENC
MUTE
R/C_AUX
R/C_ENC
C_ENC
C_VCR
MUTE
GIN_ENC 44
BIN_AUX 32
B_ENC
B_AUX
G_ENC
G_AUX
R/C_ENC
R/C_AUX
MUTE
YCVBSIN_ENC 36
1
7516
BIN_ENC 46
FBIN_AUX 18
FBIN_ENC 19
7
7
7
BA7623
YCVBSIN_AUX 24
I2C
4
5
V_CON
U_CON
YFIN
3
C_IN
1956
4
U
6
7
7
7
1
6
7430
V
1957
FOME
BA7623
Y
YUV Out / Monitor
6
Y
1997
C
1
WSRO
A_YCVBS
A_C
A_U
A_Y
A_V
CL 16532095_115.eps
150801
1955
1997
to VIP
4
1
AIO,VD
CVBS
Rear Out 2
CVBS
Rear Out 1
Y/C Rear Out
6
DVDR1000 /0x1 /691
3
D_B
D_G
D_R
1954
D_CVBS
D_C
D_Y
4
CVBS
Rear Cinch In
1997
V
4
I2C BUS
DECODER
BLOCK DIAGRAM VIDEO IN/OUT NAFTA-VERSION
From Digital Board
9.
to Digital Board
GB 168
Circuit-, IC Descriptions and List of Abbreviations
6410-02.EPS
Figure 9-7
9
I2S
1953
AFCRI
DAC
UDA1328
9
AR1_IN
AL1_IN
1958
AR2_IN
AL2_IN
AFCLI
Front Cinch in
FROM
FRONT
A/V BOARD
4
1900
AR
AL
Rear Cinch in 1
AR
AL
Rear Cinch in 2
SIF1
1959
DVAR
DVAL
1705 7703
FRONT
END
FROM
DIGITAL
BOARD
5
5
3
AL
AR
1960
DV-Audio in
FROM
DVIO
BOARD
7
40
7001
41
7002
MC33078
9
2
MSP3435
7
ARDAC
ALDAC
7600
30 AFER
31 AFEL
BLOCK DIAGRAM AUDIO IN/OUT NAFTA-VERSION
1
CIN_VCR 48
CIN_ENC 40
RCIN_AUX 28
RCIN_ENC 42
34
SDA 22
SCL 21
RIN_AUX 37
RIN_VCR 47
RIN_TV 56
RIN_STB 39
RIN_ENC 43
LIN_AUX 35
LIN_VCR 49
LIN_TV 53
LIN_STB 41
LIN_ENC 45
YIN_ENC 38
YIN_AUX 26
YCVBSIN_TV 52
CVBSIN_STB
YCVBSIN_VCR 50
YCVBSIN_ENC 36
CIN_TV 54
4V
0V
C SWITCH
RGB SWITCH
FB SWITCH
C SWITCH
C SWITCH
6dB
6dB
6dB
6dB
6dB
L_ENC
L_STB
L_VCR
L_AUX
R_AUX
R_VCR
R_STB
R_ENC
MUTE
L_ENC
L_STB
L_TV
L_AUX
R_ENC
R_STB
R_AUX
R_TV
MUTE
L_ENC
L_STB
L_TV
L_VCR
R_VCR
R_TV
R_STB
R_ENC
MUTE
L_ENC
L_STB
L_TV
L_VCR
L_AUX
R_ENC
R_STB
R_TV
R_VCR
R_AUX
MUTE
TV SWITCH
VCR SWITCH
AUX SWITCH
CINCHSWITCH
0/6dB
TRAP
-14dB
-14dB
-14dB
0/6dB
0/6dB
0/6dB
STEREO/
MONO
STEREO/
MONO
STEREO/
MONO
SLOW BLANK,
I/O MONITOR
64 ROUT_TV
2 LOUT_TV
8 AOUT_RF
60 ROUT_VCR
62 LOUT_VCR
4 ROUT_AUX
6 LOUT_AUX
58 ROUT_CINCH
59 LOUT_CINCH
31 SLB_AUX
27 SLB_VCR
25 SLB_TV
7 YCVBSOUT_VCR
5 COUT_VCR
15 YCVBSOUT_AUX
13 COUT_AUX
3 YCVBS/OUT_TV
11 FILTER
9 VOUT_RF
1 RCOUT_TV
61 BOUT_TV
63 GOUT_TV
6dB
6dB
17 FBOUT_TV
7507
STV6410
6dB
-14dB
Y/CVBS SWITCH
CVBS_STB
CVBS/Y_ENC
CVBS/Y_AUX
CVBS/Y_TV
6dB
Y_AUX
Y_ENC
MUTE
R/C_ENC
C_ENC
C_TV
C_AUX
MUTE
Y/CVBS SWITCH
CVBS/Y_ENC
CVBS/Y_VCR
CVBS_STB
CVBS/Y_TV
Y_ENC
MUTE
R/C_ENC
C_ENC
C_VCR
C_TV
MUTE
Y/CVBS SWITCH
CVBS/Y_AUX
CVBS/Y_ENC
CVBS/Y_VCR
CVBS_STB
Y_AUX
Y_ENC
MUTE
R/C_AUX
R/C_ENC
C_ENC
C_VCR
MUTE
GIN_AUX 30
GIN_ENC 44
BIN_AUX 32
B_ENC
B_AUX
G_ENC
G_AUX
R/C_ENC
R/C_AUX
MUTE
I2C BUS
DECODER
BIN_ENC 46
FBIN_AUX 18
YCVBSIN_AUX 24
I2C
4
4
FBIN_ENC 19
to AudioLevel meter
9
7004
1900
TO
DIGITAL
BOARD
CL 16532095_116.eps
150801
I2S
AR
AL
Rear Cinch
out 2 1958
AR
AL
Rear Cinch
out 1 1959
UDA1360
ADC
4
4
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 169
6410-02.EPS
GB 170
9.
DVDR1000 /0x1 /691
9.5
Digital Board
9.5.1
Record Mode
Circuit-, IC Descriptions and List of Abbreviations
Video Part
Analog Video input signals CVBS, YC and UV are routed via
the analog board to connector 1601 and sent to IC7552
SAA7118 (Video Input Processor). Digital video input signals
(DV_IN_DATA(7:0)) are sent from the DIVIO board through
the connector 1501 and further also to IC7552.
IC7552 (VIP) decodes the analog video to digital video and
processes the digital video to a digital video stream
(CCIR656 format). This output stream (VIP_YUV[7:0]) goes
to IC7410 SAA6750 (EMPIRE) and to IC7100 Versatile
Stream Manager. The latter uses the data for VBI (vertical
blanking interval) extraction.
IC7410 (EMPIRE) encodes the digital video stream into a
MPEG2 video stream that is fed to IC7100 (VSM).
Audio Part
I2S audio are sent from the analog board to IC7703
DSP56362 (Audio Digital Signal Processor) via connector
1602. The DSP compresses I2S audio data into an AC3/
MPEG1 audio stream which is fed to IC7100 (VSM).
Front-End I2S
IC7100 (VSM) interfaces directly to the different hardware
modules such as Basic Engine, MPEG encoder IC7410,
MPEG decoder IC7202 (Sti5505) and buffers the data
streams that are coming from or going to these hardware
modules.
In IC7100 (VSM), the video MPEG2 stream and the audio
AC3/MPEG1 stream are multiplexed into a I2S packetized
stream. The serial data are sent to the Basic Engine to be
recorded.
9.5.5
During record mode, the audio clock ACC_ACLK_OSC is
generated by IC7806 (PLL) because then, the audio clock
must be sychronized with the incoming video (VIP_FID) from
the VIP.
During playback mode, the audio clock ACC_ACLK_PLL is
generated by the clock synthesizer IC7800 (MK2703).
Both ACC_ACLK_OSC and ACC_ACLK_PLL are fed to the
VSM. This IC selects the appropriate clock fo the audio
decoder. From the incoming audio clocks, the VSM derives
the I2S audio encoder clocks AE_BCLK and AE_WCLK.
9.5.6
9.5.7
Control signal IRESET_DIG, controlled by the
microprocessor on the analog board is sent to the RESET
LOGIC circuit.
• IRESET_DIG = Low in standby mode
• IRESET_DIG = High: the whole system is reset and the
Digital board is waked up.
9.5.8
I2C Bus
Sti5505 is master of the I2C bus. The following IC's are
controlled by the I2C bus:
• IC7200 NVRAM
• IC7703 DSP56362
• IC7410 EMPIRE
• IC7552 VIP
• IC7900 Programmed Input/Output: LOAD_BE,
LOAD_DVN, ANA_WE, L3_STROBE.
• IC7917 Programmed Input/Output:
CENTRE_ON_STEREO, ADC_ENABLEN
9.5.9
S2B Interface
The S2B interface between the Host decoder Sti5505 and
the Servo processor MACE3 controls the Basic Engine
during record and playback mode.
9.5.4
RESET
Playback Mode
During playback, the serial data from the Basic Engine pass
through the VSM and are sent to the Sti5505 via the serial
front-end I2S interface.
The Sti5505 is a MPEG & Audio/video decoder and has the
following outputs:
To the analog board:
• analog video RGB, YC, CVBS
• I2S audio (PCM format)
• SPDIF audio (digital audio output)
To the Progressive scan board:
• digital video YC(7:0).
9.5.3
ON/OFF
The digital board is not powered in standby mode. Control
signal ION, coming from the analog board, will enable the
PSU and power the digital board.
• ION = High: the digital board is in powered down standby
mode
• ION = Low: the power supply to the digital board is
enabled
Loop-Through
The multiplexed audio and video stream in the VSM is fed
back via the parallel front-end interface to IC7202 (Sti5505).
This IC decodes the MPEG stream into analog video and I2S
audio. The video and audio signals are routed to the analog
board via connectors 1601 and 1602. During recording, the
recorded signal is present at the outputs of the analog board.
9.5.2
Audio Clock
System Clock
System clock of VSM and Sti5505 (27MHz) is generated by
oscillator 7802.
EMI Bus
The following IC's are connected to the External Memory
Interface bus (EMI) which functions as system bus:
• IC7302 and 7304: Flash memories which contain the
application and diagnostic software
• IC7300 and 7301: DRAM's .
• IC7100: VSM
• IC7703: DSP56362: only for downloading the microclock
into the IC
• IC7202: MPEG AV Decoder
1902
3
1
SERVO BOARD
SERVO BOARD
BE_TXD
BE_RXD
BE_CPR
BE_SUR
BE_IRQn
8
FRONT-END
I2S
5
RESETN_BE
BE_FAN
BE_LOADN 8
S2B
PLL
74HCT9046AD
ACC_PWM VIP_FID
7806
7
AC3/MPEG1
2M*16
FLASH
7302
7304
2M*16
DRAM
FRONT END INTERFACE (PARALLEL OR I2S)
8MHz
OSC.
AE_DATAO
7300
7301
EMI_D(7:0)
EMI_A(3:1)
EMI_CONTROL
DSP_A(15:0)
DSP_D(23:0)
DSP_EXT BUS CONTROL
AE_BCLK
AE_WCL
DSP56362
128K*24
SRAM
SAA6750
EMPIRE
VE_M_D(63:0)
VE_M_A(8:0)
VE_M_CTRL
256K*64
DRAM
AUDIO ENCODER CLOCKS
VIDEO MPEG2
2
CTRL
5
8
AUDIO DECODER CLOCK
EMI_D(15:0) FRONT_END I2S AE_DATAO
EMI_A(21:1) D_PAR_D(7:0)
EMI_CTRL
AD_ACLK
D_PAR_CTRL
VIP_YUV(7:0)
DSn
DTACKn
VE_DATA(15:0)
ACC_ACLK_OSC
5
7100
ACC_PWM
VIP_FID
VERSATILE
STREAM
MANAGER
4
UART2
UART1
SYSCLK_VSM
VIP_ICLK
4
AE_BCLK
AE_WCL
ACC_ACLK_PLL
BE_BCLK
BE_WCLK
BE_DATA_RD
BE_DATA_WR
BE_SYNC
BE_FLAG
BE_V4
VSM_M_A(13:0)
VSM_M_D(15:0)
VSM_M_CTRL
4M*16
SDRAM
7101
4
7401
7410
SCL
SDA
7703
7702
VIP_ICLK
VIP_FID
2
8
NVRAM
I2C
SCL
SDA
SCL
SDA
EMI_D(15:0)
EMI_A(21:1)
EMI_CONTROL
BE_TXD
BE_RXD
BE_CPR
BE_SUR
BE_IRQn
D_PAR_D(7:0)
D_PAR_CTRL
FRONT-END I2S
AD_ACLK
I2C
SCL
SDA
SCL
SDA
7552
MK2703S
7800
2M*16
SDRAM
7306
YC(7:0)
5505_HS
ODD_EVEN
HD_M_AD(11:0)
HD_M_DQ(15:0)
HD_M_CTRL
STi5505
AD_BCLK
AD_DATAO
AD_WCLK
AD_SPDIF
R_OUT
G_OUT
B_OUT
C_OUT
CVBS_OUT
Y_OUT
7202
SYSCLK_5505
1
6
7307
CLOCK
BUFFER
27MHz
OSC
7802
RESETN_5505
RESETN_VIP
RESETN_VSM
RESETN_BE
RESETN_DSP
RESETN_DVIO
5
6
DIGITAL VIDEO
1
BE_FAN
RESET
LOGIC
VIDEO
FILTER
ANALOG VIDEO
8
7913
-5V
+5V
+12V
+3V3
6
ION
1900
1603
1200
1602
1601
1600
9.
CL 16532095_117.eps
150801
+3V3
6
I2C
SYSCLK_PS
AD_ACLK
AE_DATAI
MUTEN
AE_BCLK
AE_WCL
R_OUT_B
G_OUT_B
B_OUT_B
C_OUT_B
CVBS_OUT_B
Y_OUT_B
IRESET_DIG
RESET
8
V_IN
U_IN
Y_IN
C_IN
CVBS_Y_IN
8
ION
IRESET_DIG
ANA_WE
RS232 GATEWAY TO ANALOG BOARD
AUDIO PCM I2S & SPDIF
ANALOG VIDEO
8
7801
CENTRE_ON_STEREO
ADC_ENABLEN
SEL_ACLK2
L3_STROBE
BE_LOADN 1
LOAD_DVN
ANA_WE
SYSCLK_VSM
7917
7900
SEL_ACLK1
PIO
PIO
V_IN_7118
R_IN_7118
U_IN_7118
B_IN_7118
Y_IN_7118
G_IN_7118
C_IN_7118
CVBS_Y_IN_7118_A
CVBS_Y_IN_7118_B
CVBS_Y_IN_7118_C
8
MPEG
AV
DECODER
1
1501
RESETN_DIVIO
ACC_ACLK_PLL
I2C
I2C
SAA7118
VIP
DV_IN_DATA(7:0)
DV_IN_VS
DV_IN _HS
DV_IN_CLK
8
LOAD_DVN
DIVIO BOARD
SCL
SDA
VIP_YUV(7:0)
I2C
7200
DIGITAL VIDEO (CCIR656)
VIP_HS
VIP_FID
VIP_VS
VIP_ICLK
24M576
RS232 DIVIO GATEWAY
CLOCK & SYNC
1
EMI BUS
6
AD_ACLK
AE_DATAI
7700
7701
SCL
SDA
VIP_YUV(7:0)
VIP_HS
VIP_VS
VIP_ICLK
7400
7402
7403
5
I2C BUS
ANALOG
BOARD
ANALOG
BOARD
ANALOG
BOARD
PROGRESSIVE
SCAN
SERVICE
INTERFACE
Figure 9-8
POWER SUPPLY
BLOCK DIAGRAM DIGITAL BOARD
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
GB 171
GB 172
9.
DVDR1000 /0x1 /691
9.6
Divio Board
9.6.1
Short Description of the Module:
Circuit-, IC Descriptions and List of Abbreviations
171 DVD+RW recorders. Input is a stream from a DVcamcorder IEEE1394. Outputs are CCIR656 Video and
Analog audio (L+R). A serial control interface is present.
The following picture shows the location of the DVIO Module
inside the DVDR set.
The DVIO Module is a decoder for DV streams. The module
is intended for the Philips DVDR1000/001 en DVDR1000/
ADC (analog PCB)
LED
IEEE1394
camcorder
Front DV PCB
Analog
audio L+R
Digital
Audio I2S
Audio
Encoder
(dig. PCB)
On/Off
DVIO Module
Digital video
CCIR656
IEEE1394
Control Misc.
Video
Encoder
(dig. PCB)
Control RS232
Host decoder STi5505
(dig. PCB)
CL 16532095_118.eps
150801
Figure 9-9
Figure 9-10
LED
INPUT
1101
PDI1394
P11A
PHY
11.05 MHz
RXD
TXD
RTSN
CTSN
Microprocessor
P89C51RD
2 MICROPROCESSOR
24.576 MHz
4
Isolated domain
SERIAL INTERFACE
7203
7101
EXP
7200
uP BUS
PDI1394
L21
LINK
SRAM
7103
7307
Tuneable audio clock
(+/- 256 x fs)
Tuneable clock
(+/- 27Mhz)
7308
7201
9
LINK DATA
CLOCKGENAUD
CLKAUDTMP
CLOCKGENVID
LINK CONTROLE
DV CODEC
NW701
DRAM
7300
ROM
27 MHz
7304
7308
AUD_SDO
AUD_SDI
7404
7402 - 7403
AUD_SDI
2
DIGITAL
VIDEO AUD_BCLK
STREAM AUD_WS
FPGA/EPLD
CLOCK27M
(SYSTEM CLOCK)
HOST
AD
BUS
CLK27M_DV
CLK27M_CON
4 DV CODEC
DV_HS_OUT
DV_VS
AUD_SDI
AUD_BCLK
AUD_WS
AUDIO DAC
UDA1334ATS
7301-7302, 7305-7306
SRAM
2
YUV(7:0)
CLOCK DELAY
7500
5 AUDIO & VIDEO OUTPUT
2
7602
ANALOG AUDIO RIGHT
ANALOG AUDIO LEFT
TRISTATE BUFFER
7505
DV_HS_OUT
DV_VS
CL 16532095_119.eps
150801
SERIAL INTERFACE
AUD_SDI
AUD_BCLK
AUD_WS
YUV(7:0)
CLK27M
1501
1500
9.6.2
1 1394 INTERFACE
3 FIFO & CONTROL
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 173
Block Diagram
GB 174
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Functional Description
SOFTWARE RESET
IEEE1394 Interface
The 1394 interface consists of a PDI1394P11A physical layer
and a PDI1394L21 link layer. The physical layer has its own
isolated power supply. It has the following features:
• S200 operation (200 megabit per second)
• One i.Link port (4 pin)
• 1nF isolation barrier between link and phy
• AV link port
• Isolated power supply for phy
Micro-Controller
The 89C51RD processor has a 8051 cpu with the following
extra features:
• 64 kilobyte of flash memory as program memory
• 1 kilobyte of internal data memory
• watchdog timer
• PCA outputs
• Power control modes
• Speed allowed up to 33 MHz but used at 22.1184 MHz
• On board ISP(In Circuit Programming) functionality
ISP
By use of In Circuit Programming, it is possible to update the
software of the DVIO board that is in the 89C51RD+. ISP can
be made active by resetting the processor and keeping the
ISPN pin low during reset. During ISP, the ISPN signal on the
board has to be kept low. This because the ISPN signal not
only drives the PSEN pin low, but will also put 12V instead of
5V on the VPP pin. When the ISP mode is active, the new
program can be sent to the microprocessor through the serial
port.
89C51RD+
NRESET
FPGA
PDI1394L21
DVIO BOARD
The DVIO module consists of the following blocks (see
blockdiagram):
1. IEEE1394 Interface
• PDI1394P11A (7101)
• PDI1394L21(7103)
2. Micro-controller
• 89C51RD(7203)
• 32kb RAM(7201)
3. FIFO and Control
• FPGA/EPLD(7308)
• SRAM(7301, 7302, 7305, 7306)
• Clock generation(7307, 7308)
– Independently tuneable audio and video clock,
implemented with FPGA and PLL
4. DV-Codec
• NW701(7404)
• DRAM(7402, 7403)
5. Audio & Video output
• Audio DAC UDA1334ATS(7602)
• Clock delay(7500)
• Tristate buffer(7505)
DIGITAL BOARD
9.6.3
9.
NW701
CL 16532095_120.eps
150801
Figure 9-11
The board reset NRESET will reset the whole board, and the
software reset can reset everything except the
microprocessor itself. Power-on reset is implemented by
adding pull-ups and pull-downs to the reset inputs of the
devices. Since the FPGA will tri-state all the pins during
configuration, reset is active during configuration time. After
configuration of the FPGA, the reset signals are driven
inactive. The NRESET signal is used to reset the DVIO
board. After reset, the tri-state buffers to connector 1500 are
disabled.
Clock Circuit
There are 2 clocks to consider in the system, this is the video
clock and the audio clock. These two clocks do not have a
relation, so these clocks must be considered independently.
The video clock is approximately 27 MHz. When data is
flowing from an external source that is supposed to have the
same frequency, it does not have exactly the same clock.
Because of this, buffers may under-run of over-run. Since the
clock can not be directly recovered from the 1394 interface,
there has to be another solution. This solution is a tuneable
clock that is adjusted to the required frequency to process at
the rate of the incoming data.
The hardware implementation of such a tuneable clock is as
follows:
ClockGen
Raw clock
PLL
(CY2071)
regular clock
slowloopfilter
(FPGA)
CL 16532095_121.eps
150801
Figure 9-12
Fifo & Control
In decode mode, an isochronous AV-stream is flowing
through the IEEE1394 Interface into the FPGA. The FPGA
stores the data in a FIFO buffer (ping-pong buffer type, i.e. 2
buffers that can hold one whole frame each).
Reset
The FPGA controls the reset signals on the board. This has
the advantage that it is possible to reset the board both from
software and hardware.
The same can be applied for the audio clock. For this clock,
a frequency of 8.192 MHz, 11.2896 MHz or 12.228 MHz is
required. This depends on the sample-rate of the audio
signal.
DV Codec
The AV-data will go from the FIFO to the NW701. The
NW701 decodes the stream into video data in 656 format and
audio data in I2S format.
The microprocessor has the ability to read the status
registers of the NW701 through the FPGA. By reading these
registers, extra data from the DV stream, that is not decoded
into audio or video, can be sent to the digital board using pin
TXD of the serial interface. This data includes time stamp
and some more.
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 175
Audio & Video Output
The audio I2S data are sent to audio DAC UDA1334. Analog
audio left and right signals are connected to the analog
board.
The tristate buffer enables the digital video stream to the
Video Input Processor on the digital board when the DV
source is selected.
The clock delay synchronizes the AV clock with the AV data
at the output.
9.7
Progressive Scan
9.7.1
Block Diagram
P2
7107
SDRAM
64M*32
DATA
ADDRESS
CTRL
5
1100
P1
7104
7101
ADV7196
VIDEO DENC
FLI2200
VIDEO
DEINTERLACER
LINE DOUBLER
DIGITAL VIDEO
Y_OUT(9:0)
VIDEO
AMPLIFIER
FILTERS
7105
DAC_A
LOW
PASS
DAC_B
LOW
PASS
DAC_C
LOW
PASS
Y
U_OUT(9:0)
YUV_IN(7:0)
7106
V_OUT(9:0)
Cr
7106
2
HSOUT
VSOUT
HS_IN
7102-7100
VS
EXTRACTOR
CLK_27MHZ
Cb
SCL
SDA
VS_IN
FRAME_IN
CLK_27MHZ
SCL
SDA
CLK_27MHZ
I2C BUS
RESETN_5505
CL 16532095_122.eps
150801
Figure 9-13
1102
GB 176
9.7.2
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Description
The progressive scan module, used in the first generation
DVD+RW player, is built around the SAGE Fli2200 deinterlacer / line doubler (7101). This I2C controlled deinterlacer uses a 64Mbit SDRAM (32bit x 2M) to perform high
quality deinterlacing (meshing). The de-interlacer gets his
digital YUV input data from the STi5505 (7202), located on
the digital board. Via a 24-poled flex, digital video, power
supply, reset and I2C is connected to the board. The format
of the digital YUV input to the SAGE is CCIR656 with
separated Hsync, Vsync and odd/even signal running on
27Mhz.
Because the STi5505 doesn't have a Vsync output the odd/
even output of this IC has to be translated to a Vsync signal.
Some glue logic has been added to extract the vertical sync.
The glue logic circuit consists of Flip-Flop IC 74HC74D
(7102) and EXOR 74LVC86 (7100). The next diagram shows
how the vertical sync is extracted.
FRAME_IN
(odd/even)
HS_IN
pin 6 IC7102
VS_IN
CL 16532095_123.eps
150801
Figure 9-14
The output of the de-interlacer (4:4:4 progressive video) is
fed to the Analog Devices AD7196 MacroVision compliant
DENC (7104).
The YUV current output of the DENC is fed via a low pass
filter to the single supply output opamps AD8061/8062
(7105-7106). The analog video is fed via a 7 poled flex to the
analog board where the YUV 2FH cinch connectors are
located.
The board uses as power supply 3.3V and 5V. The 2,5V
power required for the SAGE is derived locally from the 3.3V
with voltage regulator LF25C (7103).
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.8
IC’s Analogue Board
9.8.1
IC7001: UDA1328T
Multi-channel filter DAC
1
1.1
9.
GB 177
UDA1328T
FEATURES
General
• 2.7 to 3.6 V power supply
• 5 V tolerant TTL compatible inputs
• Selectable control via L3 microcontroller interface or via
static pin control
• Multi-channel integrated digital filter plus non-inverting
Digital-to-Analog Converter (DAC)
• Supports sample frequencies between 5 and 100 kHz
2
APPLICATIONS
This multi-channel DAC is eminently suitable for DVD-like
applications in which 5.1 channel encoded signals are
used.
• Digital silence detection (output)
• Slave mode only applications
• No analog post filtering required for DAC
• Easy application.
3
1.2
The UDA1328 is a single-chip 6-channel DAC employing
bitstream conversion techniques, which can be used either
in L3 microcontroller mode or in static pin mode.
Multiple format input interface
• I2S-bus, MSB-justified and LSB-justified format
compatible (in L3 mode)
• I2S-bus and LSB-justified format compatible
• 1fs input format data rate.
1.3
Multi-channel DAC
• 6-channel DAC with power on/off control
• Digital logarithmic volume control via L3; volume can be
set for each of the channels individually
• Digital de-emphasis for 32, 44.1, 48 and 96 kHz fs via
L3 and, for 32, 44.1 and 48 kHz in static mode
• Soft or quick mute via L3
• Output signal polarity control via L3 microcontroller
interface.
1.4
GENERAL DESCRIPTION
The UDA1328 supports the I2S-bus data format with word
lengths of up to 24 bits, the MSB-justified data format with
word lengths of up to 24 bits and the LSB-justified serial
data format with word lengths of 16, 18, 20 and 24 bits.
All digital sound processing features can be controlled with
the L3 interface e.g. volume control, selecting digital
silence type, output polarity control and mute. Also system
features such as power control, digital silence detection
mode and output polarity control.
Under static pin control, via static pins, the system clock
can be set to either 256fs or 384fs support, digital
de-emphasis can be set, there is digital mute and the
digital input formats can also be set.
Advanced audio conÞguration
• 6-channel line output (under L3 volume control)
• A stereo differential output (channel 1 and channel 2) for
improved performance
• High linearity, wide dynamic range, low distortion.
4
ORDERING INFORMATION
TYPE
NUMBER
UDA1328T
PACKAGE
NAME
SO32
DESCRIPTION
plastic small outline package; 32 leads; body width 7.5 mm
VERSION
SOT287-1
GB 178
9.
Circuit-, IC Descriptions and List of Abbreviations
DVDR1000 /0x1 /691
Multi-channel filter DAC
6
UDA1328T
BLOCK DIAGRAM
handbook, full pagewidth
VDDD
VSSD
21
20
9
UDA1328T
23
BCK
WS
DATAI12
DATAI34
DATAI56
10
24
11
12
CONTROL
INTERFACE
DIGITAL
INTERFACE
13
25
18
19
14
17
26
VOLUME/MUTE/DE-EMPHASIS
STATIC
MUTE
DEEM1
DEEM0
L3CLOCK
L3DATA
L3MODE
DS
INTERPOLATION FILTER
TEST1
SYSCLK
VOUT1P
VOUT1N
27
8
16
22
6-CHANNEL NOISE SHAPER
DAC
28
DAC
31
DAC
VOUT3
1
2
5
7, 15
3
30
MGR979
VDDA
VOUT2P
VOUT2N
n.c.
VOUT4
DAC
4
6
TEST2
DAC
DAC
VOUT5
32
29
TEST3
VSSA
Vref
VOUT6
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
Multi-channel filter DAC
7
9.
UDA1328T
PINNING
SYMBOL
PIN
DESCRIPTION
VOUT3
1
channel 3 analog output
VOUT4
2
channel 4 analog output
VSSA
3
analog ground
VOUT5
4
channel 5 analog output
VOUT6
5
channel 6 analog output
VDDA
6
analog supply voltage
n.c.
7
not connected (reserved)
TEST3
8
test output 3
VOUT3 1
32 VOUT2P
VOUT4 2
31 VOUT2N
STATIC
9
static mode/L3 mode switch input
BCK
10
bit clock input
WS
11
word select input
DATAI12
12
data input channel 1 and 2
DATAI34
13
data input channel 3 and 4
DATAI56
14
data input channel 5 and 6
n.c.
15
not connected (reserved)
SYSCLK
16
system clock: 256fs, 384fs,
512fs and 768fs
L3MODE
17
L3 mode selection input
L3CLOCK
18
L3 clock input
L3DATA
19
L3 data input
VSSD
20
digital ground
VDDD
21
TEST2
GB 179
handbook, halfpage
30 Vref
VSSA 3
VOUT5 4
29 VOUT1N
VOUT6 5
28 VOUT1P
VDDA 6
27 TEST1
26 DS
n.c. 7
25 DEEM0
TEST3 8
UDA1328T
24 DEEM1
STATIC 9
BCK 10
23 MUTE
WS 11
22 TEST2
DATAI12 12
21 VDDD
digital supply voltage
DATAI34 13
20 VSSD
22
test output 2
DATAI56 14
19 L3DATA
MUTE
23
static mute control input
DEEM1
24
DEEM control 1 input
(static mode)
DEEM0
25
L3 address select
(L3 mode)/DEEM control 0 input
(static mode)
DS
26
digital silence detect output
TEST1
27
test input 1
VOUT1P
28
channel 1 analog output P
VOUT1N
29
channel 1 analog output N
Vref
30
DAC reference voltage
VOUT2N
31
channel 2 analog output N
VOUT2P
32
channel 2 analog output P
n.c. 15
18 L3CLOCK
SYSCLK 16
17 L3MODE
MGR980
Fig.2 Pin configuration.
GB 180
9.
Circuit-, IC Descriptions and List of Abbreviations
DVDR1000 /0x1 /691
Multi-channel Þlter DAC
8
UDA1328T
8.4
FUNCTIONAL DESCRIPTION
8.1
System clock
The UDA1328 operates in slave mode only, this means
that in all applications the system must provide the system
clock. The system frequency is selectable. The options are
256fs, 384fs, 512fs and 768fs for the L3 mode and 256fs or
384fs for the static mode. The system clock must be
frequency-locked to the digital interface signals.
It should be noted that the UDA1328 can operate from
5 to 100 kHz sampling frequency (fs). However in 768fs
mode the sampling frequency must be limited to 55 kHz.
8.2
Application modes
Operating mode can be set with the STATIC pin, either to
L3 mode (STATIC = LOW) or to the static mode
(STATIC = HIGH). See Table 1 for pin functions in the
static mode.
Table 1
Mode selection in the static mode
PIN
L3 MODE
STATIC MODE
L3CLOCK
L3CLOCK
clock select
L3MODE
L3MODE
SF1(1)
L3DATA
SF0(1)
MUTE
X(2)
MUTE
DEEM1
X(2)
DEEM1
DEEM0
L3ADR
DEEM0
L3DATA
Notes
1. SF1 and SF0 are the Serial Format inputs (2-bit).
2. X means that the pin has no function in this mode and
can best be connected to ground.
8.3
Interpolation Þlter (DAC)
The digital filter interpolates from 1 to 128fs by cascading
a half-band filter and a FIR filter, see Table 2. The overall
filter characteristic of the digital filters is illustrated in Fig.3,
and the pass-band ripple is illustrated in Fig.4. Both figures
are with a 44.1 kHz sampling frequency.
Table 2
Interpolation Þlter characteristics
ITEM
CONDITION
VALUE (dB)
Pass-band ripple
0 to 0.45fs
±0.02
>0.55fs
−55
0 to 0.45fs
>114
−
−3.5
Stop band
Dynamic range
DC gain
Digital silence detection
The UDA1328 can detect digital silence conditions in
channels 1 to 6, and report this via the output pin DS. This
function is implemented to allow for external manipulation
of the audio signal in the absence of program material,
such as muting or recorder control.
An active LOW output is produced at the DS pin if the
channels selected via L3 or for all channels in static mode,
carries all zeroes for at least 9600 consecutive audio
samples (equals 200 ms for fs = 48 kHz). The DS pin is
also active LOW when the output is digitally muted either
via the L3 interface or via the STATIC pin.
In static mode all channels participate in the digital silence
detection. In L3 mode control each channel can be set,
either to participate in the digital silence detection or not.
8.5
Noise shaper
The 3rd-order noise shaper operates at 128fs. It shifts
in-band quantization noise to frequencies well above the
audio band. This noise shaping technique enables high
signal-to-noise ratios to be achieved. The noise shaper
output is converted into an analog signal using a Filter
Stream DAC (FSDAC).
8.6
Filter stream DAC
The FSDAC is a semi-digital reconstruction filter that
converts the 1-bit data stream of the noise shaper to an
analog output voltage. The filter coefficients are
implemented as current sources and are summed at
virtual ground of the output operational amplifier. In this
way very high signal-to-noise performance and low clock
jitter sensitivity is achieved. No post-filter is needed due to
the inherent filter function of the DAC. On-board amplifiers
convert the FSDAC output current to an output voltage
signal capable of driving a line output.
The output voltage of the FSDAC scales proportionally
with the power supply voltage.
8.7
Static mode
The UDA1328 is set to static mode by setting the STATIC
pin HIGH. The function of 6 pins of the device now get
another function as can be seen in Table 1.
8.7.1
SYSTEM CLOCK SETTING
In static mode pin 18 (L3CLOCK) is used to select the
system clock setting. When pin 18 is LOW, the device is in
256fs mode, when pin 18 is HIGH the device is in 384fs
mode.
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
Multi-channel filter DAC
8.7.2
8.8
In static pin mode the pins DEEM0 and DEEM1 control the
de-emphasis mode; see Table 3.
DEEM1
DEEM0
No de-emphasis
0
0
32 kHz de-emphasis
0
1
44.1 kHz de-emphasis
1
0
48 kHz de-emphasis
1
1
DIGITAL INTERFACE FORMATS
In static pin mode the digital audio interface formats can be
selected via pin 17 (SF1) and 19 (SF0). The following
interface formats can be selected (see also Table 4):
• I2S-bus with data word length of up to 24 bits
• LSB-justified format with data word length of
16, 20 or 24 bits.
Table 4
L3 mode
The device is set to L3 mode by setting the STATIC pin to
LOW. The device can then be controlled via the L3
microcontroller interface (see Chapter 9).
De-emphasis control
DEEM MODE
8.7.3
GB 181
UDA1328T
DE-EMPHASIS CONTROL
Table 3
9.
Input format selection in the static mode
SF1
SF0
I2S-bus
INPUT FORMAT
0
0
LSB-justiÞed 16 bits
0
1
LSB-justiÞed 20 bits
1
0
LSB-justiÞed 24 bits
1
1
It should be noted that the digital audio interface holds that
the BCK frequency can be 64 times the WS maximum
frequency, or fBCK ≤ 64 × fWS
8.8.1
DIGITAL INTERFACE FORMATS
The following interface formats can be selected in the
L3 mode:
• I2S-bus with data word length of up to 24 bits
• MSB-justified with data word length of up to 24 bits
• LSB-justified format with data word length of 16, 18,
20 or 24 bits.
8.8.2
L3 ADDRESS
The UDA1328 can be addressed via the L3 microcontroller
interface using one of two addresses. This is done in order
to individually control the UDA1328 and other Philips
DACs or CODECs via the same L3 bus.
The address can be selected using pin 25 (DEEM0) in
L3 mode. When pin 25 is set LOW, the address is 000100.
When pin 25 is set HIGH the address is 000101.
GB 182
9.8.2
9.
DVDR1000 /0x1 /691
IC7004: UDA1360TS
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 183
GB 184
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 185
GB 186
9.8.3
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
IC7430: BA7660FS
3-channel 75Ω driver
BA7660FS
The BA7660FS is a 75Ω driver with a 6dB amplifier and three internal circuits, and provides 75Ω drive of composite
Y signals and C signals, as well as RGB signals. Each load is capable of driving two circuits, and a sag correction
function reduces the capacitance of the output coupling capacitor.
The input voltage is within a range of 0V to 1.5V, enabling direct connection of ordinary D / A converter output. An
internal power-saving circuit is also included which provides simultaneous muting on all three channels, and output
pin shorting protection.
•
Applications
DVDs, set top boxes and other digital video devices
•
Features
1) Can be coupled directly to D / A converter output.
2) Operates at a low power consumption (115mW typ.).
3) Internal output muting circuit.
4) Internal power-saving circuit.
5) Internal output protection circuit.
6) An internal sag correction function makes it possible
to reduce the capacitance of the output coupling
capacitor.
7) Each load is capable of driving two circuits.
8) The compact 16-pin SSOP-A package is used.
•Absolute maximum ratings (Ta = 25C)
Parameter
Symbol
Power supply voltage
Vcc
8
V
Power dissipation
Pd
650
mW
Topr
– 25 ~ + 75
°C
Tstg
– 55 ~ + 125
°C
Operating temperature
Storage temperature
Limits
Unit
•Recommended operating conditions (Ta = 25C)
Parameter
Operating power supply voltage
Symbol
Min.
Typ.
Max.
Unit
Vcc
4.5
5.0
5.5
V
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
•Block diagram
MUTE 1
16 VCC
15 OUTA1
INA
2
GND
3
INB
4
GND
5
12 OUTB2
N.C.
6
11 N.C.
INC
7
GND
8
6dB
75Ω
14 OUTA2
6dB
6dB
75Ω
75Ω
13 OUTB1
10 OUTC1
9 OUTC2
MUTE (1pin)
H
3ch MUTE
L
NORMAL
9.
GB 187
GB 188
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
•Pin descriptions and input / output circuits
Pin. No
Pin name
IN
OUT
Reference
voltage
Equivalent circuit
Function
Muting control
1
MUTE
—
15k
—
If MUTE (pin 1) is set to HIGH, muting
is carried out simultaneously on all
three channels.
8k
Signal input
2
4
7
INA
INB
INC
3
5
8
GND
14
12
9
OUTA2
OUTB2
OUTC2
15
13
10
OUTA1
OUTB1
OUTC1
16
VCC
—
—
—
—
0V
Input
video
RGB,
within
(typ.).
signals consist of composite
signals, Y signals, C signals,
and others. The input level is
a range of 0 to 1.3 (min.) to 1.5
Ground
GND
0.9V
Signal output
14pin
12pin
9pin
The signal output level is (0.9 + 2 ×
input voltage [V]). Pins 9, 12, and 14
are the pins for sag correction. If pins
10, 13, and 15 are set to 0.2V or less,
the protective circuit is triggered and
the power-saving mode is accessed.
—
0.95V
15pin
13pin
10pin
Vcc
—
—
5.0V
Power supply
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.8.4
9.
GB 189
IC7507: STV6410
STV6410
AUDIO/VIDEO SWITCH MATRIX
..
.
..
..
..
.
..
.
..
.
I2C BUS CONTROL
STANDBY MODE
VIDEO SECTION
5 CVBS INPUTS, 4 CVBS OUTPUTS (ONE
WITH SELECTABLE CHROMA TRAP FILTER)
5 Y/C INPUTS, 3 Y/C OUTPUTS
6dB GAIN ON ALL CVBS/Y AND C OUTPUTS
1 Y/C ADDER
2 RGB/FB INPUTS, 1 RGB/FB OUTPUT WITH
6dB ADJUSTABLE GAIN
VIDEO MUTING ON ALL THE OUTPUTS
3 SLOW BLANKING INPUTS/OUTPUTS
SYNC BOTTOM CLAMP ON ALL CVBS/Y
AND RGB INPUTS, AVERAGE ON C INPUTS
BANDWIDTH : 15MHz
CROSSTALK : 60dB Typ.
AUDIO SECTION
5 STEREO INPUTS, 4 STEREO OUTPUTS
(TWO WITH LEVEL ADJUSTMENT)
MONO SOUND OUTPUT
MONO SOUND CAPABILITY ON TV OUTPUTS
AUDIO MUTING ON ALL THE OUTPUTS
TQFP64
(Plastic Quad Flat Pack)
ORDER CODE : STV6410D
DESCRIPTION
The STV6410 is a highly integrated I2C bus-controlled audio and video switch matrix, optimized for
use in digital set-top box applications. It provides
all the audio and video routings required in a full
three scart set-top box design. It is also fully pin
compatible with STV6411, the two scart version.
December 1997
1
GB 190
9.
Circuit-, IC Descriptions and List of Abbreviations
DVDR1000 /0x1 /691
STV6410
YCVBSOUT_AUX
GNDV2
COUT_AUX
VCC3
FILTER
GNDV3
VOUT_RF
AOUT_RF
YCVBSOUT_VCR
LOUT_AUX
COUT_VCR
ROUT_AUX
YCVBSOUT_TV
LOUT_TV
RCOUT_TV
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
FBOUT_TV
17
64
ROUT_TV
FBIN_AUX
18
63
GOUT_TV
FBIN_ENC
19
62
LOUT_VCR
ADD
20
61
BOUT_TV
SCL
21
60
ROUT_VCR
SDA
22
59
LOUT_CINCH
VCC12
23
58
ROUT_CINCH
YCVBSIN_AUX
24
57
GNDA
43
44
45
46
47
48
GIN_ENC
LIN_ENC
BIN_ENC
RIN_VCR
CIN_VCR
LIN_VCR
RIN_ENC
YCVBSIN_VCR
49
42
50
32
RCIN_ENC
31
BIN_AUX
41
SLB_AUX
LIN_STB
V REF
40
51
CIN_ENC
30
39
YCVBSIN_TV
GIN_AUX
RIN_STB
52
38
29
37
LIN_TV
GNDV1
YIN_ENC
53
RIN_AUX
28
36
CIN_TV
RCIN_AUX
YCVBSIN_ENC
54
35
27
LIN_AUX
V CCA
SLB_VCR
34
RIN_TV
55
33
56
26
VCC1
25
CVBSIN_STB
SLB_TV
YIN_AUX
6410-01.EPS
VCC2
16
PIN CONNECTIONS
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
2
Symbol
RCOUT_TV
LOUT_TV
YCVBSOUT_TV
ROUT_AUX
COUT_VCR
LOUT_AUX
YCVBSOUT_VCR
AOUT_RF
VOUT_RF
GNDV3
FILTER
VCCV3
COUT_AUX
GNDV2
YCVBSOUT_AUX
Description
Red/chroma Output, to TV Scart
Audio Left Output, to TV Scart
Y/CVBS Output, to TV scart
Audio Right Output, to AUX Scart
Chroma Output, to VCR Scart
Audio Left Output, to AUX Scart
Y/CVBS Output, to VCR Scart
Audio (L+R) Output to RF Modulator
Video (CVBS) Output to RF Modulator
Video Switches Ground 3
Chroma Trap Filter
Video Switches Supply 3 (8V)
Chroma Output, to AUX Scart
Video Switches Ground 2
Y/CVBS Output, to AUX Scart
6410-01.TBL
PIN LIST
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 191
STV6410
PIN LIST (continued)
Pin Number
Symbol
16
17
18
19
20
V CCV2
FBOUT_TV
FBIN_AUX
FBIN_ENC
ADD
Description
21
22
SCL
SDA
23
24
25
VCC12
YCVBSIN_AUX
SLB_TV
26
27
YIN_AUX
SLB_VCR
Y Input, from AUX Scart
Slow Blanking Input/Ouput from VCR
28
29
30
31
32
33
RCIN_AUX
GNDV1
GIN_AUX
SLB_AUX
BIN_AUX
V CCV1
Red/Chroma Input, from AUX Scart
Video Switches Ground 1
Green Input, from AUX Scart
Slow Blanking Input/Ouput from AUX
Blue Input, from AUX Scart
Video Switches Supply 1 (8V)
34
35
36
CVBSIN_STB
LIN_AUX
YCVBSIN_ENC
37
38
39
40
RIN_AUX
YIN_ENC
RIN_STB
CIN_ENC
Audio Right Input, from AUX Scart
Y Input, from Encoder
Audio Right Input, from STB
Chroma Input, from Encoder
41
42
43
LIN_STB
RCIN_ENC
RIN_ENC
Audio Left Input, from STB
Red/Chroma Input, from Encoder
Audio Right Input, from Encoder
44
45
46
47
48
49
50
51
GIN_ENC
LIN_ENC
BIN_ENC
RIN_VCR
CIN_VCR
LIN_VCR
YCVBSIN_VCR
V REF
Green Input, from Encoder
Audio Left Input, from Encoder
Blue Input, from Encoder
Audio Right Input, from VCR Scart
Chroma Input, from VCR Scart
Audio Left Input, from VCR
Y/CVBS Input from VCR Scart
Voltage Reference Decoupling
52
53
YCVBSIN_TV
LIN_TV
54
55
56
57
CIN_TV
V CCA
RIN_TV
GNDA
58
59
60
61
62
63
64
ROUT_CINCH
LOUT_CINCH
ROUT_VCR
BOUT_TV
LOUT_VCR
GOUT_TV
ROUT_TV
Video Switches Supply 2 (8V)
Fast Blanking Output, to TV Scart
Fast Blanking Input, from AUX Scart
Fast Blanking Input, from Encoder
I2C Bus IC Address Programmation
I2C Bus Clock
I2C Bus Data
Slow Blanking Power Supply (12V)
Y/CVBS Input from AUX Scart
Slow Blanking Input/Ouput from TV
CVBS Input from STB
Audio Left Input, from AUX Scart
Y/CVBS Input from Encoder
Y/CVBS Input, from TV Scart
Audio Left Input, from TV Scart
Chroma Input, from TV Scart
Audio Switches Supply (8V)
Audio right input, from TV Scart
Audio Switches Ground
6410-01.TBL
Audio Right Output, to CINCH
Audio Left Output, to CINCH
Audio Right Output, to VCR sCart
Blue Output, to TV Scart
Audio Left Output, to VCR Scart
Green Output, to TV Scart
Audio Right Output, to TV Scart
3
GB 192
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
STV6410
BLOCK DIAGRAM
STV6410
FB SWITCH
FBIN_ENC 19
4V
0V
17 FBOUT_TV
FBIN_AUX 18
RGB SWITCH
B_ENC
B_AUX
G_ENC
G_AUX
R/C_ENC
R/C_AUX
MUTE
BIN_ENC 46
BIN_AUX 32
GIN_ENC 44
6dB
61 BOUT_TV
6dB
63 GOUT_TV
6dB
1 RCOUT_TV
C SWITCH
R/C_AUX
R/C_ENC
C_ENC
C_VCR
MUTE
GIN_AUX 30
RCIN_ENC 42
RCIN_AUX 28
Y/CVBS SWITCH
CVBS/Y_AUX
CVBS/Y_ENC
CVBS/Y_VCR
CVBS_STB
Y_AUX
Y_ENC
MUTE
CIN_ENC 40
CIN_VCR 48
YCVBSIN_AUX 24
TRAP
11 FILTER
3 YCVBS/OUT_TV
6dB
C SWITCH
R/C_ENC
C_ENC
C_VCR
C_TV
MUTE
CIN_TV 54
Y/CVBS SWITCH
CVBS/Y_ENC
CVBS/Y_VCR
CVBS_STB
CVBS/Y_TV
Y_ENC
MUTE
YCVBSIN_ENC 36
YCVBSIN_VCR 50
CVBSIN_STB
9 VOUT_RF
6dB
34
6dB
13 COUT_AUX
6dB
15 YCVBSOUT_AUX
C SWITCH
R/C_ENC
C_ENC
C_TV
C_AUX
MUTE
5 COUT_VCR
6dB
Y/CVBS SWITCH
CVBS_STB
CVBS/Y_ENC
CVBS/Y_AUX
CVBS/Y_TV
6dB
Y_AUX
Y_ENC
MUTE
YCVBSIN_TV 52
YIN_AUX 26
YIN_ENC 38
7 YCVBSOUT_VCR
25 SLB_TV
SLOW BLANK,
I/O MONITOR
CINCHSWITCH
L_ENC
L_STB
L_TV
L_VCR
L_AUX
R_ENC
R_STB
R_TV
R_VCR
R_AUX
MUTE
LIN_ENC 45
LIN_STB 41
LIN_TV 53
LIN_VCR 49
-14dB
-14dB
0/6dB
27 SLB_VCR
31 SLB_AUX
59 LOUT_CINCH
0/6dB
58 ROUT_CINCH
AUX SWITCH
L_ENC
L_STB
L_TV
L_VCR
R_VCR
R_TV
R_STB
R_ENC
MUTE
LIN_AUX 35
RIN_ENC 43
RIN_STB 39
6 LOUT_AUX
4 ROUT_AUX
VCR SWITCH
L_ENC
L_STB
L_TV
L_AUX
R_ENC
R_STB
R_AUX
R_TV
MUTE
RIN_VCR 47
SCL 21
SDA 22
4
I2C BUS
DECODER
RIN_AUX 37
62 LOUT_VCR
60 ROUT_VCR
8 AOUT_RF
TV SWITCH
L_ENC
L_STB
L_VCR
L_AUX
R_AUX
R_VCR
R_STB
R_ENC
MUTE
-14dB
0/6dB
-14dB
0/6dB
STEREO/
MONO
2 LOUT_TV
64 ROUT_TV
6410-02.EPS
RIN_TV 56
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.8.5
IC7600: MSP3415D
9.
GB 193
GB 194
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 195
GB 196
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 197
GB 198
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 199
GB 200
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 201
GB 202
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.8.6
IC7703: TDA9818
9.
GB 203
GB 204
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 205
GB 206
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 207
GB 208
9.8.7
9.
DVDR1000 /0x1 /691
IC7803: TMP93C071
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 209
GB 210
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 211
GB 212
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 213
GB 214
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 215
GB 216
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.8.8
9.
GB 217
IC7990: STV5348
STV5348
.
.
.
.
.
..
.
.
..
.
COMPLETE TELETEXT AND VPS DECODER
INCLUDING AN 8 PAGE MEMORY ON A SINGLE CHIP
UPWARD SOFTWARE COMPATIBLE WITH
PREVIOUS SGS-THOMSON's MULTICHIP
SOLUTIONS (SAA5231, SDA5243, STV5345)
PERFORM PDC SYSTEM A (VPS) AND PDC
SYSTEM B (8/30/2) DATA STORAGE SEPARATLY
DEDICATED "ERROR FREE" OUTPUT FOR
VALID PDC DATA
INDICATION OF LINE 23 FOR EXTERNAL
USE
SINGLE +5V SUPPLY VOLTAGE
SINGLE 13.875MHz CRYSTAL
REDUCED SET OF EXTERNAL COMPONENTS, NO EXTERNAL ADJUSTMENT
OPTIMIZED NUMBER OF DIGITAL SIGNALS
REDUCING EMC RADIATION
HIGH DENSITY CMOS TECHNOLOGY
DIGITAL DATA SLICER AND DISPLAY
CLOCK PHASE LOCK LOOP
28 PIN DIP & SO PACKAGE
DESCRIPTION
The STV5348 decoder is a computer-controlled
teletext device including an 8 page internal memory. Data slicing and capturing extracts the teletext
information embedded in the composite video signal. Control is accomplished via a two wire serial
I2C bus . Chip address is 22h. Internal ROM provides a character set suitable to display text using
up to seven national languages. Hardware and
software features allow selectable master/slave
synchronization configurations. The STV5348 also
supports facilities for reception and display of current level protocol data.
DIP28
(Plastic Package)
ORDER CODE :
STV5348 West European
STV5348/H East European
STV5348/T Turkish & European
SO28
(Plastic Package)
ORDER CODE :
STV5348D West European
STV5348D/H East European
STV5348D/T Turkish & European
PIN CONNECTIONS
CVBS
1
28
CBLK
MA/SL
2
27
TEST
VDDA
3
26
VSSA
POL
4
25
VSSO
STTV/LFB
5
24
XTI
FFB
6
23
XTO
VSSD
7
22
VDDD
R
8
21
VCR/TV
G
9
20
RESERVED
B
10
19
DV
RGB REF
11
18
L23
BLAN
12
17
SDA
COR
13
16
SCL
ODD/EVEN
14
15
Y
GB 218
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Pin No
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Symbol
CVBS
MA/SL
VDDA
POL
STTV/LFB
FFB
VSSD
R
G
B
RGBREF
BLAN
COR
ODD/EVEN
Y
SCL
SDA
L23
DV
RESERVED
VCR/TV
VDDD
XTO
XTI
VSSO
VSSA
TEST
CBLK
BLOCK DIAGRAM
Function
Input
Input
Analog Supply
Input
Output / Input
Input
Ground
Output
Output
Output
Supply
Output
Output
Output
Output
Input
Input/ Output
Output
Output
Test
Input
Digital Supply
Crystal Output
Crystal Input
Ground
Ground
Test
Input / Output
Description
Composite Video Signal Input through Coupling Capacitor
Master/Slave Selection Mode
+5V
STTV / LFB / FFB Polarity Selection
Composite Sync Output, Line Flyback Input
Field Flyback Input
Digital Ground
Video Red Signal
Video Green Signal
Video Blue Signal
DC Voltage to define RGB High Level
Fast Blanking Output TTL Level
Open Drain Contrast Reduction Output
25Hz Output Field synchronized for non-interlaced display
Open Drain Foreground Information Output
Serial Clock Input
Serial Data Input/Output
Line 23 Identification
VPS Data Valid
To be connected to VSSD through a resistor
PLL Time Constant Selection
+5V
Oscillator Output 13.875MHz
Oscillator Input 13.875MHz
Oscillator Ground
Analog Ground
Grounded to VSSA
To connect Black Level Storage Capacitor
Figure
9
11
12
15
12
13
13
13
13
15
15
15
15
16
17
15
15
15
15
14
14
11
28
5348-01.TBL
PIN DESCRIPTION
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.8.9
9.
GB 219
Tuner1705: UV1316K
VHF/UHF television tuner
UV1336K MK3
FEATURES
Member of UV1300 MK3 family of small-sized
UHF/VHF tuners
Integrated with passive splitter
Covers systems M, N
2
Digitally-controlled (PLL) tuning via I C-bus
2
Fast 400kHz I C bus protocol compatible with
3.3V and 5V micro controllers
181 channels coverage ( Off-air and full cable )
World standardized mechanical dimensions and
pinning. Horizontal mounting is optionally
available.
DESCRIPTION
MARKING
The UV1336K MK3 splitter - tuner belongs to the
UV1300 family of WSP tuners, which are designed to
meet a wide range of TV applications. It is a full band
tuner suitable for NTSC M, N and PAL M, N. The low
IF output impedance is designed for direct drive of a
wide variety of SAW filters with sufficient suppression
of triple transient.
The following items of information are
printed on a sticker that is on the top
cover of the tuner:
Type number
Code number
The UV1336K MK3 incorporates internal wideband2
AGC with selectable TOP adjustment via I C.
Origin letter of factory
Change code
This tuner complies with the requirements of
radiation, conforming with:
FCC Part 15, Subpart B
Year and week code
BETS 7
CISPR13
ORDERING INFORMATION
TYPE
UV1336K/A F G S-3
DESCRIPTION
F connector, wideband AGC, switchable FM trap
ORDER NUMBERS
3139 147 17011
GB 220
9.
Circuit-, IC Descriptions and List of Abbreviations
DVDR1000 /0x1 /691
VHF/UHF television tuner
UV1336K MK3
BLOCK DIAGRAM
RF i/p
Gain
controllable
Pre-amplifiers
Tracking
filters
Prefiltering
Tracking
filters
Mix-Osc
IF amp
RF o/p
11
TV IF o/p
AGC
Detector
PLL
1
2
9
Vt
(monitor)
AGC
7
33V
Vcc
3
PINNING
PIN
DESCRIPTION
AGC
1
Gain Control Voltage
TU
2
Tuning voltage
AS
3
I C-Bus Address Select
SCL
4
I C-Bus Serial Clock
SDA
5
I C-Bus Serial Data
n.c.
6
Not Connected
Vs
7
PLL Supply Voltage +5V
n.c
8
Not Connected
VST
9
Fixed tuning Supply Voltage +33V
n.c
10
Not connected
IF1
11
Asymmetrical IF Output
GND
2
2
2
M1,M2,M3,M4 Mounting Tags (Ground)
5
8
AS SCL SDA ADC**
** ADC option not available in NTSC versions
SYMBOL
4
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.9
IC’s Digital Board
9.9.1
IC7100: VSM
VERSATILE STREAM MANAGER
9.
GB 221
GB 222
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 223
GB 224
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.9.2
9.
GB 225
IC7101; IC7306: SDRAM
SDRAM MT48LC1M16A1 SIT - 512K x 16 x 2 banks
FEATURES
• PC100 functionality
• Fully synchronous; all signals registered on positive
edge of system clock
• Internal pipelined operation; column address can be
changed every clock cycle
• Internal banks for hiding row access/precharge
1 Meg x 16 - 512K x 16 x 2 banks architecture with
11 row, 8 column addresses per bank
• Programmable burst lengths: 1, 2, 4, 8 or full page
• Auto Precharge Mode, includes CONCURRENT
AUTO PRECHARGE
• Self Refresh and Adaptable Auto Refresh Modes
- 32ms, 2,048-cycle refresh or
- 64ms, 2,048-cycle refresh or
- 64ms, 4,096-cycle refresh
• LVTTL-compatible inputs and outputs
• Single +3.3V ±0.3V power supply
• Supports CAS latency of 1, 2 and 3
• Industrial temperature range: -40°C to +85°C
OPTIONS
MARKING
• Configuration
1 Meg x 16 (512K x 16 x 2 banks)
1M16A1
PIN ASSIGNMENT (Top View)
50-Pin TSOP
VDD
DQ0
DQ1
VssQ
DQ2
DQ3
VDDQ
DQ4
DQ5
VssQ
DQ6
DQ7
VDDQ
DQML
WE#
CAS#
RAS#
CS#
BA
A10
A0
A1
A2
A3
VDD
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Note: The # symbol indicates signal is active LOW.
• Plastic Package - OCPL*
50-pin TSOP (400 mil)
TG
• Timing (Cycle Time)
6ns (166 MHz)
7ns (143 MHz)
8ns (125 MHz)
Configuration
Refresh Count
-6
-7
-8A
Row Addressing
2K (A0-A10)
Bank Addressing
Column Addressing
2 (BA)
256 (A0-A7)
1 Meg x 16
• Refresh
2K or 4K with Self Refresh Mode at 64ms
• Operating Temperature
-40°C to +85°C
IT
-6
-7
-8A
166 MHz
143 MHz
125 MHz
ACCESS TIME
CL = 3**
5.5ns
5.5ns
6ns
PART NUMBER
MT48LC1M16A1TG SIT
ARCHITECTURE
1 Meg x 16
GENERAL DESCRIPTION
KEY TIMING PARAMETERS
CLOCK
512K x 16 x 2 banks
2K or 4K
16Mb (x16) SDRAM PART NUMBER
S
• Part Number Example: MT48LC1M16A1TG-7SIT
SPEED
Vss
DQ15
DQ14
VssQ
DQ13
DQ12
VDDQ
DQ11
DQ10
VssQ
DQ9
DQ8
VDDQ
NC
DQMH
CLK
CKE
NC
A9
A8
A7
A6
A5
A4
Vss
SETUP
HOLD
2ns
2ns
2ns
1ns
1ns
1ns
The 16Mb SDRAM is a high-speed CMOS, dynamic
random-access memory containing 16,777,216 bits. It is
internally configured as a dual 512K x 16 DRAM with a
synchronous interface (all signals are registered on the
positive edge of the clock signal, CLK). Each of the 512K x
16-bit banks is organized as 2,048 rows by 256 columns by
16 bits. Read and write accesses to the SDRAM are burst
oriented; accesses start at a selected location and continue
for a programmed number of locations in a programmed
GB 226
9.
Circuit-, IC Descriptions and List of Abbreviations
DVDR1000 /0x1 /691
GENERAL DESCRIPTION (continued)
sequence. Accesses begin with the registration of an ACTIVE command, which is then followed by a READ or
WRITE command. The address bits registered coincident
with the ACTIVE command are used to select the bank and
row to be accessed (BA selects the bank, A0-A10 select the
row). The address bits registered coincident with the READ
or WRITE command are used to select the starting column
location for the burst access.
The SDRAM provides for programmable READ or
WRITE burst lengths of 1, 2, 4 or 8 locations, or the full page,
with a burst terminate option. An AUTO PRECHARGE
function may be enabled to provide a self-timed row
precharge that is initiated at the end of the burst sequence.
The 1 Meg x 16 SDRAM uses an internal pipelined
architecture to achieve high-speed operation. This architecture is compatible with the 2n rule of prefetch architectures,
but it also allows the column address to be changed on every
clock cycle to achieve a high-speed, fully random access.
Precharging one bank while accessing the alternate bank
will hide the PRECHARGE cycles and provide seamless,
high-speed, random-access operation.
The 1 Meg x 16 SDRAM is designed to operate in 3.3V,
low-power memory systems. An auto refresh mode is
provided, along with a power-saving, power-down mode.
All inputs and outputs are LVTTL-compatible.
SDRAMs offer substantial advances in DRAM operating performance, including the ability to synchronously
burst data at a high data rate with automatic columnaddress generation, the ability to interleave between internal banks in order to hide precharge time, and the capability
to randomly change column addresses on each clock cycle
during a burst access.
ROWADDRESS
LATCH
11
11
ROW
DECODER
FUNCTIONAL BLOCK DIAGRAM
1 Meg x 16 SDRAM
2,048
BANK0
MEMORY
ARRAY
(2,048 x 256 x 16)
CKE
CLK
DQML,
DQMH
COMMAND
DECODE
CS#
WE#
CAS#
RAS#
256 (x16)
CONTROL
LOGIC
SENSE AMPLIFIERS
I/O GATING
DQM MASK LOGIC
MODE REGISTER
COLUMNADDRESS BUFFER
BURST COUNTER
8
COLUMNADDRESS LATCH
12
8
COLUMN
DECODER
REFRESH
CONTROLLER
ADDRESS
REGISTER
REFRESH
COUNTER
SENSE AMPLIFIERS
I/O GATING
DQM MASK LOGIC
11
ROWADDRESS
MUX
256 (x16)
11
11
ROWADDRESS
LATCH
11
ROW
DECODER
12
DATA
OUTPUT
REGISTER
16
16
DATA
INPUT8
REGISTER
256
A0-A10, BA
16
256
2,048
BANK1
MEMORY
ARRAY
(2,048 x 256 x 16)
DQ0DQ15
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 227
PIN DESCRIPTIONS
PIN NUMBERS
SYMBOL
TYPE
DESCRIPTION
35
CLK
Input
Clock: CLK is driven by the system clock. All SDRAM input signals are
sampled on the positive edge of CLK. CLK also increments the internal burst
counter and controls the output registers.
34
CKE
Input
Clock Enable: CKE activates (HIGH) and deactivates (LOW) the CLK signal.
Deactivating the clock provides PRECHARGE POWER-DOWN and SELF
REFRESH operations (all banks idle), ACTIVE POWER-DOWN (row ACTIVE
in either bank) or CLOCK SUSPEND operation (burst/access in progress).
CKE is synchronous except after the device enters power-down and self
refresh modes, where CKE becomes asynchronous until after exiting the
same mode. The input buffers, including CLK, are disabled during powerdown and self refresh modes, providing low standby power. CKE may be tied
HIGH.
18
CS#
Input
Chip Select: CS# enables (registered LOW) and disables (registered HIGH)
the command decoder. All commands are masked when CS# is registered
HIGH. CS# provides for external bank selection on systems with multiple
banks. CS# is considered part of the command code.
15, 16, 17
WE#, CAS#,
RAS#
Input
Command Inputs: RAS#, CAS# and WE# (along with CS#) define the
command being entered.
14, 36
DQML,
DQMH
Input
Input/Output Mask: DQM is an input mask signal for write accesses and an
output enable signal for read accesses. Input data is masked when DQM is
sampled HIGH during a WRITE cycle. The output buffers are placed in a
High-Z state (two-clock latency) when DQM is sampled HIGH during a READ
cycle. DQML corresponds to DQ0-DQ7; DQMH corresponds to DQ8-DQ15.
DQML and DQMH are considered same state when referenced as DQM.
19
BA
Input
Bank Address Inputs: BA defines to which bank the ACTIVE, READ, WRITE
or PRECHARGE command is being applied. BA is also used to program the
twelfth bit of the Mode Register.
21-24, 27-32, 20
A0-A10
Input
Address Inputs: A0-A10 are sampled during the ACTIVE command (rowaddress A0-A10) and READ/WRITE command (column-address A0-A7, with
A10 defining AUTO PRECHARGE) to select one location out of the 512K
available in the respective bank. A10 is sampled during a PRECHARGE
command to determine if all banks are to be precharged (A10 HIGH). The
address inputs also provide the op-code during a LOAD MODE REGISTER
command.
2, 3, 5, 6, 8, 9,
11, 12, 39, 40, 42,
43, 45, 46, 48, 49
33, 37
DQ0DQ15
7, 13, 38, 44
4, 10, 41, 47
VDDQ
VSSQ
1, 25
VDD
Supply Power Supply: +3.3V ±0.3V.
26, 50
VSS
Supply Ground.
NC
Input/ Data I/Os: Data bus.
Output
–
No Connect: These pins should be left unconnected.
Supply DQ Power: Provide isolated power to DQs for improved noise immunity.
Supply DQ Ground: Provide isolated ground to DQs for improved noise immunity.
GB 228
9.9.3
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
IC7200: NVRAM
M24C64
M24C32
64/32 Kbit Serial I²C Bus EEPROM
■
Compatible with I2C Extended Addressing
■
Two Wire I2C Serial Interface
Supports 400 kHz Protocol
■
Single Supply Voltage:
– 4.5V to 5.5V for M24Cxx
14
8
– 2.5V to 5.5V for M24Cxx-W
– 1.8V to 3.6V for M24Cxx-R
■
Hardware Write Control
■
BYTE and PAGE WRITE (up to 32 Bytes)
■
RANDOM and SEQUENTIAL READ Modes
■
Self-Timed Programming Cycle
■
Automatic Address Incrementing
■
Enhanced ESD/Latch-Up Behavior
■
1 Million Erase/Write Cycles (minimum)
■
40 Year Data Retention (minimum)
DESCRIPTION
These I 2C-compatible electrically erasable programmable memory (EEPROM) devices are organized as 8192x8 bits (M24C64) and 4096x8 bits
(M24C32), and operate down to 2.5 V (for the -W
version of each device), and down to 1.8 V (for the
-R version of each device).
The M24C64 and M24C32 are available in Plastic
Dual-in-Line, Plastic Small Outline and Thin Shrink
Small Outline packages.
1
1
PSDIP8 (BN)
0.25 mm frame
TSSOP14 (DL)
169 mil width
8
8
1
1
SO8 (MN)
150 mil width
SO8 (MW)
200 mil width
Figure 1. Logic Diagram
VCC
3
Table 1. Signal Names
E0, E1, E2
Chip Enable Inputs
SDA
Serial Data/Address Input/
Output
SCL
Serial Clock
WC
Write Control
VCC
Supply Voltage
VSS
Ground
E0-E2
SCL
SDA
M24C64
M24C32
WC
VSS
AI01844B
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 229
M24C64, M24C32
Figure 2C. TSSOP Connections
Figure 2A. DIP Connections
M24C64
M24C32
M24C64
M24C32
E0
E1
E2
VSS
1
2
3
4
8
7
6
5
E0
E1
NC
NC
NC
E2
VSS
VCC
WC
SCL
SDA
AI01845B
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
WC
NC
NC
NC
SCL
SDA
AI02129
Note: 1. NC = Not Connected
Figure 2B. SO Connections
These memory devices are compatible with the
I2C extended memory standard. This is a two wire
serial interface that uses a bi-directional data bus
and serial clock. The memory carries a built-in 4bit unique Device Type Identifier code (1010) in
accordance with the I2C bus definition.
The memory behaves as a slave device in the I2C
protocol, with all memory operations synchronized
by the serial clock. Read and Write operations are
initiated by a START condition, generated by the
bus master. The START condition is followed by a
Device Select Code and RW bit (as described in
Table 3), terminated by an acknowledge bit.
When writing data to the memory, the memory inserts an acknowledge bit during the 9th bit time,
following the bus master's 8-bit transmission.
M24C64
M24C32
E0
E1
E2
VSS
1
2
3
4
8
7
6
5
VCC
WC
SCL
SDA
AI01846B
Table 2. Absolute Maximum Ratings 1
Symbol
Value
Unit
Ambient Operating Temperature
-40 to 125
˚C
TSTG
Storage Temperature
-65 to 150
˚C
TLEAD
Lead Temperature during Soldering
260
215
t.b.c.
˚C
TA
Parameter
PSDIP8: 10 sec
SO8: 40 sec
TSSOP14: t.b.c.
VIO
Input or Output range
-0.6 to 6.5
V
VCC
Supply Voltage
-0.3 to 6.5
V
VESD
Electrostatic Discharge Voltage (Human Body model) 2
4000
V
Note: 1. Except for the rating “Operating Temperature Range”, stresses above those listed in the Table “Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only, and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the ST SURE Program and other relevant quality documents.
2. MIL-STD-883C, 3015.7 (100 pF, 1500 Ω)
GB 230
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
IC7202: Sti5505
STi5505 (Rev. Ax)
DVD BACKEND DECODER
WITH INTEGRATED HOST PROCESSOR
.
.
..
.
.
..
.
.
.
.
PRODUCT PREVIEW
INTEGRATED 32-BIT RISC HOST CPU
- 2KBYTES INSTRUCTION CACHE, 2KBYTES
DATA CACHE/SRAM
- 50K DHRYSTONES/SEC (2.1) - 50MHz
VIDEO DECODER
- FULLY SUPPORTS MPEG-2 MP@ML
- MEMORY REDUCTION - PAL IN 12MBITS
SUBPICTURE DECODER
HIGH PERFORMANCE ON-SCREEN DISPLAY
AUDIO DECODER
- 5.1 CHANNEL DOLBY AC-3® / MULTI
CHANNEL MPEG-2 DECODING
- DOWNMIX TO STEREO OR TO DOLBY
PRO-LOGIC COMPATIBLE OUTPUTS FOR
MPEG-2 AND AC-3
- IEC6958 - IEC61937 COMPATIBLE OUTPUT
- LPCM (DVD) MODE SUPPORTED
- 6 CHANNELS OUTPUT
PAL/NTSC ENCODER
- MACROVISIONTM 7.01/6.1 COMPATIBLE
- TELETEXT, AND CLOSED CAPTION
HIGH PERFORMANCE SDRAM INTERFACE
PROGRAMMABLE MEMORY INTERFACE
FOR DRAM, ROM, PERIPHERALS ETC.
FRONT-END CHANNEL IC INTERFACE
- DVD, VCD AND CD-DA COMPATIBLE
- DSS - DVB BISTREAMS
- SERIAL AND PARALLEL INTERFACES
- HARDWARE SECTOR FILTERING
- INTEGRATED CSS DECRYPTION AND
TRACK BUFFER
INTEGRATED PERIPHERALS
- 2 UARTS, 1 I2C CONTROLLER, 3 PWM OUTPUTS, 3 TIMERS, 3 CAPTURE TIMERS,
SMART CARD
- 34 BITS OF PROGRAMMABLE I/O
- OS LINK
PROFESSIONAL TOOLSET SUPPORT
- ANSI C COMPILER AND LIBRARIES
- OPERATING SYSTEMS SUPPORT
- ADVANCED DEBUGGING TOOLS
208 PIN PQFP PACKAGE
DESCRIPTION
The STi5505 provides a very highly integrated backend solution for DVD and combo DVD-DVB (Set
Top Box) applications. The STi5505 incorporates a
host CPU which handles both general application
(DVD navigation, CD-DA, VCD, DVB) and drivers
of the different embedded periphals (audio/video,
subpicture decoders, OSD, PAL/NTSC encoder...).
The STi5505 offers one of the best cost-effective
(memory savings, internal peripherals availability) solution to DVD-DVB applications with rapid time to market (Reference design, DVD-DVB Software Toolkit).
Figure 1 : General Block Diagram
DMA CHANNELS
ARBITOR
FRONT-END
INTERFACE
(SECTOR
PROCESSOR
& DVD
DECRYPTION)
ST20 CPU
9.9.4
9.
2K
INSTRUC.
CACHE
EXTERNAL
MEMORY
INTERFACE
MPEG2/AC3
AUDIO
5.1 CHANNEL
MPEG2 VIDEO
SUBPICTURE
OSD
2K DATA
CACHE AND
2K SRAM
OS LINK 2 UART
1 I2C
PIO
3 PWM
SMART CARD
DIAGNOSTICS
CONTROLLER
AND SYSTEM
SERVICES
PAL/NTSC
TELETEXT
INTERFACE
PQFP208 (Plastic Quad Flat Pack)
ORDER CODE : STi5505ACV
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 231
STi5505 (Rev. Ax)
I - GENERAL DESCRIPTION
The performance offered by the ST20 CPU and its
associated hardware (decoders, encoder, peripherals...) allows an integrated and unified DVD or
DVD-DVB software solution.
All the following operations are performed inside
the STi5505 :
- application management (DVD Navigation, VCD,
CD-DA, DVB-Program Guide ...),
- device data retrieval drivers (demultiplex, stream
buffer management ...),
- device presentation drivers (video decoder, subpicture decoder, on-screen display, audio decoder, PAL/NTSC encoder ...),
- embedded peripherals drivers (UART, I2C, Programmable I/O, Smart Card ...).
I.1 - ST20 32-bit CPU
The ST20 micro-core family has been developped
by SGS-THOMSON Microelectronics to provide
the tools and building blocks to enable the development of highly integrated application-specific 32bits device at the lowest cost and fastest time to
market.
The STi5505 integrates a ST20 C2 core with the
following characteristics :
- 50K Dhrystones/s at 50MHz,
- 8/16 bits instructions (32 most common instructions in 8 bits),
- instruction cache 2Kbytes - write back replacement policy,
- internal SRAM 2Kbytes to ensure fast access to
critical code, data, interrupt handler ...
- data cache 2 Kbytes - write back replacement policy,
The STi5505's ST20 is provided with advanced
debugging tools :
- on-chip real-time emulation,
- debugging with minimal impact on software and
performance,
- non intrusive attachment to the host via JTAG
(IEEE1149.1),
- no intrusion into the performance of the CPU core,
- no intrusion into user code space by a debug kernel,
- only 40bytes used for breakpoint handler.
I.2 - Video Decoder
The video decoder implemented in the STi5505
uses a patented memory reduction/bandwith reduction scheme to offer the user the best band-
width/memory size compromise.
The algorithm is lossless and uses "on-the-fly"
decoding to reduce the memory requirements to
two frame buffers in memory reduction mode.
In this mode, PAL decoding is contained in 12Mbits.
When used in bandwith reduction mode, the memory usage is the normal three buffers but the bandwith required by the decoder is significantly
reduced compared to a classical implementation.
In summary, the features of the decoder are :
- MPEG-2 Main Profile/Main Level (MP@ML) support,
- MPEG-2 program streams, Packet Elementary
streams and MPEG-1 system streams support,
- memory reduction architecture allowing sharing
of single 16 Mbits SDRAM between MPEG decoding, micro and transport functions - memory
expandable to 32 Mbits of SDRAM,
- letter box (16:9) filter,
- pan-scan, horizontal and vertical image resizing,
- automatic error concealment.
I.3 - Subpicture Decoder
The STi5505 has a hardware DVD compliant subpicture decoder. Subpicture units are copied by
DMA into subpicture bit buffer.
The subpicture decoder can decode complete subpicture units without any interaction from the ST20.
The main subpicture decoder features are :
- up to 720x480 or 720x576 subpicture area,
- internal LUTs for Sub Picture, Highlight and PCI
(4 bits color and contrast outputs),
- internal color LUT (4 bits from SP, HL, PCI to 24 Y,Cr,Cb
bits) for SP color inputs to MPEG, OSD, SP mixer.
I.4 - Audio Decoder
The audio decoder cell is a fully compatible Dolby
AC-3 / MPEG-1/MPEG-2 decoder capable of
decoding both 5.1 and 2 channel streams compatible with the DVD standard.
Downmix from 5.1 channels is supported for both
Dolby and MPEG-2 streams. The output can be
sent directly to external DACs or formatted for
transmission in accordance with the IE6958 standard.
The decoder can also handle linear PCM in accordance with the DVD standard. An integrated downsampler is provided for conversion from 96 kHz to
48kHz.
GB 232
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
STi5505 (Rev. Ax)
I - GENERAL DESCRIPTION (continued)
The main features of the decoder core are :
- Decodes 5.1 Dolby AC-3 Digital surround,
- Output to 6 channels. Downmix modes : 1, 2, 3
or 4 channels for MPEG and AC-3 streams,
- Karaoke mode for DVD. MPEG-2 capable, AC-3
capable,
- MPEG-1, 2-channel audio decoder layers 1 and 2,
- MPEG-2, 6-channel audio decoder layer 2,
- PCM : transparent. downsampling 96 to 48 kHz,
- Accepts MPEG-2 PES stream format for : MPEG2, MPEG-1, Dolby AC-3 and Linear PCM,
- IEC6958 Output Interface,
- CD-DA PCM format (subcode output in IEC6958
user data),
- Downmix for Dolby Pro Logic compatible outputs
for AC-3 and MPEG-2 (Pro Logic encoder),
- Pro Logic decoder,
- PLL for Internal 44.1 and 48kHz PCM clock
generation,
- On chip pink noise generator.
I.5 - High Performance On-Screen Display
The graphics performance of the STi5505 supports the new requirements for intelligent program
guides and interactive applications.
The display interface supports up to 256 colors for
each OSD region and a transparency feature allows mixing of video with the OSD. Fast access
graphics and many other additional features are
available and are supported by a graphics library.
Very high system performance is obtained by
closely coupling the ST20 RISC processor and
cache with the MPEG audio/video core and display
memory.
Low latency RISC access and DMA engines allow
rapid construction of bit maps.
I.6 - PAL/NTSC Encoder
The STi5505 integrates a PAL/NTSC encoder. It
converts the digital MPEG/Sub Picture/OSD
stream into a standard analog baseband
PAL/NTSC signal and into RGB analog components. Six analog output pins are available on
which it is possible to output CVBS, S-VHS (Y/C)
and RGB formats.
The encoder handles interlaced and non-interlaced
mode.
It can perform Closed Captions, CGMS or Teletext
encoding and allows Macrovision 7.01/6.1 copy
protection.
The encoder supports both master and slave
modes for synchronization.
I.7 - Memory Interfaces
The STi5505 has been designed to minimize system costs by enabling various memory savings.
Two kinds of memory interfaces are used on the
STi5505 : a programmable External Memory Interface (EMI) and a high performance SDRAM interface.
The External Memory Interface supports several
address ranges (memory banks). In each bank, a
set of signals are entirely programmable and can
be used to map 8/16 bits peripherals such as Front
End channel ICs in DVD applications.
The EMI contains a zero glue logic DRAM and a
low-cost EPROM interface.
This interface can be programmed to interface very
easily peripherals.
The SDRAM memory interface supports gluelessly
125 MHz SDRAMs providing the adequate bandwiths to achieve MPEG decoding and display, OSD
drawing and display, and general system use.
Memory savings can be realized on ROM requirements too : the ST20 VL-RISC micro-core has the
highest code density of any 32 bit CPU, leading to
the lowest cost program ROM.
I.8 - Front-End Interface
The STi5505 's front end interface accepts :
- DVD, VCD and CD-DA sectors,
- DVB-DSS transport stream.
In DVD mode, DVD, VCD and CD-DA information
can be input into STi5505 through a serial interface
or a generic parallel interface.
In serial mode, data are captured and filtered from
I2S and V4 interfaces by an internal sector processor. V4 interface is used to capture VCD and CDDA subcode information. In parallel mode, sector
processor is bypassed.
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 233
STi5505 (Rev. Ax)
I - GENERAL DESCRIPTION (continued)
The main features of the DVD interface are :
- DVD, VCD and CD-DA compatible,
- hardware sector filtering,
- subcode error correction for CD-DA,
- integrated CSS decryption,
- integrated track buffer support,
- DMA engine to ST20 memory.
In DVB-DSS mode, DVB-DSS transport stream is
input through a serial interface. The STi5505 extracts and descrambles Packet Elementary
Streams belonging to one user selected program
to be decoded and presented.
The main features of the DVB-DSS interface are :
- descrambling (transport packet and packet elementary streams in DVB mode, transport packet
in DSS mode ; up to 32 streams descrambling),
- PID and section filtering,
- clock recovery,
- DMA engine.
In DVB-DSS mode, a high speed digital interface
allows to transfer packets between the Set Top Box
and external units, either for recording or playback
purposes. This interface provides also full support
for an external IEEE1394 connection.
I.9 - Integrated Peripherals
Several peripherals generally used in DVD players
or DVD-DVB combos have been integrated into the
STi5505.
They are :
- two UARTs to interface remote control receivers,
DVD front end, modem ...,
- one I2C controller to interface serial memories,
remote control receivers, microcontrollers...,
- 2 SmartCard interfaces (ISO7816-3) for DVBDSS conditionnal access, pay per view ...,
- PWM/timer module for control of system clock,
- 34 programmable I/O pins,
- OS Link interface,
- JTAG with boundary scan for debug.
GB 234
9.
Circuit-, IC Descriptions and List of Abbreviations
DVDR1000 /0x1 /691
STi5505 (Rev. Ax)
II - PIN DESCRIPTION
VDD
PIO3[6]
PIO3[5]
PIO3[4]
PIO3[3]
PIO3[2]
PIO3[1]
PIO3[0]
GND
PIO1[4]
PIO1[3]
PIO4[6]
PIO4[5]
PIO4[4]
PIO4[3]
PIO4[2]
PIO4[1]
PIO4[0]
TRST
TDO
TCK
TMS
TDI
GND
VDD
ADR[21]
ADR[20]
ADR[19]
ADR[18]
ADR[17]
ADR[16]
ADR[15]
ADR[14]
ADR[13]
ADR[12]
ADR[11]
GND
VDD
ADR[10]
ADR[9]
ADR[8]
ADR[7]
ADR[6]
ADR[5]
ADR[4]
ADR[3]
ADR[2]
ADR[1]
GND
VDD
DATA[15]
DATA[14]
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
II.1 - Pin Connections
VDD
1
156
DATA[13]
PIO3[7]
2
155
DATA[12]
PIO2[0]
3
154
DATA[11]
GND
4
153
DATA[10]
PIO2[3]
5
152
DATA[9]
PIO2[4]
6
151
DATA[8]
PIO2[5]
7
150
GND
PIO2[7]
8
149
VDD
PIO1[0]
9
148
DATA[7]
PIO1[2]
10
147
DATA[6]
PIO1[5]
11
146
DATA[5]
PIO1[6]
12
145
DATA[4]
PIO1[7]
13
144
DATA[3]
PIO4[7]
14
143
DATA[2]
PIO0[0]
15
142
DATA[1]
PIO0[3]
16
141
DATA[0]
PIO0[4]
17
140
GND
VDD
18
139
VDD
GND
19
138
PPC_MODE
PIO0[5]
20
137
PROCCLK
PIO0[6]/PCM_OUT2
21
136
WAIT/READY
PIO0[7]
22
135
CS
IRQ[0]
23
134
DMAXFER
PCM_OUT1
24
133
R/W/DMAACK
STi5505
IRQ[1]
25
132
CAS1/DMAREQ
PWM0/OSLINK_SEL
26
131
GND
PWM1/BOOTFROMROM
27
130
VDD
PWM2
28
129
CAS0/HOLDACK
RST
29
128
RAS1
TEST1
30
127
RAS0/CE[0]
TEST2
31
126
CE[3]
TEST3
32
125
CE[2]
TEST4
33
124
CE[1]
VDD
34
123
OE
PQFP208
(Top View)
GND
35
122
BE[1]
B_DATA
36
121
BE[0]
B_BCLK
37
120
GND
B_FLAG
38
119
VDD
B_SYNC
39
118
PIXCLK_27MHz
B_WCLK
40
117
OSD_ACTIVE
TEST5
41
116
AUXCLK
B_V4
42
115
DQ[15]
SCLK
43
114
DQ[14]
PCM_OUT0
44
113
DQ[13]
PCM_CLK
45
112
DQ[12]
LRCLK
46
111
GND
SPDIF_OUT
47
110
VDD
98
99
100
101
DQ[4]
DQ[5]
DQ[6]
DQ[7]
104
97
DQ[3]
MEMCLKIN
96
GND
103
95
VDD
102
94
DQ[2]
VDD
93
DQ[1]
GND
92
DQ[0]
80
AD[2]
91
79
AD[1]
DQML
78
AD[0]
90
77
GND
89
76
MEMCLKOUT
SDWE
75
VDD
SDCAS
74
AD[9]
88
73
AD[8]
SDRAS
72
AD[7]
87
71
AD[6]
GND
70
AD[5]
86
69
VDD
68
GND
AD[4]
85
67
VDD
84
66
I_REF_DAC_YCC
SDCS[1]
65
V_REF_DAC_YCC
SDCS[0]
64
83
63
C_OUT
CV_OUT
AD[11]
62
Y_OUT
82
61
VSSA
81
60
VDDA
AD[3]
59
AD[10]
58
I_REF_DAC_RGB
DQMU
V_REF_DAC_RGB
105
57
DQ[8]
52
R_OUT
51
ODD/EVEN
56
DQ[9]
HSYNC
106
55
107
B_OUT
50
G_OUT
DQ[10]
VSSA_PCM
54
DQ[11]
108
53
109
49
VSSA
48
VDDA
VDDA_PCM
V_REF_PCM
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 235
STi5505 (Rev. Ax)
II - PIN DESCRIPTION (continued)
II.2 - Pin List
Pin
Name
Type
Function
1, 18, 34, 67, 75, 86, 95,
102, 110, 119, 130, 139,
149, 159, 171, 184, 208
4, 19, 35, 68, 77, 87, 96,
103, 111, 120, 131, 140,
150, 160, 172, 185, 200
53, 60
54, 61
48
49
50
VDD
Power Supply
GND
Ground
VDDA
VSSA
Analog Power Supply for DENC D/A Converters
Analog Ground for DENC D/A Converters
Analog Power Supply for PLL PCM
Analog Reference for PLL PCM
Analog Ground for PLL PCM
SUPPLIES
VDDA_PCM
V_REF_PCM
VSSA_PCM
FRONT-END INTERFACE
I2S Data (DVD) or PARA_DATA[2] (DVD//) or Link Data
(DVB/DSS)
I2S Word Clock or PAR A_DATA[6] (DVD//) or
NRSS_CLK (DVB/DSS)
I2S Bit Clock (DVD) or PARA_DATA[3] (DVD//) or Link
Bit Clock (DVB/DSS)
Error Flag (DVD) or PARA_DATA [4] (DVD//) or Link
Sync (DVB/DSS)
Sector / Abs Time Sync (DVD) or PARA_DATA[5]
(DVD//) or Link Not Valid (DVB/DSS)
Versatile Input Pin (Subcode Input) or PARA_DATA[7]
(DVD//) or NRSS_IN (DVB/DSS)
36
B_DATA
I
40
B_WCLK
I/O
37
B_BCLK
I
38
B_FLAG
I
39
B_SYNC
I
42
B_V4
I
R_OUT
G_OUT
B_OUT
C_OUT
CV_OUT
Y_OUT
I_REF_DAC_RGB
I_REF_DAC_YCC
V_REF_DAC_RGB
V_REF_DAC_YCC
OSD_ACTIVE
PIXCLK_27MHz
HSYNC
ODD/EVEN
O
O
O
O
O
O
I
I
I
I
I/O
I
I/O
I/O
Red Output
Green Output
Blue Output
Chroma Output
Composite Video Output
Luma Output
DAC Current Reference
DAC Current Reference
DAC Voltage Reference
DAC Voltage Reference
OSD Active
System Clock Input
Horizontal Sync
Vertical Sync
O
O
O
O
I/O
O
O
Serial Bit Clock
Audio Serial Output Data 0
Audio Serial Output Data 1
Audio Serial Output Data 2
PCM Clock In or Out
Left/Right Clock
SPDIF Output
VIDEO OUTPUT INTERFACE
57
56
55
63
64
62
59
66
58
65
117
118
51
52
AC-3/MPEG1-2 AUDIO OUTPUT INTERFACE
43
44
24
21
45
46
47
SCLK
PCM_OUT0
PCM_OUT1
PCM_OUT2
PCM_CLK
LRCLK
SPDIF_OUT
GB 236
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
STi5505 (Rev. Ax)
II - PIN DESCRIPTION (continued)
II.2 - Pin List (continued)
Pin
Name
Type
IRQ[0:1]
I
Function
EXTERNAL INTERRUPTS
23, 25
External Interrupts
PROGRAMMABLE I/O AND ALTERNATE FUNCTION (see Device Configuration Chapter)
15
PIO0 [0]
I/O
16
PIO0 [3]
I/O
17
PIO0 [4]
I/O
20
PIO0 [5]
I/O
21
22
PIO0 [6]
PIO0 [7]
I/O
I/O
9
10
198, 199
11
12
13
3
5
6
7
PIO1 [0]
PIO1 [2]
PIO1 [3:4]
PIO1 [5]
PIO1 [6]
PIO1 [7]
PIO2 [0]
PIO2 [3]
PIO2 [4]
PIO2 [5]
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
8
201
202
203
204
205
206, 207, 2
191-197
14
PIO2 [7]
PIO3 [0]
PIO3 [1]
PIO3 [2]
PIO3 [3]
PIO3 [4]
PIO3 [5:7]
PIO4 [0:6]
PIO4 [7]
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
General Purpose I/O or PARA_SYNC (DVD//Front End)
or Sc1Data (Smart Card 1 Data I/O)
General Purpose I/O or PARA_REQ (DVD//Front End)
or Sc1Clk (Smart Card 1 Clock)
General Purpose I/O or PARA_STR (DVD//Front End)
or Sc1RST (Smart Card 1 Reset)
General Purpose I/O or PARA_DATA[0] (DVD//Front End)
or Sc1Cmd VCC (Smart Card 1 Voltage Enable)
General Purpose IO or Sc1DataDir (Smart Card 1 Dir)
General Purpose I/O or PARA_DATA[1] (DVD//Front End)
or Sc1Detect(Smart Card 1 Detect)
General Purpose I/O or I2C Data
General Purpose I/O or I2C Clock
General Purpose IO
General Purpose IO or ASC1 TXD
General Purpose IO or ASC1 RXD
General Purpose IO or ASC3 TXD
General Purpose I/O or Sc0Data (Smart Card 0 Data I/O)
General Purpose I/O or Sc0Clk (Smart Card 0 Clock)
General Purpose I/O or Sc0RST (Smart Card 0 Reset)
General Purpose I/O or Sc0CmdVCC (Smart Card 0
Voltage Enable)
General Purpose I/O or Sc0Detect (Smart Card 0 Detect)
General Purpose IO or OSLink In
General Purpose IO or OSLink Out
General Purpose IO or CPUReset
General Purpose IO or CPU Analyse
General Purpose IO or ErrorOut
General Purpose IO
General Purpose IO
General Purpose IO or ASC3 RXD
TCK
TDI
TDO
TMS
TRST
I
I
O
I
I
Test Clock
Test Data Input
Test Data Input
Test Mode Select
Test Reset
PWM2
PWM1/BOOTFROMROM
PWM0/OSLINK_SEL
RST
AUXCLK
O
O/I
O/I
I
O
PWM2 Output
PWM1 Output or Configuration Oslink Pins
PWM0 Output or Boot from ROM during Reset
Reset
Auxilary Clock for Any Purpose
JTAG INTERFACE
188
186
189
187
190
SYSTEM USE
28
27
26
29
116
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 237
STi5505 (Rev. Ax)
II - PIN DESCRIPTION (continued)
II.2 - Pin List (continued)
Pin
Name
Type
Function
AD[0:11]
DQ[0:15]
O
I/O
SDRAM Address Bus
SDRAM Data (Lower Byte)
SDCS[0:1]
SDCAS
SDRAS
SDWE
MEMCLKIN
MEMCLKOUT
DQML
DQMU
O
O
O
O
I
O
O
O
SDRAM Chip Selects
SDRAM CAS
SDRAM RAS
SDRAM Write Enable
SDRAM Memory Clock Input
SDRAM Memory Clock Output
DQ Mask Enable (Lower)
DQ Mask Enable (Upper)
ADR[1:21]
DATA[0:15]
RAS1/HOLDREQ
WAIT/READY
R/W/DMAACK
BE[0:1]
CAS0/HOLDACK
CAS1/DMAREQ
CE[1:3]
CS
PROCCLK
RAS0/CE0
DMAXFER
PPC_MODE
OE
I/O
I/O
O
I/O
I/O
O
O/I
O
O
I
I/O
O
I
I
I/O
External Memory Address Bus
External Memory Data Bus
DRAM RAS or reserved
External Wait States or Reserved
DRAM R/W Strobe or Reserved
Byte enable
DRAM CAS or Reserved
DRAM CAS or Reserved
Chip Select for Banks 1 - 3
Reserved
ST20 Clock or Reserved
DRAM RAS or Chip Select for Bank 0
Reserved
Reserved
Output Enable or Reserved
30
TEST1
I/O
31
TEST2
I/O
32
TEST3
I/O
DATA_RX/STROBE_TX (SDAV Mode) or SDAV_CLK
(P1394 Mode)
ST R O BE _ R X/ D AT A _ TX ( SD A V M od e) o r
DATA_IN/DATA_OUT (P1394 Mode)
Direction (SDAV Mode) or DATA_VALID In/Out (P1394
Mode)
TEST5
O
SDRAM INTERFACE
78-81, 69, 70-74, 82, 83
92-94, 97-101, 106-109,
112-115
84, 85
89
88
90
104
76
91
105
EXTERNAL MEMORY INTERFACE
161-170, 173-183
141-148, 151-158
128
136
133
121, 122
129
132
124-126
135
137
127
134
138
123
SDAV/P1394 INTERFACE
MISCELLANEOUS
41
NRSS_OUT (DVB/DSS)
GB 238
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
STi5505 (Rev. Ax)
III - FUNCTIONAL DESCRIPTION
III.1 - Functional Modules
Figure 1 shows the subsystem modules that make
up the STi5505. These modules are outlined below.
III.1 - CPU
The Central Processing Unit (CPU) on the STi5505
is the ST20-C2 32-bit processor core. It contains
instruction processing logic, instruction and data
pointers and an operand register. It directly accesses the high speed on-chip SRAM memory,
which can store data or programs, and uses the
Caches to reduce access time to off chip program
and data memory.
The processor can access memory via the general
purpose External Memory Interface (EMI) or via the
SDRAM EMI which is shared with the MPEG decoder.
III.2 - Memory Subsystem
The STi5505 on-chip SRAM memory system provides
160 Mbytes/s internal data bandwidth, supporting pipelined 2 cycles internal memory access at 25ns cycle
times. The STi5505 memory system consists of 2
Kbytes of SRAM, 2Kbytes of instruction cache, a
2Kbytes data cache that can be programmed to be
SRAM, and an external memory interface (EMI).
The STi5505 product has 2 Kbytes of on-chip
SRAM. The advantage of this is the ability to store
time critical code on chip, for instance interrupt
routines, software kernels or device drivers, and
even frequently used data without these being
flushed from the caches.
The instruction and data caches are direct mapped with
a write-back system for the data cache and support
burst accesses to the external memories for refill and
write-back which are effective for increasing performance with page-mode and SDRAM memories.
The STi5505 EMI controls access to the external
memory and peripherals while the SDRAM EMI
provides access to the SDRAM buffer for the
MPEG decoders, ST20 and DMA peripherals.
The STi5505 EMI can access a 16 Mbytes (or
greater if DRAM is used) physical address space
in each of the four general purpose memory banks,
and provides sustained transfer rates of up to 80
Mbytes/s. Peripherals that support an asynchronous data acknowledge are supported as is an
external Power PC which can share the bus with
the STi5505 and access the SDRAM buffer through
the device.
High memory bandwidths up to 200 Mbytes/s can
be supported by the SDRAM EMI.
The STi5505 internal memory interconnect provides buffering and arbitration of memory access
requests to sustain very high throughput of memory
accesses.
III.3 - Syste m Services Module
The STi5505 system services module includes :
- Phase locked loop (PLL) - accepts 27MHz input
and generates all the internal high frequency
clocks needed for the CPU and the OS-Link.
- test access port - JTAG compatible.
- Diagnostics controller accessed via the JTAG
port providing :
- Bootstrapping during development
- Hardware breakpoint and watchpoint
- Real time trace
- External LSA triggering support.
III.4 - Serial Communications
To facilitate the connection of this system the front
end device and other peripherals, two UARTs
(ASCs) are included in the device. The UARTs
provide an asynchronous serial interface.
The UART can be programmed to support a range
of baud rates and data formats, for example, data
size, stop bits and parity. Two synchronous serial
communications (SSC) interfaces are provided on
the device. These can be used for a remote control
device for example via an I2C or SPI bus.
III.5 - Interrupt Subsystem
The STi5505 interrupt subsystem supports eight
prioritized interrupt levels. Two external interrupt
pins are provided. Level assignment logic allows
any of the internal or external interrupts to be
assigned and, if necessary, share any interrupt
level.
III.6 - Front End Interf ace & DVD Decryption
The front end interface accepts sectors in the case
of DVD, MPEG-1 system stream in the case of VCD
and PCM data for CD-DA applications on an I2S
interface. In the case of VCD and CD-DA disks the
subcode information is input via a simple asynchronous serial interface similar to a UART.
The bitstream and subcode stream then pass
through a "sector processor" block which handles
sector filtering in the case of DVD and sectorizing
using the subcode stream for VCD and CD-DA
systems.
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 239
STi5505 (Rev. Ax)
III - FUNCTIONAL DESCRIPTION (continued)
The block also handles overspeed processing for
all systems. The capturing of CD-DA sectors is
based on a flywheel tiner to improve robusters by
concealing erros in the subcode stream. For DVD
the data, having had sector headers removed, then
passes through a DVD conformant de-cryption
stage and is written into any of the system memories using a programmable DMA engine. When a
subcode stream is present it is locally buffered, by
subcode block and can be read by the CPU for
subsequent processing, if required.
III.7 - PWM and counter module
This unit includes three separate pulse width
modulator (PWM) generators using a shared
counter, and three timer compare and capture
channels sharing a second counter.
The counters can be clocked from a pre-scaled
internal clock or from a pre-scaled external clock
via the capture clock input and the event on which
the timer value is captured is also programmable.
The PWM counters are 8-bit with 8-bit registers to
set the output high time. The capture/compare
counter and the compare and capture registers are
32-bit.
III.8 - Parallel Programmable IO module
40 bits of parallel I/O are provided. 34 of then are
connected to actual PIO pins. Each bit is programmable as an output or an input. The output can be
configured as a totem pole or open drain driver. Input
compare logic is provided which can generate an
interrupt on any change on any input bit.
Many pins of the STi5505 device are multi-function
and can either be configured as PIO or connected
to an internal peripheral signal.
III.9 - MPEG Video decoder
The video decoder is a real-time video compression processor supporting the MPEG-1 and MPEG2 standards at video rates up to 720 x 480 x 60 Hz
and 720 x 576 x 50 Hz. Picture format conversion
for display is performed by vertical and horizontal
filters. User-defined bitmaps may be superimposed
on the display picture through use of the on-screen
display function.
III.10 - PAL/NTSC encoder
The digital encoder which is integrated in the STi5505
converts a multiplexed 4:2:2 YUV stream into a
standard analog baseband PAL/NTSC signal and
into RGB analog components. The encoder can also
perform closed-caption, CGMS or teletext encoding
and allows MacrovisionTM 7.01/6.1 copy protection.
III.11 - MPEG-2 Audio / Dolby AC-3 Decoder
The audio decoder is a Dolby AC-3 decoder capable
of decoding both 5.1 and 2 channel DVD comformant bitstreams. The decoder also handles MPEG1 (layers 1 & 2) and MPEG-2 layer 2 (6 channels).
Downmix to 2 channels is possible for Dolby and
MPEG standards with optional pro-logic encoding.
The decoder directly accepts MPEG-2 PES streams
as input. The decoder is capable of supporting
IEC6958-IEC61937 formatted outputs for AC-3 and
MPEG audio, linear PCM (left & right,16, 18, 20 &
24 bits), zero output (Mute mode) and PCM audio.
GB 240
9.9.5
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
IC7302: FLASH
FLASH AM39LV160DT
GENERAL DESCRIPTION
The Am29LV160D is a 16 Mbit, 3.0 Volt-only Flash
memory organized as 2,097,152 bytes or 1,048,576
words. The device is offered in 48-ball FBGA, 44-pin
SO, and 48-pin TSOP packages. The word-wide data
(x16) appears on DQ15–DQ0; the byte-wide (x8) data
appears on DQ7–DQ0. This device is designed to be
programmed in-system with the standard system 3.0
volt V CC supply. A 12.0 V V PP or 5.0 V CC are not
required for write or erase operations. The device can
also
be
programmed
in
standard
EPROM programmers.
The device offers access times of 70, 90, and 120 ns,
allowing high speed microprocessors to operate
without wait states. To eliminate bus contention the
device has separate chip enable (CE#), write enable
(WE#) and output enable (OE#) controls.
The device requires only a single 3.0 volt power
supply for both read and write functions. Internally
generated and regulated voltages are provided for the
program and erase operations.
The Am29LV160D is entirely command set compatible
with the JEDEC single-power-supply Flash standard. Commands are written to the command register
using standard microprocessor write timings. Register
contents serve as input to an internal state-machine
that controls the erase and programming circuitry.
Write cycles also internally latch addresses and data
needed for the programming and erase operations.
Reading data out of the device is similar to reading
from other Flash or EPROM devices.
Device programming occurs by executing the program
command sequence. This initiates the Embedded
Program algorithm—an internal algorithm that automatically times the program pulse widths and verifies
proper cell margin. The Unlock Bypass mode facilitates faster programming times by requiring only two
write cycles to program data instead of four.
Device erasure occurs by executing the erase
command sequence. This initiates the Embedded
Erase algorithm—an internal algorithm that automatically preprograms the array (if it is not already programmed) before executing the erase operation.
During erase, the device automatically times the erase
pulse widths and verifies proper cell margin.
The host system can detect whether a program or
erase operation is complete by observing the RY/BY#
pin, or by reading the DQ7 (Data# Polling) and DQ6
(toggle) status bits. After a program or erase cycle has
been completed, the device is ready to read array data
or accept another command.
The sector erase architecture allows memory sectors
to be erased and reprogrammed without affecting the
data contents of other sectors. The device is fully
erased when shipped from the factory.
Hardware data protection measures include a low
VCC detector that automatically inhibits write operations during power transitions. The hardware sector
protection feature disables both program and erase
operations in any combination of the sectors of
memory. This can be achieved in-system or via programming equipment.
The Erase Suspend/Erase Resume feature enables
the user to put erase on hold for any period of time to
read data from, or program data to, any sector that is
not selected for erasure. True background erase can
thus be achieved.
The hardware RESET# pin terminates any operation
in progress and resets the internal state machine to
reading array data. The RESET# pin may be tied to the
system reset circuitry. A system reset would thus also
reset the device, enabling the system microprocessor
to read the boot-up firmware from the Flash memory.
The device offers two power-saving features. When
addresses have been stable for a specified amount of
time, the device enters the automatic sleep mode.
The system can also place the device into the standby
mode. Power consumption is greatly reduced in both
these modes.
AMD's Flash technology combines years of Flash
memory manufacturing experience to produce the
highest levels of quality, reliability and cost effectiveness. The device electrically erases all bits within a
sector simultaneously via Fowler-Nordheim tunneling. The data is programmed using hot electron
injection.
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 241
BLOCK DIAGRAM
DQ0–DQ15 (A-1)
RY/BY#
VCC
Sector Switches
VSS
Erase Voltage
Generator
RESET#
WE#
BYTE#
Input/Output
Buffers
State
Control
Command
Register
PGM Voltage
Generator
Chip Enable
Output Enable
Logic
CE#
OE#
VCC Detector
A0–A19
Timer
Address Latch
STB
STB
Data
Latch
Y-Decoder
Y-Gating
X-Decoder
Cell Matrix
22358A-1
GB 242
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
CONNECTION DIAGRAMS
A15
A14
A13
A12
A11
A10
A9
A8
A19
NC
WE#
RESET#
NC
NC
RY/BY#
A18
A17
A7
A6
A5
A4
A3
A2
A1
A16
BYTE#
VSS
DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
VCC
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE#
VSS
CE#
A0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Standard TSOP
Reverse TSOP
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A16
BYTE#
VSS
DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
VCC
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE#
VSS
CE#
A0
A15
A14
A13
A12
A11
A10
A9
A8
A19
NC
WE#
RESET#
NC
NC
RY/BY#
A18
A17
A7
A6
A5
A4
A3
A2
A1
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 243
CONNECTION DIAGRAMS
RESET#
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE#
VSS
OE#
DQ0
DQ8
DQ1
DQ9
DQ2
DQ10
DQ3
DQ11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
SO
PIN CONFIGURATION
A0–A19
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
= 20 addresses
DQ0–DQ14 = 15 data inputs/outputs
WE#
A19
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE#
VSS
DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
VCC
LOGIC SYMBOL
20
A0–A19
DQ15/A-1
= DQ15 (data input/output, word mode),
A-1 (LSB address input, byte mode)
BYTE#
= Selects 8-bit or 16-bit mode
CE#
= Chip enable
CE#
OE#
= Output enable
OE#
WE#
= Write enable
RESET#
= Hardware reset pin
RY/BY#
= Ready/Busy output
(N/A SO 044)
VCC
= 3.0 volt-only single power supply
(see Product Selector Guide for speed
options and voltage supply tolerances)
VSS
= Device ground
NC
= Pin not connected internally
16 or 8
DQ0–DQ15
(A-1)
WE#
RESET#
BYTE#
RY/BY#
(N/A SO 044)
GB 244
9.9.6
9.
DVDR1000 /0x1 /691
IC7300; IC7400; IC7403: DRAM
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.9.7
9.
GB 245
IC7410: SAA6750 (EMPIRE)
EMPIRE (SAA6750H)
1
FEATURES
• Digital YUV input according to “ITU-T 601” and to
“ITU-T 656”
• NTSC and PAL (720 pixel × 480 lines at 60 Hz and
720 pixel × 576 lines at 50 Hz)
• Integrated colour conversion 4 : 2 : 2 to 4 : 2 : 0
• Integrated format conversion to SIF format (optional)
• Real time MPEG2 Simple Profile at Main Level
(SP@ML) encoding
• IP frame or I frame only encoding supported
• Programmable Group Of Pictures (GOP) size
• Integrated motion estimation, half pixel accuracy,
search range 128 × 128 pixels
• Motion compensated noise reduction
• Elementary stream data output compliant to MPEG2
standard (“ISO 13818-2”)
• Constant Bit-Rate (CBR) and Variable Bit-Rate (VBR)
supported
• Bitstream output compatible to 16-bit parallel interface
with Motorola (68xxx like) or Intel (xxx86 like) protocol
style
• Adaptable to dedicated applications by embedded
software
• Standard software package available (refer to software
specification)
• No external host processor required
• High speed real time port for processor co-processor
applications
• Only 4 × 4 Mbit external DRAM required
• I2C-bus controlled
• Single external video clock 27 MHz
• Power supply 3.3 V
• Digital inputs 5 V tolerant
• Boundary Scan Test (BST) supported.
2
2.1
GENERAL DESCRIPTION
General
The SAA6750H is a new approach towards a stand-alone
MPEG2 video encoder IC. It combines high quality
SP at ML compliant real time encoding with
cost-effectiveness, allowing for the first time the use of an
MPEG2 encoder IC in applications and markets with a high
cost pressure. This has been achieved by means of a
number of innovations in architecture and algorithms
developed by the Philips Research Laboratories. E.g.:
• The unique motion estimation algorithm supports highly
efficient encoding by using only I frame and IP frame
mode. B frames need not be used. This leads to a
significantly smaller internal circuitry and also reduces
DRAM memory requirements from at least 4 to 2 Mbyte.
In addition, the absence of B frames simplifies editing of
the compressed data stream.
• The patented, motion-compensated temporal noise
filtering which was developed by Philips for professional
equipment reduces noise in the input video before
compression is performed. This technique gives visible
improvements in picture quality, especially in the field of
home recordings with noisy signal sources where this
has proved to be of significant benefit.
Internally the SAA6750H uses a hardware solution for data
compression and a specially developed high performance
processor for control purposes. This programmable
embedded Digital Signal Processor (DSP) approach
allows Philips to tailor various customized sets of functions
for this IC. Contact Philips for information on available
software packages.
GB 246
9.
Circuit-, IC Descriptions and List of Abbreviations
DVDR1000 /0x1 /691
Blockdiagram
VDD
+3.3 V
18
VDDCO
+3.3 V
6, 16, 28, 38,
48, 58, 66, 88,
94, 100, 110,
120, 142, 152,
166, 176, 194,
204
CASN
RASN
WEN
OEN
65
67
68
69
16 22, 24, 26, 76,
78, 80, 82,
126, 128, 130,
132, 134, 162,
178, 180, 182
ADR8 to ADR0
DATA63 to DATA0
52 to 49, 47 to 44,
42 to 39, 37 to 34,
32 to 29, 20 to 17,
15 to 12, 10 to 7,
5 to 2, 208 to 205,
203 to 200, 198 to 195,
193 to 190, 188 to 185,
175 to 172, 170 to 167
64,
62 to 59,
57 to 54
9
64
101
DRAM INTERFACE
121
122
YUV7 to
87 to 84,
74 to 71
124
8
LINE
MACROBLOCK
BITSTREAM
89
BASED
BASED
BASED
90
91
PROCESSING
PROCESSING
PROCESSING
YUV0
FID
HSYNC
VSYNC
125
DATA
OUTPUT
PORT
138 to 141,
143 to 146,
148 to 151,
153 to 156
135
MAD
SDA
SCL
VCLK
(27 MHz)
97
GLOBAL CONTROL
98
I2C-BUS
99
TRANSCEIVER
ASIP
136
102
103
SAA6750H
93
GPIO
CLOCK
27 MHz
GENERATION
PORT
TEST CONTROL BLOCK
FOR
RESETN
96
18
VSS
16
23, 25, 27, 75,
77, 79, 81, 83,
127, 129, 131,
133, 177, 179,
181, 183
VSSCO
I_MN
CSN
AD15
to AD0
119 to 116,
114 to 111,
109 to 106
DTACK_RDY
AS_ALE
DS_RDN
FAD_RWN
FAD_EN
GPIO11
to GPIO0
12
104
BOUNDARY SCAN TEST
1, 11, 21, 33,
43, 53, 63, 70,
92, 95, 105, 115,
137, 147, 157,
171, 189, 199
LRQN
URQN
16
123
start
MEM_ST
FAD_RDYN
AND
158
SCAN TEST
159
160
161
163
164
TRST TCK TMS TDI CS_TEST
Block diagram.
165
TEST
184
n.c.
TDO
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
Pin Description
SYMBOL
PIN
INPUT/OUTPUT(1)
Imax
(mA)
DESCRIPTION
VSS
1
ground
−
ground for pad ring
DATA28
2
input/output
3
DRAM data interface bit 28
DATA29
3
input/output
3
DRAM data interface bit 29
DATA30
4
input/output
3
DRAM data interface bit 30
DATA31
5
input/output
3
DRAM data interface bit 31
VDD
6
supply
−
supply voltage for pad ring
DATA32
7
input/output
3
DRAM data interface bit 32
DATA33
8
input/output
3
DRAM data interface bit 33
DATA34
9
input/output
3
DRAM data interface bit 34
DATA35
10
input/output
3
DRAM data interface bit 35
VSS
11
ground
−
ground for pad ring
DATA36
12
input/output
3
DRAM data interface bit 36
DATA37
13
input/output
3
DRAM data interface bit 37
DATA38
14
input/output
3
DRAM data interface bit 38
DATA39
15
input/output
3
DRAM data interface bit 39
VDD
16
supply
−
supply voltage for pad ring
DATA40
17
input/output
3
DRAM data interface bit 40
DATA41
18
input/output
3
DRAM data interface bit 41
DATA42
19
input/output
3
DRAM data interface bit 42
DATA43
20
input/output
3
DRAM data interface bit 43
VSS
21
ground
−
ground for pad ring
VDDCO
22
supply
−
supply voltage for core logic
VSSCO
23
ground
−
ground for core logic
VDDCO
24
supply
−
supply voltage for core logic
VSSCO
25
ground
−
ground for core logic
VDDCO
26
supply
−
supply voltage for core logic
VSSCO
27
ground
−
ground for core logic
VDD
28
supply
−
supply voltage for pad ring
DATA44
29
input/output
3
DRAM data interface bit 44
DATA45
30
input/output
3
DRAM data interface bit 45
DATA46
31
input/output
3
DRAM data interface bit 46
DATA47
32
input/output
3
DRAM data interface bit 47
VSS
33
ground
−
ground for pad ring
DATA48
34
input/output
3
DRAM data interface bit 48
DATA49
35
input/output
3
DRAM data interface bit 49
DATA50
36
input/output
3
DRAM data interface bit 50
DATA51
37
input/output
3
DRAM data interface bit 51
VDD
38
supply
−
supply voltage for pad ring
DATA52
39
input/output
3
DRAM data interface bit 52
9.
GB 247
GB 248
SYMBOL
9.
DVDR1000 /0x1 /691
PIN
INPUT/OUTPUT(1)
Circuit-, IC Descriptions and List of Abbreviations
Imax
(mA)
DESCRIPTION
DATA53
40
input/output
3
DRAM data interface bit 53
DATA54
41
input/output
3
DRAM data interface bit 54
DATA55
42
input/output
3
DRAM data interface bit 55
VSS
43
ground
−
ground for pad ring
DATA56
44
input/output
3
DRAM data interface bit 56
DATA57
45
input/output
3
DRAM data interface bit 57
DATA58
46
input/output
3
DRAM data interface bit 58
DATA59
47
input/output
3
DRAM data interface bit 59
VDD
48
supply
−
supply voltage for pad ring
DATA60
49
input/output
3
DRAM data interface bit 60
DATA61
50
input/output
3
DRAM data interface bit 61
DATA62
51
input/output
3
DRAM data interface bit 62
DATA63
52
input/output
3
DRAM data interface bit 63 (MSB)
VSS
53
ground
−
ground for pad ring
ADR0
54
output/3-state
3
DRAM address interface bit 0 (LSB)
ADR1
55
output/3-state
3
DRAM address interface bit 1
ADR2
56
output/3-state
3
DRAM address interface bit 2
ADR3
57
output/3-state
3
DRAM address interface bit 3
VDD
58
supply
−
supply voltage for pad ring
ADR4
59
output/3-state
3
DRAM address interface bit 4
ADR5
60
output/3-state
3
DRAM address interface bit 5
ADR6
61
output/3-state
3
DRAM address interface bit 6
ADR7
62
output/3-state
3
DRAM address interface bit 7
VSS
63
ground
−
ground for pad ring
ADR8
64
output/3-state
3
DRAM address interface bit 8 (MSB)
CASN
65
output/3-state
6
DRAM column address strobe (active LOW)
VDD
66
supply
−
supply voltage for pad ring
RASN
67
output/3-state
3
DRAM row address strobe (active LOW)
WEN
68
output/3-state
3
DRAM write enable (active LOW)
OEN
69
output/3-state
3
DRAM chip select (active LOW)
VSS
70
ground
−
ground for pad ring
YUV0
71
input
−
video input signal bit 0 (LSB)
YUV1
72
input
−
video input signal bit 1
YUV2
73
input
−
video input signal bit 2
YUV3
74
input
−
video input signal bit 3
VSSCO
75
ground
−
ground for core logic
VDDCO
76
supply
−
supply voltage for core logic
VSSCO
77
ground
−
ground for core logic
VDDCO
78
supply
−
supply voltage for core logic
VSSCO
79
ground
−
ground for core logic
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
SYMBOL
PIN
INPUT/OUTPUT(1)
Imax
(mA)
DESCRIPTION
VDDCO
80
supply
−
supply voltage for core logic
VSSCO
81
ground
−
ground for core logic
VDDCO
82
supply
−
supply voltage for core logic
VSSCO
83
ground
−
ground for core logic
YUV4
84
input
−
video input signal bit 4
YUV5
85
input
−
video input signal bit 5
YUV6
86
input
−
video input signal bit 6
YUV7
87
input
−
video input signal bit 7 (MSB)
VDD
88
supply
−
supply voltage for pad ring
FID
89
input
−
odd/even ?eld identi?cation
HSYNC
90
input
−
horizontal reference signal
VSYNC
91
input
−
vertical reference signal
VSS
92
ground
−
ground for pad ring
VCLK
93
input
−
video clock input (27 MHz)
VDD
94
supply
−
supply voltage for pad ring
VSS
95
ground
−
ground for pad ring
RESETN
96
input
−
hard reset input (active LOW)
MAD
97
input
−
module address (I2C-bus)
SDA
98
input/open drain output
6
serial data input/output (I2C-bus)
SCL
99
input/open drain output
−
serial clock input (I2C-bus)
VDD
100 supply
−
supply voltage for pad ring
MEM_ST
101 output/3-state
3
do not use in the application (reserved)
FAD_RWN
102 input
−
ASIP port data read/write
FAD_EN
103 input
−
ASIP port data enable
FAD_RDYN
104 open drain output
3
ASIP port data ready (active LOW)
VSS
105 ground
−
ground for pad ring
GPIO0
106 input/output
3
ASIP port data bit 0 (LSB)
GPIO1
107 input/output
3
ASIP port data bit 1
GPIO2
108 input/output
3
ASIP port data bit 2
GPIO3
109 input/output
3
ASIP port data bit 3
VDD
110 supply
−
supply voltage for pad ring
GPIO4
111 input/output
3
ASIP port data bit 4
GPIO5
112 input/output
3
ASIP port data bit 5
GPIO6
113 input/output
3
ASIP port data bit 6
GPIO7
114 input/output
3
ASIP port data bit 7
VSS
115 ground
−
ground for pad ring
GPIO8
116 input/output
3
ASIP port data bit 8
GPIO9
117 input/output
3
ASIP port data bit 9
GPIO10
118 input/output
3
ASIP port data bit 10
GPIO11
119 input/output
3
ASIP port data bit 11 (MSB)
9.
GB 249
GB 250
SYMBOL
9.
DVDR1000 /0x1 /691
PIN
INPUT/OUTPUT(1)
Circuit-, IC Descriptions and List of Abbreviations
Imax
(mA)
DESCRIPTION
VDD
120 supply
−
supply voltage for pad ring
LRQN
121 open drain output
3
output port lower watermark interrupt request (active LOW)
URQN
122 open drain/3-state
3
output port upper watermark interrupt request (active LOW)
DTACK_RDY 123 open drain output
3
output port data transfer acknowledge/ready/request
I_MN
124 input
−
output port Intel/Motorola bus style selection input
(active LOW); with internal pull-up resistor
CSN
125 input
−
output port chip select for external address mode (active LOW);
with internal pull-up resistor
VDDCO
126 supply
−
supply voltage for core logic
VSSCO
127 ground
−
ground for core logic
VDDCO
128 supply
−
supply voltage for core logic
VSSCO
129 ground
−
ground for core logic
VDDCO
130 supply
−
supply voltage for core logic
VSSCO
131 ground
−
ground for core logic
VDDCO
132 supply
−
supply voltage for core logic
VSSCO
133 ground
−
ground for core logic
VDDCO
134 supply
−
supply voltage for core logic
AS_ALE
135 input
−
output port address strobe/address latch enable
DS_RDN
136 input
−
output port data strobe/read
VSS
137 ground
−
ground for pad ring
AD15
138 input/output
3
output port multiplexed address/data line bit 15 (MSB)
AD14
139 input/output
3
output port multiplexed address/data line bit 14
AD13
140 input/output
3
output port multiplexed address/data line bit 13
AD12
141 input/output
3
output port multiplexed address/data line bit 12
VDD
142 supply
−
supply voltage for pad ring
AD11
143 input/output
3
output port multiplexed address/data line bit 11
AD10
144 input/output
3
output port multiplexed address/data line bit 10
AD9
145 input/output
3
output port multiplexed address/data line bit 9
AD8
146 input/output
3
output port multiplexed address/data line bit 8
VSS
147 ground
−
ground for pad ring
AD7
148 input/output
3
output port multiplexed address/data line bit 7/data bus bit 7
(MSB)
AD6
149 input/output
3
output port multiplexed address/data line bit 6/data bus bit 6
AD5
150 input/output
3
output port multiplexed address/data line bit 5/data bus bit 5
AD4
151 input/output
3
output port multiplexed address/data line bit 4/data bus bit 4
VDD
152 supply
−
supply voltage for pad ring
AD3
153 input/output
3
output port multiplexed address/data line bit 3/data bus bit 3
AD2
154 input/output
3
output port multiplexed address/data line bit 2/data bus bit 2
AD1
155 input/output
3
output port multiplexed address/data line bit 1/data bus bit 1
AD0
156 input/output
3
output port multiplexed address/data line bit 0 (LSB)/data bus
bit 0 (LSB)
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
SYMBOL
PIN
INPUT/OUTPUT(1)
Imax
(mA)
9.
GB 251
DESCRIPTION
VSS
157 ground
−
ground for pad ring
TDO
158 output
3
boundary scan test data output; pin not active during normal
operation; with 3-state output; note 2
TRST
159 input
−
boundary scan test reset; pin must be set to LOW for normal
operation; with internal pull-up resistor; notes 2 and 3
TCK
160 input
−
boundary scan test clock; pin must be set to LOW during normal
operation; with internal pull-up resistor; note 2
TMS
161 input
−
boundary scan test mode select; pin must ?oat or set to HIGH
during normal operation; with internal pull-up resistor; note 2
VDDCO
162 supply
−
supply voltage for core logic
TDI
163 input
−
boundary scan test data input; pin must ?oat or set to HIGH
during normal operation; with internal pull-up resistor; note 2
CS_TEST
164 input
−
test mode for the internal RAMs; pin must be set to LOW during
normal operation
TEST
165 input
−
test mode; pin must be set to LOW during normal operation
VDD
166 supply
−
supply voltage for pad ring
DATA0
167 input/output
3
DRAM data interface bit 0 (LSB)
DATA1
168 input/output
3
DRAM data interface bit 1
DATA2
169 input/output
3
DRAM data interface bit 2
DATA3
170 input/output
3
DRAM data interface bit 3
VSS
171 ground
−
ground for pad ring
DATA4
172 input/output
3
DRAM data interface bit 4
DATA5
173 input/output
3
DRAM data interface bit 5
DATA6
174 input/output
3
DRAM data interface bit 6
DATA7
175 input/output
3
DRAM data interface bit 7
VDD
176 supply
−
supply voltage for pad ring
VSSCO
177 ground
−
ground for core logic
VDDCO
178 supply
−
supply voltage for core logic
VSSCO
179 ground
−
ground for core logic
VDDCO
180 supply
−
supply voltage for core logic
VSSCO
181 ground
−
ground for core logic
VDDCO
182 supply
−
supply voltage for core logic
VSSCO
183 ground
−
ground for core logic
n.c.
184 −
DATA8
185 input/output
3
DRAM data interface bit 8
DATA9
186 input/output
3
DRAM data interface bit 9
DATA10
187 input/output
3
DRAM data interface bit 10
DATA11
188 input/output
3
DRAM data interface bit 11
VSS
189 ground
−
ground for pad ring
DATA12
190 input/output
3
DRAM data interface bit 12
DATA13
191 input/output
3
DRAM data interface bit 13
−
reserved pin; do not connect
GB 252
9.
SYMBOL
DVDR1000 /0x1 /691
PIN
INPUT/OUTPUT(1)
Circuit-, IC Descriptions and List of Abbreviations
Imax
(mA)
DESCRIPTION
DATA14
192 input/output
3
DRAM data interface bit 14
DATA15
193 input/output
3
DRAM data interface bit 15
VDD
194 supply
−
supply voltage for pad ring
DATA16
195 input/output
3
DRAM data interface bit 16
DATA17
196 input/output
3
DRAM data interface bit 17
DATA18
197 input/output
3
DRAM data interface bit 18
DATA19
198 input/output
3
DRAM data interface bit 19
VSS
199 ground
−
ground for pad ring
DATA20
200 input/output
3
DRAM data interface bit 20
DATA21
201 input/output
3
DRAM data interface bit 21
DATA22
202 input/output
3
DRAM data interface bit 22
DATA23
203 input/output
3
DRAM data interface bit 23
VDD
204 supply
−
supply voltage for pad ring
DATA24
205 input/output
3
DRAM data interface bit 24
DATA25
206 input/output
3
DRAM data interface bit 25
DATA26
207 input/output
3
DRAM data interface bit 26
DATA27
208 input/output
3
DRAM data interface bit 27
Notes
1. All input, I/O (in input mode), output (in 3-state mode) and open drain output pins are 5.0 V tolerant.
2. In accordance with the “IEEE 1149.1” standard.
3. Special functionality of pin TRST:
a) For board designs without boundary scan implementation, pin TRST must be connected to ground.
b) Pin TRST provides easy initialization of the internal BST circuit. By applying a LOW it can be used to force the
internal Test Access Port (TAP) controller to the Test-Logic-Reset state (normal operation) at once.
The 208 pins are divided in following groups:
Video input port (11 pins):
Others (14 pins):
1 video clock input pin
8 data pins
3 pins related to the I2C-bus
3 control pins.
1 pin for reset control
Data output port (23 pins):
7 pins for test purposes
16 data pins
1 pin not connected
7 control pins.
1 pin for internal test purposes.
GPIO port (15 pins):
Supply (68 pins):
12 data pins
16 core supply pins
3 control pins.
18 I/O cell supply pins
DRAM (77 pins):
64 data pins
9 address pins
4 control pins.
16 core ground pins
18 I/O cell ground pins.
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.9.8
GB 253
IC7552: SAA7118 (VIP)
PAL/NTSC/SECAM Video Decoder with Adaptive Comb Filter,
Component Video Input, VBI-Data Slicer and High Performance Scaler
1
9.
FEATURES
The SAA7118 is a video capture device for application at
the image port of VGA controller, with following feature
high lights:
Video Acquisition/ Clock
Up to sixteen analog CVBS, split as desired (All of the
CVBS inputs optionally can be used to convert VSB
signals)
Up to eight analog Y+C inputs, split as desired
Up to four analog component inputs, with embedded or
separate sync, split as desired
Four on-chip anti-aliasing filters in front of the ADC’s
Automatic Clamp Control (ACC) for CVBS, Y and C (or
VSB) and component signal
Switchable white Peak Control
Four 9 Bit Low Noise CMOS analog-to-digital converters
at two-fold ITU-656 oversampling (27 MHz)
Digitized CVBS or Y+C-signals are available on the
expansion port
Fully programmable static gain or automatic gain
control, matching to the particular signal properties
On-Chip Line Locked Clock Generation according
ITU601
Requires only one crystal (32.11 or 24.576 MHz) for all
standards
Horizontal and vertical Sync Detection
Video Decoder
Digital PLL for Synchronization and Clock Generation
from all Standards and Non- Standard Video Sources
e.g. consumer grade VTR
Digital PLL for Synchronization and Clock Generation
from all Standards and Non- Standard Video Sources
e.g. consumer grade VTR
Automatic detection of any supported colour standard
Luminance and chrominance signal processing for PAL
BGDHIN, Combination-PAL N, PAL M, NTSC M,
NTSC-Japan, NTSC 4.43 and SECAM
Adaptive 2/4-line comb filter for two dimensional
chrominance/luminance-separation, also with VTR
signals
– Increased Luminance and Chrominance Bandwidth
for all PAL and NTSC-standards
– Reduced cross colour and cross luminance artefacts
PAL delay line for correcting PAL phase errors
SAA7118
Brightness Contrast Saturation (BCS)- adjustment,
separately for composite and baseband signals
User programmable sharpness control
Fast Blanking between component inputs and a CVBS
input through a dedicated pin
Detection of copy-protected signals acc. to the
Macrovision standard, indicating level of protection
Independent Gain and Offset - adjustment for raw data
path
Component Video Processing
Synchronous Component Video (RGB) input via fast
blanking, YCbCr input
Digital matrix
Video Scaler
Horizontal and Vertical Down-Scaling and Up-Scaling to
randomly sized windows
Horizontal and Vertical Scaling range: variable zoom to
1/64 (icon)
(Note: H and V zoom are restricted by the transfer data
rates)
Anti-Alias- and Accumulating Filter for Horizontal
Scaling
Vertical Scaling with Linear Phase Interpolation and
Accumulating Filter for Anti-Aliasing (6 bit phase
accuracy)
Horizontal Phase Correct Up- and Down-Scaling for
improved signal quality of scaled data, especially for
compression and video phone applications, with 6 bit
phase accuracy (1.2 nsec step width)
Two independent programming sets for scaler part, to
define two “ranges” per field or sequences over frames
Fieldwise switching between Decoder-part and
Expansion port (X-port) input
Brightness, contrast and saturation controls for scaled
outputs
VBI-Data Decoder and Slicer
versatile VBI-data decoder, slicer, clock regeneration
and byte synchronization
e.g. for WST, NABST, Close Caption, WSS, etc.
Audio Clock Generation
Generation of a field locked Audio Master Clock to
support a constant number of audio clocks per video
field
GB 254
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
PAL/NTSC/SECAM Video Decoder with Adaptive Comb Filter,
Component Video Input, VBI-Data Slicer and High Performance Scaler
Generation of an audio serial and left/right (channel)
clock signal
Digital I/O Interfaces
Real Time signal port (R - port), incl. continuous line
locked reference clock and real time status information
supporting RTC level 3.1 (refer to external document
“RTC Functional Specification” for details)
Bidirectional Expansion Port (X - port) with half duplex
functionality (D1), 8-bit YCbCr
– output from Decoder part, real time and unscaled, or
– input to Scaler part, e.g. video from MPEG-decoder
(extension to 16 bit possible)
Video Image port (I - port) configurable for 8 - bit data
(extension to 16 bit possible) in Master Mode (own
clock), or Slave Mode (external clock), with auxiliary
timing and hand shake signals
Discontinuous data streams supported
32-word * 4 Byte FIFO register for video output data
28-word * 4 Byte FIFO register for decoded VBI output
data
Scaled 4:2:2, 4:1:1, 4:2:0, 4:1:0 YCbCr output
Scaled 8-bit luminance only and raw CVBS data output
sliced, decoded VBI data output
Miscellaneous
Power On Control
5 V tolerant digital inputs and I/O ports
Software controlled power saving stand-by modes
supported
Programming via serial I2C-bus, full read-back ability by
an external controller, bit rate up to 400 kbit/s
Boundary Scan Test circuit complies to the IEEE Std.
1149.b1 -1994
BGA156 package
2
APPLICATIONS
Multimedia
Digital Television
Image Processing
Video Phone
PC- Editing cards
PC- Tuner cards
3
SAA7118
GENERAL DESCRIPTION
Philips X-VIP is a new Multistandard Comb Filter Video
Decoder chip with additional component processing,
providing high quality, optionally scaled, video.
The SAA7118 is a combination of a four channel analog
preprocessing circuit including source selection,
anti-aliasing filter and A/D-converter, an automatic clamp
and gain control, a Clock Generation Circuit (CGC), a
Digital
Multi
Standard
Decoder
containing
two-dimensional chrominance/luminance separation by an
adaptive comb filter and a high performance scaler,
including variable horizontal and vertical up and down
scaling and a Brightness- Contrast- Saturation- Control
circuit.
It is a highly integrated circuit for Desktop Video and
similar applications. The decoder is based on the principle
of line-locked clock decoding and is able to decode the
colour of PAL, SECAM and NTSC signals into ITU-601
compatible colour component values. The SAA7118
accepts as analog inputs CVBS or S-Video (Y+C) from TV
or VCR sources, including weak and distorted signals, as
well as baseband component signals YCbCr or RGB. An
expansion port (X-port) for digital video (bi-directional half
duplex, D1 compatible) is also supported to connect to
MPEG or video phone codec. At the so called image port
(I-port) the 7118 supports 8 (16) bit wide output data with
auxiliary reference data for interfacing to VGA controllers.
The target application for SAA7118 is to capture and
optionally scale video images, to be provided as digital
video stream through the image port of a VGA controller,
for capture to system memory, or just to provide digital
baseband video to any picture improvement processing.
SAA7118 also provides means for capturing the serially
coded data in the vertical blanking interval (VBI-data). Two
principal functions are available:
- to capture raw video samples, after interpolation to the
required output data rate, via the scaler and
- a versatile data slicer (data recovery) unit.
SAA7118 incorporates also a field locked audio clock
generation. This function ensures that there is always the
same number of audio samples associated with a field, or
a set of fields. This prevents the loss of sychronization
between video and audio, during capture or playback.
All of the A/D- converters may be used to digitize a VSB
signal for further for further decoding; a dedicated output
port and a selectable VSB clock input is provided.
The circuit is controlled via I2C-bus (full write / read
capability for all programming registers, bit rate up to 400
kbits/s)
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
PAL/NTSC/SECAM Video Decoder with Adaptive Comb Filter,
Component Video Input, VBI-Data Slicer and High Performance Scaler
4
9.
GB 255
SAA7118
QUICK REFERENCE DATA
SYMBOL
PARAMETER
MIN
TYP
MAX
UNIT
VDDx
digital supply voltage
3.0
3.3
3.6
V
VDDCx
digital core supply voltage
3.0
3.3
3.6
V
VDDA
analog supply voltage
3.1
3.3
3.5
V
Tamb
ambient temperature
0
-
70
°C
-
t.b.d.
-
W
PA+D
analog and digital power
dissipation(1)
Note
1. Power consumption is measured in CVBS-input mode (only one ADC active) and 8 bit image port output mode,
expansion port is tristated
5
ORDERING AND PACKAGE INFORMATION
PACKAGE
EXTENDED TYPE
NUMBER
PINS
PIN POSITION
MATERIAL
CODE
SAA7118
156
BGA156
Plastic
SOT 472-1(BB3)
GB 256
9.
Circuit-, IC Descriptions and List of Abbreviations
DVDR1000 /0x1 /691
PAL/NTSC/SECAM Video Decoder with Adaptive Comb Filter,
Component Video Input, VBI-Data Slicer and High Performance Scaler
Video/Text Arbiter
O utput F orm atter I-P ort
Text
F IFO
Vertical S caling
H orizontal Fine(Phase-) Scaling
Audio
C lock
C bC r
H -Port
C bC r
X-Port
Y C bC rS
H P D (7:0)
XDQ
X C LK
XRDY
XTAL
X TALI
X TAL
RTC O
RTS1
Video
C lock
RTS0
LLC 2
LLC
Pow er-O n C ontrol
Pow er Supply
GPO
S
S ynchronization
Processing
S
V XD D
V XS S
VDDE
V SS E
VDDI
V SS I
VDDA
V SS A
AGNDA
AO U T
AI44
AI4D
AI43
AI42
Analog4
+
AD C 4
Fig.1 Blockdiagram SAA7118
AI41
AI3D
AI34
AI33
Analog3
+
AD C 3
AI32
AI31
XRH
S
Lum inance
Y
C O M B Filter
C
AI24
AI2D
AI23
A M C LK
X TO U T
Y
Cr
Cb
R AW
Analog2
+
AD C 2
AI22
AI21
AI14
AI1D
AI13
A LR C LK
X PD (7:0)
S
R AW
YC bCr
C hrom inance
Processing
Cr
Processing
B
Y
Cb
C om ponents
R
G
F ast Sw itch D elay
A nalog1
+
AD C 1
A I11
AI12
TD I
TD O
X RV
YC bC r
S
IIC R egister M A P
C ontrol
TR S TN
X TR I
Analog Input C ontrol
FSW
C LKE XT
TC K
A M XC LK
D ecoder O utput C ontrol
AD -Port
AD P(8:0)
VBI D ata S licer
Line F IFO Buffer
CE
TM S
A SC LK
F IR -P refilter
Prescaler
BC S-Scaler
TE ST
R ES O N
Video FIFO
Scaler Event C ontroller
2nd Task IIC R egister M ap Scaler
1st Task IIC R egister M ap Scaler
SDA
AG ND
IN T_A
SCL
B oundary Scan
ITR I
ITR D Y
ID Q
IC LK
IPD (7:0)
IG P H
IG P V
IG P 0
IG P 1
SYSTEM BLOCK DIAGRAM
B lockdiagram S A A 7118
6
SAA7118
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
PAL/NTSC/SECAM Video Decoder with Adaptive Comb Filter,
Component Video Input, VBI-Data Slicer and High Performance Scaler
7
PINNING AND CONFIGURATION
MXXxxx
handbook, halfpage
P
N
M
L
K
J
H
G
F
E
D
C
B
A
SAA7118
SAA7108E
SAA7109E
1 2 3 4 5 6 7 8 9 10 11 12 13 14
Bottom View
Fig.2 Package/Pinning SAA7118
7.1
Pinning List
Table 1
Pinning List SAA7118
PIN
NAME
TYPE
A02
XTOUT
O
Crystal oscillator output signal
DESCRIPTION
A03
XTAL
O
Connect output pin for quartz
A04
VXSS
P
Ground for crystal oscillator
A05
TDO
O
Test Data Output for Boundary Scan Test (2)
A06
XRDY
O
Status flag or ready signal from scaler
A07
XCLK
I/O
Clock I/O expansion port
A08
XPD0
I/O
LSB of expansion port bus
A09
XPD2
I/O
MSB-5 of expansion port bus
A10
XPD4
I/O
MSB-3 of expansion port bus
A11
XPD6
I/O
MSB-1 of expansion port bus
A12
TEST5
I/pu
Scan test input; do not connect
A13
TEST3
I/pu
Scan test input; do not connect
B01
AI41
I
Analog input #41
B02
RES1
O
Reserved pin for future extensions or testing, do not connect
B03
VXDD
P
Supply for crystal oscillator
9.
GB 257
SAA7118
GB 258
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
PAL/NTSC/SECAM Video Decoder with Adaptive Comb Filter,
Component Video Input, VBI-Data Slicer and High Performance Scaler
PIN
NAME
TYPE
B04
XTALI
I
SAA7118
DESCRIPTION
Connect input pin for quartz
B05
TDI
I/pu
Test Data Input for Boundary Scan Test (with internal pull-up) (2)
B06
TCK
I/pu
Test Clock for Boundary Scan Test (with internal pull-up) (2)
B07
XDQ
I/O
Data qualifier for expansion port
B08
XPD1
I/O
MSB-6 of expansion port bus
B09
XPD3
I/O
MSB-4 of expansion port bus
B10
XPD5
I/O
MSB-2 of expansion port bus
B11
XTRI
I
X-port output control signal; effects (XPD[7:0], XRH, XRV, XDQ and XCLK)
B12
TEST4
O
Scan test output; do not connect
B13
RES2
NC
Reserved pin for future extensions or testing, do not connect
B14
RES3
NC
Reserved pin for future extensions or testing, do not connect
C01
VSSA4
P
Ground for analog input AI4x
C02
AGND
P
Analog Signal Ground
C03
RES4
NC
C04
RES5
NC
C05
VDDE1
P
C06
TRSTN
I/pu
C07
XRH
I/O
C08
VDDI1
P
Digital supply core
C09
VDDE2
P
Digital supply peripheral cells
C10
VDDI2
P
Digital supply core
C11
XPD7
I/O
MSB of expansion port bus
C12
RES6
NC
Reserved pin for future extensions or testing, do not connect
Reserved pin for future extensions or testing, do not connect
Reserved pin for future extensions or testing, do not connect
Digital supply peripheral cells
Test ReSeT Not for Boundary Scan Test (with internal pull-up) (1)
Horizontal reference expansion-port
C13
RES7
NC
Reserved pin for future extensions or testing, do not connect
C14
TEST2
I/pu
Scan test input; do not connect
D01
AI43
I
Analog input #43
D02
AI42
I
Analog input #42
D03
AI4D
I/O
D04
VDDA4
P
Supply for analog input AI4x
D05
VSSE1
P
Digital ground peripheral cells
D06
TMS
I/pu
D07
VSSI1
P
D08
XRV
I/O
D09
VSSE2
P
Digital ground peripheral cells
D10
VSSI2
P
Digital ground core
D11
VSSE3
P
Digital ground peripheral cells
D12
VDDE3
P
Digital supply peripheral cells
D13
TEST1
I/pu
Scan test input; do not connect
D14
HPD0
I/O
LSB of H-port bus, extended CbCr input for X-port, extended CbCr output for
I-port
E01
AI44
I
Differential input for AI4x
Test Mode Select for Boundary Scan Test or Scan Test (with internal pull-up) (2)
Digital ground core (Substrate connection)
Vertical reference for expansion-port
Analog input #44
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
PAL/NTSC/SECAM Video Decoder with Adaptive Comb Filter,
Component Video Input, VBI-Data Slicer and High Performance Scaler
PIN
NAME
TYPE
E02
VDDA4A
P
9.
GB 259
SAA7118
DESCRIPTION
Supply for analog input AI4x
E03
AI31
I
Analog input #31
E04
VSSA3
P
Ground for analog input AI3x
E11
HPD1
I/O
MSB-6 of H-port bus, extended CbCr input for X-port, extended CbCr output for
I-port
E12
HPD3
I/O
MSB-4 of H-port bus, extended CbCr input for X-port, extended CbCr output for
I-port
E13
HPD2
I/O
MSB-5 of H-port bus, extended CbCr input for X-port, extended CbCr output for
I-port
E14
HPD4
I/O
MSB-3 of H-port bus, extended CbCr input for X-port, extended CbCr output for
I-port
F01
AI3D
I/O
Differential input for AI3x
F02
AI32
I
Analog input #32
F03
AI33
I
Analog input #33
F04
VDDA3
P
Supply for analog input AI3x
F11
VSSI3
P
Digital ground core
F12
VDDI3
P
Digital supply core
F13
HPD5
I/O
MSB-2 of H-port bus, extended CbCr input for X-port, extended CbCr output for
I-port
F14
HPD6
I/O
MSB-1 of H-port bus, extended CbCr input for X-port, extended CbCr output for
I-port
G01
AI34
I
Analog input #34
G02
VDDA3A
P
Supply for analog input AI3x
G03
AI22
I
Analog input #22
G04
AI21
I
Analog input #21
G11
VSSE4
P
Digital ground peripheral cells
G12
IPD1
O
MSB-6 of Image port bus
G13
HPD7
I/O
MSB of H-port bus, extended CbCr input for X-port, extended CbCr output for
I-port
G14
IPD0
O
LSB of Image port bus
H01
AI2D
I/O
Differential input for AI2x
H02
AI23
I
Analog input #23
H03
VSSA2
P
Ground for analog input AI2x
H04
VDDA2
P
Supply for analog input AI2x
H11
IPD2
O
MSB-5 of Image port bus
H12
VDDE4
P
Digital supply peripheral cells
H13
IPD4
O
MSB-3 of Image port bus
H14
IPD3
O
MSB-4 of Image port bus
J01
VDDA2A
P
Supply for analog input AI2x
J02
AI11
I
Analog input #11
J03
AI24
I
Analog input #24
J04
VSSA1
P
Ground for analog input AI1x
GB 260
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
PAL/NTSC/SECAM Video Decoder with Adaptive Comb Filter,
Component Video Input, VBI-Data Slicer and High Performance Scaler
PIN
NAME
TYPE
DESCRIPTION
J11
VSSI4
P
J12
VDDI4
P
Digital supply core
J13
IPD6
O
MSB-1 of Image port bus
J14
IPD5
O
MSB-2 of Image port bus
K01
AI12
I
Analog input #12
K02
AI13
I
Analog input #13
K03
AI1D
I/O
K04
VDDA1
P
Supply for analog input AI1x
K11
IPD7
O
MSB of Image port bus
K12
IGPH
O
Multi purpose horizontal reference signal
K13
IGP1
O
General purpose signal #1
K14
IGPV
O
Multi purpose vertical reference signal
L01
VDDA1A
P
Supply for analog input AI1x
L02
AGNDA
P
Analog signal ground connection
Digital ground core
Differential input for AI1x
L03
AI14
I
Analog input #14
L04
VSSE5
P
Digital ground peripheral cells
L05
VSSI5
P
Digital ground core
L06
ADP6
O
MSB-2 of Direct A/D-converted output bus (VSB)
L07
ADP3
O
MSB-5 of Direct A/D-converted output bus (VSB)
L08
VSSE6
P
Digital ground peripheral cells
L09
VSSI6
P
Digital ground core
O/st/pd RTC output;
strap to LOW (4k7) for first I2C slave address 42h
strap to HIGH (4k7) for second I2C slave address 40h
(3)
L10
RTCO
L11
VSSE7
P
L12
ITRI
I/O
Image-port control signal, effects all Image port pins
L13
IDQ
O
Data qualifier for image port
L14
IGP0
O
General purpose signal #0
M01
AOUT
O
Analog test output (not for use in application)
M02
VSSA0
P
Ground for internal clock generator
M03
VDDA0
P
Supply for internal clock generator
M04
VDDE5
P
Digital supply peripheral cells
M05
VDDI5
P
Digital supply core
M06
ADP7
O
MSB-1 of Direct A/D-converted output bus (VSB)
M07
ADP2
O
MSB-6 of Direct A/D-converted output bus (VSB)
M08
VDDE6
P
Digital supply peripheral cells
M09
VDDI6
P
Digital supply core
M10
RTS0
O
Real time status or sync information
M11
VDDE7
P
Digital supply peripheral cells
M12
AMXCLK
I
Audio Master External clock input
Digital ground peripheral cells
SAA7118
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
PAL/NTSC/SECAM Video Decoder with Adaptive Comb Filter,
Component Video Input, VBI-Data Slicer and High Performance Scaler
9.
GB 261
SAA7118
PIN
NAME
TYPE
DESCRIPTION
M13
FSW
I/pd
Fast Switch (Blanking), with internal pull-down,
inserts component inputs into CVBS signal
M14
ICLK
I/O
Clock output signal for image-port, LCLK of LPB image port mode, or optional
asynchronous backend clock input
N01
RES8
NC
Reserved pin for future extensions or testing, do not connect
N02
RES9
I/pu
Reserved pin for future extensions or testing, do not connect
N03
RES10
I/pd
Reserved pin for future extensions or testing, do not connect
N04
CE
I/pu
Chip Enable or Reset with internal pull-up
N05
LLC2
O
N06
CLKEXT
I
External clock input intended for A/D-conversion of VSB signals (36 MHz)
N07
ADP5
O
MSB-3 of Direct A/D-converted output bus (VSB)
N08
ADP0
O
LSB of Direct A/D-converted output bus (VSB)
N09
SCL
I
I2C Serial Clock
N10
RTS1
O
Real time status or sync information
N11
ASCLK
O
Audio serial clock
N12
ITRDY
I
Target Ready for image port bus
N13
RES11
NC
Reserved pin for future extensions or testing, do not connect
N14
RES12
NC
Reserved pin for future extensions or testing, do not connect
P02
RES13
I/O
Reserved pin for future extensions or testing, do not connect
P03
EXMCLR
I/pd
P04
LLC
O
Line-locked clock (27 MHz nominal)
P05
RESON
O
Reset Output Not signal
Line-locked clock at half frequency (13.5 MHz nominal)
External Mode Clear, with internal pull-down
P06
ADP8
O
MSB of Direct A/D-converted output bus (VSB)
P07
ADP4
O
MSB-4 of Direct A/D-converted output bus (VSB)
P08
ADP1
O
MSB-7 of Direct A/D-converted output bus (VSB)
P09
INT_A
O/od
I2C interrupt flag (Low if any enabled status bit has changed)
P10
SDA
I/O/od
I2C Serial Data
P11
AMCLK
O
P12
ALRCLK
P13
TEST0
Audio Master clock, must be less than half the crystal clock frequency
O/st/pd Audio left/right clock,
strap to LOW (4k7) for 24.576 MHz crystal
strap to HIGH (4k7) for 32.11 MHz crystal (3)
I/pu
Scan test input; do not connect
TYPE description:
I=input, O=output, P=power, NC=not connected, st=strapping, pu=pull-up, pd=pull-down, od=open drain
Notes
1. This pin provides easy initialization of BST circuitry. TRSTN can be used to force the TAP (Test Access Port)
controller to the Test-Logic-Reset state (normal operation) at once
2. According to the IEEE1149.b1-1994 standard the pads TDI and TMS are input pads with a internal pull-up transistor
and TDO a tri-state output pad. TCK, TRSTN are also built with internal pile-up
3. Strapping remark: If the strapping pin is unused, the internal pull-down resistor is sufficient for strap function.
If pin is used in an application, an external strapping resistor (4,7k) is necessary to get a certain strap function.
GB 262
9.9.9
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
IC7703: DSP56362
DSP56362
×
×
×
×
×
×
×
×
→
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
SIGNAL DESCRIPTION
GB 263
GB 264
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 265
GB 266
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 267
9.9.10 IC7700: SRAM
CY7C1019V33
Features
memory expansion is provided by an active LOW chip enable
(CE1), an active HIGH chip enable (CE2), an active LOW output enable (OE), and three-state drivers. Writing to the device
is accomplished by taking chip enable one (CE1) and write
enable (WE) inputs LOW and chip enable two (CE 2) input
HIGH. Data on the eight I/O pins (I/O0 through I/O7) is then
written into the location specified on the address pins (A0
through A16).
• High speed
— tAA = 12, 15, 20 ns
• VCC = 3.3V ± 10%
• Low active power
— 432 mW (max.)
— 288 mW (L version)
• Low CMOS standby power
— 18 mW (max.)
•
•
•
•
— 7.2 mW (L version)
2.0V Data Retention
Automatic power-down when deselected
TTL-compatible inputs and outputs
Easy memory expansion with CE1, CE2, and OE options
Functional Description
The CY7C109V33/CY7C1009V33 is a high-performance
CMOS static RAM organized as 131,072 words by 8 bits. Easy
Reading from the device is accomplished by taking chip enable one (CE1) and output enable (OE) LOW while forcing
write enable (WE) and chip enable two (CE 2) HIGH. Under
these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.
The eight input/output pins (I/O0 through I/O7) are placed in a
high-impedance state when the device is deselected (CE1
HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or
during a write operation (CE1 LOW, CE2 HIGH, and WE LOW).
The CY7C109V33 is available in standard 32-pin,
400-mil-wide SOJ package. The CY7C1009V33 is available in
a 32-pin, 300-mil-wide SOJ package. The CY7C1009V33 and
CY7C109V33 are functionally equivalent in all other respects.
Logic Block Diagram
Pin Configurations
SOJ
Top View
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
I/O0
INPUT BUFFER
I/O1
I/O2
512 x 256 x 8
ARRAY
SENSE AMPS
ROW DECODER
A0
A1
A2
A3
A4
A5
A6
A7
A8
I/O3
I/O4
I/O5
OE
COLUMN
DECODER
POWER
DOWN
I/O6
I/O7
A9
A 10
A 11
A 12
A 13
A14
A15
A16
CE1
CE2
WE
109V33–1
A11
A9
A8
A13
WE
CE2
A15
VCC
NC
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
TSOP I
Top View
(not to scale)
109V33–2
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
A3
109V33–3
GB 268
9.
DVDR1000 /0x1 /691
9.10 IC’s Divio
9.10.1 IC7101: 58PDI1394P11A
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 269
GB 270
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 271
GB 272
9.
DVDR1000 /0x1 /691
9.10.2 IC7103: PDI1394L21
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 273
GB 274
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 275
9.10.3 IC7203: P89C51
80C51 8-bit Flash microcontroller family
16KB/32KB/64KB ISP/IAP Flash with 512B/512B/1KB RAM
DESCRIPTION
The P89C51RB2/RC2/RD2 device contains a non-volatile
16kB/32kB/64kB Flash program memory that is both parallel
programmable and serial In-System and In-Application
Programmable. In-System Programming (ISP) allows the user to
download new code while the microcontroller sits in the application.
In-Application Programming (IAP) means that the microcontroller
fetches new program code and reprograms itself while in the
system. This allows for remote programming over a modem link.
A default serial loader (boot loader) program in ROM allows serial
In-System programming of the Flash memory via the UART without
the need for a loader in the Flash code. For In-Application
Programming, the user program erases and reprograms the Flash
memory by use of standard routines contained in ROM.
This device executes one machine cycle in 6 clock cycles, hence
providing twice the speed of a conventional 80C51. An OTP
configuration bit lets the user select conventional 12 clock timing
if desired.
P89C51RB2/P89C51RC2/
P89C51RD2
FEATURES
80C51 Central Processing Unit
On-chip Flash Program Memory with In-System Programming
(ISP) and In-Application Programming (IAP) capability
Boot ROM contains low level Flash programming routines for
downloading via the UART
Can be programmed by the end-user application (IAP)
6 clocks per machine cycle operation (standard)
12 clocks per machine cycle operation (optional)
Speed up to 20 MHz with 6 clock cycles per machine cycle
(40 MHz equivalent performance); up to 33 MHz with 12 clocks
per machine cycle
Fully static operation
RAM expandable externally to 64 kB
This device is a Single-Chip 8-Bit Microcontroller manufactured in
advanced CMOS process and is a derivative of the 80C51
microcontroller family. The instruction set is 100% compatible with
the 80C51 instruction set.
4 level priority interrupt
The device also has four 8-bit I/O ports, three 16-bit timer/event
counters, a multi-source, four-priority-level, nested interrupt structure,
an enhanced UART and on-chip oscillator and timing circuits.
Full-duplex enhanced UART
The added features of the P89C51RB2/RC2/RD2 makes it a
powerful microcontroller for applications that require pulse width
modulation, high-speed I/O and up/down counting capabilities such
as motor control.
7 interrupt sources
Four 8-bit I/O ports
± Framing error detection
± Automatic address recognition
Power control modes
± Clock can be stopped and resumed
± Idle mode
± Power down mode
Programmable clock out
Second DPTR register
Asynchronous port reset
Low EMI (inhibit ALE)
Programmable Counter Array (PCA)
± PWM
± Capture/compare
GB 276
9.
Circuit-, IC Descriptions and List of Abbreviations
DVDR1000 /0x1 /691
80C51 8-bit Flash microcontroller family
16KB/32KB/64KB ISP/IAP Flash with 512B/512B/1KB RAM
P89C51RB2/P89C51RC2/
P89C51RD2
BLOCK DIAGRAM
P0.0±P0.7
P2.0±P2.7
PORT 0
DRIVERS
PORT 2
DRIVERS
VCC
VSS
RAM ADDR
REGISTER
PORT 0
LATCH
RAM
PORT 2
LATCH
FLASH
8
B
REGISTER
STACK
POINTER
ACC
PROGRAM
ADDRESS
REGISTER
TMP1
TMP2
BUFFER
ALU
SFRs
TIMERS
PSW
PC
INCREMENTER
P.C.A.
8
16
PSEN
ALE
EAVPP
TIMING
AND
CONTROL
RST
INSTRUCTION
REGISTER
PROGRAM
COUNTER
PD
DPTR'S
MULTIPLE
PORT 1
LATCH
PORT 3
LATCH
PORT 1
DRIVERS
PORT 3
DRIVERS
P1.0±P1.7
P3.0±P3.7
OSCILLATOR
XTAL1
XTAL2
SU01065
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
80C51 8-bit Flash microcontroller family
Plastic Leaded Chip Carrier
VCC
6
VSS
XTAL1
40
PORT 0
DATA BUS
LCC
17
PORT 1
RST
EA/VPP
PSEN
29
18
PORT 2
ALE/PROG
PORT 3
39
ADDRESS AND
T2
T2EX
SECONDARY FUNCTIONS
1
7
XTAL2
RxD
TxD
INT0
INT1
T0
T1
WR
RD
GB 277
P89C51RB2/P89C51RC2/
P89C51RD2
16KB/32KB/64KB ISP/IAP Flash with 512B/512B/1KB RAM
LOGIC SYMBOL
9.
ADDRESS BUS
SU01302
PINNING
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Function
NIC*
P1.0/T2
P1.1/T2EX
P1.2/ECI
P1.3/CEX0
P1.4/CEX1
P1.5/CEX2
P1.6/CEX3
P1.7/CEX4
RST
P3.0/RxD
NIC*
P3.1/TxD
P3.2/INT0
P3.3/INT1
Pin
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
28
Pin
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Function
P3.4/T0
P3.5/T1
P3.6/WR
P3.7/RD
XTAL2
XTAL1
VSS
NIC*
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
* NO INTERNAL CONNECTION
Function
P2.7/A15
PSEN
ALE/PROG
NIC*
EA/VPP
P0.7/AD7
P0.6/AD6
P0.5/AD5
P0.4/AD4
P0.3/AD3
P0.2/AD2
P0.1/AD1
P0.0/AD0
VCC
SU00023
Plastic Dual In-Line Package
Plastic Quad Flat Pack
T2/P1.0 1
40 VCC
T2EX/P1.1 2
39 P0.0/AD0
ECI/P1.2 3
38 P0.1/AD1
CEX0/P1.3 4
37 P0.2/AD2
CEX1/P1.4 5
36 P0.3/AD3
CEX2/P1.5 6
35 P0.4/AD4
CEX3/P1.6 7
34 P0.5/AD5
CEX4/P1.7 8
33 P0.6/AD6
TxD/P3.1 11
DUAL
IN-LINE
PACKAGE
31 EA/VPP
30 ALE/PROG
INT0/P3.2 12
29 PSEN
INT1/P3.3 13
28 P2.7/A15
T0/P3.4 14
27 P2.6/A14
T1/P3.5 15
26 P2.5/A13
WR/P3.6 16
25 P2.4/A12
RD/P3.7 17
24 P2.3/A11
XTAL2 18
23 P2.2/A10
XTAL1 19
22 P2.1/A9
VSS 20
21 P2.0/A8
33
LQFP
11
23
12
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Function
P1.5/CEX2
P1.6/CEX3
P1.7/CEX4
RST
P3.0/RxD
NIC*
P3.1/TxD
P3.2/INT0
P3.3/INT1
P3.4/T0
P3.5/T1
P3.6/WR
P3.7/RD
XTAL2
XTAL1
* NO INTERNAL CONNECTION
SU00021
34
1
32 P0.7/AD7
RST 9
RxD/P3.0 10
44
Pin
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
22
Function
VSS
NIC*
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15
PSEN
ALE/PROG
NIC*
EA/VPP
P0.7/AD7
Pin
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Function
P0.6/AD6
P0.5/AD5
P0.4/AD4
P0.3/AD3
P0.2/AD2
P0.1/AD1
P0.0/AD0
VCC
NIC*
P1.0/T2
P1.1/T2EX
P1.2/ECI
P1.3/CEX0
P1.4/CEX1
SU01400
GB 278
9.
Circuit-, IC Descriptions and List of Abbreviations
DVDR1000 /0x1 /691
80C51 8-bit Flash microcontroller family
16KB/32KB/64KB ISP/IAP Flash with 512B/512B/1KB RAM
P89C51RB2/P89C51RC2/
P89C51RD2
PIN DESCRIPTIONS
PIN NUMBER
MNEMONIC
TYPE
NAME AND FUNCTION
PDIP
PLCC
LQFP
VSS
20
22
16
I
Ground: 0 V reference.
VCC
40
44
38
I
Power Supply: This is the power supply voltage for normal, idle, and power-down
operation.
39±32
43±36
37±30
I/O
Port 0: Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that have 1s
written to them float and can be used as high-impedance inputs. Port 0 is also the
multiplexed low-order address and data bus during accesses to external program
and data memory. In this application, it uses strong internal pull-ups when emitting 1s.
1±8
2±9
40±44,
1±3
I/O
Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups on all pins
except P1.6 and P1.7 which are open drain. Port 1 pins that have 1s written to them
are pulled high by the internal pull-ups and can be used as inputs. As inputs, port 1
pins that are externally pulled low will source current because of the internal
pull-ups. (See DC Electrical Characteristics: IIL).
1
2
40
I/O
2
3
4
5
6
7
8
3
4
5
6
7
8
9
41
42
43
44
1
2
3
I
I
I/O
I/O
I/O
I/O
I/O
21±28
24±31
18±25
I/O
P0.0±0.7
P1.0±P1.7
P2.0±P2.7
Alternate functions for 89C51RB2/RC2/RD2 Port 1 include:
T2 (P1.0): Timer/Counter 2 external count input/Clockout (see Programmable
Clock-Out)
T2EX (P1.1): Timer/Counter 2 Reload/Capture/Direction Control
ECI (P1.2): External Clock Input to the PCA
CEX0 (P1.3): Capture/Compare External I/O for PCA module 0
CEX1 (P1.4): Capture/Compare External I/O for PCA module 1
CEX2 (P1.5): Capture/Compare External I/O for PCA module 2
CEX3 (P1.6): Capture/Compare External I/O for PCA module 3
CEX4 (P1.7): Capture/Compare External I/O for PCA module 4
Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 pins that
have 1s written to them are pulled high by the internal pull-ups and can be used as
inputs. As inputs, port 2 pins that are externally being pulled low will source current
because of the internal pull-ups. (See DC Electrical Characteristics: IIL). Port 2
emits the high-order address byte during fetches from external program memory
and during accesses to external data memory that use 16-bit addresses (MOVX
@DPTR). In this application, it uses strong internal pull-ups when emitting 1s.
During accesses to external data memory that use 8-bit addresses (MOV @Ri),
port 2 emits the contents of the P2 special function register.
P2.7 must be a ªIº to program and erase the device.
P3.0±P3.7
10±17
11,
13±19
5, 7±13
I/O
Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins that
have 1s written to them are pulled high by the internal pull-ups and can be used as
inputs. As inputs, port 3 pins that are externally being pulled low will source current
because of the pull-ups. (See DC Electrical Characteristics: IIL). Port 3 also serves
the special features of the 89C51RB2/RC2/RD2, as listed below:
RxD (P3.0): Serial input port
TxD (P3.1): Serial output port
INT0 (P3.2): External interrupt
INT1 (P3.3): External interrupt
T0 (P3.4): Timer 0 external input
T1 (P3.5): Timer 1 external input
WR (P3.6): External data memory write strobe
RD (P3.7): External data memory read strobe
10
11
12
13
14
15
16
17
11
13
14
15
16
17
18
19
5
7
8
9
10
11
12
13
I
O
I
I
I
I
O
O
RST
9
10
4
I
Reset: A high on this pin for two machine cycles while the oscillator is running,
resets the device. An internal resistor to VSS permits a power-on reset using only
an external capacitor to VCC.
ALE
30
33
27
O
Address Latch Enable: Output pulse for latching the low byte of the address
during an access to external memory. In normal operation, ALE is emitted twice
every machine cycle, and can be used for external timing or clocking. Note that one
ALE pulse is skipped during each access to external data memory. ALE can be
disabled by setting SFR auxiliary.0. With this bit set, ALE will be active only during a
MOVX instruction.
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
80C51 8-bit Flash microcontroller family
16KB/32KB/64KB ISP/IAP Flash with 512B/512B/1KB RAM
PIN NUMBER
MNEMONIC
TYPE
9.
GB 279
P89C51RB2/P89C51RC2/
P89C51RD2
NAME AND FUNCTION
PDIP
PLCC
LQFP
PSEN
29
32
26
O
Program Store Enable: The read strobe to external program memory. When
executing code from the external program memory, PSEN is activated twice each
machine cycle, except that two PSEN activations are skipped during each access
to external data memory. PSEN is not activated during fetches from internal
program memory.
EA/VPP
31
35
29
I
External Access Enable/Programming Supply Voltage: EA must be externally
held low to enable the device to fetch code from external program memory
locations. If EA is held high, the device executes from internal program memory.
The value on the EA pin is latched when RST is released and any subsequent
changes have no effect. This pin also receives the programming supply voltage
(VPP) during Flash programming.
XTAL1
19
21
15
I
Crystal 1: Input to the inverting oscillator amplifier and input to the internal clock
generator circuits.
XTAL2
18
20
14
O
Crystal 2: Output from the inverting oscillator amplifier.
NOTE:
To avoid ªlatch-upº effect at power-on, the voltage on any pin (other than VPP) must not be higher than VCC + 0.5 V or less than VSS ± 0.5 V.
GB 280
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
9.10.4 IC7307; IC7308: CY2071AS
CY2071A
EPROM Programmable Clock Generator
Features
Benefits
Single phase-locked loop architecture
Generates a custom frequency from an external source
EPROM programmability
Easy customization and fast turnaround
Factory-programmable (CY2071A, CY2071AI) or field- Programming support available for all opportunities
programmable (CY2071AF, CY2071AFI) device options
Up to three configurable outputs
Generates three related frequencies from a single device
Low-skew, low-jitter, high-accuracy outputs
Meets critical industry standard timing requirements
Internal loop filter
Alleviates the need for external components
Power management (OE)
Supports low-power applications
Frequency select options
3 outputs with 2 user selectable frequencies
Configurable 5V or 3.3V operation
Supports industry standard design platforms
8-pin 150-mil SOIC package
Industry-standard packaging saves on board space
i
Selector Guide
Part Number
Outputs
Input Frequency Range
CY2071A
3
10 MHz–25 MHz (external crystal)
1 MHz–30 MHz (reference clock)
500 kHz–130 MHz (5V)
500 kHz–100 MHz (3.3V)
Output Frequency Range
Factory Programmable
Commercial Temperature
CY2071AI
3
10 MHz–25 MHz (external crystal)
1 MHz–30 MHz (reference clock)
500 kHz–100 MHz (5V)
500 kHz–80 MHz (3.3V)
Factory Programmable
Industrial Temperature
CY2071AF
3
10 MHz–25 MHz (external crystal)
1 MHz–30 MHz (reference clock)
500 kHz–100 MHz (5V)
500 kHz–80 MHz (3.3V)
Field Programmable
Commercial Temperature
CY2071AFI
3
10 MHz–25 MHz (external crystal)
1 MHz–30 MHz (reference clock)
500 kHz–90 MHz (5V)
500 kHz–66.6 MHz (3.3V)
Field Programmable
Industrial Temperature
Logic Block Diagram for CY2071A
XTALIN
REFERENCE
OSCILLATOR
CLKA
EPROMConfigurable
Multiplexer
and Divide
Logic
XTALOUT
PLL
Block
CLKB
CLKC
OE / FS
Pin Configuration
8-pin SOIC
Top View
CLKA
GND
XTALIN
XTALOUT
1
2
3
4
8
7
6
5
OE/FS
VDD
CLKC
CLKB
Specifics
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 281
Pin Summary
Name
Number
Description
CLKA
1
Configurable Clock Output
GND
2
Ground
XTALIN
3
Reference Crystal Input or External Reference Clock Input
XTALOUT
4
Reference Crystal Feedback
CLKB
5
Configurable Clock Output
CLKC
6
Configurable Clock Output
VDD
7
Voltage Supply
OE / FS
8
Output Control Pin, either Output Enable or Frequency Select Input
(Active-HIGH, internal pull-up resistor to VDD)
Notes:
1. For best accuracy, use a parallel-resonant crystal, CL = 17 pF.
2. Float XTALOUT pin if XTALIN is driven by reference clock (as opposed to an external crystal).
Functional Description
The CY2071A is a general-purpose clock synthesizer designed for use in applications such as modems, disk drives,
CD-ROM drives, video CD players, games, set-top boxes, and
data/telecommunications. The device offers up to three configurable clock outputs in an 8-pin, 150-mil SOIC package and
can operate off either a 3.3V or 5V power supply. The on-chip
reference oscillator is designed for 10-MHz to 25-MHz crystals. Alternatively, an external reference clock of frequency between 1 MHz and 30 MHz can be used.
The CY2071A has one PLL and outputs three factory-EPROM
configurable clocks: CLKA, CLKB, and CLKC. The output
clocks can originate either from the PLL or the reference, or
selected dividers thereof. Additionally, pin 8 can be configured
to be an Output Enable or a Select input.
The CY2071A can replace multiple Metal Can Oscillators
(MCO) in a synchronous system, providing cost and board
space savings to the manufacturer. Hence, these devices are
ideally suited for applications that require multiple, accurate,
and stable clocks synthesized from low-cost generators in
small packages. A hard-disk drive is an example of such an
application. In this case, CLKA drives the PLL in the Read
Controller, while CLKB and CLKC drive the MCU and associated sequencers.
CyClocks™ Software
CyClocks is an easy-to-use software application that allows
you to configure any one of the EPROM-Programmable Clocks
offered by Cypress. You may specify the input frequency, PLL
and output frequencies, and different functional options.
Please note the output frequency ranges in this data sheet
when specifying them in CyClocks to ensure that you stay within the limits. You can download a copy of CyClocks free on the
Cypress Semiconductor website at www.cypress.com.
Consider using the CY2081 for applications that require unrelated output frequencies. Consider using the CY2291,
CY2292, or CY2907 for applications that require more than
three output clocks.
Cypress FTG Programmer
The Cypress Frequency Timing Generator (FTG) Programmer
is a portable programmer designed to custom program our
family of EPROM Field Programmable Clock Devices. The
FTG programmers connect to a PC serial port and allow users
of CyClocks software to quickly and easily program any of the
CY2291F, CY2292F, CY2071AF, and CY2907F devices. The
ordering code for the Cypress FTG Programmer is CY3670.
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Supply Voltage................................................–0.5V to +7.0V
DC Input Voltage ..................................... –0.5V to VDD+0.5V
Storage Temperature ................................. –65˚C to +150˚C
Max. Soldering Temperature (10 sec) ..........................260˚C
Junction Temperature ...................................................150˚C
Static Discharge Voltage ........................................... >2000V
(per MIL-STD-883, Method 3015)
GB 282
9.
DVDR1000 /0x1 /691
9.10.5 IC7404: NW701
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 283
GB 284
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 285
GB 286
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.10.6 IC7506: UDA1334ATS
9.
GB 287
GB 288
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 289
GB 290
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 291
GB 292
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 293
GB 294
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
9.11 IC’s Progressive Scan
9.11.1 FLI2200
FLI2200
Description
The FLI2200 is a single chip implementation of Faroudja
Laboratories’ award winning deinterlacing and postprocessing algorithms that produce the highest quality
progressive video output from a variety of interlaced video
inputs including 525/60 (NTSC) or 625/50 (PAL or SECAM).
It uses patented and patent pending motion-adaptive
deinterlacing that selects the optimal filtering on a per-pixel
basis. This includes detection and proper interleaving of 3:2
and 2:2 pulldown for film-base sources, including continuous
monitoring and compensation for bad edits that occur
frequently in broadcast material due to poor scene cuts or
insertion of commercials. Video material is processed by a
set of content-sensitive spatio-temporal filters that adapt to
the appropriate direction for smoothest interpolation using
the patented Faroudja DCDi™ algorithm. The FLI2200 also
includes motion-adaptive cross-color suppression that
removes highly objectionable coloration artifacts produced
by commonly used video decoders. Its internal processing
uses 10 bits per channel to maintain the highest quality. Its
inputs and outputs are 10 bits/channel for best quality but
also supports 8 bits/channel for more cost-sensitive
applications. The FLI2200 requires 4 MB of low cost SDRAM
for best quality deinterlacing, but it can also be operated in
an optimized intra-field mode without memory for more costsensitive applications. This makes possible the use of a
single design for both high-end and low-end applications.
The FLI2200 integrates a number of functions to provide
maximum flexibility in a low cost configuration. This includes
an on-chip clock generator, SDRAM controller, display
controller, input and output color-space converters. It uses
a standard 2-wire serial control interface for easy control
and access to the registers.
The FLI2200 can be connected without glue logic to the
FLI2000 video decoder and FLI2220 Enhancer and OSD
Generator to produce the highest quality video pipeline for
premium applications. It is also fully compatible with other
decoders having a ITU-R BT 656 output format.
Applications
Flat panel TV – LCD, PDP
Progressive scan TVs
Multimedia front/rear projectors
Home Theater
Scan Converters
Multimedia PCs/Workstations
DCDi™ is a Faroudja trademark
Features
Motion-adaptive cross-color suppression removes
artifacts produced by improper Y/C separation in lowcost video decoders
Motion-adaptive video deinterlacing selects optimal
filtering on a per-pixel basis
Film-mode for proper handling of 3:2 and 2:2
pulldown material
Bad-edit detection/correction compensates for poor
scene cuts and insertions common in broadcast
material
Motion-weighted interpolation for video sources
produces maximum resolution without introducing
motion artifacts
Directional Correlational Deinterlacing (DCDi™)
minimizes jaggies on angled lines
8/10-bit Y/Cb/Cr (D1) (ITU-R BT 656), 16/20-bit Y Cb/Cr
(ITU-R BT 601), 24/30-bit RGB or YCbCr/YPbPr
interlaced input options
Supports 525/60 (NTSC), 625/50 (PAL/SECAM)
Accepts up to 1100 pixels/line
8/10-bit, 16/20-bit YUV, 24/30-bit RGB or YCbCr/YPbPr
progressive output options
Supports 8- or 10-bit inputs and outputs
10-bit internal processing for highest quality
Includes color-space converters at input and output
for maximum flexibility
Auto-detection of NTSC/PAL/SECAM inputs
High-order filtering produces smooth chroma output in
4:2:2 to 4:4:4 or 4:4:4 to 4:2:2 conversions
Resolution recovery maximizes output signal-to-noise
ratio and dynamic range
Can be operated without glue logic with FLI2000 Video
Decoder and FLI2220 Enhancer and OSD Generator ICs
to produce highest quality video pipeline
Glue-less interface to most standard video decoders
Built-in display timing generator
On-chip clock generator eliminates external PLLs
On-chip SDRAM controller
Uses low cost SDRAM as field memory – 4 MB
Optimized intra-field operation allows memory-less
configuration for lowest cost applications with same
design and layout as for high-end applications
2-wire serial control interface for easy control
176-pin TQFP package
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.
GB 295
Simplified Block Diagram
Ext. Syncs
PIXCLK
10
DADDR
SDA
SCL
10
Deinterlacer Core with DCDi™,
RGB /YUV/
YCrCb/D1
Input
Signal
Formatter
2
Sync
Out
Sync
Generator
PLL/Clock
Generator
Output
Signal
Formatter
Motion Compensation,Film
Mode Detection
and Bad Edit Correction
YU V/
RGB/
YCrCb
Control
Interface and
Registers
140
150
160
1
130
10
120
20
110
30
100
80
70
60
50
40
90
DADDR0
MODE
SDA
SCL
RESETB
TEST3
TEST2
NOMEM
OE
VDD25
VSS
IFORMAT2
IFORMAT1
IFORMAT0
OFORMAT2
OFORMAT1
OFORMAT0
N/P/IN/OUT
VDD33
VSS
G/YOUT9
G/YOUT8
G/YOUT7
G/YOUT6
G/YOUT5
G/YOUT4
G/YOUT3
G/YOUT2
VDD33
VSS
G/YOUT1
G/YOUT0
R/CrOUT9
R/CrOUT8
R/CrOUT7
R/CrOUT6
R/CrOUT5
R/CrOUT4
R/CrOUT3
VDD33
VSS
R/CrOUT2
R/CrOUT1
R/CrOUT0
VDD33
VSS
HSYNCREFI
VSYNCREFI
FIELDIN
B/CbIN0
B/CbIN1
B/CbIN2
B/CbIN3
B/CbIN4
B/CbIN5
B/CbIN6
B/CbIN7
B/CbIN8
B/CbIN9
VDD25
VSS
G/YIN0
G/YIN1
G/YIN2
G/YIN3
G/YIN4
G/YIN5
G/YIN6
G/YIN7
G/YIN8
G/YIN9
R/CrIN0
R/CrIN1
R/CrIN2
R/CrIN3
R/CrIN4
VDD33
VSS
R/CrIN5
R/CrIN6
R/CrIN7
R/CrIN8
R/CrIN9
PIXCLK
TEST4
AVDD
AVSS
DADDR1
170
DATA29
DATA28
DATA27
DATA26
DATA25
DATA24
DATA23
DATA22
VSS
VDD33
DATA21
DATA20
DATA19
DATA18
DATA17
DATA16
DATA15
VSS
VDD25
DATA14
DATA13
DATA12
DATA11
DATA10
VSS
VDD33
DATA9
DATA8
DATA7
DATA6
DATA5
VSS
VDD33
DATA4
DATA3
DATA2
DATA1
DATA0
VSS
VDD33
ADDR0
ADDR1
ADDR2
ADDR3
Pin description
VSS
ADDR4
ADDR5
ADDR6
ADDR7
ADDR8
ADDR9
ADDR10
VSS
VDD33
BSEL
CASN
RASN
WEN
MEMCLKO
YCLKO
CCLKO
VSS
VDD33
TESTO0
TESTO1
TEST0
FILM
TEST1
FSYNC
VDD25
VSS
VDD33
B/CbOUT0
B/CbOUT1
B/CbOUT2
B/CbOUT3
B/CbOUT4
B/CbOUT5
B/CbOUT6
B/CbOUT7
VSS
VDD33
B/CbOUT8
B/CbOUT9
H/CSYNCO
VSYNC/CREFO
HREFO
VREFO
GB 296
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Pin Connections and Functions
Pin #
Name
Description
Power Supply Connections (not shown on Block diagram)
See list
VSS
Ground connections. Connect to the digital ground plane. Pins: 2, 17, 34, 55, 64, 74, 85,
96, 106, 115, 124, 132, 138, 145, 152, 159, 168
See list
VDD33
Pad Ring digital power connections. Connect to the digital 3.3 volt power supply and
decouple to the digital ground plane. Pins: 1, 33, 63, 73, 84, 95, 105, 114, 123, 137, 144,
151, 167
See list
VDD25
Core Logic digital power connections. Connect to the digital 2.5 volt power supply and
decouple to the digital ground plane. Pins: 16, 54, 107, 158
43
AVSS
Ground connection for the clock PLL circuits. Connect to the digital ground plane
42
AVDD
Analog power connections for the clock PLL circuit. Connect to a separately decoupled 2.5
volt power supply and decouple directly to the AVSS pin..
Control Signals
49
RESETB
Reset. When this input is set low it will reset all the internal registers to the default states.
Refer to the section on the control registers for details of these states. The device must be
reset after it is powered-up.
53
OE
When this pin is set high the outputs of the FLI2200 will be enabled; when it is set low the
outputs will be set into a high-impedance state.
56-58
IFORMAT2-0 Input signal format control. The settings of these pins set the format of the input signal.
This can be overridden by the IFmtOvr bit, bit 3 in register 00 H, allowing this function to be
set or changed via the I2C bus. Please refer to the description of register 00 H for details.
59-61
OFORMAT2-0 Output signal format control. The settings of these pins set the format of the output signal.
This can be overridden by the OFmtOvr bit, bit 3 in register 07 H, allowing this function to be
set or changed via the I2C bus. Please refer to the description of register 07H for details.
44-45
DADDR1-0
The settings of DADDR1-0 allow the device address of the control bus to be programmed to
prevent conflict with the other devices connected to the bus. DADDR 1-0 allow the device
address to be set to any of the following values: C0/C1H, C2/C3H, E0/E1H, E2/E3H. Please refer
to the section “Control Bus Operation and Protocol” for further information.
46
MODE
When this pin is set low the control bus will operate in the slave mode; allowing the device to
programmed from an external controller. When it is set high the FLI2200 will self-program from
an external I2C memory connected to the bus. Please refer to the “Control Bus Operation and
Control Protocol” section for more details.
47
SDA
2-wire serial control bus data. Data can be written to the control registers via this pin when it
is in the input mode and data can be read from the status registers when it is in the output
mode. Refer to the section on the serial port for timing and format details and to the section on
the registers for programming information.
48
SCL
2-wire serial control bus clock. When the control port operates in slave mode this pin will be
an input and when it operates in the self programming mode it will be an output.
40
PIXCLK
Pixel clock input. This clock is used to drive all the circuits in the FLI2200. An internal PLL is
used to upconvert this clock to provide the master clock signal and other clocks used
internally. Note that when the FLI2200 is used in the D1 input mode the PIXCLK input
should run at the rate of two cycles per pixel (one for luma and one for chroma).
62
N/P/IN/OUT NTSC/PAL input or output. The default function of this pin is NTSC/PAL signal indicator
output. When the input video signal is a 525 line signal this pin will be set high and when it
is a 625 line signal the pin is set low. This function of this pin can be programmed to be an
input according to the setting of this pin if the NPOp1-0 bits, bits 5-4 in register 03H, are set
to 00H, overriding the internal line counter. i.e., it will treat the signal as a 525 line signal
when it is set high and a 625 line signal when it is set low.
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
Pin #
Name
9.
GB 297
Description
Control Signals (contd.)
52
NOMEM
No Memory Mode control input. This pin controls the operation of the FLI2200 as follows:
When this pin is set low the device is used with external field memories and operates in the full
set of deinterlacing modes, i.e., motion adaptive video deinterlacing and full frame film source
deinterlacing using 3:2 pulldown detection (2:2 pulldown for 625/50 sources). When this pin is
set high the FLI2200 is forced into the intra-field only deinterlacing mode, which requires no
external memories, allowing the FLI2200 to be used in low-cost applications where the ultimate
video quality is not a requirement. To ensure proper startup of the SDRAMs this pin should be
set high during the power-up sequence. This can be overridden by the NMOvr bit, bit 1 in
register 05H, allowing this function to be set or changed via the I 2C bus. Please refer to the
description of register 05H for details.
Input Signals
27-18
G/YIN9-0
10-bit green or luminance signal input bus. The mode is set by the IFORMAT2-0 pins. This can
be overridden by the IFmtOvr bit, bit 3 in register 00H, allowing this function to be set or
changed via the I2C bus. Please refer to the description of register 00 H for details. This
signal is sampled on the rising edge of PIXCLK.
15-6
B/CbIN9-0
10-bit blue or Cb chroma signal input bus. The mode is set by the IFORMAT2-0 pins.
This can be overridden by the IFmtOvr bit, bit 3 in register 00 H, allowing this function to be
set or changed via the I2C bus. Please refer to the description of register 00H for details. Bits 6,
4 and 3 in register 08H specify the busses used in the multiplexed modes. In all cases the
signals are sampled on the rising edges of PIXCLK. In the Y Cb Cr and Y Pb Pr modes the Cb or
Pb signal is sampled on alternate rising edges of PIXCLK in 4:2:2 mode. The frequency of
PIXCLK will be 27 MHz in the multiplexed Y/Cb/Cr mode and 13.5 MHz in all other modes.
These pins should be tied low when not used.
39-35
32-28
R/CrIN9-0
10-bit red or Cr chroma signal input bus. The mode is set by the IFORMAT2-0 pins.
This can be overridden by the IFmtOvr bit, bit 3 in register 00H, allowing this function to be
set or changed via the I2C bus. Please refer to the description of register 00H for details. Bits 6,
4 and 3 in register 08H specify the busses used in the multiplexed modes. In all cases the
signals are sampled on the rising edges of PIXCLK. In the Y Cb Cr mode the Cr signal is
sampled on alternate rising edges of PIXCLK in 4:2:2 mode. The frequency of PIXCLK will
be 27 MHz in the multiplexed Y/Cb/Cr mode and 13.5 MHz in all other modes. These pins
should be tied low when not used.
3
HSYNCREFI
Horizontal sync or reference. The horizontal sync or reference of the input signal should be
connected to this pin. The function is programmed with bit 4 in register 00H. The polarity
and position of the sync or reference pulse relative to the start of active video are both
programmable within a small range. When the FLI2200 is used in the ITU-R BT 601/D1 input
mode with embedded syncs (IFormat = 110) this input is not used and should be tied low; in
this case all sync information will be derived from the signal.
4
VSYNCREFI
Vertical sync or reference. The vertical sync or reference of the input signal should be
connected to this pin. The function is programmed with bit 4 in register 00H. The polarity
and position of the sync or reference pulse relative to the start of active video are both
programmable within a small range. When the FLI2200 is used in the ITU-R BT 601/D1 input
mode with embedded syncs (IFormat = 110) this input is not used and should be tied low; in
this case all sync information will be derived from the signal.
5
FLDIN
Field identifier input. The field identifier output of the source signal should be connected to
this pin. A low setting signifies an even field and a high level signifies an odd field. When
bit 4 in register 00H is set low, the input timing is based on HREF and VREF and this signal
is required. When this bit is set high the input timing is based on HSYNC and VSYNC and this
signal is generated internally and is not required. When bit 5 in register 06 is set high this
signal is also used as the frame boundary identifier for 30 Hz film sources.
GB 298
9.
Pin #
Name
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
Description
Output Signals
65-72
75-76
G/YOUT9-0
Green or luminance output bus. In the RGB mode this output is the Green signal and in the
YCbCr mode it is the Y signal. The mode is set by the OFORMAT2-0 pins. This can be
overridden by the OFmtOvr bit, bit 3 in register 07 H, allowing this function to be set or
changed via the I2C bus. Please refer to the description of register 07H for details. The signal
is clocked out on the falling edge of YCLKO.
93-94
97-104
B/CbOUT9-0
Blue or Cb chrominance output bus. In the RGB mode this output is the Blue signal, in the
Y Cb Cr mode it is the Cb signal. The mode is set by the OFORMAT2-0 pins. This can be
overridden by the OFmtOvr bit, bit 3 in register 07 H, allowing this function to be set or
changed via the I2C bus. Please refer to the description of register 07H for details. The busses
used in the multiplexed modes are set by means of bit 5 in register 08H. The signal is clocked
out on the falling edge of YCLKO in the RGB and YUV 4:4:4 modes, on the falling edge of
YCLKO prior to the next rising edge of CCLKO in the YUV 4:2:2 mode, and on the rising edge of
MEMCLKO in the multiplexed YCbCr (pseudo D1) mode.
77-83
86-88
R/CrOUT9-0
Red or Cr chrominance output bus. In the RGB mode this output is the Red signal, in the
YCbCr mode it is the Cr signal. The mode is set by the OFORMAT 2-0 pins. This can be
overridden by the OFmtOvr bit, bit 3 in register 07 H, allowing this function to be set or
changed via the I2C bus. Please refer to the description of register 07H for details. The busses
used in the multiplexed modes are set by means of bit 5 in register 08H. The signal is clocked
out on the falling edge of YCLKO in the RGB and YUV 4:4:4 modes, on the falling edge of
YCLKO prior to the next rising edge of CCLKO in the YUV 4:2:2 mode, and on the rising edge of
MEMCLKO in the multiplexed YCbCr (pseudo D1) mode.
116
CCLKO
Chroma output sampling clock. This clock is derived from PIXCLK and will be at half the
frequency of YCLKO. In 30-bit 4:2:2 output mode the chroma output signals will change on
the falling edge of YCLKO prior to the next rising edge this clock.
117
YCLKO
Luma output sampling clock. This clock is derived from PIXCLK and is double the
frequency of PIXCLK. In 30-bit and 20-bit output modes the output signals will change on the
falling edge of this clock.
89
VREFO
Start of active field or frame indicator. This signal goes high to indicate the first active line
in each field or frame and goes low during the vertical blanking interval. The polarity and timing
of this signal are programmable.
90
HREFO
Start of active line indicator output. This signal goes high to indicate the first active pixel in
each line and goes low during the horizontal blanking interval. The polarity and timing of
this signal are programmable.
91
VSYNC/
CREFO
Vertical sync output. This signal provides the vertical sync function for the outputs. Its
polarity is programmable to be active high or active low. It can also be programmed to be a
composite reference for applications requiring this instead of sync.
92
H/CSYNCO
Horizontal or composite sync output. This signal provides the horizontal sync function for
the outputs. Its polarity is programmable to be active high or active low. This signal can also
be programmed to be the composite sync output, CSYNC.
108
FSYNC
Film mode sync output. When film mode is detected this pin will toggle in sync with the 3:2
(NTSC) or 2:2 (PAL and 30 Hz film in NTSC) pulldown sequence detected in the source.
110
FILM
Film mode detector output. This pin will be set high when the FLI2200 detects that the video
input was converted from 24 fps film with a teleciné machine. If film mode is not detected this
pin will be set low.
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
Pin #
Name
9.
GB 299
Description
SDRAM Interface Signals
125-131
133-136
ADDR10-0
SDRAM Address bus. This signal bus is used to address the external SDRAM(s) used for
field memories. It should be connected to the A10-0 bus of the memory chip(s). Please refer
to the Applications section of this data sheet for further details.
176-169 DATA29-0
166-160
157-153
150-146
143-139
SDRAM Data bus. This signal bus is used to transfer the data to and from the external
SDRAM(s) used for field memories. It should be connected to the DQ29-0 bus of the memory
chip when using a 64 Mbit SDRAM. When using two 16 Mbit SDRAMs this 30-bit bus may
be connected to the two 16-bit data busses of the memories in two ways: either connect 16
lines to one chip and 14 to the other, or connect 15 to both. In all cases the two unused data
lines on the memory chip(s) should be connected to ground via 22 k resistors. Please refer
to the Applications section of this data sheet for further details.
118
MEMCLKO
SDRAM clock and 2x output sampling clock. This clock is derived from PIXCLK and will be at
double the frequency of YCLKO. This active signal should be connected to the CLK pin(s) on
the SDRAM(s). When the 10-bit output mode selected the output signals will also change at
this clock rate and this should then be used as the output clock..
119
WEN
SDRAM Write Enable. This active low signal should be connected to the WE pin(s) on the
SDRAM(s).
120
RASN
SDRAM Row Address Select. This active low signal should be connected to the RAS pin(s)
on the SDRAM(s).
121
CASN
SDRAM Column Address Select. This active low signal should be connected to the CAS
pin(s) on the SDRAM(s).
122
BSEL
SDRAM Bank Select. When using two 16 Mbit SDRAMs this signal should be connected to
the BA (also called BS or A11) pin on both SDRAMs. When using a 64 Mbit SDRAM this
signal should be connected to the BA0 (also called BS0 or A11) pin on the SDRAM and BA1/
BS1 (also called BA when BA0 is referred to as A11) should be tied low.
Test Inputs
41, 50, TEST4-0
51, 109,
111
These pins are used for test purposes only and should always be tied low for normal operation.
Test Outputs
112, 113 TESTO1-0
These pins are test outputs and should be left unconnected in normal operation.
GB 300
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
9.11.2 ADV7196
SHARPNESS
FILTER CONTROL
&
ADAPTIVE
FILTER CONTROL
CGMS
MACROV ISION
Y0-Y9
Cr0-9
Cb 0-9
TESTPA TTERN
GENERATOR
&
DELAY
&
GAMMA
CORRECTION
LUMA
SSAF
CHROMA
4:2:2 to 4:4:4
(SSAF)
2XINTERPOLATION
11-BIT +
SYNC
DAC
DAC A (Y)
11-BIT
DAC
DAC B
11-BIT
DAC
DAC C
CHROMA
4:2:2 to 4:4:4
(SSAF)
VREF
DAC CONTROL
BLOCK
CLK IN
RSET
COMP
HORIZ ONTALSYNC
VERTICA L SYNC
TIM ING
GENERATOR
SYNC
GENERATOR
BLA NKING
RESET
I2 C MPU PORT
Cb/Cr[9]
ALSB
RESET
44
Cb/Cr[8]
52 51 50 49 48 47 46 45
Cb/Cr[7]
Cb/Cr[6]
Cb/Cr[5]
Cb/Cr[4]
Cb/Cr[1]
Cb/Cr[2]
Cb/Cr[3]
Cb/Cr[0]
GND
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
43
42
41
40
39
VREF
2
38
RSET
Y[1]
3
37
COMP
Y[2]
4
36
DAC B
Y[3]
5
35
VAA
Y[4]
6
Y[5]
7
Y[6]
VDD
Y[0]
1
Pin Id
34
ADV7196 A
9.
GB 301
DAC A / Y output
33
AGND
8
32
DAC C
Y[7]
9
31
Y[8]
Y[9]
10
30
SDA
SCL
11
29
HSYNC/SYNC
VDD
12
28
GND
13
27
VSYNC/TSYNC
DV
CLKI N
AGND
VA A
26
Cr[9]
21 22 23 24 25
Cr[8]
20
Cr[7]
Cr[4]
Cr[3]
Cr[2]
Cr[1]
Cr[0]
19
Cr[6]
15 16 17 18
Cr[5]
14
GB 302
9.
DVDR1000 /0x1 /691
Circuit-, IC Descriptions and List of Abbreviations
µ
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
9.12 List of Abbreviations
9.12.1 Digital Board
+12V
+3V3
+5V
+5V_BUFFER
24M576_OUT
27M_CLK_PS
5505_HS
5505_ODD_EVEN
5505_VS_PS
-5V
ACC_ACLK_OSC
ACC_ACLK_PLL
AD_ACLK
AD_BCLK
AD_DATA(0:2)
AD_SPDIF
AD_WCLK
ADC_ENABLEN
AE_BCLK
AE_CSN
AE_DATAI
AE_DATAO
AE_IRQN
AE_WCLK
ANA_WE
B_IN_7118
B_OUT
B_OUT_B
BCLK_CTRL
BE_BCLK
BE_BCLK_VSM
BE_CPR
BE_DATA_RD
BE_DATA_WR
BE_FAN
BE_FLAG
BE_IRQ
BE_LOADN
BE_RXD
BE_SUR
BE_SYNC
BE_TXD
BE_V4
BE_WCLK
C_IN
C_IN_7118
C_OUT
C_OUT_B
CENTRE_ON_STE
REO
COAX_IN
CPU_ANALYSE
+12V Power Supply
+3V3 Power Supply
+5V Power Supply
+5V Power Supply for Video Filters
24M576 X-tal frequency output from
Video Input Processor
27MHz clock to Progressive Scan
Horizontal Synchronisation from
Host Decoder to Progressive Scan
Odd - Even control from Host
Decoder to Progressive Scan
Vertical Synchronisation from Host
Decoder to Progressive Scan
-5V Power Supply
Audio Clock PLL output sync with
incoming video for record
Audio Clock PLL output for play
back
Audio Decoder Clock
Audio Decoder I2S bit clock
Audio Decoder data (PCM)
Audio digital output to the analog
board
Audio Decoder I2S word clock
Analog Digital converter enable
Audio Encoder I2S bit clock
Audio Encoder chip select(LOW
active)
Audio Encoder I2S data input from
analog board
Compressed I2S audio data from
DSP to Host Decoder
Audio Encoder interrupt request
Audio Encoder I2S word clock
Analog write enable
Video blue input to Video Input
Processor
Video blue output from Host
Decoder
Filtered blue video output
Basic Engine I2S Bit clock control
Basic Engine I2S bit clock
Basic Engine I2S bit clock to VSM
Basic Engine Control Processor
ready to accept data
Basic Engine Data read
Basic Engine Data write
Basic Engine FAN
Basic Engine error flag
Basic Engine interrupt request
Basic Engine LOAD(LOW active)
Basic Engine S2B received data
Basic Engine servo unit ready to
accept data (S2B)
Basic Engine sector/abs time sync
Basic Engine S2B transmitted data
Basic Engine versatile input pin
Basic Engine I2S word clock
Video Chrominance input
Chrominance input to Video Input
Processor
Chrominance output from Host
Decoder
Filtered Chrominance output
Control signal from Host Decoder to
AV board to switch Stereo Output
cinch to mono.
Coaxial input
Control processor unit analyse
CPU_RESET
CPUINT(0-1)
CTS1P
CVBS_OUT
CVBS_OUT_B
CVBS_OUT_B_711
8
CVBS_Y_IN
CVBS_Y_IN_7118_
A
CVBS_Y_IN_7118_
B
CVBS_Y_IN_7118_
C
D_PAR_D(7:0)
D_PAR_DVALID
D_PAR_REQ
D_PAR_STR
D_PAR_SYNC
D_V4
D_WCLK
DSP_A(0-9)
DSP_CE
DSP_D(0-23)
DSP_MA16
DSP_RDN
DSP_WRN
DV_IN_CLK
DV_IN_DATA(7:0)
DV_IN_HS
DV_IN_VS
EMI_A(1-21)
EMI_BE1N
EMI_BEON
EMI_CASN
EMI_CE1N
EMI_CE2N
EMI_CE3N
EMI_D(0-15)
EMI_OEN
EMI_PROCCLK
EMI_RASN
EMI_RWN
EMI_WAIT
ERROROUT
9.
GB 303
Control processor unit reset
Control processor unit interrupt
Clear to send (Service Interface)
Composite video output out of the
Host Decoder
Filtered Composite video output
Composite video output to Video
Input Processor(digital board video
loop)
Composite video/Luminance input
Composite video/Luminance input
to Video Input Processor
Composite video/Luminance input
to Video Input Processor
Composite video/Luminance input
to Video Input Processor
Front-end parallel interface data
(record)
Front-end parallel interface data
valid
Front-end parallel interface request
Front-end parallel interface strobe
Front-end parallel interface sync
Digital versatile input pin Front-end
I2S versatile signal
Front-end I2S word clock
Digital sound processor address bus
Digital sound processor chip enable
Digital Sound Processor data bus
Digital Sound Processor Memory
Address 16 line
Digital Sound Processor read
enable(LOW active)
Digital Sound Processor write
enable(LOW active)
Digital Video in clock from DVIO
board
Digital Video in data bus from DVIO
Digital Video in horizontal
synchronisation from DVIO
Digital Video in vertical
synchronisation from DVIO
External Memory Interface Address
Bus(Host Decoder)
External Memory Interface Upper
byte enable(Host Decoder)
External Memory Interface Lower
byte enable(Host Decoder)
External Memory Interface SDRAM
column address strobe(Host
Decoder)
External Memory Interface VSM
Lower bank enable
External Memory Interface VSM
Higher bank enable
External Memory Interface flash IC’s
enable
External Memory Interface Data
Bus(Host Decoder)
External Memory Interface Output
enable(Host Decoder)
External Memory Interface
Processor Clock(Host Decoder)
External Memory Interface SDRAM
row address strobe(Host Decoder)
External Memory Interface Read/
Write control signal(Host Decoder)
External Memory Interface Wait
state request(Host Decoder)
Control port P3 I/O from Host
Decoder
GB 304
9.
DVDR1000 /0x1 /691
FB
FLASH_OEN
G_IN_7118
G_OUT
G_OUT_B
HD_M_AD(11:0)
HD_M_CASN
HD_M_CLK
HD_M_CSN
HD_M_DQ(15:0)
HD_M_DQML
HD_M_DQMU
HD_M_RASN
HD_M_WEN
ION
IRESET_DIG
JTAG_TCK
JTAG_TD_AE_TO_
CON
JTAG_TD_CON_T
O_AE
JTAG_TD_CON_T
O_HD
JTAG_TD_CON_T
O_VSM
JTAG_TD_HD_TO
_CON
JTAG_TD_VE_TO_
CON
JTAG_TD_VIP_TO
_VE
JTAG_TD_VSM_T
O_VIP
JTAG_TMS
JTAG_TRSTN
LOAD_DVN
MUTEN
OPT_IN
R_IN_7118
R_OUT
R_OUT_B
RESETN_5505
RESETN_BE
RESETN_DSP
RESETN_DVIO
RESETN_EMPIRE
RESETN_VIP
RESETN_VSM
RESN_BEN
RESN_DSP
Circuit-, IC Descriptions and List of Abbreviations
Fast Blanking
FLASH output enable control signal
Video green input to Video Input
Processor
Video green output from Host
Decoder
Filtered green video output from
Host Decoder
Host Decoder SDRAM address bus
Host Decoder SDRAM column
address strobe
Host Decoder SDRAM clock
Host Decoder SDRAM chip select
Host Decoder SDRAM data bus
Host Decoder SDRAM data mask
enable(Lower)
Host Decoder SDRAM data mask
enable(Upper)
Host Decoder SDRAM row address
strobe
Host Decoder SDRAM write enable
Inverted ON: Enable the power
supply for the digital board when
LOW
Initialisation of the digital board, high
when power on
JTAG Test Clock
JTAG Transmitted Data Audio
Encoder to Connector
JTAG Transmitted Data Connector
to Audio Encoder
RTS1P
RX1P
SCL
SDA
SEL_ACLK(1-2)
SERVICES
SYSCLK_5505
SYSCLK_VSM
TX1P
U_IN
U_IN_7118
V_IN
V_IN_7118
VCC3_CLK_BUF
VCC3_VE_MEM
VCC3_VSM
VCC3_VSM_MEM
VCC5_4046
VDD_EMPIRE
VDD_MEM
VDD_MEM1
VDD_MEM2
JTAG Transmitted Data Connector
to Host Decoder
JTAG Transmitted Data Connector
to Versatile Stream Manager
VDD_STI
VDD5_MK2703
VDD5_OSC
VDDE_7118
JTAG Transmitted Data Host
Decoder to Connector
VDDE_LVC32
VDSP
JTAG Transmitted Data Video
Encoder to Connector
VE_DATA(15:0)
VE_DSN
VE_DTACKN
JTAG Transmitted Data Video Input
Processor to Video Encoder
JTAG Transmitted Data Versatile
Stream Manager to Video Input
Processor
JTAG Test Mode Select
JTAG Test part ResetN
LOAD Digital Video(LOW active)
Mute enable
Audio Optical in
Video Red input to Video Input
Processor
Video red output from Host Decoder
Filtered red Video output from Host
Decoder
Reset Host Decoder
System reset basic engine
System reset Digital Sound
Processor
System reset Digital Video Input
Output
Hardware reset input(active LOW) of
the EMPIRE
System reset Video Input Processor
System reset Versatile Stream
Manager
Reset Basic Engine
Reset Digital Sound Processor
VE_M_A(8:0)
VE_M_CASN
VE_M_D(63:0)
VE_M_OEN
VE_M_RASN
VE_M_WEN
VIP _ICLK
VIP_ERROR
VIP_FB
VIP_HS
VIP_IGP1
VIP_RTS
VIP_VS
VIP_YUV(7:0)
VSM_M_A(13:0)
VSM_M_CASN
VSM_M_CLKEN
VSM_M_CLKOUT
Ready To Send data to service
serial interface
Receive data from service serial
interface
I2C bus clock
I2C bus data
Select audio clock(playback)
Control signal of service serial
interface
Video system Clock Host Decoder
System clock Versatile Stream
Manager
Transmit data to service serial
interface
Video U input
Video U input to Video Input
Processor
Video V input
Video V input to Video Input
Processor
Power supply 3V3 clock buffer
Power supply 3V3 Video Encoder
Memory
Power supply 3V3 Versatile Stream
Manager
Power supply 3V3 Versatile Stream
Manager Memory
Power supply 5V to PLL IC7806
Power Supply of EMPIRE IC
Power Supply for Host Decoder
flashes(7302,7304)
Power Supply for Host Decoder
DRAMS(7300, 7301)
Power Supply for Host Decoder
SDRAM’s(7306 and 7307)
Power Supply for Host Decoder
Power supply +5V IC7800
Power supply +5V IC7802
Power supply +3V3 Video Input
Processor
Power supply +3V3 IC7551
Power supply +3V3 Digital Sound
Processor
Video Encoder data Bus
Video Encoder Data Strobe
Video Encoder Data Transfer
acknowledge
Video Encoder Memory address bus
Video Encoder DRAM column
address strobe
Video Encoder DRAM data Bus
Video Encoder DRAM output enable
Video Encoder DRAM row address
strobe
Video Encoder DRAM write enable
Video Input Processor input Clock
Video Input Processor error
Video Input Processor Fast Blanking
Video Input Processor horizontal
synchronisation
Video Input Processor input general
purpose 1
Video Input Processor ready to send
Video Input Processor vertical
synchronisation
Video Input Processor digital
video(CC7R 656)
Versatile Stream Manager SDRAM
address
Versatile Stream Manager SDRAM
column address strobe
Versatile Stream Manager SDRAM
clock enable
Versatile Stream Manager SDRAM
clock out
Circuit-, IC Descriptions and List of Abbreviations DVDR1000 /0x1 /691
VSM_M_D(0-15)
VSM_M_LDQM
VSM_M_RASN
VSM_M_UDQM
VSM_M_WEN
VSM_UART_CTSN
1
VSM_UART_CTSN
2
VSM_UART_RTSN
1
VSM_UART_RTSN
2
VSM_UART_RX1
VSM_UART_RX2
VSM_UART_TX1
VSM_UART_TX2
Y_IN
Y_IN_7118
Y_OUT
YC(0-7)
Versatile Stream Manager SDRAM
data bus
Versatile Stream Manager SDRAM
lower data mask enable
Versatile Stream Manager SDRAM
row address strobe
Versatile Stream Manager SDRAM
upper data mask enable
Versatile Stream Manager SDRAM
write enable
Versatile Stream Manager UART
clear to send to analog board
UART1
CLK27M_CON
CLK27M_DV
CLK27M_OSC
CLOCKGENAUD
CLOCKGENVID
CTSN
DATA
DCLK
DV_ASN
DV_DRQN
DV_DSLN
DV_DSUN
DV_DTACKN
Versatile Stream Manager UART
clear to send to DVIO UART2
DV_ERRN
DV_HS_IN
Versatile Stream Manager UART
ready to send to analog board
UART1
DV_HS_OUT
Versatile Stream Manager UART
ready to send to DVIO UART2
Versatile Stream Manager UART
received data to analog board
UART1
Versatile Stream Manager UART
received data to DVIO UART2
Versatile Stream Manager UART
transmitted data to analog board
UART1
Versatile Stream Manager UART
transmitted data to DVIO UART2
Luminance input from analog board
Luminance input to Video Input
Processor
Luminance output from Host
Decoder
Digital Video Bus for progressive
scan board
DV_LCN
DV_PDN
DV_RSTN
DV_RWN
DV_VS
FIFOA_A(0:15)
FIFOA_CEN(0:1)
FIFOA_D(0:7)
FIFOA_OEN
FIFOA_WEN
FIFOB_A(0:15)
FIFOB_CEN(0:1)
FIFOB_D(0:7)
FIFOB_OEN
FIFOB_WEN'
HAD(0:7)
INIT_CONFN
IO(0:30)
ISPN
9.12.2 Divio Board
LCASN
+35V_DV_EDO
+3V3_DLY
+3V3_DV
+3V3_FPGAINT
+3V3_FPGAIO
+3V3_IEEE
+3V3_LINK
+3V3_PLL
+3V3_SRAM
+5V_PROC
+VCC_DV_RAM
1394_RSTN
A(0:8)
AUD_BCLK
AUD_MUTE
AUD_SDI
AUD_SDO
AUD_WS
BUFENN_AUD
BUFENN_VID
CEN
+3V3 Power supply EDO Bus
IC7404
+3V3 Power supply for IC7500
+3V3 Power supply for IC7404
+3V3 Internal Power supply for
IC7303
+3V3 Power supply for I/O pins of IC
7303
+3V3 Isolated Power supply for PHY
domain
+3V3 Power supply IC7103
+3V3 Power supply IC7307 &
IC7308
+3V3 Power supply IC7301, IC7302,
IC7305 & IC7306
+5V Power supply IC7200, IC7201,
IC7203 & IC7208
+3V3 Power supply for
DV_RAM(IC7400--> IC7404)
Reset of LINK IC(7103) and PHY
IC(7101)
Address lines
Audio Bit Clock
Audio Mute
Audio Serial Data Input
Audio Serial Data Output
Audio Word Select
Buffer Enable Audio
Buffer Enable Video
Control Enable
LINKFIFO_DQ(0:7)
LINK_AVCLK
LINK_AVERR0
LINK_AVERR1
LINK_AVFSYNC
LINK_AVSYNC
LINK_AVVALID
LINK_CSN
LINK_CYCLEOUT
LINK_INTN
OE
PA(0:15)
PAD(0:7)
PALE
PHY_CNA
PHY_LPS
PINT0N
PINT1N
PORT1_1
PPSENN'
PRDN
PRSTN
PT0
PT1
PWRN
RASN
RESETN
RTSN
RXD
SRAMCE0N
9.
GB 305
27MHz Clock to Digital Board
27MHz Clock Digital Video Codec
27MHz Clock IC7304
Clock generator Audio
Clock generator Video
Clear to Send
Data from config ROM
Data Clock from config ROM
DVCODEC Address Strobe
DVCODEC Data Request Interrupt
DVCODEC Data Strobe Lower 8 bits
DVCODEC Data Strobe Upper 8
Bits
DVCODEC Data Transfer
Acknowledge
DVCODEC Error Interrupt
DVCODEC Horizontal
synchronisation In
DVCODEC Horizontal
synchronisation Out
DVCODEC Last Code Interrupt
DVCODEC Power Down
DVCODEC System Reset for
NW701
DVCODEC Read/Write control
signal
DVCODEC Vertical synchronisation
FIFO buffer A Address bus
FIFO buffer A Chip enable
FIFO buffer A Data bus
FIFO buffer A Output enable
FIFO buffer A Write enable
FIFO buffer B Address bus
FIFO buffer B Chip enable
FIFO buffer B Data bus
FIFO buffer B Output enable
FIFO buffer B Write enable
Host Address/Data bus for register
settings of IC7404
Initiate Configuration of IC7300
Data bus of IC7404
In System Program Line(used for
programming IC7203)
Lower Column Address strobe for
IC7404 DRAMS
Audio/Video data
LINK IC Audio/Video Interface Clock
LINK IC indicates an CRC error
LINK IC Audio/Video sequence error
LINK IC Audio/Video frame sync
LINK IC Audio/Video packet sync
LINK IC Audio/Video data valid
LINK IC chip select
LINK IC Cycle clock
LINK IC interrupt
Output enable
SRAM processor address
SRAM processor data
Processor Address Latch Enable
PHY 1394 cable not active
LINK IC power status
Processor interrupt 0
Processor interrupt 1
Unused free port
Program store enable
Processor read
Processor reset
Processor timer 0
Processor timer 1
Processor write
Row address strobe
DVIO board reset
System Reset
Receive Data
SRAM processor chip enable 0
GB 306
9.
DVDR1000 /0x1 /691
SRAMCE1N
SRAMRDN
TCK
TDI
TDO
TMS
TXD
UCASN
WEN
YUV(0:7)
GND
GND_IEEE
Circuit-, IC Descriptions and List of Abbreviations
SRAM processor chip enable 1
SRAM processor output enable
Boundary scan Test Clock
Boundary scan Test Data Input
Boundary scan Test Data Output
Boundary scan Test Mode Select
Transmitted Data
Upper column address strobe
Write Enable control signal to SRAM
Digital Video
Ground
Ground IEEE
9.12.3 Progressive Scan
+2V5_FLI
+2V5_PLL
+3V3
+3V3_ANA
+3V3_DD
+3V3_FLI
+5V
BA
CAS
CB_OUT(0:9)
CLK_27MHZ
CLK4
CR_OUT(0:9)
D_ADDR(0:10)
D_DATA(0:29)
FRAME_IN
GND
HS_IN
HSOUT
RAS
SCL
SDA
VS_IN
VSOUT
WE
Y_OUT(0:9)
YUV_IN(0:7)
+2V5 Power Supply for IC7101
+2V5 Power Supply for PLL
+3V3 Power Supply
+3V3 Power Supply Analogue
+3V3 Power Supply Digital
+3V3 Power Supply for IC7101
+5V Power Supply
Bank Address
Column Address strobe
Chrominance Blue out
27MHz Clock
SDRAM clock
Chrominance Red out
Address bus
Data bus
Picture FrAME
Ground
Horizontal synchronisation IN
Horizontal synchronisation OUT
Row Address strobe
I2C bus clock
I2C bus data
Vertical synchronisation IN
Vertical synchronisation OUT
Write Enable
Luminance output from FLI
Digital Video bus
Spare Parts List DVDR1000 /0x1 /691
10.
GB 307
10. Spare Parts List
VARIOUS
Various
0027
3104 120 00370
0027
3104 120 00380
0027
0050
0065
3104 120 00390
3104 120 00272
3104 127 11143
0081
0151
0191
9305 025 81001
3104 127 11162
3104 124 07455
0197
0198
0199
0251
0252
0253
0254
0309
3104 123 30002
3104 124 07733
3104 128 93031
3104 127 10740
3104 127 10740
3104 127 10740
3104 127 10740
3104 125 24080
0309
0309
3104 125 24090
3104 125 24100
0309
0324
1001
3104 125 24120
3111 170 21592
3104 128 06710
1002
3122 427 22711
1003
3103 608 50010
1005
8001
3104 128 07760
3104 157 11641
8002
3104 157 11641
8003
3104 157 11790
8004
3104 157 11531
8013
3104 128 92921
TOOL
3104 128 07770
FRONT ASSY
Various
0001
0003
0004
0006
3104 127 12993
3104 127 12287
3104 127 12880
3104 127 12292
0010
0012
3104 124 05450
3104 127 12873
0014
3104 120 00340
0016
0019
0020
0029
0051
1004
1006
4822 380 20505
3104 127 11132
3104 127 11912
3104 124 07213
3104 127 11883
3103 608 50030
3104 128 07610
1157
1158
1159
1160
1161
VIDEO PLUS EUR SILVER 1162
(/051)
1163
G-CODE ASIA SILVER
1165
(/691)
1166
SHOW VIEW EUR SILVER 1167
RW BADGE
1168
TRAY FRONT ASSY
1169
COMPLETE
1170
VAE8010/01
1171
COVER ASSY
1172
FILTER AIR INLED
1173
BOTTOM
1174
DUST FILTER
1175
FILTER AIR INLET COVER 1176
DC BRUSHLESS FAN
1177
FOOT SILVER ASSY
1178
FOOT SILVER ASSY
FOOT SILVER ASSY
1179
FOOT SILVER ASSY
UM DVDR1000/001 MID
1910
EU
1911
UM DVDR1000/051 UK
1916
UM DVDR1000/021
NORDIC
1917
UM DVDR1000/691 ASIA
1918
CORDON ANT. L.1,50M
DVDR 4278 DIGITAL
BOARD MODULE
PSU DVDR1000-2 EURO
2102
50PS203
2105
DVDR ANALOG BOARD
2106
EUROP
DVDR 4316 DVIO BOARD 2120
CWAS FLEX DVD 22 70
2121
32S
2122
CWAS FLEX DVD 22 70
2123
32S
CWAS SPLIT FLEX 30 100 2124
2140
32S
2150
CWAS FLEX DVD 10 110
2151
32S
CABLE IEEE-1394 4P AMP 2152
2154
2155
2156
2157
PCB EXTENDER DVIO
2158
ASSY
2159
2160
2161
2165
2167
2168
2170
2171
FRONT & DOOR ASSY
2173
FRONT ASSY
2174
WINDOW ASSY
2175
HOLDER RIGHT
2177
COMPLETE
2179
LIGHT CONDUCTOR
2180
HOLDER LEFT
COMPLETE
WORDMARK PHILIPS
SILVER
LIGHT TRANSMITTER
3101
INNER DOOR ASSY
3102
INNER DOOR ASSY LEFT 3106
IR-WINDOW
3107
MOTOR ASSY
3110
DVDR DISPLAY BOARD
3111
PCB ASSY 4319 DVIO3112
FRONT
3113
DISPLAY PWB
Various
1140
1150
1153
1156
4822 276 13732 SWITCH TACT PUSH
2422 086 10947 PROT DEV 65V 250MA
PSC A
5322 242 73686 CST12,00MTW-TF01
2422 527 00513 BUZZER PIEZO CB13PAX5
3121
3122
3123
3124
3125
3126
3127
3128
3129
3130
3131
3132
4822 276 13732
4822 276 13732
4822 276 13732
4822 276 13732
4822 276 13732
4822 276 13732
4822 276 13732
4822 276 13732
4822 276 13732
4822 276 13732
4822 276 13732
4822 276 13732
4822 276 13732
4822 276 13732
4822 276 13732
4822 276 13732
4822 276 13732
4822 276 13732
4822 276 13732
4822 276 13732
2422 128 02947
2422 128 02947
2422 033 00355
2422 025 10185
2422 025 10772
3103 140 27931
2412 020 00724
4822 126 14241
4822 126 14241
4822 126 14305
4822 124 80791
SWITCH TACT PUSH
SWITCH TACT PUSH
SWITCH TACT PUSH
SWITCH TACT PUSH
SWITCH TACT PUSH
SWITCH TACT PUSH
SWITCH TACT PUSH
SWITCH TACT PUSH
SWITCH TACT PUSH
SWITCH TACT PUSH
SWITCH TACT PUSH
SWITCH TACT PUSH
SWITCH TACT PUSH
SWITCH TACT PUSH
SWITCH TACT PUSH
SWITCH TACT PUSH
SWITCH TACT PUSH
SWITCH TACT PUSH
SWITCH TACT PUSH
SWITCH TACT PUSH
SWI DET 1P 0,1A 30V
SPP85
SWI DET 1P 0,1A 30V
SPP85
YKC22-0489
CON BM H 9P M 2.00 PH B
CON BM V 12P M 2.00 PH
B
CABLE TREE ASSY 7P
CON BM V 2P M 2.50 EH B
4822 126 14305
5322 126 11583
5322 126 11583
5322 126 11583
4822 124 11946
4822 124 80231
4822 126 14305
4822 121 43526
4822 124 40849
4822 126 14305
2238 586 59812
5322 126 11583
4822 126 14305
2238 586 59812
4822 126 14305
4822 126 14305
5322 126 11583
4822 126 13881
4822 122 31765
5322 126 11583
4822 126 13879
5322 126 11583
4822 126 14305
3198 017 41050
5322 126 11583
5322 126 11583
4822 126 14305
0603 50V 330P COL R
0603 50V 330P COL R
100nF 10% 16V 0603
470mF 16V 20% 105C
DXH=8X11.5
100nF 10% 16V 0603
10nF 10% 50V 0603
10nF 10% 50V 0603
10nF 10% 50V 0603
22mF 20% 16V
47mF 20% 16V
100nF 10% 16V 0603
47nF 5% 250V
330mF 20% 16V
100nF 10% 16V 0603
0603 50V 100NP80M
10nF 10% 50V 0603
100nF 10% 16V 0603
0603 50V 100NP80M
100nF 10% 16V 0603
100nF 10% 16V 0603
10nF 10% 50V 0603
470pF 5% 50V
100pF 2% 63V
10nF 10% 50V 0603
220nF 20% 16V
10nF 10% 50V 0603
100nF 10% 16V 0603
0603 10V 1mF COL R
10nF 10% 50V 0603
10nF 10% 50V 0603
100nF 10% 16V 0603
4822 051 30102
4822 051 30105
4822 051 30102
4822 051 30105
4822 116 83868
4822 051 30759
4822 051 30759
4822 051 30759
4822 051 30101
4822 051 30103
4822 051 30223
4822 051 30682
4822 051 30392
4822 117 12917
4822 117 12864
4822 051 30103
4822 051 30103
4822 051 30103
4822 050 11002
4822 050 11002
1k 5% 0.062W
1M 5% 0.062W
1k 5% 0.062W
1M 5% 0.062W
150W 5% 0.5W
75W 5% 0.062W
75W 5% 0.062W
75W 5% 0.062W
100W 5% 0.062W
10k 5% 0.062W
22k 5% 0.062W
6k8 5% 0.062W
3k9 5% 0.063W 0603
1W 5% 0.062W CASE0603
82k 5% 0.6W
10k 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
1k 1% 0.4W
1k 1% 0.4W
3133
3134
3135
3136
3137
3138
3139
3140
3141
3142
3143
3144
3145
3146
3147
3148
3149
3150
4822 051 30223
4822 051 30103
4822 117 12063
4822 051 30472
4822 051 30472
4822 051 30103
4822 051 30391
4822 051 30221
4822 051 30472
4822 117 12925
4822 051 30103
4822 051 30391
4822 051 30103
4822 051 30103
4822 051 30103
4822 051 30222
4822 051 30472
4822 051 30562
3151
3152
3153
4822 051 30102
4822 116 52257
2322 704 65608
3154
3155
3156
3157
3158
3159
4822 050 21003
4822 051 30222
4822 050 21003
4822 116 83884
4822 051 30223
4822 051 30562
3160
2322 704 65608
3161
3162
3163
3164
3165
3166
3167
3168
3169
3171
3172
3173
3174
3175
3176
3177
3178
3179
3180
3182
3183
3184
3185
3186
3187
3188
3189
3190
3191
3192
3193
3194
3195
3196
3197
3198
3199
4xxx
4xxx
4822 116 52297
4822 051 30683
4822 051 30103
4822 050 21003
4822 051 30222
4822 116 83876
4822 116 83876
4822 116 52175
4822 051 30103
4822 051 30222
4822 051 30472
4822 051 30103
4822 051 30475
4822 051 30103
4822 051 30471
4822 051 30102
4822 051 30222
4822 116 52283
4822 051 30103
4822 051 30152
4822 051 30222
4822 051 30221
4822 051 30471
4822 051 30102
4822 051 30222
4822 051 30472
4822 051 30103
4822 117 12925
4822 051 30221
4822 051 30102
4822 051 30103
4822 051 30222
4822 051 30102
4822 051 30222
4822 051 30221
4822 051 30472
4822 051 30471
4822 051 10008
4822 051 20008
5150
4822 157 51462 10mH 10% 4X9.8MM
LAL04T100K
4822 157 51462 10mH 10% 4X9.8MM
LAL04T100K
2422 531 02423 TRANSFORMER HEATER
5151
5153
6100
6101
6102
22k 5% 0.062W
10k 5% 0.062W
NTC DC 5W 10k 5%
4k7 5% 0.062W
4k7 5% 0.062W
10k 5% 0.062W
390W 5% 0.062W
220W 5% 0.062W
4k7 5% 0.062W
47k 1% 0.063W 0603
10k 5% 0.062W
390W 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
2k2 5% 0.062W
4k7 5% 0.062W
5k6 5% 0.063W 0603 RC21
RST SM
1k 5% 0.062W
22k 5% 0.5W
RST SM 603 RC22H 5W6
PM1
10k 1% 0.6W
2k2 5% 0.062W
10k 1% 0.6W
47k 5% 0.5W
22k 5% 0.062W
5k6 5% 0.063W 0603 RC21
RST SM
RST SM 603 RC22H 5W6
PM1
68k 5% 0.5W
68k 5% 0.062W
10k 5% 0.062W
10k 1% 0.6W
2k2 5% 0.062W
270W 5% 0.5W
270W 5% 0.5W
100W 5% 0.5W
10k 5% 0.062W
2k2 5% 0.062W
4k7 5% 0.062W
10k 5% 0.062W
4M7 5% 0.062W
10k 5% 0.062W
470W 5% 0.062W
1k 5% 0.062W
2k2 5% 0.062W
4k7 5% 0.5W
10k 5% 0.062W
1k5 5% 0.062W
2k2 5% 0.062W
220W 5% 0.062W
470W 5% 0.062W
1k 5% 0.062W
2k2 5% 0.062W
4k7 5% 0.062W
10k 5% 0.062W
47k 1% 0.063W 0603
220W 5% 0.062W
1k 5% 0.062W
10k 5% 0.062W
2k2 5% 0.062W
1k 5% 0.062W
2k2 5% 0.062W
220W 5% 0.062W
4k7 5% 0.062W
470W 5% 0.062W
0W 5% 0.25W (1206)
0W 5% 0.25W (0805)
9322 146 61685 DIO REG SM DF3A6.8FU
TOSJ
9322 146 61685 DIO REG SM DF3A6.8FU
TOSJ
9322 146 61685 DIO REG SM DF3A6.8FU
TOSJ
GB 308
6103
10.
6175
6176
6177
6178
6179
6180
6181
6182
6183
6184
6185
6186
6187
6188
6189
6190
6191
6192
6193
6194
6195
6196
6197
6198
9322 146 61685 DIO REG SM DF3A6.8FU
TOSJ
9322 146 61685 DIO REG SM DF3A6.8FU
TOSJ
9322 140 17676 LED VS LTL14CHJ(LITO)A
9322 129 38685 DIO REG SM BZM55-C6V8
(TEG0)
4822 130 83757 BAS216
9340 260 20115 DIO SIG SM
BAW56W(PHSE) R
9322 102 64685 DIO REG SM UDZ2.7B
(RHM0) R
9340 260 20115 DIO SIG SM
BAW56W(PHSE) R
4822 130 83757 BAS216
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
9340 260 20115 DIO SIG SM
BAW56W(PHSE) R
9340 260 20115 DIO SIG SM
BAW56W(PHSE) R
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
9340 260 20115 DIO SIG SM
BAW56W(PHSE) R
9340 260 20115 DIO SIG SM
BAW56W(PHSE) R
9340 260 20115 DIO SIG SM
BAW56W(PHSE) R
9340 260 20115 DIO SIG SM
BAW56W(PHSE) R
9340 260 20115 DIO SIG SM
BAW56W(PHSE) R
9340 260 20115 DIO SIG SM
BAW56W(PHSE) R
9340 260 20115 DIO SIG SM
BAW56W(PHSE) R
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 30621 1N4148
4822 130 83757 BAS216
7120
7140
7141
7142
7143
7144
7145
7150
7151
7152
4822 209 30146
9322 155 22667
4822 130 61553
3198 010 42310
5322 130 42756
5322 130 42756
3198 010 42310
2722 171 07721
3198 010 42310
9322 148 79668
7153
7155
7156
3198 010 42310
3198 010 42310
3103 178 56451
7157
7160
7164
7165
7166
3198 010 42310
5322 209 11147
3198 010 42310
4822 130 61553
3198 010 42310
6104
6140
6150
6151
6152
6154
6155
6156
6157
6158
6159
6160
6161
6164
6165
6166
6167
6168
6169
6170
6171
6172
6173
6174
Spare Parts List
DVDR1000 /0x1 /691
L2722
DTC124EU
BC847BW
BC857C
BC857C
BC847BW
VFD BJ-801GNK 120X32
BC847BW
FET POW SM
STN3NE06(ST00)
BC847BW
BC847BW
OTPROM ASSY DDCP11U
BC847BW
HEF4093BT
BC847BW
DTC124EU
BC847BW
2005
2006
2007
2008
Various
2009
2010
1000 2422 033 00363 CON BM H 4P F 0.8 B
2011
1001 2422 025 17106 CON BM H 4P F 0.8 IEEE R 2012
2013
2014
2015
2016
2000 5322 126 10511 1nF 5% 50V
2017
2001 5322 126 10511 1nF 5% 50V
2018
2002 2020 557 90732 250V 4N7 PM10 R
2019
2003 2020 557 90732 250V 4N7 PM10 R
2024
2004 2020 557 90732 250V 4N7 PM10 R
2030
2005 2020 557 90732 250V 4N7 PM10 R
2321
2322
2323
2324
3000 4822 051 20105 1M 5% 0.1W
2325
2328
2329
2332
2400
5000 2422 549 44768 IND FXD SM EMI 100mH z
2401
90R R
2402
5001 2422 549 44768 IND FXD SM EMI 100mH z
2403
90R R
2404
2405
2406
2407
2408
6000 4822 130 11395 TLMH3100
2430
6001 9322 172 97668 DIO SUP SM6T39CA
2431
(ST00) R
2432
2433
2434
ANALOG PWB
2436
2437
Various
2438
2439
1324 2422 086 10954 PROT DEV 65V 1A PSC
2440
1325 2422 086 10951 PROT DEV 65V 500MA
2441
PSC
2442
1326 2422 086 10954 PROT DEV 65V 1A PSC
2443
1327 2422 086 10951 PROT DEV 65V 500MA
2446
PSC
2447
1600 4822 242 10434 L1101-952632460
0E1(18,432MHz )
2461
1700 4822 242 81436 OFWK3953M
2462
1701 4822 242 10307 OFWG3956M
2463
1702 2422 549 44341 FIL SAW 38MHz 9
2464
OFWK9656M
2465
1703 4822 242 72586 TPS5,5MB-TF20
2466
1705 3139 147 17001 TUNER UV1316MK3(NON
2467
EURO)
2468
1802 2422 543 01153 RES XTL 32KHZ768 12P5
2469
DT-38 B
2470
1900 4822 265 11154 52030-2210 (22P)
2473
1932 2422 025 11244 CON BM V 07P M 2.50 EH
2474
B
2477
1943 9322 155 28667 OPT FIB CON
2481
GP1FA550TZ (SRPJ)L
2483
1945 2422 026 05197 CON BM CINCH H 1P F BK
2484
B
2500
1950 2422 033 00334 CON BM EURO H 42P F
2501
BK GRND-L
2502
1953 2422 025 10769 CON BMT 9P VERT PH-B
2503
1954 4822 265 11154 52030-2210 (22P)
2505
1955 2422 026 05046 CON BM MDIN 8P F
2506
TCX0310B
2507
1958 2422 026 05093 CON BM CINCH 4P F
2508
2*WHRD
2509
1959 2422 026 05096 CON BM CINCH H 2P F
2510
YEYE
2511
1960 4822 267 10565 4P
2512
1982 4822 267 11031 10P. FEM. V
2513
1983 2422 086 10919 PROT DEV 65V 125MA
2514
MP13
2515
1984 2412 020 00724 CON BM V 2P M 2.50 EH B
2516
1987 2422 025 10772 CON BM V 12P M 2.00 PH
2517
B
2518
1990 4822 242 73552 13,875 000 MHz
2519
1994 4822 242 10956 20MHz 20P AT-49
2520
2521
2522
2523
2524
2000 4822 126 14494 22nF 10% 25V 0603
2525
2002 4822 126 14241 0603 50V 330P COL R
2526
2003 4822 126 14494 22nF 10% 25V 0603
2527
2004 4822 124 40433 47mF 20% 25V
2528
DIVIO FRONT
4822 126 14305
4822 124 40433
4822 126 13883
4822 126 14241
4822 126 14305
4822 126 14305
4822 124 40433
4822 126 14305
4822 124 40433
4822 126 14305
4822 124 40433
4822 126 14305
4822 124 40433
4822 126 13883
4822 126 14305
4822 122 33777
4822 124 41584
4822 126 14305
4822 126 14305
3198 017 34730
2020 552 96327
4822 126 14305
4822 124 41584
3198 017 44740
4822 124 40207
5322 126 11583
4822 126 14305
4822 126 14305
4822 124 40433
5322 126 11583
5322 126 11583
5322 126 11578
4822 126 14305
5322 126 11578
5322 126 11583
4822 124 40433
5322 126 11583
4822 124 81151
4822 124 40207
4822 124 81151
4822 126 14305
4822 126 14305
4822 124 81151
4822 124 40207
4822 124 81151
4822 124 11947
4822 124 11947
4822 126 13881
4822 126 13881
4822 124 40433
4822 124 40769
4822 124 40433
4822 124 40769
4822 126 14305
4822 126 14305
5322 126 11583
4822 126 13881
4822 126 13881
3198 017 41050
4822 126 14305
4822 122 33753
4822 126 14305
4822 126 14305
2222 867 15339
3198 017 41050
5322 126 11578
4822 126 14305
4822 126 14305
4822 124 40769
4822 124 40769
4822 126 14305
4822 126 14305
4822 126 14305
4822 124 40433
4822 124 40769
4822 124 40433
4822 122 33777
4822 122 33777
4822 126 14305
4822 126 14305
4822 124 40769
3198 017 41050
3198 017 41050
3198 017 41050
3198 017 41050
4822 124 41584
4822 126 14305
3198 017 41050
4822 126 14305
3198 017 41050
3198 017 41050
4822 126 14305
4822 126 14305
3198 017 41050
100nF 10% 16V 0603
47mF 20% 25V
220pF 5% 50V
0603 50V 330P COL R
100nF 10% 16V 0603
100nF 10% 16V 0603
47mF 20% 25V
100nF 10% 16V 0603
47mF 20% 25V
100nF 10% 16V 0603
47mF 20% 25V
100nF 10% 16V 0603
47mF 20% 25V
220pF 5% 50V
100nF 10% 16V 0603
47pF 5% 63V
100mF 20% 10V
100nF 10% 16V 0603
100nF 10% 16V 0603
0603 16V 47nF COL
16V 330nF PM10
100nF 10% 16V 0603
100mF 20% 10V
0603 10V 470nF COL
100mF 20% 25V
10nF 10% 50V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
47mF 20% 25V
10nF 10% 50V 0603
10nF 10% 50V 0603
1nF 10% 50V 0603
100nF 10% 16V 0603
1nF 10% 50V 0603
10nF 10% 50V 0603
47mF 20% 25V
10nF 10% 50V 0603
22mF 50V
100mF 20% 25V
22mF 50V
100nF 10% 16V 0603
100nF 10% 16V 0603
22mF 50V
100mF 20% 25V
22mF 50V
10mF 20% 16V
10mF 20% 16V
470pF 5% 50V
470pF 5% 50V
47mF 20% 25V
4.7mF 20% 100V
47mF 20% 25V
4.7mF 20% 100V
100nF 10% 16V 0603
100nF 10% 16V 0603
10nF 10% 50V 0603
470pF 5% 50V
470pF 5% 50V
0603 10V 1mF COL R
100nF 10% 16V 0603
150pF 5% 50V
100nF 10% 16V 0603
100nF 10% 16V 0603
0603 50V 33P PM5
0603 10V 1mF COL R
1nF 10% 50V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
4.7mF 20% 100V
4.7mF 20% 100V
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
47mF 20% 25V
4.7mF 20% 100V
47mF 20% 25V
47pF 5% 63V
47pF 5% 63V
100nF 10% 16V 0603
100nF 10% 16V 0603
4.7mF 20% 100V
0603 10V 1mF COL R
0603 10V 1mF COL R
0603 10V 1mF COL R
0603 10V 1mF COL R
100mF 20% 10V
100nF 10% 16V 0603
0603 10V 1mF COL R
100nF 10% 16V 0603
0603 10V 1mF COL R
0603 10V 1mF COL R
100nF 10% 16V 0603
100nF 10% 16V 0603
0603 10V 1mF COL R
Spare Parts List DVDR1000 /0x1 /691
2529
2530
2531
2532
2533
2534
2535
2536
2537
2538
2539
2540
2541
2542
2544
2545
2546
2549
2550
2551
2600
2601
2602
2603
2604
2605
2606
2607
2608
2609
2610
2612
2614
2614
4822 126 14305
3198 017 41050
4822 126 14305
4822 124 11947
4822 124 11947
4822 126 14305
4822 124 11947
3198 017 41050
3198 017 41050
3198 017 41050
4822 124 11947
5322 126 11578
4822 126 14305
4822 126 13879
4822 126 14305
4822 126 13881
4822 126 13881
3198 017 41050
3198 017 41050
5322 126 11583
4822 124 40248
5322 126 11583
4822 124 40248
4822 126 14305
5322 126 11583
4822 124 40248
5322 126 11583
4822 126 14225
4822 124 40248
4822 126 14225
5322 126 11583
4822 124 40769
3198 017 41050
3198 030 82280
2615
2615
3198 017 41050
3198 030 82280
2618
2619
2620
2621
2622
2623
2624
2624
3198 017 41050
3198 017 41050
3198 016 33380
3198 016 33380
4822 124 40248
5322 126 11583
3198 017 41050
3198 030 82280
2625
2625
3198 017 41050
3198 030 82280
2626
2627
2700
2701
2702
2703
2704
2705
2706
2707
2708
2709
2710
2711
2712
2713
2714
2715
2716
2717
2718
2800
2801
2802
2803
2806
2807
2810
2811
2812
2814
2815
2816
2817
2818
2819
2820
2821
2822
2823
2831
2832
2900
2901
3198 017 41050
3198 017 41050
4822 124 81151
5322 122 33861
4822 126 13883
5322 124 41379
4822 126 13881
4822 126 14305
4822 126 14305
5322 126 11583
4822 124 40248
4822 126 13879
2020 552 94523
5322 126 11578
5322 126 11578
3198 024 44730
4822 124 22652
5322 126 11578
4822 124 41584
4822 124 22652
4822 124 40433
3198 017 44740
4822 126 14238
4822 126 13482
4822 126 13883
3198 017 44740
4822 126 13482
5322 126 11578
4822 124 11968
4822 126 14305
5322 126 11583
4822 126 14507
3198 017 41050
5322 126 11578
5322 126 11583
3198 017 44740
3198 017 44740
2020 552 96305
2020 552 96305
4822 126 14305
4822 124 40433
4822 126 14305
5322 126 11583
4822 124 40433
100nF 10% 16V 0603
0603 10V 1mF COL R
100nF 10% 16V 0603
10mF 20% 16V
10mF 20% 16V
100nF 10% 16V 0603
10mF 20% 16V
0603 10V 1mF COL R
0603 10V 1mF COL R
0603 10V 1mF COL R
10mF 20% 16V
1nF 10% 50V 0603
100nF 10% 16V 0603
220nF 20% 16V
100nF 10% 16V 0603
470pF 5% 50V
470pF 5% 50V
0603 10V 1mF COL R
0603 10V 1mF COL R
10nF 10% 50V 0603
10mF 20% 63V
10nF 10% 50V 0603
10mF 20% 63V
100nF 10% 16V 0603
10nF 10% 50V 0603
10mF 20% 63V
10nF 10% 50V 0603
56pF 5% 50V 0603
10mF 20% 63V
56pF 5% 50V 0603
10nF 10% 50V 0603
4.7mF 20% 100V
0603 10V 1mF COL R
EL SM 50V 2U2 PM20 COL
R
0603 10V 1mF COL R
EL SM 50V 2U2 PM20 COL
R
0603 10V 1mF COL R
0603 10V 1mF COL R
0603 50V 3P3 COL
0603 50V 3P3 COL
10mF 20% 63V
10nF 10% 50V 0603
0603 10V 1mF COL R
EL SM 50V 2U2 PM20 COL
R
0603 10V 1mF COL R
EL SM 50V 2U2 PM20 COL
R
0603 10V 1mF COL R
0603 10V 1mF COL R
22mF 50V
120pF 10% 50V
220pF 5% 50V
2.2mF 20% 50V
470pF 5% 50V
100nF 10% 16V 0603
100nF 10% 16V 0603
10nF 10% 50V 0603
10mF 20% 63V
220nF 20% 16V
0603 50V 8P2 PM0P5
1nF 10% 50V 0603
1nF 10% 50V 0603
47nF 50V 0603
2.2mF 20% 50V
1nF 10% 50V 0603
100 mF 20% 10V
2.2mF 20% 50V
47mF 20% 25V
0603 10V 470nF COL
0603 50V 2N2 COL R
470nF 80/20% 16V
220pF 5% 50V
0603 10V 470nF COL
470nF 80/20% 16V
1nF 10% 50V 0603
220mF 20% 5.5V
100nF 10% 16V 0603
10nF 10% 50V 0603
18pF 5% 50V 0603
0603 10V 1mF COL R
1nF 10% 50V 0603
10nF 10% 50V 0603
0603 10V 470nF COL
0603 10V 470nF COL
4U7 20% 10V
4U7 20% 10V
100nF 10% 16V 0603
47mF 20% 25V
100nF 10% 16V 0603
10nF 10% 50V 0603
47mF 20% 25V
2902
2903
2904
2905
2906
2907
2908
2909
2910
2911
2914
2915
2916
2917
2918
2950
2951
2952
2953
2954
2955
2956
2957
2970
2980
2981
2982
2983
2984
2990
2991
2992
2993
2994
2995
2996
4822 126 14305
4822 126 13879
3198 017 41050
4822 124 40433
4822 126 14305
5322 126 11583
4822 126 11669
4822 126 14305
4822 126 11669
2222 867 15339
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 124 40248
4822 126 14238
4822 126 14238
4822 126 14508
4822 126 14508
3198 017 41050
3198 017 41050
4822 124 11947
4822 124 40207
4822 126 14305
4822 124 40207
5322 126 11583
3198 016 31020
4822 126 14305
4822 124 40433
4822 126 14305
4822 126 14305
4822 126 14305
4822 122 33761
4822 122 33761
100nF 10% 16V 0603
220nF 20% 16V
0603 10V 1mF COL R
47mF 20% 25V
100nF 10% 16V 0603
10nF 10% 50V 0603
27pF
100nF 10% 16V 0603
27pF
0603 50V 33P PM5
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
10mF 20% 63V
0603 50V 2N2 COL R
0603 50V 2N2 COL R
180pF 5% 50V 0603
180pF 5% 50V 0603
0603 10V 1mF COL R
0603 10V 1mF COL R
10mF 20% 16V
100mF 20% 25V
100nF 10% 16V 0603
100mF 20% 25V
10nF 10% 50V 0603
0603 25V 1nF
100nF 10% 16V 0603
47mF 20% 25V
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
22pF 5% 50V
22pF 5% 50V
3000
3001
3002
3003
3004
3005
3005
4822 051 30472
4822 117 13632
4822 051 30103
4822 051 30103
4822 051 30103
4822 051 30472
5322 117 13026
3006
3006
4822 051 30472
5322 117 13026
3007
3007
4822 051 30472
5322 117 13026
3008
2120 108 94006
3009
2322 704 65102
3009
3010
4822 051 30332
2120 108 94006
3011
3011
4822 051 30472
5322 117 13026
3012
3012
4822 051 30472
5322 117 13026
3013
3014
3015
3016
3017
3017
4822 117 12139
4822 117 12139
4822 117 12139
4822 117 12139
4822 051 30472
5322 117 13026
3018
2120 108 94006
3019
2120 108 94006
3020
3020
4822 051 30123
5322 117 13028
3021
3021
4822 051 30123
5322 117 13028
3022
2322 704 65102
3022
3023
3024
3025
3026
3027
3028
3029
4822 051 30332
4822 117 12925
4822 117 12925
4822 117 12139
4822 117 12139
4822 117 12139
4822 117 13608
4822 051 30008
4k7 5% 0.062W
100k 1% 0603 0.62W
10k 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
4k7 5% 0.062W
4k7 1% 0.063W 0603
RC22H
4k7 5% 0.062W
4k7 1% 0.063W 0603
RC22H
4k7 5% 0.062W
4k7 1% 0.063W 0603
RC22H
RST SM 0603 ERJ3G 1W5
PM5
RST SM 0603 RC22H 5k1
PM1
3k3 5% 0.062W
RST SM 0603 ERJ3G 1W5
PM5
4k7 5% 0.062W
4k7 1% 0.063W 0603
RC22H
4k7 5% 0.062W
4k7 1% 0.063W 0603
RC22H
22W 5% 0.062W
22W 5% 0.062W
22W 5% 0.062W
22W 5% 0.062W
4k7 5% 0.062W
4k7 1% 0.063W 0603
RC22H
RST SM 0603 ERJ3G 1W5
PM5
RST SM 0603 ERJ3G 1W5
PM5
12k 5% 0.062W
12k 1% 0.063W 0603
RC22H
12k 5% 0.062W
12k 1% 0.063W 0603
RC22H
RST SM 0603 RC22H 5k1
PM1
3k3 5% 0.062W
47k 1% 0.063W 0603
47k 1% 0.063W 0603
22W 5% 0.062W
22W 5% 0.062W
22W 5% 0.062W
4.7W 5% 0603 0.0016W
0W jumper
3029
3030
3032
3032
3321
3325
3326
3335
3336
3337
3338
3339
3340
3402
3403
3404
3405
3406
3407
3408
3409
3410
4822 117 12903
4822 117 12139
4822 051 30008
4822 117 12903
4822 117 12891
4822 117 12891
4822 051 30103
4822 051 30472
4822 051 30103
4822 117 13632
4822 117 12891
4822 117 12891
4822 117 12891
4822 117 13632
4822 051 30101
4822 051 30101
4822 051 30759
4822 051 30759
4822 051 30101
4822 051 30759
4822 051 30103
2322 574 10402
3411
3412
3413
3414
3415
3416
4822 117 13632
4822 051 30103
4822 051 30103
4822 051 30103
4822 117 13632
2322 574 10402
3417
3418
3419
3423
3424
3425
3426
3428
3429
3431
3432
3433
4822 117 13632
4822 117 13632
4822 117 13632
4822 117 12864
4822 051 30474
4822 051 30474
4822 051 30474
4822 051 30101
4822 051 30561
4822 051 30472
4822 051 30759
4822 051 30689
3434
3435
3436
3437
3438
3439
3440
3441
3442
3443
3445
3446
3450
3451
3455
3458
3459
3460
3461
3462
4822 117 12864
4822 117 13632
4822 051 30759
4822 117 12864
4822 117 13632
4822 051 30471
4822 051 30101
4822 117 13632
4822 051 30472
4822 051 30479
4822 051 30471
4822 051 30101
4822 117 13632
4822 051 30472
4822 117 13632
4822 051 30152
4822 051 30472
4822 051 30471
4822 051 30472
2322 574 10402
3463
3464
3465
4822 117 13632
4822 117 13632
2322 574 10402
3466
3467
3468
4822 051 30471
4822 051 30472
2322 574 10402
3469
3470
3471
4822 117 13632
4822 117 13632
2322 574 10402
3472
3473
4822 051 30471
4822 051 30689
3474
3475
3476
4822 051 30471
4822 051 30102
5322 117 13068
3477
3478
3479
3480
3481
3482
3483
4822 117 12925
4822 051 30759
4822 051 30472
4822 051 30759
4822 051 30759
4822 051 30101
4822 051 30689
3484
3485
3486
4822 051 30759
4822 051 30102
4822 051 30151
10.
GB 309
1k8 1% 0.063W 0603
22W 5% 0.062W
0W jumper
1k8 1% 0.063W 0603
220k 1% ERJ3W
220k 1% ERJ3W
10k 5% 0.062W
4k7 5% 0.062W
10k 5% 0.062W
100k 1% 0603 0.62W
220k 1% ERJ3W
220k 1% ERJ3W
220k 1% ERJ3W
100k 1% 0603 0.62W
100W 5% 0.062W
100W 5% 0.062W
75W 5% 0.062W
75W 5% 0.062W
100W 5% 0.062W
75W 5% 0.062W
10k 5% 0.062W
VDR 0805 1M A/6V4 MAX
21VR
100k 1% 0603 0.62W
10k 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
100k 1% 0603 0.62W
VDR 0805 1M A/6V4 MAX
21VR
100k 1% 0603 0.62W
100k 1% 0603 0.62W
100k 1% 0603 0.62W
82k 5% 0.6W
470k 5% 0.062W
470k 5% 0.062W
470k 5% 0.062W
100W 5% 0.062W
560W 5% 0.062W
4k7 5% 0.062W
75W 5% 0.062W
68W 5% 0.063W 0603
RC21 RST SM
82k 5% 0.6W
100k 1% 0603 0.62W
75W 5% 0.062W
82k 5% 0.6W
100k 1% 0603 0.62W
470W 5% 0.062W
100W 5% 0.062W
100k 1% 0603 0.62W
4k7 5% 0.062W
47W 5% 0.062W
470W 5% 0.062W
100W 5% 0.062W
100k 1% 0603 0.62W
4k7 5% 0.062W
100k 1% 0603 0.62W
1k5 5% 0.062W
4k7 5% 0.062W
470W 5% 0.062W
4k7 5% 0.062W
VDR 0805 1M A/6V4 MAX
21VR
100k 1% 0603 0.62W
100k 1% 0603 0.62W
VDR 0805 1M A/6V4 MAX
21VR
470W 5% 0.062W
4k7 5% 0.062W
VDR 0805 1M A/6V4 MAX
21VR
100k 1% 0603 0.62W
100k 1% 0603 0.62W
VDR 0805 1M A/6V4 MAX
21VR
470W 5% 0.062W
68W 5% 0.063W 0603
RC21 RST SM
470W 5% 0.062W
1k 5% 0.062W
82W 1% 0.063W 0603
RC22H
47k 1% 0.063W 0603
75W 5% 0.062W
4k7 5% 0.062W
75W 5% 0.062W
75W 5% 0.062W
100W 5% 0.062W
68W 5% 0.063W 0603
RC21 RST SM
75W 5% 0.062W
1k 5% 0.062W
150W 5% 0.062W
GB 310
10.
3487
3488
3489
3490
3492
3494
3495
3497
3499
3500
3501
3503
3504
3505
3506
3515
3516
3517
4822 051 30101
4822 051 30101
4822 051 30103
4822 051 30471
4822 117 13632
4822 051 30759
4822 051 30222
4822 051 30101
4822 051 30331
4822 051 30272
4822 051 30272
4822 051 30221
4822 051 30222
4822 051 30222
4822 051 30221
4822 117 13632
4822 051 30471
2322 574 10402
3518
3519
3520
4822 051 30472
4822 117 13632
2322 574 10402
3521
3522
3523
4822 051 30102
4822 051 30471
2322 574 10402
3524
3525
3526
3527
3528
3529
3530
4822 051 30101
4822 051 30101
4822 117 13632
4822 051 30472
4822 051 30471
4822 117 13632
2322 574 10402
3531
3532
3533
3534
3535
3536
4822 051 30471
4822 051 30471
4822 117 12925
4822 051 30101
4822 051 30471
4822 051 30689
3537
4822 051 30689
3538
3539
3540
4822 051 30102
4822 051 30102
5322 117 13068
3541
3542
3543
3544
3545
4822 051 30471
4822 051 30471
4822 051 30101
4822 051 30472
4822 051 30689
3546
3547
3548
3549
4822 051 30102
4822 051 30151
4822 051 30101
4822 051 30689
3550
3551
3552
4822 051 30102
4822 051 30101
4822 051 30689
3553
3554
3555
3556
3557
3558
3559
3560
3561
3562
3563
3567
3568
3570
3600
3601
3602
3603
3604
3605
3606
3607
3700
3701
3702
4822 051 30102
4822 051 30759
4822 051 30103
4822 117 12925
4822 117 12925
4822 051 30223
4822 051 30392
4822 117 12891
4822 051 30332
4822 051 30101
4822 051 30101
4822 051 30103
4822 051 30472
4822 117 13632
4822 051 30103
4822 051 30101
4822 051 30472
4822 051 30101
4822 051 30102
4822 051 30102
4822 051 30102
4822 051 30102
4822 051 30333
4822 051 30681
4822 051 30562
3703
3704
3705
3706
3707
4822 051 30154
4822 051 30472
4822 051 30183
4822 051 30331
4822 100 12158
DVDR1000 /0x1 /691
100W 5% 0.062W
100W 5% 0.062W
10k 5% 0.062W
470W 5% 0.062W
100k 1% 0603 0.62W
75W 5% 0.062W
2k2 5% 0.062W
100W 5% 0.062W
330W 5% 0.062W
2k7 5% 0.062W
2k7 5% 0.062W
220W 5% 0.062W
2k2 5% 0.062W
2k2 5% 0.062W
220W 5% 0.062W
100k 1% 0603 0.62W
470W 5% 0.062W
VDR 0805 1M A/6V4 MAX
21VR
4k7 5% 0.062W
100k 1% 0603 0.62W
VDR 0805 1M A/6V4 MAX
21VR
1k 5% 0.062W
470W 5% 0.062W
VDR 0805 1M A/6V4 MAX
21VR
100W 5% 0.062W
100W 5% 0.062W
100k 1% 0603 0.62W
4k7 5% 0.062W
470W 5% 0.062W
100k 1% 0603 0.62W
VDR 0805 1M A/6V4 MAX
21VR
470W 5% 0.062W
470W 5% 0.062W
47k 1% 0.063W 0603
100W 5% 0.062W
470W 5% 0.062W
68W 5% 0.063W 0603
RC21 RST SM
68W 5% 0.063W 0603
RC21 RST SM
1k 5% 0.062W
1k 5% 0.062W
82W 1% 0.063W 0603
RC22H
470W 5% 0.062W
470W 5% 0.062W
100W 5% 0.062W
4k7 5% 0.062W
68W 5% 0.063W 0603
RC21 RST SM
1k 5% 0.062W
150W 5% 0.062W
100W 5% 0.062W
68W 5% 0.063W 0603
RC21 RST SM
1k 5% 0.062W
100W 5% 0.062W
68W 5% 0.063W 0603
RC21 RST SM
1k 5% 0.062W
75W 5% 0.062W
10k 5% 0.062W
47k 1% 0.063W 0603
47k 1% 0.063W 0603
22k 5% 0.062W
3k9 5% 0.063W 0603
220k 1% ERJ3W
3k3 5% 0.062W
100W 5% 0.062W
100W 5% 0.062W
10k 5% 0.062W
4k7 5% 0.062W
100k 1% 0603 0.62W
10k 5% 0.062W
100W 5% 0.062W
4k7 5% 0.062W
100W 5% 0.062W
1k 5% 0.062W
1k 5% 0.062W
1k 5% 0.062W
1k 5% 0.062W
33k 5% 0.062W
680W 5% 0.062W
5k6 5% 0.063W 0603 RC21
RST SM
150k 5% 0.062W
4k7 5% 0.062W
18k 5% 0.062W
330W 5% 0.062W
22k 30%
Spare Parts List
3708
3709
3710
3711
3712
3713
3714
3715
3716
3717
3718
3719
3720
3721
3722
3723
3724
3725
3726
4822 051 30101
4822 051 30183
4822 051 30101
4822 051 30008
4822 051 30222
4822 051 30682
4822 051 30472
4822 051 30101
4822 051 30101
4822 051 30102
4822 051 30472
4822 051 30472
4822 051 30101
4822 051 30271
4822 051 30332
4822 117 13632
4822 051 30681
4822 051 30472
4822 051 30562
3727
3728
3729
4822 051 30272
4822 051 30331
4822 051 30562
3730
4822 051 30562
3800
3801
3803
3804
3805
3807
4822 051 30103
4822 051 30273
4822 051 30682
4822 051 30222
4822 051 30222
5322 117 13052
3808
3809
3810
3811
3812
3813
3815
4822 051 30333
4822 051 30103
4822 117 13632
4822 051 30472
4822 051 30221
4822 051 30684
5322 117 13018
3816
3817
3818
3819
3820
3821
3822
3823
3824
3825
3829
4822 051 30101
4822 051 30102
4822 051 30101
4822 051 30101
4822 051 30472
4822 051 30103
4822 117 13632
4822 051 30103
4822 051 30103
4822 051 30103
5322 117 13052
3830
3831
3832
3833
3834
3835
3837
3838
3839
3840
3841
3842
3843
3844
3845
3846
3847
3848
3849
3850
3851
3852
3853
3854
4822 051 30472
4822 051 30103
4822 117 13632
4822 051 30222
4822 051 30222
4822 051 30103
4822 117 13632
4822 051 30472
4822 051 30103
4822 051 30101
4822 051 30101
4822 051 30684
4822 051 30103
4822 051 30102
4822 051 30472
4822 051 30102
4822 051 30332
4822 117 12925
4822 051 30103
4822 051 30472
4822 051 30103
4822 117 13632
4822 117 13632
5322 117 13018
3855
3856
3857
3858
3859
3860
3861
3862
3863
3864
3865
3866
3867
3868
3869
3870
4822 051 30472
4822 117 13632
4822 051 30222
4822 117 13632
4822 117 13632
4822 051 30682
4822 051 30103
4822 051 30223
4822 051 30101
4822 051 30101
4822 051 30101
4822 117 12925
4822 051 30101
4822 051 30103
4822 051 30332
4822 051 30101
100W 5% 0.062W
18k 5% 0.062W
100W 5% 0.062W
0W jumper
2k2 5% 0.062W
6k8 5% 0.062W
4k7 5% 0.062W
100W 5% 0.062W
100W 5% 0.062W
1k 5% 0.062W
4k7 5% 0.062W
4k7 5% 0.062W
100W 5% 0.062W
270W 5% 0.062W
3k3 5% 0.062W
100k 1% 0603 0.62W
680W 5% 0.062W
4k7 5% 0.062W
5k6 5% 0.063W 0603 RC21
RST SM
2k7 5% 0.062W
330W 5% 0.062W
5k6 5% 0.063W 0603 RC21
RST SM
5k6 5% 0.063W 0603 RC21
RST SM
10k 5% 0.062W
27k 5% 0.062W
6k8 5% 0.062W
2k2 5% 0.062W
2k2 5% 0.062W
2k7 1% 0.063W 0603
RC22H
33k 5% 0.062W
10k 5% 0.062W
100k 1% 0603 0.62W
4k7 5% 0.062W
220W 5% 0.062W
680k 5% 0.062W
1k0 1% 0.063W 0603
RC22H
100W 5% 0.062W
1k 5% 0.062W
100W 5% 0.062W
100W 5% 0.062W
4k7 5% 0.062W
10k 5% 0.062W
100k 1% 0603 0.62W
10k 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
2k7 1% 0.063W 0603
RC22H
4k7 5% 0.062W
10k 5% 0.062W
100k 1% 0603 0.62W
2k2 5% 0.062W
2k2 5% 0.062W
10k 5% 0.062W
100k 1% 0603 0.62W
4k7 5% 0.062W
10k 5% 0.062W
100W 5% 0.062W
100W 5% 0.062W
680k 5% 0.062W
10k 5% 0.062W
1k 5% 0.062W
4k7 5% 0.062W
1k 5% 0.062W
3k3 5% 0.062W
47k 1% 0.063W 0603
10k 5% 0.062W
4k7 5% 0.062W
10k 5% 0.062W
100k 1% 0603 0.62W
100k 1% 0603 0.62W
1k0 1% 0.063W 0603
RC22H
4k7 5% 0.062W
100k 1% 0603 0.62W
2k2 5% 0.062W
100k 1% 0603 0.62W
100k 1% 0603 0.62W
6k8 5% 0.062W
10k 5% 0.062W
22k 5% 0.062W
100W 5% 0.062W
100W 5% 0.062W
100W 5% 0.062W
47k 1% 0.063W 0603
100W 5% 0.062W
10k 5% 0.062W
3k3 5% 0.062W
100W 5% 0.062W
3872
3873
3874
3875
3876
3877
3878
3879
3880
3881
3882
3883
3885
3886
3887
3888
3889
3890
3892
3893
3896
3898
3899
3900
3901
3902
3903
3904
3905
3906
3907
3908
3909
3910
3911
3912
3913
3914
3915
3918
3919
3920
3925
3943
3944
3947
3948
3950
3951
3952
3953
3954
3955
3956
3957
3958
3959
4822 051 30103
4822 051 30103
4822 051 30123
4822 051 30102
4822 051 30331
4822 051 30101
4822 051 30101
4822 051 30103
4822 051 30103
4822 051 30103
4822 117 13632
4822 051 30331
4822 051 30222
4822 051 30479
4822 051 30474
4822 051 30223
4822 051 30102
4822 051 30101
4822 051 30103
4822 051 30103
4822 051 30103
4822 051 30103
4822 051 30103
4822 051 30103
4822 117 12925
4822 051 30472
4822 051 30102
4822 051 30102
4822 051 30102
4822 051 30333
4822 051 30101
4822 051 30101
4822 051 30101
4822 051 30102
4822 051 30472
4822 051 30103
4822 117 13632
4822 051 30101
4822 051 30101
4822 051 30103
4822 051 30103
4822 117 12891
4822 117 12139
4822 051 30103
4822 117 12891
4822 051 30103
4822 051 30008
4822 051 30472
4822 117 13632
4822 051 30223
4822 051 30153
4822 051 30472
4822 051 30472
4822 051 30222
4822 051 30222
4822 051 30472
3198 021 31060
3960
3198 021 31060
3961
3962
3963
3964
3965
3966
3967
4822 051 30333
4822 051 30333
4822 051 30333
4822 051 30333
4822 051 30333
4822 051 30333
2322 704 65608
3967
3968
4822 051 30109
2322 704 65608
3968
3969
4822 051 30109
2322 704 65608
3969
3970
3971
4822 051 30109
4822 117 12891
5322 117 13024
3972
3973
3975
3976
3976
3977
3978
4822 051 30471
4822 051 30102
4822 051 30563
4822 051 30393
4822 117 12864
4822 051 30223
2322 704 65608
3978
3979
3980
3981
3982
3983
3984
4822 051 30109
4822 051 30102
4822 051 30333
4822 051 30153
4822 051 30183
4822 051 30563
4822 051 30102
10k 5% 0.062W
10k 5% 0.062W
12k 5% 0.062W
1k 5% 0.062W
330W 5% 0.062W
100W 5% 0.062W
100W 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
100k 1% 0603 0.62W
330W 5% 0.062W
2k2 5% 0.062W
47W 5% 0.062W
470k 5% 0.062W
22k 5% 0.062W
1k 5% 0.062W
100W 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
47k 1% 0.063W 0603
4k7 5% 0.062W
1k 5% 0.062W
1k 5% 0.062W
1k 5% 0.062W
33k 5% 0.062W
100W 5% 0.062W
100W 5% 0.062W
100W 5% 0.062W
1k 5% 0.062W
4k7 5% 0.062W
10k 5% 0.062W
100k 1% 0603 0.62W
100W 5% 0.062W
100W 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
220k 1% ERJ3W
22W 5% 0.062W
10k 5% 0.062W
220k 1% ERJ3W
10k 5% 0.062W
0W jumper
4k7 5% 0.062W
100k 1% 0603 0.62W
22k 5% 0.062W
15k 5% 0.062W
4k7 5% 0.062W
4k7 5% 0.062W
2k2 5% 0.062W
2k2 5% 0.062W
4k7 5% 0.062W
RST SM 0603 10M
PM5COL R
RST SM 0603 10M
PM5COL R
33k 5% 0.062W
33k 5% 0.062W
33k 5% 0.062W
33k 5% 0.062W
33k 5% 0.062W
33k 5% 0.062W
RST SM 603 RC22H 5W6
PM1
10W 5% 0.062W
RST SM 603 RC22H 5W6
PM1
10W 5% 0.062W
RST SM 603 RC22H 5W6
PM1
10W 5% 0.062W
220k 1% ERJ3W
33k 1% 0.063W 0603
RC22H
470W 5% 0.062W
1k 5% 0.062W
56k 5% 0.062W
39k 5% 0.062W
82k 5% 0.6W
22k 5% 0.062W
RST SM 603 RC22H 5W6
PM1
10W 5% 0.062W
1k 5% 0.062W
33k 5% 0.062W
15k 5% 0.062W
18k 5% 0.062W
56k 5% 0.062W
1k 5% 0.062W
Spare Parts List DVDR1000 /0x1 /691
3985
3986
3987
3988
3989
3990
3991
3992
3993
3994
3995
3996
3997
4822 051 30562 5k6 5% 0.063W 0603 RC21
RST SM
4822 051 30103 10k 5% 0.062W
4822 051 30102 1k 5% 0.062W
4822 051 30273 27k 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 117 12925 47k 1% 0.063W 0603
4822 117 12925 47k 1% 0.063W 0603
4822 117 12925 47k 1% 0.063W 0603
4822 051 30101 100 W 5% 0.062W
4822 051 30101 100 W 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30109 10W 5% 0.062W
4822 051 30109 10W 5% 0.062W
5000
5001
5002
5003
5004
5009
5400
5430
5470
4822 157 11074
4822 157 11074
4822 157 11299
4822 157 11499
4822 157 11499
4822 157 11775
4822 157 11299
4822 157 11299
2422 536 00019
5600
5601
4822 157 11299
2422 535 94279
100 mH
100 mH
EL0305RA-100J
BLM11P600SPT
BLM11P600SPT
6.8mH 5% 5X3
EL0305RA-100J
EL0305RA-100J
TRANSFORMER 6RG
(SAGA) B
EL0305RA-100J
IND FXD EL0305 S 100U
PM5 A
EL0305RA-100J
100 mH
6.8mH 5% 5X3
IND VAR 7MM Y 77M8 B
IND VAR 7MM Y 77M8 B
EL0305RA-100J
6.8mH 5% 5X3
EL0305RA-150J
BLM11P600SPT
100 mH
BLM11P600SPT
BLM11P600SPT
EL0305RA-100J
100 mH
5602
5700
5701
5702
5703
5705
5706
5707
5901
5902
5903
5904
5990
5991
4822 157 11299
4822 157 11074
4822 157 11775
2422 549 44162
2422 549 44162
4822 157 11299
4822 157 11775
4822 157 11302
4822 157 11499
4822 157 11074
4822 157 11499
4822 157 11499
4822 157 11299
4822 157 11074
6000
6402
4822 130 83757 BAS216
9322 146 61685 DIO REG SM DF3A6.8FU
TOSJ
9322 146 61685 DIO REG SM DF3A6.8FU
TOSJ
9322 146 61685 DIO REG SM DF3A6.8FU
TOSJ
9322 146 61685 DIO REG SM DF3A6.8FU
TOSJ
9322 146 61685 DIO REG SM DF3A6.8FU
TOSJ
9322 146 61685 DIO REG SM DF3A6.8FU
TOSJ
9322 146 61685 DIO REG SM DF3A6.8FU
TOSJ
9322 146 61685 DIO REG SM DF3A6.8FU
TOSJ
9322 129 38685 DIO REG SM BZM55-C6V8
(TEG0)
9322 129 42685 DIO REG SM BZM55-C15
(TEG0) R
9322 129 38685 DIO REG SM BZM55-C6V8
(TEG0)
9322 129 38685 DIO REG SM BZM55-C6V8
(TEG0)
9322 129 38685 DIO REG SM BZM55-C6V8
(TEG0)
9322 129 38685 DIO REG SM BZM55-C6V8
(TEG0)
9322 146 61685 DIO REG SM DF3A6.8FU
TOSJ
4822 130 83757 BAS216
9322 129 42685 DIO REG SM BZM55-C15
(TEG0) R
9322 129 38685 DIO REG SM BZM55-C6V8
(TEG0)
9322 129 38685 DIO REG SM BZM55-C6V8
(TEG0)
9322 129 38685 DIO REG SM BZM55-C6V8
(TEG0)
9322 146 61685 DIO REG SM DF3A6.8FU
TOSJ
9322 129 38685 DIO REG SM BZM55-C6V8
(TEG0)
6403
6405
6430
6431
6432
6439
6440
6460
6461
6462
6463
6464
6465
6466
6468
6501
6502
6503
6504
6505
6506
6507
6508
6509
6600
6700
6701
6702
6703
6801
6802
6803
6805
6807
6970
6971
6972
9322 129 38685 DIO REG SM BZM55-C6V8
(TEG0)
9322 129 38685 DIO REG SM BZM55-C6V8
(TEG0)
9322 150 38685 DIO SIG SM
BAS385(VISH)R
4822 130 83757 BAS216
4822 130 11525 1SS356
4822 130 11525 1SS356
4822 130 11525 1SS356
4822 130 83757 BAS216
9322 150 38685 DIO SIG SM
BAS385(VISH)R
4822 130 83757 BAS216
4822 130 83757 BAS216
9322 150 38685 DIO SIG SM
BAS385(VISH)R
4822 130 83757 BAS216
4822 130 83757 BAS216
4822 130 83757 BAS216
4822 130 83757 BAS216
7000
7001
7002
7004
5322 130 42756
4822 209 17423
4822 209 62312
9352 615 37118
7321
9322 147 95668
7323
9322 147 95668
7324
7329
7330
7331
7332
7400
4822 130 61553
3198 010 42310
3198 010 42310
3198 010 42310
4822 209 33665
9322 143 92668
7401
9322 143 92668
7430
7431
7433
7460
7461
7462
7463
7464
7466
7470
7500
7501
7505
7506
7507
9965 000 04716
4822 130 42804
4822 130 42804
4822 130 42804
4822 130 42804
3198 010 42310
4822 130 42804
3198 010 42310
4822 130 42804
5322 209 11517
5322 130 42756
5322 130 42756
4822 130 42804
4822 130 42804
9322 135 58671
7508
7509
7510
7511
7512
7513
7514
7515
7516
7517
7600
3198 010 42310
3198 010 42310
3198 010 42310
4822 130 42804
3198 010 42310
3198 010 42310
5322 130 42756
4822 130 42804
3198 010 42310
5322 130 42756
9322 167 63668
7700
7701
7702
7703
4822 130 61553
4822 130 61553
4822 130 61553
9352 606 11118
7704
7705
7706
7707
7708
7709
7800
7801
7803
7804
7805
7806
7807
7809
7810
7811
7812
7813
5322 130 42756
5322 130 42755
5322 130 42756
3198 010 42310
4822 130 61553
3198 010 42310
9322 015 84668
3198 010 42310
4822 209 16884
5322 130 42756
3198 010 42310
5322 130 42756
4822 130 60854
3198 010 42310
4822 209 63604
4822 209 15139
5322 130 42756
3198 010 42310
BC857C
UAD1328T
MC33078D
IC SM UDA1360TS/N1
(PHSE) R
FET SIG SM 2SK2839
(TOSJ)
FET SIG SM 2SK2839
(TOSJ)
DTC124EU
BC847BW
BC847BW
BC847BW
L78M08CV
IC SM BA7652AF (RHM0)
R
IC SM BA7652AF (RHM0)
R
IC BA7660FS-E2
BC817-25
BC817-25
BC817-25
BC817-25
BC847BW
BC817-25
BC847BW
BC817-25
PC74HCU04T
BC857C
BC857C
BC817-25
BC817-25
IC SM STV6410AD (ST00)
Y
BC847BW
BC847BW
BC847BW
BC817-25
BC847BW
BC847BW
BC857C
BC817-25
BC847BW
BC857C
IC SM MSP3415G-QG-B8
(MIAS) R
DTC124EU
DTC124EU
DTC124EU
IC SM TDA9818T/
V1(PHSE) R
BC857C
BC847C
BC857C
BC847BW
DTC124EU
BC847BW
IC SM TL074CD (ST00) R
BC847BW
BC857C
BC847BW
BC857C
DTA124EU-W
BC847BW
BA7046F
PCF8593T
BC857C
BC847BW
7815
7816
7817
7900
7901
7902
4822 209 16954
3198 010 42310
3198 010 42310
4822 209 16778
4822 209 73852
9340 560 36235
7906
9322 152 30668
7907
9322 161 94668
7909
7950
7951
7952
7970
7971
7972
7974
7975
4822 130 61553
4822 209 60177
3198 010 42310
3198 010 42310
4822 209 63709
4822 130 44283
3198 010 42310
3198 010 42310
9340 560 36235
7990
4822 209 17505
10.
GB 311
ST24E16M6
BC847BW
BC847BW
TL7705ACD1013TRA
PMBT2369
FETSIG SM BSH111
(PHSE) R
ICSM M29F800AT70N1(ST00)
IC SM CY6212870SC(CYPR)R
DTC124EU
LM339D
BC847BW
BC847BW
LM324D
BC636
BC847BW
BC847BW
FETSIG SM BSH111
(PHSE) R
STV5348D
DIVIO PWB
Various
1101
1102
1200
1500
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187
2188
2189
2190
2200
2201
2202
2203
2204
2205
2206
2207
2300
2422 025 17106 CON BM H 4P F 0.8 IEEE R
2422 543 01115 RES XTL SM 24M576 12P
CX-11F R
2422 543 01159 RES XTL SM 11M0592 20P
DSX840
2422 025 17084 CON BM V 60P F 0.80
179161 R
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
3198 017 41050
3198 017 41050
3198 017 41050
2020 557 90731
2020 557 90731
4822 126 14506
2020 557 90731
2020 557 90731
2020 557 90731
2020 557 90731
2020 557 90731
2020 557 90731
4822 126 11663
4822 126 11663
4822 126 14305
4822 124 23002
4822 126 14305
4822 124 23002
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
2020 557 90732
4822 124 12095
4822 124 23002
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
2020 557 90732
2020 557 90732
2020 557 90719
4822 126 11663
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 11663
4822 122 31765
4822 126 14305
4822 126 14305
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
0603 10V 1mF COL R
0603 10V 1mF COL R
0603 10V 1mF COL R
250V 1nF PM10 R
250V 1nF PM10 R
270pF 5% 50V 0603
250V 1nF PM10 R
250V 1nF PM10 R
250V 1nF PM10 R
250V 1nF PM10 R
250V 1nF PM10 R
250V 1nF PM10 R
12pF
12pF
100nF 10% 16V 0603
10mF 16V
100nF 10% 16V 0603
10mF 16V
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
250V 4N7 PM10 R
100mF 20% 16V
10mF 16V
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
250V 4N7 PM10 R
250V 4N7 PM10 R
1206 B 250V 47nF PM10 R
12pF
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
12pF
100pF 2% 63V
100nF 10% 16V 0603
100nF 10% 16V 0603
GB 312
2301
2302
2303
2304
2305
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412
2413
2414
2415
2416
2417
2418
2419
2420
2421
2500
2501
2502
2503
2504
2505
2506
2507
2508
2509
2510
2511
2512
2514
2515
2516
2517
2518
2519
2520
3100
3101
3102
3104
3105
3106
3107
3108
3109
3110
3111
3112
3113
3114
3115
3116
10.
4822 126 14305
4822 124 80151
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 124 80151
4822 126 14305
4822 124 80151
4822 126 14305
4822 126 14305
4822 126 14305
4822 124 80151
4822 124 80151
4822 124 80151
4822 124 80151
5322 126 11583
5322 126 11583
4822 124 80151
4822 126 14305
4822 126 14305
4822 051 30103
4822 051 30103
4822 051 30103
4822 051 30103
4822 051 30332
4822 051 30393
4822 051 30393
4822 051 30393
4822 051 30103
4822 051 30103
4822 051 30222
4822 051 30391
4822 051 30103
4822 051 20105
4822 051 30102
4822 051 30479
DVDR1000 /0x1 /691
100nF 10% 16V 0603
47mF 16V
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
47mF 16V
100nF 10% 16V 0603
47mF 16V
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
47mF 16V
47mF 16V
47mF 16V
47mF 16V
10nF 10% 50V 0603
10nF 10% 50V 0603
47mF 16V
100nF 10% 16V 0603
100nF 10% 16V 0603
10k 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
3k3 5% 0.062W
39k 5% 0.062W
39k 5% 0.062W
39k 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
2k2 5% 0.062W
390W 5% 0.062W
10k 5% 0.062W
1M 5% 0.1W
1k 5% 0.062W
47W 5% 0.062W
3148
3152
3153
3154
3155
3163
3164
3165
3166
3168
3169
3170
3171
3172
3173
3174
3175
3176
3177
3178
3179
3180
3181
3182
3183
3184
3185
3186
3187
3188
3189
3190
3191
3191
3192
3193
3194
3195
3197
3198
3199
3201
3214
3216
3224
3300
3301
3303
3304
3305
3306
3307
3312
3313
3314
3315
3316
3317
3318
3319
3320
3321
3322
3325
3327
3328
3400
3401
3402
3403
3404
3405
3502
3504
3505
3506
3518
3519
3520
3521
3522
3523
3524
3525
Spare Parts List
2322 704 66342 RST SM 0603 RC22H 6k34
PM1 R
4822 051 30332 3k3 5% 0.062W
4822 051 30393 39k 5% 0.062W
4822 051 30393 39k 5% 0.062W
4822 051 30393 39k 5% 0.062W
4822 051 30391 390W 5% 0.062W
2322 734 65609 RST SM 0805 RC12H 56W
PM1 R
2322 734 65609 RST SM 0805 RC12H 56W
PM1 R
4822 051 30222 2k2 5% 0.062W
4822 051 30393 39k 5% 0.062W
4822 051 30393 39k 5% 0.062W
4822 051 30393 39k 5% 0.062W
4822 051 30109 10W 5% 0.062W
4822 051 30109 10W 5% 0.062W
2322 734 65609 RST SM 0805 RC12H 56W
PM1 R
4822 051 30109 10W 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30109 10W 5% 0.062W
2322 704 65102 RST SM 0603 RC22H 5k1
PM1
2322 734 65609 RST SM 0805 RC12H 56W
PM1 R
4822 051 30103 10k 5% 0.062W
2322 704 65102 RST SM 0603 RC22H 5k1
PM1
4822 051 30103 10k 5% 0.062W
2322 704 65102 RST SM 0603 RC22H 5k1
PM1
4822 051 30103 10k 5% 0.062W
2322 704 65102 RST SM 0603 RC22H 5k1
PM1
4822 051 30103 10k 5% 0.062W
4822 051 30103 10k 5% 0.062W
2322 704 65102 RST SM 0603 RC22H 5k1
PM1
4822 051 30109 10W 5% 0.062W
4822 051 30109 10W 5% 0.062W
4822 051 30109 10W 5% 0.062W
4822 051 30109 10W 5% 0.062W
4822 051 30479 47W 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30393 39k 5% 0.062W
4822 051 30393 39k 5% 0.062W
4822 051 30393 39k 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30479 47W 5% 0.062W
4822 051 30102 1k 5% 0.062W
4822 051 30102 1k 5% 0.062W
4822 051 30331 330W 5% 0.062W
4822 051 30109 10W 5% 0.062W
4822 051 30102 1k 5% 0.062W
4822 051 30102 1k 5% 0.062W
4822 051 30102 1k 5% 0.062W
4822 051 30102 1k 5% 0.062W
4822 051 30102 1k 5% 0.062W
4822 051 30102 1k 5% 0.062W
4822 051 30109 10W 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30339 33W 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30339 33W 5% 0.062W
4822 051 30339 33W 5% 0.062W
4822 051 30339 33W 5% 0.062W
4822 051 30479 47W 5% 0.062W
4822 051 30479 47W 5% 0.062W
4822 051 30479 47W 5% 0.062W
4822 051 30479 47W 5% 0.062W
4822 051 30479 47W 5% 0.062W
4822 051 30479 47W 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 117 13573 NETW 4 X 47W 5% MNR14
4822 117 13573 NETW 4 X 47W 5% MNR14
4822 051 30479 47W 5% 0.062W
4822 051 30479 47W 5% 0.062W
4822 051 30479 47W 5% 0.062W
4822 051 30339 33W 5% 0.062W
4822 117 13576 NETW 4 X 33W 5% 1206
4822 117 13576 NETW 4 X 33W 5% 1206
4822 117 13576 NETW 4 X 33W 5% 1206
4822 051 30101 100W 5% 0.062W
4822 051 30101 100W 5% 0.062W
4822 117 12891 220k 1% ERJ3W
4822 117 12891 220k 1% ERJ3W
4822 051 30103 10k 5% 0.062W
4822 051 30102 1k 5% 0.062W
4822 051 30109 10W 5% 0.062W
4822 051 30339 33W 5% 0.062W
5103
5106
5108
5109
5110
5200
5201
5300
5301
5302
5303
5304
5402
5403
5404
5500
5501
5502
5503
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
6300
4822 209 17398 LD1117DT33
7100
9322 138 58688 OPT CP SM TLP627-LF1
(TOSJ) R
9352 636 86551 IC SM PDI1394P11ABD
(PHSE) Y
9352 633 73551 IC SM PDI1394L21BE
(PHSE) Y
9322 138 58688 OPT CP SM TLP627-LF1
(TOSJ) R
2722 012 00475 MOD SM HFP143YL05031
(MURA) Y
9351 869 80118
4822 209 91023 UM62256EM-70LL
9340 310 30215 PDTC144ET (
9352 654 41118 IC SM P89C51RD2HBA/00
(PHSE) R
5322 130 60803 BST72A
9340 310 30215 PDTC144ET (
9352 456 40115 IC SM 74HCT1G04GW
(PHSE) R
3104 123 96431 IC OTP EPC1441 ASSY
9322 166 64668 IC SM CY7C1019BV3310VC(CYPR)R
9322 166 64668 IC SM CY7C1019BV3310VC(CYPR)R
9322 150 51671 IC SM EPF6024AQC208-3
(ALT0) Y
2422 543 89006 OSC XTL SM 27MHZ 15P
FX0-35F R
9322 166 64668 IC SM CY7C1019BV3310VC(CYPR)R
9322 166 64668 IC SM CY7C1019BV3310VC(CYPR)R
3104 123 96402 IC FLASH CY2071 AUDIO
ASSY
3104 123 96511 IC FLASH CY2071 VIDEO
ASSY
4822 209 17375 GM71V18163CJ-6
4822 209 17375 GM71V18163CJ-6
9322 169 98671 IC SM NW701 TQFP160
(DIIN) Y
9352 424 20118 IC SM 74LVC04APW
(PHSE) R
9352 351 50118 IC SM 74LVC16244ADGG
(PHSE) R
9352 668 39118 IC SM UDA1334ATS/N2
(PHSE) R
7101
7103
7105
7106
7200
7201
7202
7203
7204
7207
7208
7300
7301
7302
7303
7304
7305
7306
7307
7308
7402
7403
7404
7500
7505
7506
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
SERVO PWB
Various
1100
1100
1201
1300
1302
1303
2422 025 16143 CON BM H 45P F 0.5
54132 R
2422 025 17425 CON BM H45P F 0.5
54132R
2422 540 98428 RES CER SM 8M467
CSTCC8.46MHz R
4822 267 51454 CONN. 11P FEMALE
2422 025 16158 CON BM H 8P F 1.00 FFC
0.3 R
2422 025 17427 CON BM H 4P F 1.00 FFC
0.3 R
Spare Parts List DVDR1000 /0x1 /691
1401
1402
2422 540 98428 RES CER SM 8M467
CSTCC8.46MHz R
2422 025 17276 CON BM H 30P F 1.00 FFC
SMT R
2002
2003
2004
2005
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2100
2102
2104
2105
2106
2110
2111
2116
2121
2122
2125
2200
2202
2203
2207
2208
2209
2210
2211
2212
2214
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228
2232
2233
2234
2235
2236
2237
2238
2300
2301
2302
2303
5322 126 11583
4822 124 23002
5322 126 11583
4822 124 23002
5322 126 11583
4822 124 23002
5322 126 11583
4822 124 23002
5322 126 11583
4822 124 23002
4822 124 12084
4822 126 14305
4822 124 23002
5322 126 11583
4822 126 14305
4822 124 23002
4822 126 14305
4822 126 14305
4822 126 14305
5322 126 11583
5322 126 11583
4822 122 33735
4822 126 14305
4822 126 14305
4822 126 14305
5322 126 11579
5322 126 11582
5322 126 11583
4822 126 14305
4822 126 14305
4822 124 23002
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
5322 126 11583
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 122 33753
4822 122 33753
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
5322 126 11583
4822 124 23002
3198 017 34730
3198 030 74780
2304
2305
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329
2331
2332
5322 126 11583
4822 124 23002
3198 016 31020
3198 016 31020
4822 126 14494
2238 786 11554
4822 126 14305
3198 016 31020
4822 126 14305
4822 126 14305
5322 126 11583
3198 016 31020
4822 126 14305
3198 016 31020
3198 016 31020
4822 126 14305
4822 126 14494
5322 124 41945
4822 126 14305
3198 017 31530
4822 126 14305
3198 017 31530
4822 126 14305
4822 126 14305
4822 126 14305
10nF 10% 50V 0603
10mF 16V
10nF 10% 50V 0603
10mF 16V
10nF 10% 50V 0603
10mF 16V
10nF 10% 50V 0603
10mF 16V
10nF 10% 50V 0603
10mF 16V
1mF 20% SM 50V
100nF 10% 16V 0603
10mF 16V
10nF 10% 50V 0603
100nF 10% 16V 0603
10mF 16V
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
10nF 10% 50V 0603
10nF 10% 50V 0603
27nF 10% 63V
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
3.3nF 10% 63V
6.8nF 10% 63V
10nF 10% 50V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
10mF 16V
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
10nF 10% 50V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
150pF 5% 50V
150pF 5% 50V
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
10nF 10% 50V 0603
10mF 16V
0603 16V 47nF COL
EL SM 35V 4U7 PM20 COL
R
10nF 10% 50V 0603
10mF 16V
0603 25V 1nF
0603 25V 1nF
22nF 10% 25V 0603
0603 16V 2N2 PM5 R
100nF 10% 16V 0603
0603 25V 1nF
100nF 10% 16V 0603
100nF 10% 16V 0603
10nF 10% 50V 0603
0603 25V 1nF
100nF 10% 16V 0603
0603 25V 1nF
0603 25V 1nF
100nF 10% 16V 0603
22nF 10% 25V 0603
22mF 20% 35V
100nF 10% 16V 0603
0603 50V 15nF COL R
100nF 10% 16V 0603
0603 50V 15nF COL R
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
2333
2334
2335
2336
2337
2338
2339
2400
2401
2402
2403
2404
2405
2406
2407
2409
2410
2411
5322 124 41945
4822 126 14305
2238 786 11554
3198 017 34730
3198 017 34730
2238 786 11554
4822 124 23002
4822 124 23002
5322 126 11583
4822 126 14305
4822 126 14305
4822 126 14494
4822 126 14494
4822 126 14305
4822 126 14305
4822 126 14305
4822 122 33777
3198 030 74780
2412
2413
4822 126 14494
3198 030 74780
2414
2421
2422
2423
2424
2425
2426
2427
2428
2429
2430
2431
2432
2434
2435
2436
2437
2438
2439
2440
2441
2446
4822 126 14238
4822 122 33761
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 122 33741
4822 122 33761
4822 122 33761
4822 122 33761
4822 122 33761
4822 122 33761
4822 122 33761
4822 122 33761
5322 126 11583
3005
3006
3100
3103
3105
3107
3108
3114
3115
3121
3122
3129
3130
3200
3201
3204
3205
3210
3214
3216
3217
3221
3222
3224
3225
3226
3227
3231
3235
3236
3237
3238
3241
3244
3245
3246
3249
3250
3251
3252
3253
3254
3255
22mF 20% 35V
100nF 10% 16V 0603
0603 16V 2N2 PM5 R
0603 16V 47nF COL
0603 16V 47nF COL
0603 16V 2N2 PM5 R
10mF 16V
10mF 16V
10nF 10% 50V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
22nF 10% 25V 0603
22nF 10% 25V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
47pF 5% 63V
EL SM 35V 4U7 PM20 COL
R
22nF 10% 25V 0603
EL SM 35V 4U7 PM20 COL
R
0603 50V 2N2 COL R
22pF 5% 50V
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
10pF 10% 50V
22pF 5% 50V
22pF 5% 50V
22pF 5% 50V
22pF 5% 50V
22pF 5% 50V
22pF 5% 50V
22pF 5% 50V
10nF 10% 50V 0603
4822 051 30121 120W 5% 0.062W
2322 704 64309 RST SM 0603 RC22H 43W
PM1
4822 051 30103 10k 5% 0.062W
5322 117 13029 47k 1% 0.063W 0603
RC22H
4822 051 30681 680W 5% 0.062W
4822 051 30101 100W 5% 0.062W
4822 051 30101 100W 5% 0.062W
4822 051 30101 100W 5% 0.062W
4822 051 30101 100W 5% 0.062W
4822 051 30681 680W 5% 0.062W
4822 051 30152 1k5 5% 0.062W
4822 051 30154 150k 5% 0.062W
4822 051 30101 100W 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 117 12917 1W 5% 0.062W CASE0603
4822 051 30103 10k 5% 0.062W
4822 117 13573 NETW 4 X 47W 5% MNR14
4822 051 30103 10k 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30472 4k7 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30105 1M 5% 0.062W
4822 051 30331 330W 5% 0.062W
4822 117 13573 NETW 4 X 47W 5% MNR14
4822 117 13525 24k 1% 0.62W RC22H
0603
4822 117 13573 NETW 4 X 47W 5% MNR14
4822 051 30103 10k 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30223 22k 5% 0.062W
4822 051 30222 2k2 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30472 4k7 5% 0.062W
4822 051 30479 47W 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30479 47W 5% 0.062W
4822 051 30222 2k2 5% 0.062W
4822 051 30222 2k2 5% 0.062W
4822 051 30273 27k 5% 0.062W
4822 051 30273 27k 5% 0.062W
4822 051 30273 27k 5% 0.062W
3256
3257
3258
3259
3260
3261
3262
3264
3265
3266
3267
3268
3269
3270
3271
3272
3274
3275
3276
3300
3302
3303
3304
3305
3307
4822 051 30273
4822 051 30273
4822 051 30273
4822 117 13573
4822 117 13573
4822 051 30103
4822 117 11817
4822 117 13632
4822 117 13632
4822 051 30103
4822 051 30103
4822 051 30103
4822 051 30102
4822 051 30102
4822 051 30102
4822 051 30103
4822 051 30103
4822 051 30103
4822 051 30103
4822 051 30272
4822 051 30272
4822 051 30102
4822 051 30102
4822 117 13608
5322 117 13068
3308
3309
3310
3311
3312
3314
3315
3316
3317
3318
3319
3320
3321
3323
3324
4822 051 20108
4822 051 20108
4822 117 12917
4822 117 12917
4822 117 12917
4822 051 20108
4822 051 20108
4822 051 20228
4822 051 20228
4822 051 20228
4822 051 20228
4822 051 30332
4822 051 30563
4822 051 30222
5322 117 13049
3325
5322 117 13049
3326
5322 117 13049
3327
3328
4822 051 30103
5322 117 13049
3329
3330
3331
3332
4822 117 13632
4822 051 30332
4822 051 30103
2322 704 62003
3335
5322 117 13068
3336
3337
3338
3339
3340
3341
3342
3343
3344
3345
3346
4822 117 12864
4822 051 30273
4822 051 30103
4822 117 12864
4822 051 30332
4822 051 30102
4822 051 30273
4822 051 30103
4822 051 30332
4822 051 30102
5322 117 13049
3347
5322 117 13049
3348
3351
3352
3353
3354
3355
3356
3357
3358
3359
4822 117 13632
4822 051 30472
4822 051 30153
4822 051 30123
4822 117 11817
4822 051 30332
4822 051 30472
4822 117 13632
4822 051 30102
2322 704 62002
3361
3362
3364
3365
3366
3368
3370
3400
3401
4822 051 30563
4822 051 30103
4822 051 30272
4822 051 30272
4822 051 30471
4822 051 30471
4822 051 30103
4822 117 11817
2350 035 10152
3407
4822 117 13525
3408
4822 051 30103
10.
GB 313
27k 5% 0.062W
27k 5% 0.062W
27k 5% 0.062W
NETW 4 X 47W 5% MNR14
NETW 4 X 47W 5% MNR14
10k 5% 0.062W
1k2 1% 1/16W
100k 1% 0603 0.62W
100k 1% 0603 0.62W
10k 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
1k 5% 0.062W
1k 5% 0.062W
1k 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
2k7 5% 0.062W
2k7 5% 0.062W
1k 5% 0.062W
1k 5% 0.062W
4.7W 5% 0603 0.0016W
82W 1% 0.063W 0603
RC22H
1W 5% 0.1W
1W 5% 0.1W
1W 5% 0.062W CASE0603
1W 5% 0.062W CASE0603
1W 5% 0.062W CASE0603
1W 5% 0.1W
1W 5% 0.1W
2W2 5% 0.1W
2W2 5% 0.1W
2W2 5% 0.1W
2W2 5% 0.1W
3k3 5% 0.062W
56k 5% 0.062W
2k2 5% 0.062W
470W 1% 0.063W 0603
RC22H
470W 1% 0.063W 0603
RC22H
470W 1% 0.063W 0603
RC22H
10k 5% 0.062W
470W 1% 0.063W 0603
RC22H
100k 1% 0603 0.62W
3k3 5% 0.062W
10k 5% 0.062W
RST SM 0603 RC22H 20k
PM1 R
82W 1% 0.063W 0603
RC22H
82k 5% 0.6W
27k 5% 0.062W
10k 5% 0.062W
82k 5% 0.6W
3k3 5% 0.062W
1k 5% 0.062W
27k 5% 0.062W
10k 5% 0.062W
3k3 5% 0.062W
1k 5% 0.062W
470W 1% 0.063W 0603
RC22H
470W 1% 0.063W 0603
RC22H
100k 1% 0603 0.62W
4k7 5% 0.062W
15k 5% 0.062W
12k 5% 0.062W
1k2 1% 1/16W
3k3 5% 0.062W
4k7 5% 0.062W
100k 1% 0603 0.62W
1k 5% 0.062W
RST SM 0603 RC22H 2k
PM1 R
56k 5% 0.062W
10k 5% 0.062W
2k7 5% 0.062W
2k7 5% 0.062W
470W 5% 0.062W
470W 5% 0.062W
10k 5% 0.062W
1k2 1% 1/16W
RST NETW SM ARV24
4X1k5 PM5 R
24k 1% 0.62W RC22H
0603
10k 5% 0.062W
GB 314
3409
3410
3411
3415
3416
3417
3418
3419
3420
3430
3431
3439
3440
3448
3449
3450
3451
3461
3463
3468
3469
10.
DVDR1000 /0x1 /691
4822 051 30183 18k 5% 0.062W
2350 035 10152 RST NETW SM ARV24
4X1k5 PM5 R
4822 117 12139 22W 5% 0.062W
4822 051 30101 100W 5% 0.062W
4822 051 30105 1M 5% 0.062W
4822 051 30331 330W 5% 0.062W
4822 117 13578 4X10k 5% MNR14
4822 117 13573 NETW 4 X 47W 5% MNR14
2350 035 91001 RST NETW SM ARV24 4X
jumper R
4822 117 13578 4X10k 5% MNR14
4822 117 13573 NETW 4 X 47W 5% MNR14
4822 051 30109 10W 5% 0.062W
4822 051 30109 10W 5% 0.062W
2350 035 91001 RST NETW SM ARV24 4X
jumper R
4822 117 13573 NETW 4 X 47W 5% MNR14
4822 117 13573 NETW 4 X 47W 5% MNR14
4822 117 11817 1k2 1% 1/16W
4822 051 30102 1k 5% 0.062W
4822 051 30101 100W 5% 0.062W
4822 051 30101 100W 5% 0.062W
4822 051 30101 100W 5% 0.062W
4822 157 11074
4822 157 11074
4822 157 11074
4822 157 11074
2422 549 43769
5202
2422 549 43769
5203
2422 549 43769
5300
2422 549 43769
5301
2422 549 43769
5302
2422 549 43769
5400
5401
5402
4822 157 11074
4822 157 11074
2422 549 43769
100mH
100mH
100mH
100mH
IND FXD SM EMI 100mH z
30R R
IND FXD SM EMI 100mH z
30R R
IND FXD SM EMI 100mH z
30R R
IND FXD SM EMI 100mH z
30R R
IND FXD SM EMI 100mH z
30R R
IND FXD SM EMI 100mH z
30R R
100mH
100mH
IND FXD SM EMI 100mH z
30R R
6301
4822 130 11397 BAS316
7000
9322 150 89668 IC SM LM337D2T (ONSE)
R
9322 121 67668 IC SM LF33CD (ST00) R
9352 688 06157 IC SM TZA1031HL (PHSE)
Y
4822 130 60373 BC856B
9322 155 26685 IC SM ADM810SART
(ANA0) Y
3104 123 96450 IC FLASH BASIC ENGINE
DVD+RW
9352 687 34557 IC SM SAA7830HL (PHSE)
Y
9322 036 99685 CY7C1399-15ZC
4822 130 60373 BC856B
3104 123 96541 IC EPLD BASIC ENGINE
9322 139 85668 BA6665FM
4822 209 17229 BA5938FM
4822 209 30095 LM833D
9322 166 66668 IC SM BA5944FP (RHM0)
R
9340 547 21215 FET POW SM BSH205
(PHSE) R
4822 130 60511 BC847B
4822 130 60511 BC847B
4822 130 60511 BC847B
9322 144 97668 IC SM LD1117DT (ST00) R
5322 209 30676 TDA8703T/C4
9322 171 97671 IC SM UPD65943GC-081
(NEC0) Y
9352 687 36557 IC SM SAA7831HL (PHSE)
Y
7001
7101
7200
7201
7202
7203
7204
7205
7206
7301
7302
7304
7306
7308
7309
7310
7311
7312
7400
7401
7402
ACCESSORIES
Various
0318
0320
0321
0322
0322
0323
0324
0370
3104 207 10652 IRT PROD ASSY
RC2050/01 PACKED
4822 321 22611 AUDIO CORD GOLD
PLATED
3104 128 92490 VIDEO CORD SET GOLD
PLATED
2422 070 98133 MAINSCORD EUR
4622 001 60590 MAINSCORD UK
4822 321 61847 SCART CABLE
3111 170 21592 CORDON ANT. L.1,50M
4822 321 61849 S-VIDEO CORD
DIGITAL PWB
Various
1100
1101
5100
5102
5104
5200
5201
Spare Parts List
1200
1501
1600
1601
1602
2422 025 17018 CON BM V 15P F 1.00 FFC
0.3 R
2422 025 17018 CON BM V 15P F 1.00 FFC
0.3 R
2422 025 16957 CON BM V 24P F 1.00 FFC
0.3 R
2422 025 16939 CON BM V 60P F 0.80
84616 R
2422 025 16729 CON BM V 10P F 1.00 FFC
0.3 R
2422 025 16389 CON BM V 22P F 1.00 FFC
0.3 R
2422 025 16389 CON BM V 22P F 1.00 FFC
0.3 R
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
3198 030 74780
2120
2121
2122
2123
2124
2125
2126
2127
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
3198 030 74780
2128
2129
2202
2203
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
4822 126 14494
4822 126 14305
4822 126 14305
4822 124 12095
4822 124 23002
4822 126 14305
5322 126 11579
4822 126 14241
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
EL SM 35V 4U7 PM20 COL
R
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
EL SM 35V 4U7 PM20 COL
R
22nF 10% 25V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100mF 20% 16V
10mF 16V
100nF 10% 16V 0603
3.3nF 10% 63V
0603 50V 330P COL R
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
2226
2227
2228
2229
4822 126 14305
4822 126 14305
4822 126 14305
3198 030 74780
2230
2231
4822 126 14305
3198 030 74780
2241
2300
2301
2302
2303
2304
2305
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412
3198 016 31020
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 124 12095
4822 124 12095
4822 124 12095
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
3198 030 82280
2413
2414
2415
2416
2417
2418
2419
2420
2421
2422
2423
2424
2425
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
3198 030 74780
2426
3198 030 82280
2550
2551
2552
2553
2554
2555
2556
2557
2558
2559
2560
2561
2562
2563
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 122 33761
4822 122 33761
4822 126 14305
4822 126 14305
3198 030 74780
2564
2565
4822 126 14305
3198 030 74780
2566
2567
4822 126 14305
3198 030 74780
2568
2569
4822 126 14305
3198 030 74780
2570
2571
2572
2573
2574
2575
2576
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
EL SM 35V 4U7 PM20 COL
R
100nF 10% 16V 0603
EL SM 35V 4U7 PM20 COL
R
0603 25V 1nF
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100mF 20% 16V
100mF 20% 16V
100mF 20% 16V
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
EL SM 50V 2U2 PM20 COL
R
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
EL SM 35V 4U7 PM20 COL
R
EL SM 50V 2U2 PM20 COL
R
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
22pF 5% 50V
22pF 5% 50V
100nF 10% 16V 0603
100nF 10% 16V 0603
EL SM 35V 4U7 PM20 COL
R
100nF 10% 16V 0603
EL SM 35V 4U7 PM20 COL
R
100nF 10% 16V 0603
EL SM 35V 4U7 PM20 COL
R
100nF 10% 16V 0603
EL SM 35V 4U7 PM20 COL
R
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
Spare Parts List DVDR1000 /0x1 /691
2577
2578
2579
2580
4822 126 14305
4822 126 14305
4822 126 14305
3198 030 74780
2581
2582
2583
2584
2585
2586
2587
2588
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
3198 030 74780
2589
2590
2591
2592
2593
2594
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
3198 030 74780
2595
2596
4822 126 14305
3198 030 74780
2600
2601
2602
2603
2605
2606
2607
2608
2609
2610
2611
2612
2613
2614
2615
2616
2617
2618
2619
2620
2621
2622
2625
2626
2627
2628
2629
2630
4822 126 14305
4822 122 33777
4822 122 33777
4822 126 14305
4822 126 14305
4822 122 33777
4822 122 33777
4822 126 14305
4822 126 14305
4822 126 14305
4822 122 33777
4822 122 33777
4822 126 14305
4822 126 14305
4822 126 14305
4822 122 33777
4822 122 33777
4822 126 14305
4822 126 14305
4822 126 14305
4822 122 33777
4822 122 33777
4822 126 14305
4822 122 33777
4822 122 33777
4822 126 14305
4822 126 14305
3198 030 74780
2633
2634
4822 126 14305
3198 030 74780
2637
2642
2643
2644
2645
2646
2647
2648
2700
2701
2702
2703
2704
4822 126 14305
4822 122 33761
4822 122 33761
4822 122 33761
4822 126 14305
4822 126 14494
4822 126 14247
4822 126 14247
5322 126 11583
3198 017 44740
4822 126 14305
4822 126 14305
3198 030 74780
2705
2706
2707
2708
2709
2710
2711
2712
2713
2800
2801
2802
2803
4822 124 12084
4822 126 14305
4822 124 12084
4822 126 14305
4822 124 12084
4822 126 14305
4822 124 12084
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
3198 030 74780
2804
2805
4822 126 14305
3198 030 74780
2806
2807
4822 126 14305
3198 030 74780
2808
2809
2813
4822 126 14305
4822 126 14305
3198 030 74780
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
EL SM 35V 4U7 PM20 COL
R
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
EL SM 35V 4U7 PM20 COL
R
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
EL SM 35V 4U7 PM20 COL
R
100nF 10% 16V 0603
EL SM 35V 4U7 PM20 COL
R
100nF 10% 16V 0603
47pF 5% 63V
47pF 5% 63V
100nF 10% 16V 0603
100nF 10% 16V 0603
47pF 5% 63V
47pF 5% 63V
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
47pF 5% 63V
47pF 5% 63V
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
47pF 5% 63V
47pF 5% 63V
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
47pF 5% 63V
47pF 5% 63V
100nF 10% 16V 0603
47pF 5% 63V
47pF 5% 63V
100nF 10% 16V 0603
100nF 10% 16V 0603
EL SM 35V 4U7 PM20 COL
R
100nF 10% 16V 0603
EL SM 35V 4U7 PM20 COL
R
100nF 10% 16V 0603
22pF 5% 50V
22pF 5% 50V
22pF 5% 50V
100nF 10% 16V 0603
22nF 10% 25V 0603
0603 50V 1N5 COL R
0603 50V 1N5 COL R
10nF 10% 50V 0603
0603 10V 470nF COL
100nF 10% 16V 0603
100nF 10% 16V 0603
EL SM 35V 4U7 PM20 COL
R
1mF 20% SM 50V
100nF 10% 16V 0603
1mF 20% SM 50V
100nF 10% 16V 0603
1mF 20% SM 50V
100nF 10% 16V 0603
1mF 20% SM 50V
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
EL SM 35V 4U7 PM20 COL
R
100nF 10% 16V 0603
EL SM 35V 4U7 PM20 COL
R
100nF 10% 16V 0603
EL SM 35V 4U7 PM20 COL
R
100nF 10% 16V 0603
100nF 10% 16V 0603
EL SM 35V 4U7 PM20 COL
R
2814
2818
2819
2821
4822 126 14305
5322 124 41945
4822 126 13956
3198 030 82280
2900
2901
2902
2903
2904
2912
2914
2916
2917
2918
2919
2920
2921
2922
2923
2924
2925
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 122 33741
4822 122 33741
4822 122 33741
4822 122 33741
4822 122 33741
4822 122 33741
4822 122 33761
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
4822 126 14305
3100
3101
3102
3104
3105
3106
3107
3108
3109
3110
3111
3112
3113
3114
3115
3116
3117
3119
3120
3121
3122
3123
3124
3125
3126
3200
3201
4822 051 30103
4822 051 30222
4822 051 30472
4822 051 30109
4822 051 30109
4822 051 30109
4822 051 30109
4822 051 30109
4822 051 30109
4822 051 30109
4822 051 30472
4822 051 30472
4822 051 30472
4822 051 30472
4822 051 30103
4822 051 30103
4822 051 30222
4822 051 30479
4822 051 30479
4822 117 13576
4822 117 13576
4822 117 12917
4822 117 12917
4822 117 12917
4822 117 12917
4822 051 30332
5322 117 13068
3205
3206
3207
3208
4822 051 30101
4822 051 30101
4822 051 30103
5322 117 13068
3209
3210
3211
3212
4822 117 13578
4822 117 12917
4822 051 30222
3198 031 11010
3213
3198 031 11010
3214
3215
3216
3217
3218
3221
3236
3237
3238
3240
3241
3242
3243
3250
3251
3252
3253
3254
3263
3264
3266
3267
3269
4822 051 30101
4822 051 30101
4822 051 30109
4822 051 30101
4822 051 30101
4822 117 12139
4822 051 30152
4822 051 30152
4822 051 30332
4822 051 30332
4822 051 30103
4822 051 30103
4822 051 30103
4822 051 30103
4822 051 30332
4822 051 30103
4822 051 30332
4822 051 30103
4822 051 30103
4822 051 30103
4822 051 30221
4822 051 30103
4822 117 12706
3270
5322 117 13033
3272
5322 117 13047
100nF 10% 16V 0603
22mF 20% 35V
68pF 5% 63V CASE 0603
EL SM 50V 2U2 PM20 COL
R
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
10pF 10% 50V
10pF 10% 50V
10pF 10% 50V
10pF 10% 50V
10pF 10% 50V
10pF 10% 50V
22pF 5% 50V
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
100nF 10% 16V 0603
10k 5% 0.062W
2k2 5% 0.062W
4k7 5% 0.062W
10W 5% 0.062W
10W 5% 0.062W
10W 5% 0.062W
10W 5% 0.062W
10W 5% 0.062W
10W 5% 0.062W
10W 5% 0.062W
4k7 5% 0.062W
4k7 5% 0.062W
4k7 5% 0.062W
4k7 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
2k2 5% 0.062W
47W 5% 0.062W
47W 5% 0.062W
NETW 4 X 33W 5% 1206
NETW 4 X 33W 5% 1206
1W 5% 0.062W CASE0603
1W 5% 0.062W CASE0603
1W 5% 0.062W CASE0603
1W 5% 0.062W CASE0603
3k3 5% 0.062W
82W 1% 0.063W 0603
RC22H
100W 5% 0.062W
100W 5% 0.062W
10k 5% 0.062W
82W 1% 0.063W 0603
RC22H
4X10k 5% MNR14
1W 5% 0.062W CASE0603
2k2 5% 0.062W
RST NETW 1206 4X100W
PM5 COL R
RST NETW 1206 4X100W
PM5 COL R
100W 5% 0.062W
100W 5% 0.062W
10W 5% 0.062W
100W 5% 0.062W
100W 5% 0.062W
22W 5% 0.062W
1k5 5% 0.062W
1k5 5% 0.062W
3k3 5% 0.062W
3k3 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
3k3 5% 0.062W
10k 5% 0.062W
3k3 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
220W 5% 0.062W
10k 5% 0.062W
10k 1% 0.063W CASE0603
RC22H
15k 1% 0.063W 0603
RC22H
330W 1% 0.063W 0603
RC22H
3273
3304
3305
3400
3401
3402
3403
3405
3406
3407
3408
3409
3410
3552
3553
3554
3555
3556
3557
3559
3560
3561
3562
3563
3601
3602
3603
3604
3605
3606
3607
3608
3610
3611
3612
3613
3616
3617
3618
3619
3621
3622
3624
3626
3627
3628
3629
3630
3631
3632
3633
3641
3642
3643
3644
3645
3646
3647
3648
3649
3650
3651
3652
3653
3654
3655
3656
3657
3700
3701
3702
3703
3704
3705
3706
3707
3708
3709
3710
3711
3712
10.
GB 315
5322 117 13051 680W 1% 0.063W 0603
RC22H
4822 051 30103 10k 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30472 4k7 5% 0.062W
4822 051 30472 4k7 5% 0.062W
4822 051 30472 4k7 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30101 100W 5% 0.062W
4822 051 30101 100W 5% 0.062W
4822 051 30339 33W 5% 0.062W
4822 117 13576 NETW 4 X 33W 5% 1206
4822 117 13576 NETW 4 X 33W 5% 1206
4822 117 13576 NETW 4 X 33W 5% 1206
4822 051 30101 100W 5% 0.062W
4822 051 30101 100W 5% 0.062W
4822 117 12917 1W 5% 0.062W CASE0603
4822 051 30103 10k 5% 0.062W
4822 051 30222 2k2 5% 0.062W
4822 051 30472 4k7 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30222 2k2 5% 0.062W
4822 051 30472 4k7 5% 0.062W
4822 051 30008 0W jumper
2322 704 64301 RST SM 0603 RC22H
430W PM1 R
2322 704 64301 RST SM 0603 RC22H
430W PM1 R
4822 051 30102 1k 5% 0.062W
4822 117 12139 22W 5% 0.062W
4822 117 12917 1W 5% 0.062W CASE0603
2322 704 64301 RST SM 0603 RC22H
430W PM1 R
2322 704 64301 RST SM 0603 RC22H
430W PM1 R
4822 051 30102 1k 5% 0.062W
4822 117 12917 1W 5% 0.062W CASE0603
2322 704 64301 RST SM 0603 RC22H
430W PM1 R
2322 704 64301 RST SM 0603 RC22H
430W PM1 R
4822 051 30102 1k 5% 0.062W
2322 704 64301 RST SM 0603 RC22H
430W PM1 R
2322 704 64301 RST SM 0603 RC22H
430W PM1 R
4822 051 30102 1k 5% 0.062W
4822 051 30109 10W 5% 0.062W
2322 704 64301 RST SM 0603 RC22H
430W PM1 R
2322 704 64301 RST SM 0603 RC22H
430W PM1 R
4822 051 30102 1k 5% 0.062W
2322 704 64301 RST SM 0603 RC22H
430W PM1 R
2322 704 64301 RST SM 0603 RC22H
430W PM1 R
4822 051 30102 1k 5% 0.062W
4822 051 30181 180W 5% 0.062W
4822 051 30181 180W 5% 0.062W
4822 117 12917 1W 5% 0.062W CASE0603
4822 051 30561 560W 5% 0.062W
4822 051 30561 560W 5% 0.062W
4822 117 12139 22W 5% 0.062W
4822 051 30101 100W 5% 0.062W
4822 051 30101 100W 5% 0.062W
4822 051 30101 100W 5% 0.062W
4822 051 30222 2k2 5% 0.062W
4822 051 30181 180W 5% 0.062W
4822 051 30561 560W 5% 0.062W
4822 051 30101 100W 5% 0.062W
4822 051 30101 100W 5% 0.062W
4822 117 13632 100k 1% 0603 0.62W
4822 051 30103 10k 5% 0.062W
4822 051 30682 6k8 5% 0.062W
4822 117 13632 100k 1% 0603 0.62W
4822 051 30101 100W 5% 0.062W
4822 117 13632 100k 1% 0603 0.62W
4822 051 30103 10k 5% 0.062W
4822 051 30682 6k8 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30222 2k2 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30101 100W 5% 0.062W
4822 051 30101 100W 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30103 10k 5% 0.062W
4822 051 30103 10k 5% 0.062W
GB 316
10.
3713
3714
3715
3716
3717
3718
3719
3720
3721
3722
3723
3724
3725
3800
3802
3803
3804
3805
4822 051 30472
4822 051 30472
4822 051 30102
4822 051 30103
4822 051 30103
4822 051 30103
4822 117 13576
4822 117 13576
4822 117 13576
4822 117 13576
4822 117 13576
4822 051 30339
4822 051 30339
4822 051 30103
4822 051 30759
4822 051 30121
4822 117 12917
2322 704 62002
3806
3807
4822 117 12139
5322 117 13068
3809
3810
4822 051 30123
2322 704 63002
3811
3812
3814
4822 117 12891
4822 117 12139
5322 117 13033
3815
3816
3817
3818
3819
4822 051 30222
4822 117 12925
4822 117 13632
4822 117 12139
5322 117 13068
3820
2120 611 00019
3900
3901
3902
3906
3907
3908
3911
3912
3913
3914
3915
3916
3917
3918
3919
3920
3921
3922
3923
3924
3925
3926
3927
3928
3929
4822 051 30103
4822 051 30101
4822 051 30101
4822 117 12925
4822 117 12925
4822 117 12925
4822 051 30101
4822 051 30101
4822 051 30103
4822 051 30479
4822 051 30479
4822 051 30479
4822 051 30479
4822 051 30479
4822 051 30479
4822 051 30479
4822 051 30479
4822 051 30479
4822 051 30479
4822 051 30479
4822 051 30479
4822 051 30479
4822 051 30479
4822 051 30222
4822 117 12925
5100
5101
5102
5103
5200
5201
5202
5300
5301
5302
5400
5402
5404
5550
4822 157 11717
4822 157 11717
4822 157 11499
4822 157 11717
4822 157 11717
4822 157 70649
4822 157 70649
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
2422 543 01115
5552
5553
5554
5555
5556
5557
5558
5559
5560
5600
5601
5602
5605
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 70298
4822 157 11717
4822 157 11717
4822 157 70298
DVDR1000 /0x1 /691
4k7 5% 0.062W
4k7 5% 0.062W
1k 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
10k 5% 0.062W
NETW 4 X 33W 5% 1206
NETW 4 X 33W 5% 1206
NETW 4 X 33W 5% 1206
NETW 4 X 33W 5% 1206
NETW 4 X 33W 5% 1206
33W 5% 0.062W
33W 5% 0.062W
10k 5% 0.062W
75W 5% 0.062W
120W 5% 0.062W
1W 5% 0.062W CASE0603
RST SM 0603 RC22H 2k
PM1 R
22W 5% 0.062W
82W 1% 0.063W 0603
RC22H
12k 5% 0.062W
RST SM 0603 RC22H 3k
PM1 R
220k 1% ERJ3W
22W 5% 0.062W
15k 1% 0.063W 0603
RC22H
2k2 5% 0.062W
47k 1% 0.063W 0603
100k 1% 0603 0.62W
22W 5% 0.062W
82W 1% 0.063W 0603
RC22H
NTC SM 0603 0W1 4k7
PM5 R
10k 5% 0.062W
100W 5% 0.062W
100W 5% 0.062W
47k 1% 0.063W 0603
47k 1% 0.063W 0603
47k 1% 0.063W 0603
100W 5% 0.062W
100W 5% 0.062W
10k 5% 0.062W
47W 5% 0.062W
47W 5% 0.062W
47W 5% 0.062W
47W 5% 0.062W
47W 5% 0.062W
47W 5% 0.062W
47W 5% 0.062W
47W 5% 0.062W
47W 5% 0.062W
47W 5% 0.062W
47W 5% 0.062W
47W 5% 0.062W
47W 5% 0.062W
47W 5% 0.062W
2k2 5% 0.062W
47k 1% 0.063W 0603
BLM31P500SPT
BLM31P500SPT
BLM11P600SPT
BLM31P500SPT
BLM31P500SPT
4.7mH (NL322522T-4R7J)
4.7mH (NL322522T-4R7J)
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
RES XTL SM 24M576 12P
CX-11F R
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
15mH (NL322522T-150J)
BLM31P500SPT
BLM31P500SPT
15mH (NL322522T-150J)
5606
5607
5610
5615
5620
5625
5700
5701
5801
5802
5803
5805
5807
5813
5900
5901
Spare Parts List
4822 157 70649
4822 157 70649
4822 157 70298
4822 157 70298
4822 157 70298
4822 157 70298
4822 157 11499
4822 157 11717
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11499
4822 157 11717
4822 157 11717
4.7mH (NL322522T-4R7J)
4.7mH (NL322522T-4R7J)
15mH (NL322522T-150J)
15mH (NL322522T-150J)
15mH (NL322522T-150J)
15mH (NL322522T-150J)
BLM11P600SPT
BLM31P500SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM11P600SPT
BLM31P500SPT
BLM31P500SPT
0101
0120
1120
1520
2120
2119
2125
2129
2130
2131
2136
2139
2140
2141
2142
7100 9352 692 48557 IC SM SAA7333HL/M1
2143
(PHSE) Y
7101 9322 144 96668 IC SM MT48LC4M16A2TG- 2144
2145
8E (MRN)R
7102 9322 170 16685 IC SM NC7SZ58 (FSC0) R 2146
2147
7103 9352 456 80115
7200 9322 130 41668 IC SM M24C64-WMN6
2151
(ST00) R
2152
7202 9322 151 16671 STI5505AVC
2153
7300 4822 209 17375 GM71V18163CJ-6
2200
7301 4822 209 17375 GM71V18163CJ-6
2201
7305 9352 499 60118 IC SM 74LVC00AD (PHSE) 2210
R
7306 9322 144 59668 IC SM MT48LC1M16A1TG- 2211
7S (MRN)R
2214
7307 9322 144 59668 IC SM MT48LC1M16A1TG- 2220
7S (MRN)R
2221
7400 4822 209 17375 GM71V18163CJ-6
2223
7401 4822 209 17375 GM71V18163CJ-6
2230
7402 4822 209 17375 GM71V18163CJ-6
2235
7403 4822 209 17375 GM71V18163CJ-6
7410 9352 378 90557 IC SM SAA6750H/V1
2240
(PHSE) Y
7551 9352 500 60118 IC SM 74LVC32AD (PHSE) 2241
R
2251
7552 9352 673 95518 IC SM SAA7118E/V1
2501
(PHSE) R
2502
7553 5322 130 60803 BST72A
2506
7554 5322 130 60803 BST72A
2511
7600 4822 130 60511 BC847B
2512
7601 9352 456 80115
2513
7602 5322 209 71568 PC74HCT14T
2515
7606 4822 130 60511 BC847B
2520
7610 4822 130 60511 BC847B
2521
7615 4822 130 60511 BC847B
7620 4822 130 60511 BC847B
7625 4822 130 60511 BC847B
7644 4822 130 60511 BC847B
3120
7700 9322 166 64668 IC SM CY7C1019BV3310VC(CYPR)R
3122
7701 9322 166 64668 IC SM CY7C1019BV333125
10VC(CYPR)R
3126
7702 9322 166 64668 IC SM CY7C1019BV333127
10VC(CYPR)R
3128
7703 9322 131 98671 IC SM DSP56362-80
3131
(MOTA) Y
7704 2422 543 01185 OSC XTL SM 8MHZ00 15P 3132
3133
FX0-31 R
7800 9322 151 71668 IC SM MK2703STR (MICL) 3134
3135
R
3139
7801 4822 209 16399 74LVC04AD
3140
7802 4822 242 10838 27MHZ 120P FX0-31FT
3141
7803 4822 130 60511 BC847B
3142
7806 5322 209 16384 PC74HCT9046AD
3143
7900 5322 209 11578 PCF8574T
3144
7901 9352 456 50115 HC1G04
3145
7913 4822 209 16318 MC33464N-30A
3146
7916 9352 317 00118 IC
3147
7917 5322 209 11578 PCF8574T
3148
7918 9352 500 20118 IC SM 74LVC08AD (PHSE)
3149
R
3150
3151
3152
PSU 50PS203
3200
3201
3220
Various
3221
0010 4822 492 63066
3222
0021 4822 492 63066
3223
0025 4822 492 63524 FIX. TRANSISTOR
3230
0040 4822 492 63066
3233
0060 4822 492 63066
3234
0090 4822 492 63066
3250
4822 265 31015
4822 265 11253 FUSE HOLDER 2P
4822 253 30383 19181 (2,5A)
4822 252 11144 19398E1(3,150A)
2020 554 90186 CERSAF KX 250V S 1nF
PM20 A
4822 121 10697 220nF 20% 275V
2222 151 90053 EL 151 400V S 68mF PM20
4822 121 70162 10nF 5% 400V
4822 126 14525 47pF 5% 1KV
2020 554 90186 CERSAF KX 250V S 1nF
PM20 A
4822 126 12263 220pF 10%) 1KV
2222 580 15649 100nF 10% 50V
2222 580 15649 100nF 10% 50V
4822 126 13881 470pF 5% 50V
4822 122 33575 220pF 5% 63V CASE
4822 126 14305 100nF 10% 16V 0603
4822 126 14583 470nF 10% 16V XTR
4822 126 14583 470nF 10% 16V XTR
5322 122 34099 470pF 10% 63V
4822 124 40248 10mF 20% 63V
2222 580 15649 100nF 10% 50V
4822 126 14241 0603 50V 330P COL R
4822 126 13694 68pF 1% 63V
4822 124 11566 47mF 20% 50V
2222 580 15649 100nF 10% 50V
2020 021 91657 EL YXG 16V S 680mF
PM20 B
4822 124 40255 100mF 20% 63V
4822 124 12285 2200mF 20% 16V YXG EL
4822 124 80144 220mF 20% 25V
4822 124 40255 100mF 20% 63V
2222 580 15649 100nF 10% 50V
4822 124 40255 100mF 20% 63V
2020 012 93762 EL YK 50V S 330mF PM20
B
2020 021 91664 EL YXG 16V S 1000mF
PM20 B
4822 124 40255 100mF 20% 63V
4822 126 14494 22nF 10% 25V 0603
4822 126 14494 22nF 10% 25V 0603
4822 124 40255 100mF 20% 63V
4822 124 40255 100mF 20% 63V
4822 126 14305 100nF 10% 16V 0603
4822 124 40255 100mF 20% 63V
2222 580 15649 100nF 10% 50V
4822 124 40255 100mF 20% 63V
4822 126 14494 22nF 10% 25V 0603
4822 124 40255 100mF 20% 63V
2122 550 00147 VDR DC 1M A/423V S MAX
775V B
4822 053 21684 680k 5% 0.5W
4822 116 83866 1M 5% 0.5W
4822 116 83866 1M 5% 0.5W
4822 116 83874 220k 5% 0.5W
4822 116 83874 220k 5% 0.5W
4822 116 52195 47W 5% 0.5W
4822 116 52195 47W 5% 0.5W
4822 116 80676 1W5 5% 0.5W
4822 116 80676 1W5 5% 0.5W
4822 116 80676 1W5 5% 0.5W
4822 117 13632 100k 1% 0603 0.62W
4822 051 30272 2k7 5% 0.062W
4822 116 52257 22k 5% 0.5W
4822 051 30221 220W 5% 0.062W
4822 051 30102 1k 5% 0.062W
4822 051 30102 1k 5% 0.062W
4822 051 20223 22k 5% 0.1W
4822 116 52175 100W 5% 0.5W
4822 051 30222 2k2 5% 0.062W
4822 116 52256 2k2 5% 0.5W
4822 116 52256 2k2 5% 0.5W
4822 053 10689 68W 5% 1W
4822 117 13632 100k 1% 0603 0.62W
4822 116 52261 24k 5% 0.5W
4822 116 52263 2k7 5% 0.5W
4822 051 20333 33k 5% 0.1W
4822 051 30222 2k2 5% 0.062W
4822 051 30223 22k 5% 0.062W
4822 051 30472 4k7 5% 0.062W
4822 116 52283 4k7 5% 0.5W
4822 052 10479 47W 5% 0.33W
4822 117 10833 10k 1% 0.1W
4822 117 10833 10k 1% 0.1W
4822 116 83883 470W 5% 0.5W
Spare Parts List DVDR1000 /0x1 /691
3253
3254
3255
4822 117 12925 47k 1% 0.063W 0603
4822 116 83883 470 W 5% 0.5W
5322 117 13026 4k7 1% 0.063W 0603
RC22H
5322 117 13026 4k7 1% 0.063W 0603
RC22H
4822 116 52256 2k2 5% 0.5W
5322 117 13026 4k7 1% 0.063W 0603
RC22H
4822 051 30681 680 W 5% 0.062W
5322 117 13026 4k7 1% 0.063W 0603
RC22H
4822 051 30103 10k 5% 0.062W
4822 051 20472 4k7 5% 0.1W
4822 117 12925 47k 1% 0.063W 0603
4822 050 21003 10k 1% 0.6W
4822 117 10833 10k 1% 0.1W
4822 051 30103 10k 5% 0.062W
4822 051 20511 510 W 5% 0.1W
4822 051 30102 1k 5% 0.062W
4822 117 11449 2k2 5% 0.1W 0805
4822 051 30681 680 W 5% 0.062W
4822 051 20332 3k3 5% 0.1W
5322 117 13036 1k2 1% 0.063W 0603
RC22H
3256
3501
3502
3503
3504
3511
3512
3513
3514
3515
3516
3520
3521
3522
3523
3524
3525
5110
5115
5120
5125
5131
5210
5240
5501
5505
5511
5515
5520
2422 535 94634 IND FXD LHL08 S 2U2
PM20 A
2422 535 94634 IND FXD LHL08 S 2U2
PM20 A
4822 157 11846
4822 157 70826 2.4mH
4822 146 10402 TRAFO CT395FANF/PVF
2422 535 94639 IND FXD LHL08 S 10U
PM20
2422 535 94632 IND FXD LHL08 S 1U
PM30 A
2422 535 94634 IND FXD LHL08 S 2U2
PM20 A
2422 535 94639 IND FXD LHL08 S 10U
PM20
2422 535 94639 IND FXD LHL08 S 10U
PM20
2422 535 94639 IND FXD LHL08 S 10U
PM20
2422 535 94634 IND FXD LHL08 S 2U2
PM20 A
6125
6130
6131
6132
6140
6141
6142
6143
6144
4822 130 42606
5322 130 34574
5322 130 34574
5322 130 34574
4822 130 30842
4822 130 83757
4822 130 30842
4822 130 30842
9340 387 30115
6145
6146
6151
6152
6153
6154
6200
6201
6210
6211
6215
4822 130 83757
4822 130 83757
4822 130 31603
4822 130 31603
4822 130 31603
4822 130 31603
4822 130 42606
4822 130 34142
4822 130 11596
5322 130 34574
9322 161 46687
6220
6221
6230
6231
6240
6505
6511
6512
6515
6520
5322 130 31938
4822 130 30842
4822 130 42606
4822 130 34142
4822 130 11596
4822 130 32245
4822 130 11666
5322 130 34574
4822 130 34278
4822 130 83757
BYD33J
1N4004G
1N4004G
1N4004G
BAV21
BAS216
BAV21
BAV21
DIO REG SM BZX284-C16
(PHSE) R
BAS216
BAS216
1N4006
1N4006
1N4006
1N4006
BYD33J
BZX79-B33
BYW29EX-200
1N4004G
DIO REC STPS745FP
(ST00) L
BYV27-200
BAV21
BYD33J
BZX79-B33
BYW29EX-200
BYV10-40
BZX284-C8V2
1N4004G
BZX79-B6V8
BAS216
7125
7140
7141
7142
7143
9322 126 65687
5322 130 60159
4822 130 60373
5322 130 60159
5322 130 60159
STP5NB60FP
BC846B
BC856B
BC846B
BC846B
7200
7220
7241
7251
7501
7502
7511
7512
7515
7520
7521
9322 149 04682 OPT CP TCET1102(G)
(VISH) L
4822 209 72684 L7905CV
4822 130 60373 BC856B
4822 209 81397 TL431CLPST
9322 163 53685 FET POW SM IRLML2502
(INR0) R
4822 209 81397 TL431CLPST
9322 163 53685 FET POW SM IRLML2502
(INR0) R
5322 130 60159 BC846B
9322 163 53685 FET POW SM IRLML2502
(INR0) R
4822 130 11336 STP16NE06FP
4822 209 81397 TL431CLPST
10.
GB 317
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