IT BUSINESS SOLUTIONS, LLC.
ITBXF-SL-XG-X60-23
10Gb/s 60km BiDi XFP Transceiver
Hot Pluggable, Single LC, 1270/1330nm, CWDM DFB&APD, Single mode
Tel: +38 044 597 10 90
http://www.itbiz.ua
25/28 Buchanskaya Street, Kiev, Ukraine, 03164
E-mail: sales@itbiz.com.ua
Features:
 Supports 9.95Gb/s to 11.3Gb/s bit rates
 Hot-pluggable XFP footprint
 Single LC for Bi-directional Transmission
 Maximum link length of 60km
 Built-in 1270/1330 WDM
 Uncooled 1270nm or 1330nm CWDM DFB Laser
 APD Receiver
 Power dissipation <2W
 No Reference Clock required
 Built-in digital diagnostic functions
 Temperature range 0°C to 70°C
 Very low EMI and excellent ESD protection
 RoHS Compliant Part
Applications:
 10GBASE-LR/LW Ethernet
 SONET OC-192 /SDH
 1200-SM-LL-L 10G Fibre Channel
Description:
ITbiz’s ITBXF-SL-XG-X60-23 Bi-directional 10Gb/s (XFP) transceivers are compliant with the current
XFP Multi-Source Agreement (MSA) Specification. They comply with 10-Gigabit Ethernet 10GBASELR/LW per IEEE 802.3ae and 10G Fibre Channel 1200-SM-LL-L. Digital diagnostics functions are
available via a 2-wire serial interface, as specified in the XFP MSA.
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 Absolute Maximum Ratings
Parameter
Storage Temperature
Case Operating Temperature
Supply Voltage
Symbol
TST
TIP
VCC3
Min
-40
0
-0.5
Max
+85
+70
+4.0
Unit
℃
℃
V
 Electrical Characteristics (TOP = 0 to 70 °C)
Parameter
Supply Voltage
Supply Current
Module total power
Transmitter
Input differential impedance
Differential data input swing
Transmit Disable Voltage
Transmit Enable Voltage
Transmit Disable Assert Time
Tx Enable Assert Time
Receiver
Differential data output swing
Data output rise time
Data output fall time
LOS Fault
LOS Normal
Power Supply Rejection
Symbol
Vcc3
Icc3
P
Rin
Vin,pp
VD
VEN
T_off
T_on
Vout,pp
tr
tf
VLOS fault
VLOS norm
PSR
Min
3.13
Typ
Max
3.45
500
2
Unit
V
mA
W
Note
1
820
Vcc
GND+ 0.8
100
100
Ω
mV
V
V
ms
ms
100
150
2.0
GND
300
Vcc – 0.5
GND
500
850
35
35
VccHOST
GND+0.5
See Note 4 below
mV
ps
ps
V
V
2
2
3
3
4
Notes
1.
After internal AC coupling.
2. 20 – 80 %
3.
Loss of Signal is open collector to be pulled up with a 4.7k – 10kohm resistor to 3.15 – 3.6V. Logic 0 indicates
normal operation; logic 1 indicates no signal detected.
4.
Per Section 2.7.1. in the XFP MSA Specification.
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 Optical Parameters(TOP = 0 to 70°C)
Parameter
Symbol
Min
Operating Date Rate
BR
9.95
Bit Error Rate
BER
Maximum Launch Power
PMAX
Typ
Max
Unit
11.3
Gb/s
Ref.
Transmitter
Optical Center
FTP960-2733
Wavelength
FTP960-3327
λ
Optical Extinction Ratio
ER
Spectral Width
Δλ
Sidemode Supression ratio
SSRmin
Rise/Fall Time (20%~80%)
Tr/Tf
Average Launch power of OFF
Transmitter
POFF
Tx Jitter
Txj
10-12
0
+5
1260
1270
1280
1320
1330
1340
dBm
1
nm
3.5
dB
1
nm
30
dB
50
ps
-30
dBm
Compliant with each standard
requirements
Optical Eye Mask
IEEE802.3ae
2
Receiver
Operating Date Rate
BR
Receiver Sensitivity
Sen
Maximum Input Power
PMAX
Optical Center
Wavelength
FTP960-2733
FTP960-3327
Receiver Reflectance
λC
9.95
11.3
Gb/s
-22
dBm
2
dBm
2
-7
1320
1330
1340
1260
1270
1280
nm
Rrx
-27
dB
LOS De-Assert
LOSD
-23
dBm
LOS Assert
LOSA
LOS Hysteresis
LOSH
-33
0.5
dBm
5
dB
Notes:
1. The optical power is launched into SMF.
2. Measured with a PRBS 231-1 test pattern @10.3125Gbps BER<10-12.
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 Pin Assignment
Diagram of Host Board Connector Block Pin Numbers and Name
 Pin Function Definitions
Pin
1
2
Logic
Symbol
GND
VEE5
3
LVTTL-I
Mod-Desel
4
LVTTL-O
Interrupt
5
LVTTL-I
TX_DIS
Name/Description
Module Ground
Optional –5.2 Power Supply – Not required
Module De-select; When held low allows the module to
respond to 2-wire serial interface commands
Interrupt (bar); Indicates presence of an important
condition which can be read over the serial 2-wire
interface
Transmitter Disable; Transmitter laser source turned off
Ref.
1
2
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6
7
8
9
10
11
LVTTL-I
LVTTL-I/O
VCC5
GND
VCC3
VCC3
SCL
SDA
12
LVTTL-O
Mod_Abs
13
14
15
16
17
18
19
20
LVTTL-O
LVTTL-O
Mod_NR
RX_LOS
GND
GND
RDRD+
GND
VCC2
21
LVTTL-I
CML-O
CML-O
22
23
P_Down/RST
VCC2
GND
24
PECL-I
RefCLK+
25
PECL-I
RefCLK-
26
27
28
29
30
CML-I
CML-I
GND
GND
TDTD+
GND
+5 Power Supply
Module Ground
+3.3V Power Supply
+3.3V Power Supply
Serial 2-wire interface clock
Serial 2-wire interface data line
Module Absent; Indicates module is not present.
Grounded in the module.
Module Not Ready;
Receiver Loss of Signal indicator
Module Ground
Module Ground
Receiver inverted data output
Receiver non-inverted data output
Module Ground
+1.8V Power Supply – Not required
Power Down; When high, places the module in the low
power stand-by mode and on the falling edge of
P_Down initiates a module reset
Reset; The falling edge initiates a complete reset of the
module including the 2-wire serial interface, equivalent
to a power cycle.
+1.8V Power Supply – Not required
Module Ground
Reference Clock non-inverted input, AC coupled on the
host board – Not required
Reference Clock inverted input, AC coupled on the host
board – Not required
Module Ground
Module Ground
Transmitter inverted data input
Transmitter non-inverted data input
Module Ground
1
2
2
2
2
2
1
1
1
1
3
3
1
1
1
Note
1.
Module circuit ground is isolated from module chassis ground within the module.
2.
Open collector; should be pulled up with 4.7k – 10k ohms on host board to a voltage between 3.15Vand 3.45V.
3.
A Reference Clock input is not required.
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 Digital Diagnostic Functions
As defined by the XFP MSA 1, ITbiz’s XFP transceivers provide digital diagnostic functions via a 2-wire
serial interface, which allows real-time access to the following operating parameters:
 Transceiver temperature
 Laser bias current
 Transmitted optical power
 Received optical power
 Transceiver supply voltage
It also provides a sophisticated system of alarm and warning flags, which may be used to alert endusers when particular operating parameters are outside of a factory-set normal range.
The operating and diagnostics information is monitored and reported by a Digital Diagnostics
Transceiver Controller (DDTC) inside the transceiver, which is accessed through the 2-wire serial
interface. When the serial protocol is activated, the serial clock signal (SCL pin) is generated by the
host. The positive edge clocks data into the XFP transceiver into those segments of its memory map
that are not write-protected. The negative edge clocks data from the XFP transceiver. The serial data
signal (SDA pin) is bi-directional for serial data transfer. The host uses SDA in conjunction with SCL to
mark the start and end of serial protocol activation. The memories are organized as a series of 8-bit
data words that can be addressed individually or sequentially. The 2-wire serial interface provides
sequential or random access to the 8 bit parameters, addressed from 000h to the maximum address
of the memory.
For more detailed information including memory map definitions, please see the XFP MSA
Specification.
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 Recommended Circuit
Recommended Host Board Power Supply Circuit
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Recommended High-speed Interface Circuit
 Mechanical Dimensions
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