TIBTRONIX TECHNOLOGY CO., LTD.
TSPLXG80D-xx
10Gb/s 80km CWDM SFP+ Transceiver
Hot Pluggable, Duplex LC, +3.3V, 1470~1610nm, CWDM EML&APD, Single mode
2015/3/9
Shenzhen Tibtronix Technology Co., Ltd.
3/F,12th Building, Nangang 1st Industrial Park, Baimang Xili, Songbai Road, Nanshan District, Shenzhen, China
Tel: +86 755 23316583
Fax: +86 75529810056
E-mail: sales@tibtronix.com
http://www.tibtronix.com
TSPLXG80D-XX
Features:
 Supports 9.95 to 11.3Gb/s bit rates
 Hot-Pluggable
 Duplex LC connector
 1470~1610nm CWDM EML transmitter, APD photo-detector
 SMF links up to 80km
 2-wire interface for management specifications compliant with SFF 8472 digital diagnostic
monitoring interface
 Power Supply :+3.3V
 Power consumption<2W
 Temperature Range: 0~ 70°C
 RoHS compliant
Applications:
 10GBASE-ZR/ZW Ethernet
 Sonet OC-192/SDH
 10G Fibre channel
 CWDM Networks
Description:
TIBTRONIX's TSPLXG80D-xx is a very compact 10Gb/s optical transceiver module for serial optical
communication applications at 10Gb/s. The TSPLXG80D-xx converts a 10Gb/s serial electrical data
stream to 10Gb/s optical output signal and a 10Gb/s optical input signal to 10Gb/s serial electrical
data streams. The high speed 10Gb/s electrical interface is fully compliant with SFI specification.
The high performance 1470 ~ 1610nm CWDM EML transmitter and high sensitivity APD receiver
provide superior performance for Ethernet applications at up to 80km links.
The SFP+ Module compliants with SFF-8431, SFF-8432 and IEEE 802.3ae 10GBASE-ZR. Digital
diagnostics functions are available via a 2-wire serial interface, as specified in SFF-8472.
2
TSPLXG80D-XX
The fully SFP compliant form factor provides hot pluggability, easy optical port upgrades and low
EMI emission.
 Absolute Maximum Ratings
Parameter
Symbol
Min.
Storage Temperature
TS
Case Operating Temperature
Typical
Max.
Unit
-40
+85
°C
TA
0
70
°C
Maximum Supply Voltage
Vcc
-0.5
4
V
Relative Humidity
RH
0
85
%
 Electrical Characteristics (TOP = 0 to 70 °C, VCC = 3.135 to 3.465 Volts)
Parameter
Supply Voltage
Supply Current
Power Consumption
Symbol
Min.
Vcc
Icc
P
3.135
Typical
Max.
Unit
3.465
600
2
V
mA
W
Note
Transmitter Section:
Input differential impedance
Tx Input Single Ended DC Voltage
Tolerance (Ref VeeT)
Differential input voltage swing
Transmit Disable Voltage
Transmit Enable Voltage
Rin
Ω
100
V
-0.3
4
V
Vin,pp
VD
VEN
180
2
Vee
700
Vcc
Vee+0.8
mV
V
V
V
Vo
Tr/Tf
VLOS fault
VLOS norm
-0.3
300
30
2
Vee
4
850
V
mV
ps
V
V
1
2
3
Receiver Section:
Single Ended Output Voltage Tolerance
Rx Output Diff Voltage
Rx Output Rise and Fall Time
LOS Fault
LOS Normal
VccHOST
Vee+0.8
4
5
5
Note:
1.
2.
3.
Connected directly to TX data input pins. AC coupling from pins into laser driver IC.
Per SFF-8431 Rev 3.0
Into 100 ohms differential termination.
4.
5.
20%~80%
LOS is an open collector output. Should be pulled up with 4.7k – 10kΩ on the host board. Normal
operation is logic 0; loss of signal is logic 1. Maximum pull-up voltage is 5.5V.
3
TSPLXG80D-XX
 Optical Parameters(TOP = 0 to 70°C, VCC = 3.135 to 3.465 Volts)
Parameter
Symbol
Min.
λc
△λ
Pavg
Poff
ER
TDP
Rin
λ-6.5
Typical
Max.
Unit
Note
λ+6.5
1
+4
-30
nm
nm
dBm
dBm
dB
dB
dB/Hz
dB
Transmitter Section:
Center Wavelength
spectral width
Average Optical Power
Laser Off Power
Extinction Ratio
Transmitter Dispersion Penalty
Relative Intensity Noise
Optical Return Loss Tolerance
0
8.2
3.0
-128
20
1
2
3
Receiver Section:
Center Wavelength
Receiver Sensitivity (OMA)
Stressed Sensitivity (OMA)
Los Assert
Los Dessert
Los Hysteresis
Overload
Receiver Reflectance
λr
Sen
SenST
LOSA
LOSD
LOSH
Sat
Rrx
1260
1620
-23
-21
-24
-34
0.5
-7
-12
nm
dBm
dBm
dBm
dBm
dB
dBm
dB
4
4
5
Note:
1.
2.
Average power figures are informative only, per IEEE802.3ae.
TWDP figure requires the host board to be SFF-8431compliant. TWDP is calculated using the Matlab code
provided in clause 68.6.6.2 of IEEE802.3ae.
3.
4.
12dB reflection.
5.
Conditions of stressed receiver tests per IEEE802.3ae. CSRS testing requires the host board to be
SFF-8431 compliant.
Receiver overload specified in OMA and under the worst comprehensive stressed condition.
 Timing Characteristics
Parameter
TX_Disable Assert Time
TX_Disable Negate Time
Time to Initialize Include Reset of TX_FAULT
TX_FAULT from Fault to Assertion
TX_Disable Time to Start Reset
Receiver Loss of Signal Assert Time
Symbol
t_off
t_on
t_int
t_fault
t_reset
TA,RX_LOS
Min.
Typical
Max.
10
1
300
100
10
100
Unit
us
ms
ms
us
us
us
4
TSPLXG80D-XX
Receiver Loss of Signal Deassert Time
Rate-Select Chage Time
Serial ID Clock Time
Td,RX_LOS
t_ratesel
t_serial-clock
100
10
100
us
us
kHz
 Pin Assignment
Diagram of Host Board Connector Block Pin Numbers and Name
 Pin Function Definitions
PIN #
1
2
3
4
5
6
Name
VeeT
Tx Fault
Tx Disable
SDL
SCL
MOD-ABS
7
RS0
8
LOS
Function
Module transmitter ground
Module transmitter fault
Transmitter Disable; Turns off transmitter laser output
2 wire serial interface data input/output (SDA)
2 wire serial interface clock input (SCL)
Module Absent, connect to VeeR or VeeT in the module
Rate select0, optionally control SFP+ receiver. When high, input
data rate >4.5Gb/ s; when low, input data rate <=4.5Gb/s
Receiver Loss of Signal Indication
Notes
1
2
3
2
4
5
TSPLXG80D-XX
9
RS1
10
11
12
13
14
15
16
17
18
19
20
VeeR
VeeR
RDRD+
VeeR
VccR
VccT
VeeT
TD+
TDVeeT
Rate select0, optionally control SFP+ transmitter. When high,
input data rate >4.5Gb/s; when low, input data rate <=4.5Gb/s
Module receiver ground
Module receiver ground
Receiver inverted data out put
Receiver non-inverted data out put
Module receiver ground
Module receiver 3.3V supply
Module transmitter 3.3V supply
Module transmitter ground
Transmitter inverted data out put
Transmitter non-inverted data out put
Module transmitter ground
1
1
1
1
1
Note:
1.The module ground pins shall be isolated from the module case.
2.This pin is an open collector/drain output pin and shall be pulled up with 4.7K-10Kohms to Host_Vcc on
the host board.
3.This pin shall be pulled up with 4.7K-10Kohms to VccT in the module.
4.This pin is an open collector/drain output pin and shall be pulled up with 4.7K-10Kohms to Host_Vcc on
the host board.
 SFP Module EEPROM Information and Management
The SFP modules implement the 2-wire serial communication protocol as defined in the SFP
-8472. The serial ID information of the SFP modules and Digital Diagnostic Monitor parameters
can be accessed through the I2C interface at address A0h and A2h. The memory is mapped in
Table 1. Detailed ID information (A0h) is listed in Table 2. And the DDM specification at address
A2h. For more details of the memory map and byte definitions, please refer to the SFF-8472,
“Digital Diagnostic Monitoring Interface for Optical Transceivers”. The DDM parameters have
been internally calibrated.
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TSPLXG80D-XX
Table 1. Digital Diagnostic Memory Map (Specific Data Field Descriptions)
Table 2 - EEPROM Serial ID Memory Contents (A0h)
Data
Length
Name of
Description and Contents
Address
(Byte)
Length
Base ID Fields
0
1
Identifier
Type of Serial transceiver (03h=SFP)
1
1
Reserved
Extended identifier of type serial transceiver (04h)
2
1
Connector
Code of optical connector type (07=LC)
3-10
8
Transceiver
10G Base-ZR
11
1
Encoding
64B/66B
12
1
BR, Nominal
Nominal baud rate, unit of 100Mbps
13-14
2
Reserved
(0000h)
15
1
Length(9um)
Link length supported for 9/125um fiber, units of 100m
16
1
Length(50um) Link length supported for 50/125um fiber, units of 10m
17
1
Length(62.5um) Link length supported for 62.5/125um fiber, units of
10m
18
1
Length(Copper) Link length supported for copper, units of meters
19
1
Reserved
20-35
16
Vendor Name
SFP vendor name: TIBTRONIX
36
1
Reserved
7
TSPLXG80D-XX
37-39
3
40-55
16
56-59
4
60-62
3
63
1
Extended ID Fields
64-65
2
66
67
68-83
84-91
92-94
95
1
1
16
8
3
1
Vendor OUI
Vendor PN
Vendor rev
Reserved
CCID
Option
BR, max
BR, min
Vendor SN
Date code
Reserved
CCEX
Vendor Specific ID Fields
96-127
32
128-255
128
Readable
Reserved
SFP transceiver vendor OUI ID
Part Number: “TSPLXG80D-xx” (ASCII)
Revision level for part number
Least significant byte of sum of data in address 0-62
Indicates which optical SFP signals are implemented
(001Ah = LOS, TX_FAULT, TX_DISABLE all supported)
Upper bit rate margin, units of %
Lower bit rate margin, units of %
Serial number (ASCII)
TIBTRONIX’s Manufacturing date code
Check code for the extended ID Fields (addresses 64 to
94)
TIBTRONIX specific date, read only
Reserved for SFF-8079
 Digital Diagnostic Monitor Characteristics
Data Address
96-97
100-101
100-101
100-101
100-101
Parameter
Transceiver Internal Temperature
Laser Bias Current
Tx Output Power
Rx Input Power
VCC3 Internal Supply Voltage
Accuracy
±3.0
±10
±3.0
±3.0
±3.0
Unit
°C
%
dBm
dBm
%
 Regulatory Compliance
The TSPLXG80D-xx complies with international Electromagnetic Compatibility (EMC) and
international safety requirements and standards (see details in Table following).
Electrostatic Discharge
(ESD) to the Electrical Pins
Electrostatic Discharge (ESD)
to the Duplex LC Receptacle
Electromagnetic
Interference (EMI)
MIL-STD-883E
Method 3015.7
IEC 61000-4-2
GR-1089-CORE
FCC Part 15 Class B
EN55022 Class B (CISPR 22B)
Class 1(>1000 V)
Compatible with standards
Compatible with standards
8
TSPLXG80D-XX
Laser Eye Safety
VCCI Class B
FDA 21CFR 1040.10 and 1040.11
EN60950, EN (IEC) 60825-1,2
Compatible with Class 1 laser
product.
 Recommended Circuit
Recommended Host Board Power Supply Circuit
Recommended High-speed Interface Circuit
9
TSPLXG80D-XX
 Mechanical Dimensions
 Order Information:
In the Part No. of TSPLXG80D-xx, xx stands for central wavelength, such as:
47: for 1470nm, 49: for 1490nm, 41: for 1410nm, ......61: for 1610nm.
TIBTRONIX reserves the right to make changes to the products or information contained herein
without notice. No liability is assumed as a result of their use or application. No rights under any
patent accompany the sale of any such products or information.
Published by Shenzhen TIBTRONIX Technology Co., Ltd.
Copyright © TIBTRONIX
All Rights Reserved
10
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