KH960-CM238/QM175/HM175
COM Express Basic Module
User’s Manual
A45400720
1
Chapter 1 Introduction
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Copyright
FCC and DOC Statement on Class B
This publication contains information that is protected by copyright. No part of it may be reproduced in any form or by any means or used to make any transformation/adaptation without
the prior written permission from the copyright holders.
This equipment has been tested and found to comply with the limits for a Class B digital
device, pursuant to Part 15 of the FCC rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference
to radio communications. However, there is no guarantee that interference will not occur in a
particular installation. If this equipment does cause harmful interference to radio or television
reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:
This publication is provided for informational purposes only. The manufacturer makes no
representations or warranties with respect to the contents or use of this manual and specifically disclaims any express or implied warranties of merchantability or fitness for any particular
purpose. The user will assume the entire risk of the use or the results of the use of this document. Further, the manufacturer reserves the right to revise this publication and make changes
to its contents at any time, without obligation to notify any person or entity of such revisions
or changes.
• Reorient or relocate the receiving antenna.
• Increase the separation between the equipment and the receiver.
• Connect the equipment into an outlet on a circuit different from that to which the receiver
is connected.
• Consult the dealer or an experienced radio TV technician for help.
Changes after the publication’s first release will be based on the product’s revision. The website
will always provide the most updated information.
© 2017. All Rights Reserved.
Notice:
Trademarks
1. The changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the equipment.
2. Shielded interface cables must be used in order to comply with the emission limits.
Product names or trademarks appearing in this manual are for identification purpose only and
are the properties of the respective owners.
COM Express Specification Reference
PICMG® COM Express ModuleTM Base Specification.
http://www.picmg.org/
2
Chapter 1 Introduction
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Table of Contents
Copyright...................................................................... 2
Mechanical Diagram............................................................................................11
Trademarks................................................................... 2
System Memory...................................................................................................12
Connectors...........................................................................................................13
COM Express Specification Reference.................. 2
CPU Fan Connector........................................................................................................................ 13
COM Express Connectors............................................................................................................ 14
FCC and DOC Statement on Class B.................. 2
COM Express Connectors Signals and Descriptions.................................16
Standby Power LED............................................................................................30
About this Manual...................................................... 4
Cooling Option....................................................................................................30
Chapter 4 - BIOS Setup.....................................33
Warranty ..................................................................... 4
Static Electricity Precautions.................................... 4
Overview ..............................................................................................................33
Insyde BIOS Setup Utility..................................................................................34
Safety Measures........................................................... 4
Main..................................................................................................................................................... 34
Advanced .......................................................................................................................................... 34
Security............................................................................................................................................... 43
Boot..................................................................................................................................................... 44
Exit....................................................................................................................................................... 46
About the Package..................................................... 5
Optional Items............................................................. 5
Chapter 5 - Supported Software...........................48
Before Using the System Board.............................. 5
Chapter 6 - RAID .....................................................57
Chapter 1 - Introduction.......................................... 6
Chapter 7 - Intel AMT Settings ............................. 61
Specifications........................................................................................................... 6
Appendix A - Troubleshooting................................. 75
Features.................................................................................................................... 7
Appendix B - Insyde BIOS Standard Status POST Code77
Chapter 2 - Concept................................................. 8
COM Express Module Standards...................................................................... 8
Specification Comparison Table......................................................................... 9
Chapter 3 - Hardware Installation.........................10
Board Layout........................................................................................................10
Block Diagram ....................................................................................................10
3
Chapter 1 Introduction
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About this Manual
Static Electricity Precautions
An electronic file of this manual is included in the DVD. To view the user’s manual in the DVD,
insert the DVD into a DVD-ROM drive. The autorun screen (Main Board Utility DVD) will appear. Click “User’s Manual” on the main menu.
It is quite easy to inadvertently damage your PC, system board, components or devices even
before installing them in your system unit. Static electrical discharge can damage computer
components without causing any signs of physical damage. You must take extra care in handling them to ensure against electrostatic build-up.
1. To prevent electrostatic build-up, leave the system board in its anti-static bag until you are
ready to install it.
Warranty
2. Wear an antistatic wrist strap.
1. Warranty does not cover damages or failures that arised from misuse of the product, inability to use the product, unauthorized replacement or alteration of components and product specifications.
3. Do all preparation work on a static-free surface.
4. Hold the device only by its edges. Be careful not to touch any of the components, contacts
or connections.
2. The warranty is void if the product has been subjected to physical abuse, improper installation, modification, accidents or unauthorized repair of the product.
5. Avoid touching the pins or contacts on all modules and connectors. Hold modules or connectors by their ends.
3. Unless otherwise instructed in this user’s manual, the user may not, under any circumstances, attempt to perform service, adjustments or repairs on the product, whether in or
out of warranty. It must be returned to the purchase point, factory or authorized service
agency for all such work.
Important:
Electrostatic discharge (ESD) can damage your processor, disk drive and other components. Perform the upgrade instruction procedures described at an ESD workstation only. If such a station is not available, you can provide some ESD protection by
wearing an antistatic wrist strap and attaching it to a metal part of the system chassis. If a wrist strap is unavailable, establish and maintain contact with the system
chassis throughout any procedures requiring ESD protection.
4. We will not be liable for any indirect, special, incidental or consequential damages to the
product that has been modified or altered.
Safety Measures
To avoid damage to the system:
• Use the correct AC input voltage range.
To reduce the risk of electric shock:
• Unplug the power cord before removing the system chassis cover for installation or servicing. After installation or servicing, cover the system chassis before plugging the power
cord.
4
Chapter 1 Introduction
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About the Package
The package contains the following items. If any of these items are missing or damaged,
please contact your dealer or sales representative for assistance.
• One KH960 board
•One DVD
• One Cooler (Height: 36.58mm)
Optional Items
• COM332-B carrier board kit
• Heat spreader (Height: 11mm)
The board and accessories in the package may not come similar to the information listed
above. This may differ in accordance with the sales region or models in which it was sold. For
more information about the standard package in your region, please contact your dealer or
sales representative.
Before Using the System Board
Before using the system board, prepare basic system components.
If you are installing the system board in a new system, you will need at least the following
internal components.
• Memory module
• Storage devices such as hard disk drive, CD-ROM, etc.
You will also need external system peripherals you intend to use which will normally include at
least a keyboard, a mouse and a video display monitor.
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Chapter 1 Introduction
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Chapter 1
Chapter 1 - Introduction
Specifications
System
Graphics
Processor
7th Generation Intel® Core™ Processors, BGA 1440
Audio
Interface
HD Audio
Intel® Xeon® E3-1505M v6 Processor, Quad Core, 8M Cache, 3.0GHz (4.0GHz), 45W*
Intel® Xeon® E3-1505L v6 Processor, Quad Core, 8M Cache, 2.2GHz (3.0GHz), 25W*
Intel® Core™ i7-7820EQ Processor, Quad Core, 8M Cache, 3.0GHz (3.7GHz), 45W
Intel® Core™ i5-7440EQ Processor, Quad Core, 6M Cache, 2.9GHz (3.6GHz), 45W
Intel® Core™ i5-7442EQ Processor, Quad Core, 6M Cache, 2.1GHz (2.9GHz), 25W
Intel® Core™ i3-7100E Processor, Dual Core, 3M Cache, 2.9GHz, 35W
Intel® Core™ i3-7102E Processor, Dual Core, 3M Cache, 2.1GHz, 25W
Ethernet
Controller
1 x Intel® I219LM PCIe with iAMT (10/100/1000Mbps)†
I/O
USB
4 x USB 3.0
8 x USB 2.0
SATA
4 x SATA 3.0 (up to 6Gb/s); capable of RAID configuration of 0,
1, 5, 10
DIO
1 x 8-bit DIO (default 4 inputs and 4 outputs)
Chipset
Intel CM238/Intel QM175/Intel HM175 Chipset
Memory
Two 260-pin SODIMM up to 32GB
Dual Channel DDR4 2400MHz (The maximum memory speed supported
differs by SKU.)
WatchDog
Timer
Output &
Interval
System Reset, Programmable via Software from 1 to 255
Seconds
Security
TPM
Available Upon Request
BIOS
Insyde SPI 128Mbit
Power
Type
12V, 5VSB, VCC_RTC (ATX mode)
12V, VCC_RTC (AT mode)
Controller
Intel® HD Graphics
Feature
OpenGL up to 5.0, DirectX 11, OpenCL 2.1
HW Decode: HEVC/H.265, H.264, M/JPEG, MPEG2, VC1/WMV9, VP8
(8-bit), VP9 (10-bit)
HW Encode: HEVC/H.265, M/JPEG, MPEG2, VP8
Display
®
®
®
Windows: Windows 10 IoT Enterprise 64-bit
Linux: Yocto Project v2.2
Environment Temperature
Operating
: 0 to 60°C
: -40 to 85°C (with heat spreader)
Storage: -40 to 85°C
1 x VGA/DDI3 (DDI3 available upon request)
1 x LVDS/eDP (eDP available upon request)
2 x DDI (HDMI/DVI/DP++)
VGA: resolution up to 2560x1600 @ 60Hz
LVDS: dual channel 24-bit, resolution up to 1920x1200 @ 60Hz
HDMI: resolution up to 4096x2160 @ 30Hz, 24bpp
DVI: resolution up to 1920x1200 @ 60Hz
DP++/eDP: resolution up to 4096x2304 @ 60Hz, 24bpp
Mechanical
1
8
1
1
1
2
x
x
x
x
x
x
Humidity
Operating: 5 to 90% RH
Storage: 5 to 90% RH
MTBF
TBD
Dimensions
COM Express® Basic
95mm (3.74") x 125mm (4.9")
Compliance
PICMG COM Express® R2.1, Type 6
*Intel Xeon E3-1505M/1505L v6 can only be paired with the Intel® CM238 Chipset.
®
Triple Displays VGA+LVDS+DDI or VGA+ DDI1+DDI2
eDP + 2 x DDI (or 3 x DDI available upon request)
Expansion Interface
OS Support
®
† Intel Active Management Technology (Intel® AMT) is not available on Core™ i3 processors
or HM175 chipset.
PCIe x16 (or 2 x PCIe x8 upon request) (Gen 3)
PCIe x1 (or 2 x PCIe x4 or 4 x PCIe x2 upon request) (Gen 3)
LPC
I²C
SMBus
UART (TX/RX)
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Chapter 1 Introduction
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Chapter 1
Features
• Watchdog Timer
• Intel® Rapid Storage Technology
The Watchdog Timer function allows your application to regularly “clear” the system at the set
time interval. If the system hangs or fails to function, it will reset at the set time interval so
that your system will continue to operate.
With a newer release of the Intel Rapid Storage Technology software, the system offers better performance and responsiveness. New features such as Smart Response Technology and
Dynamic Storage Accelerator maximize the utilization of the SSD cache acceleration in your
system.
• DDR4
• Intel Turbo Boost 2.0
DDR4 delivers increased system bandwidth and improves performance. The advantages of
DDR4 provide an extended battery life and improve the performance at a lower power than
DDR3/DDR2.
With the new Intel Turbo Boot Technology 2.0, the system shows better power efficiency when
the processor’s frequency is dynamically increased to provide better performance state using
this technology.
• Graphics
• PCI Express Revision 3.0
The integrated Intel® HD Graphics 630 engine delivers an excellent blend of graphics performance and features to meet business needs. It delivers enhanced media conversion rates
and higher frame rates on 4K Ultra HD videos. These enhancements deliver the performance
and compatibility to meet the demand for business and home entertainment applications. The
system supports VGA, LVDS (or eDP) and DDI (HDMI/DVI/DP++) display outputs.
The 3 chipsets offered by the model all support PCIe Gen 3 data transfer rates of 8 GT/s,
higher than PCIe Gen 2 speeds of 5 GT/s and providing faster access to expansion cards and
networking.
• Serial ATA
Serial ATA is a storage interface that is compliant with SATA 1.0a specification. With speed of
up to 6Gb/s (SATA 3.0), it improves hard drive performance faster than the standard parallel ATA whose data transfer rate is 100MB/s. However, the bandwidth of the SATA 3.0 will be
limited by carrier board design.
• Gigabit LAN
The Intel® I219LM Gigabit LAN PHY controller features up to 1Gbps data transmission with
support for Intel® Active Management Technology. It provides remote maintenance and manageability for networked computing assets in an enterprise environment.
• USB
The system board supports the new USB 3.0. It is capable of running at a maximum transmission speed of up to 5 Gbit/s (625 MB/s) and is faster than USB 2.0 (480 Mbit/s, or 60 MB/s)
and USB 1.1 (12Mb/s). USB 3.0 reduces the time required for data transmission, reduces
power consumption, and is backward compatible with USB 2.0. It is a marked improvement
in device transfer speeds between your computer and a wide range of simultaneously
accessible external Plug and Play peripherals.
7
Chapter 1 Introduction
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Chapter 2
Chapter 2 - Concept
COM Express Module Standards
The figure below shows the dimensions of the different types of COM Express modules.
KH960 is a COM Express Basic module. Its dimension is 95mm x 125mm.
Common for all Form Factors
Extended only
Basic only
Compact only
Compact and Basic only
Mini only
106.00
Extended
Compact
91.00
Basic
70.00
51.00
Mini
18.00
6.00
0.00
4.00
151.00
121.00
91.00
80.00
74.20
16.50
4.00
0.00
8
Chapter 2 Concept
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Chapter 2
PICMG® COM.0
COM Express® Module Base Specification
Revision 2.1
3
Required and
Optional Features
Specification
Comparison
Table
3.2
Module Pin-out Types 1-6 & 10 - Required and Optional Features
TheCOM
tableExpress
below shows
the and
COMOptional
Expressfeatures
standard
and
corresponding
specifications
supported on the KH960 module.
Required
arespecifications
summarized in
thethe
following
table. The
fea
Minimum (Min.) shall be implemented by all Modules. Features identified up to Maximum (M
implemented
a Module.
Module
Pin-out - by
Required
and Optional Features A-B Connector.
Change Key:
Connector
Table 3.2: Module Pin-out - Required and Optional Features A-B Connector
Connector
Feature
COM Express Module Base
Specification Type 6
DFI KH960
Type 6
A-B
PCI Express Lanes 0 - 5
1/6
6
A-B
LVDS Channel A
0/1
1
A-B
LVDS Channel B
0/1
1
A-B
eDP on LVDS CH A pins
0/1
1
A-B
VGA Port
0/1
1
A-B
TV-Out
NA
NA
A-B
DDI 0
NA
NA
A-B5
A-B
Serial Ports 1 - 2
0/2
2
CAN interface on SER1
0/1
0
A-B
SATA / SAS Ports
1/4
4
A-B
AC’97 / HDA Digital Interface
0/1
1
A-B
USB 2.0 Ports
4/8
8
A-B
USB Client
0/1
0
A-B
USB 3.0 Ports
NA
NA
A-B
LAN Port 0
1/1
1
A-B
Express Card Support
1/2
2
A-B
LPC Bus
1/1
1
A-B
SPI
1/2
1
SDIO (muxed on GPIO)
0/1
NA
A-B6
A-B
Thermal Protection
0/1
1
A-B
Battery Low Alarm
A-B
Connector
A-B
Suspend/Wake Signals
Feature
Power Button Support
0COM
/ 1 Express Module Base
Type 6
0Specification
/3
1DFI KH960
2Type 6
Power Good
A-B
A-B
5
A-B
A-B
VCC_5V_SBY Contacts
1/1
(No IDE or PCI, add DDI+ USB3) Min
1/1
/ Max
4 / 4 Power Management
00 // 11
1
A-B
5
A-B
A-B
5
A-B
A-B
A-B
A-B
A-B
A-B
A-B
A-B
A-B
C-D
A-B
1/1
12
4 //412
VCC_12V Contacts
Muxed SDVO Channels 1 - 2
Feature
PCI
Express Lanes 6 - 15
PCI Bus - 32 Bit
General Purpose I/O
8/8
8
SMBus
1/1
1
A-B
I2C
1/1
1
A-B
Watchdog Timer
0/1
1
A-B
Speaker Out
1/1
1
6
C-D
C-D6
C-D
A-B
External BIOS ROM Support
0/2
1
C-D
A-B
Reset Functions
1/1
1
Specification Type 6
Power Good
VCC_12V
Contacts
VCC_5V_SBY
Contacts
PCI Express Graphics (PEG)
C-D6
Connector
A-B
COMVCC_12V
Express Module
Base
Indicates 12V-tolerant features on former
signals.
01 // 11
PCI Express
Lanes 16 -- Required
31
Table 3.3: Module
Pin-out
C-D
PATA Port
LAN
Ports 1 -Lanes
2
PCI Express
16 - 31
DDIs
1 - 3 Graphics (PEG)
PCI Express
4
11
11
12
11 (optional)
Power
1
12
4
DFI KH960
Type 6
• 6 Cells
in the connected
columns spanning rows provide a rough approximation of features
Connector
Feature
(No IDE or PCI, add DDI+ USB3) Min
sharing connector pins.
COM
0 / 1 Express Module Base
Specification Type 6
0/2
DFI
1 KH960
Type 6
1
0/1
Features
(No IDE orC-D
PCI,Connector.
add DDI+ USB3) Min
Power
/ Max
12 / 12 System I/O
0 / 16
and
Optional Features
0COM
/ 1 Express Module Base
Specification Type 6
NA
1 (optional)
12
16
C-D Connector
0/2
(No IDE or PCI, add DDI+ USB3) Min
NA
/ Max
NA
System I/O
NA
0 / 16
1DFI KH960
Type 6
NA
2
NA
NA
NA
16
31 (DDI3 option)
USB
3.0SDVO
Ports Channels 1 - 2
Muxed
00 // 31
0NA
/4
PCI Express Lanes 6 - 15
VCC_12V
PCI Bus - Contacts
32 Bit
0/2
12
NA/ 12
PATA Port
NA
NA
LAN Ports 1 - 2
NA
NA
DDIs 1 - 3
0/3
3 (DDI3 option)
C-D6
C-D
USB 3.0 Ports
0/4
C-D
VCC_12V Contacts
5 Cells in the connected columns spanning rows provide a rough approximation of features sharing connector pins.
•
00 // 11
00 // 23
Fan
Control Signals
Suspend/Wake
Signals
Trusted
Platform
Modules
Power Button
Support
Lid Input
A-B5
Fan Control Signals
A-B5
Connector
Feature
A-B
Trusted
Platform Modules
Module
Pin-out
- Required
and Optional
4 Indicates 12V-tolerant features on former VCC_12V signals.
5
Sleep
Input
Thermal
Protection
Lid
InputLow Alarm
Battery
1
Table
3.3: Module
Pin-out - Required and
Sleep Input
0 / 1Optional Features C-D Connector
1
A-B5
System Management
A-B
(No IDE or PCI, add DDI+ USB3) Min
/ Max
Power Management
A-B
(No IDE or PCI, add DDI+ USB3) Min
/ Max
System I/O
A-B
Feature
DFI KH960
Type 6
COM Express Module Base
Specification Type 6
Power
4NA
2
12
NA
4
Power
12 / 12
12
/ Max
Power Management
A-B
A-B
Thermal Protection
0/1
1
A-B
Battery Low Alarm
0/1
1
9
Chapter 2 Concept
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Chapter 3
Chapter 3 - Hardware Installation
Block Diagram
Board Layout
Intel
Processor
(optional)
CORE CORE CORE CORE
eDP
LVDS
Intel
DDR4_2 SODIMM
Standby
CPUPower
fan LED
DDR4_1 SODIMM
BGA 1440
Xeon® E3
Core™ i7/i5/i3
PTN3460
VGA
7th Generation
Intel® Xeon® E3
Core™ i7/i5/i3
Graphics
CORE
CH7517
Memory
Controller
DMI
DDR4 2400MHz
SODIMM
Channel A
Channel B
DDR4 2400MHz
SODIMM
PCIe x16 (PEG)
DDI Port 1
DDI Port 2
DDI Port 3 (optional)
LPC Bus
PTN3460BS
Serial Port 0,1
CM238/QM175/HM175
CPU fan
SLP/LID
1
TPM 1.2
WDT
A/B
SPI Flash BIOS
Top View
I2C Bus
Embedded (optional)
Controller
IT8528E
USB 3.0 4x
C/D
Chrontel
CH7517A-BF
Intel
I219LM
Standby
Power LED
Fan PWM/
TACH_IN
EEPROM
8-bit DIO
Mobile
TCA6408A
SMBus
Intel® CM238/QM175/HM175
Chipset
PCIe (4 x1/1 x4)
PCIe (2 x1/1 x2)
PCIe (2 x1/1 x2)
MDI
iTE
IT8528E
Intel® GLAN
I219LM
PCIe x1
USB 2.0 8x
SATA 3.0 4x
HDA
SPI Bus
TPM
(optional)
SPI Flash
D1
D110
COM Express connector
C1
B1
C110
B110
COM Express connector
A110
A1
Bottom View
10
Chapter 3 Hardware Installation
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Chapter 3
Mechanical Diagram
KH960
Heat Sink and Fan
91.00
87.00
150±5.0
19.00
70.00
36.00
30.20±0.1
4.00
87.00
45.41
11.46
121.00
117.00
115.00
100.78
76.00
0.00
4.00
12.60
0.00
4.00
4.00
76.00±0.1
41.00±0.10
20.00
30.00
8.00
2.50
6.58
3.00
10.00
12.00
0.00
0.00
14.00
11
Chapter 3 Hardware Installation
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Chapter 3
Installing the DIMM Module
Important:
Electrostatic discharge (ESD) can damage your board, processor, disk drives, add-in
boards, and other components. Perform installation procedures at an ESD workstation
only. If such a station is not available, you can provide some ESD protection by wearing an antistatic wrist strap and attaching it to a metal part of the system chassis. If
a wrist strap is unavailable, establish and maintain contact with the system chassis
throughout any procedures requiring ESD protection.
Note:
The system board used in the following illustrations may not resemble the actual one.
These illustrations are for reference only.
1. Check to see if the module is a non-ECC DDR4 SODIMM module.
System Memory
2. Make sure the PC and all other peripheral devices connected to it has been powered down.
3. Disconnect all power cords and cables.
The system board is equipped with two 260-pin SODIMM sockets that support non-ECC DDR4
memory modules.
4. Locate the SODIMM socket on the system board.
5. Note the key on the socket. The key ensures that the module can be plugged into the
socket in only one direction.
Important:
When the Standby Power LED is red, it indicates that there is power on the board.
Power off the PC then unplug the power cord prior to installing any devices. Failure to
do so will cause severe damage to the board and components.
DDR4_1
DDR4_2
Standby
Power LED
12
Chapter 3 Hardware Installation
Chapter 3
Connectors
6. Grasp the module by its edges and align the memory module key with the memory socket
key. Grasp the module by its edges and align the memory’s notch with the socket’s notch;
then insert the memory into the socket at an angle and push it down until you feel a click.
CPU Fan Connector
Memory module
Key
Sense
+12V
Ground
1
3
Connect the CPU fan’s cable connector to the CPU fan connector on the board. The cooling fan
will provide adequate airflow throughout the chassis to prevent overheating the CPU and board
components.
BIOS Setting
The “Super IO Configuration” submenu in the Advanced menu of the BIOS will display the current speed of the cooling fan. Refer to chapter 4 for more information.
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Chapter 3 Hardware Installation
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Chapter 3
Signal Descriptions
4.6.7
Type 6
Modules implementing Pin-out Type 6 shall use the pin-out shown in this table. Refer to
Table 3.2 for minimum requirements and Table 3.4 for the order in which interfaces shall be
implemented.
COM Express Connectors
Table 4.45: Pin List for Pin-out Type 6
The COM Express connectors are used to interface the KH960 COM Express board to a carrier
board. Connect the COM Express connectors (located on the solder side of the board) to the
COM Express connectors on the carrier board.
Pin
Refer to the “Installing KH960 onto a Carrier Board” section for more information.
COM Express Connectors
Refer to the following pages for the pin functions of these connectors.
Row A
Row B
Row C
Row D
1
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
2
GBE0_MDI3-
GBE0_ACT#
GND
GND
3
GBE0_MDI3+
LPC_FRAME#
USB_SSRX0-
USB_SSTX0-
4
GBE0_LINK100#
LPC_AD0
USB_SSRX0+
USB_SSTX0+
5
GBE0_LINK1000#
LPC_AD1
GND
GND
6
GBE0_MDI2-
LPC_AD2
USB_SSRX1-
USB_SSTX1-
7
GBE0_MDI2+
LPC_AD3
USB_SSRX1+
USB_SSTX1+
8
GBE0_LINK#
LPC_DRQ0#
GND
GND
9
GBE0_MDI1-
LPC_DRQ1#
USB_SSRX2-
USB_SSTX2-
10
GBE0_MDI1+
LPC_CLK
USB_SSRX2+
USB_SSTX2+
11
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
12
GBE0_MDI0-
PWRBTN#
USB_SSRX3-
USB_SSTX3-
13
GBE0_MDI0+
SMB_CK
USB_SSRX3+
USB_SSTX3+
14
GBE0_CTREF
SMB_DAT
GND
GND
15
SUS_S3#
SMB_ALERT#
DDI1_PAIR6+
DDI1_CTRLCLK_AUX+
16
SATA0_TX+
SATA1_TX+
DDI1_PAIR6-
DDI1_CTRLDATA_AUX-
17
SATA0_TX-
SATA1_TX-
RSVD19
RSVD19
18
SUS_S4#
SUS_STAT#
RSVD19
RSVD19
19
SATA0_RX+
SATA1_RX+
PCIE_RX6+
PCIE_TX6+
20
SATA0_RX-
SATA1_RX-
PCIE_RX6-
PCIE_TX6-
21
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
22
SATA2_TX+
SATA3_TX+
PCIE_RX7+
PCIE_TX7+
23
SATA2_TX-
SATA3_TX-
PCIE_RX7-
PCIE_TX7-
24
SUS_S5#
PWR_OK
DDI1_HPD
RSVD19
25
SATA2_RX+
SATA3_RX+
DDI1_PAIR4 +
RSVD19
26
SATA2_RX-
SATA3_RX-
DDI1_PAIR4-
DDI1_PAIR0+
27
BATLOW#
WDT
RSVD19
DDI1_PAIR0-
28
(S)ATA_ACT#
AC/HDA_SDIN2
RSVD19
RSVD19
29
AC/HDA_SYNC
AC/HDA_SDIN1
DDI1_PAIR5+
DDI1_PAIR1+
30
AC/HDA_RST#
AC/HDA_SDIN0
DDI1_PAIR5-
DDI1_PAIR1-
31
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
32
AC/HDA_BITCLK
SPKR
DDI2_CTRLCLK_AUX+
DDI1_PAIR2+
33
AC/HDA_SDOUT
I2C_CK
DDI2_CTRLDATA_AUX-
DDI1_PAIR2-
34
BIOS_DIS0#
I2C_DAT
DDI2_DDC_AUX_SEL
DDI1_DDC_AUX_SEL
35
THRMTRIP#
THRM#
RSVD19
RSVD19
36
USB6-
USB7-
DDI3_CTRLCLK_AUX+
DDI1_PAIR3+
37
USB6+
USB7+
DDI3_CTRLDATA_AUX-
DDI1_PAIR3-
38
USB_6_7_OC#
USB_4_5_OC#
DDI3_DDC_AUX_SEL
RSVD19
39
USB4-
USB5-
DDI3_PAIR0+
DDI2_PAIR0+
40
USB4+
USB5+
DDI3_PAIR0-
DDI2_PAIR0-
41
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
19 RSVD pins are reserved for future use and should be no connect. Do not tie the RSVD pins together.
87
PICMG® COM.0 Revision 2.1 COM Express® Base Specification, Mar 28, 2012
Revision 2.1 - Draft 0.92 / Copyright PICMG (file PICMG_COM_0_R2_1_D092.odt)
DRAFT Version - Do Not Design To/Do Not Claim Compliance To/Do Not Distribute This Document
14
Chapter 3 Hardware Installation
www.dfi.com
Chapter 3
COMSignal
Express
Connectors-Continued
Descriptions
Pin
Row A
Row B
Signal Descriptions
Row C
Row D
Pin
Row A
Row B
Row C
Row D
42
USB2-
USB3-
DDI3_PAIR1+
DDI2_PAIR1+
91
SPI_POWER
VGA_GRN
PEG_RX12+
PEG_TX12+
43
USB2+
USB3+
DDI3_PAIR1-
DDI2_PAIR1-
92
SPI_MISO
VGA_BLU
PEG_RX12-
PEG_TX12-
44
USB_2_3_OC#
USB_0_1_OC#
DDI3_HPD
DDI2_HPD
93
GPO0
VGA_HSYNC
GND
GND
45
USB0-
USB1-
RSVD19
RSVD19
94
SPI_CLK
VGA_VSYNC
PEG_RX13+
PEG_TX13+
46
USB0+
USB1+
DDI3_PAIR2+
DDI2_PAIR2+
95
SPI_MOSI
VGA_I2C_CK
PEG_RX13-
PEG_TX13-
47
VCC_RTC
EXCD1_PERST#
DDI3_PAIR2-
DDI2_PAIR2-
96
TPM_PP
VGA_I2C_DAT
GND
GND
19
19
97
TYPE10#
SPI_CS#
RSVD19
RSVD19
98
SER0_TX
RSVD19
PEG_RX14+
PEG_TX14+
RSVD
48
EXCD0_PERST#
EXCD1_CPPE#
RSVD
49
EXCD0_CPPE#
SYS_RESET#
DDI3_PAIR3+
DDI2_PAIR3+
50
LPC_SERIRQ
CB_RESET#
DDI3_PAIR3-
DDI2_PAIR3-
99
SER0_RX
RSVD19
PEG_RX14-
PEG_TX14-
51
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
100
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
52
PCIE_TX5+
PCIE_RX5+
PEG_RX0+
PEG_TX0+
101
SER1_TX
FAN_PWMOUT
PEG_RX15+
PEG_TX15+
53
PCIE_TX5-
PCIE_RX5-
PEG_RX0-
PEG_TX0-
102
SER1_RX
FAN_TACHIN
PEG_RX15-
PEG_TX15-
54
GPI0
GPO1
TYPE0#
PEG_LANE_RV#
103
LID#
SLEEP#
GND
GND
55
PCIE_TX4+
PCIE_RX4+
PEG_RX1+
PEG_TX1+
104
VCC_12V
VCC_12V
VCC_12V
VCC_12V
56
PCIE_TX4-
PCIE_RX4-
PEG_RX1-
PEG_TX1-
105
VCC_12V
VCC_12V
VCC_12V
VCC_12V
57
GND
GPO2
TYPE1#
TYPE2#
106
VCC_12V
VCC_12V
VCC_12V
VCC_12V
58
PCIE_TX3+
PCIE_RX3+
PEG_RX2+
PEG_TX2+
107
VCC_12V
VCC_12V
VCC_12V
VCC_12V
59
PCIE_TX3-
PCIE_RX3-
PEG_RX2-
PEG_TX2-
108
VCC_12V
VCC_12V
VCC_12V
VCC_12V
60
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
109
VCC_12V
VCC_12V
VCC_12V
VCC_12V
61
PCIE_TX2+
PCIE_RX2+
PEG_RX3+
PEG_TX3+
110
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
62
PCIE_TX2-
PCIE_RX2-
PEG_RX3-
PEG_TX3-
63
GPI1
GPO3
RSVD19
RSVD19
64
PCIE_TX1+
PCIE_RX1+
RSVD19
RSVD19
65
PCIE_TX1-
PCIE_RX1-
PEG_RX4+
PEG_TX4+
66
GND
WAKE0#
PEG_RX4-
PEG_TX4-
67
GPI2
WAKE1#
RSVD19
GND
68
PCIE_TX0+
PCIE_RX0+
PEG_RX5+
PEG_TX5+
69
PCIE_TX0-
PCIE_RX0-
PEG_RX5-
PEG_TX5-
70
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
71
LVDS_A0+
LVDS_B0+
PEG_RX6+
PEG_TX6+
72
LVDS_A0-
LVDS_B0-
PEG_RX6-
PEG_TX6-
73
LVDS_A1+
LVDS_B1+
GND
GND
74
LVDS_A1-
LVDS_B1-
PEG_RX7+
PEG_TX7+
75
LVDS_A2+
LVDS_B2+
PEG_RX7-
PEG_TX7-
76
LVDS_A2-
LVDS_B2-
GND
GND
77
LVDS_VDD_EN
LVDS_B3+
RSVD19
RSVD19
78
LVDS_A3+
LVDS_B3-
PEG_RX8+
PEG_TX8+
79
LVDS_A3-
LVDS_BKLT_EN
PEG_RX8-
PEG_TX8-
80
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
81
LVDS_A_CK+
LVDS_B_CK+
PEG_RX9+
PEG_TX9+
82
LVDS_A_CK-
LVDS_B_CK-
PEG_RX9-
PEG_TX9-
83
LVDS_I2C_CK
LVDS_BKLT_CTRL
RSVD19
RSVD19
84
LVDS_I2C_DAT
VCC_5V_SBY
GND
GND
85
GPI3
VCC_5V_SBY
PEG_RX10+
PEG_TX10+
86
RSVD19
VCC_5V_SBY
PEG_RX10-
PEG_TX10-
87
eDP_HPD
VCC_5V_SBY
GND
GND
88
PCIE_CLK_REF+
BIOS_DIS1#
PEG_RX11+
PEG_TX11+
89
PCIE_CLK_REF-
VGA_RED
PEG_RX11-
PEG_TX11-
90
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
PICMG® COM.0 Revision 2.1 COM Express® Base Specification, Mar 28, 2012
Revision 2.1 - Draft 0.92 / Copyright PICMG (file PICMG_COM_0_R2_1_D092.odt)
DRAFT Version - Do Not Design To/Do Not Claim Compliance To/Do Not Distribute This Document
88
89
PICMG® COM.0 Revision 2.1 COM Express® Base Specification, Mar 28, 2012
Revision 2.1 - Draft 0.92 / Copyright PICMG (file PICMG_COM_0_R2_1_D092.odt)
DRAFT Version - Do Not Design To/Do Not Claim Compliance To/Do Not Distribute This Document
15
Chapter 3 Hardware Installation
www.dfi.com
Chapter 3
COM Express Connectors Signals and Descriptions
Pin Types
I
Input to the Module
O
Output from the Module
I/O Bi-directional input / output signal
OD Open drain output
RSVD pins are reserved for future use and should be no connect. Do not tie the RSVD pins together.
AC97/HDA Signals and Descriptions
Signal
Pin#
Pin Type
Pwr Rail /Tolerance
KH960 PU/PD
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
AC/HDA_RST#
A30
O CMOS
3.3V Suspend/3.3V
series 33Ω resistor
Reset output to CODEC, active low.
CODEC Reset.
AC/HDA_SYNC
A29
O CMOS
3.3V/3.3V
series 33Ω resistor
Sample-synchronization signal to the CODEC(s).
Serial Sample Rate Synchronization.
Serial data clock generated by the external CODEC(s).
24 MHz Serial Bit Clock for HDA CODEC.
Serial TDM data output to the CODEC.
Audio Serial Data Output Stream.
Serial TDM data inputs from up to 3 CODECs.
Audio Serial Data Input Stream from CODEC[0:2].
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
AC/HDA_BITCLK
A32
I/O CMOS
3.3V/3.3V
series 33Ω resistor
AC/HDA_SDOUT
A33
O CMOS
3.3V/3.3V
series 33Ω resistor
AC/HDA_SDIN0
B30
I/O CMOS
3.3V Suspend/3.3V
AC/HDA_SDIN1
B29
I/O CMOS
3.3V Suspend/3.3V
AC/HDA_SDIN2
B28
I/O CMOS
3.3V Suspend/3.3V
NC
KH960 PU/PD
Gigabit Ethernet Signals and Descriptions
Signal
Pin#
Pin Type
Pwr Rail /Tolerance
GBE0_MDI0+
A13
I/O Analog
3.3V max Suspend
GBE0_MDI0-
A12
I/O Analog
3.3V max Suspend
GBE0_MDI1+
A10
I/O Analog
3.3V max Suspend
GBE0_MDI1-
A9
I/O Analog
3.3V max Suspend
Media Dependent Interface (MDI) differential pair 0.
Gigabit Ethernet Controller 0: Media Dependent Interface Differential
Pairs 0,1,2,3. The MDI can operate in 1000, 100 and 10 Mbit / sec
Media Dependent Interface (MDI) differential pair 1.
modes. Some pairs are unused in some modes, per the following:
1000BASE-T 100BASE-TX 10BASE-T
MDI[0]+/B1_DA+/TX+/TX+/MDI[1]+/B1_DB+/RX+/RX+/- Media Dependent Interface (MDI) differential pair 2.
Only used for 1000Mbit/sec Gigabit Ethernet mode.
MDI[2]+/B1_DC+/MDI[3]+/B1_DD+/-
GBE0_MDI2+
A7
I/O Analog
3.3V max Suspend
GBE0_MDI2-
A6
I/O Analog
3.3V max Suspend
GBE0_MDI3+
A3
I/O Analog
3.3V max Suspend
GBE0_MDI3-
A2
I/O Analog
3.3V max Suspend
GBE0_ACT#
B2
OD CMOS
3.3V Suspend/3.3V
Gigabit Ethernet Controller 0 activity indicator, active low.
Ethernet controller 0 activity indicator, active low.
GBE0_LINK#
A8
OD CMOS
3.3V Suspend/3.3V
Gigabit Ethernet Controller 0 link indicator, active low.
Ethernet controller 0 link indicator, active low.
Ethernet controller 0 100Mbit/sec link indicator, active low.
Media Dependent Interface (MDI) differential pair 3.
Only used for 1000Mbit/sec Gigabit Ethernet mode.
GBE0_LINK100#
A4
OD CMOS
3.3V Suspend/3.3V
Gigabit Ethernet Controller 0 100 Mbit / sec link indicator, active low.
GBE0_LINK1000#
A5
OD CMOS
3.3V Suspend/3.3V
Gigabit Ethernet Controller 0 1000 Mbit / sec link indicator, active low. Ethernet controller 0 1000Mbit/sec link indicator, active low.
REF
GND min 3.3V max
Reference voltage for Carrier Board Ethernet channel 0 magnetics
center
tap. The reference voltage is determined by the requirements of the
Module PHY and may be as low as 0V and as high as 3.3V.
The reference voltage output shall be current limited on the Module.
In
Reference voltage for Carrier Board Ethernet channel 0
magnetics center tap.
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
Serial ATA or SAS Channel 0 transmit differential pair.
Serial ATA channel 0
Transmit output differential pair.
Serial ATA or SAS Channel 0 receive differential pair.
Serial ATA channel 0
Receive input differential pair.
GBE0_CTREF
A14
NC
SATA Signals and Descriptions
Signal
Pin#
Pin Type
Pwr Rail /Tolerance
SATA0_TX+
A16
O SATA
AC coupled on Module
AC Coupling capacitor
KH960 PU/PD
SATA0_TX-
A17
O SATA
AC coupled on Module
AC Coupling capacitor
SATA0_RX+
A19
I SATA
AC coupled on Module
AC Coupling capacitor
SATA0_RX-
A20
I SATA
AC coupled on Module
AC Coupling capacitor
SATA1_TX+
B16
O SATA
AC coupled on Module
AC Coupling capacitor
SATA1_TX-
B17
O SATA
AC coupled on Module
AC Coupling capacitor
Chapter 3 Hardware Installation
16
Serial ATA or SAS Channel 1 transmit differential pair.
Serial ATA channel 1
Transmit output differential pair.
www.dfi.com
GBE0_LINK100#
A4
OD CMOS
3.3V Suspend/3.3V
GBE0_LINK1000#
A5
OD CMOS
3.3V Suspend/3.3V
GBE0_CTREF
A14
REF
GND min 3.3V max
Gigabit Ethernet Controller 0 100 Mbit / sec link indicator, active low.
Chapter
3 0 1000 Mbit / sec link indicator, active low.
Gigabit Ethernet Controller
NC
Ethernet controller 0 100Mbit/sec link indicator, active low.
Ethernet controller 0 1000Mbit/sec link indicator, active low.
Reference voltage for Carrier Board Ethernet channel 0 magnetics
center
tap. The reference voltage is determined by the requirements of the
Module PHY and may be as low as 0V and as high as 3.3V.
The reference voltage output shall be current limited on the Module.
In
Reference voltage for Carrier Board Ethernet channel 0
magnetics center tap.
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
Serial ATA or SAS Channel 0 transmit differential pair.
Serial ATA channel 0
Transmit output differential pair.
Serial ATA or SAS Channel 0 receive differential pair.
Serial ATA channel 0
Receive input differential pair.
Serial ATA or SAS Channel 1 transmit differential pair.
Serial ATA channel 1
Transmit output differential pair.
Serial ATA or SAS Channel 1 receive differential pair.
Serial ATA channel 1
Receive input differential pair.
Serial ATA or SAS Channel 2 transmit differential pair.
Serial ATA channel 2
Transmit output differential pair.
Serial ATA or SAS Channel 2 receive differential pair.
Serial ATA channel 2
Receive input differential pair.
Serial ATA or SAS Channel 3 transmit differential pair.
Serial ATA channel 3
Transmit output differential pair.
Serial ATA or SAS Channel 3 receive differential pair.
Serial ATA channel 3
Receive input differential pair.
ATA (parallel and serial) or SAS activity indicator, active low.
Serial ATA activity LED. Open collector output pin driven during
SATA command activity.
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
PCI Express Differential Transmit Pairs 0
PCIe channel 0. Transmit Output differential pair.
PCI Express Differential Receive Pairs 0
PCIe channel 0. Receive Input differential pair.
PCI Express Differential Transmit Pairs 1
PCIe channel 1. Transmit Output differential pair.
PCI Express Differential Receive Pairs 1
PCIe channel 1. Receive Input differential pair.
PCI Express Differential Transmit Pairs 2
PCIe channel 2. Transmit Output differential pair.
PCI Express Differential Receive Pairs 2
PCIe channel 2. Receive Input differential pair.
PCI Express Differential Transmit Pairs 3
PCIe channel 3. Transmit Output differential pair.
PCI Express Differential Receive Pairs 3
PCIe channel 3. Receive Input differential pair.
SATA Signals and Descriptions
Signal
Pin#
Pin Type
Pwr Rail /Tolerance
SATA0_TX+
A16
O SATA
AC coupled on Module
AC Coupling capacitor
KH960 PU/PD
SATA0_TX-
A17
O SATA
AC coupled on Module
AC Coupling capacitor
SATA0_RX+
A19
I SATA
AC coupled on Module
AC Coupling capacitor
SATA0_RX-
A20
I SATA
AC coupled on Module
AC Coupling capacitor
SATA1_TX+
B16
O SATA
AC coupled on Module
AC Coupling capacitor
SATA1_TX-
B17
O SATA
AC coupled on Module
AC Coupling capacitor
SATA1_RX+
B19
I SATA
AC coupled on Module
AC Coupling capacitor
SATA1_RX-
B20
I SATA
AC coupled on Module
AC Coupling capacitor
SATA2_TX+
A22
O SATA
AC coupled on Module
AC Coupling capacitor
SATA2_TX-
A23
O SATA
AC coupled on Module
AC Coupling capacitor
SATA2_RX+
A25
I SATA
AC coupled on Module
AC Coupling capacitor
SATA2_RX-
A26
I SATA
AC coupled on Module
AC Coupling capacitor
SATA3_TX+
B22
O SATA
AC coupled on Module
AC Coupling capacitor
SATA3_TX-
B23
O SATA
AC coupled on Module
AC Coupling capacitor
SATA3_RX+
B25
I SATA
AC coupled on Module
AC Coupling capacitor
SATA3_RX-
B26
I SATA
AC coupled on Module
AC Coupling capacitor
(S)ATA_ACT#
A28
I/O CMOS
3.3V / 3.3V
PU 10K to 3.3V
PCI Express Lanes Signals and Descriptions
Signal
Pin#
PCIE_TX0+
A68
PCIE_TX0-
A69
PCIE_RX0+
B68
PCIE_RX0-
B69
PCIE_TX1+
A64
PCIE_TX1-
A65
PCIE_RX1+
B64
PCIE_RX1-
B65
PCIE_TX2+
A61
PCIE_TX2-
A62
PCIE_RX2+
B61
PCIE_RX2-
B62
PCIE_TX3+
A58
PCIE_TX3-
A59
PCIE_RX3+
B58
PCIE_RX3-
B59
PCIE_TX4+
A55
PCIE_TX4-
A56
Chapter 3 Hardware Installation
Pin Type
Pwr Rail /Tolerance
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
KH960 PU/PD
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
17
O PCIE
AC coupled on Module
AC Coupling capacitor
AC Coupling capacitor
PCI Express Differential Transmit Pairs 4
PCIe channel 4. Transmit Output differential pair.
www.dfi.com
PCIE_TX2+
SATA3_TXPCIE_TX2SATA3_RX+
PCIE_RX2+
SATA3_RXPCIE_RX2-
A61
B23
A62
B25
B61
B26
B62
(S)ATA_ACT#
PCIE_TX3+
A28
A58
PCIE_TX3-
A59
PCIE_RX3+
Signal
B58
Pin#
PCIE_RX3PCIE_TX0+
B59
A68
PCIE_TX4+
PCIE_TX0-
A55
A69
PCIE_TX4PCIE_RX0+
A56
B68
PCIE_RX4+
PCIE_RX0-
B55
B69
PCIE_RX4PCIE_TX1+
B56
A64
PCIE_TX5+
PCIE_TX1-
A52
A65
PCIE_TX5PCIE_RX1+
A53
B64
PCIE_RX5+
PCIE_RX1-
B52
B65
PCIE_RX5PCIE_TX2+
B53
A61
PCIE_TX6+
PCIE_TX2-
D19
A62
PCIE_TX6PCIE_RX2+
D20
B61
PCIE_RX6+
PCIE_RX2-
C19
B62
PCIE_RX6PCIE_TX3+
C20
A58
PCIE_TX7+
PCIE_TX3-
D22
A59
PCIE_TX7PCIE_RX3+
D23
B58
PCIE_RX7+
PCIE_RX3-
C22
B59
PCIE_RX7PCIE_TX4+
C23
A55
PCIE_CLK_REF+
PCIE_TX4-
A88
A56
PCIE_CLK_REFPCIE_RX4+
A89
B55
PCIE_RX4-
B56
PCIE_TX5+
Signal
PCIE_TX5PEG_TX0+
PCIE_RX5+
PEG_TX0PCIE_RX5PEG_RX0+
PCIE_TX6+
PEG_RX0PCIE_TX6PEG_TX1+
PCIE_RX6+
PEG_TX1PCIE_RX6PEG_RX1+
PCIE_TX7+
PEG_RX1PCIE_TX7PEG_TX2+
PCIE_RX7+
PEG_TX2PCIE_RX7PEG_RX2+
PCIE_CLK_REF+
PEG_RX2PCIE_CLK_REFPEG_TX3+
A52
Pin#
A53
D52
B52
D53
B53
C52
D19
C53
D20
D55
C19
D56
C20
C55
D22
C56
D23
D58
C22
D59
C23
C58
A88
C59
A89
D61
PEG_TX3-
D62
O SATA
PCIE
O
AC coupled
coupled on
on Module
Module
AC
I SATA
AC coupled on Module
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
PCIE
II SATA
AC coupled
coupled on
off Module
Module
AC
AC Coupling capacitor
I/O CMOS
3.3V / 3.3V
O PCIE
AC coupled on Module
PU 10K to 3.3V
AC Coupling capacitor
PCI Express Lanes Signals and Descriptions
Pin Type
I PCIE
Pwr Rail /Tolerance
AC coupled off Module
C61
C62
Pin#
Chapter 3 Hardware Installation
Serial ATA or SAS Channel 3 receive differential pair.
PCI Express Differential Receive Pairs 2
Serial ATA channel 3
Receive input differential pair.
PCIe channel 2. Receive Input differential pair.
Chapter 3
PCI Express Differential Transmit Pairs 3
Serial ATA activity LED. Open collector output pin driven during
SATA command activity.
PCIe channel 3. Transmit Output differential pair.
Module Base Specification R2.1 Description
PCI Express Differential Receive Pairs 3
COM Express Carrier Design Guide R2.0 Description
PCIe channel 3. Receive Input differential pair.
PCI Express Differential Transmit Pairs 0
PCIe channel 0. Transmit Output differential pair.
PCI Express Differential Transmit Pairs 4
PCIe channel 4. Transmit Output differential pair.
ATA (parallel and serial) or SAS activity indicator, active low.
AC coupled on Module
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
PCI Express Differential Receive Pairs 0
PCIe channel 0. Receive Input differential pair.
I PCIE
AC coupled off Module
PCI Express Differential Receive Pairs 4
PCIe channel 4. Receive Input differential pair.
PCI Express Differential Transmit Pairs 1
PCIe channel 1. Transmit Output differential pair.
PCI Express Differential Transmit Pairs 5
PCIe channel 5. Transmit Output differential pair.
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
O PCIE
AC coupled on Module
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
PCI Express Differential Receive Pairs 1
PCIe channel 1. Receive Input differential pair.
I PCIE
AC coupled off Module
PCI Express Differential Receive Pairs 5
PCIe channel 5. Receive Input differential pair.
PCI Express Differential Transmit Pairs 2
PCIe channel 2. Transmit Output differential pair.
PCI Express Differential Transmit Pairs 6
PCIe channel 6. Transmit Output differential pair.
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
O PCIE
AC coupled on Module
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
PCI Express Differential Receive Pairs 2
PCIe channel 2. Receive Input differential pair.
I PCIE
AC coupled off Module
PCI Express Differential Receive Pairs 6
PCIe channel 6. Receive Input differential pair.
PCI Express Differential Transmit Pairs 3
PCIe channel 3. Transmit Output differential pair.
PCI Express Differential Transmit Pairs 7
PCIe channel 7. Transmit Output differential pair.
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
O PCIE
AC coupled on Module
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
PCI Express Differential Receive Pairs 3
PCIe channel 3. Receive Input differential pair.
I PCIE
AC coupled off Module
PCI Express Differential Receive Pairs 7
PCIe channel 7. Receive Input differential pair.
PCI Express Differential Transmit Pairs 4
Reference clock output for all PCI Express and PCI Express Graphics
lanes.
PCIe channel 4. Transmit Output differential pair.
PCIe Reference Clock for all COM Express PCIe lanes, and for
PEG lanes.
PCI Express Differential Receive Pairs 4
PCIe channel 4. Receive Input differential pair.
PCI
Express
Transmit
Pairs 5
Module
BaseDifferential
Specification
R2.1 Description
PCIe
Transmit
Output
differential
pair.
COM channel
Express 5.
Carrier
Design
Guide
R2.0 Description
PCI Express Graphics transmit differential pairs 0
PCI Express Differential Receive Pairs 5
PEG channel 0, Transmit Output differential pair.
PCIe channel 5. Receive Input differential pair.
PCI Express Graphics receive differential pairs 0
PCI Express Differential Transmit Pairs 6
PEG channel 0, Receive Input differential pair.
PCIe channel 6. Transmit Output differential pair.
PCI Express Graphics transmit differential pairs 1
PCI Express Differential Receive Pairs 6
PEG channel 1, Transmit Output differential pair.
PCIe channel 6. Receive Input differential pair.
PCI Express Graphics receive differential pairs 1
PCI Express Differential Transmit Pairs 7
PEG channel 1, Receive Input differential pair.
PCIe channel 7. Transmit Output differential pair.
PCI Express Graphics transmit differential pairs 2
PCI Express Differential Receive Pairs 7
PEG channel 2, Transmit Output differential pair.
PCIe channel 7. Receive Input differential pair.
PCI Express
Graphics
Reference
clock
outputreceive
for all differential
PCI Expresspairs
and 2PCI Express Graphics
lanes.
PEG channel
2, Clock
Receive
differential
PCIe
Reference
forInput
all COM
Express pair.
PCIe lanes, and for
PEG lanes.
PCI Express Graphics transmit differential pairs 3
PEG channel 3, Transmit Output differential pair.
O PCIE
AC coupled on Module
O PCIE
PCIE
I PCIE
AC coupled off Module
O
PinPCIE
Type
AC
on Module
Pwrcoupled
Rail /Tolerance
O PCIE
I PCIE
AC coupled on Module
AC coupled off Module
I PCIE
O PCIE
AC coupled off Module
AC coupled on Module
O PCIE
I PCIE
AC coupled on Module
AC coupled off Module
I PCIE
O PCIE
AC coupled off Module
AC coupled on Module
O PCIE
I PCIE
AC coupled on Module
AC coupled off Module
I PCIE
O PCIE
AC coupled off Module
PCIE
O PCIE
AC coupled on Module
PEG Signals and Descriptions
PEG_RX3-
KH960 PU/PD
AC Coupling capacitor
Serial ATA channel 3
Transmit
output
pair. differential pair.
PCIe channel
2. differential
Transmit Output
O PCIE
PEG Signals and Descriptions
PEG_RX3+
Signal
AC Coupling capacitor
Serial ATA or SAS Channel 3 transmit differential pair.
PCI Express Differential Transmit Pairs 2
Pin
Type
I PCIE
Pwr
Rail /Tolerance
AC coupled
off Module
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
KH960 PU/PD
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
KH960 PU/PD
18
Module
Base Graphics
Specification
R2.1
Description
PCI Express
receive
differential
pairs 3
COM
Express 3,
Carrier
Design
Guide
R2.0 Description
PEG channel
Receive
Input
differential
pair.
www.dfi.com
PEG_RX1+
PCIE_RX7+
C55
C22
PEG_RX1PCIE_RX7-
C56
C23
PEG_TX2+
PCIE_CLK_REF+
D58
A88
PEG_TX2PCIE_CLK_REF-
D59
A89
PEG_RX2+
C58
PEG_RX2PEG Signals
C59
and Descriptions
Signal
PEG_TX3+
Pin#
D61
PEG_TX0+
PEG_TX3-
D52
D62
PEG_TX0PEG_RX3+
D53
C61
PEG_RX0+
PEG_RX3-
C52
C62
PEG_RX0PEG_TX4+
C53
D65
PEG_TX1+
PEG_TX4-
D55
D66
PEG_TX1PEG_RX4+
D56
C65
PEG_RX1+
PEG_RX4-
C55
C66
PEG_RX1PEG_TX5+
C56
D68
PEG_TX2+
PEG_TX5-
D58
D69
PEG_TX2PEG_RX5+
D59
C68
PEG_RX2+
PEG_RX5-
C58
C69
PEG_RX2PEG_TX6+
C59
D71
PEG_TX3+
PEG_TX6-
D61
D72
PEG_TX3PEG_RX6+
D62
C71
PEG_RX3+
PEG_RX6-
C61
C72
PEG_RX3PEG_TX7+
C62
D74
PEG_TX4+
PEG_TX7-
D65
D75
PEG_TX4PEG_RX7+
D66
C74
PEG_RX4+
PEG_RX7-
C65
C75
PEG_RX4PEG_TX8+
C66
D78
PEG_TX5+
PEG_TX8-
D68
D79
PEG_TX5PEG_RX8+
D69
C78
PEG_RX5+
PEG_RX8-
C68
C79
PEG_RX5PEG_TX9+
C69
D81
PEG_TX6+
PEG_TX9-
D71
D82
PEG_TX6PEG_RX9+
D72
C81
PEG_RX6+
PEG_RX9-
C71
C82
PEG_RX6PEG_TX10+
C72
D85
PEG_TX7+
PEG_TX10-
D74
D86
PEG_TX7PEG_RX10+
D75
C85
PEG_RX7+
PEG_RX10-
C74
C86
PEG_RX7PEG_TX11+
C75
D88
PEG_TX8+
PEG_TX11-
D78
D89
PEG_TX8PEG_RX11+
D79
C88
PEG_RX8+
PEG_RX11-
C78
C89
PEG_RX8PEG_TX12+
C79
D91
Chapter 3 Hardware Installation
PEG_TX9+
PEG_TX12-
D81
D92
II PCIE
PCIE
AC
AC coupled
coupled off
off Module
Module
O
O PCIE
PCIE
AC
coupled on Module
PCIE
I PCIE
AC coupled off Module
Pin Type
O PCIE
Pwr Rail /Tolerance
AC coupled on Module
AC Coupling capacitor
AC Coupling capacitor
KH960 PU/PD
AC Coupling
capacitor
AC Coupling capacitor
PCI Express
Express Differential
Graphics receive
Chapter
3Receivedifferential
PCI
Pairs 7 pairs 1
PEG
PCIe channel
channel 1,
7. Receive
Receive Input
Input differential
differential pair.
pair.
Reference
outputtransmit
for all PCI
Express pairs
and PCI
PCI Expressclock
Graphics
differential
2 Express Graphics
lanes.
PCIe channel
Reference
Clock for Output
all COMdifferential
Express PCIe
PEG
2, Transmit
pair.lanes, and for
PEG lanes.
PCI Express Graphics receive differential pairs 2
PEG channel 2, Receive Input differential pair.
Module Base Specification R2.1 Description
PCI Express Graphics transmit differential pairs 3
COM Express Carrier Design Guide R2.0 Description
PEG channel 3, Transmit Output differential pair.
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
I PCIE
AC coupled off Module
O PCIE
AC coupled on Module
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
PCI Express Graphics receive differential pairs 4
PEG channel 4, Receive Input differential pair.
I PCIE
AC coupled off Module
PCI Express Graphics receive differential pairs 1
PEG channel 1, Receive Input differential pair.
O PCIE
AC coupled on Module
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
I PCIE
AC coupled off Module
O PCIE
AC coupled on Module
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
PCI Express Graphics receive differential pairs 6
PEG channel 6, Receive Input differential pair.
I PCIE
AC coupled off Module
PCI Express Graphics receive differential pairs 3
PEG channel 3, Receive Input differential pair.
O PCIE
AC coupled on Module
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
I PCIE
AC coupled off Module
O PCIE
AC coupled on Module
O PCIE
AC coupled on Module
I PCIE
I PCIE
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
PCI Express Graphics transmit differential pairs 0
PEG channel 0, Transmit Output differential pair.
PCI Express Graphics receive differential pairs 3
PEG channel 3, Receive Input differential pair.
PCI Express Graphics receive differential pairs 0
PEG channel 0, Receive Input differential pair.
PCI Express Graphics transmit differential pairs 4
PEG channel 4, Transmit Output differential pair.
PCI Express Graphics transmit differential pairs 1
PEG channel 1, Transmit Output differential pair.
PCI Express Graphics transmit differential pairs 5
PEG channel 5, Transmit Output differential pair.
PCI Express Graphics transmit differential pairs 2
PEG channel 2, Transmit Output differential pair.
PCI Express Graphics receive differential pairs 5
PEG channel 5, Receive Input differential pair.
PCI Express Graphics receive differential pairs 2
PEG channel 2, Receive Input differential pair.
PCI Express Graphics transmit differential pairs 6
PEG channel 6, Transmit Output differential pair.
PCI Express Graphics transmit differential pairs 3
PEG channel 3, Transmit Output differential pair.
PCI Express Graphics transmit differential pairs 7
PEG channel 7, Transmit Output differential pair.
PCI Express Graphics transmit differential pairs 4
PEG channel 4, Transmit Output differential pair.
PCI Express Graphics receive differential pairs 7
PEG channel 7, Receive Input differential pair.
PCI Express Graphics receive differential pairs 4
PEG channel 4, Receive Input differential pair.
PCI Express Graphics transmit differential pairs 8
PEG channel 8, Transmit Output differential pair.
PCI Express Graphics transmit differential pairs 5
PEG channel 5, Transmit Output differential pair.
AC coupled off Module
PCI Express Graphics receive differential pairs 8
PEG channel 8, Receive Input differential pair.
AC coupled off Module
PCI Express Graphics receive differential pairs 5
PEG channel 5, Receive Input differential pair.
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
PCI Express Graphics transmit differential pairs 9
PEG channel 9, Transmit Output differential pair.
PCI Express Graphics transmit differential pairs 6
PEG channel 6, Transmit Output differential pair.
O PCIE
AC coupled on Module
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
PCI Express Graphics receive differential pairs 9
PEG channel 9, Receive Input differential pair.
I PCIE
AC coupled off Module
PCI Express Graphics receive differential pairs 6
PEG channel 6, Receive Input differential pair.
O PCIE
AC coupled on Module
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
PCI Express Graphics receive differential pairs 10
PEG channel 10, Receive Input differential pair.
I PCIE
AC coupled off Module
PCI Express Graphics receive differential pairs 7
PEG channel 7, Receive Input differential pair.
O PCIE
AC coupled on Module
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
PCI Express Graphics receive differential pairs 11
PEG channel 11, Receive Input differential pair.
I PCIE
AC coupled off Module
PCI Express19
Graphics receive differential pairs 8
PEG channel 8, Receive Input differential pair.
O PCIE
AC coupled on Module
PCI Express Graphics transmit differential pairs 12
PEG channel 12, Transmit Output differential pair.
O PCIE
AC coupled on Module
PCI Express Graphics transmit differential pairs 9
PEG channel 9, Transmit Output differential pair.
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
PCI Express Graphics transmit differential pairs 10
PEG channel 10, Transmit Output differential pair.
PCI Express Graphics transmit differential pairs 7
PEG channel 7, Transmit Output differential pair.
PCI Express Graphics transmit differential pairs 11
PEG channel 11, Transmit Output differential pair.
PCI Express Graphics transmit differential pairs 8
PEG channel 8, Transmit Output differential pair.
www.dfi.com
PCIE_RX7+
PEG_TX10+
C22
D85
PCIE_RX7PEG_TX10-
C23
D86
PCIE_CLK_REF+
PEG_RX10+
A88
C85
PCIE_CLK_REFPEG_RX10-
A89
C86
PEG_TX11+
PEG Signals
PEG_TX11-
D88
and Descriptions
D89
Signal
PEG_RX11+
Pin#
C88
PEG_TX0+
PEG_RX11-
D52
C89
PEG_TX0PEG_TX12+
D53
D91
PEG_RX0+
PEG_TX12-
C52
D92
PEG_RX0PEG_RX12+
C53
C91
PEG_TX1+
PEG_RX12-
D55
C92
PEG_TX1PEG_TX13+
D56
D94
PEG_RX1+
PEG_TX13-
C55
D95
PEG_RX1PEG_RX13+
C56
C94
PEG_TX2+
PEG_RX13-
D58
C95
PEG_TX2PEG_TX14+
D59
D98
PEG_RX2+
PEG_TX14-
C58
D99
PEG_RX2PEG_RX14+
C59
C98
PEG_TX3+
PEG_RX14-
D61
C99
PEG_TX3PEG_TX15+
D62
D101
PEG_RX3+
PEG_TX15-
C61
D102
PEG_RX3PEG_RX15+
C62
C101
PEG_TX4+
PEG_RX15-
D65
C102
PEG_TX4PEG_LANE_RV#
PEG_RX4+
D66
D54
C65
PEG_RX4-
C66
PEG_TX5+
Signal
D68
Pin#
PEG_TX5EXCD0_CPPE#
PEG_RX5+
D69
A49
C68
EXCD0_PERST#
PEG_RX5-
A48
C69
EXCD1_CPPE#
PEG_TX6+
B48
D71
PEG_TX6EXCD1_PERST#
D72
B47
IOPCIE
PCIE
AC coupled off
on Module
O
PCIE
I PCIE
PCIE
AC
coupled off Module
O PCIE
AC coupled on Module
Pin Type
Pwr Rail /Tolerance
I PCIE
AC coupled off Module
O PCIE
AC coupled on Module
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
I PCIE
AC coupled off Module
O PCIE
AC coupled on Module
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
I PCIE
AC coupled off Module
O PCIE
AC coupled on Module
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
I PCIE
AC coupled off Module
O PCIE
AC coupled on Module
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
I PCIE
AC coupled off Module
O PCIE
AC coupled on Module
I CMOS
3.3V / 3.3V
I PCIE
AC coupled off Module
Pin Type
O PCIE
Pwr Rail /Tolerance
AC coupled on Module
I CMOS
3.3V /3.3V
I PCIE
O CMOS
AC coupled off Module
3.3V /3.3V
I CMOS
O PCIE
O CMOS
3.3V /3.3V
AC coupled on Module
3.3V /3.3V
I PCIE
AC coupled off Module
Pin Type
Pwr Rail /Tolerance
O PCIE
I/O USB
AC coupled on Module
3.3V Suspend/3.3V
I PCIE
I/O USB
AC coupled off Module
3.3V Suspend/3.3V
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
KH960 PU/PD
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
PU 10KΩ to 3V3
Chapter
3Receivedifferential
PCI Express Differential
Pairs 7 pairs 10
Graphics transmit
PCIe
channel 10,
7. Receive
differential
pair.
PEG channel
TransmitInput
Output
differential
pair.
Reference clock output for all PCI Express and PCI Express Graphics
PCI Express Graphics receive differential pairs 10
lanes.
PCIe Reference Clock for all COM Express PCIe lanes, and for
PEG channel 10, Receive Input differential pair.
PEG lanes.
PCI Express Graphics transmit differential pairs 11
PEG channel 11, Transmit Output differential pair.
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
PCI Express Graphics receive differential pairs 11
PEG channel 11, Receive Input differential pair.
PCI Express Graphics transmit differential pairs 0
PEG channel 0, Transmit Output differential pair.
PCI Express Graphics transmit differential pairs 12
PEG channel 12, Transmit Output differential pair.
PCI Express Graphics receive differential pairs 0
PEG channel 0, Receive Input differential pair.
PCI Express Graphics receive differential pairs 12
PEG channel 12, Receive Input differential pair.
PCI Express Graphics transmit differential pairs 1
PEG channel 1, Transmit Output differential pair.
PCI Express Graphics transmit differential pairs 13
PEG channel 13 Transmit Output differential pair.
PCI Express Graphics receive differential pairs 1
PEG channel 1, Receive Input differential pair.
PCI Express Graphics receive differential pairs 13
PEG channel 13, Receive Input differential pair.
PCI Express Graphics transmit differential pairs 2
PEG channel 2, Transmit Output differential pair.
PCI Express Graphics transmit differential pairs 14
PEG channel 14, Transmit Output differential pair.
PCI Express Graphics receive differential pairs 2
PEG channel 2, Receive Input differential pair.
PCI Express Graphics receive differential pairs 14
PEG channel 14, Receive Input differential pair.
PCI Express Graphics transmit differential pairs 3
PEG channel 3, Transmit Output differential pair.
PCI Express Graphics transmit differential pairs 15
PEG channel 15, Transmit Output differential pair.
PCI Express Graphics receive differential pairs 3
PEG channel 3, Receive Input differential pair.
PCI Express Graphics receive differential pairs 15
PEG channel 15, Receive Input differential pair.
PCI Express Graphics transmit differential pairs 4
PEG channel 4, Transmit Output differential pair.
PCI Express Graphics lane reversal input strap.
Pull low on the Carrier board to reverse lane order.
PCI Express Graphics lane reversal input strap.
Pull low on the carrier board to reverse lane order.
PCI Express Graphics receive differential pairs 4
PEG channel 4, Receive Input differential pair.
Module Base Specification R2.1 Description
PCI Express Graphics transmit differential pairs 5
COM Express Carrier Design Guide R2.0 Description
PEG channel 5, Transmit Output differential pair.
PCI ExpressCard: PCI Express capable card request, active low, one
per card
PCI ExpressCard0: PCI Express capable card request, active low,
one per card
PCI Express Graphics receive differential pairs 5
PCI ExpressCard: reset, active low, one per card
PEG channel 5, Receive Input differential pair.
PCI ExpressCard0: reset, active low, one per card
PCI ExpressCard: PCI Express capable card request, active low, one
percard
PCI Express Graphics transmit differential pairs 6
PCI ExpressCard: reset, active low, one per card
PCI ExpressCard1: PCI Express capable card request, active low,
one per card
PEG channel 6, Transmit Output differential pair.
PCI ExpressCard1: reset, active low, one per card
PCI Express Graphics receive differential pairs 6
PEG channel 6, Receive Input differential pair.
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
PCI Express Graphics transmit differential pairs 7
USB differential pairs, channel 0
USB channel
Port 0, data
+ or D+Output differential pair.
PEG
7, Transmit
PCI Express Graphics receive differential pairs 7
USB differential pairs, channel 1
USB channel
Port 1, data
+ or D+
PEG
7, Receive
Input differential pair.
ExpressCard Signals and Descriptions
PEG_RX6+
C71
PEG_RX6Signal
PEG_TX7+
USB0+
PEG_TX7USB0-
C72
Pin#
D74
A46
D75
A45
PEG_RX7+
USB1+
C74
B46
PEG_RX7USB1-
C75
B45
PEG_TX8+
USB2+
D78
A43
PEG_TX8USB2-
D79
A42
PEG_RX8+
USB3+
C78
B43
USB3PEG_RX8-
B42
C79
USB Signals and Descriptions
A40
D81
Chapter 3 Hardware Installation
USB4+
PEG_TX9+
O
I/OPCIE
USB
AC
on Module
3.3Vcoupled
Suspend/3.3V
II/O
PCIE
USB
AC
off Module
3.3Vcoupled
Suspend/3.3V
I/OPCIE
USB
O
3.3V
Suspend/3.3V
AC coupled
on Module
AC Coupling capacitor
KH960 PU/PD
AC Coupling capacitor
PU 10k to 3.3V
PU 10k tocapacitor
3.3V
AC Coupling
AC Coupling capacitor
KH960 PU/PD
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
USB Port 0, data - or D-
USB Port 1, data - or D-
PCI
Graphics
pairs 8
USBExpress
differential
pairs, transmit
channel differential
2
USB Port 2, data + or D+
PEG channel 8, Transmit Output differential pair.
USB Port 2, data - or D-
PCI
Graphics
pairs 8
USB Express
differential
pairs, receive
channeldifferential
3
20
USB Port 3, data + or D+
PEG channel 8, Receive Input differential pair.
USB Port 3, data - or D-
USB
differential
pairs, transmit
channel 4
PCI Express
Graphics
differential pairs 9
USB Port 4, data + or D+
PEG channel 9, Transmit Output differential pair.
www.dfi.com
USB0+
A46
USB0-
A45
USB1+
B46
USB1-
B45
USB2+
A43
USB2-
A42
USB3+
B43
USB3-
B42
USB4+
A40
USB4-
A39
USB5+
B40
USB5-
B39
USB6+
A37
USB6-
A36
USB7+
B37
USB7-
B36
USB_0_1_OC#
I/O USB
3.3V Suspend/3.3V
USB differential pairs, channel 0
Chapter 3
I/O USB
3.3V Suspend/3.3V
USB differential pairs, channel 1
I/O USB
3.3V Suspend/3.3V
USB differential pairs, channel 2
USB Port 0, data + or D+
USB Port 0, data - or DUSB Port 1, data + or D+
USB Port 1, data - or DUSB Port 2, data + or D+
USB Port 2, data - or DUSB Port 3, data + or D+
I/O USB
3.3V Suspend/3.3V
USB differential pairs, channel 3
I/O USB
3.3V Suspend/3.3V
USB differential pairs, channel 4
I/O USB
3.3V Suspend/3.3V
USB differential pairs, channel 5
I/O USB
3.3V Suspend/3.3V
USB differential pairs, channel 6
I/O USB
3.3V Suspend/3.3V
USB differential pairs, channel 7.
USB7 may be configured as a USB client or as a host, or both, at the
Module designer's discretion. (KH960 default set as a host)
B44
I CMOS
3.3V Suspend/3.3V
PU 10K to 3.3V
Suspend
USB over-current sense, USB channels 0 and 1. A pull-up for this line
shall be present on the Module. An open drain driver from a USB
current monitor on the Carrier Board may drive this line low. Do not
pull this line high on the Carrier Board.
USB over-current sense, USB ports 0 and 1.
USB_2_3_OC#
A44
I CMOS
3.3V Suspend/3.3V
PU 10K to 3.3V
Suspend
USB over-current sense, USB channels 2 and 3. A pull-up for this line
shall be present on the Module. An open drain driver from a USB
current monitor on the Carrier Board may drive this line low. Do not
pull this line high on the Carrier Board.
USB over-current sense, USB ports 2 and 3.
USB_4_5_OC#
B38
I CMOS
3.3V Suspend/3.3V
PU 10K to 3.3V
Suspend
USB over-current sense, USB channels 4 and 5. A pull-up for this line
shall be present on the Module. An open drain driver from a USB
current monitor on the Carrier Board may drive this line low. Do not
pull this line high on the Carrier Board.
USB over-current sense, USB ports 4 and 5.
USB_6_7_OC#
A38
I CMOS
3.3V Suspend/3.3V
PU 10K to 3.3V
Suspend
USB over-current sense, USB channels 6 and 7. A pull-up for this line
shall be present on the Module. An open drain driver from a USB
current monitor on the Carrier Board may drive this line low. Do not
pull this line high on the Carrier Board.
USB over-current sense, USB ports 6 and 7.
USB_SSTX0+
D4
USB_SSTX0-
D3
O PCIE
AC coupled on Module
USB_SSRX0+
C4
USB_SSRX0-
C3
I PCIE
AC coupled off Module
USB_SSTX1+
D7
USB_SSTX1-
D6
USB_SSRX1+
C7
USB_SSRX1-
C6
USB_SSTX2+
D10
USB_SSTX2-
D9
USB_SSRX2+
C10
USB_SSRX2-
C9
USB_SSTX3+
D13
USB_SSTX3-
D12
USB_SSRX3+
C13
USB_SSRX3-
C12
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
AC Coupling capacitor
USB Port 3, data - or DUSB Port 4, data + or D+
USB Port 4, data - or DUSB Port 5, data + or D+
USB Port 5, data - or DUSB Port 6, data + or D+
USB Port 6, data - or DUSB Port 7, data + or D+
USB Port 7, data - or D-
Additional transmit signal differential pairs for the SuperSpeed USB
data path.
USB Port 0, SuperSpeed TX +
Additional receive signal differential pairs for the SuperSpeed USB
data path.
USB Port 0, SuperSpeed RX +
Additional transmit signal differential pairs for the SuperSpeed USB
data path.
USB Port 1, SuperSpeed TX +
Additional receive signal differential pairs for the SuperSpeed USB
data path.
USB Port 1, SuperSpeed RX +
Additional transmit signal differential pairs for the SuperSpeed USB
data path.
USB Port 2, SuperSpeed TX +
Additional receive signal differential pairs for the SuperSpeed USB
data path.
USB Port 2, SuperSpeed RX +
Additional transmit signal differential pairs for the SuperSpeed USB
data path.
USB Port 3, SuperSpeed TX +
Additional receive signal differential pairs for the SuperSpeed USB
data path.
USB Port 3, SuperSpeed RX +
21Specification R2.1 Description
Module Base
COM Express Carrier Design Guide R2.0 Description
USB Port 0, SuperSpeed TX -
USB Port 0, SuperSpeed RX -
USB Port 1, SuperSpeed TX -
USB Port 1, SuperSpeed RX -
USB Port 2, SuperSpeed TX -
USB Port 2, SuperSpeed RX -
USB Port 3, SuperSpeed TX -
USB Port 3, SuperSpeed RX -
LVDS Signals and Descriptions
Signal
Pin#
LVDS_A0+/eDP_TX2+
A71
Chapter 3 Hardware Installation
Pin Type
Pwr Rail /Tolerance
O LVDS
LVDS
EDP: AC coupled off
KH960 PU/PD
LVDS channel A differential signal pair 0
eDP lane 2, TX ± differential signal pair
www.dfi.com
USB_SSRX2-
C9
USB_SSTX3+
D13
USB_SSTX3-
D12
USB_SSRX3+
C13
USB_SSRX3-
C12
data path.
O PCIE
AC coupled on Module
I PCIE
AC coupled off Module
AC Coupling capacitor
AC Coupling capacitor
Chapter
3
Additional transmit signal differential pairs for the SuperSpeed USB
data path.
USB Port 2, SuperSpeed RX USB Port 3, SuperSpeed TX +
USB Port 3, SuperSpeed TX -
Additional receive signal differential pairs for the SuperSpeed USB
data path.
USB Port 3, SuperSpeed RX +
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
USB Port 3, SuperSpeed RX -
LVDS Signals and Descriptions
Signal
Pin#
LVDS_A0+/eDP_TX2+
A71
LVDS_A0-/eDP_TX2-
A72
LVDS_A1+/eDP_TX1+
A73
LVDS_A1-/eDP_TX1-
A74
LVDS_A2+/eDP_TX0+
A75
LVDS_A2-/eDP_TX0-
A76
LVDS_A3+
A78
LVDS_A3-
A79
LVDS_A_CK+/eDP_TX3+
A81
LVDS_A_CK-/eDP_TX3-
A82
LVDS_B0+
B71
LVDS_B0-
B72
LVDS_B1+
B73
LVDS_B1-
B74
Pin Type
Pwr Rail /Tolerance
O LVDS
LVDS
EDP: AC coupled off
Module
KH960 PU/PD
O LVDS
LVDS
EDP: AC coupled off
Module
O LVDS
LVDS
EDP: AC coupled off
Module
O LVDS
LVDS
EDP: AC coupled off
Module
O LVDS
LVDS
O LVDS
LVDS
O LVDS
LVDS
O LVDS
LVDS
O LVDS
LVDS
O LVDS
LVDS
LVDS Channel B differential clock
LVDS channel B differential clock pair
LVDS channel A differential signal pair 0
eDP lane 2, TX ± differential signal pair
LVDS Channel A differential pairs
Ther LVDS flat panel differential pairs (LVDS_A[0:3]+/-,
LVDS_B[0:3]+/-. LVDS_A_CK+/-, LVDS_B_CK+/-) shall have 100Ω
terminations across the pairs at the destination. These terminations
may be on the Carrier Board if the Carrier Board implements a LVDS
deserializer on-board.
LVDS channel A differential signal pair 1
eDP lane 1, TX ± differential signal pair
LVDS channel A differential signal pair 2
eDP lane 0, TX ± differential signal pair
eDP: eDP differential pairs
LVDS channel A differential signal pair 3
LVDS Channel A differential clock
LVDS channel A differential clock pair
eDP lane 3, TX ± differential pair
LVDS channel B differential signal pair 0
LVDS Channel B differential pairs
Ther LVDS flat panel differential pairs (LVDS_A[0:3]+/-,
LVDS_B[0:3]+/-. LVDS_A_CK+/-, LVDS_B_CK+/-) shall have 100Ω
terminations across the pairs at the destination. These terminations
may be on the Carrier Board if the Carrier Board implements a LVDS
deserializer on-board.
LVDS channel B differential signal pair 1
LVDS_B2+
B75
LVDS_B2-
B76
LVDS_B3+
B77
LVDS_B3-
B78
LVDS_B_CK+
B81
LVDS_B_CK-
B82
LVDS_VDD_EN/eDP_VDD_EN
A77
O CMOS
3.3V / 3.3V
LVDS panel / eDP power enable
LVDS flat panel power enable.
eDP power enable
LVDS_BKLT_EN/eDP_BKLT_EN
B79
O CMOS
3.3V / 3.3V
LVDS panel / eDP backlight enable
LVDS flat panel backlight enable high active signal
eDP backlight enable
LVDS_BKLT_CTRL/eDP_BKLT_CTRL
B83
O CMOS
3.3V / 3.3V
PD 100K to GND
LVDS panel / eDP backlight brightness control
LVDS flat panel backlight brightness control
EDP backlight brightness control
LVDS_I2C_CK/eDP_AUX+
A83
I/O OD CMOS
3.3V / 3.3V
PU 2.2K to 3.3V
I2C clock output for LVDS display use / eDP AUX+
DDC I2C clock signal used for flat panel detection and control.
eDP auxiliary lane +
LVDS_I2C_DAT/eDP_AUX-
A84
I/O OD CMOS
3.3V / 3.3V
PU 2.2K to 3.3V
I2C data line for LVDS display use / eDP AUX-
DDC I2C data signal used for flat panel detection and control.
eDP auxiliary lane -
RSVD/eDP_HPD
A87
I CMOS
3.3V / 3.3V
RSV PD 100KΩ to GND
eDP_HPD:Detection of Hot Plug / Unplug and notification of the link
layer
eDP_HPD: Detection of Hot Plug / Unplug and notification of the
link layer
Pin Type
Pwr Rail /Tolerance
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
I/O CMOS
3.3V / 3.3V
LPC multiplexed address, command and data bus.
LPC multiplexed command, address and data.
O CMOS
3.3V / 3.3V
LPC frame indicates the start of an LPC cycle
LVDS channel B differential signal pair 2
LVDS channel B differential signal pair 3
LPC Signals and Descriptions
Signal
Pin#
LPC_AD0
B4
LPC_AD1
B5
LPC_AD2
B6
LPC_AD3
B7
LPC_FRAME#
B3
Chapter 3 Hardware Installation
B8
LPC_DRQ0#
KH960 PU/PD
22
PU 10K to 3.3V, not
LPC frame indicates start of a new cycle or termination of a
broken cycle.
www.dfi.com
LVDS_I2C_CK/eDP_AUX+
A83
I/O OD CMOS
3.3V / 3.3V
PU 2.2K to 3.3V
I2C clock output for LVDS display use / eDP AUX+
Chapter
3
DDC I2C clock signal used for flat panel detection and control.
eDP auxiliary lane +
LVDS_I2C_DAT/eDP_AUX-
A84
I/O OD CMOS
3.3V / 3.3V
PU 2.2K to 3.3V
I2C data line for LVDS display use / eDP AUX-
DDC I2C data signal used for flat panel detection and control.
eDP auxiliary lane -
RSVD/eDP_HPD
A87
I CMOS
3.3V / 3.3V
RSV PD 100KΩ to GND
eDP_HPD:Detection of Hot Plug / Unplug and notification of the link
layer
eDP_HPD: Detection of Hot Plug / Unplug and notification of the
link layer
Pin Type
Pwr Rail /Tolerance
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
I/O CMOS
3.3V / 3.3V
LPC multiplexed address, command and data bus.
LPC multiplexed command, address and data.
O CMOS
3.3V / 3.3V
LPC frame indicates the start of an LPC cycle
LPC frame indicates start of a new cycle or termination of a
broken cycle.
I CMOS
3.3V / 3.3V
LPC serial DMA request
LPC encoded DMA/Bus master request.
LPC Signals and Descriptions
Signal
Pin#
LPC_AD0
B4
LPC_AD1
B5
LPC_AD2
B6
LPC_AD3
B7
LPC_FRAME#
B3
LPC_DRQ0#
B8
KH960 PU/PD
PU 10K to 3.3V, not
support.
PU 10K to 3.3V, not
support.
LPC_DRQ1#
B9
LPC_SERIRQ
A50
I/O CMOS
3.3V / 3.3V
PU 10K to 3.3V
LPC_CLK
B10
O CMOS
3.3V / 3.3V
series 22Ω resistor
LPC serial interrupt
LPC serialized IRQ.
LPC clock output - 33MHz nominal
LPC clock output 33MHz.
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
SPI Signals and Descriptions
Signal
Pin#
Pin Type
Pwr Rail /Tolerance
SPI_CS#
B97
O CMOS
3.3V Suspend/3.3V
Chip select for Carrier Board SPI - may be sourced from chipset SPI0 or Chip select for Carrier Board SPI – may be sourced from chipset
SPI1
SPI0 or SPI1
SPI_MISO
A92
I CMOS
3.3V Suspend/3.3V
Data in to Module from Carrier SPI
Data in to Module from Carrier SPI
SPI_MOSI
A95
O CMOS
3.3V Suspend/3.3V
Data out from Module to Carrier SPI
Data out from Module to Carrier SPI
SPI_CLK
A94
O CMOS
3.3V Suspend/3.3V
Clock from Module to Carrier SPI
Clock from Module to Carrier SPI
3.3V Suspend/3.3V
Power supply for Carrier Board SPI – sourced from Module –
Power supply for Carrier Board SPI – sourced from Module – nominally
nominally 3.3V. The Module shall provide a minimum of 100mA
3.3V. The Module shall provide a minimum of 100mA on SPI_POWER.
on SPI_POWER. Carriers shall use less than 100mA of
Carriers shall use less than 100mA of SPI_POWER. SPI_POWER
SPI_POWER. SPI_POWER shall only be used to power SPI
shall only be used to power SPI devices on the Carrier Board.
devices on the Carrier.
SPI_POWER
A91
BIOS_DIS0#
A34
BIOS_DIS1#
B88
O
I CMOS
NA
KH960 PU/PD
PU 10KΩ to 3V3 Suspend. Selection straps to determine the BIOS boot device.
The Carrier should only float these or pull them low, please refer to
COM Express Module Base Specification Revision 2.1 for strapping
PU 10KΩ to 3V3 Suspend. options of BIOS disable signals.
Selection strap to determine the BIOS boot device.
The Carrier should only float these or pull them low, please refer
to for strapping options of BIOS disable signals.
Selection strap to determine the BIOS boot device.
The Carrier should only float these or pull them low.
VGA Signals and Descriptions
Signal
Pin#
Pin Type
Pwr Rail /Tolerance
KH960 PU/PD
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
Red component of analog DAC monitor output, designed to drive
a 37.5Ω equivalent load.
VGA_RED
B89
O Analog
Analog
PD 150 to GND
Red for monitor. Analog DAC output, designed to drive a 37.5Ω
equivalent load.
VGA_GRN
B91
O Analog
Analog
PD 150 to GND
Green for monitor. Analog DAC output, designed to drive a 37.5Ω
equivalent load.
Green component of analog DAC monitor output, designed to
drive a 37.5Ω equivalent load.
VGA_BLU
B92
O Analog
Analog
PD 150 to GND
Blue for monitor. Analog DAC output, designed to drive a 37.5Ω
equivalent load.
Blue component of analog DAC monitor output, designed to
drive a 37.5Ω equivalent load.
VGA_HSYNC
B93
O CMOS
3.3V / 3.3V
Horizontal sync output to VGA monitor
Horizontal sync output to VGA monitor.
VGA_VSYNC
B94
O CMOS
3.3V / 3.3V
Vertical sync output to VGA monitor
Vertical sync output to VGA monitor.
DDC clock line (I2C port dedicated to identify VGA monitor
capabilities).
DDC data line.
VGA_I2C_CK
B95
I/O OD CMOS
3.3V / 3.3V
PU 2.2K to 3.3V
DDC clock line (I2C port dedicated to identify VGA monitor
capabilities)
VGA_I2C_DAT
B96
I/O OD CMOS
3.3V / 3.3V
PU 2.2K to 3.3V
DDC data line.
Pin#
Pin Type
Pwr Rail /Tolerance
DDI Signals Descriptions
Signal
23
Chapter 3 Hardware Installation
DDI1_PAIR0+
D26
KH960 PU/PD
Module Base Specification R2.1 Description
DDI for Display Port: DP1_LANE 0 differential pairs
COM Express Carrier Design Guide R2.0 Description
DP1_LANE0+ for DP / TMDS1_DATA2+ for HDMI or DVI
www.dfi.com
Chapter 3
Pin Types
I
Input to the Module
O Output from the Module
I/O Bi-directional input / output signal
OD Open drain output
RSVD pins are reserved for future use and should be no connect. Do not tie the RSVD pins together.
DDI Signals and Descriptions
Signal
Pin#
DDI1_PAIR0+
D26
DDI1_PAIR0-
D27
DDI1_PAIR1+
D29
DDI1_PAIR1-
D30
DDI1_PAIR2+
D32
DDI1_PAIR2-
D33
DDI1_PAIR3+
D36
DDI1_PAIR3-
D37
DDI1_PAIR4+
C25
DDI1_PAIR4-
C26
DDI1_PAIR5+
C29
DDI1_PAIR5-
C30
DDI1_PAIR6+
C15
DDI1_PAIR6-
C16
Pin Type
O PCIE
O PCIE
O PCIE
O PCIE
I PCIE
DDI1_CTRLCLK_AUX-
DDI1_HPD
I PCIE
AC coupled off Module
AC coupled off Module
DDI for Display Port: DP1_LANE 1 differential pairs
DDI for SDVO: SDVO1_GRN± differential pair (Serial Digital Video green
output)
DDI for HDMI/DVI: TMDS1_DATA lanes 1 differential pairs
AC coupled off Module
DDI for Display Port: DP1_LANE 2 differential pairs
DDI for SDVO: SDVO1_BLU± differential pair (Serial Digital Video blue
output)
DDI for HDMI/DVI: TMDS1_DATA lanes 0 differential pairs
AC coupled off Module
DDI for Display Port: DP1_LANE 3 differential pairs
DDI for SDVO: SDVO1_CK± differential pair (Serial Digital Video clock
output)
DDI for HDMI/DVI: TMDS1_CLK differential pairs
AC coupled off Module
AC coupled off Module
AC coupled off Module
D34
DDI2_PAIR0+
D39
DDI2_PAIR0-
D40
DDI2_PAIR1+
D42
DDI2_PAIR1-
D43
DDI2_PAIR2+
D46
DDI2_PAIR2-
D47
Chapter
3 Hardware Installation
DDI2_PAIR3+
D49
NC
NC
NC
AC coupled on Module
I/O OD CMOS
3.3V / 3.3V
I/O PCIE
AC coupled on Module
D16
DDI1_DDC_AUX_SEL
NC
NC
I PCIE
I/O OD CMOS
3.3V / 3.3V
I CMOS
3.3V / 3.3V
I CMOS
3.3V / 3.3V
O PCIE
AC coupled off Module
O PCIE
O PCIE
Module Base Specification R2.1 Description
DDI for Display Port: DP1_LANE 0 differential pairs
DDI for SDVO: SDVO1_RED± differential pair (Serial Digital Video red
output)
DDI for HDMI/DVI: TMDS1_DATA lanes 2 differential pairs
D15
C24
KH960 PU/PD
NC
I/O PCIE
DDI1_CTRLCLK_AUX+
Pwr Rail /Tolerance
AC coupled off Module
AC coupled off Module
PD 100K to GND
(S/W IC between
Rpu/PCH)
DDI for SDVO: SDVO1_INT± differential pair
(Serial Digital Video B interrupt input differential pair)
DDI for SDVO: SDVO1_TVCLKIN± differential pair
(Serial Digital Video TVOUT synchronization clock input differential pair.)
DDI for SDVO: SDVO1_FLDSTALL± differential pair
(Serial Digital Video Field Stall input differential pair.)
DDI for Display Port: DP1_AUX+ Differetial pairs
(DP AUX+ function if DDI1_DDC_AUX_SEL is no connect)
Half-duplex bi-directional AUX channel for services such as link
configuration or maintenance and EDID access
PU 2.2K to 3.3V, PD 100K
DDI for SDVO: SDVO1_CTRLCLK (SDVO I2C clock line - to set up SDVO
to GND
peripherals.)
(S/W IC between
DDI for HDMI/DVI: HDMI1_CTRLCLK
Rpu/Rpd resistor)
(HDMI/DVI I2C CTRLCLK if DDI1_DDC_AUX_SEL is pulled high)
PU 100K to 3.3V
(S/W IC between
Rpu/PCH)
COM Express Carrier Design Guide R2.0 Description
DP1_LANE0+ for DP / TMDS1_DATA2+ for HDMI or DVI
DP1_LANE0- for DP / TMDS1_DATA2- for HDMI or DVI
DP1_LANE1+ for DP / TMDS1_DATA1+ for HDMI or DVI
DP1_LANE1- for DP / TMDS1_DATA1- for HDMI or DVI
DP1_LANE2+ for DP / TMDS1_DATA0+ for HDMI or DVI
DP1_LANE2- for DP / TMDS1_DATA0- for HDMI or DVI
DP1_LANE3+ for DP / TMDS1_CLK+
DP1_LANE3- for DP / TMDS1_CLKNA
NA
NA
NA
NA
NA
DP1_AUX+ for DP
HDMI1_CTRLCLK for HDMI or DVI
DDI for Display Port: DP1_AUX- Differetial pairs
(DP AUX- function if DDI1_DDC_AUX_SEL is no connect)
Half-duplex bi-directional AUX channel for services such as link
configuration or maintenance and EDID access
DP1_AUX- for DP
DDI for SDVO: SDVO1_CTRLDATA (SDVO I2C data line - to set up SDVO
peripherals.)
DDI for HDMI/DVI: HDMI1_CTRLDATA
(HDMI/DVI I2C CTRLDATA if DDI1_DDC_AUX_SEL is pulled high)
HDMI1_CTRLDATA for HDMI or DVI
PD 1M to GND
DDI for Display Port: DP1_HPD (DP Hot-Plug Detect)
DDI for HDMI/DVI: HDMI1_HPD (HDMI Hot-Plug Detect)
DP1_HPD for DP / HDMI1_HPD for HDMI or DVI
PD 1M to GND
Selects the function of DDI1_CTRLCLK_AUX+ and
DDI1_CTRLDATA_AUX-. This pin shall have a 1M pull-down to
logic ground on the Module. If this input is floating the AUX pair is
used for the DP AUX+/- signals. If pulled-high the AUX pair contains the
CRTLCLK and CTRLDATA signals.
Selects the function of DP1 AUX±(Low) or HDMI1 DDC
CLK/DATA(High)
The DDC_AUX_SEL pin should be routed to pin 13 of the
DisplayPort connector, to enable Dual-Mode.
When HDMI/DVI is directly done on the Carrier Board, this pin shall
be pulled to 3.3V with a 100k Ohm resistor to configure the AUX
pairs as DDC channels.
PU 2.2K to 3.3V/PU 100K
to 3.3V
(S/W IC between
2.2K/100K resistor)
DDI for Display Port: DP2_LANE 0 differential pairs
DDI for HDMI/DVI: TMDS2_DATA lanes 2 differential pairs
DP2_LANE0+ for DP / TMDS2_DATA2+ for HDMI or DVI
DDI for Display Port: DP2_LANE 1 differential pairs
DDI for HDMI/DVI: TMDS2_DATA lanes 1 differential pairs
DP2_LANE1+ for DP / TMDS2_DATA1+ for HDMI or DVI
24Port: DP2_LANE 2 differential pairs
DDI for Display
DDI for HDMI/DVI: TMDS2_DATA lanes 0 differential pairs
DP2_LANE2+ for DP / TMDS2_DATA0+ for HDMI or DVI
DDI for Display Port: DP2_LANE 3 differential pairs
DP2_LANE3+ for DP / TMDS2_CLK+
DP2_LANE0- for DP / TMDS2_DATA2- for HDMI or DVI
DP2_LANE1- for DP / TMDS2_DATA1- for HDMI or DVI
DP2_LANE2- for DP / TMDS2_DATA0- for HDMI or DVI
www.dfi.com
DDI1_HPD
C24
DDI1_DDC_AUX_SEL
D34
DDI2_PAIR0+
D39
DDI2_PAIR0-
D40
DDI2_PAIR1+
D42
DDI2_PAIR1-
D43
DDI2_PAIR2+
D46
DDI2_PAIR2-
D47
DDI2_PAIR3+
D49
DDI2_PAIR3-
D50
DDI2_CTRLCLK_AUX+
DDI2_CTRLCLK_AUX-
DDI2_HPD
3.3V / 3.3V
I CMOS
3.3V / 3.3V
O PCIE
AC coupled off Module
O PCIE
O PCIE
O PCIE
PD 1M to GND
PD 1M to GND
C34
DDI3_PAIR0+
C39
DDI3_PAIR0-
C40
DDI3_PAIR1+
C42
DDI3_PAIR1-
C43
DDI3_PAIR2+
C46
DDI3_PAIR2-
C47
DDI3_PAIR3+
C49
DDI3_PAIR3-
C50
DP2_LANE1+ for DP / TMDS2_DATA1+ for HDMI or DVI
AC coupled off Module
DDI for Display Port: DP2_LANE 2 differential pairs
DDI for HDMI/DVI: TMDS2_DATA lanes 0 differential pairs
DP2_LANE2+ for DP / TMDS2_DATA0+ for HDMI or DVI
AC coupled off Module
DDI for Display Port: DP2_LANE 3 differential pairs
DDI for HDMI/DVI: TMDS2_CLK differential pairs
DP2_LANE3+ for DP / TMDS2_CLK+
I/O OD CMOS
3.3V / 3.3V
I/O PCIE
AC coupled on Module
I/O OD CMOS
3.3V / 3.3V
I CMOS
3.3V / 3.3V
I CMOS
3.3V / 3.3V
O PCIE
AC coupled off Module
O PCIE
PD 100K to GND
(S/W IC between
Rpu/PCH)
DDI for Display Port: DP2_AUX+ Differetial pairs
(DP AUX+ function if DDI2_DDC_AUX_SEL is no connect)
Half-duplex bi-directional AUX channel for services such as link
configuration or maintenance and EDID access
PU 2.2K to 3.3V, PD 100K
to GND
DDI for HDMI/DVI: HDMI2_CTRLCLK
(S/W IC between
(HDMI/DVI I2C CTRLCLK if DDI2_DDC_AUX_SEL is pulled high)
Rpu/Rpd resistor)
PU 100K to 3.3V
(S/W IC between
Rpu/PCH)
DP2_LANE0- for DP / TMDS2_DATA2- for HDMI or DVI
DP2_LANE1- for DP / TMDS2_DATA1- for HDMI or DVI
DP2_LANE2- for DP / TMDS2_DATA0- for HDMI or DVI
DP2_LANE3- for DP / TMDS2_CLK-
DP2_AUX+ for DP
HDMI2_CTRLCLK for HDMI or DVI
DDI for Display Port: DP2_AUX- Differetial pairs
(DP AUX- function if DDI2_DDC_AUX_SEL is no connect)
Half-duplex bi-directional AUX channel for services such as link
configuration or maintenance and EDID access
DP2_AUX- for DP
DDI for HDMI/DVI: HDMI2_CTRLDATA
(HDMI/DVI I2C CTRLDATA if DDI2_DDC_AUX_SEL is pulled high)
HDMI2_CTRLDATA for HDMI or DVI
PD 1M to GND
DDI for Display Port: DP2_HPD (DP Hot-Plug Detect)
DDI for HDMI/DVI: HDMI2_HPD (HDMI Hot-Plug Detect)
DP2_HPD for DP / HDMI1_HPD for HDMI or DVI
PD 1M to GND
Selects the function of DDI2_CTRLCLK_AUX+ and
DDI2_CTRLDATA_AUX-. This pin shall have a 1M pull-down to
logic ground on the Module. If this input is floating the AUX pair is
used for the DP AUX+/- signals. If pulled-high the AUX pair contains the
CRTLCLK and CTRLDATA signals.
Selects the function of DP2 AUX±(Low) or HDMI2 DDC
CLK/DATA(High)
The DDC_AUX_SEL pin should be routed to pin 13 of the
DisplayPort connector, to enable Dual-Mode.
When HDMI/DVI is directly done on the Carrier Board, this pin shall
be pulled to 3.3V with a 100k Ohm resistor to configure the AUX
pairs as DDC channels.
PU 2.2K to 3.3V/PU 100K
to 3.3V
(S/W IC between
2.2K/100K resistor)
DDI for Display Port: DP3_LANE 0 differential pairs
DDI for HDMI/DVI: TMDS3_DATA lanes 2 differential pairs
DP3_LANE0+ for DP / TMDS3_DATA2+ for HDMI or DVI
DDI for Display Port: DP3_LANE 1 differential pairs
DDI for HDMI/DVI: TMDS3_DATA lanes 1 differential pairs
DP3_LANE1+ for DP / TMDS3_DATA1+ for HDMI or DVI
AC coupled off Module
DDI for Display Port: DP3_LANE 2 differential pairs
DDI for HDMI/DVI: TMDS3_DATA lanes 0 differential pairs
DP3_LANE2+ for DP / TMDS3_DATA0+ for HDMI or DVI
AC coupled off Module
DDI for Display Port: DP3_LANE 3 differential pairs
DDI for HDMI/DVI: TMDS3_CLK differential pairs
DP3_LANE3+ for DP / TMDS3_CLK+
AC coupled off Module
I/O PCIE
AC coupled on Module
I/O OD CMOS
3.3V / 3.3V
I/O PCIE
AC coupled on Module
C36
DDI3_CTRLCLK_AUXC37
Chapter
3 Hardware Installation
Selects the function of DP1 AUX±(Low) or HDMI1 DDC
CLK/DATA(High)
The DDC_AUX_SEL pin should be routed to pin 13 of the
DisplayPort connector, to enable Dual-Mode.
When HDMI/DVI is directly done on the Carrier Board, this pin shall
be pulled to 3.3V with a 100k Ohm resistor to configure the AUX
pairs as DDC channels.
DDI for Display Port: DP2_LANE 1 differential pairs
DDI for HDMI/DVI: TMDS2_DATA lanes 1 differential pairs
AC coupled on Module
O PCIE
Selects the function of DDI1_CTRLCLK_AUX+ and
DDI1_CTRLDATA_AUX-. This pin shall have a 1M pull-down to
logic ground on the Module. If this input is floating the AUX pair is
used for the DP AUX+/- signals. If pulled-high the AUX pair contains the
CRTLCLK and CTRLDATA signals.
AC coupled off Module
I/O PCIE
O PCIE
DP1_HPD for DP / HDMI1_HPD for HDMI or DVI
Chapter 3
DP2_LANE0+ for DP / TMDS2_DATA2+ for HDMI or DVI
C33
D44
DDI for Display Port: DP1_HPD (DP Hot-Plug Detect)
DDI for HDMI/DVI: HDMI1_HPD (HDMI Hot-Plug Detect)
DDI for Display Port: DP2_LANE 0 differential pairs
DDI for HDMI/DVI: TMDS2_DATA lanes 2 differential pairs
C32
DDI2_DDC_AUX_SEL
DDI3_CTRLCLK_AUX+
I CMOS
PD 100K to GND
(S/W IC between
Rpu/PCH)
DDI for Display Port: DP3_AUX+ Differetial pairs
(DP AUX+ function if DDI3_DDC_AUX_SEL is no connect)
Half-duplex bi-directional AUX channel for services such as link
configuration or maintenance and EDID access
PU 2.2K to 3.3V, PD 100K
to GND
DDI for HDMI/DVI: HDMI3_CTRLCLK
(S/W IC between
(HDMI/DVI I2C CTRLCLK if DDI3_DDC_AUX_SEL is pulled high)
Rpu/Rpd resistor)
PU 100K to 3.3V
(S/W IC between
Rpu/PCH)
PU 2.2K to 3.3V/PU 100K
to 3.3V
DDI for Display
25 Port: DP3_AUX- Differetial pairs
(DP AUX- function if DDI3_DDC_AUX_SEL is no connect)
DP3_LANE0- for DP / TMDS3_DATA2- for HDMI or DVI
DP3_LANE1- for DP / TMDS3_DATA1- for HDMI or DVI
DP3_LANE2- for DP / TMDS3_DATA0- for HDMI or DVI
DP3_LANE3- for DP / TMDS3_CLK-
DP3_AUX+ for DP
HDMI3_CTRLCLK for HDMI or DVI
DP3_AUX- for DP
www.dfi.com
DDI3_PAIR3-
DDI3_CTRLCLK_AUX+
DDI3_CTRLCLK_AUX-
DDI3_HPD
DDI3_DDC_AUX_SEL
C50
DP3_LANE3- for DP / TMDS3_CLK-
I/O PCIE
AC coupled on Module
I/O OD CMOS
3.3V / 3.3V
I/O PCIE
AC coupled on Module
I/O OD CMOS
3.3V / 3.3V
I CMOS
3.3V / 3.3V
C36
C37
C44
C38
I CMOS
3.3V / 3.3V
PD 100K to GND
(S/W IC between
Rpu/PCH)
Chapter 3
DDI for Display Port: DP3_AUX+ Differetial pairs
(DP AUX+ function if DDI3_DDC_AUX_SEL is no connect)
Half-duplex bi-directional AUX channel for services such as link
configuration or maintenance and EDID access
PU 2.2K to 3.3V, PD 100K
to GND
DDI for HDMI/DVI: HDMI3_CTRLCLK
(S/W IC between
(HDMI/DVI I2C CTRLCLK if DDI3_DDC_AUX_SEL is pulled high)
Rpu/Rpd resistor)
PU 100K to 3.3V
(S/W IC between
Rpu/PCH)
DP3_AUX+ for DP
HDMI3_CTRLCLK for HDMI or DVI
DDI for Display Port: DP3_AUX- Differetial pairs
(DP AUX- function if DDI3_DDC_AUX_SEL is no connect)
DP3_AUX- for DP
DDI for HDMI/DVI: HDMI3_CTRLDATA
(HDMI/DVI I2C CTRLDATA if DDI3_DDC_AUX_SEL is pulled high)
HDMI3_CTRLDATA for HDMI or DVI
PD 1MΩ to GND
DDI for Display Port: DP3_HPD (DP Hot-Plug Detect)
DDI for HDMI/DVI: HDMI3_HPD (HDMI Hot-Plug Detect)
DP3_HPD for DP / HDMI1_HPD for HDMI or DVI
PD 1MΩ to GND
Selects the function of DDI3_CTRLCLK_AUX+ and
DDI3_CTRLDATA_AUX-. This pin shall have a 1M pull-down to
logic ground on the Module. If this input is floating the AUX pair is
used for the DP AUX+/- signals. If pulled-high the AUX pair contains the
CRTLCLK and CTRLDATA signals.
Selects the function of DP3 AUX±(Low) or HDMI3 DDC
CLK/DATA(High)
The DDC_AUX_SEL pin should be routed to pin 13 of the
DisplayPort connector, to enable Dual-Mode.
When HDMI/DVI is directly done on the Carrier Board, this pin shall
be pulled to 3.3V with a 100k Ohm resistor to configure the AUX
pairs as DDC channels.
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
PU 2.2K to 3.3V/PU 100K
to 3.3V
(S/W IC between
2.2K/100K resistor)
Serial Interface Signals and Descriptions
Signal
Pin#
Pin Type
Pwr Rail /Tolerance
SER0_TX
A98
O CMOS
5V/12V
SER0_RX
A99
I CMOS
5V/12V
SER1_TX
A101
O CMOS
5V/12V
SER1_RX
A102
I CMOS
5V/12V
KH960 PU/PD
PU 10KΩ to 3.3V
PU 10KΩ to 3.3V
General purpose serial port 0 transmitter
Transmit Line for Serial Port 0 ; PD 4.7KΩ
General purpose serial port 0 receiver
Receive Line for Serial Port 0
General purpose serial port 1 transmitter
Transmit Line for Serial Port 1 ; PD 4.7KΩ
General purpose serial port 1 receiver
Receive Line for Serial Port 1
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
I2C Signals and Descriptions
Signal
Pin#
Pin Type
Pwr Rail /Tolerance
I2C_CK
B33
I/O OD CMOS
3.3V Suspend/3.3V
PU 2.2K to 3.3V Suspend General purpose I2C port clock output
KH960 PU/PD
General Purpose I2C Clock output
I2C_DAT
B34
I/O OD CMOS
3.3V Suspend/3.3V
PU 2.2K to 3.3V Suspend General purpose I2C port data I/O line
General Purpose I2C data I/O line.
Miscellaneous Signals and Descriptions
Signal
Pin#
Pin Type
Pwr Rail /Tolerance
SPKR
B32
O CMOS
WDT
B27
O CMOS
KH960 PU/PD
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
3.3V / 3.3V
Output for audio enunciator - the "speaker" in PC-AT systems.
This port provides the PC beep signal and is mostly intended for
debugging purposes.
Output used to control an external FET or a logic gate to drive an
external PC speaker.
3.3V / 3.3V
Output indicating that a watchdog time-out event has occurred.
Output indicating that a watchdog time-out event has occurred.
Fan speed control. Uses the Pulse Width Modulation (PWM) technique to
control the fan's RPM.
Fan speed control. Uses the Pulse Width Modulation (PWM)
technique to control the fan’s RPM.
FAN_PWMOUT
B101
O CMOS
3.3V / 12V
RSV PD 100KΩ to GND
FAN_TACHIN
B102
I OD CMOS
3.3V / 12V
PU 47KΩ to 3.3V
Fan tachometer input for a fan with a two pulse output.
Fan tachometer input for a fan with a two pulse output.
TPM_PP
A96
I CMOS
3.3V / 3.3V
PD 100KΩ to GND.
Trusted Platform Module (TPM) Physical Presence pin. Active high.
TPM chip has an internal pull down. This signal is used to indicate Physical
Presence to the TPM.
Trusted Platform Module (TPM) Physical Presence pin. Active high.
TPM chip has an internal pull down. Thissignal is used to indicate
Physical Presence to the TPM.
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
Power and System Management Signals and Descriptions
Signal
Pin#
Pin Type
Pwr Rail /Tolerance
KH960 PU/PD
PWRBTN#
B12
I CMOS
3.3V Suspend/3.3V
A falling edge creates a power button event. Power button events can
PU 10KΩ to 3.3V Suspend be used to bring a system out of S5 soft off and other suspend states,
as well as powering the system down.
SYS_RESET#
B49
I CMOS
3.3V Suspend/3.3V
PU 10KΩ to 3.3V Suspend
Chapter 3 Hardware Installation
Reset button input. Active low request for Module to reset and reboot.
May be falling26
edge sensitive. For situations when SYS_RESET# is
not able to reestablish control of the system, PWR_OK or a power
cycle may be used.
Power button low active signal used to wake up the system from S5
state (soft off). This signal is triggered on the falling edge.
Reset button input. Active low request for Module to reset and
reboot. May be falling edge sensitive. For situations when
SYS_RESET# is not able to reestablish control of the system,
PWR_OK or a power cycle may be used.
www.dfi.com
Chapter 3
Fan speed control. Uses the Pulse Width Modulation (PWM) technique to
control the fan's RPM.
Fan speed control. Uses the Pulse Width Modulation (PWM)
technique to control the fan’s RPM.
FAN_PWMOUT
B101
O CMOS
3.3V / 12V
RSV PD 100KΩ to GND
FAN_TACHIN
B102
I OD CMOS
3.3V / 12V
PU 47KΩ to 3.3V
Fan tachometer input for a fan with a two pulse output.
Fan tachometer input for a fan with a two pulse output.
PD 100KΩ to GND.
Trusted Platform Module (TPM) Physical Presence pin. Active high.
TPM chip has an internal pull down. This signal is used to indicate Physical
Presence to the TPM.
Trusted Platform Module (TPM) Physical Presence pin. Active high.
TPM chip has an internal pull down. Thissignal is used to indicate
Physical Presence to the TPM.
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
TPM_PP
A96
I CMOS
3.3V / 3.3V
Power and System Management Signals and Descriptions
Signal
Pin#
Pin Type
Pwr Rail /Tolerance
KH960 PU/PD
PWRBTN#
B12
I CMOS
3.3V Suspend/3.3V
A falling edge creates a power button event. Power button events can
PU 10KΩ to 3.3V Suspend be used to bring a system out of S5 soft off and other suspend states,
as well as powering the system down.
SYS_RESET#
B49
I CMOS
3.3V Suspend/3.3V
PU 10KΩ to 3.3V Suspend
Reset button input. Active low request for Module to reset and reboot.
May be falling edge sensitive. For situations when SYS_RESET# is
not able to reestablish control of the system, PWR_OK or a power
cycle may be used.
Reset button input. Active low request for Module to reset and
reboot. May be falling edge sensitive. For situations when
SYS_RESET# is not able to reestablish control of the system,
PWR_OK or a power cycle may be used.
PD 100KΩ to GND
Reset output from Module to Carrier Board. Active low. Issued by
Module chipset and may result from a low SYS_RESET# input, a low
PWR_OK input, a VCC_12V power input that falls below the minimum
specification, a watchdog timeout, or may be initiated by the Module
software.
Reset output signal from Module to Carrier Board. This signal may be
driven low by the Module to reset external components located on
the Carrier Board.
Power OK from main power supply. A high value indicates that the
power is good. This signal can be used to hold off Module startup to
allow Carrier based FPGAs or other configurable devices time to be
programmed.
Power OK status signal generated by the ATX power supply to notify
the Module that the DC operating voltages are within the ranges
required for proper operation.
Indicates imminent suspend operation; used to notify LPC devices.
Suspend status signal to indicate that the system will be entering a
low power state soon. It can be used by other peripherals on the
Carrier Board as an indication that they should go into power-down
mode.
Power button low active signal used to wake up the system from S5
state (soft off). This signal is triggered on the falling edge.
CB_RESET#
B50
O CMOS
3.3V Suspend/3.3V
PWR_OK
B24
I CMOS
3.3V / 3.3V
SUS_STAT#
B18
O CMOS
3.3V Suspend/3.3V
SUS_S3#
A15
O CMOS
3.3V Suspend/3.3V
PD 100KΩ to GND
Indicates system is in Suspend to RAM state. Active low output. An
inverted copy of SUS_S3# on the Carrier Board may be used to enable
the non-standby power on a typical ATX supply.
S3 Sleep control signal indicating that the system resides in S3 state
(Suspend to RAM).
SUS_S4#
A18
O CMOS
3.3V Suspend/3.3V
PD 100KΩ to GND
Indicates system is in Suspend to Disk state. Active low output.
S4 Sleep control signal indicating that the system resides in S4 state
(Suspend to Disk).
SUS_S5#
A24
O CMOS
3.3V Suspend/3.3V
PD 100KΩ to GND
Indicates system is in Soft Off state.
S5 Sleep Control signal indicating that the system resides in S5 State
(Soft Off).
WAKE0#
B66
I CMOS
3.3V Suspend/3.3V
WAKE1#
B67
I CMOS
3.3V Suspend/3.3V
BATLOW#
A27
I CMOS
3.3V Suspend/ 3.3V
Indicates that external battery is low.
PU 10KΩ to 3.3V Suspend This port provides a battery-low signal to the Module for orderly
transitioning to power saving or power cut-off ACPI modes.
LID#
A103
I OD CMOS
3.3V Suspend/12V
PU 47KΩ to 3.3V Suspend
SLEEP#
B103
I OD CMOS
3.3V Suspend/12V
Sleep button. Low active signal used by the ACPI operating system to
PU 47KΩ to 3.3V Suspend bring the
system to sleep state or to wake it up again.
PU 10KΩ to 3.3V
PU 10KΩ to 3.3V Suspend PCI Express wake up signal.
Integrate PU @PCH
General purpose wake up signal. May be used to implement wake-up
on PS2 keyboard or mouse activity.
LID switch. Low active signal used by the ACPI operating system for a LID
switch.
PCI Express wake-up event signal.
General purpose wake-up signal.
Battery low input. This signal may be driven low by external circuitry
to signal that the system battery is low. It also can be used to signal
some other external power management event.
LID switch.
Low active signal used by the ACPI operating system for a LID
switch.
Sleep button.
Low active signal used by the ACPI operating system to bring the
system to sleep state or to wake it up again.
Thermal Protection Signals and Descriptions
Signal
Pin#
Pin Type
Pwr Rail /Tolerance
KH960 PU/PD
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
THRM#
B35
I CMOS
3.3V / 3.3V
PU 10KΩ to 3.3V
Input from off-Module temp sensor indicating an over-temp situation.
Thermal Alarm active low signal generated by the external hardware
to indicate an over temperature situation. This signal can be used to
initiate thermal throttling.
THRMTRIP#
A35
O CMOS
3.3V / 3.3V
PU 10KΩ to 3.3V
Active low output indicating that the CPU has entered thermal shutdown.
Thermal Trip indicates an overheating condition of the processor. If
'THRMTRIP#' goes active the system immediately transitions to the
S5 State (Soft Off).
Pin Type
Pwr Rail /Tolerance
KH960 PU/PD
Module Base27
Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
3.3V Suspend/3.3V
PU 2.2KΩ to 3.3V
Suspend
System Management Bus bidirectional clock line.
System Management Bus bidirectional clock line
SMBUS Signals and Descriptions
Signal
Pin#
SMB_CK
B13
Chapter
3 Hardware Installation
I/O OD CMOS
www.dfi.com
Signal
Pin#
Pin Type
Pwr Rail /Tolerance
KH960 PU/PD
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
Input from off-Module temp sensor indicating an over-temp situation.
Thermal Alarm active low signal generated by the external hardware
to indicate an over temperature situation. This signal can be used to
initiate thermal throttling.
Active low output indicating that the CPU has entered thermal shutdown.
Thermal Trip indicates an overheating condition of the processor. If
'THRMTRIP#' goes active the system immediately transitions to the
S5 State (Soft Off).
Chapter 3
THRM#
B35
I CMOS
3.3V / 3.3V
PU 10KΩ to 3.3V
THRMTRIP#
A35
O CMOS
3.3V / 3.3V
PU 10KΩ to 3.3V
Pin Type
Pwr Rail /Tolerance
KH960 PU/PD
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
System Management Bus bidirectional clock line.
System Management Bus bidirectional clock line
SMBUS Signals and Descriptions
Signal
Pin#
SMB_CK
B13
I/O OD CMOS
3.3V Suspend/3.3V
PU 2.2KΩ to 3.3V
Suspend
SMB_DAT
B14
I/O OD CMOS
3.3V Suspend/3.3V
PU 2.2KΩ to 3.3V
Suspend
System Management Bus bidirectional data line.
System Management bidirectional data line.
SMB_ALERT#
B15
I CMOS
3.3V Suspend/3.3V
PU 2.2KΩ to 3.3V
Suspend
System Management Bus Alert – active low input can be used to generate
an SMI# (System Management Interrupt) or to wake the system.
System Management Bus Alert
Pin Type
Pwr Rail /Tolerance
KH960 PU/PD
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
O CMOS
3.3V / 3.3V
GPIO Signals and Descriptions
Signal
Pin#
GPO0
A93
GPO1
B54
GPO2
B57
General purpose output pins. Upon a hardware reset, these outputs should
General Purpose Outputs for system specific usage.
be low.
GPO3
B63
GPI0
A54
GPI1
A63
GPI2
A67
PU 47KΩ to 3.3V
GPI3
A85
PU 47KΩ to 3.3V
PU 47KΩ to 3.3V
I CMOS
3.3V / 3.3V
PU 47KΩ to 3.3V
General purpose input pins. Pulled high internally on the Module.
General Purpose Input for system specific usage. The signals are
pulled up by the Module.
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
Power and GND Signals and Descriptions
Signal
Pin#
Pin Type
VCC_12V
A104~A109
B104~B109
C104~C109
D104~D109
Power
Primary power input: +12V nominal. All available VCC_12V pins on the
connector(s) shall be used.
VCC_5V_SBY
B84~B87
Power
Standby power input: +5.0V nominal. If VCC5_SBY is used, all
available VCC_5V_SBY pins on the connector(s) shall be used. Only
used for standby and suspend functions. May be left unconnected if
these functions are not used in the system design.
VCC_RTC
A47
Power
Real-time clock circuit-power input. Nominally +3.0V.
GND
A1, A11, A21, A31,
A41, A51, A57,
A60, A66, A70,
A80, A90, A100,
A110, B1, B11, B21
,B31, B41, B51,
B60, B70, B80,
B90, B100, B110,
C1, C2, C5, C8,
C11, C14, C21,
C31, C41, C51,
C60, C70, C73,
Power
C76, C80, C84,
C87, C90, C93,
C96, C100, C103,
C110, D1, D2, D5,
D8, D11, D14,
D21, D31,
D41,D51, D60,
D67, D70, D73,
D76, D80, D84,
D87, D90, D93,
D96, D100, D103,
D110
Chapter 3 Hardware Installation
Pwr Rail /Tolerance
KH960 PU/PD
Ground - DC power and signal and AC signal return path.
All available GND connector pins shall be used and tied to Carrier Board
GND plane.
28
www.dfi.com
D21, D31,
D41,D51, D60,
D67, D70, D73,
D76, D80, D84,
D87, D90, D93,
D96, D100, D103,
D110
Chapter 3
Module type Signals and Descriptions
Signal
Pin#
Pin Type
TYPE0#
C54
PDS
N.C.
TYPE1#
C57
PDS
N.C.
TYPE2#
D57
PDS
PD 0Ω to GND
TYPE10#
A97
PDS
Pwr Rail /Tolerance
KH960 PU/PD
N.C.
Module Base Specification R2.1 Description
COM Express Carrier Design Guide R2.0 Description
TYPE2#
X
NC
NC
NC
NC
GND
The Type pins indicate the COM Express pin-out type of the
Module. To indicate the Module's pin-out type, the pins are
either not connected or strapped to ground on the Module.
The Carrier Board has to implement additional logic, which
prevents the system to switch power on, if a Module with an
incompatible pin-out type is detected.
TYPE1# TYPE0#
X
X
pin out Type 1
NC
NC
pin out Type 2
NC
GND
pin out Type 3 (no IDE)
GND
NC
pin out Type 4 (no PCI)
GND
GND
pin out Type 5 (no IDE, no PCI)
NC
NC
pin out Type 6 (no IDE, no PCI)
Dual use pin. Indicates to the Carrier Board that a Type 10 Module is
Indicates to the Carrier Board that a Type 10 Module is installed.
installed. Indicates to the Carrier that a Rev 1.0/2.0 Module is installed
Indicates to the Carrier Board, that a Rev 1.0/2.0 Module is installed.
TYPE10#
TYPE10#
NC Pin-out R2.0
NC Pin-out R2.0
PD Pin-out Type 10 pull down to ground with 47K resistor
PD Pin-out Type 10 pull down to ground with 47k
12V Pin-out R1.0
12V Pin-out R1.0
This pin is reclaimed from the VCC_12V pool. In R1.0 Modules this pin will
connect to other VCC_12V pins. In R2.0 this pin is defined as a no connect
for types 1-6. A Carrier can detect a R1.0 Module by the presence of 12V
on this pin. R2.0 Module types 1-6 will no connect this pin. Type 10
Modules shall pull this pin to ground through a 47K resistor.
29
Chapter 3 Hardware Installation
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Chapter 3
Standby Power LED
Cooling Option
Heat Spreader with Heat Sink and Fan
Note:
The system board used in the following illustrations may not resemble the actual
board. These illustrations are for reference only.
Standby
Power LED
This LED will be lit when the system is in the standby mode.
Top View of the Heat Sink
1
2
Bottom View of the Heat Sink
•
“1” and “2” denote the locations of the thermal pads designed to contact
the corresponding components on KH960.
Important:
Remove the plastic covering from the thermal pads prior to mounting the heat sink
onto KH960.
30
Chapter 3 Hardware Installation
www.dfi.com
Chapter 3
Installing KH960 onto a Carrier Board
2. Apply firm even pressure to the side with the connectors first and push down the entire
board. You will hear a “click”, which indicates the module is correctly seated in the COM
Express connectors of the carrier board.
Important:
The carrier board used in this section is for reference purpose only and may not
resemble your carrier board. These illustrations are mainly to guide you on how to
install KH960 onto the carrier board of your choice.
Pressing
points
1. Grasp KH960 by its edges and position it on top of the carrier board with its mounting
holes aligned with the standoffs on the carrier board. This helps align the COM Express
connectors of the two boards to each other.
COM Express connectors on KH960
BIOS ROM socket
COM Express connectors on the
carrier board
Note:
The above illustration shows the pressing points of the module onto the carrier board.
Be careful when pressing the module to avoid damaging the socket.
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Chapter 3
3. Install a heat sink onto the KH960 with the carrier board. First align the mounting holes of
the heatsink with the mounting holes of the module.
Heat Sink
1
3
4
KH960
Carrier board
6
2
5
Side View of the Heatsink, Module, and Carrier Board
Note:
Install the heatsink according to the sequence of the screws shown in the above image to avoid damaging the CPU.
4. Connect the heatsink and fan’s cable to the fan connector on KH960.
Fan connector
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Chapter 4
Chapter 4 - BIOS Setup
Legends
Overview
The BIOS is a program that takes care of the basic level of communication between the CPU
and peripherals. It contains codes for various advanced features found in this system board.
The BIOS allows you to configure the system and save the configuration in a battery-backed
CMOS so that the data retains even when the power is off. In general, the information stored
in the CMOS RAM of the EEPROM will stay unchanged unless a configuration change has been
made such as a hard drive replaced or a device added.
It is possible that the CMOS battery will fail causing CMOS data loss. If this happens, you need
to install a new CMOS battery and reconfigure the BIOS settings.
Note:
The BIOS is constantly updated to improve the performance of the system board;
therefore the BIOS screens in this chapter may not appear the same as the actual
one. These screens are for reference purpose only.
Default Configuration
Most of the configuration settings are either predefined according to the Load Optimal Defaults
settings which are stored in the BIOS or are automatically detected and configured without
requiring any actions. There are a few settings that you may need to change depending on
your system configuration.
KEYs
Function
F1
Help
<Esc>
Exit
Up and Down Arrows
Select Item
Right and Left Arrows
Select Item
<F5>/<F6>
Change Values
<Enter>
Select 
<F9>
Setup Defaults
<F10>
Save and Exit
Submenu
Scroll Bar
When a scroll bar appears to the right of the setup screen, it indicates that there are more
available fields not shown on the screen. Use the up and down arrow keys to scroll through all
the available fields.
Entering the BIOS Setup Utility
Submenu
The BIOS Setup Utility can only be operated from the keyboard and all commands are keyboard commands. The commands are available at the right side of each setup screen.
When ““ appears on the left of a particular field, it indicates that a submenu which contains
additional options are available for that field. To display the submenu, move the highlight to
that field and press <Enter>.
The BIOS Setup Utility does not require an operating system to run. After you power up the
system, the BIOS message appears on the screen and the memory count begins. After the
memory test, the message “Press DEL to run setup” will appear on the screen. If the message
disappears before you respond, restart the system or press the “Reset” button. You may also
restart the system by pressing the <Ctrl> <Alt> and <Del> keys simultaneously.
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Chapter 4
Insyde BIOS Setup Utility
Advanced
Main
The Advanced menu allows you to configure your system for basic operation. Some entries are
defaults required by the system board, while others, if enabled, will improve the performance
of your system or let you set some features according to your preference.
The Main menu is the first screen that you will see when you enter the BIOS setup utility.
Important:
Setting incorrect field values may cause the system to malfunction.
Main
Advanced
Security
InsydeH20 Setup Utility
Boot
Exit
Rev. 5.0
ACPI Configuration Setting

ACPI Configuration

CPU Configuration

Video Configuration

Audio Configuration

SATA Configuration

USB Configuration

PCI Express Configuration

ME Configuration
MEBX Configuration

Active Management Technology Supoort

PC Health Status
F1 Help
Esc Exit
↑/↓ Select Item
←/→ Select Item
F5/F6 Change Values
Enter Select  SubMenu
F9 Setup Defaults
F10 Save and Exit
System Date
The date format is <month>, <date>, <year>. Day displays a day, from Sunday to
Saturday. Month displays the month, from January to December. Date displays the
date, from 1 to 31. Year displays the year, from 1980 to 2099.
System Time
The time format is <hour>, <minute>, <second>. The time is based on the 24-hour
military-time clock. For example, 1 p.m. is 13:00:00. Hour displays hours from 00 to
23. Minute displays minutes from 00 to 59. Second displays seconds from 00 to 59.
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Chapter 4
ACPI Settings
CPU Configuration
This section configures the system’s ACPI settings.
This section configures the CPU.
Wake on PME
Intel® SpeedStep™
Enable or disable Wake on PME (Power Management Event) to wake the system
through ACPI events.
Enable or disable the Enhanced Intel SpeedStep® Technology, which helps optimize the
balance between system’s power consumption and performance. After it is enabled in
the BIOS, you can enable the EIST feature using the operating system’s power management.
State After G3
This field is to specify what state the system should be in when power is re-applied
after a power failure (G3, the mechanical-off, state).
Turbo Mode
Always Off The system is powered off.
Enable or disable processor turbo mode, which allows the processor core to automatically run faster than the base frequency when by taking advantage of thermal and
power headroom. Note this option is not available on Core i3 processors.
BRGT Logo
CPU C States
Enable or disable the display of an operating system logo or image during boot using
the BGRT (Boot Graphics Resource Table) mechanism.
Enable or disable CPU Power Management. It allows the CPU to go to C states when
it’s not 100% utilized.
Always On The system is powered on.
Wake on RTC
Note:
With some Linux kernel OS such as Debian, CentOS, Ubuntu, this option
needs to be set to “disabled” before installation.
Automatically power the system on at a particular time every day from the Real-time
clock battery. Specify the wake up time of the day below: <hour>, <minute>, <second>.
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Chapter 4
Video Configuration
Boot display
This section configures video settings.
Set the display device combination during boot. Note this option is only available
when the boot type is set to “Dual” or “Legacy”.
Primary Display
Rev. 5.0
PTN3460 Configuration
Select the display panel color depth: 18 bit, 24 bit, 36 bit, and 48 bit.
Primary Display
Select either integrated graphics function (IGFX) or PCIe graphics device (PEG) to be
the primary display. Note that this option is only available if the boot type is set to
“Dual” or “UEFI”.
Internal Graphics Device
Enable or disable the integrated graphics function (IGFX).
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Chapter 4
LCD Panel Type
Audio Configuration
Select the resolution for your LCD panel.
This section configures audio settings.
Backlight Type
Azalia
Select the backlight brightness control using the Pulse Width Modulation (PWM) or the
DC mode.
Control the detection of the High-Definition Audio device.
Disabled
High Definition Audio will be unconditionally disabled.
Enabled
High Definition Audio will be unconditionally enabled.
Auto
High Definition Audio will be enabled if present and disabled otherwise.
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Chapter 4
SATA Configuration
USB Configuration
This section configures SATA controllers and their mode of operation.
This section configures the parameters of the USB device.
SATA Controller(s)
Legacy USB Support
Enable or disable Serial ATA devices.
Disabled Disable USB keyboard/mouse/storage support.
SATA Speed
Enabled Enable USB keyboard/mouse/storage support under UEFI and DOS environment.
Select Serial ATA device speed from Gen1 (1.5 Gbit/s), Gen2 (3 Gbit/s), Gen 3 (6
Gbit/s) or auto.
UEFI Only
Enable USB keyboard/mouse/storage support only under UEFI environment.
SATA Mode Selection
The mode selection determines how the SATA controller(s) operates.
XHCI Hand-off
AHCI Mode This option allows the Serial ATA devices to use AHCI (Advanced Host Controller Interface).
RAID Mode This option allows you to create RAID using Intel® Rapid Storage Technology on the
Serial ATA devices.
Set this option to disabled if the operating system supports xHCI hand-off (e.g. more
recent versions of Windows) and enabled if the operating system does not support
xHCI hand-off (e.g. older versions of Windows).
Serial ATA Port 0, 1, 2, and 3 Hot Plug
Enable or disable each Serial ATA port and its hot plug function.
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Chapter 4
PCI Express Configuration
PCI Express Root Port 1 to PCI Express Root Port 8
This section configures the settings of the PCIe root ports.
PCI Express Root Port
Enable or disable each PCI Express Root Port.
PCIe Speed
Select the speed of the PCI Express Root Port: Auto, Gen1 (2.5 GT/s), Gen2 (5 GT/s)
or Gen3 (8 GT/s).
Hot Plug
Enable or disable the hot plug function of each PCIe root port.
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Chapter 4
ME Configuration
Active Management Technology Support
This section configures the settings of flashing the Intel® Management Engine (ME).
The section allows users to enable or disable the Intel® Active Management Technology (Intel®
AMT) BIOS extension. Note that this function is not available on Core™ i3 processors or
HM175 chipset. Refer to Chapter 7 for more information.
Me Fw Image Re-Flash
Enable or disable flashing of the Intel® Management Engine (ME) region of the BIOS.
Intel AMT Support
Enable or disable the Intel® Active Management Technology (AMT) support of the
BIOS.
Un-Configure ME
Enable to clear all settings of the Intel® Active Management Technology (AMT) without
requiring a password on the next boot.
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Chapter 4
Debug Configuration
Device Manager
This section configures the debug function.
The system board allows RAID configuration on Serial ATA drives using Intel® Rapid Storage
Technology. It supports RAID 0, RAID 1, RAID 5 and RAID 10. Select this menu to enter the
Device Manager program for RAID configuration. Refer to Chapter 6 for more information.
Dynamic EFI Debug
Enable or disable output of the log messages for debugging through a serial port.
If you select to enable this function, please set a serial port for this purpose with the
following parameters:
EFI debug print level
Enter or choose the desired print level for displaying different type of log messages. The
options are as follows:
0x00000001: Display messages of system initialization
0x00000002: Display warning messages
0x00000004: Display messages of Load events
0x00000008: Display messages of EFI File system
0x00000040: Display informational debug messages
0x80000000: Display Error messages
0x8000004F: Display all types of messages shown above
EFI Debug serial port
Enter or choose the serial port number for message output. The options are COM1 (0x3F8)
and COM2 (0x2F8).
EFI Debug baud rate
Enter or choose the baud rate for serial communication. The default is 115200.
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Chapter 4
Super IO Configuration
WDT
This section configures COM port settings and displays PC health information.
Enable or disable the watchdog function. A counter will appear if you select to enable
WDT. Input any value between 1 to 255 seconds.
PC Health Status
COM Port 1 to COM Port 2
The screen displays the PC health status such as the CPU temperature and fan speeds.
Enable or disable each serial port.
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Chapter 4
Console Redirection
Security
Console redirection lets you monitor and control a system from a remote station by re-directing
the host screen output through a serial port.
This section configures security-related settings.
TPM Availability
Show or hide the TPM availability and its configurations.
Console Serial Redirect
Enable or disable the console redirection function. (The default is disabled.) If you
select to enable it, please configure the following parameters for serial communication
between the system and a remote station:
TPM Operation
Enable or disable the TPM function. It displays the following options:
Terminal type: VT_100, VT_100+, VT_UTF8 or PC_ANSI.
Baud rate: 115200, 57600, 38400, 19200, 9600, 4800, 2400 or 1200.
Data bits: 8 Bits or 7 Bits.
Parity: None, Even or Odd.
Stop bits: 1 Bit or 2 Bits.
Flow control: None, RTS/CTS or XON/XOFF
• No Operation: No changes to the current state.
• Disable: Disable and deactivate TPM.
• Enable: Enable and activate TPM.
Clear TPM
Remove all TPM ownership contents.
This is the global setting for all of the designated serial ports for the console redirection function.
Set Supervisor Password
Enter to set supervisor password for entering the BIOS setup utility or upon power-on
self-test (POST) depending on the configuration of the following Power-on Password
option.
COMA/COMB/PCI Serial Port
Enable or disable the serial redirection function for each of the detected serial ports on
the system. And configure the serial communication parameters to be used between
the system and a remote station. Alternatively, choose to use the pre-configured global
settings from the previous menu.
Power on Password
If you select to set the supervisor password, this option will be shown. Enable or disable the system to require password at boot.
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Chapter 4
Boot
Boot Device Priority
This section configures boot options.
This section configures legacy or EFI boot order or both depending on the “Boot Type”
selected.
Numlock
Turn on or off the number lock key at boot.
Boot Type
Select the boot mode. The options are Dual Boot Type, Legacy Boot Type, and UEFI
Boot Type.
EFI Boot Menu
Use + and - keys to arrange the priority of the boot devices in the list.
Network Stack
Normal Boot Menu
This option is shown only when the boot type is set to “Dual” or “UEFI”.
Enable or disable UEFI network stack. It supports the operation of these functions or
software: Windows 8 BitLocker Network Unlock, UEFI IPv4/IPv6 PXE and legacy PXE
Option ROM.
Normal
For this option, determine the boot order for the devices within each category. Use +
and - keys to arrange the priority of the boot devices in the list. The first device in the
list has the highest boot priority.
PXE Boot Capability
Enable or disable Preboot eXecution Environment (PXE) through LAN.
Advance
USB Boot
For this option, determine the boot order for all boot devices. Use + and - keys to arrange the priority of the detected boot devices in the list. The first device in the list
has the highest boot priority.
Enable or disable boot from USB devices.
Note:
If the boot type is set to UEFI, the method for RAID volume creation will be different.
Please refer to Chapter 6 for more information.
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Chapter 4
Boot Type Order
Use + and - keys to arrange the sequence of storage devices that the system’s
hardware checks for the operating system’s boot files. The first device in the order list
has the highest boot priority. For example, to boot from a floppy drive instead of a
hard drive, place the floppy drive ahead of the hard drive in priority.
Hard Disk Drive
All installed hard disk drives will be displayed in this field. Use + and - keys to
arrange the sequence of hard disk drives that the system’s hardware checks for the
operating system’s boot files.
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Chapter 4
Exit
This section configures options for exiting the BIOS setup utility.
Exit Saving Changes
Select this field and then press <Enter> to save your changes and exit the setup
program.
Load Optimal Defaults
Select this field and then press <Enter> to load optimal defaults.
Discard Changes
Select this field and then press <Enter>to exit the system setup without saving your
changes.
Save Setting to file
Select this option to save BIOS configuration settings to a USB drive. The operation will
fail if there aren’t any USB devices detected on the system. The saved configuration will
have the DSF file extension and can be used for restoration.
Restore Setting from file
Select this option to restore BIOS configuration settings from a USB drive. Note that
this option will not be available if there aren’t any USB devices detected on the system.
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Chapter 4
Updating the BIOS
Notice: BIOS SPI ROM
To update the BIOS, you will need the new BIOS file and a flash utility. Please contact technical support or your sales representative for the files and specific instructions about how to
update BIOS with the flash utility.
1. The Intel® Management Engine has already been integrated into this system board. Due to
the safety concerns, the BIOS (SPI ROM) chip cannot be removed from this system board
and used on another system board of the same model.
When you download the given BIOS file, you may find a BIOS flash utility attached with the
BIOS file. This is the utility for performing BIOS updating procedure. For your convenience, we
will also provide you with an auto-execution file in the BIOS file downloaded. This auto-execution file will bring you directly to the flash utility menu soon after system boots up and finishes
running the boot files on your boot disk.
2. The BIOS (SPI ROM) on this system board must be the original equipment from the factory
and cannot be used to replace one which has been utilized on other system boards.
RRead file successfully.
3. If you do not follow the methods above, the Intel® Management Engine will not be
updated and will cease to be effective.
Note:
a. You can take advantage of flash tools to update the default configuration of the
BIOS (SPI ROM) to the latest version anytime.
b. When the BIOS IC needs to be replaced, you have to populate it properly onto the
system board after the EEPROM programmer has been burned and follow the
technical person's instructions to confirm that the MAC address should be burned
or not.
(path= “platform.ini”)
Information
Please do not remove the AC power
Insyde H20FFT (Flash Firmware Tool) Version (SEG) 100.00.08.10
Copyright(c) 2012 - 2016, Insyde Software Corp. All Rights Reserved.
Initializing
Current BIOS Model name: KH960
New BIOS Model name: KH960
Current BIOS version: 65.05A
New BIOS version: 65.05A
Updating Block at FFFFF000h
0%
25%
50%
75%
C:\KH960>_
100%
100%
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Chapter 5
Chapter 5 - Supported Software
Intel Chipset Software Installation Utility
The DVD that came with the system board contains drivers, utilities and software applications
required to enhance the performance of the system board.
The Intel Chipset Software Installation Utility is used for updating Windows® INF files so that
the Intel chipset can be recognized and configured properly in the system.
Insert the DVD into a DVD-ROM drive. The autorun screen (Mainboard Utility DVD) will appear.
If the “Autorun” does not automatically start, please go directly to the root directory of the
DVD and double-click “Setup”.
To install the utility, click “Intel Chipset Software Installation Utility” on the main menu.
Auto Run Page (For Windows 10)
1. Setup is ready to install the
utility. Click “Next”.
2. Read the license agreement,
then click “Yes”.
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Chapter 5
Audio Drivers (for COM332-B Carrier Board)
3. Go through the readme
document for system
requirements and installation tips, then click “Next”.
Please wait while the installation is in progress.
To install the driver, click “Audio Drivers” on the main menu.
1. Setup is now ready to install the
audio driver. Click “Next”.
2. Follow the rest of the steps on
the screen; click “Next” each
time you finish a step.
4. Please wait while the installation is in progress.
3. Click “Yes, I want to restart my
computer now”, then click “Finish”.
Restart the system to allow the
new software installation to take
effect.
5. Click “Restart Now” to allow
the new software installation to take effect.
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Chapter 5
Intel Graphics Drivers
3. Go through the readme
document for system requirements and installation
tips, then click “Next”.
To install the driver, click “Intel Graphics Drivers” on the main menu.
1. Setup is now ready to
install the graphics driver.
Click “Next”.
4. Setup is now installing
the driver. Click “Next” to
continue.
By default, the “Automatically run WinSAT and enable the Windows Aero desktop theme” is
enabled. With this is enabled and after the system is rebooted, the screen will turn blank
for 1 to 2 minutes (while WinSAT is running) before the Windows 7/ Windows 8.1/ Windows
10 desktop appears. The “blank screen” period is the time Windows is testing the graphics
performance.
We recommend that you skip this process by disabling this function and then click “Next”.
2. Read the license agreement, then click “Yes”.
5. Click “Yes, I want to restart
this computer now”, then
click “Finish”.
Restarting the system will
allow the new software
installation to take effect.
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Chapter 5
Intel LAN Drivers
4. Click “Install” to begin the
installation.
To install the driver, click “Intel LAN Drivers” on the main menu.
1. Setup is preparing to install
the driver. Click “Next” to
continue.
5. After the installation is
complete, click “Finish”.
2. Click “I accept the terms in
the license agreement” if
you accept the agreement,
then click “Next”.
3. Select the program features
you want installed, then
click “Next”.
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Chapter 5
Intel Management Engine Drivers
3. Setup is currently installing
the driver. After the installation is complete, click
“Next”.
To install the driver, click “Intel Management Engine Drivers” on the main menu.
1. Setup is ready to install
the driver. Click “Next” to
continue.
4. After the installation is
complete, click “Finish” to
exit the setup program.
2. Read the license agreement and click “I accept
the terms in the license
agreement” if you accept
the agreement, then click
“Next”.
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Chapter 5
Intel Rapid Storage Technology
Adobe Acrobat Reader 9.3
The Intel Rapid Storage Technology is a utility that allows you to monitor the current status
of the SATA drives. It enables enhanced performance and power management for the storage
subsystem.
To install the reader, click “Adobe Acrobat Reader 9.3” on the main menu.
1. Please wait while the Setup
program is being processed.
To install the driver, click “Intel Rapid Storage Technology” on the main menu. Please refer to
Chapter 6 for more information.
2. Click “Install” to begin installation.
3. Click “Finish” to exit the installation.
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Chapter 5
HW Utility
3. Read the license agreement,
then click “I accept the terms
in the license agreement”.
Click “Next”.
HW Utility provides information about the board and configuration of the Watchdog and DIO.
To access the utility, click “HW Utility” on the main menu.
Note:
If you are using Windows 7 or later versions, you need to access the operating system as an administrator to be able to install the utility.
1. Setup is ready to install the
driver.
4. The wizard is ready to begin
installation. Click “Install”.
2. Click “Next” to continue.
5. Please wait while the program
features are being installed.
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Chapter 5
6. After the installation is
complete, click “Finish”.
The HW Utility icon will appear on the desktop. Double-click the icon to open the utility.
Information
HW Health
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Chapter 5
Watchdog
Backlight
DIO
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Chapter 6
Chapter 6 - RAID
Settings
The system board allows RAID configuration with levels of RAID 0, RAID 1, RAID 5 and RAID
10.
To enable the RAID function, the following settings are required.
1. Connect the Serial ATA drives.
RAID Levels
2. Enable RAID in the BIOS.
RAID 0 (Striped Disk Array without Fault Tolerance)
3. Create a RAID volume.
RAID 0 uses two new identical hard disk drives to read and write data in parallel, interleaved
stacks. Data is divided into stripes and each stripe is written alternately between two disk
drives. This improves the I/O performance of the drives at different channel; however it is not
fault tolerant. A failed disk will result in data loss in the disk array.
4. Install the Intel Rapid Storage Technology Utility.
RAID 1 (Mirrored Disk Array with Fault Tolerance)
Step 1: Connect the Serial ATA Drives
RAID 1 copies and maintains an identical image of the data from one drive to the other drive.
If a drive fails to function, the disk array management software directs all applications to the
other drive since it contains a complete copy of the drive’s data. This enhances data protection
and increases fault tolerance to the entire system. Use two new drives or an existing drive and
a new drive but the size of the new drive must be the same or larger than the existing drive.
Refer to carrier board manual for details on connecting the Serial ATA drives.
Important:
1. Make sure you have installed the Serial ATA drives and connected the data cables
otherwise you won’t be able to enter the RAID BIOS utility.
2. Treat the cables with extreme caution especially while creating RAID. A damaged
cable will ruin the entire installation process and operating system. The system will
not boot and you will lost all data in the hard drives. Please give special attention
to this warning because there is no way of recovering back the data.
RAID 5 (Striped Disk Array with Distributed Parity)
RAID 5 stripes data and parity information across hard drives. It is fault tolerant and provides
better hard drive performance and higher disk utilization than RAID 1.
RAID 10 (Mirrored and Striped Disk Array)
Step 2: Enable RAID in the BIOS
RAID 10 is a combination of data striping and data mirroring providing the benefits of both
RAID 0 and RAID 1.
RAID Level
Min. Drives
Protection
Description
RAID 0
2
None
Data striping without redundancy
RAID 1
2
Single Drive Failure
Disk mirroring
RAID 5
3
Single Drive Failure
RAID 10
4
1. Power on the system then press <Del> to enter the main menu of the BIOS.
2. Go to “Advanced” menu, and select the “SATA Configuration” menu.
3. Change the “SATA Mode Selection” to “RAID” mode. 4. Save the changes in the “Exit” menu.
5. Reboot the system.
Block-level data striping with
distributed parity
1 Disk Per Mirrored
Combination of RAID 0 (data striping)
Stripe (not same mirror) and RAID 1 (mirroring)
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Chapter 6
Step 3: Create a RAID Volume
Step 3-1: Create a RAID Volume if the boot type is UEFI
1.When the Intel RST option ROM status screen displays during POST, press <Ctrl> and
<I> simultaneously to enter the option ROM user interface.
If the boot type is set to UEFI, RAID volume creation will be different. Please use the following steps to create RAID volumes. To set the boot type, enter the BIOS utility and go to “Boot”
>”Boot type”.
®
2. Select 1: Create RAID Volume and press <Enter>.
3. Use the up or down arrow keys to select the RAID level and press <Enter>.
1. In the BIOS, go to the “Advanced” > “Device Manager”.
4. Use the up or down arrow keys to select the strip size and press <Enter>.
5. Press <Enter> to select the physical disks.
6. Use the up or down arrow keys to scroll through the list of hard drives and press <Space>
to select the drive.
7. Press <Enter>.
8. Select the volume size and press <Enter>. You must select less than one hundred percent
of the available volume space to leave space for the second volume.
9. Press <Enter> to create the volume.
10.At the prompt, press <Y> to confirm volume creation.
11. Select 4: Exit and press <Enter>.
12.Press <Y> to confirm exit.
2. Select Device Manager. The system will prompt you that it is going to exit the BIOS utility.
Select “OK” to continue.
Note:
These steps are cited from the Intel® Support site, “Set Up a System with Intel®
Matrix RAID Technology” (Article ID: 000005789).
3. The “Intel® Rapid Storage Technology” menu appears. Enter this menu.
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Chapter 6
Step 4: Install the Intel Rapid Storage Technology Utility
3. The screen displays all available drives. Select “Create RAID volume” to create a RAID
volume”.
The Intel Rapid Storage Technology Utility can be installed from within Windows. It allows
RAID volume management (create, delete, migrate) from within the operating system. It will
also display useful SATA device and RAID volume information. The user interface, tray icon
service and monitor service allow you to monitor the current status of the RAID volume and/or
SATA drives. Furthermore, It enables enhanced performance and power management for the
storage subsystem.
4. Use the up or down arrow keys to select the RAID level and press <Enter>.
5. Use the up or down arrow keys to scroll through the list of hard drives and press <Enter>
and select “x” to select the drive for the RAID group.
7. Use the up or down arrow keys to select the strip size and press <Enter>.
1. Insert the provided DVD into an optical drive.
8. Enter the capacity for the volume and press <Enter>.
2. Click “Intel Rapid Storage Driver” on the main menu.
9. Select “Create Volume” to start creating the volume.
3. Setup is ready to install
the utility. Click “Next” to
continue.
4. Read the license agreement and click “I accept
the terms in the License
Agreement“ if you accept
the agreement. Then, click
“Next”.
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5. Go through the readme
document to view system
requirements and installation information, then click
“Next”.
8. Click “Yes, I want to restart
this computer now” to
complete the installation
and click “Finish”.
6. Click “Next” to install to
the default folder or click
“change” to choose another
destination folder.
Enable Intel Smart Response Technology
Intel® Rapid Storage Technology (Inte® RST) comes with a caching feature, Intel® Smart Response Technology, to improve system performance with an SSD used as cache memory.
To use this features, the following requirements have to be met:
*Intel RST software 10.5 version release or later
*Single hard disk drive or multiple drives in one RAID volume
*Solid state drive (SSD) with a minimum capacity of 18.6 GB
*Operating system: Windows 7 (32-bit and 64-bit editions) or later versions
Before using this function, setup your system with the following methods:
1. Configure SATA mode in BIOS setup. Please refer to the previous section on Intel Rapid
Storage Technology for detailed instructions.
7. Confirm the installation and
click “Next”.
2. Install the operating system and all required device drivers.
3. Install the Intel RST software version 10.5 or later.
4. Enable Intel Smart Response Technology, which is denoted as accelerate in the Intel RST
software.
Note:
The above information is cited from the Intel® Support site, “Intel® Smart Response Technology User Guide” (Article ID: 000005501).
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Chapter 7 - Intel AMT Settings
Enable Intel® AMT in the BIOS
Overview
1. Power-on the system then press <Del> to enter the main menu of the BIOS setup utility.
Intel Active Management Technology (Intel AMT) combines hardware and software solution to
provide maximum system defense and protection to networked systems.
2. In the “Advanced” menu, select “Active Management Technology Support”.
®
The hardware and software information are stored in non-volatile memory. With its built-in
manageability and latest security applications, Intel® AMT provides the following functions.
• Discover
Allows remote access and management of networked systems even while PCs are powered off;
significantly reducing desk-side visits.
• Repair
Remotely repair systems after OS failures. Alerting and event logging help detect problems
quickly to reduce downtime.
• Protect
Intel AMT’s System Defense capability remotely updates all systems with the latest security
software. It protects the network from threats at the source by proactively blocking incoming
threats, reactively containing infected clients before they impact the network, and proactively
alerting when critical software agents are removed.
3. In the “Active Management Technology Support” menu, select “Enabled” for “Intel AMT
Support”.
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Set up Intel® AMT using the Intel® Management
Engine BIOS Extension (MEBX)
4. In the “Exit” menu, select “Exit Saving Changes”, and then select “OK”.
1. After the system reboots, press <Del> to enter the BIOS menu again.
2. In the “Advanced” menu, select “MEBX Configuration to enter the Manageability Engine
BIOS Extension (MEBx) Setup.
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5. You will be asked to verify the password. Enter the same new password in the space provided under “Verify Password”, then press “Enter”.
3. Select “MEBX Login”. You will be prompted for a password. The default password is “admin”. Enter the default password in the space provided under Intel(R) ME Password and
then press “Enter”.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
MAIN MENU
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
MAIN MENU
MEBx Login
> Intel (R) ME General Settings
> Intel (R) AMT Configuration
MEBx Exit
MEBx Login
> Intel (R) ME General Settings
> Intel (R) AMT Configuration
MEBx Exit
Verify Password
Intel(R) ME Password
Intel(R) ME Password
[↑↓] = Move Highlight
[Enter] = Select Entry
[↑↓] = Move Highlight
[Esc]= Exit
4. Enter a new password in the space provided under Intel(R) ME New Password then press
Enter. The password must include:
•
•
•
•
•
[Enter] = Select Entry
[Esc]= Exit
6. Select “Intel(R) ME General Settings”, then press “Enter”.
8-32 characters
Strong 7-bit ASCII characters excluding : , and ” characters
At least one digit character (0, 1, ...9)
At least one 7-bit ASCII non alpha-numeric character, above 0x20, (e.g. !, $, ;)
Both lower case and upper case characters
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
MAIN MENU
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
MAIN MENU
> Intel (R) ME General Settings
> Intel (R) AMT Configuration
MEBx Exit
MEBx Login
> Intel (R) ME General Settings
> Intel (R) AMT Configuration
MEBx Exit
Intel (R) ME New Password
Intel(R) ME Password
[↑↓] = Move Highlight
[Enter] = Select Entry
[↑↓] = Move Highlight
[Enter] = Select Entry
[Esc]= Exit
[Esc]= Exit
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7. Select “Change Intel(R) ME Password” and then press “Enter”.
8.Select “Local FW Update”, then press “Enter”. Select “Enabled” or “Disabled” or “Password Protected” and then press “Enter”.
You will be prompted for a password. The default password is “admin”. Enter the default
password in the space provided under “Intel(R) ME New Password” and then press “Enter”.
•
•
•
•
•
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R) ME PLATFORM CONFIGURATION
8-32 characters
Strong 7-bit ASCII characters excluding : , and ” characters
At least one digit character (0, 1, ...9)
At least one 7-bit ASCII non alpha-numeric character, above 0x20, (e.g. !, $, ;)
Both lower case and upper case characters
Change ME Password
Local FW Update
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R) ME PLATFORM CONFIGURATION
Change ME Password
Local FW Update
<Enabled>
Disabled
Enabled
Password Protected
<Enabled>
Intel (R) ME New Password
[↑↓] = Move Highlight [Enter] = Complete Entry [Esc]= Discard Changes
9. Select Previous Menu until you return to the “Main Menu”. Select “Intel(R) AMT Configuration”, then press “Enter”.
Intel (R) ME New Password
[↑↓] = Move Highlight
[Enter] = Select Entry
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R) AMT CONFIGURATION
[Esc]= Exit
Manageability Feature Selection
> SOL/Storage Redirection/KVM
> User Consent
Password Policy
> Network Setup
Activate Netwok Access
Unconfigure Network Access
> Remote Setup And Configuration
> Power Control
[↑↓] = Move Highlight
< Enabled>
<Anytime>
<Full Unprovision>
[Enter] = Select Entry
[Esc]= Exit
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10. In the “Intel(R) AMT Configuration” menu, select “Manageability Feature Selection”, then
press “Enter”. Select “Enabled” or “Disabled”, then press “Enter”.
12. In the “SOL/Storage Redirection/KVM” menu, select “Username and Password”, then
press “Enter”. Select “Enabled” or “Disabled”, then press “Enter”.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R) AMT CONFIGURATION
Manageability Feature Selection
> SOL/Storage Redirection/KVM
> User Consent
Password Policy
> Network Setup
Disabled
Activate Netwok Access
Enabled
Unconfigure Network Access
> Remote Setup And Configuration
> Power Control
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
SOL/Storage Redirection/KVM
Username and Password
SOL
Storage Redirection
KVM Feature Selection
< Enabled>
<Anytime>
<Full Unprovision>
Disabled
Enabled
[↑↓] = Move Highlight [Enter] = Complete Entry [Esc]= Discard Changes
[↑↓] = Move Highlight [Enter] = Complete Entry [Esc]= Discard Changes
11. In the “Intel(R) AMT Configuration” menu, select “SOL/Storage Redirection/KVM”, then
press “Enter”.
13. In the “SOL/Storage Redirection/KVM” menu, select “SOL”, then press “Enter”. Select
“Enabled” or “Disabled”, then press “Enter”.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R) AMT CONFIGURATION
Manageability Feature Selection
> SOL/Storage Redirection/KVM
> User Consent
Password Policy
> Network Setup
Activate Netwok Access
Unconfigure Network Access
sion>
> Remote Setup And Configuration
> Power Control
<Enabled>
<Enabled>
<Enabled>
<Enabled>
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
SOL/Storage Redirection/KVM
< Enabled>
Username and password
SOL
Storage Redirection
KVM Feature Selection
<Anytime>
<Full Unprovi-
<Enabled>
<Enabled>
<Enabled>
<Enabled>
Disabled
Enabled
[↑↓] = Move Highlight [Enter] = Complete Entry [Esc]= Discard Changes
[↑↓] = Move Highlight [Enter] = Select Entry [Esc]= Exit
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14. In the “SOL/Storage Redirection/KVM” menu, select “Storage Redirection”, then press
“Enter”. Select “Enabled” or “Disabled”, then press “Enter”.
16. Select Previous Menu until you return to the “Intel(R) AMT Configuration” menu. Select
“User Consent”, then press “Enter”.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
USER CONSENT
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
SOL/Storage Redirection/KVM
Username and password
SOL
Storage Redirection
KVM Feature Selection
User Opt-in
Opt-in Configurable from Remote IT
<Enabled>
<Enabled>
<Enabled>
<Enabled>
< KVM>
< Enabled>
Disabled
Enabled
Configure When User Consent Should be Required.
[↑↓] = Move Highlight
[↑↓] = Move Highlight [Enter] = Complete Entry [Esc]= Discard Changes
15. In the “SOL/IDER/KVM” menu, select “KVM Feature Selection” and then press “Enter”.
Select “Enabled” or “Disabled”, then press “Enter”.
[Esc]= Exit
17. In the “User Consent” menu, select “User Opt-in”, then press “Enter”. Select “None” or
“KVM” or “ALL”, then press “Enter”.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
SOL/Storage Redirection/KVM
Username and password
SOL
Storage Redirection
KVM Feature Selection
[Enter] = Select Entry
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
USER CONSENT
<Enabled>
<Enabled>
<Enabled>
<Enabled>
User Opt-in
Opt-in Configurable from Remote IT
< KVM>
< Enabled>
NONE
KVM
ALL
Disabled
Enabled
[↑↓] = Move Highlight [Enter] = Complete Entry [Esc]= Discard Changes
[↑↓] = Move Highlight [Enter] = Complete Entry [Esc]= Discard Changes
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18. In the “User Consent” menu, select “Opt-in Configurable from Remote IT”, then press
“Enter”. Select “Enabled” or “Disable Remote Control of KVM Opt-in Policy”, then press
“Enter”.
20. In the “Intel(R) AMT Configuration” menu, select “Network Setup”, then press “Enter”.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R) AMT CONFIGURATION
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
USER CONSENT
User Opt-in
Opt-in Configurable from Remote IT
Manageability Feature Selection
> SOL/Storage Redirection/KVM
> User Consent
Password Policy
> Network Setup
Activate Network Access
Unconfigure Network Access
> Remote Setup And Configuration
> Power Control
< KVM>
< Enabled>
Disabled
Enabled
< Enabled>
<Anytime>
<Full Unprovision>
Enable/Disable Remote Change Capability of User Consent Feature
[↑↓] = Move Highlight
[↑↓] = Move Highlight [Enter] = Complete Entry [Esc]= Discard Changes
[Esc]= Exit
21. In the “Intel(R) ME Network Setup” menu, select “Intel(R) ME Network Name Settings”,
then press “Enter”.
19. Select Previous Menu until you return to the “Intel(R) AMT Configuration” menu. Select
“Password Policy”, then press “Enter”.
[Enter] = Select Entry
You may choose to use a password only during setup and configuration or to use a password anytime the system is being accessed.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R) ME NETWORK SETUP
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R) AMT CONFIGURATION
> Intel (R) ME Network Name Settings
> TCP/ IP Settings
Manageability Feature Selection
< Enabled>
> SOL/Storage Redirection/KVM
> User Consent
Password Policy
<Anytime>
> Network Setup
Activate Netwok Access
Unconfigure Network Access
<Full Unprovision>
> Remote Setup And Configuration
> Power Control
Default Password Only
During Step And Configuration
Anytime
[↑↓] = Move Highlight
[Enter] = Select Entry
[Esc]= Exit
[↑↓] = Move Highlight [Enter] = Complete Entry [Esc]= Discard Changes
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24. Select “Shared/Dedicated FQDN”, then press “Enter”. Select “Shared” or “Dedicated”, then
press “Enter”.
22. In the “Intel(R) ME Network Name Settings” menu, select “Host Name”, then press “Enter”. Enter the computer’s host name and then press “Enter”.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R) ME NETWORK NAME SETTINGS
Host Name
Domain Name
Shared/ Dedicated FQDN
Dynamic DNS Update
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R) ME NETWORK NAME SETTINGS
_
_
<Shared>
<Disabled>
Host Name
Domain Name
Shared/ Dedicated FQDN
Dynamic DNS Update
Computer Host Name
[Enter] = Complete Entry
Dedicated
Shared
[↑↓] = Move Highlight [Enter] = Complete Entry [Esc]= Discard Changes
[Esc]= Discard Changes
23. Select “Domain Name” and then press “Enter”. Enter the computer’s domain name, then
press “Enter”.
25. Select “Dynamic DNS Update”, then press “Enter”. Select “Enabled” or “Disabled”, then
press “Enter”.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R) ME NETWORK NAME SETTINGS
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R) ME NETWORK NAME SETTINGS
Host Name
Domain Name
Shared/ Dedicated FQDN
Dynamic DNS Update
_
_
<Shared>
<Disabled>
Host Name
Domain Name
Shared/ Dedicated FQDN
Dynamic DNS Update
Computer Domain Name
[Enter] = Complete Entry
_
_
<Shared>
<Disabled>
_
_
<Shared>
<Disabled>
Disabled
Enabled
[↑↓] = Move Highlight [Enter] = Complete Entry [Esc]= Discard Changes
[Esc]= Discard Changes
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26. Select Previous Menu until you return to the “Intel(R) ME Network Setup” menu. Select
“TCP/IP Settings”, then press “Enter”.
If DHCP mode is disabled, the following items will appear.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
TCP/ IP SETTINGS
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
WIRED LAN IPV4 CONFIGURATION
> Wired LAN IPV4 Configuration
[↑↓] = Move Highlight
[Enter] = Select Entry
DHCP Mode
IPV4 Address
Subnet Mask Address
Default Gateway Addres
Preferred DNS Address
Alternate DNS Address
[Esc]= Exit
<Disabled>
0.0.0.0
0.0.0.0
0.0.0.0
0.0.0.0
0.0.0.0
[↑↓] = Move Highlight [Enter] = Complete Entry [Esc]= Discard Changes
27. In the “TCP/IP Settings” menu, select “Wired LAN IPV4 Configuration”, then press “Enter”.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
WIRED LAN IPV4 CONFIGURATION
DHCP Mode
<Enabled>
Disabled
Enabled
[↑↓] = Move Highlight [Enter] = Complete Entry [Esc]= Discard Changes
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28. In the “Intel(R) AMT Configuration” menu, select “Activate Network Access”, then select
“Yes/No” and press “Enter”.
30. In the “Intel(R) AMT Configuration” menu, select “Remote Setup And Configuration”, then
press “Enter”.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R) AMT CONFIGURATION
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R) AMT CONFIGURATION
Manageability Feature Selection
< Enabled>
> SOL/Storage Redirection/KVM
> User Consent
Password Policy
<Anytime>
> Network Setup
Activate Network Access
Unconfigure Network Access
<Full Unprovision>
> Remote Setup And Configuration
> Power Control
Activated the current network setting
and opens the ME network interface
Continue: (Y/N)
Manageability Feature Selection
> SOL/Storage Redirection/KVM
> User Consent
Password Policy
> Network Setup
Activate Network Access
Unconfigure Network Access
> Remote Setup And Configuration
> Power Control
[↑↓] = Move Highlight [Enter] = Select Entry [Esc]= Exit
[↑↓] = Move Highlight
29. In the “Intel(R) AMT Configuration” menu, select “Unconfigure Network Access”, then
press “Enter”.
<Anytime>
<Full Unprovision>
[Enter] = Select Entry
[Esc]= Exit
31. In the “Intel(R) Remote Setup And Configuration” menu, select “Current Provisioning
Mode”, then press “Enter”.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R) AMT CONFIGURATION
Manageability Feature Selection
> SOL/Storage Redirection/KVM
> User Consent
Password Policy
> Network Setup
Activate Network Access
Unconfigure Network Access
> Remote Setup And Configuration
> Power Control
< Enabled>
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R) REMOTE SETUP AND CONFIGURATION
Current Provisioning Mode
Provisioning Record
Provisioning Server IPV4/IPV6
Provisioning Server FQDN
> RCFG
> TLS PKI
< Enabled>
<Anytime>
_
_
<Full Unprovision>
Provisioning Mode:PKI
Full Unprovision
[↑↓] = Move Highlight [Enter] = Complete Entry [Esc]= Discard Changes
[↑↓] = Move Highlight
[Enter] = Select Entry
[Esc]= Exit
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32. In the “Intel(R) Remote Setup And Configuration” menu, select “Provisioning Record”,
then press “Enter”.
34. In the “Intel(R) Remote Setup And Configuration” menu, select “Provisioning server
FQDN”, enter the FQDN of Provisioning, then press “Enter”.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R) REMOTE SETUP AND CONFIGURATION
Current Provisioning Mode
Provisioning Record
Provisioning Server IPV4/IPV6
Provisioning Server FQDN
> RCFG
> TLS PKI
INTEL (R) REMOTE SETUP AND CONFIGURATION
Current Provisioning Mode
Provisioning Record
Provisioning Server IPV4/IPV6
Provisioning Server FQDN
> RCFG
> TLS PKI
_
_
Enter FQDN of provisioning server
Provision Record is not present
[↑↓] = Move Highlight
[Enter] = Select Entry
[Esc]= Exit
[Enter] = Complete Entry
33. In the “Intel(R) Remote Setup And Configuration” menu, select “Provisioning server IPV4/
IPV6”, enter the Provisioning server address, then press “Enter”.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R) REMOTE SETUP AND CONFIGURATION
INTEL (R) REMOTE CONFIGURATION
_
_
Start Configuration
This will activate Remote Condiguration. Continue: (Y/N)
Provisioning server address
[Enter] = Complete Entry
[Esc]= Discard Changes
35. In the “Intel(R) Remote Setup And Configuration” menu, select “RCFG” and press “Enter”,
then select “Start Configuration Y/N” and press “enter”.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
Current Provisioning Mode
Provisioning Record
Provisioning Server IPV4/IPV6
Provisioning Server FQDN
> RCFG
> TLS PKI
_
_
[Esc]= Discard Changes
[↑↓] = Move Highlight
[Enter] = Select Entry
[Esc]= Exit
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36. In the “Intel(R) Remote Setup And Configuration” menu, select “TLS PKI”, then press
“Enter”.
37. Select “PKI DNS Suffix”, enter the “PKI DNS Suffix”, then press “Enter”.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R) REMOTE SETUP AND CONFIGURATION
INTEL (R) REMOTE CONFIGURATION
Current Provisioning Mode
Provisioning Record
Provisioning Server IPV4/IPV6
Provisioning Server FQDN
> RCFG
> TLS PKI
Remote Configuration**
PKI DNS Suffix
> Manage Hashes
_
_
< Enabled>
_
Enter PKI DNS Suffix
[↑↓] = Move Highlight
[Enter] = Select Entry
[Enter] = Complete Entry
[Esc]= Exit
37. In the “Intel(R) Remote Configuration” menu, select “Remote Configuration**” and press
“Enter”, then select “Enabled” or “Disabled” and press “Enter”.
[Esc]= Discard Changes
38. Select “Manage Hashes” and press “Enter”, then select one of the hash names.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R) REMOTE CONFIGURATION
INTEL (R) REMOTE CONFIGURATION
Remote Configuration**
PKI DNS Suffix
> Manage Hashes
< Enabled>
_
Remote Configuration**
PKI DNS Suffix
> Manage Hashes
< Enabled>
_
Disabled
Enabled
[↑↓] = Move Highlight [Enter] = Complete Entry [Esc]= Discard Changes
[↑↓] = Move Highlight
[Enter] = Select Entry
[Esc]= Exit
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Chapter 7
41. In the “Intel(R) AMT Power Control” menu, select “Intel(R) AMT ON in Host Sleep States”
, then press “Enter”. Select an option then press “Enter”.
39. In the Intel(R) Remote Configuration menu, select “Manage Hashes”, then press “Enter”.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R) AMT POWER CONTROL
INTEL (R) REMOTE CONFIGURATION
Hash Name
VeriSign Class 3
VeriSign Class 3
Go Daddy Class 2
Comodo AAA CA
Starfield Class 2
VeriSign Class 3
VeriSign Class 3
VeriSign Class 3
GTE CyberTrust G1
Baltimore Cyber Tr
Cyber Trust Global
Verizon Global Ro
Entrust. net CA (2
Entrust Root CA
VeriSign Universa
Go Daddy Root CA
Entrust Root CA Startfield Root CA
[Ins]= Add New Hash
[↑↓] =Move Highlight
Active
Active: [*]
Active: [*]
Active: [*]
Active: [*]
Active: [*]
Active: [*]
Active: [*]
Active: [*]
Active: [*]
Active: [*]
Active: [*]
Active: [*]
Active: [*]
Active: [*]
Active: [*]
Active: [*]
Active: [*]
Active: [*]
[Delete] = Delete Hash
[Enter] = View Hash
Default
Default: [*]
Default: [*]
Default: [*]
Default: [*]
Default: [*]
Default: [*]
Default: [*]
Default: [*]
Default: [*]
Default: [*]
Default: [*]
Default: [*]
Default: [*]
Default: [*]
Default: [*]
Default: [*]
Default: [*]
Default: [*]
Algorithm
SHA256
SHA256
SHA256
SHA256
SHA256
SHA256
SHA256
SHA256
SHA256
SHA256
SHA256
SHA256
SHA256
SHA256
SHA256
SHA256
SHA256
SHA256
These configurations are effective only after AMT provisioning has started
Intel (R) AMT ON in Host Sleep States
Idle Timeout
Mobile: ON in S0
Mobile: ON in S0, ME Wake in S3, S4-5 (AC only)
[↑↓] = Move Highlight [Enter] = Complete Entry [Esc]= Discard Changes
42. In the “Intel(R) AMT Power Control” menu, select “Idle Timeout”, then press “Enter”.
Enter the timeout value (1-65535).
[+] = Activate Hash
[Esc]= Exit
40. In the “Intel(R) AMT Configuration” menu, select “Power Control”, then press “Enter”.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R)MAIN
AMT MENU
POWER CONTROL
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
INTEL (R) AMT CONFIGURATION
Manageability Feature Selection
> SOL/ IDER/ KVM
> User Consent
Password Policy
> Network Setup
Activate Netwok Access
Unconfigure Network Access
> Remote Setup And Configuration
> Power Control
This configurations are effective only after AMT provisioning has started
< Enabled>
Intel (R) ME ON in Host Sleep States
<Anytime>
Idle Timeout
<Full Unprovision>
[Enter] = Select Entry
<Mobile: ON in S0,
ME Wake in S3, S4-5
(AC only)>
65535
Timeout Value (1-65535)
65535
<ENTER> = Complete Entry
[↑↓] = Move Highlight
<Mobile: ON in S0,
ME Wake in S3, S4-5
(AC only)>
65535
[ESC]= Discard Changes
[Esc]= Exit
73
Chapter 7 Intel AMT Settings
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Chapter 7
43. Select Previous Menu until you return to the “Main Menu”. Select “Exit”, then press “Enter”. Type “Y”, then press “Enter”.
Intel(R) Management Engine BIOS Extension v11.0.0.0005/Intel(R) ME v11.0.0.1197
Copyright(C) 2003-15 Intel Corporation. All Rights Reserved.
MAIN MENU
> Intel (R) ME General Settings
> Intel (R) AMT Configuration
MEBx Exit
Exit
[↑↓] = Move Highlight
[Enter] = Select Entry
[Esc]= Exit
74
Chapter 7 Intel AMT Settings
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Appendix A
Appendix A - Troubleshooting
The picture seems to be constantly moving.
1. The monitor has lost its vertical sync. Adjust the monitor’s vertical sync.
Troubleshooting Checklist
2. Move away any objects, such as another monitor or fan, that may be creating a magnetic
field around the display.
This chapter of the manual is designed to help you with problems that you may encounter
with your personal computer. To efficiently troubleshoot your system, treat each problem individually. This is to ensure an accurate diagnosis of the problem in case a problem has multiple
causes.
3. Make sure your video card’s output frequencies are supported by this monitor.
The screen seems to be constantly wavering.
Some of the most common things to check when you encounter problems while using your
system are listed below.
1. The power switch of each peripheral device is turned on.
1. If the monitor is close to another monitor, the adjacent monitor may need to be turned off.
Fluorescent lights adjacent to the monitor may also cause screen wavering.
2. All cables and power cords are tightly connected.
Power Supply
3. The electrical outlet to which your peripheral devices are connected is working. Test the
outlet by plugging in a lamp or other electrical device.
When the computer is turned on, nothing happens.
4. The monitor is turned on.
1. Check that one end of the AC power cord is plugged into a live outlet and the other end
properly plugged into the back of the system.
5. The display’s brightness and contrast controls are adjusted properly.
2. Make sure that the voltage selection switch on the back panel is set for the correct type of
voltage you are using.
6. All add-in boards in the expansion slots are seated securely.
3. The power cord may have a “short” or “open”. Inspect the cord and install a new one if
necessary.
7. Any add-in board you have installed is designed for your system and is set up correctly.
Monitor/Display
If the display screen remains dark after the system is turned on:
1. Make sure that the monitor’s power switch is on.
2. Check that one end of the monitor’s power cord is properly attached to the monitor and the
other end is plugged into a working AC outlet. If necessary, try another outlet.
3. Check that the video input cable is properly attached to the monitor and the system’s
display adapter.
4. Adjust the brightness of the display by turning the monitor’s brightness control knob.
75
Appendix A Troubleshooting
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Appendix A
Hard Drive
System Board
Hard disk failure.
1. Make sure the add-in card is seated securely in the expansion slot. If the add-in card is
loose, power off the system, re-install the card and power up the system.
1. Make sure the correct drive type for the hard disk drive has been entered in the BIOS.
2. Check the jumper settings to ensure that the jumpers are properly set.
2. If the system is configured with two hard drives, make sure the bootable (first) hard drive
is configured as Master and the second hard drive is configured as Slave. The master hard
drive must have an active/bootable partition.
3. Verify that all memory modules are seated securely into the memory sockets.
4. Make sure the memory modules are in the correct locations.
Excessively long formatting period.
5. If the board fails to function, place the board on a flat surface and seat all socketed components. Gently press each component into the socket.
If your hard drive takes an excessively long period of time to format, it is likely a cable connection problem. However, if your hard drive has a large capacity, it will take a longer time to
format.
6. If you made changes to the BIOS settings, re-enter setup and load the BIOS defaults.
Serial Port
The serial device (modem, printer) doesn’t output anything or is outputting garbled
characters.
1. Make sure that the serial device’s power is turned on and that the device is on-line.
2. Verify that the device is plugged into the correct serial port on the rear of the computer.
3. Verify that the attached serial device works by attaching it to a serial port that is working and configured correctly. If the serial device does not work, either the cable or the serial
device has a problem. If the serial device works, the problem may be due to the onboard I/O
or the address setting.
4. Make sure the COM settings and I/O address are configured correctly.
Keyboard
Nothing happens when a key on the keyboard was pressed.
1. Make sure the keyboard is properly connected.
2. Make sure there are no objects resting on the keyboard and that no keys are pressed during the booting process.
76
Appendix A Troubleshooting
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Appendix B
Appendix B - Insyde BIOS Standard Status POST Code
SEC Phase 8-Bit POST Code Values
Functionality Name
SEC_SYSTEM_POWER_ON
SEC_AFTER_MICROCODE_PATCH
SEC_ACCESS_CSR
SEC_GENERIC_MSRINIT
SEC_CPU_SPEEDCFG
SEC_SETUP_CAR_OK
SEC_FORCE_MAX_RATIO
SEC_GO_TO_SECSTARTUP
SEC_GO_TO_PEICORE
POST Code Value Description
01
CPU power on and switch to Protected mode
03
Setup Cache as RAM
04
PCIE MMIO Base Address initial
05
CPU Generic MSR initialization
06
Setup CPU speed
07
Cache as RAM test
08
Tune CPU frequency ratio to maximum level
09
Setup BIOS ROM cache
0A
Enter Boot Firmware Volume
PEI Phase 8-Bit POST Code Values
Functionality Name
PEI_SIO_INIT
PEI_CPU_REG_INIT
PEI_CPU_AP_INIT
PEI_CPU_HT_RESET
PEI_PCIE_MMIO_INIT
PEI_NB_REG_INIT
PEI_SB_REG_INIT
PEI_PCIE_TRAINING
PEI_TPM_INIT
PEI_MEMORY_INSTALL
PEI_TXTPEI
PEI_MEMORY_CALLBACK
POST Code Value
70
71
72
73
74
75
76
77
78
80
81
83
DXE Phase 8-Bit POST Code Values
Functionality Name
DXE_SB_SPI_INIT
DXE_VARIABLE_RECLAIM
DXE_FLASH_PART_NONSUPPORT
Description
Super I/O initialization
CPU Early Initialization
Multi-processor Early initialization
HyperTransport initialization
PCIE MMIO BAR Initialization
North Bridge Early Initialization
South Bridge Early Initialization
PCIE Training
TPM Initialization
Simple Memory test
TXT function early initialization
Set cache for physical memory
BDS_CONNECT_USB_DEVICE
BDS_NO_CONSOLE_ACTION
BDS_ENUMERATE_ALL_BOOT_OPTION
BDS_ENTER_SETUP
BDS_ENTER_BOOT_MANAGER
BDS_READY_TO_BOOT_EVENT
BDS_GO_LEGACY_BOOT
BDS_GO_UEFI_BOOT
BDS_LEGACY16_PREPARE_TO_BOOT
BDS_EXIT_BOOT_SERVICES
1B
1C
27
29
2A
2E
2F
30
31
32
USB device driver initialization
Console device initialization fail
Get boot device information
Enter Setup Menu
Enter Boot manager
Last Chipset initialization before boot to OS
Start to boot Legacy OS
Start to boot UEFI OS
Prepare to Boot to Legacy OS
Send END of POST Message to ME via HECI
PostBDS Phase 8-Bit POST Code Values
Functionality Name
POST_BDS_NO_BOOT_DEVICE
POST_BDS_JUMP_BOOT_SECTOR
POST Code Value Description
F9
No Boot Device
FE
Try to Boot with INT 19
ACPI 8-Bit POST Code Values
Functionality Name
ASL_ENTER_S1
ASL_ENTER_S3
ASL_ENTER_S4
ASL_ENTER_S5
ASL_WAKEUP_S1
ASL_WAKEUP_S3
ASL_WAKEUP_S4
ASL_WAKEUP_S5
POST Code Value Description
51
Prepare to enter S1
53
Prepare to enter S3
54
Prepare to enter S4
55
Prepare to enter S5
E1
System wakeup from S1
E3
System wakeup from S3
E4
System wakeup from S4
E5
System wakeup from S5
SMM 8-Bit POST Code Values
Functionality Name
SMM_ACPI_ENABLE_END
SMM_S1_SLEEP_CALLBACK
SMM_S3_SLEEP_CALLBACK
SMM_S4_SLEEP_CALLBACK
SMM_S5_SLEEP_CALLBACK
POST Code Value Description
A7
ACPI enable function complete
A1
Enter S1
A3
Enter S3
A4
Enter S4
A5
Enter S5
Post Code Values Description
41
South bridge SPI initialization
61
Variable store garbage collection and reclaim operation
62
Flash part not supported.
BDS Phase 8-Bit POST Code Values
Functionality Name
POST Code Value
BDS_ENTER_BDS
10
BDS_INSTALL_HOTKEY
11
BDS_ASF_INIT
12
BDS_PCI_ENUMERATION_START
13
BDS_BEFORE_PCIIO_INSTALL
14
BDS_PCI_ENUMERATION_END
15
BDS_CONNECT_CONSOLE_IN
16
BDS_CONNECT_CONSOLE_OUT
17
BDS_CONNECT_STD_ERR
18
BDS_CONNECT_USB_HC
19
BDS_CONNECT_USB_BUS
1A
BDS_CONNECT_USB_DEVICE
1B
BDS_NO_CONSOLE_ACTION
1C
BDS_ENUMERATE_ALL_BOOT_OPTION
27
BDS_ENTER_SETUP
29
BDS_ENTER_BOOT_MANAGER
2A
BDS_READY_TO_BOOT_EVENT
2E
BDS_GO_LEGACY_BOOT
2F
BDS_GO_UEFI_BOOT
30
BDS_LEGACY16_PREPARE_TO_BOOT
31
BDS_EXIT_BOOT_SERVICES
32
Description
Enter BDS entry
Install Hotkey service
ASF Initialization
PCI enumeration
PCI resource assign complete
PCI enumeration complete
Keyboard Controller, Keyboard and Mouse initializatio
Video device initialization
Error report device initialization
USB host controller initialization
USB BUS driver initialization
USB device driver initialization
Console device initialization fail
Get boot device information
Enter Setup Menu
Enter Boot manager
Last Chipset initialization before boot to OS
Start to boot Legacy OS
Start to boot UEFI OS
Prepare to Boot to Legacy OS
Send END of POST Message to ME via HECI
PostBDS Phase 8-Bit POST Code Values
Functionality Name
POST Code Value Description
POST_BDS_NO_BOOT_DEVICE
Boot Device
Appendix
B Insyde BIOS Standard F9
Status No
POST
Code
77
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