AFBR-5805Z/5805TZ/5805AZ/5805ATZ
ATM Transceivers for SONET OC-3 / SDH
STM-1 in Low Cost 1 x 9 Package Style
Data Sheet
Features
Description
ATM 2 km Backbone Links
The AFBR-5800Z family of
transceivers from Agilent
provide the system designer
with products to implement a
range of solutions for
multimode fiber SONET OC-3
(SDH STM-1) physical layers
for ATM and other services.
The AFBR-5805Z/-5805TZ are
1300 nm products with optical
performance compliant with
the SONET STS-3c (OC-3)
Physical Layer Interface
Specification. This physical
layer is defined in the ATM
Forum User-Network Interface
(UNI) Specification Version 3.0.
This document references the
ANSI T1E1.2 specification for
the details of the interface for
2 km multimode fiber
backbone links.
The transceivers are all
supplied in the industry
standard 1 x 9 SIP package
style with either a duplex SC
or a duplex ST* connector
interface.
The ATM 100 Mb/s-125 MBd
Physical Layer interface is best
implemented with the AFBR5803 family of Fast Ethernet
and FDDI Transceivers which
are specified for use in this
4B/5B encoded physical layer
per the FDDI PMD standard.
• Full compliance with ATM forum
UNI SONET OC-3 multimode fiber
physical layer specification
• Multisourced 1 x 9 package style
with choice of duplex SC or
duplex ST* receptacle
• Wave solder and aqueous wash
process compatibility
• Manufactured in an ISO 9002
certified facility
• Single +3.3 V or +5.0 V power
supply
• RoHS Compliance
Applications
• Multimode fiber ATM backbone
links
• Multimode fiber ATM wiring
closet to desktop links
Transmitter Sections
Package
The transmitter section of the
AFBR-5803Z and AFBR-5805Z
series utilize 1300 nm InGaAsP
LEDs. These LEDs are
packaged in the optical
subassembly portion of the
transmitter section. They are
driven by a custom silicon IC
which converts differential
PECL logic signals, ECL
referenced (shifted) to a +3.3 V
or +5.0 V supply, into an
analog LED drive current.
The overall package concept
for the Agilent transceivers
consists of three basic
elements; the two optical
subassemblies, an electrical
subassembly and the housing
as illustrated in Figure 1 and
Figure 1a.
Receiver Sections
The receiver section of the
AFBR-5803Z and AFBR-5805Z
series utilize InGaAs PIN
photodiodes coupled to a
custom silicon transimpedance
preamplifier IC. These are
packaged in the optical
subassembly portion of the
receiver.
These PIN/preamplifier
combinations are coupled to a
custom quantizer IC which
provides the final pulse
shaping for the logic output
and the Signal Detect function.
The data output is differential. The signal detect
output is single-ended. Both
data and signal detect outputs
are PECL compatible, ECL
referenced (shifted) to a 3.3 V
or +5.0 V power supply.
The package outline drawing
and pin out are shown in
Figures 2, 2a and 3. The
details of this package outline
and pin out are compliant
with the multisource definition
of the 1 x 9 SIP. The low
profile of the Agilent
transceiver design complies
with the maximum height
allowed for the duplex SC
connector over the entire
length of the package.
The optical subassemblies
utilize a high volume assembly
process together with low cost
lens elements which result in a
cost effective building block.
The electrical subassembly
consists of a high volume
multilayer printed circuit
board on which the IC chips
and various surface-mounted
passive circuit elements are
attached.
The package includes internal
shields for the electrical and
optical subassemblies to ensure
low EMI emissions and high
immunity to external EMI
fields.
The outer housing including
the duplex SC connector or
the duplex ST ports is molded
of filled nonconductive plastic
to provide mechanical strength
and electrical isolation. The
solder posts of the Agilent
design are isolated from the
circuit design of the
transceiver and do not require
connection to a ground plane
on the circuit board.
The transceiver is attached to
a printed circuit board with
the nine signal pins and the
two solder posts which exit
the bottom of the housing. The
two solder posts provide the
primary mechanical strength to
withstand the loads imposed
on the transceiver by mating
with duplex or simplex SC or
ST connectored fiber cables.
ELECTRICAL SUBASSEMBLY
DUPLEX SC
RECEPTACLE
DIFFERENTIAL
DATA OUT
PIN PHOTODIODE
SINGLE-ENDED
SIGNAL
DETECT OUT
QUANTIZER IC
PREAMP IC
OPTICAL
SUBASSEMBLIES
DIFFERENTIAL
LED
DATA IN
DRIVER IC
TOP VIEW
Figure 1. SC Connector Block Diagram
2
ELECTRICAL SUBASSEMBLY
DUPLEX ST
RECEPTACLE
DIFFERENTIAL
DATA OUT
PIN PHOTODIODE
SINGLE-ENDED
SIGNAL
DETECT OUT
QUANTIZER IC
PREAMP IC
OPTICAL
SUBASSEMBLIES
DIFFERENTIAL
LED
DATA IN
DRIVER IC
TOP VIEW
Figure 1a. ST Connector Block Diagram.
39.12
MAX.
(1.540)
Case Temperature
Measurement Point
12.70
(0.500)
AREA
RESERVED
FOR
PROCESS
PLUG
25.40
MAX.
(1.000)
AFBR-5805Z
DATE CODE (YYWW)
SINGAPORE
+ 0.08
0.75
– 0.05
3.30 ± 0.38
+ 0.003 )
(0.030
(0.130 ± 0.015)
– 0.002
6.35
(0.250)
12.70
(0.500)
AGILENT
5.93 ± 0.1
(0.233 ± 0.004)
10.35 MAX.
(0.407)
2.92
(0.115)
Ø
23.55
(0.927)
0.46
(9x)
(0.018)
NOTE 1
20.32 [8x(2.54/.100)]
(0.800)
17.32 20.32
(0.682 (0.800)
23.24
(0.915)
15.88
(0.625)
Phosphor bronze is the base material for the posts & pins. For lead-free soldering, the solder posts
have Tin Copper over Nickel plating, and the electrical pins have pure Tin over Nickel plating.
DIMENSIONS ARE IN MILLIMETERS (INCHES).
Figure 2. Package Outline Drawing
3
4.14
(0.163
1.27 + 0.25
– 0.05
(0.050 + 0.010 )
– 0.002
NOTE 1
16.70
(0.657)
0.87
(0.034)
Note 1:
18.52
(0.729)
23.32
(0.918)
39.12
MAX.
(1.540)
Case Temperature
Measurement Point
12.70
(0.500)
AREA
RESERVED
FOR
PROCESS
PLUG
25.40
MAX.
(1.000)
AFBR-5805Z
DATE CODE (YYWW)
SINGAPORE
+ 0.08
0.75
– 0.05
3.30 ± 0.38
+ 0.003 )
(0.030
(0.130 ± 0.015)
– 0.002
6.35
(0.250)
12.70
(0.500)
AGILENT
5.93 ± 0.1
(0.233 ± 0.004)
10.35 MAX.
(0.407)
2.92
(0.115)
Ø
23.55
(0.927)
0.46
(9x)
(0.018)
NOTE 1
4.14
(0.163
17.32 20.32
(0.682 (0.800)
23.24
(0.915)
15.88
(0.625)
Phosphor bronze is the base material for the posts & pins. For lead-free soldering, the solder posts
have Tin Copper over Nickel plating, and the electrical pins have pure Tin over Nickel plating.
DIMENSIONS ARE IN MILLIMETERS (INCHES).
Figure 2a. ST Package Outline Drawing
1 = VEE
N/C
2 = RD
Rx
3 = RD
4 = SD
5 = VCC
6 = VCC
7 = TD
8 = TD
Tx
N/C
9 = VEE
TOP VIEW
Figure 3. Pin Out Diagram.
4
1.27 + 0.25
– 0.05
(0.050 + 0.010 )
– 0.002
NOTE 1
16.70
(0.657)
20.32 [8x(2.54/.100)]
(0.800)
0.87
(0.034)
Note 1:
18.52
(0.729)
23.32
(0.918)
The Applications Engineering
group in the Agilent Fiber
Optics Communication Division
is available to assist you with
the technical understanding
and design trade-offs
associated with these transceivers. You can contact them
through your Agilent sales
representative.
The following information is
provided to answer some of
the most common questions
about the use of these parts.
Transceiver Optical Power Budget
versus Link Length
Optical Power Budget (OPB) is
the available optical power for
a fiber optic link to
accommodate fiber cable losses
plus losses due to in-line
connectors, splices, optical
switches, and to provide
margin for link aging and
unplanned losses due to cable
plant reconfiguration or repair.
Figure 4 illustrates the predicted OPB associated with the
transceiver series specified in
this data sheet at the Beginning
of Life (BOL). These curves
5
represent the attenuation and
chromatic plus modal
dispersion losses associated
with the 62.5/125 µm and 50/
125 µm fiber cables only. The
area under the curves
represents the remaining OPB
at any link length, which is
available for overcoming nonfiber cable related losses.
Agilent LED technology has
produced 1300 nm LED
devices with lower aging
characteristics than normally
associated with these
technologies in the industry.
The industry convention is 1.5
dB aging for 1300 nm LEDs.
The Agilent 1300 nm LEDs are
specified to experience less
than 1 dB of aging over
normal commerical equipment
mission life periods. Contact
your Agilent sales representative for additional details.
Figure 4 was generated for the
1300 nm transceivers with a
Agilent fiber optic link model
containing the current industry
conventions for fiber cable
specifications and the draft
ANSI T1E1.2. These optical
parameters are reflected in the
guaranteed performance of the
transceiver specifications in
this data sheet. This same
model has been used
extensively in the ANSI and
IEEE committees, including the
ANSI T1E1.2 committee, to
establish the optical
performance requirements for
various fiber optic interface
standards. The cable
parameters used come from the
ISO/IEC JTC1/SC 25/WG3
Generic Cabling for Customer
Premises per DIS 11801 document and the EIA/TIA-568-A
Commercial Building Telecommunications Cabling Standard
per SP-2840.
12
AFBR-5805Z, 62.5/125 µm
10
OPTICAL POWER BUDGET (dB)
Application Information
8
AFBR-5805Z
50/125 µm
6
4
2
0
0.3 0.5
1.
0
1.5
2.0
2.5
FIBER OPTIC CABLE LENGTH (km)
Figure 4. Optical Power Budget at BOL versus
Fiber Optic Cable Length.
Transceiver Signaling Operating
Rate Range and BER Performance
For purposes of definition, the
symbol (Baud) rate, also called
signaling rate, is the reciprocal
of the symbol time. Data rate
(bits/sec) is the symbol rate
divided by the encoding factor
used to encode the data
(symbols/bit).
When used in 155 Mb/s
SONET OC-3 applications the
performance of the 1300 nm
transceivers, AFBR-5805 is
guaranteed to the full
conditions listed in product
specification tables.
The Agilent 1300 nm
transmitters will tolerate the
worst case input electrical
jitter allowed in Annex B
without violating the worst
case output jitter requirements.
The Agilent 1300 nm receivers
will tolerate the worst case
input optical jitter allowed in
Annex B without violating the
worst case output electrical
jitter allowed.
1 x 10-2
2.0
1 x 10-3
1.5
BIT ERROR RATE
TRANSCEIVER RELATIVE OPTICAL POWER BUDGET
AT CONSTANT BER (dB)
The Agilent 1300 nm
transceivers are designed to
operate per the system jitter
allocations stated in Table B1
of Annex B of the draft ANSI
T1E1.2 Revision 3 standard.
These transceivers can also be
used for applications which
require different Bit Error
Rate (BER) performance.
Figure 6 illustrates the typical
trade-off between link BER
and the receivers input optical
power level.
2.5
1.0
0.5
0
0.5
0
25
50
75
100
125
150
175 200
SIGNAL RATE (MBd)
CONDITIONS:
1. PRBS 27-1
2. DATA SAMPLED AT CENTER OF DATA SYMBOL.
3. BER = 10-6
4. TA = +25˚ C
5. VCC = 3.3 V to 5 V dc
6. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.
Figure 5. Transceiver Relative Optical Power
Budget at Constant BER vs. Signaling Rate.
6
Transceiver Jitter Performance
The transceivers may be used
for other applications at
signaling rates different than
155 Mb/s with some variation
in the link optical power
budget. Figure 5 gives an
indication of the typical
performance of these products
at different rates.
1 x 10-4
AFBR-5805Z SERIES
1 x 10-5
1 x 10-6
CENTER OF SYMBOL
1 x 10-7
1 x 10-8
1 x 10-9
1 x 10-10
1 x 10-11
1 x 10-12
-6
-4
-2
0
2
4
RELATIVE INPUT OPTICAL POWER - dB
CONDITIONS:
1. 155 MBd
2. PRBS 27-1
3. CENTER OF SYMBOL SAMPLING
4. TA = +25˚C
5. VCC = 3.3 V to 5 V dc
6. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.
Figure 6. Bit Error Rate vs. Relative Receiver
Input Optical Power.
The jitter specifications stated
in the following 1300 nm
transceiver specification tables
are derived from the values in
Tables B1 of Annex B. They
represent the worst case jitter
contribution that the transceivers are allowed to make to
the overall system jitter
without violating the Annex B
allocation example. In practice
the typical contribution of the
Agilent transceivers is well
below these maximum allowed
amounts.
Recommended Handling Precautions
Agilent recommends that
normal static precautions be
taken in the handling and
assembly of these transceivers
to prevent damage which may
be induced by electrostatic
discharge (ESD).
The AFBR-5800Z series of
transceivers meet MIL-STD883C Method 3015.4 Class 2
products.
Board Layout - Decoupling Circuit
and Ground Planes
It is important to take care in
the layout of your circuit
board to achieve optimum
performance from these
transceivers. Figure 7 provides
a good example of a schematic
for a power supply decoupling
circuit that works well with
these parts. It is further
Care should be used to avoid
shorting the receiver data or
signal detect outputs directly
to ground without proper
current limiting impedance.
Solder and Wash Process
Compatibility
The transceivers are delivered
with protective process plugs
inserted into the duplex SC or
duplex ST connector
receptacle. This process plug
protects the optical
subassemblies during wave
solder and aqueous wash
processing and acts as a dust
cover during shipping.
Rx
Tx
;;
;;
NO INTERNAL CONNECTION
;;;
;;;
NO INTERNAL CONNECTION
AFBR-5805Z
TOP VIEW
Rx
VEE
1
RD
2
RD
3
SD
4
The transceiver is packaged in
a shipping container designed
to protect it from mechanical
and ESD damage during
shipment or storage.
Rx
VCC
5
Tx
VCC
6
TD
7
Tx
VEE
9
TD
8
;;
;; ;;;
;;; ;;
;; ;;
;; ;;;
;;; ;;
;; ;;
;; ;;
;; ;;;
;;;
These transceivers are compatible with either industry
standard wave or hand solder
processes.
Shipping Container
recommended that a
contiguous ground plane be
provided in the circuit board
directly under the transceiver
to provide a low inductance
ground for signal return
current. This recommendation
is in keeping with good high
frequency board layout
practices.
C1
C2
VCC
L1
TERMINATION
AT PHY
DEVICE
INPUTS
VCC
R5
R7
C6
R6
R8
R2
L2
R1
C3
C4
VCC FILTER
AT VCC PINS
TRANSCEIVER
R9
;;
;;
;;
V
CC
R4
C5
TERMINATION
AT TRANSCEIVER
INPUTS
R10
;;
;; ;;;
;;; ;;
;;
;;
;;
RD ;;;
RD
SD
R3
;;
;;
;;
TD
;;
;;
;;
TD
NOTES:
THE SPLIT-LOAD TERMINATIONS FOR ECL SIGNALS NEED TO BE LOCATED AT THE INPUT
OF DEVICES RECEIVING THOSE ECL SIGNALS. RECOMMEND 4-LAYER PRINTED CIRCUIT
BOARD WITH 50 OHM MICROSTRIP SIGNAL PATHS BE USED.
R1 = R4 = R6 = R8 = R10 = 130 OHMS FOR +5.0 V OPERATION, 82 OHMS FOR +3.3 V OPERATION.
R2 = R3 = R5 = R7 = R9 = 82 OHMS FOR +5.0 V OPERATION, 130 OHMS FOR +3.3 V OPERATION.
C1 = C2 = C3 = C5 = C6 = 0.1 µF.
C4 = 10 µF.
L1 = L2 = 1 µH COIL OR FERRITE INDUCTOR.
Figure 7. Recommended Decoupling and Termination Circuits
7
Board Layout - Hole Pattern
The Agilent transceiver
complies with the circuit board
“Common Transceiver
Footprint” hole pattern defined
in the original multisource
announcement which defined
the 1 x 9 package style. This
drawing is reproduced in
Figure 8 with the addition of
ANSI Y14.5M compliant
dimensioning to be used as a
guide in the mechanical layout
of your circuit board.
12.0
0.51
12.09
Please refer to Figure 8a for a
mechanical layout detailing the
recommended location of the
duplex SC and duplex ST
transceiver packages in
relation to the chassis panel.
24.8
;;
;;
;;
11.1
Board Layout - Mechanical
For applications interested in
providing a choice of either a
duplex SC or a duplex ST
connector interface, while
utilizing the same pinout on
the printed circuit board, the
ST port needs to protrude
from the chassis panel a
minimum of 9.53 mm for
sufficient clearance to install
the ST connector.
9.53
(NOTE 1)
;;
;;
;;
;;
;;
;;
;;
42.0
6.79
0.75
;;
;;
;;
;;
;;
;;
;;
25.4
39.12
25.4
;;
;;
;;
;;
NOTE 1: MINIMUM DISTANCE FROM FRONT
;;
OF CONNECTOR TO THE PANEL FACE.
;;
;;
Figure 8a. Recommended Common Mechanical Layout for SC and ST 1 x 9 Connectored
Transceivers.
20.32
(0.800)
2 x Ø 1.9 ± 0.1
(0.075 ± 0.004)
9 x Ø 0.8 ± 0.1
(0.032 ± 0.004)
20.32
(0.800)
2.54
(0.100)
TOP VIEW
DIMENSIONS ARE IN MILLIMETERS (INCHES)
Figure 8. Recommended Board Layout Hole Pattern
8
These transceiver products are
intended to enable commercial
system designers to develop
equipment that complies with
the various international
regulations governing certification of Information Technology
Equipment. See the Regulatory
Compliance Table for details.
Additional information is
available from your Agilent
sales representative.
Electrostatic Discharge (ESD)
There are two design cases in
which immunity to ESD
damage is important.
The first case is during
handling of the transceiver
prior to mounting it on the
circuit board. It is important
to use normal ESD handling
precautions for ESD sensitive
devices. These precautions
include using grounded wrist
straps, work benches, and
floor mats in ESD controlled
areas.
The second case to consider is
static discharges to the exterior
of the equipment chassis containing the transceiver parts.
To the extent that the duplex
SC connector is exposed to the
outside of the equipment
chassis it may be subject to
whatever ESD system level test
criteria that the equipment is
intended to meet.
Electromagnetic Interference (EMI)
Most equipment designs
utilizing these high speed
transceivers from Agilent will
be required to meet the
requirements of FCC in the
United States, CENELEC
EN55022 (CISPR 22) in Europe
and VCCI in Japan.
These products are suitable for
use in designs ranging from a
desktop computer with a single
transceiver to a concentrator
or switch product with large
number of transceivers.
In all well-designed chassis,
the two 0.5" holes required for
ST connectors to protrude
through will provide 4.6 dB
more shielding than one 1.2"
duplex SC rectangular cutout.
Thus, in a well-designed
chassis, the duplex ST 1 x 9
transceiver emissions will be
identical to the duplex SC 1 x
9 transceiver emissions.
200
∆l - TRANSMITTER OUTPUT OPTICAL
SPECTRAL WIDTH (FWHM) - nm
Regulatory Compliance
3.0
180
1.0
160
1.5
140
2.0
tr/f – TRANSMITTER
OUTPUT OPTICAL
RISE/FALL TIMES – ns
2.5
120
3.0
100
1260
1280
1300
1320
1340
1360
l C – TRANSMITTER OUTPUT OPTICAL RISE/
FALL TIMES – ns
AFBR-5805 TRANSMITTER TEST RESULTS
OF l C, ∆l AND tr/f ARE CORRELATED AND
COMPLY WITH THE ALLOWED SPECTRAL WIDTH
AS A FUNCTION OF CENTER WAVELENGTH FOR
VARIOUS RISE AND FALL TIMES.
Figure 9. Transmitter Output Optical Spectral
Width (FWHM) vs. Transmitter Output Optical
Center Wavelength and Rise/Fall Times.
Regulatory Compliance Table
Feature
Test Method
Performance
Electrostatic Discharge (ESD) to MIL-STD-883C
Meets Class 1 (<1999 Volts).
the Electrical Pins
Method 3015.4
Electrostatic Discharge (ESD) to Variation of
Withstand up to 1500 V applied between electrical pins.
Typically withstand at least 25 kV without damage when the Duplex SC
the Duplex SC Receptacle
Electromagnetic Interference
IEC 801-2
FCC Class B
Connector Receptacle is contacted by a Human Body Model probe.
Transceivers typically provide a 13 dB margin (with duplex SC receptacle) or a 9
(EMI)
CENELEC CEN55022
dB margin (with duplex ST receptacles) to the noted standard limits. However, it
Class B (CISPR 22B)
should be noted that final margin depends on the customer's board and chassis
VCCI Class 2
Variation of IEC 61000-4-3
design.
Typically show no measurable effect from a 10 V/m field swept from 10 to 450
Immunity
MHz applied to the transceiver when mounted to a circuit card without a
chassis enclosure.
9
Immunity
Ordering Information
Equipment utilizing these
transceivers will be subject to
radio-frequency
electromagnetic fields in some
environments. These
transceivers have a high
immunity to such fields.
The AFBR-5805Z/-5805TZ 1300
nm products are available for
production orders through the
Agilent Component Field Sales
Offices and Authorized
Distributors world wide.
Transceiver Reliability and
Performance Qualification Data
RELATIVE INPUT OPTICAL POWER (dB)
5
4
3
AFBR-5805Z SERIES
2
1
0
-3
The 1 x 9 transceivers have
passed Agilent reliability and
performance qualification
testing and are undergoing
ongoing quality monitoring.
Details are available from your
Agilent sales representative.
-2
-1
0
1
2
3
EYE SAMPLING TIME POSITION (ns)
CONDITIONS:
1. TA = +25˚ C
2. VCC = 3.3 V to 5 V dc
3. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.
4. INPUT OPTICAL POWER IS NORMALIZED TO
CENTER OF DATA SYMBOL.
5. NOTE 16 AND 17 APPLY.
Figure 10. Relative Input Optical Power vs.
Eye Sampling Time Position.
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause catastrophic damage to the device. Limits apply to each parameter in
isolation, all other parameters having values within the recommended operating conditions. It should not be assumed that limiting values
of more than one parameter can be applied to the product at the same time. Exposure to the absolute maximum ratings for extended
periods can adversely affect device reliability.
Parameter
Symbol
Min.
Storage Temperature
TS
-40
Lead Soldering Temperature
Lead Soldering Time
Typ.
Max.
Unit
+100
°C
TSOLD
+260
°C
tSOLD
10
sec.
Supply Voltage
VCC
-0.5
7.0
V
Data Input Voltage
VI
-0.5
VCC
V
Differential Input Voltage
VD
1.4
V
Output Current
IO
50
mA
10
Reference
Note 1
Recommended Operating Conditions
Parameter
Symbol
Min.
AFBR-5805Z/5805TZ
AFBR-5805AZ/5805ATZ
Supply Voltage
TA
TA
VCC
Data Input Voltage - Low
Data Input Voltage - High
VIH - VCC
Typ.
Max.
Unit
Reference
0
-10
3.135
+70
+85
3.5
°C
°C
V
Note A
Note B
VCC
4.75
5.25
V
VIL - VCC
-1.810
-1.475
V
-1.165
-0.880
Ambient Operating Temperature
Data and Signal Detect Output Load
RL
V
W
50
Note 2
Notes:
A. Ambient Operating Temperature corresponds to transceiver case temperature of 0°C mininum to +85 °C maximum with necessary airflow applied.
Recommended case temperature measurement point can be found in Figure 2.
B. Ambient Operating Temperature corresponds to transceiver case temperature of -10 °C mininum to +100 °C maximum with necessary airflow
applied. Recommended case temperature measurement point can be found in Figure 2.
Transmitter Electrical Characteristics
(AFBR-5805Z/5805TZ: TA = 0°C to +70°C, VCC = 3.135 V to 3.5 V or 4.75 V to 5.25 V)
(AFBR-5805AZ/5805ATZ: TA = -10°C to +85°C, VCC = 3.135 V to 3.5 V or 4.75 V to 5.25 V)
Parameter
Symbol
Typ.
Max.
Unit
Reference
Supply Current
ICC
135
175
mA
Note 3
PDISS
0.45
0.6
W
0.67
0.9
Power Dissipation
at VCC = 3.3 V
at VCC = 5.0 V
Min.
PDISS
Data Input Current - Low
IIL
Data Input Current - High
IIH
-350
-2
18
W
µA
350
µA
Receiver Electrical Characteristics
(AFBR-5805Z/5805TZ: TA = 0°C to +70°C, VCC = 3.135 V to 3.5 V or 4.75 V to 5.25 V)
(AFBR-5805AZ/5805ATZ: TA = -10°C to +85°C, VCC = 3.135 V to 3.5 V or 4.75 V to 5.25 V
Parameter
Symbol
Typ.
Max.
Unit
Reference
Supply Current
ICC
87
120
mA
Note 4
at VCC = 3.3 V
PDISS
0.15
0.25
W
Note 5
at VCC = 5.0 V
PDISS
0.3
Power Dissipation
Min.
0.45
W
Data Output Voltage - Low
VOL - VCC
-1.83
-1.55
V
Data Output Voltage - High
VOH - VCC
-1.085
-0.88
V
Note 6
Data Output Rise Time
tr
0.35
2.2
ns
Note 7
Data Output Fall Time
tf
0.35
2.2
ns
Note 7
Signal Detect Output Voltage - Low
VOL - VCC
-1.83
-1.55
V
Note 6
Signal Detect Output Voltage - High
VOH - VCC
-1.085
-0.88
V
Note 6
Signal Detect Output Rise Time
tr
0.35
2.2
ns
Note 7
Signal Detect Output Fall Time
tf
0.35
2.2
ns
Note 7
11
Note 6
Transmitter Optical Characteristics
(AFBR-5805Z/5805TZ: TA = 0°C to +70°C, VCC = 3.135 V to 3.5 V or 4.75 V to 5.25 V)
(AFBR-5805AZ/5805ATZ: TA = -10°C to +85°C, VCC = 3.135 V to 3.5 V or 4.75 V to 5.25 V)
Parameter
Symbol
Min.
Max.
Unit
Reference
Output Optical Power
62.5/125 µm, NA = 0.275 Fiber
BOL
EOL
PO
-19
-20
-14
dBm avg.
Note 8
Output Optical Power
50/125 µm, NA = 0.20 Fiber
BOL
EOL
PO
-22.5
-23.5
-14
dBm avg.
Note 8
dB
Note 9
dBm avg.
Note 10
Optical Extinction Ratio
Output Optical Power at
Typ.
10
PO (“0”)
-45
Logic “0” State
Center Wavelength
lC
Spectral Width - FWHM
Dl
Optical Rise Time
tr
1270
1310
1380
137
0.6
1.9
3.0
nm
Note 22
nm
Note 22
ns
Note 11, 22
Figure 9
Optical Fall Time
tf
0.6
1.6
3.0
ns
Note 11, 22
Figure 9
Systematic Jitter Contributed
SJ
1.2
ns p-p
Note 12
RJ
0.69
ns p-p
Note 13
by the Transmitter
Random Jitter Contributed
by the Transmitter
Receiver Optical and Electrical Characteristics
(AFBR-5805Z/5805TZ: TA = 0°C to +70°C, VCC = 3.135 V to 3.5 V or 4.75 V to 5.25 V)
(AFBR-5805AZ/5805ATZ: TA = -10°C to +85°C, VCC = 3.135 V to 3.5 V or 4.75 V to 5.25 V)
Parameter
Symbol
Typ.
Max.
Unit
Reference
Input Optical Power
Minimum at Window Edge
PIN Min. (W)
Min.
-34
-30
dBm avg.
Note 14
Figure 10
Input Optical Power
Minimum at Eye Center
PIN Min. (C)
-35
-31
dBm avg.
Note 15
Figure 10
Input Optical Power Maximum
PIN Max.
-14
dBm avg.
Note 14
Operating Wavelength
l
1270
1380
nm
Systematic Jitter Contributed
by the Receiver
SJ
1.2
ns p-p
Note 16
Random Jitter Contributed
by the Receiver
RJ
1.91
ns p-p
Note 17
-31
Signal Detect - Asserted
PA
PD +1.5 dB
dBm avg.
Note 18
Signal Detect - Deasserted
PD
-45
dBm avg.
Note 19
Signal Detect - Hysteresis
PA - PD
1.5
dB
Signal Detect Assert Time
(off to on)
0
2
100
µs
Note 20
Signal Detect Deassert Time
(on to off)
0
8
350
µs
Note 21
Notes:
1. This is the maximum voltage that can be
applied across the Differential Transmitter
Data Inputs to prevent damage to the input
ESD protection circuit.
2. The outputs are terminated with 50 W
connected to VCC -2 V.
3. The power supply current needed to operate
the transmitter is provided to differential
ECL circuitry. This circuitry maintains a
nearly constant current flow from the power
supply. Constant current operation helps to
prevent unwanted electrical noise from
being generated and conducted or emitted
to neighboring circuitry.
4. This value is measured with the outputs
terminated into 50 W connected to VCC - 2 V
and an Input Optical Power level of
-14 dBm average.
5. The power dissipation value is the power
dissipated in the receiver itself. Power
dissipation is calculated as the sum of the
products of supply voltage and currents,
minus the sum of the products of the output
voltages and currents.
6. This value is measured with respect to VCC
with the output terminated into 50 W
connected to VCC - 2 V.
7. The output rise and fall times are measured
between 20% and 80% levels with the
output connected to VCC -2 V through 50 W.
8. These optical power values are measured
with the following conditions:
•
The Beginning of Life (BOL) to the End of
Life (EOL) optical power degradation is
typically 1.5 dB per the industry
convention for long wavelength LEDs.
The actual degradation observed in
Agilent’s 1300 nm LED products is
< 1 dB, as specified in this data sheet.
•
Over the specified operating voltage and
temperature ranges.
•
With 25 MBd (12.5 MHz square-wave),
input signal.
•
At the end of one meter of noted optical
fiber with cladding modes removed.
The average power value can be converted
to a peak power value by adding 3 dB.
Higher output optical power transmitters
are available on special request.
9. The Extinction Ratio is a measure of the
modulation depth of the optical signal. The
data “1” output optical power is compared
to the data “0” peak output optical power
and expressed in decibels. With the
transmitter driven by a 25 MBd (12.5 MHz
square-wave) input signal, the average
optical power is measured. The data “1”
peak power is then calculated by adding
3 dB to the measured average optical
power. The data “0” output optical power is
found by measuring the optical power when
the transmitter is driven by a logic “0” input.
The extinction ratio is the ratio of the optical
power at the “1” level compared to the
optical power at the “0” level expressed in
decibels.
•
•
At the Beginning of Life (BOL)
•
Input is a 155.52 MBd, 223 - 1 PRBS data
pattern with 72 “1”s and 72 “0”s inserted
per the CCITT (now ITU-T) recommendation G.958 Appendix I.
•
Receiver data window time-width is
1.23 ns or greater for the clock recovery
circuit to operate in. The actual test data
window time-width is set to simulate the
effect of worst case optical input jitter
based on the transmitter jitter values
from the specification tables. The test
window time-width is AFBR-5805 3.32 ns.
•
Transmitter operating with a 155.52 MBd,
77.5 MHz square-wave, input signal to
simulate any cross-talk present between
the transmitter and receiver sections of
the transceiver.
10. The transmitter will provide this low level of
Output Optical Power when driven by a logic
“0” input. This can be useful in link
troubleshooting.
11. The relationship between Full Width Half
Maximum and RMS values for Spectral
Width is derived from the assumption of a
Gaussian shaped spectrum which results in
a 2.35 X RMS = FWHM relationship.
The optical rise and fall times are measured
from 10% to 90% when the transmitter is
driven by a 25 MBd (12.5 MHz square-wave)
input signal. The ANSI T1E1.2 committee
has designated the possibility of defining an
eye pattern mask for the transmitter optical
output as an item for further study. Agilent
will incorporate this requirement into the
specifications for these products if it is
defined. The AFBR-5805 products typically
comply with the template requirements of
CCITT (now ITU-T) G.957 Section 3.2.5,
Figure 2 for the STM-1 rate, excluding the
optical receiver filter normally associated
with single mode fiber measurements which
is the likely source for the ANSI T1E1.2
committee to follow in this matter.
12. Systematic Jitter contributed by the
transmitter is defined as the combination of
Duty Cycle Distortion and Data Dependent
Jitter. Systematic Jitter is measured at 50%
threshold using a 155.52 MBd
(77.5 MHz square-wave), 27 -1 psuedo
random data pattern input signal.
13. Random Jitter contributed by the
transmitter is specified with a 155.52 MBd
(77.5 MHz square-wave) input signal.
14. This specification is intended to indicate the
performance of the receiver section of the
transceiver when Input Optical Power signal
characteristics are present per the following
definitions. The Input Optical Power
dynamic range from the minimum level (with
a window time-width) to the maximum level
is the range over which the receiver is
guaranteed to provide output data with a Bit
Error Ratio (BER) better than or equal to 1 x
10-10.
Over the specified operating temperature
and voltage ranges
15. All conditions of Note 14 apply except that
the measurement is made at the center of
the symbol with no window time-width.
16. Systematic Jitter contributed by the
receiver is defined as the combination of
Duty Cycle Distortion and Data Dependent
Jitter. Systematic Jitter is measured at 50%
threshold using a 155.52 MBd (77.5 MHz
square-wave), 27 - 1 psuedo random data
pattern input signal.
17. Random Jitter contributed by the receiver is
specified with a 155.52 MBd (77.5 MHz
square-wave) input signal.
18. This value is measured during the transition
from low to high levels of input optical
power.
19. This value is measured during the transition
from high to low levels of input optical
power.
20. The Signal Detect output shall be asserted
within 100 µs after a step increase of the
Input Optical Power.
21. Signal detect output shall be de-asserted
within 350 µs after a step decrease in the
Input Optical Power.
22. The AFBR-5805 transceiver complies with
the requirements for the trade-offs between
center wavelength, spectral width, and rise/
fall times shown in Figure 9. This figure is
derived from the FDDI PMD standard (ISO/
IEC 9314-3 : 1990 and ANSI X3.166 - 1990)
per the description in ANSI T1E1.2 Revision
3. The interpretation of this figure is that
values of Center Wavelength and Spectral
Width must lie along the appropriate Optical
Rise/Fall Time curve.
Ordering Information
The AFBR-5805Z/5805TZ/5805AZ/5805ATZ 1300 nm products are available for production orders
through the Agilent Component Field Sales Offices and Authorized Distributors world wide.
0 °C to +70 °C
AFBR-5805Z/5805TZ
-10 °C to +85 °C
AFBR-5805AZ/5805ATZ
*ST is a registered trademark of AT&T Lightguide Cable Connectors.
Note:
The “T” in the product numbers indicates a transceiver with a duplex ST connector receptacle.
Product numbers without a “T” indicate transceivers with a duplex SC connector receptacle.
www.agilent.com/
semiconductors
For product information and a complete list
of distributors, please go to our web site.
For technical assistance call:
Americas/Canada: +1 (800) 235-0312 or
(408) 654-8675
Europe: +49 (0) 6441 92460
China: 10800 650 0017
Hong Kong: (+65) 6756 2394
India, Australia, New Zealand: (+65) 6755 1939
Japan: (+81 3) 3335-8152(Domestic/Inter
national), or 0120-61-1280(Domestic Only)
Korea: (+65) 6755 1989
Singapore, Malaysia, Vietnam, Thailand,
Philippines, Indonesia: (+65) 6755 2044
Taiwan: (+65) 6755 1843
Data subject to change.
Copyright © 2005 Agilent Technologies, Inc.
March 28, 2005
5989-2295EN
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