MULTI NANO SPIDER
(ORG4500) GNSS RECEIVER
MODULE
Datasheet
OriginGPS.com
Multi Nano Spider – ORG4500
Datasheet
Revision 1.4
Page 1 of 40
February 14, 2018
INDEX
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
12.1.
12.2.
13.
13.1.
13.2.
14.
14.1.
14.1.1.
14.1.2.
14.1.3.
14.1.4.
14.1.5.
14.2.
14.2.1.
14.2.2.
14.2.3.
14.2.4.
14.2.5.
14.2.6.
14.3.
14.4.
14.5.
14.6.
15.
15.1.
15.1.1.
15.1.2.
15.1.3.
15.1.4.
15.1.5.
15.2.
15.3.
15.3.1.
15.3.2.
15.3.3.
16.
16.1.
16.2.
16.3.
16.4.
17.
17.1.
17.2.
SCOPE ................................................................................................................................................................... 5
DISCLAIMER .......................................................................................................................................................... 5
SAFETY INFORMATION ......................................................................................................................................... 5
ESD SENSITIVITY .................................................................................................................................................... 5
CONTACT INFORMATION ...................................................................................................................................... 5
RELATED DOCUMENTATION ................................................................................................................................. 5
REVISION HISTORY ................................................................................................................................................ 6
GLOSSARY ............................................................................................................................................................. 6
ABOUT SPIDER FAMILY ......................................................................................................................................... 8
ABOUT MULTI NANO SPIDER MODULE ................................................................................................................ 8
ABOUT ORIGINGPS ............................................................................................................................................... 9
DESCRIPTION ........................................................................................................................................................ 9
FEATURES.............................................................................................................................................................. 9
ARCHITECTURE ................................................................................................................................................... 11
ELECTRICAL SPECIFICATIONS .............................................................................................................................. 13
ABSOLUTE MAXIMUM RATINGS ......................................................................................................................... 13
RECOMMENDED OPERATING CONDITIONS........................................................................................................ 14
PERFORMANCE ................................................................................................................................................... 15
ACQUISITION TIME ............................................................................................................................................. 15
HOT START .......................................................................................................................................................... 15
SIGNAL REACQUISITION ...................................................................................................................................... 15
AIDED START ....................................................................................................................................................... 15
WARM START ...................................................................................................................................................... 15
COLD START ........................................................................................................................................................ 15
SENSITIVITY ......................................................................................................................................................... 16
TRACKING ........................................................................................................................................................... 16
REACQUISITION .................................................................................................................................................. 16
NAVIGATION ....................................................................................................................................................... 16
HOT START .......................................................................................................................................................... 16
AIDED START ....................................................................................................................................................... 16
COLD START ........................................................................................................................................................ 16
RECEIVED SIGNAL STRENGTH ............................................................................................................................. 17
POWER CONSUMPTION ..................................................................................................................................... 17
ACCURACY .......................................................................................................................................................... 18
DYNAMIC CONSTRAINS....................................................................................................................................... 18
POWER MANAGEMENT ...................................................................................................................................... 19
POWER STATES ................................................................................................................................................... 19
FULL POWER ACQUISITION ................................................................................................................................. 19
FULL POWER TRACKING ...................................................................................................................................... 19
CPU ONLY ............................................................................................................................................................ 19
STANDBY ............................................................................................................................................................. 19
HIBERNATE .......................................................................................................................................................... 19
BASIC POWER SAVING MODE ............................................................................................................................. 19
SELF MANAGED POWER SAVING MODES ........................................................................................................... 19
ADAPTIVE TRICKLE POWER (ATP™) .................................................................................................................... 19
PUSH TO FIX (PTF™) ............................................................................................................................................ 20
ADVANCED POWER MANAGEMENT (APM™) ..................................................................................................... 20
EXTENDED FEATURES ......................................................................................................................................... 21
ALMANAC BASED POSITIONING (ABP™) ............................................................................................................. 21
ACTIVE JAMMER DETECTOR AND REMOVER ...................................................................................................... 21
CLIENT GENERATED EXTENDED EPHEMERIS (CGEE™) ........................................................................................ 22
SERVER GENERATED EXTENDED EPHEMERIS (SGEE™) ....................................................................................... 22
INTERFACE .......................................................................................................................................................... 23
PAD ASSIGNMENT............................................................................................................................................... 23
POWER SUPPLY ................................................................................................................................................... 24
Multi Nano Spider – ORG4500
Datasheet
Revision 1.4
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February 14, 2018
17.2.1.
17.2.2.
17.3.
17.3.1
17.3.2.
17.3.3.
17.3.4.
17.4.
17.4.1.
17.4.2.
17.4.3.
18.
19.
19.1.
19.2.
19.3.
19.4.
19.5
20.
21.
21.1.
21.2.
21.3.
21.3.1.
21.3.2.
21.3.3.
21.4.
21.5.
21.6.
22.
22.1.
22.2.
23.
23.1.
23.2.
23.3.
23.4.
23.5.
23.6.
23.7.
23.8.
24.
25.
26.
26.1.
26.2.
26.3.
27.
VCC = 1.8V........................................................................................................................................................... 24
GROUND ............................................................................................................................................................. 24
CONTROL INTERFACE .......................................................................................................................................... 24
ON_OFF .............................................................................................................................................................. 24
WAKEUP .............................................................................................................................................................. 25
RESET .................................................................................................................................................................. 25
1PPS .................................................................................................................................................................... 25
DATA INTERFACE ................................................................................................................................................ 25
UART ................................................................................................................................................................... 26
SPI ....................................................................................................................................................................... 26
I²C........................................................................................................................................................................ 26
TYPICAL APPLICATION CIRCUIT ........................................................................................................................... 27
RECOMMENDED PCB LAYOUT ............................................................................................................................ 28
FOOTPRINT ......................................................................................................................................................... 29
HOST PCB ............................................................................................................................................................ 29
PCB STACK-UP ..................................................................................................................................................... 29
PCB LAYOUT RESTRICTIONS ................................................................................................................................ 29
MODULE POSITIONING RECOMMENDATION ………………………………………..……..……………………………………………….29
DESIGN CONSIDERATIONS .................................................................................................................................. 29
OPERATION ......................................................................................................................................................... 30
STARTING THE MODULE ..................................................................................................................................... 30
AUTONOMOUS POWER ON ................................................................................................................................ 31
VERIFYING THE MODULE HAS STARTED ............................................................................................................. 31
UART ................................................................................................................................................................... 31
I²C........................................................................................................................................................................ 31
SPI ....................................................................................................................................................................... 31
CHANGING PROTOCOL AND BAUD RATE1 .......................................................................................................... 31
CHANGING SATELLITE CONSTELLATION1 ............................................................................................................ 31
SHUTTING DOWN THE MODULE ........................................................................................................................ 32
FIRMWARE .......................................................................................................................................................... 33
DEFAULT SETTINGS ............................................................................................................................................. 33
FIRMWARE UPDATES .......................................................................................................................................... 34
HANDLING INFORMATION .................................................................................................................................. 34
MOISTURE SENSITIVITY....................................................................................................................................... 34
ASSEMBLY ........................................................................................................................................................... 34
SOLDERING ......................................................................................................................................................... 34
CLEANING ........................................................................................................................................................... 36
REWORK.............................................................................................................................................................. 36
ESD SENSITIVITY .................................................................................................................................................. 36
SAFETY INFORMATION ....................................................................................................................................... 36
DISPOSAL INFORMATION ................................................................................................................................... 36
MECHANICAL SPECIFICATIONS ........................................................................................................................... 37
COMPLIANCE ...................................................................................................................................................... 37
PACKAGING AND DELIVERY ................................................................................................................................ 38
APPEARANCE ...................................................................................................................................................... 38
CARRIER TAPE ..................................................................................................................................................... 39
REEL .................................................................................................................................................................... 40
ORDERING INFORMATION .................................................................................................................................. 40
Multi Nano Spider – ORG4500
Datasheet
Revision 1.4
Page 3 of 40
February 14, 2018
TABLE INDEX
TABLE 1 – RELATED DOCUMENTATION .............................................................................................................................. 5
TABLE 2 – REVISION HISTORY ............................................................................................................................................. 6
TABLE 3 – ABSOLUTE MAXIMUM RATINGS ...................................................................................................................... 13
TABLE 4 – RECOMMENDED OPERATING CONDITIONS ..................................................................................................... 14
TABLE 5 – ACQUISITION TIME ........................................................................................................................................... 15
TABLE 6 – SENSITIVITY ...................................................................................................................................................... 16
TABLE 7 – RECEIVED SIGNAL STRENGTH ........................................................................................................................... 17
TABLE 8 – POWER CONSUMPTION ................................................................................................................................... 17
TABLE 10 – ACCURACY ...................................................................................................................................................... 18
TABLE 11 – DYNAMIC CONSTRAINS .................................................................................................................................. 18
TABLE 12 – PIN-OUT ......................................................................................................................................................... 23
TABLE 13 – HOST INTERFACE SELECT................................................................................................................................ 25
TABLE 14 – START-UP TIMING .......................................................................................................................................... 31
TABLE 15 – DEFAULT FIRMWARE SETTINGS ..................................................................................................................... 33
TABLE 16 – SOLDERING PROFILE PARAMETERS ................................................................................................................ 35
TABLE 17 – MECHANICAL SUMMARY ............................................................................................................................... 37
TABLE 18 – REEL QUANTITY .............................................................................................................................................. 38
TABLE 19 – CARRIER TAPE DIMENSIONS .......................................................................................................................... 39
TABLE 20 – REEL DIMENSIONS .......................................................................................................................................... 40
TABLE 21 – ORDERING OPTIONS....................................................................................................................................... 40
TABLE 22 – ORDERABLE DEVICES ...................................................................................................................................... 40
FIGURE INDEX
FIGURE 1 – ORG4500 ARCHITECTURE ............................................................................................................................... 11
FIGURE 2 – SiRFstarV™ 5e GNSS SoC BLOCK DIAGRAM .................................................................................................... 12
FIGURE 3 – ATP™ TIMING ................................................................................................................................................. 20
FIGURE 4 – PTF™ TIMING.................................................................................................................................................. 20
FIGURE 5 – APM™ TIMING ................................................................................................................................................ 21
Figure 6 - SiRFAware™ Current Profile ………………………………………………………………………………………………………..22
FIGURE 7 – ACTIVE JAMMER DETECTOR FREQUENCY PLOT ............................................................................................. 21
FIGURE 8 – PAD ASSIGNMENT .......................................................................................................................................... 23
FIGURE 9 – ON_OFF TIMING ............................................................................................................................................. 24
FIGURE 10 – REFERENCE SCHEMATIC DIAGRAM WITH UART INTERFACE ........................................................................ 28
FIGURE 11 – REFERENCE SCHEMATIC DIAGRAM WITH SPI INTERFACE ............................................................................ 28
FIGURE 12 – REFERENCE SCHEMATIC DIAGRAM WITH I2C INTERFACE ........................................................................... 28
FIGURE 13 – FOOTPRINT ................................................................................................................................................... 29
FIGURE 14 – MODULE HOSTED ON FOOTPRINT ............................................................................................................... 29
FIGURE 15 – HOST PCB ..................................................................................................................................................... 29
FIGURE 16 – EVB GROUND PLANE VIAS (TOP) .................................................................................................................. 29
FIGURE 17 – EVB GROUND PLANE VIAS (BOTTOM) .......................................................................................................... 29
FIGURE 18 – TYPICAL PCB STACK-UP ................................................................................................................................ 29
FIGURE 19 – ON_OFF TIMING ........................................................................................................................................... 30
FIGURE 20 – START-UP TIMING ........................................................................................................................................ 30
FIGURE 21 – RECOMMENDED SOLDERING PROFILE ......................................................................................................... 35
FIGURE 22 – MECHANICAL DRAWING .............................................................................................................................. 37
FIGURE 23 – MODULE POSITION ...................................................................................................................................... 38
FIGURE 24 – CARRIER TAPE............................................................................................................................................... 39
FIGURE 25 – REEL .............................................................................................................................................................. 40
Multi Nano Spider – ORG4500
Datasheet
Revision 1.4
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February 14, 2018
1. SCOPE
This document describes the features and specifications of Multi Nano Spider ORG4500 GPS / GNSS module.
2. DISCLAIMER
All trademarks are properties of their respective owners.
Performance characteristics listed in this document do not constitute a warranty or guarantee of product
performance. OriginGPS assumes no liability or responsibility for any claims or damages arising out of the
use of this document, or from the use of integrated circuits based on this document.
OriginGPS assumes no liability or responsibility for unintentional inaccuracies or omissions in this document.
OriginGPS reserves the right to make changes in its products, specifications and other information at any
time without notice.
OriginGPS reserves the right to conduct, from time to time, and at its sole discretion, firmware upgrades.
As long as those FW improvements have no material change on end customers, PCN may not be issued.
OriginGPS navigation products are not recommended to use in life saving or life sustaining applications.
3. SAFETY INFORMATION
Improper handling and use can cause permanent damage to the product.
4. ESD SENSITIVITY
This product is ESD sensitive device and must be handled with care.
5. CONTACT INFORMATION
Support - support@origingps.com or Online Form
Marketing and sales - marketing@origingps.com
Web – www.origingps.com
6. RELATED DOCUMENTATION
№
DOCUMENT NAME
1
Spider and Hornet - NMEA Protocol Reference Manual
2
Spider and Hornet - One Socket Protocol Reference Manual
3
Spider and Hornet - One Socket Protocol Extension Reference Manual
4
Spider and Hornet - Low Power Modes Application Note
5
SiRFLive FAQ
TABLE 1 – RELATED DOCUMENTATION
Multi Nano Spider – ORG4500
Datasheet
Revision 1.4
Page 5 of 40
February 14, 2018
7. REVISION HISTORY
REVISION
DATE
CHANGE DESCRIPTION
1.0
August 16, 2016
First release
1.1
February 9, 2016
Current / Power consumption update
1.2
August 13, 2017
Footprint image – mm dimensions update. MID 178,70 update
1.3
October 1, 2017
Default interface update,
Related documentation update
Removal of I2C slave mode
1.4
February 14, 2018
Section 17.4 removal
TABLE 2 – REVISION HISTORY
8. GLOSSARY
A-GPS Assisted GPS
ABP™ Almanac Based Position
AC Alternating Current
ADC Analog to Digital Converter
AGC Automatic Gain Control
APM™ Adaptive Power Management
ATP™ Adaptive Trickle Power
BBRAM Battery Backed-up RAM
BE Broadcast Ephemeris
BPF Band Pass Filter
C/N0 Carrier to Noise density ratio [dB-Hz]
CDM Charged Device Model
CE European Community conformity mark
CEP Circular Error Probability
CGEE™ Client Generated Extended Ephemeris
CMOS Complementary Metal-Oxide Semiconductor
CPU Central Processing Unit
CTS Clear-To-Send
CW Continuous Wave
DC Direct Current
DOP Dilution Of Precision
DR Dead Reckoning
DSP Digital Signal Processor
ECEF Earth Centred Earth Fixed
ECHA European Chemical Agency
EE Extended Ephemeris
EGNOS European Geostationary Navigation Overlay Service
EIA Electronic Industries Alliance
EMC Electro-Magnetic Compatibility
EMI Electro-Magnetic Interference
ENIG Electroless Nickel Immersion Gold
Multi Nano Spider – ORG4500
Datasheet
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February 14, 2018
ESD Electro-Static Discharge
ESR Equivalent Series Resistance
EU European Union
EVB Evaluation Board
EVK Evaluation Kit
FCC Federal Communications Commission
FSM Finite State Machine
GAGAN GPS Aided Geo-Augmented Navigation
GNSS Global Navigation Satellite System
GPIO General Purpose Input or Output
GPS Global Positioning System
HBM Human Body Model
HDOP Horizontal Dilution Of Precision
I2C Inter-Integrated Circuit
I/O Input or Output
IC Integrated Circuit
ICD Interface Control Document
IF Intermediate Frequency
ISO International Organization for Standardization
JEDEC Joint Electron Device Engineering Council
KA Keep Alive
KF Kalman Filter
LDO Low Dropout regulator
LGA Land Grid Array
LNA Low Noise Amplifier
LP Low Power
LS Least Squares
LSB Least Significant Bit
MID Message Identifier
MM Machine Model
MPM™ Micro Power Mode
MSAS Multi-functional Satellite Augmentation System
MSB Most Significant Bit
MSL Moisture Sensitivity Level
NFZ™ Noise-Free Zones System
NMEA National Marine Electronics Association
NVM Non-Volatile Memory
OSP® One Socket Protocol
PCB Printed Circuit Board
PLL Phase Lock Loop
PMU Power Management Unit
POR Power-On Reset
PPS Pulse Per Second
PRN Pseudo-Random Noise
PSRR Power Supply Rejection Ratio
PTF™ Push-To-Fix
QZSS Quasi-Zenith Satellite System
RAM Random Access Memory
REACH Registration, Evaluation, Authorisation and Restriction of Chemical substances
RF Radio Frequency
RHCP Right-Hand Circular Polarized
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Datasheet
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February 14, 2018
RMS Root Mean Square
RoHS Restriction of Hazardous Substances directive
ROM Read-Only Memory
RTC Real-Time Clock
RTS Ready-To-Send
SAW Surface Acoustic Wave
SBAS Satellite-Based Augmentation Systems
SGEE™ Server Generated Extended Ephemeris
SID Sub-Identifier
SIP System In Package
SMD Surface Mounted Device
SMPS Switched Mode Power Supply
SMT Surface-Mount Technology
SOC System On Chip
SPI Serial Peripheral Interface
SSB® SiRF Standard Binary
SV Satellite Vehicle
TCXO Temperature-Compensated Crystal Oscillator
TTFF Time To First Fix
TTL Transistor-Transistor Logic
UART Universal Asynchronous Receiver/Transmitter
VCCI Voluntary Control Council for Interference by information technology equipment
VEP Vertical Error Probability
VGA Variable-Gain Amplifier
WAAS Wide Area Augmentation System
9. ABOUT SPIDER FAMILY
OriginGPS GNSS receiver modules have been designed to address markets where size, weight, stand-alone
operation, highest level of integration, power consumption and design flexibility - all are very important.
OriginGPS’ Spider family breaks size barrier, offering the industry’s smallest fully-integrated, highly-sensitive
GPS and GNSS modules.
Spider family features OriginGPS' proprietary NFZ™ technology for high sensitivity and noise immunity even
under marginal signal condition, commonly found in urban canyons, under dense foliage or when the
receiver’s position in space rapidly changes.
Spider family enables the shortest TTM (Time-To-Market) with minimal design risks.
Just connect an antenna and power supply on a 2-layer PCB.
10. ABOUT MULTI NANO SPIDER MODULE
Nano Spider is a complete SiP featuring LGA SMT footprint designed to commit unique integration features
for high volume cost sensitive applications.
Designed to support ultra-compact applications such as smart watches, wearable devices, trackers and
digital cameras, Multi Nano Spider ORG4500 module is a miniature multi-channel GNSS (GPS+GLONASS)
with SBAS, QZSS and other regional overlay systems receiver that continuously tracks all satellites in view,
providing real-time positioning data in industry’s standard NMEA format.
Multi Nano Spider ORG4500 module offers superior sensitivity and outstanding performance, achieving
rapid TTFF in less than one second, accuracy of approximately two meters, and tracking sensitivity of 163dBm.
Sized only 4.1mm x 4.1mm Multi Nano Spider ORG4500 module is industry’s small sized, record breaking
solution.
Multi Nano Spider – ORG4500
Datasheet
Revision 1.4
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February 14, 2018
ORG4500 module integrates dual stage LNA, SAW filter, TCXO, RTC crystal shield with market-leading Multi –
constellation SiRFstar V™ GPS SoC.
Multi Nano Spider ORG4500 module is introducing industry’s lowest energy per fix ratio, unparalleled
accuracy and extremely fast fixes even under challenging signal conditions, such as in built-up urban areas,
dense foliage or even indoor.
Integrated GPS SoC incorporating high-performance microprocessor and sophisticated firmware keeps
positioning payload off the host, allowing integration in embedded solutions with low computing resources.
Innovative architecture can detect changes in context, temperature, and satellite signals to achieve a state
of near continuous availability by maintaining and opportunistically updating its internal fine time,
frequency, and satellite ephemeris data while consuming mere microwatts of battery power.
11. ABOUT ORIGINGPS
OriginGPS is a world leading designer, manufacturer and supplier of miniature positioning modules, antenna
modules and antenna solutions.
OriginGPS modules introduce unparalleled sensitivity and noise immunity by incorporating Noise Free Zone
system (NFZ™) proprietary technology for faster position fix and navigation stability even under challenging
satellite signal conditions.
Founded in 2006, OriginGPS is specializing in development of unique technologies that miniaturize RF
modules, thereby addressing the market need for smaller wireless solutions.
12. DESCRIPTION
12.1. FEATURES
Autonomous operation
Pin to pin compatible with ORG4400 module
OriginGPS Noise Free Zone System (NFZ™) technology
Fully integrating:
Dual stage LNA, SAW filter, TCXO, RTC crystal, GNSS SoC, LDO regulator, Power Management Unit
GPS L1 1575.42 frequency, C/A code
GLONASS L1 FDMA 1598-1606MHz frequency band, SP signal
SBAS (WAAS, EGNOS, MSAS) and QZSS support
Concurrent tracking of multiple constellations
52 channels
Ultra-high Sensitivity down to -165dBm enabling Indoor Tracking
TTFF of < 1s in 50% of trials under Hot Start conditions
Low Power Consumption of ≤ 10mW in ATP™ mode
High Accuracy of < 1.5m in 50% of trials
High update rate of 5Hz, 1Hz by default
Autonomous A-GNSS by Client Generated Extended Ephemeris (CGEE™) for non-networked devices
Predictive A-GNSS by Server Generated Extended Ephemeris (SGEE™) for connected devices
Ephemeris Push™ for storing and loading broadcast ephemeris
Host controlled power saving mode
Self-managed low power modes - ATP™, PTF™ and APM™.
Multi Nano Spider – ORG4500
Datasheet
Revision 1.4
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Almanac Based Positioning (ABP™)
Multipath and cross-correlation mitigation
Active Jammer Detector and Remover
Smart Data Logging
Fast Time Synchronization for rapid single satellite time solution
ARM7® microprocessor system
Selectable UART, SPI or I2C host interface
NMEA protocol by default, switchable into One Socket Protocol (OSP®)
Programmable baud rate and messages rate
1PPS Output
Single voltage supply 1.8V
Ultra-small LGA footprint of 4.1mm x 4.1mm
Ultra-low weight of 0.1g
Surface Mount Device (SMD)
Optimized for automatic assembly and reflow equipment
Operating from -40°C to +85°C
FCC, CE, VCCI compliant
RoHS II/REACH compliant
Multi Nano Spider – ORG4500
Datasheet
Revision 1.4
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12.2. ARCHITECTURE
FIGURE 1 – ORG4500 ARCHITECTURE
GNSS SAW Filter
Band-Pass SAW filter eliminates out-of-band signals that may interfere to GNSS reception.
GNSS SAW filter is optimized for low Insertion Loss in GNSS band and low Return Loss outside it.
GNSS LNA
Dual-stage cascaded LNAs amplify GNSS signals to meet RF down converter input threshold.
Noise Figure optimized design was implemented to provide maximum sensitivity.
TCXO
Highly stable 26MHz oscillator controls down conversion process in RF block of the GNSS SoC.
Characteristics of this component are important factors for higher sensitivity, shorter TTFF and
better navigation stability.
RTC crystal
Tuning fork 32.768KHz quartz crystal with very tight specifications is necessary for maintaining Hot
Start and Warm Start capabilities of the module.
RF Shield
RF enclosure avoids external interference from compromising sensitive circuitry inside the module.
RF shield also blocks module’s internal high frequency emissions from being radiated.
SiRFstarV™ 5e GNSS SoC
CSR 5e is a 5-th generation SiRFstar™ product.
It is a hybrid positioning processor that combines GPS, GLONASS and SBAS data to provide a high
performance navigation solution.
SiRFstarV™ 5e is a full SoC built on a low-power RF CMOS single-die, incorporating GNSS RF, GNSS
baseband, integrated navigation solution software and ARM® processor.
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AgilePMU
Auxiliary Subsystem
SMPS
RTC
LDO
Temperature ADC
Power Controller
PLL
BBRAM
GNSS Radio
Host Interface and GPIO
GNSS Engine
Measurement Subsystem
Navigation Subsystem
DSP
ARM® CPU
Host UART
ROM
ROM
Host SPI
RAM
RAM
Host I2C
FIGURE 2 – SiRFstarV™ 5e GNSS SoC BLOCK DIAGRAM
SiRFstarV™ 5e SoC includes the following units:
GNSS radio subsystem containing single input dual receive paths for concurrent GPS and GLONASS,
harmonic-reject double balanced mixer, fractional-N synthesizer, integrated self-calibrating filters,
IF VGA with AGC, high-sample rate ADCs with adaptive dynamic range.
Measurement subsystem including DSP core for GNSS signals acquisition and tracking, interference
scanner and detector, wideband and narrowband interference removers, multipath and crosscorrelation detectors, dedicated DSP code ROM and DSP cache RAM.
Measurement subsystem interfaces GNSS radio subsystem.
Navigation subsystem comprising ARM7® microprocessor system for position, velocity and time
solution, program ROM, data RAM, cache and patch RAM, host interface UART, SPI and I²C drivers.
Navigation subsystem interfaces measurement subsystem.
Auxiliary subsystem containing RTC block and health monitor, temperature sensor for reference
clock compensation, battery-backed SRAM for satellite data storage, voltage supervisor with POR,
PLL controller, GPIO controller, 48-bit RTC timer and alarms, CPU watchdog monitor.
Auxiliary subsystem interfaces navigation subsystem, PLL and PMU subsystems.
PMU subsystem containing voltage regulators for RF and baseband domains.
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Datasheet
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12 . ELECTRICAL SPECIFICATIONS
12.3 ABSOLUTE MAXIMUM RATINGS
Stresses exceeding Absolute Maximum Ratings may damage the device.
PARAMETER
SYMBOL
MIN
MAX
UNIT
Power Supply Voltage
VCC
-0.30
+2.20
V
Power Supply Current1
ICC
150
mA
RF Input Voltage
VRF
-25
+25
V
I/O Voltage
VIO
-0.30
+3.65
V
IIO
-4
+4
mA
-2000
+2000
V
-400
+400
V
-2000
+2000
V
-500
+500
V
-2000
+2000
V
-100
+100
V
+10
dBm
+30
dBm
350
mW
I/O Source/Sink Current
4
HBM method
I/O pads
VIO(ESD)
5
CDM method
4
ESD Rating
Power pads
HBM method
VCC(ESD)
5
CDM method
4
2
RF
RF Power
3
HBM method
VRF(ESD)
6
MM method
fIN = 1560MHz÷1630MHz
PRF
fIN <1560MHz, >1630MHz
Power Dissipation
PD
Operating Temperature
Storage Temperature
Lead Temperature4
TAMB
-40
+85
°C
TST
-55
+125
°C
+245
°C
TLEAD
TABLE 3 – ABSOLUTE MAXIMUM RATINGS
Notes:
1.
2.
3.
4.
5.
6.
7.
Inrush current of up to 100mA for about 20µs duration.
Voltage applied on antenna element.
Power delivered to antenna element.
Human Body Model (HBM) contact discharge per EIA/JEDEC JESD22-A114D.
Charged Device Model (CDM) contact discharge per EIA/JEDEC JESD22-C101.
Machine Model (MM) contact discharge per EIA/JEDEC JESD22-A115C.
Lead temperature at 1mm from case for 10s duration.
Multi Nano Spider – ORG4500
Datasheet
Revision 1.4
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February 14, 2018
12.4 RECOMMENDED OPERATING CONDITIONS
Exposure to stresses above Recommended Operating Conditions may affect device reliability.
PARAMETER
SYMBOL
MODE / PAD
VCC
VCC
Power supply voltage
TEST CONDITIONS
Acquisitiona
Trackingb
Power Supply Current1
ORG4500-R01
ICC
MIN
TYP
MAX
UNIT
+1.71
+1.80
+1.89
V
GPS
43
54
mA
GPS+GLONASS
52
65
mA
GPS
39
mA
GPS+GLONASS
48
mA
8
mA
ATP™ Tracking2
Standby3
0.1
PTF™4
0.45
Hibernate
40
Input Voltage Low State
VIL
Input Voltage High State
VIH
Output Voltage Low State
VOL
IOL = 2mA
Output Voltage High State
VOH
IOH = -2mA
Input Capacitance
CIN
Internal Pull-up Resistors
RPU
Internal Pull-up Resistors
Internal Pull-down Resistor
RPU
RPD
Input Leakage Current
GPIO
mA
50
60
µA
-0.30
+0.40
V
+3.60
V
+0.40
V
0.70·VCC
0.75·VCC
V
5
GPIO
RF Input
0.11
1.00
GPIO1, GPIO2
0.11
mA
1.00
V
2.75
pF
2.2
MΩ
2.80
kΩ
IIN(leak)
VIN = 1.8V or 0V
-10
+10
MΩ
IOUT(leak)
VOUT = 1.8V or 0V
-10
+10
µA
Input Impedance
ZIN
fIN = 1575.5MHz
Input Return Loss
RLIN
Input Power Range
PIN
fIN = 1575.5MHz
GPS or GLONASS
Input Frequency Range
Operating Temperature
Output Leakage Current
Storage Temperature
56
Relative Humidity67
50
µA
-7
Ω
-165
-110
dB
fIN
1560
1620
dBm
TAMB
-40
+25
+85
MHz
TST
-55
+25
+125
°C
95
°C
RF Input
RH
TAMB
5
TABLE 4 – RECOMMENDED OPERATING CONDITIONS
Notes:
a.
b.
Acquisition maximum values were measured with blocked signal, no GPS reception at all. Not a typical use
case.
Tracking maximum values were measured with a low signal level: ~20 dB. Not a typical use case.
1. Typical values under radiated signal conditions of -130dBm and ambient temperature of +25°C.
2. ATP™ mode 200:1 (200ms on-time, 1s period), GPS-only tracking. The maximum value relates to the tracking part of ATP
cycle.
3. Transitional states of ATP™ power saving mode.
4. PTF™ mode 30:30 (30s max. on-time – 18s typical, 30m period), GPS-only tracking.
5. Longer TTFF is expected while operating below -30°C to -40°C.
6. Relative Humidity is within Operating Temperature range.
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13 PERFORMANCE
13.3 ACQUISITION TIME
TTFF (Time To First Fix) – is the period of time from module’s power-up till valid position estimation.
13.3.1 HOT START
Hot Start results either from a software reset after a period of continuous navigation or a return
from a short idle period that was preceded by a period of continuous navigation.
During Hot Start all critical data (position, velocity, time, and satellite ephemeris) is valid to the
specified accuracy and available in RAM.
13.3.2 SIGNAL REACQUISITION
Reacquisition follows temporary blocking of GNSS signals.
Typical reacquisition scenario includes driving through tunnel.
13.3.3 AIDED START
Aided Start is a method of effectively reducing TTFF by providing valid satellite ephemeris data.
Aiding can be implemented using Ephemeris Push™, CGEE™ or SGEE™.
13.3.4 WARM START
Warm Start typically results from user-supplied position and time initialization data or
continuous RTC operation with an accurate last known position available in RAM.
In this state position and time data are present and valid, but satellite ephemeris data validity
has expired.
13.3.5 COLD START
Cold Start occurs when satellite ephemeris data, position and time data are unknown.
Typical Cold Start scenario includes first power application.
OPERATION¹
MODE
VALUE
UNIT
Hot Start
<1
s
Aided Start
< 10
s
GPS + GLONASS
< 26
s
GPS
< 32
s
GPS + GLONASS
< 27
s
GPS
< 35
s
<1
s
Warm Start
Cold Start
Signal Reacquisition2
TABLE 5 – ACQUISITION TIME
Notes:
1. EVK is 24-hrs. static under signal conditions of -130dBm and ambient temperature of +25°C.
2. Outage duration ≤ 30s.
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13.4 SENSITIVITY
13.4.1 TRACKING
Tracking is an ability of receiver to maintain valid satellite ephemeris data.
During tracking receiver may stop output valid position solutions.
Tracking sensitivity defined as minimum GNSS signal power required for tracking.
13.4.2 REACQUISITION
Reacquisition follows temporary blocking of GNSS signals.
Reacquisition sensitivity defined as minimum GNSS signal power required for reacquisition.
13.4.3 NAVIGATION
During navigation receiver consequently outputs valid position solutions.
Navigation sensitivity defined as minimum GNSS signal power required for reliable navigation.
13.4.4 HOT START
Hot Start sensitivity defined as minimum GNSS signal power required for valid position solution
under Hot Start conditions.
13.4.5 AIDED START
Aided Start sensitivity defined as minimum GNSS signal power required for valid position
solution following aiding process.
13.4.6 COLD START
Cold Start sensitivity defined as minimum GNSS signal power required for valid position solution
under Cold Start conditions, sometimes referred as ephemeris decode threshold.
OPERATION1
MODE
VALUE
UNIT
GPS
-165
dBm
GLONASS
-165
dBm
GPS
-164
dBm
GLONASS
-164
dBm
-162
dBm
-160
dBm
-156
dBm
-148
dBm
Tracking
Navigation
Reacquisition2
Hot Start
3
Aided Start
Cold Start
4
GPS
TABLE 6 – SENSITIVITY
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13.5 RECEIVED SIGNAL STRENGTH
PARAMETER5
C/N0
VALUE
UNIT
45
dB-Hz
TABLE 7 – RECEIVED SIGNAL STRENGTH
Notes:
1.
2.
3.
4.
5.
EVK is static, ambient temperature is +25°C
Outage duration ≤ 30s.
Hibernate state duration ≤ 5m.
Aiding using Broadcast Ephemeris (Ephemeris Push™) or Extended Ephemeris (CGEE™ or SGEE™).
Average C/N0 reported for 4 SVs, EVK is 24-hrs. static, outdoor under open sky, ambient temperature is +25°C.
13.6 POWER CONSUMPTION
OPERATION1
MODE
VALUE
UNIT
GPS
77
mW
GPS + GLONASS
94
mW
GPS
70
mW
GPS + GLONASS
86
mW
ATP™ Tracking2
14
PTF™3
0.81
5m Hibernate: 10s tracking
2.4
mW
90
µW
Acquisition
Tracking
Low Power Tracking
Hibernate
mW
TABLE 8 – ORG4500 POWER CONSUMPTION
Notes:
1.
2.
3.
4.
Voltage measured 1.81V
Typical values under radiated signal conditions of -130dBm and ambient temperature of +25°C.
ATP™ mode 100:1 (100ms on-time, 1s period), GPS-only tracking.
PTF™ mode 30:30 (30s max. on-time – 18s typical, 30m period), GPS-only tracking.
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13.7 ACCURACY
PARAMETER
FORMAT
CEP (50%)
Horizontal
2dRMS (95%)
Position¹
VEP (50%)
Vertical
2dRMS (95%)
MODE
VALUE
UNIT
GPS + GLONASS
< 1.5
m
GPS + SBAS
< 2.0
m
GPS
< 2.5
m
GPS + GLONASS
< 3.0
m
GPS + SBAS
< 4.0
m
GPS
< 5.0
m
GPS + GLONASS
< 2.5
m
GPS + SBAS
< 3.5
m
GPS
< 4.0
m
GPS + GLONASS
< 5.0
m
GPS + SBAS
< 6.5
m
GPS
< 7.5
m
Velocity²
over ground
50% of samples
< 0.01
m/s
Heading
to north
50% of samples
< 0.01
°
≤ 30
ns
Time¹
RMS jitter
1 PPS
TABLE 9 – ACCURACY
Notes:
1. Module is static under signal conditions of -130dBm, ambient temperature is +25°C.
2. Speed over ground ≤ 30m/s.
12.3 DYNAMIC CONSTRAINS
PARAMETER
Metric
Imperial
Velocity and Altitude1
515m/s and 18,288m
1,000knots and 60,000ft
Velocity
600m/s
1,166knots
Altitude
-500m to 24,000m
-1,640ft to 78,734ft
Acceleration
4g
Jerk
5m/s3
TABLE 10 – DYNAMIC CONSTRAINS
Note:
1. Standard dynamic constrains according to regulatory limitations.
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13 POWER MANAGEMENT
13.3 POWER STATES
13.3.1 FULL POWER ACQUISITION
ORG4500 module stays in Full Power Acquisition state until a reliable position solution is made.
Switching to GPS-only mode turns off GLONASS RF block lowering power consumption.
13.3.2 FULL POWER TRACKING
Full Power Tracking state is entered after a reliable position solution is achieved.
During this state the processing is less intense compared to Full Power Acquisition, therefore
power consumption is lower. Full Power Tracking state with navigation update rate at 5Hz
consumes more power compared to default 1Hz navigation.
13.3.3 CPU ONLY
CPU Only is the transitional state of ATP™ power saving mode when the RF and DSP sections are
partially powered off. This state is entered when the satellites measurements have been
acquired, but navigation solution still needs to be computed.
13.3.4 STANDBY
Standby is the transitional state of ATP™ power saving mode when RF and DSP sections are
completely powered off and baseband clock is stopped.
13.3.5 HIBERNATE
ORG4500 module boots into Hibernate state after power supply applied.
During this state RF, DSP and baseband sections are completely powered off leaving only RTC
and Battery-Backed RAM running.
ORG4500 will perform Hot Start if stayed in Hibernate state less than 4 hours from last valid
position solution.
13.4 BASIC POWER SAVING MODE
Basic power saving mode is elaborating host in straightforward way for controlling transfers between
Full Power and Hibernate states.
Current profile of this mode has no hidden cycles of satellite data refresh.
Host may condition transfers by tracking duration, accuracy, satellites in-view or other parameters.
13.5 SELF MANAGED POWER SAVING MODES
Multi Nano Spider module has several self-managed power saving modes tailored for different use
cases.
These modes provide several levels of power saving with degradation level of position accuracy.
Initial operation in Full Power state is a prerequisite for accumulation of satellite data determining
location, fine time and calibration of reference clocks.
13.5.1 ADAPTIVE TRICKLE POWER (ATP™)
ATP™ is best suited for applications that require navigation solutions at a fixed rate as well as
low power consumption and an ability to track weak signals.
This power saving mode provides the most accurate position among self-managed modes.
In this mode the module is intelligently cycled between Full Power state, CPU Only state
consuming 14mA and Standby state consuming ≤ 100μA, therefore optimizing current profile
for low power operation.
ATP™ period that equals navigation solution update can be 1 second to 10 seconds.
On-time including Full Power Tracking and CPU Only states can be 200ms to 900ms.
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Standby
CPU Only
Full Power Tracking
Standby
CPU Only
Full Power Tracking
CPU Only
≥ 0.1s
Full Power Tracking
Standby
≤ 45s
CPU Only
Full Power Tracking
CPU Only
Full Power Tracking
Full Power Acquisition
Power Consumption
Power On
Standby
Standby
Time
0.1s
ATP period
FIGURE 3 – ATP™ TIMING
13.5.2 PUSH TO FIX (PTF™)
PTF™ is best suited for applications that require infrequent navigation solutions.
In this mode ORG4500 module is mostly in Hibernate state, drawing ≤ 54µA of current, waking
up for satellite data refresh in fixed periods of time.
PTF™ period can be anywhere between 10 seconds and 2 hours.
Host can initiate an instant position report by toggle the ON_OFF pad to wake up the module.
During fix trial module will stay in Full Power state until good position solution is estimated or
pre-configured timeout for it has expired.
Periodical satellite
data refresh
Power On
Periodical satellite
data refresh
Hibernate
≤ 30s
Full Power Tracking
Hibernate
≤ 45s
CPU Only
Full Power Tracking
CPU Only
Full Power Tracking
CPU Only
Full Power Tracking
Full Power Acquisition
Power Consumption
User position request
Hibernate
0.1s
Hibernate
Time
≤ 10s
PTF period
FIGURE 4 – PTF™ TIMING
13.5.3 ADVANCED POWER MANAGEMENT (APM™)
APM™ mode is designed for Aided-GPS wireless applications.
APM™ allows power savings while ensuring that the Quality of the Solution (QoS) in maintained
when signals level drop.
In APM™ mode the module is intelligently cycled between Full Power and Hibernate states.
In addition to setting the position report interval, a QoS specification is available that sets
allowable error estimates and selects priorities between position report interval and more
power saving.
User may select between Duty Cycle Priority for more power saving and Time Between Fixes
(TBF) priority with defined or undefined maximum horizontal error.
TBF range is from 10s to 180s between fixes, Power Duty Cycle range is between 5% to 100%.
Maximum position error is configurable between 1 to 160m.
The number of APM™ fixes is configurable up to 255 or set to continuous.
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FIGURE 5 – APM™ TIMING
Notes:
1. GPS signal level drops (e.g. user walks indoor).
2. Lower signal results in longer ON time. To maintain Duty Cycle Priority, OFF time is increased.
3. Lower signal means missed fix. To maintain future TBFs module goes Full Power state until signal levels improve.
15 . EXTENDED FEATURES
16.1 ALMANAC BASED POSITIONING (ABP™)
With ABP™ mode enabled, the user can get shorter Cold Start TTFF as tradeoff with position accuracy.
When no sufficient ephemeris data is available to calculate an accurate solution, a coarse solution will
be provided where the position is calculated based on one or more of the GPS satellites, having their
states derived from the almanac data.
Data source for ABP™ may be either stored factory almanac, broadcasted or pushed almanac.
16.2 ACTIVE JAMMER DETECTOR AND REMOVER
Jamming Detector is embedded DSP software block that detects interference signals in GPS L1 and
GLONASS L1 band.
Jamming Remover is additional DPS software block that sort-out Jamming Detector output mitigating
up to 8 interference signals of Continuous Wave (CW) type up to 80dB-Hz each.
PCW [dB-Hz]
80
70
60
50
40
30
20
10
f[GHz]
1.570
1.571
1.572
1.573
1.574
1.575
1.576
1.577
1.578
1.579
1.580
FIGURE 7 – ACTIVE JAMMER DETECTOR FREQUENCY PLOT
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16.3
CLIENT GENERATED EXTENDED EPHEMERIS (CGEE™)
CGEE™ feature allows shorter TTFFs by providing predicted (synthetic) ephemeris files created within
a non-networked host system from previously received satellite ephemeris data.
The prediction process requires good receipt of broadcast ephemeris data for all satellites.
EE files created this way are good for up to 3 days and then expire.
CGEE™ feature requires avoidance of power supply removal.
CGEE™ data files are stored and managed by host.
15.4
SERVER GENERATED EXTENDED EPHEMERIS (SGEE™)
SGEE™ enables shorter TTFFs by fetching Extended Ephemeris (EE) file downloaded from web server.
Host is initiating periodic network sessions of EE file downloads, storage and provision to module.
There is one-time charge for set-up, access to OriginGPS EE distribution server and end-end testing for
re-distribution purposes, or there is a per-unit charge for each module within direct SGEE™
deployment.
GPS EE files are provided with look-ahead of 3 days.
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16 .INTERFACE
16.1
PAD ASSIGNMENT
PAD
NAME
FUNCTION
DIRECTION
1
̅̅̅̅̅̅̅̅
RESET
Asynchronous Reset
Input
2
RX
UART Receive
3
̅̅̅̅̅
CTS
Interface Select 1
4
WAKEUP
5
TX
6
ON_OFF
Power State Control
Input
7
1PPS
UTC Time Mark
Output
8
GND
System Ground
Power
9
GND
System Ground
Power
10
NC
Not Connected
11
VCC
System Power
Power
12
VCC
System Power
Power
13
GND
RF Ground
Power
14
RF_IN
Antenna Signal Input
Analog Input
15
GND
RF Ground
Power
16
̅̅̅̅̅
RTS
SPI Data In
UART Clear To Send
I2C Data
Bi-directional
SPI Clock
Bi-directional
Power Status
UART Transmit
SPI Data Out
Interface Select 2 UART Ready To Send
Output
I2C Clock
SPI Chip Select
Bi-directional
Bi-directional
TABLE 11 – PIN-OUT
Top View
FIGURE 8 – PAD ASSIGNMENT
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16.2
POWER SUPPLY
It is recommended to keep the power supply on all the time in order to maintain RTC block active and
keep satellite data in RAM for fastest possible TTFF. When VCC is removed settings are reset to factory
default and the receiver performs Cold Start on next power up.
16.2.1 VCC = 1.8V
VCC is 1.8V ±5% DC and must be provided from regulated power supply.
Inrush current is up to 150mA for about 20µs duration, VCC can be dropped down to 1.66V.
Typical ICC during acquisition is 55mA. Lower acquisition current is possible disabling GLONASS
radio path by software command.
During tracking the processing is less intense compared to acquisition, therefore power
consumption is lower.
Maximum ICC current in Hibernate state is 54µA, while all I/O lines externally held in Hi-Z state.
Output capacitors are critical when powering ORG4500 from switch-mode power supply.
Filtering is important to manage high alternating current flows on the power input connection.
An additional LC filter on ORG4500power input may be needed to reduce system noise.
The high rate of ORG4500 input current change requires low ESR bypass capacitors.
Additional higher ESR output capacitors can provide input stability damping.
The ESR and size of the output capacitors directly define the output ripple voltage with a given
inductor size. Large low ESR output capacitors are beneficial for low noise.
Voltage ripple below 50mVPP allowed for frequencies between 100KHz to 1MHz.
Voltage ripple below 15mVPP allowed for frequencies above 1MHz.
Higher voltage ripple may compromise ORG4500performance.
16.2.2 GROUND
Ground pad must be connected to host PCB Ground with shortest possible trace or by multiple vias.
16.3 CONTROL INTERFACE
16.3.1 ON_OFF
ON_OFF input in ORG4500 is used to switch the module between different power states:
While in Hibernate state, ON_OFF pulse will initiate transfer into Full Power state.
While in ATP™ mode, ON_OFF pulse will initiate transfer into Full Power state.
While in PTF™ mode, ON_OFF pulse will initiate one PTF™ request.
While in Full Power state, ON_OFF pulse will initiate orderly shutdown into Hibernate state.
100μs min.
Turns ON
Turns OFF
100μs min.
FIGURE 9 – ON_OFF TIMING
ON_OFF detector set requires a rising edge and high logic level that persists for at least 100µs.
ON_OFF detector reset requires ON_OFF asserted to low logic level for at least 100µs.
Recommended ON_OFF Low-High-Low pulse length is 100ms.
ON_OFF pulses with less than 1s intervals are not recommended.
Multiple switch bounce pulses are recommended to be filtered out.
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Pull-down resistor of 10kΩ-33kΩ is recommended to avoid accidental power mode change.
ON_OFF input is tolerable up to 3.6V.
Do not drive high permanently or pull-up this input.
This line must be connected to host.
16.3.2 WAKEUP
WAKEUP output from module is used to indicate power state.
A low logic level indicates that the module is in one of its low-power states - Hibernate or
Standby. A high logic level indicates that the module is in Full Power state.
Connecting WAKEUP to ON_OFF enables autonomous start to Full Power state.
In addition WAKEUP output can be used to control auxiliary devices.
Wakeup output is LVCMOS 1.8V compatible.
Do not connect if not in use.
̅̅̅̅̅̅̅̅
16.3.3 RESET
Power-on-Reset (POR) sequence is generated internally.
̅̅̅̅̅̅̅̅ pad.
In addition, external reset is available through RESET
Resetting module clears the state machine of self-managed power saving modes to default.
̅̅̅̅̅̅̅̅ signal should be applied for at least 1µs.
RESET
̅̅̅̅̅̅̅̅
RESET input is active low and has internal pull-up resistor of 1MΩ.
Do not drive this input high.
Do not connect if not in use.
16.3.4 1PPS
Pulse-Per-Second (PPS) output provides a pulse signal for timing purposes.
PPS output starts when 3D position solution has been obtained using 5 or more GNSS satellites.
PPS output stops when 3D position solution is lost.
Pulse length (high state) is 200ms with rising edge is less than 30ns synchronized to UTC epoch.
The correspondent UTC time message is generated and put into output FIFO 300ms after the
PPS signal. The exact time between PPS and UTC time message delivery depends on message
rate, message queue and communication baud rate.
1PPS output is LVCMOS 1.8V compatible.
Do not connect if not in use.
16.4 DATA INTERFACE
ORG4500 module has 3 types of interface ports to connect to host - UART, SPI or I2C – all multiplexed
on a shared set of pads. At system reset host port interface lines are disabled, so no conflict occurs.
Logic values on ̅̅̅̅̅
CTS and ̅̅̅̅̅
RTS are read by the module during startup and define host port type.
External resistor of 10kΩ is recommended. Pull-up resistor is referenced to 1.8V.
PORT TYPE
̅̅̅̅̅
CTS
̅̅̅̅̅
RTS
UART
External pull-up
Internal pull-up
SPI (default)
Internal pull-down
Internal pull-up
2
Internal pull-down
External pull-down
IC
TABLE 12 – HOST INTERFACE SELECT
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16.4.1 UART
Multi Nano Spider ORG4500 has a standard UART port:
TX used for GPS data reports. Output logic high voltage level is LVCMOS 1.8V compatible.
RX used for receiver control. Input logic high voltage level is 1.45V, tolerable up to 3.6V.
UART flow control using ̅̅̅̅̅
CTS and ̅̅̅̅̅
RTS lines is disabled by default.
Can be turned on by sending OSP®Message ID 178, Sub ID 70 input command.
16.4.2 SPI
SPI host interface features are:
Slave SPI Mode 1, supports clock up to 6.8MHz.
RX and TX have independent 2-byte idle patterns of ‘0xA7 0xB4’.
TX and RX each have independent 1024 byte FIFO buffers.
TX FIFO is disabled when empty and transmits its idle pattern until re-enabled.
RX FIFO detects a software specified number of idle pattern repeats and then disables FIFO
input until the idle pattern is broken.
FIFO buffers can generate an interrupt at any fill level.
SPI detects synchronization errors and can be reset by software.
Output is LVCMOS 1.8V compatible. Inputs are tolerable up to 3.6V.
16.4.3 I²C
I2C host interface features are:
I2C Multi-Master Mode - module initiates clock and data, operating speed 400kbps.
I2C address ‘0x60’ for RX and ‘0x62’ for TX.
Individual transmit and receive FIFO length of 64 bytes.
Clock rate can be switched 100KHz (default 400KHz), address can be changed (default 0x62
for TX FIFO and 0x60 for RX FIFO) by sending OSP Message ID 178, Sub ID 70 input
command.
SCL and SDA are pseudo open-drain lines, therefore require external pull-up resistors of
2.2kΩ to 1.8V, or 3.3kΩ to 3.3V.
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17 .TYPICAL APPLICATION CIRCUIT
17.1 PASSIVE ANTENNA
Designing with passive antenna require RF layout skills and can be challenging.
Contact OriginGPS for application specific recommendations and design review services.
17.2 PASSIVE ANTENNA
BGA715N7
FIGURE 6 – SCHEMATIC DIAGRAM OF PASSIVE ANTENNA
17.3 ACTIVE ANTENNA
Beware: There is an internal LNA inside the ORG4500. So the recommended active antenna gain should
be low. For most applications passive antenna is recommended.
FIGURE 7 – SCHEMATIC DIAGRAM OF ACTIVE ANTENNA CONNECTION
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18 . RECOMMENDED PCB LAYOUT
18.1 FOOTPRINT
FIGURE 8 – FOOTPRINT
18.2 RF TRACE
0.002
0.051
0.008
0.204
inch
millimeter
0.005
0.127
FIGURE 9 – TYPICAL MICROSTRIP PCB TRACE ON FR-4 SUBSTRATE
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18.3 PCB STACK-UP
controlled
impedance 50Ω
{
CS
Signals
Ground
L2
Signals
Ground
.
.
.
LN
Signals or Power
PS
Ground
FIGURE 10 – TYPICAL PCB STACK-UP
18.4 PCB LAYOUT RESTRICTIONS
Switching and high-speed components, traces and vias must be kept away from ORG4500 module.
Signal traces to/from module should have minimum length.
Recommended minimal distance from adjacent active components is 3mm.
Ground pads must be connected to host PCB Ground with shortest possible traces or vias.
In case of tight integration constrain or co-location with adjacent high speed components like CPU or
memory, high frequency components like transmitters, clock resonators or oscillators, LCD panels or
CMOS image sensors, contact OriginGPS for application specific recommendations.
19 .DESIGN CONSIDERATIONS
ORG4500 operates with received signal levels down to -163dBm and can be affected by high absolute levels
of RF signals, moderate levels of RF interference near the GPS bands and by low-levels of RF noise in the GPS
band.
RF interference from nearby electronic circuits or radio transmitters can contain enough energy to
desensitize ORG4500. These systems may also produce levels of energy outside of GPS/GLONASS band, high
enough to leak through RF filters and degrade the operation of the radios in ORG4500.
This issue becomes more critical in small products, where there are industrial design constraints.
In that environment, transmitters for Wi-Fi, Bluetooth, RFID, cellular and other radios may have antennas
physically close to the GPS antenna.
To prevent degraded performance of ORG4500, OriginGPS recommends performing EMI/jamming
susceptibility tests for radiated and conducted noise on prototypes and assessing risks of other factors.
Antennas for GPS and GLONASS have a wider bandwidth than pure GPS antennas.
Some wideband antennas may not have a good axial ratio to block reflections of RHCP GPS and GLONASS
signals. These antennas have lower rejection of multipath reflections and tend to degrade the overall
performance of the receiver.
Designing with passive antenna require RF layout skills and can be challenging.
Contact OriginGPS for application specific recommendations and design review services.
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20 . OPERATION
When power is first applied, module goes into a Hibernate state while integrated RTC starts and internal
Finite State Machine (FSM) sequences though to “Ready-to-Start” state.
Host is not required to control external master ̅̅̅̅̅̅̅̅
RESET since module’s internal reset circuitry handles
detection of power application.
While in “Ready-to-Start” state, module awaits a pulse to the ON_OFF input.
Since integrated RTC startup times are variable, host is required either to wait for a fixed interval or to
monitor a short Low-High-Low pulse on WAKEUP output that indicates FSM “Ready-to-Start” state.
Another option is to repeat a pulse on the ON_OFF input every second until the module starts by either
detecting a stable logic high level on WAKEUP output or neither generation of UART messages.
20.1 STARTING THE MODULE
A pulse on the ON_OFF input line when FSM is ready and in startup-ready state, Hibernate state,
standby state, will command the module to start.
100μs min.
Turns ON
Turns OFF
100μs min.
FIGURE 19 – ON_OFF TIMING
ON_OFF detector set requires a rising edge and high logic level that persists for at least 100µs.
ON_OFF detector reset requires ON_OFF asserted to low logic level for at least 100µs.
Recommended ON_OFF Low-High-Low pulse length is 100ms.
ON_OFF pulses with less than 1s intervals are not recommended.
ΔT0
ΔT6
VCC
ΔT1
RTC
̅̅̅̅̅̅̅̅
RESET
Unknown
ΔT4
ΔT3
ON_OFF
Unknown
ΔT5
WAKEUP
Unknown
ΔT2
FIGURE 20 – START-UP TIMING
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Datasheet
Revision 1.4
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February 14, 2018
SYMBOL
PARAMETER
CONDITION
MIN
TYP
MAX
UNIT
fRTC
RTC Frequency
+25°C
-20 ppm
32768
+20 ppm
Hz
tRTC
RTC Tick
+25°C
∆T1
RTC Startup Time
∆T0
Power Stabilization
∆T2
WAKEUP Pulse
∆T3
ON_OFF Low
3
tRTC
∆T4
ON_OFF High
3
tRTC
∆T5
ON_OFF to WAKEUP high
After ON_OFF
6
tRTC
∆T6
ON_OFF to ARM boot
After ON_OFF
2130
tRTC
6·tRTC+∆T1
30.5176
µs
300
ms
7·tRTC+∆T1
RTC running
8·tRTC+∆T1
10
tRTC
TABLE 13 – START-UP TIMING
20.2 AUTONOMOUS POWER ON
Connecting WAKEUP output (pad 6) to ON_OFF input (pad 1) enables self-start to Full Power state
from Ready-To-Start state following boot process.
When host data interface is set UART, module will start autonomously transmitting NMEA messages
after first power supply application. Further transfers between Full Power and Hibernate states
require additional logic circuitry combined with serial command.
20.3 VERIFYING THE MODULE HAS STARTED
WAKEUP output will go high indicating module has started.
System activity indication depends upon selected serial interface.
The first message to come out of module is “OK_TO_SEND” - ‘$PSRF150,1*3E’.
21.1.1 UART
When active, the module will output NMEA messages at the 4800bps.
21.1.2 I²C
In Multi-Master mode with no bus contention - the module will spontaneously send messages.
In Multi-Master mode with bus contention - the module will send messages after the I2C bus
contention resolution process allows it to send.
21.1.3 SPI
Since module is SPI slave device, there is no possible indication of system “ready” through SPI
interface. Host must initiate SPI connection approximately 1s after WAKEUP output goes high.
20.4 CHANGING PROTOCOL AND BAUD RATE1
Protocol and baud rate can be changed by NMEA $PSRF100 serial message.
20.5 CHANGING SATELLITE CONSTELLATION1
Satellite constellations used in position solution can be changed by OSP® Message ID 222 Sub ID 16.
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20.6 SHUTTING DOWN THE MODULE
Transferring module from Full Power state to Hibernate state can be initiated in two ways:
By a pulse on ON_OFF input.
By NMEA ($PSRF117) or OSP (MID205) serial message.
Orderly shutdown process may take anywhere from 10ms to 900ms to complete, depending upon
operation in progress and messages pending, and hence is dependent upon serial interface speed and
controls. Module will stay in Full Power state until TX FIFO buffer is emptied.
The last message during shutdown sequence is ‘$PSRF150,0*3F’.
Note:
1. Changes to default firmware settings are volatile and will be discarded at power re-cycle.
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Datasheet
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22 . FIRMWARE
22.1 DEFAULT SETTINGS
Power On State
Hibernate
Default Interface¹
SPI
SPI Data Format
NMEA
UART Settings
4,800bps.
UART Data Format
NMEA
I²C Settings
Multi-Master 400kbps
I²C Data Format
NMEA
Satellite Constellation
GPS + GLONASS
$GPGGA @1 sec.
$GNGNS @ 1 sec.
$GNGSA @ 1 sec.
NMEA Messages
$GPGSV @ 5 sec.
$GLGSV @ 5 sec.
$GNRMC @ 1 sec.
Firmware Defaults
SBAS
OFF
ABP™
OFF
Static Navigation
ON
Track Smoothing
OFF
Jammer Detector
ON
Jammer Remover
OFF
Fast Time Sync
OFF
Pseudo DR Mode
ON
Power Saving Mode
OFF
3SV Solution Mode
ON
Data Logger
OFF
5Hz Update Rate
OFF
TABLE 14 – DEFAULT FIRMWARE SETTINGS
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Datasheet
Revision 1.4
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February 14, 2018
22.2 FIRMWARE UPDATES
Firmware updates can be considered exclusively as patches on top of baseline ROM firmware.
Those patch updates may be provided by OriginGPS to address ROM firmware issues as a method of
performance improvement. Typical patch file size is 24KB.
Host controller is initiating load and application of patch update by communicating module’s Patch
Manager software block allocating 16KB of memory space for patch and additional 8KB for cache.
Patch updates are preserved until BBRAM is discarded.
Note:
1.
̅̅̅̅̅.
Without external resistor straps on ̅̅̅̅̅
CTS or RTS
23 . HANDLING INFORMATION
23.1 MOISTURE SENSITIVITY
ORG4500 modules are MSL 3 designated devices according to IPC/JEDEC J-STD-033B standard.
Module in sample or bulk package should be baked prior to assembly at 125°C for 48 hours.
23.2 ASSEMBLY
The module supports automatic pick-and-place assembly and reflow soldering processes.
Suggested solder paste stencil is 5 mil to ensure sufficient solder volume.
23.3 SOLDERING
Reflow soldering of the module always on component side (Top side) of the host PCB according to
standard IPC/JEDEC J-STD-020D for LGA SMD.
Avoid exposure of ORG4500 to face-down reflow soldering process.
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Datasheet
Revision 1.4
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February 14, 2018
FIGURE 11 – RECOMMENDED SOLDERING PROFILE
Referred temperature is measured on top surface of the package during the entire soldering process.
Suggested peak reflow temperature is 245°C for 30 sec. for Pb-Free solder paste.
Actual board assembly reflow profile must be developed individually per furnace characteristics.
Reflow furnace settings depend on the number of heating/cooling zones, type of solder paste/flux
used, board design, component density and packages used.
SYMBOL PARAMETER
MIN
TYP
MAX
245
UNIT
TC
Classification Temperature
°C
TP
Package Temperature
TL
Liquidous Temperature
TS
Soak/Preheat Temperature
150
200
°C
tS
Soak/Preheat Time
60
120
s
tL
Liquidous Time
60
150
s
tP
Peak Time
245
217
30
°C
°C
s
TABLE 15 – SOLDERING PROFILE PARAMETERS
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Datasheet
Revision 1.4
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23.4 CLEANING
If flux cleaning is required, module is capable to withstand standard cleaning process in vapor
degreaser with the Solvon® n-Propyl Bromide (NPB) solvent and/or washing in DI water.
Avoid cleaning process in ultrasonic degreaser, since specific vibrations may cause performance
degradation or destruction of internal circuitry.
23.5 REWORK
If localized heating is required to rework or repair the module, precautionary methods are required to
avoid exposure to solder reflow temperatures that can result in permanent damage to the device.
23.6 ESD SENSITIVITY
This product is ESD sensitive device and must be handled with care.
23.7 SAFETY INFORMATION
Improper handling and use can cause permanent damage to the product.
23.8 DISPOSAL INFORMATION
This product must not be treated as household waste.
For more detailed information about recycling electronic components contact your local waste
management authority.
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Datasheet
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13. MECHANICAL SPECIFICATIONS
ORG4500 module has advanced ultra-miniature LGA SMD packaging sized 4.1mm x 4.1mm.
On bottom side there are 16 LGA SMT pads with Cu base and ENIG plating.
ORG4500 module supports automated pick and place assembly and reflow soldering processes.
SIDE VIEW
TOP VIEW
BOTTOM VIEW
0.161 +0.010/ -0.004
4.10 +0.10/ -0.05
8
9
1
16
0.161 +0.010/ -0.004
4.10 +0.10/ -0.05
0.161 +0.010/ -0.004
4.10 +0.10/ -0.05
0.083 +0.004/ -0.000
2.10 +0.10/ -0.00
0.161 +0.010/ -0.004
4.10 +0.10/ -0.05
inch
millimeter
FIGURE 12 – MECHANICAL DRAWING
Dimensions
Length
Width
Height
Weight
mm
4.10 +0.10/ -0.05
4.10+0.10/ -0.05
2.1 +0.1/ -0.0
gr
0.1
inch
0.161 +0.004/ -0.002
0.161 +0.004/ -0.002
0.083 +0.004/ -0.0
oz
0.004
TABLE 17 – MECHANICAL SUMMARY
24 . COMPLIANCE
The following standards are applied on the production of ORG4500 modules:
IPC-6011/6012 Class2 for PCB manufacturing
IPC-A-600 Class2 for PCB inspection
IPC-A-610D Class2 for SMT acceptability
ORG4500 modules are manufactured in ISO 9001:2008 accredited facilities.
ORG4500 modules are manufactured in ISO 14001:2004 accredited facilities.
ORG4500 modules are manufactured in OHSAS 18001:2007 accredited facilities.
ORG4500 modules are designed, manufactured and handled in compliance with the Directive
2011/65/EU of the European Parliament and of the Council of June 2011 on the Restriction of the use of
certain Hazardous Substances in electrical and electronic equipment, referred as RoHS II.
ORG4500 modules are manufactured and handled in compliance with the applicable substance bans as of
Annex XVII of Regulation 1907/2006/EC on Registration, Evaluation, Authorization and Restriction of
Chemicals including all amendments and candidate list issued by ECHA, referred as REACH.
ORG4500 modules comply with the following EMC standards:
EU CE EN55022:06+A1(07), Class B
US FCC 47CFR Part 15:09, Subpart B, Class B
JAPAN VCCI V-3/2006.04
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Datasheet
Revision 1.4
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February 14, 2018
25 . PACKAGING AND DELIVERY
25.1 APPEARANCE
ORG4500 modules are delivered in reeled tapes for automatic pick and place assembly process.
FIGURE 23 – MODULE POSITION
ORG4500 modules are packed in 2 different reel types.
SUFFIX
TR1
TR2
Quantity
500
2000
TABLE 16 – REEL QUANTITY
Reels are dry packed with humidity indicator card and desiccant bag according to IPC/JEDEC J-STD-033B
standard for MSL 3 devices.
Reels are vacuum sealed inside anti-static moisture barrier bags.
Sealed reels are labeled with MSD sticker providing information about:
MSL
Shelf life
Reflow soldering peak temperature
Seal date
Sealed reels are packed inside cartons.
Reels, reel packs and cartons are labeled with sticker providing information about:
Description
Part number
Lot number
Customer PO number
Quantity
Date code
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Datasheet
Revision 1.4
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February 14, 2018
25.2 CARRIER TAPE
Carrier tape material - polystyrene with carbon (PS+C).
Cover tape material – polyester based film with heat activated adhesive coating layer.
FIGURE 24 – CARRIER TAPE
mm
inch
A0
4.35 ± 0.1
0.171 ± 0.004
B0
4.35 ± 0.1
0.171 ± 0.004
K0
2.30 ± 0.1
0.091 ± 0.004
W
12.0 ± 0.3
0.472 ± 0.012
TABLE 17 – CARRIER TAPE DIMENSIONS
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Datasheet
Revision 1.4
Page 39 of 40
February 14, 2018
25.3 REEL
Reel material - antistatic plastic.
FIGURE 25 – REEL
SUFFIX
TR1
TR2
mm
inch
mm
inch
ØA
178.0 ± 1.0
7.00 ± 0.04
330.0 ± 2.0
13.00 ± 0.08
ØN
60.0 ± 1.0
2.36 ± 0.04
102.0 ± 2.0
4.02 ± 0.08
W1
12.7 ± 0.5
0.50 ± 0.02
12.7 ± 0.5
0.50 ± 0.02
W2
15.8 ± 0.5
0.62 ± 0.02
18.2 ± 0.5
0.72 ± 0.02
TABLE 18 – REEL DIMENSIONS
26 . ORDERING INFORMATION
O R G 4
5
0 0 - R 0 1 - T R 1
FIRMWARE VERSION
HARDWARE OPTION
TABLE 19 – ORDERING OPTIONS
PART NUMBER
FW VERSION
HW OPTION
VCC RANGE
PACKAGING
SPQ
ORG4500-R01-TR1
3
01
1.8V
REELED TAPE
500
ORG4500-R01-TR2
3
01
1.8V
REELED TAPE
2000
ORG4500-R01-UAR
3
01
5V USB
EVALUATION KIT
1
TABLE 20 – ORDERABLE DEVICES
Multi Nano Spider – ORG4500
Datasheet
Revision 1.4
Page 40 of 40
February 14, 2018
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