500MS/s 12-Bit PCI Express Digitizer
1.4 GB/s PCI Express (8-lane) interface
2 channels sampled at 12-bit resolution
500 MS/s simultaneous real-time
sampling rate on each input
Up to 2 GigaSample dual-port memory
Continuous streaming mode
±40mV to ±4V input range
Asynchronous DMA device driver
AlazarDSO oscilloscope software
Software Development Kit supports
C/C++, C#, VB and LabVIEW
Linux driver available
PCIe x8
Windows 7/XP/
Vista, Linux 2.6
ATS9350 is an 8-lane PCI Express (PCIe x8), dualchannel, high speed, 12 bit, 500 MS/s waveform
digitizer card capable of streaming acquired data to
PC memory at rates up to 1.4 GB/s or storing it in its
deep on-board dual-port acquisition memory buffer
of up to 2 Gigasamples.
500 MS/s
to 1 KS/s
250 MHz
Memory Per
Up to
2 GigaSample
12 bits
Optical Coherence Tomography (OCT)
Ultrasonic & Eddy Current NDT/NDE
Radar/RF Signal Recording & Analysis
Terabyte Storage Oscilloscope
Unlike other products on the market, ATS9350 does
not use interleaved sampling. Each input has its own
12-bit, 500 MSPS ADC chip.
High Resolution Oscilloscope
Optional external clock allows operation from 500 MHz
down to 1 MHz, making ATS9350 an ideal waveform
digitizer for OCT applications.
Digital Down Conversion (DDC)
Multi-Channel Transient Recording
Users can capture data from one trigger or a burst of
triggers. Users can also stream very large datasets
continuously to PC memory or hard disk.
ATS9350 allows users to build real-time data acquisition systems even under the Windows or Linux operating systems, as users are allowed to read acquired
data even while the next acquisition is in progress.
ATS9350 is supplied with AlazarDSO software that lets
the user get started immediately without having to go
through a software development process.
Users who need to integrate the ATS9350 in their own
program can purchase a software development kit,
ATS-SDK for C/C++ and VB, or ATS-VI for LabVIEW
for Windows or a Linux based ATS-Linux.
All of this advanced functionality is packaged in a low
power, half-length PCI Express card.
Version 1.1b
500MS/s 12-Bit PCI Express Digitizer
PCI Express Bus Interface
ATS9350 interfaces to the host computer using an
8-lane PCI Express bus. Each lane operates at 2.5
Gbps. PCIe bus specification v1.0a and v1.1 are
According to PCIe specification, an 8-lane board
can be plugged into any 8-lane or 16-lane slot, but
not into a 4-lane or 1-lane slot. As such, ATS9350
requires at least one free 8-lane or 16-lane slot on
the motherboard.
The physical and logical PCIe x8 interface is provided
by an on-board FPGA, which also integrates acquisition control functions, memory management functions and acquisition datapath. This very high degree
of integration maximizes product reliability.
An acquisition can consist of multiple records, with
each record being captured as a result of one trigger
event. A record can contain both pre-trigger and
post-trigger data.
Infinite number of triggers can be captured by
ATS9350, when it is operating using dual-port
In between the multiple triggers being captured, the
acquisition system is re-armed by the hardware within
64 sampling clock cycles.
This mode of capture, sometimes referred to as
Multiple Record, is very useful for capturing data
in applications with a very rapid or unpredictable
trigger rate. Examples of such applications include
medical imaging, ultrasonic testing, OCT and NMR
PCI Express is a relatively new bus and, as such,
throughput performance may vary from motherboard
to motherboard. AlazarTech’s 1.4 GB/s benchmark
was done on an ASUS P6T7 motherboard based on
the x58 chipset for iCore processors.
On-Board Acquisition Memory
Other motherboards. such as Intel S5000PSL, produced similar results, whereas older machines such
as the Dell T7400 came in at around 1 GB/s.
Acquisition memory can either be divided equally
between the two input channels or devoted entirely
to one of the channels.
Users must always be wary of throughput specifications from manufacturers of waveform digitizers.
Some unscrupulous manufacturers tend to specify the
raw, burst-mode throughput of the bus. AlazarTech,
on the other hand, specifies the benchmarked sustained throughput. To achieve such high throughput,
a great deal of proprietary memory management logic
and kernel mode drivers have been designed.
There are two distinct advantages of having on-board
Analog Input
An ATS9350 features two analog input channels with
extensive functionality. Each channel has up to 250
MHz of full power analog input bandwidth. Note that
the bandwidth is reduced to 150 MHz for the ±40mV
With software selectable attenuation, you can achieve
an input voltage range of ±40mV to ±4V.
It must be noted that input impedance of both channels is fixed at 50Ω.
Software selectable AC or DC coupling further increases the signal measurement capability.
Acquisition System
ATS9350 PCI Express digitizers use state of the art
500 MSPS, 12-bit ADCs to digitize the input signals.
The real-time sampling rate ranges from 500 MS/s
down to 1 KS/s for internal clock and 1 MS/s for
external clock.
ATS9350 supports on-board memory buffers of 128
Megasamples, 1 Gigasamples and 2 Gigasamples.
First, a snapshot of the ADC data can be stored into
this acquisition memory at full acquisition speed of 2
ch * 500 MS/s * 2 bytes per sample = 2 Gigabytes
per second, which is higher than the maximum PCIe
x8 bus throughput of 1.4 GB/s.
Second, and more importantly, on-board memory
can also act as a very deep FIFO between the Analog
to Digital converters and PCI Express bus, allowing
very fast sustained data transfers across the bus,
even if the operating system or another motherboard
resource temporarily interrupts DMA transfers.
Maximum Sustained Transfer Rate
PCI Express support on different motherboards is not
always the same, resulting in significantly different
sustained data transfer rates. The reasons behind
these differences are complex and varied and will not
be discussed here.
ATS9350 users can quickly determine the maximum
sustained transfer rate for their motherboard by
inserting their card in a PCIe slot and running the
Tools:Benchmark:Bus tool provided in AlazarDSO
ATS9350, which is equipped with dual-port on-board
memory, will be able to achieve this maximum sustained transfer rate.
The two channels are guaranteed to be simultaneous,
as the two ADCs use a common clock.
Version 1.1b
500MS/s 12-Bit PCI Express Digitizer
Recommended Motherboards
Many different types of motherboards have been
benchmarked by AlazarTech. The best performance
is provided by motherboards that use the Intel x58
chipset and iCore 7 processors. The motherboard that
has consistently given the best throughput results (as
high as 1.5 GB/s) has been te ASUS P6T7.
Older motherboards, such as Intel S5000PSLSATA
that use the S5000 chipset have also provided very
good (1.4 GB/s) throughput.
Note that a DMA is not started until RecordsPerBuffer
number of records (triggers) have been acquired.
It should be noted that some motherboards may
behave unexpectedly. For example, one customer
purchased a P6T6 motherboard (instead of P6T7)
and found that the throughput was limited to approximately 800 MB/s because P6T6 only supports
4-lane PCI Express connection, even though it uses
the same x58 chipset.
NPT AutoDMA buffers do not include headers, so it is
not possible to get trigger time-stamps.
Traditional AutoDMA
NPT AutoDMA can easily acquire data to PC host
memory at the maximum sustained transfer rate of
the motherboard without causing an overflow. In order to acquire both pre-trigger and post-trigger
data in a dual-ported memory environment, users can
use Traditional AutoDMA.
More importantly, a BUFFER_OVERFLOW flag is asserted only if the entire on-board memory is used
up. This provides a very substantial improvement
over Traditional AutoDMA.
This is the recommended mode of operation for
most ultrasonic scanning, OCT and medical imaging
Continuous AutoDMA
Continuous AutoDMA is also known as the data
streaming mode.
Data is returned to the user in buffers, where each
buffer can contain from 1 to 8192 records (triggers).
This number is called RecordsPerBuffer.
Users can also specify that each record should come
with its own header that contains a 40-bit trigger
A BUFFER_OVERFLOW flag is asserted if more than
512 buffers have been acquired by the acquisition
system, but not transferred to host PC memory by
the AutoDMA engine.
In other words, a BUFFER_OVERFLOW can occur if
more than 512 triggers occur in very rapid succession, even if all the on-board memory has not been
used up.
No Pre-Trigger (NPT) AutoDMA
Many ultrasonic scanning and medical imaging applications do not need any pre-trigger data: only
post-trigger data is sufficient.
NPT AutoDMA is designed specifically for these applications. By only storing post-trigger data, the
memory bandwidth is optimized and the entire onboard memory acts like a very deep FIFO.
In this mode, data starts streaming across the PCI
bus as soon as the ATS9350 is armed for acquisition.
It is important to note that triggering is disabled in
this mode.
Continuous AutoDMA buffers do not include headers,
so it is not possible to get trigger time-stamps.
A BUFFER_OVERFLOW flag is asserted only if the
entire on-board memory is used up.
The amount of data to be captured is controlled by
counting the number of buffers acquired. Acquisition
is stopped by an AbortCapture command.
Continuous AutoDMA can easily acquire data to PC
host memory at the maximum sustained transfer
rate of the motherboard without causing an overflow. This is the recommended mode for very long signal
Version 1.1b
500MS/s 12-Bit PCI Express Digitizer
Triggered Streaming AutoDMA
Triggered Streaming AutoDMA is virtually the same
as Continuous mode, except the data transfer across
the bus is held off until a trigger event has been
The ATS9350 is equipped with sophisticated digital
triggering options, such as programmable trigger
thresholds and slope on any of the input channels or
the External Trigger input.
While most oscilloscopes offer only one trigger engine,
ATS9350 offers two trigger engines (called Engines
X and Y).
manage data acquisition, thereby slowing down the
overall data acquisition process.
The user can specify the number of records to capture
in an acquisition, the length of each record and the
amount of pre-trigger data.
Triggered Streaming AutoDMA buffers do not include
headers, so it is not possible to get trigger timestamps.
A programmable trigger delay can also be set by the
user. This is very useful for capturing the signal of
interest in a pulse-echo application, such as ultrasound, radar, lidar etc.
A BUFFER_OVERFLOW flag is asserted only if the
entire on-board memory is used up.
As in Continuous mode, the amount of data to be captured is controlled by counting the number of buffers
acquired. Acquisition is stopped by an AbortCapture
Triggered Streaming AutoDMA can easily acquire data
to PC host memory at the maximum sustained transfer
rate of the motherboard without causing an overflow.
This is the recommended mode for RF signal recording
that has to be started at a specific time, e.g. based
on a GPS pulse.
Asynchronous DMA Driver
The various AutoDMA schemes discussed above
provide hardware support for optimal data transfer.
However, a corresponding high performance software
mechanism is also required to make sure sustained
data transfer can be achieved.
This proprietary software mechanism is called Async
DMA (short for Asynchronous DMA).
A number of data buffers are posted by the application software. Once a data buffer is filled, i.e. a DMA
has been completed, ATS9350 hardware generates
an interrupt, causing an event message to be sent to
the application so it can start consuming data. Once
the data has been consumed, the application can
post the data buffer back on the queue. This can go
on indefinitely.
One of the great advantages of Async DMA is that
almost 95% of CPU cycles are available for data
processing, as all DMA arming is done on an eventdriven basis.
To the best of our knowledge, no other supplier of
waveform digitizers provides asynchronous software
drivers. Their synchronous drivers force the CPU to
Version 1.1b
Timebase on the ATS9350 can be controlled either
by on-board low-jitter VCO or by optional External
On-board low-jitter VCO uses an on-board 10 MHz
TCXO as a reference clock.
Optional External Clock
While the ATS9350 features low jitter VCO and a 10
MHz TCXO as the source of the timebase system,
there may be occasions when digitizing has to be
synchronized to an external clock source.
ATS9350 External Clock option provides an SMA input
for an external clock signal, which can be a sine wave
or LVTTL signal.
Input impedance for the External Clock input is fixed
at 50 W. External clock input is always ac-coupled.
There are three types of External Clock supported
by ATS9350. These are described below.
Fast External Clock
A new sample is taken by the on-board ADCs for
each rising edge of this External Clock signal.
In order to satisfy the clocking requirements of
the ADC chips being used, Fast External Clock
frequency must always be higher than 1 MHz and
lower than 500 MHz.
This is the ideal clocking scheme for OCT applications
Slow External Clock
This type of clock should be used when the clock
frequency is either too slow or is a burst-type
clock. Both these types of clock do not satisfy
the minimum clock requirements listed above for
Fast External Clock.
500MS/s 12-Bit PCI Express Digitizer
In this mode, the ATS9350 ADCs are run at a
preset internal clock frequency. The user-supplied
Slow External Clock signal is then monitored for
low-to-high transitions. Each time there is such
a transition, a new sample is stored into the onboard memory.
It should be noted that there can be a 0 to +8 ns
sampling jitter when Slow External Clock is being
used, as the internal ADC clock is not synchronized to the user-supplied clock.
Slow External Clock: fEXT < 60 MHz
10 MHz Reference Clock
An optional Stream-To-Disk add-on module for AlazarDSO allows users to stream data to hard disk. For
the fastest possible streaming, the hard disks have
to be used in a RAID 0 configuration.
Users are also able to write their own Plug-In modules.
A Plug-In is a DLL that is called each time AlazarDSO
receives a data buffer. Many different data processing and control functions can be built into a Plug-In.
Examples include Averaging, Co-Adding, controlling
acquisition based on an external GPS module etc.
AlazarDSO software also includes powerful tools for
benchmarking the computer bus and disk drive.
It is possible to generate the sampling clock based
on an external 10 MHz reference input. This is
useful for RF systems that use a common 10 MHz
reference clock.
Software Development Kits
ATS9350 uses an on-board low-jitter VCO to generate the 500 MHz high frequency clock used by
the ADC. This 500 MHz sampling clock can then
be decimated by a factor of 1, 2, 5, 10 or any
other integer value that is divisible by 5.
A Windows compatible software development kit, ATSSDK is also offered. It allows programs written in C/
C++ and VisualBASIC to fully control the ATS9350. Sample programs are provided as source code.
AUX Connector
ATS9350 provides an AUX (Auxiliary) BNC connector
that is configured as a Trigger Output connector by
When configured as a Trigger Output, AUX BNC connector outputs a 5 Volt TTL signal synchronous to the
ATS9350 Trigger signal, allowing users to synchronize
their test systems to the ATS9350 Trigger.
AlazarTech provides easy to use software development
kits for customers who want to integrate the ATS9350
into their own software.
A set of high performance VIs for LabVIEW 7.1 and
higher, called ATS-VI, can also be purchased.
Linux Support
A Linux based software development kit, ATS-Linux, is
also available to qualified customers who also have to
execute a Non-Disclosure Agreement. These drivers
are provided as source code that has been verified
under Fedora Core 9.
When combined with the Trigger Delay feature of the
ATS9350, this option is ideal for ultrasonic and other
pulse-echo imaging applications.
AUX connector can also be used as a Trigger Enable
Input and Clock Output.
Every ATS9350 digitizer is factory calibrated to NISTtraceable standards. To recalibrate an ATS9350, the
digitizer must either be shipped back to the factory
or a qualified metrology lab.
On-Board Monitoring
Adding to the reliability offered by ATS9350 are the
on-board diagnostic circuits that constantly monitor
over 20 different voltages, currents and temperatures. LED alarms are activated if any of the values
surpasses the limits.
AlazarDSO Software
ATS9350 is supplied with the powerful AlazarDSO
software that allows the user to setup the acquisition hardware and capture, display and archive the
Version 1.1b
500MS/s 12-Bit PCI Express Digitizer
System Requirements
Amplifier Bypass Mode
Personal computer with at least one free x8 or x16 PCI Express (v1.0a, v1.1 or v2.0) slot, 2 GB RAM, 100 MB of free
hard disk space, SVGA display adaptor and monitor with at
least a 1024 x 768 resolution.
Standard Feature
Software selectable
No. Resistor selectable. A bypass cable also must be used
Input Range
Approx. ± 200 mV
Power Requirements
Input Coupling
DC, irrespective of the input
coupling setting for the channel
Input Impedance
50 Ω, irrespective of the input
impedance setting for the channel
Input bandwidth (-3dB)
250 MHz
1.2 A, typical
1.1 A, typical
Single slot, half length PCI card
(4.2 inches x 6.5 inches)
250 g
I/O Connectors
BNC female connectors
SMA female connector
Environmental Timebase System
Timebase options
Internal Clock or
External Clock (Optional)
Internal Sample Rates
500 MS/s, 250 MS/s, 100 MS/s,
50 MS/s, 20 MS/s,
10 MS/s, 5 MS/s, 2 MS/s,
1 MS/s, 500 KS/s, 200 KS/s,
100KS/s, 50 KS/s, 20 KS/s,
10 KS/s, 5 KS/s, 2 KS/s, 1 KS/s
Internal Clock accuracy
±2 ppm
Operating temperature
0 to 55 degrees Celcius
Storage temperature
-20 to 70 degrees Celcius
Dynamic Parameters
Relative humidity
5 to 95%, non-condensing
Typical values measured on the 200 mV range of CH A of a
randomly selected ATS9350. Input signal was provided by
a Marconi 2018A signal generator, followed by a 9-pole, 10
MHz band-pass filter (TTE Q36T-10M-1M-50-720BMF). Input
frequency was set at 9.9 MHz and output amplitude was 135
mV rms, which was approximately 95% of the full scale input.
Input was averaged.
Acquisition System
Bandwidth (-3dB)
DC-coupled, 50Ω
12 bits
DC - 250 MHz, typical for all input
ranges other than ±40mV
DC - 150 MHz, typical for all input
ranges other than ±40mV
AC-coupled, 50Ω
100KHz - 250 MHz, typical for all
input ranges other than ±40mV
100KHz - 150 MHz, typical for all
input ranges other than ±40mV
Bandwidth flatness:
± 1dB
Number of channels
2, simultaneously sampled
Maximum Sample Rate
500 MS/s single shot
Minimum Sample Rate
1 KS/s single shot for internal
Full Scale Input ranges
50 Ω input impedance:
±40mV, ±100mV, ±200mV,
±400mV, ±1V, ±2V, and ±4V,
software selectable
DC accuracy
±2% of full scale in all ranges
Input coupling
AC or DC, software selectable
Input impedance
50Ω ±1%
Input protection
Version 1.1b
±4V (DC + peak AC for CH A,
CH B and EXT only without external attenuation)
60.55 dB
58.09 dB
-64.8 dB
-63.05 dB
Note that these dynamic parameters may vary from one unit
to another, with input frequency and with the full scale input
range selected.
Optional ECLK (External Clock) Input
Signal Level
±200mV Sine wave or 3.3V
LVTTL (LVTTL for Slow External
Clock only)
Input impedance
Input coupling
Maximum frequency
500 MHz for Fast External Clock
60 MHz for Slow External Clock
Minimum frequency
1 MHz for Fast External Clock
DC for Slow External Clock
Sampling Edge
Optional 10 MHz Reference Input
Signal Level
±200mV Sine wave or 3.3V
LVTTL (LVTTL for Slow External
Clock only)
Input impedance
Input Coupling
AC coupled
Input Frequency
10 MHz ± 0.25 MHz
Sampling Clock Freq.
500 MHz
500MS/s 12-Bit PCI Express Digitizer
Triggering System
Edge triggering with hysteresis
Comparator Type
Digital comparators for internal (CH A, CHB) triggering and
analog comparators for TRIG IN
(External) triggering
Trigger Engine Combination OR, AND, XOR, selectable
ATS9350: External Clock Upgrade
Trigger Engine Source
ATS9350: Amplifier Bypass Upgrade
ATS9350-128M to 1G Upgrade
ATS9350-128M to 2G Upgrade
ATS9350-1G to 2G Upgrade
C/C++, VB SDK for ATS9462
LabVIEW VI for ATS9462
Linux Driver for ATS9462
Number of Trigger Engines 2
CH A, CH B, EXT, Software or
None, independently software
selectable for each of the two
Trigger Engines
±5% of full scale input, typical
Trigger sensitivity
±10% of full scale input range.
This implies that the trigger system may not trigger reliably if the
input has an amplitude less than
±10% of full scale input range
Trigger level accuracy
±5%, typical, of full scale input
range of the selected trigger
250 MHz
Trigger Delay
Software selectable from 0 to
9,999,999 sampling clock cycles
Trigger Timeout
Software selectable with a 10 us
resolution. Maximum settable
value is 3,600 seconds. Can also
be disabled to wait indefinitely for
a trigger event
TRIG IN (External Trigger) Input
Input impedance
50 Ω
DC only
Bandwidth (-3dB)
Input range
DC - 250 MHz
±3 V
DC accuracy
±10% of full scale input
Input protection
±8V (DC + peak AC without external attenuation)
Connector Used
Output Signal
5 Volt TTL
Synchronized to a clock derived
from the ADC sampling clock.
Divide-by-4 clock (dual channel mode) or divide-by-8 clock
(single channel mode)
Materials Supplied
ATS9350 PCI Express Card
ATS9350 Hardware Manual
Manufactured By:
ATS9350 Install Disk
Alazar Technologies, Inc.
Certification and Compliances
POINTE-CLAIRE, qc, canada h9R 4S2
CE Compliance
All specifications are subject to change without noti
TOLL FREE: 1-877-7-ALAZAR OR 1-877-725-2927
TEL: (514) 426-4899 FAX: (514) 426-2723
Version 1.1b
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