Ruggedized Quad SAS/SATA Redriver/Equalizer
with Extended Operating Temperature
MAX14980
General Description
Benefits and Features
The MAX14980 quad-channel redriver is designed to
redrive two full lanes of SAS or SATA signals up to
6.0GT/s (gigatransfers per second) and operates from a
single +3.3V supply.
● High Performance Solution Designed to Overcome
Lossy Channels
The MAX14980 features independent input equalization
and output preemphasis. It enhances signal integrity at the
receiver by equalizing the signal at the input and establishing preemphasis at the output of the device. SAS and SATA
OOB (out-of-band) signaling is supported using high-speed
amplitude detection on the inputs and squelch on the corresponding outputs. Inputs and outputs are all internally
50Ω terminated and must be AC-coupled to the SAS/SATA
controller IC and SAS/SATA device.
• 3dB of Independent (per Channel) Selectable Input EQ and Output Preemphasis
• Compensates up to 30in of Channel Losses with
Deterministic Jitter: 23psP-P (max); Random Jitter:
1.8psRMS (max)
• 8dB (typ) of Return Loss Up to 3.0GHz
The MAX14980 is available in a small 42-pin, 3.5mm x
9mm, TQFN package with flow-through traces for ease of
layout. This device is specified over the -40°C to +85°C
extended operating temperature range.
• Industrial Temperature Rated: -40°C to +85°C
• ±2.5kV Human Body Model (HBM) ESD
Protection on All Pins
• Housed in a Flow-Through (42-Pin, 3.5mm x 9.0mm) TQFN Package or Resistance to Vibration/
Shocks
● Designed to Reliably Operate in Harsh Environments
● Ease of Design and Layout
Applications
●
●
●
●
●
●
Industrial/Embedded PCs
Computer on Modules
Carrier Boards
Test Equipment
Rack Server Industrial PCs
Medical Equipment
• Single 3.3V Operation
• Internal Input/Output 50Ω Termination Resistors
Ordering Information appears at end of data sheet.
For related parts and recommended products to use with this part, refer
to www.maximintegrated.com/MAX14980.related.
Pin Configuration
MODEA
VCC
GND
IN1AM
IN1AP
GND
OUT0AM
OUT0AP
VCC
IN0BM
IN0BP
GND
OUT1BM
OUT1BP
GND
VCC
ENB
TOP VIEW
38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22
21 PE1A
EQ0B 39
20 EQ1A
MAX14980
EQ1B 41
19 PE0A
PE1B 42
19-6647; Rev 0; 3/13
IN1BP
IN1BM
GND
OUT0BP
VCC
GND
TQFN-EP
*CONNECT EXPOSED PAD (EP) TO GND.
18 EQ0A
9 10 11 12 13 14 15 16 17
GND
VCC
8
OUT1AM
7
OUT1AP
6
GND
5
IN0AM
4
IN0AP
3
VCC
2
OUT0BM
1
MODEB
*EP
ENA
PE0B 40
MAX14980
Ruggedized Quad SAS/SATA Redriver/Equalizer
with Extended Operating Temperature
Absolute Maximum Ratings
(Voltages referenced to GND.)
VCC........................................................................-0.3V to +4.0V
All Other Pins............................................ -0.3V to (VCC + 0.3V)
Continuous Current (PE_, EQ_, MODE_).........................±15mA
Peak Current (for 10kHz, 1% duty cycle)
(IN__, OUT__).............................................................±100mA
Continuous Power Dissipation (TA = +70°C)
TQFN (derate 35.7mW/°C above +70°C)..................2857mW
Operating Temperature Range............................ -40°C to +85°C
Storage Temperature Range .............................-55°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Thermal Characteristics (Note 1)
TQFN
Junction-to-Case Thermal Resistance (θJC)..................2°C/W
Junction-to-Ambient Thermal Resistance (θJA)...............28°C/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(VCC = +3.0V to +3.6V, CCOUPLE = 12nF, RL = 50Ω, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = +3.3V,
TA = +25°C.) (Note 2)
PARAMETER
SYMBOL
Operating Power-Supply Range
VCC
Operating Supply Current
ICC
Standby Supply Current
ISTBY
CONDITIONS
MIN
TYP
3.0
MAX
UNITS
3.6
V
EQ_ = PE_ = GND
280
350
EQ_ = PE_ = VCC
350
440
EN_ = GND
32
mA
40
mA
Input Termination
RRX-SE
Single-ended to VCC
42.5
57.5
Ω
Output Termination
RTX-SE
Single-ended to VCC
42.5
57.5
Ω
0.1GHz ≤ f ≤ 0.3GHz
-10
0.3GHz ≤ f ≤ 3.0GHz
-7.9
3.0GHz ≤ f ≤ 6.0GHz
0
0.1GHz ≤ f ≤ 0.3GHz
-6
0.3GHz ≤ f ≤ 3.0GHz
-5
3.0GHz ≤ f ≤ 6.0GHz
0
AC PERFORMANCE
Differential Input Return Loss
(Note 3)
SDD11
Common-Mode Input Return Loss
(Note 3)
SCC11
Differential Output Return Loss
(Note 3)
SDD22
Common-Mode Output Return
Loss (Note 3)
SCC22
Differential Input Voltage
Input Equalization
Differential Output Voltage
Output Preemphasis
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0.1GHz ≤ f ≤ 0.3GHz
-10
0.3GHz ≤ f ≤ 3.0GHz
-7.9
3.0GHz ≤ f ≤ 6.0GHz
0
0.1GHz ≤ f ≤ 0.3GHz
-6
0.3GHz ≤ f ≤ 3.0GHz
-4
3.0GHz ≤ f ≤ 6.0GHz
VIN-DIFF
EQ
VOUT-DIFF
PE
dB
dB
dB
dB
0
SAS 1.5, 3.0, or 6.0GT/s, MODE_ = GND
275
1600
SATA 1.5, 3.0, or 6.0GT/s, MODE_ = VCC
225
1600
EQ_ = VCC (Note 4)
f = 750MHz, PE_ = GND
PE_ = VCC, Figure 1
3
750
dB
1200
3
mVP-P
mVP-P
dB
Maxim Integrated │ 2
MAX14980
Ruggedized Quad SAS/SATA Redriver/Equalizer
with Extended Operating Temperature
Electrical Characteristics (continued)
(VCC = +3.0V to +3.6V, CCOUPLE = 12nF, RL = 50Ω, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = +3.3V,
TA = +25°C.) (Note 2)
PARAMETER
Propagation Delay
Output Transition Time
SYMBOL
tPD
TTX-RF
CONDITIONS
MIN
PE_ = EQ_ = GND
TYP
MAX
300
PE_ = GND, 20% to 80%
UNITS
ps
30
ps
Differential Output Skew Same
Pair
TSK
Deterministic Jitter
TDJ
K28.5 pattern, 6.0GT/s, PE_ = EQ_ = GND
(Note 3)
23
psP-P
Random Jitter
TRJ
D10.2 pattern, 6.0GT/s, PE_ = EQ_ = GND
1.8
psRMS
10
ps
MODE_ = GND, f = 0.75GHz
120
220
MODE_ = VCC, f = 0.75GHz
75
200
mVP-P
OOB Squelch Threshold
VSQ-DIFF
OOB Squelch Entry Time
TOOB,SQ
f = 0.75GHz (Note 3)
5
ns
OOB Exit Time
TOOB,EX
f = 0.75GHz (Note 3)
9
ns
OOB Differential Offset Delta
∆VOOB,DIFF
Difference between OOB and active-mode
output offset
-50
+50
mV
OOB Common-Mode Offset Delta
∆VOOB,CM
Difference between OOB and active-mode
output common-mode voltage
-30
+30
mV
OOB Output Disable
VOOB,OUT
OOB disabled output level
30
mVP-P
CONTROL LOGIC INPUTS
Input Logic-High
Input Logic-Low
VIH
1.4
V
VIL
Input Logic Hysteresis
VHYST
Input Leakage Current
IIN
0.6
75
VCC = 3.3V, VIN = 0.5V or 1.5V
-50
V
mV
+50
µA
Note 2: All devices are 100% production tested at TA = +85°C. All temperature limits are guaranteed by design.
Note 3: Guaranteed by design.
Note 4: EQ (input equalization) as employed in this device refers to the equivalent of adding preemphasis before the input. For
example, input EQ of 3dB would show the same waveform as output PE of 3dB (see Figure 1).
Timing Diagram
VLOW_PP
PE(dB) = 20log
[(
VHIGH_PP
VLOW_PP
VHIGH_PP
)]
Figure 1. Output Preemphasis
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Maxim Integrated │ 3
MAX14980
Ruggedized Quad SAS/SATA Redriver/Equalizer
with Extended Operating Temperature
Typical Operating Characteristics
(VCC = +3.3V, TA = +25°C, all eye diagrams measured using K28.5 pattern.)
VIN = 275mVP-P, 1.5Gbps, PE = 0, EQ = 0
VIN = 275mVP-P, 3Gbps, PE = 0, EQ = 0
MAX14980 toc02
400
200
0
-200
-400
-400
-200
0
200
400
200
0
-200
-400
400
-200
200ps/div
0
100
MAX14980 toc03
400
200
0
-200
-400
-600
200
-100
MAX14980 toc04
400
200
0
-200
-400
-600
800
-200
0
200
MAX14980 toc05
400
200
0
-200
-400
-600
600
EYE DIAGRAM VOLTAGE (200mV/div)
EYE DIAGRAM VOLTAGE (200mV/div)
MAX4952 toc06
400
200
0
-200
-400
-600
-50
0
50ps/div
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100
-200
-100
0
100
200
100ps/div
VIN = 275mVP-P, 6Gbps, PE = 1, EQ = 0
-100
50
600
-800
400
600
-800
0
VIN = 275mVP-P, 3Gbps, PE = 1, EQ = 0
200ps/div
800
-50
50ps/div
VIN = 275mVP-P, 1.5Gbps, PE = 1, EQ = 0
-400
VIN = 275mVP-P, 6Gbps, PE = 0, EQ = 0
100ps/div
600
-800
-100
EYE DIAGRAM VOLTAGE (200mV/div)
EYE DIAGRAM VOLTAGE (200mV/div)
800
600
EYE DIAGRAM VOLTAGE (200mV/div)
EYE DIAGRAM VOLTAGE (200mV/div)
EYE DIAGRAM VOLTAGE (200mV/div)
MAX14980 toc01
50
100
VIN = 1600mVP-P, 1.5Gbps, PE = 0, EQ = 0
MAX14980 toc07
400
200
0
-200
-400
-600
-400
-200
0
200
400
200ps/div
Maxim Integrated │ 4
MAX14980
Ruggedized Quad SAS/SATA Redriver/Equalizer
with Extended Operating Temperature
Typical Operating Characteristics (continued)
(VCC = +3.3V, TA = +25°C, all eye diagrams measured using K28.5 pattern.)
MAX14980 toc08
400
200
0
-200
-400
-600
600
-200
-100
0
100
0
-200
-400
-50
0
50
MAX14980 toc10
600
400
200
0
-200
-400
-600
-400
600
400
200
0
-200
-400
-600
-100
0
100
800
VIN = 1600mVP-P, 6Gbps, PE = 1, EQ = 0
MAX14980 toc12
200
0
-200
-400
-600
-800
200
-100
-50
200
0
-200
-400
-600
www.maximintegrated.com
50
100
VIN = 500mVP-P WITH 20in FR4 STRIPLINE,
6GT/s, PE = 0, EQ = 0
MAX14980 toc14
EYE DIAGRAM VOLTAGE (200mV/div)
EYE DIAGRAM VOLTAGE (200mV/div)
400
0
0
50ps/div
600
100ps/div
400
400
MAX14980 toc13
-100
200
600
VIN = 500mVP-P WITH 20in FR4 STRIPLINE,
3GT/s, PE = 0, EQ = 0
-200
0
200ps/div
100ps/div
-300
-200
50ps/div
MAX14980 toc11
-200
VIN = 1600mVP-P, 1.5Gbps, PE = 1, EQ = 0
-800
100
EYE DIAGRAM VOLTAGE (200mV/div)
EYE DIAGRAM VOLTAGE (200mV/div)
-100
VIN = 1600mVP-P, 3Gbps, PE = 1, EQ = 0
-800
800
200
100ps/div
800
MAX14980 toc09
400
-600
200
VIN = 1600mVP-P, 6Gbps, PE = 0, EQ = 0
EYE DIAGRAM VOLTAGE (200mV/div)
VIN = 1600mVP-P, 3Gbps, PE = 0, EQ = 0
EYE DIAGRAM VOLTAGE (200mV/div)
EYE DIAGRAM VOLTAGE (200mV/div)
600
100
200
300
600
400
200
0
-200
-400
-600
-150
-100
-50
0
50
100
150
50ps/div
Maxim Integrated │ 5
MAX14980
Ruggedized Quad SAS/SATA Redriver/Equalizer
with Extended Operating Temperature
Typical Operating Characteristics (continued)
(VCC = +3.3V, TA = +25°C, all eye diagrams measured using K28.5 pattern.)
VIN = 500mVP-P WITH 20in FR4 STRIPLINE,
3GT/s, PE = 0, EQ = 1
VIN = 500mVP-P WITtH 20in FR4 STRIPLINE,
6GT/s, PE = 0, EQ = 1
600
MAX14980 toc16
EYE DIAGRAM VOLTAGE (200mV/div)
EYE DIAGRAM VOLTAGE (200mV/div)
MAX14980 toc15
400
200
0
-200
-400
-600
-300
-200
-100
0
100
200
600
400
200
0
-200
-400
-600
300
-150
100ps/div
0
100
150
100
200
500
400
300
200
100
0
-100
-200
-300
-400
-500
300
-150
-100
-50
0
50
100
150
100ps/div
50ps/div
VIN = 275mVP-P, 3GT/s, PE = 1, EQ = 0,
OUTPUT AFTER 20in FR4 STRIPLINE
VIN = 275mVP-P, 6GT/s, PE = 1, EQ = 0,
OUTPUT AFTER 20in FR4 STRIPLINE
MAX14980 toc20
MAX14980 toc19
500
EYE DIAGRAM VOLTAGE (100mV/div)
EYE DIAGRAM VOLTAGE (100mV/div)
50
MAX14980 toc18
EYE DIAGRAM VOLTAGE (100mV/div)
EYE DIAGRAM VOLTAGE (100mV/div)
200
100
0
-100
-200
-300
-400
-500
-100
0
VIN = 275mVP-P, 6GT/s, PE = 0, EQ = 0,
OUTPUT AFTER 20in FR4 STRIPLINE
MAX14980 toc17
500
400
300
-200
-50
50ps/div
VIN = 275mVP-P, 3GT/s, PE = 0, EQ = 0,
OUTPUT AFTER 20in FR4 STRIPLINE
-300
-100
400
300
200
100
0
-100
-200
-300
-400
-500
-300
-200
-100
0
100ps/div
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100
200
300
500
400
300
200
100
0
-100
-200
-300
-400
-500
-150
-100
-50
0
50
100
150
50ps/div
Maxim Integrated │ 6
MAX14980
Ruggedized Quad SAS/SATA Redriver/Equalizer
with Extended Operating Temperature
Pin Description
PIN
NAME
1
MODEB
FUNCTION
2, 9, 16, 23,
30, 37
VCC
Positive Supply Voltage Input. Bypass VCC to GND with 2.2µF and 0.01µF capacitors in parallel as
close as possible to the device, recommended on each VCC pin.
3, 6, 12, 15,
24, 27, 33, 36
GND
Ground
OOB Threshold Logic Input B. MODEB is internally pulled down.
4
IN1BP
Noninverting Input 1B
5
IN1BM
Inverting Input 1B
7
OUT0BP
Noninverting Output 0B
8
OUT0BM
Inverting Output 0B
10
IN0AP
Noninverting Input 0A
11
IN0AM
13
OUT1AP
Noninverting Output 1A
Inverting Input 0A
14
OUT1AM
Inverting Output 1A
17
ENA
18
EQ0A
Channel 0A Input Equalizer Logic Input. EQ0A is internally pulled down.
19
PE0A
Channel 0A Output Preemphasis Logic Input. PE0A is internally pulled down.
Active-High Enable Input A. Drive ENA low to put A channels in standby mode. Drive ENA high to put
A channels in normal operation. ENA is internally pulled down.
20
EQ1A
Channel 1A Input Equalizer Logic Input. EQ1A is internally pulled down.
21
PE1A
Channel 1A Output Preemphasis Logic Input. PE1A is internally pulled down.
22
MODEA
OOB Threshold Logic Input A. MODEA is internally pulled down.
25
IN1AM
Inverting Input 1A
26
IN1AP
Noninverting Input 1A
28
OUT0AM
Inverting Output 0A
29
OUT0AP
Noninverting Output 0A
31
IN0BM
Inverting Input 0B
32
IN0BP
Noninverting Input 0B
34
OUT1BM
Inverting Output 1B
35
OUT1BP
Noninverting Output 1B
38
ENB
39
EQ0B
Active-High Enable Input B. Drive ENB low to put B channels in standby mode. Drive ENB high to
put B channels in normal operation. ENB is internally pulled down.
Channel 0B Input Equalizer Logic Input. EQ0B is internally pulled down.
40
PE0B
Channel 0B Output Preemphasis Logic Input. PE0B is internally pulled down.
41
EQ1B
Channel 1B Input Equalizer Logic Input. EQ1B is internally pulled down.
42
PE1B
Channel 1B Output Preemphasis Logic Input. PE1B is internally pulled down.
—
EP
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Exposed Pad. Internally connected to GND. EP must be electrically connected to a ground plane for
proper thermal and electrical operation. Do not use EP as the sole ground connection.
Maxim Integrated │ 7
MAX14980
Ruggedized Quad SAS/SATA Redriver/Equalizer
with Extended Operating Temperature
Functional Diagram
PE1B EQ1B PE0B EQ0B
MODEB
VCC
CONTROL LOGIC
VCC
50Ω
ENB
VCC
50Ω
50Ω
50Ω
IN1BP
OUT1BP
IN1BM
OUT1BM
VCC
50Ω
VCC
50Ω
50Ω
50Ω
OUT0BP
IN0BP
OUT0BM
IN0BM
MAX14980
VCC
50Ω
VCC
50Ω
50Ω
50Ω
IN0AP
OUT0AP
IN0AM
OUT0AM
VCC
50Ω
VCC
50Ω
50Ω
OUT1AP
IN1AP
OUT1AM
IN1AM
ENA
CONTROL LOGIC
EQ0A PE0A EQ1A PE1A
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50Ω
MODEA
GND
Maxim Integrated │ 8
MAX14980
Ruggedized Quad SAS/SATA Redriver/Equalizer
with Extended Operating Temperature
Typical Application Circuit
MIDPLANE
SAS/SATA
HDD
MAINBOARD
SAS
CONTROLLER
SAS/SATA
HDD
MAX14980
18in SAS
CABLES
20in BOARD
TRACES
CONNECTORS
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8in BOARD
TRACES
Maxim Integrated │ 9
MAX14980
Ruggedized Quad SAS/SATA Redriver/Equalizer
with Extended Operating Temperature
Detailed Description
The MAX14980 consists of four identical redrivers with
input equalization and output preemphasis useful for SAS
or SATA signals up to 6.0GT/s.
Input/Output Terminations
Inputs and outputs are internally 50Ω terminated to VCC
(see the Functional Diagram) and must be AC-coupled
using 12nF (max) capacitors to the SAS/SATA controller
IC and SAS/SATA device for proper operation.
Enable Inputs (ENA, ENB)
The MAX14980 features two active-high enable inputs
(ENA, ENB). ENA and ENB have internal pulldown resistors of 70kΩ (typ). When ENA or ENB is driven low or
left unconnected, the A or B channels enter low-power
standby mode and the redrivers are disabled.
Drive ENA or ENB high to place channel A or B in normal
operation (see Table 1).
Out-of-Band Threshold Selector
(MODEA, MODEB)
The MAX14980 provides full OOB signal support through
high-speed amplitude detection circuitry. OOB differential input signals less than the internal OOB threshold
(VSQ-DIFF) are detected as off and not passed to the
output. This prevents the system from responding to
unwanted noise. OOB differential input signals higher
than VSQ-DIFF are detected as on and passed to the
output, allowing OOB signals to transmit through the
MAX14980. The logic level of the MODE inputs sets
VSQ-DIFF for either SAS or SATA OOB signals (see Table
2). MODEA and MODEB have internal pulldown resistors
of 70kΩ (typ).
Table 1. Enable Inputs (ENA, ENB)
ENA
ENB
CHANNEL 1A
CHANNEL 0A
CHANNEL 1B
CHANNEL 0B
0
0
STANDBY
STANDBY
STANDBY
STANDBY
0
1
STANDBY
STANDBY
ENABLED
ENABLED
1
0
ENABLED
ENABLED
STANDBY
STANDBY
1
1
ENABLED
ENABLED
ENABLED
ENABLED
CHANNEL 1B
CHANNEL 0B
Table 2. Out-of-Band Logic Threshold (MODEA, MODEB)
MODEA
MODEB
CHANNEL 1A
CHANNEL 0A
0
0
SAS
SAS
SAS
SAS
0
1
SAS
SAS
SATA
SATA
1
0
SATA
SATA
SAS
SAS
1
1
SATA
SATA
SATA
SATA
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Maxim Integrated │ 10
MAX14980
Ruggedized Quad SAS/SATA Redriver/Equalizer
with Extended Operating Temperature
Input Equalization (EQ0A, EQ1A, EQ0B, EQ1B)
The MAX14980 features control logic inputs (EQ0A,
EQ1A, EQ0B, EQ1B) to enable input equalization on
each channel, providing 3dB of boost (see Note 4 in
the Electrical Characteristics table). Drive EQ_ high to
enable input equalization. Drive EQ_ low to disable input
equalization (see Table 3). EQ0A, EQ1A, EQ0B, and
EQ1B have internal pulldown resistors of 70kΩ (typ).
Output Preemphasis (PE0A, PE1A, PE0B, PE1B)
The MAX14980 features control logic inputs (PE0A,
PE1A, PE0B, PE1B) to enable output preemphasis on
either channel, providing 3dB of boost. The MAX14980
true preemphasis, the transition signal, is increased after
a changing bit, thus increasing the total energy content
of the signal when employed. Drive PE_ high to enable
output preemphasis. Drive PE_ low to disable output preemphasis (see Table 4). PE0A, PE1A, PE0B, and PE1B
have internal pulldown resistors of 70kΩ (typ).
Table 3. Input Equalization (EQ0_, EQ1_)
EQ1_
EQ0_
CHANNEL 1_
(dB)
CHANNEL 0_
(dB)
0
0
0
0
0
1
0
3 (typ)
1
0
3 (typ)
0
1
1
3 (typ)
3 (typ)
Table 4. Output Preemphasis (PE0_, PE1_)
PE1_
PE0_
CHANNEL 1_
(dB)
0
0
0
0
0
1
0
3 (typ)
1
0
3 (typ)
0
1
1
3 (typ)
3 (typ)
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CHANNEL 0_
(dB)
Applications Information
Exposed Pad Package
The exposed pad, 42-pin TQFN package incorporates
features that provide a very low thermal resistance path
for heat removal from the IC. The exposed pad on the
MAX14980 must be soldered to GND for proper thermal
and electrical performance. For more information on
exposed paddle packages, refer to Maxim Application
Note HFAN-08.1: Thermal Considerations of QFN and
Other Exposed-Paddle Packages.
Layout
Use controlled-impedance transmission lines to interface
with high-speed inputs and outputs of the MAX14980.
Place 2.2µF and 0.01µF power-supply bypass capacitors
as close as possible to VCC, recommended on each VCC
pin.
Power-Supply Sequencing
Caution: Do not exceed the absolute maximum ratings because stresses beyond the listed ratings can
cause permanent damage to the device.
Proper power-supply sequencing is recommended for all
devices. Always apply VCC before applying signals, especially if the signal is not current limited.
Ordering Information
PART
PIN-PACKAGE
TEMP RANGE
MAX14980ETO+
42 TQFN-EP*
-40°C to +85°C
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
42 TQFN-EP
T423590M+1
21-0181
90-0079
Maxim Integrated │ 11
MAX14980
Ruggedized Quad SAS/SATA Redriver/Equalizer
with Extended Operating Temperature
Revision History
REVISION
NUMBER
REVISION
DATE
0
3/13
DESCRIPTION
Initial release
PAGES
CHANGED
—
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2013 Maxim Integrated Products, Inc. │ 12
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Maxim Integrated:
MAX14980ETO+ MAX14980ETO+T
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