LED LCD TV SERVICE MANUAL


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LED LCD TV SERVICE MANUAL | Manualzz

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LED LCD TV

SERVICE MANUAL

CHASSIS : LD03R

MODEL: 42LX6500/650N

42X6500/650N-ZD

MODEL:

42LX6800/6900

42X6800/6900-ZD

CAUTION

BEFORE SERVICING THE CHASSIS,

READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL63748401 (1006-REV01)

P OK MENU INPUT

Printed in Korea

CONTENTS

CONTENTS .............................................................................................. 2

PRODUCT SAFETY ................................................................................. 3

SPECIFICATION ....................................................................................... 4

ADJUSTMENT INSTRUCTION ................................................................ 8

BLOCK DIAGRAM.................................................................................. 17

EXPLODED VIEW .................................................................................. 19

SCHEMATIC CIRCUIT DIAGRAM ..............................................................

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 2 LGE Internal Use Only

SAFETY PRECAUTIONS

IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the

Schematic Diagram and Exploded View.

It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent

Shock, Fire, or other Hazards.

Do not modify the original design without permission of manufacturer.

General Guidance

An

isolation Transformer should always be used

during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks.

It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation.

If any fuse (or Fusible Resistor) in this TV receiver is blown, replace it with the specified.

When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1 W), keep the resistor 10 mm away from PCB.

Keep wires away from high voltage or high temperature parts.

Before returning the receiver to the customer,

always perform an

AC leakage current check

on the exposed metallic parts of the cabinet, such as antennas, terminals, etc., to be sure the set is safe to operate without damage of electrical shock.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc.

If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1 MΩ and 5.2 MΩ.

When the exposed metal has no return path to the chassis the reading must be infinite.

An other abnormality exists that must be corrected before the receiver is returned to the customer.

Leakage Current Hot Check

(See below Figure)

Plug the AC cord directly into the AC outlet.

Do not use a line Isolation Transformer during this check.

Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts.

Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity.

Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to

0.5 mA.

In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.

Leakage Current Hot Check circuit

To Instrument's exposed

METALLIC PARTS

AC Volt-meter

0.15 uF

1.5 Kohm/10W

Good Earth Ground such as WATER PIPE,

CONDUIT etc.

When 25A is impressed between Earth and 2nd Ground for 1 second, Resistance must be less than 0.1

*Base on Adjustment standard

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 3 LGE Internal Use Only

SPECIFICATION

NOTE : Specifications and others are subject to change without notice for improvement.

1. Application range

This specification is applied to the LCD TV used LD03R chassis.

2. Requirement for Test

Each part is tested as below without special appointment.

1) Temperature: 25 ºC ± 5 ºC(77 ºF ± 9 ºF), CST: 40 ºC ± 5 ºC

2) Relative Humidity : 65 % ± 10 %

3) Power Voltage

: Standard input voltage (AC 100-240 V~ 50 / 60 Hz)

* Standard Voltage of each products is marked by models.

4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with BOM.

5) The receiver must be operated for about 5 minutes prior to the adjustment.

3. Test method

1) Performance: LGE TV test method followed

2) Demanded other specification

- Safety : CE, IEC specification

- EMC :CE, IEC

4. Module General Specification

No.

Item Specification

1 Display Screen Device 107 cm(42 inch) wide color display module

2 Aspect Ratio

3 LCD Module

16:9

107 cm(42 inch) TFT LCD FHD 240 Hz(Edge)

4 Operating Environment Temp. : 0 deg ~ 50 deg

Humidity : 20 % ~ 90 %

5 Storage Environment Temp. : -20 deg ~ 60 deg

Humidity : 10 ~ 90 %

6 Input Voltage

7 Power Consumption

AC 100-240V~, 50 / 60Hz

Power on (White)

LGD Typ : 112.2(Edge)

973.2 (H) x 566.2 (V) x 10.8 mm(D) 8 Module Size

8 Pixel Pitch

9 Back Light

10 Display Colors

11 Coating

0.4845 (H) x 0.4845 (V)

LED(EDGE)

1.06 B(true) colors

3H

Remark

LCD (Module) + Backlight(EDGE LED)

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 4 LGE Internal Use Only

5. Module optical specification

No.

1.

Viewing Angle [CR>10] Right/Left/Up/Down

2.

Luminance 2D 2 ) 360 450

Variation 1.3

3.

Contrast Ratio

4.

3D Cross talk

3D Luminance (cd/m 2 )

CR

%

89

48

1000

Typ.

61

1300

Max.

18

5.

CIE Color Coordinates White Wx

14

0.279

Wy 0.292

RED Xr

Yr

Green Xg

Yg

Typ.

-0.03

Blue Xb

Yb

0.642

0.335

0.308

0.602

0.156

0.061

Typ.

+0.03

1) Standard Test Condition(The unit has been ‘ON’).

2) Stable for approximately 60 minutes in a dark environment at 25 ºC.

3) The values specified are at approximate distance 50 cm from the LCD surface.

CR > 10

Remark

6. Component Video Input (Y, C

B

/P

B

, C

R

/P

R

)

No.

1.

2.

3.

4.

5.

6.

7.

8.

9.

Resolution

Specification

H-freq(kHz)

720x480 15.73

V-freq(Hz)

60.00

720x480 15.63

720x480

720x480

720x576

720x576 31.25

1280x720

1280x720

31.47

31.50

15.625

45.00

44.96

1280x720 45.00

10.

1920x1080 31.25

59.94

59.94 480p

60.00 480p

50.00

50.00

60.00

50.00

SDTV,DVD 625 Line

11.

1920x1080 33.75

12.

1920x1080 33.72

13.

1920x1080 56.250

14.

1920x1080

59.94

50

Remark

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 5 LGE Internal Use Only

3.

4.

5.

6.

7.

8.

7. RGB (PC)

No.

1.

2.

Resolution

720*400

640*480

Specification

H-freq(kHz)

31.468

31.469

V-freq(Hz)

70.08

59.94

800*600 37.879

60.31

1024*768 48.363 60.00

1280*768 47.78 59.87

1360*768 47.72

59.8

1280*1024 63.595 60.0

1920*1080 66.587

59.93

Proposed Remarks

Pixel Clock(MHz)

28.321

25.17 VESA

For only DOS mode

Input 848*480 60 Hz, 852*480 60 Hz

-> 640*480 60 Hz Display

40.00 VESA

65.00 VESA(XGA)

79.5

84.75

108.875

WXGA

WXGA

SXGA

138.625 WUXGA

8. HDMI Input

(1) DTV Mode

3.

4.

5.

6.

No.

1.

2.

7.

8.

Resolution

720*480

1280*720

1920*1080

44.96 /45

33.72 /33.75

59.94 /60

59.94 /60

1920*1080 28.125 50.00

1920*1080

1920*1080

H-freq(kHz)

31.469 /31.5

26.97 /27

33.716 /33.75

V-freq.(Hz)

59.94 /60

23.97 /24

9.

1920*1080 56.250 50

10.

1920*1080 67.43 /67.5 59.94 /60

Pixel clock(MHz)

27.00/27.03

54

74.25 HDTV

74.17/74.25

74.17/74.25

HDTV 720P

HDTV 1080I

74.25 HDTV

74.17/74.25

29.976 /30.00

74.25

148.5

148.35/148.50

Proposed

SDTV 480P

HDTV 1080P

HDTV 1080P

HDTV 1080P

Remark

(2) PC Mode

No.

1.

2.

3. 800*600

4.

5.

6.

Resolution

1024*768

H-freq(kHz)

37.879

48.363

1280*768 47.78

V-freq.(Hz)

60.31

59.87

Pixel clock(MHz)

40.00

79.5

1360*768 47.72 59.8 84.75

Proposed

VESA

60.00 65.00 VESA(XGA)

HDCP

VESA HDCP

HDCP

HDCP

WXGA HDCP

WXGA HDCP

7.

8.

1280*1024 63.595

1920*1080 67.5

60.0 108.875 SXGA

60.00

138.625 WUXGA

Remark

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 6 LGE Internal Use Only

9. 3D Mode - HDMI & USB

(1) HDMI Input (1.4)

6

7

4

5

No.

1

2

3

8

9

10

11

Resolution

1920*1080

1280*720

1280*720

1920*1080

1920*1080

1280*720

1280*720

1920*1080

1920*1080

1920*1080

1920*1080

H-freq(kHz)

53.95 / 54

89.9 / 90

75

67.5

56.3

45

37.5

33.7

28.1

27

33.7

60

50

24

30

60

50

60

50

V-freq.(Hz) Pixel clock(MHz)

23.98 / 24 148.35/148.5

59.94/60

50

148.35/148.5

148.5

148.5

148.5

74.25

74.25

74.25

74.25

74.25

89.1

Proposed 3D input proposed mode

HDTV 1080P Frame packing

HDTV 720P

HDTV 720P

Frame packing

Frame packing

HDTV 1080P Side by Side(half), Top and bottom

HDTV 1080P Side by Side(half), Top and bottom

HDTV 720P

HDTV 720P

Side by Side(half), Top and Bottom

Side by Side(half), Top and Bottom

HDTV 1080i

HDTV 1080i

Side by Side(half), Top and Bottom

Side by Side(half), Top and Bottom

HDTV 1080P Side by Side(half), Top and Bottom

HDTV 1080P Side by Side(half), Top and Bottom

(2) HDMI Input (1.3)

No.

1

2

3

4

5

Resolution

1280*720

1280*720

1920*1080

1920*1080

1920*1080

H-freq(kHz) V-freq.(Hz)

45.00

60.00

37.500

33.75

50

60.00

28.125

27.00

50.00

24.00

6

7

8

1920*1080

1920*1080

1920*1080

33.75

67.50

56.250

30.00

60.00

50

Pixel clock(MHz)

74.25

74.25

74.25

74.25

74.25

74.25

148.5

148.5

Proposed

HDTV 720P

HDTV 720P

HDTV 1080I

3D input proposed mode

Side by Side, Top & Bottom

Side by Side, Top & Bottom

Side by Side, Top & Bottom

HDTV 1080I Side by Side, Top & Bottom

HDTV 1080P Side by Side, Top & Bottom,

Checkerboard

HDTV 1080P Side by Side, Top & Bottom,

Checkerboard

HDTV 1080P Side by Side, Top & Bottom,

Checkerboard, Single Frame Sequential

HDTV 1080P Side by Side, Top & Bottom,

Checkerboard, Single Frame Sequential

(3) USB Input

No.

1.

Resolution

1920*1080

H-freq(kHz)

33.75

V-freq.(Hz)

30.000

Pixel clock(MHz) 3D input proposed mode

74.25

Side by Side

Top & Bottom

Checkerboard

Remark

HDTV 1080P

(4) 3D Input mode

No.

1.

Side by Side

L R

Top & Bottom Checkerboard Single Frame Sequential

L

Frame Packing

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 7 LGE Internal Use Only

ADJUSTMENT INSTRUCTION

1. Application Range

This specification sheet is applied to all of the LCD TV with

LD03R chassis.

(3) Adjustment

1) Adjustment method

- Using RS-232, adjust items listed in 3.1 in the other shown in “3.1.(3).3)”

2. Designation

(1) Because this is not a hot chassis, it is not necessary to use an isolation transformer. However, the use of isolation transformer will help protect test instrument.

(2) Adjustment must be done in the correct order.

(3) The adjustment must be performed in the circumstance of

25 ºC ± 5 ºC of temperature and 65 % ± 10 % of relative humidity if there is no specific designation.

(4) The input voltage of the receiver must keep AC 100-240

V~ 50 / 60Hz.

(5) The receiver must be operated for about 5 minutes prior to the adjustment when module is in the circumstance of over

15.

In case of keeping module is in the circumstance of 0 °C, it should be placed in the circumstance of above 15 °C for 2 hours

In case of keeping module is in the circumstance of below -

20 °C, it should be placed in the circumstance of above 15

°C for 3 hours.

[Caution]

When still image is displayed for a period of 20 minutes or longer (especially where W/B scale is strong. Digital pattern

13ch and/or Cross hatch pattern 09ch), there can some afterimage in the black level area.

3. Automatic Adjustment

3.1. ADC Adjustment

(1) Overview

ADC adjustment is needed to find the optimum black level and gain in Analog-to-Digital device and to compensate

RGB deviation.

(2) Equipment & Condition

1) Jig (RS-232C protocol)

2) MSPG-925 Series Pattern Generator(MSPG-925FA, pattern - 65)

- Resolution : 480i Comp1

1080P Comp1

1920*1080 RGB

- Pattern : Horizontal 100% Color Bar Pattern

- Pattern level : 0.7±0.1 Vp-p

- Image

2) Adj. protocol

Protocol Command

Enter adj. mode aa 00 00 a 00 OK00x

Set ACK

Source change xb 00 40 b 00 OK40x (Adjust 480i, 1080p Comp1 ) xb 00 60 b 00 OK60x (Adjust 1920*1080 RGB)

Begin adj.

Return adj. result

Read adj. data ad 00 10

OKx (Case of Success)

NGx (Case of Fail)

(main) (main) ad 00 20 000000000000000000000000007c007b006dx

Confirm adj.

End adj.

(sub) (Sub) ad 00 21 000000070000000000000000007c00830077x ad 00 99 NG 03 00x (Fail)

NG 03 01x (Fail)

NG 03 02x (Fail)

OK 03 03x (Success) aa 00 90 a 00 OK90x

Ref.) ADC Adj. RS232C Protocol_Ver1.0

3) Adj. order

- aa 00 00 [Enter ADC adj. mode]

- xb 00 04 [Change input source to Component1(480i&1080p)]

- ad 00 10 [Adjust 480i Comp1]

- xb 00 06 [Change input source to RGB(1024*768)]

- ad 00 10 [Adjust 1024*768 RGB]

- ad 00 90 End adj.

3.2. MAC Address

(1) Equipment & Condition

- Play file: Serial.exe

- MAC Address edit

- Input Start / End MAC address

(2) Download method

1) Communication Prot connection

PCBA

PC(RS-232C)

RS-232C Po rt

Connect: PCBA Jig-> RS-232C Port== PC-> RS-232C Port

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 8 LGE Internal Use Only

2) MAC Address Download

- Com 1,2,3,4 and 115200(Baud rate)

- Port connection button click(1)

- Load button click(2) for MAC Address write.

- Start MAC Address write button(3)

- Check the OK Or NG

3.3. LAN

(1) Equipment & Condition

A

Each other connection to LAN Port of IP Hub and Jig

3.4. LAN PORT INSPECTION(PING TEST)

Connect SET -> LAN port == PC -> LAN Port

SET PC

(1) Equipment setting

1) Play the LAN Port Test PROGRAM.

2) Input IP set up for an inspection to Test

Program.

*IP Number : 12.12.2.2

(2) LAN PORT inspection (PING TEST)

1) Play the LAN Port Test Program.

2) Connect each other LAN Port Jack.

3) Play Test (F9) button and confirm OK Message.

4) Remove LAN CABLE

(2) LAN inspection solution

A

LAN Port connection with PCB

A

A

A

Network setting at MENU Mode of TV setting automatic IP

Setting state confirmation

-> If automatic setting is finished, you confirm IP and

MAC Address.

3.5. V-COM Adjust(Only LGD(M+S) Module)

- Why need Vcom adjustment?

A The Vcom (Common Voltage) is a Reference Voltage of

Liquid Crystal Driving.

-> Liquid Crystal need for Polarity Change with every frame.

T

E

M

S

Y

S

Data (R ,G,B ) &

Con t rol si gnal

Ti m i n g

Co nt r o ll e r

Po w e r

Blo ck

Circuit Block

Da ta (R ,G,B ) & C ont ro l s ignal

Con t rol si gnal

Ga mma

Re f e r e nce V o ltage

Gamm a R eference

Volta ge

So urce D r i v e I C

Column Line

V

COM

C

LC

C

ST

Pane l

Liquid

Crys tal

V

COM Row Li ne

TFT

V

COM

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 9 LGE Internal Use Only

- Adjust sequence

A

Press the PIP key of the ADJ remote control. (This PIP key is hot key to enter the VCOM adjusting mode)

(Or After enter Service Mode by pushing “ADJ” key, then

Enter V-Com Adjust mode by pushing “

G

” key at “10. V-

Com”)

A

As pushing the right or the left button on the remote control, And find the V-COM value Which is no or minimized the Flicker.

(If there is no flicker at default value, Press the exit key and finish the VCOM adjustment.)

A

Push the OK key to store value. Then the message

A

“Saving OK” is pop.

Press the exit key to finish VCOM adjustment.

3.7. CI+ Key Download method

(1) Download Procedure

1) Press "Power on" button of a service R/C.(Baud rate :

115200 bps)

2) Connect RS232-C Signal Cable.

3) Write CI+ Key through RS-232-C.

4) Check whether the key was downloaded or not at ‘In

Start’ menu. (Refer to below).

A

A

A

A

[Visual Adjust and control the Voltage level]

3.6. Model name & serial number download

(1) Model name & Serial number D/L

Press “Power on” key of service remote control.(Baud rate : 115200 bps)

Connect RS232 Signal Cable to RS-232 Jack.

Write Serial number by use RS-232.

Must check the serial number at Instart menu.

(2) Method & notice

A. Serial number D/L is using of scan equipment.

B. Setting of scan equipment operated by Manufacturing

Technology Group.

C.Serial number D/L must be conformed when it is produced in production line, because serial number D/L is mandatory by D-book 4.0

* Manual Download (Model Name and Serial Number)

If the TV set is downloaded by OTA or service man, sometimes model name or serial number is initialized.(Not always)

There is impossible to download by bar code scan, so It need Manual download.

a. Press the ‘instart’ key of ADJ remote control.

b. Go to the menu ‘5.Model Number D/L’ like below photo.

c. Input the Factory model name(ex 42LD450-ZA) or Serial number like photo.

d. Check the model name Instart menu -> Factory name displayed (ex 42LE7500-ZA) e. Check the Diagnostics (DTV country only) -> Buyer model displayed (ex 42LE7500-ZA)

=> Check the Download to CI+ Key value in LGset.

1. check the method of CI+ Key value a. check the method on Instart menu b. check the method of RS232C Command

1) into the main ass’y mode (RS232 : aa 00 00)

CMD 1 CMD 2

A A 0

Data 0

0

2) check the key download for transmitted command

(RS232 : ci 00 10)

CMD 1 CMD 2

C I 1

Data 0

0

3) result value

- normally status for download : OKx

- abnormally status for download : NGx

2. Check the method of CI+ Key value (RS232)

1) into the main ass’y mode (RS232 : aa 00 00)

CMD 1 CMD 2

A A 0

Data 0

0

2) Check the method of CI+ key by command (RS232 : ci 00 20)

CMD 1 CMD 2

C I 2

Data 0

0

3) Result value i 01 OK 1d1852d21c1ed5dcx

CI+ key Value

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 10 LGE Internal Use Only

4. Manual Adjustment

4.1. ADC(GP2) Adjustment

4.1.1. Overview

ADC adjustment is needed to find the optimum black level and gain in Analog-to-Digital device and to compensate RGB deviation.

4.1.2. Equipment & Condition

(1) Adjust Remote control

(2) 801GF(802B, 802F, 802R) or MSPG925FA Pattern

Generator

- Resolution :

480i, 720*480 (MSPG-925FA -> Model: 209, Pattern: 65)

- 480i

1080p, 1920*1080 (MSPG-925FA -> Model: 225, Pattern:

65) - 1080p

- Pattern : Horizontal 100% Color Bar Pattern

- Pattern level: 0.7 ± 0.1 Vp-p

- Image

4.2. EDID(The Extended Display Identification

Data)/DDC(Display Data Channel) download

(1) Overview

It is a VESA regulation. A PC or a MNT will display an optimal resolution through information sharing without any necessity of user input. It is a realization of “Plug and Play”.

(2) Equipment

- Adjust remote control

- Since embedded EDID data is used, EDID download JIG,

HDMI cable and D-sub cable are not need.

(3)Download method

1) Press Adj. key on the Adj. R/C, then select “10.EDID

D/L”, By pressing Enter key, enter EDID D/L menu.

2) Select [Start] button by pressing Enter key, HDMI1 /

HDMI2 / HDMI3 / HDMI4 / RGB are Writing and display

OK or NG.

For Analog EDID

D-sub to D-sub

For HDMI EDID

DVI-D to HDMI or HDMI to HDMI

(3) Must use standard cable

4.1.3. Adjust method

(1) ADC 480i, 1080p Comp1

1) Check connected condition of Comp1 cable to the equipment

2) Give a 480i, 1080p Mode, Horizontal 100% Color Bar

Pattern to Comp1.

(MSPG-925FA -> Model: 209, Pattern: 65) - 480i

(MSPG-925FA -> Model: 225, Pattern: 65) - 1080p

3) Change input mode as Component1 and picture mode as “Standard”

4) Press the In-start Key on the ADJ remote after at least 1 min of signal reception. Then, select 7. External ADC ->

1. COMP 1080p on the menu. Press enter key. The adjustment will start automatically.

5) If ADC calibration is successful, “ADC RGB Success” is displayed.

If ADC calibration is failure, “ADC RGB Fail” is displayed.

6) If ADC calibration is failure, after recheck ADC pattern or condition retry calibration Error message refer to 5).

(4) EDID DATA

A HDMI

0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F

0x00 00 FF FF FF FF FF FF 00 1E 6D ⓐ ⓑ

0x01 ⓒ

01 03 80 10 09 78 0A EE 91 A3 54 4C 99 26

0x02 0F 50 54 A1 08 00 71 4F 81 80 01 01 01 01 01 01

0x03 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C

0x04 45 00 A0 5A 00 00 00 1E 01 1D 00 72 51 D0 1E 20

0x05 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A

0x06 3E 1E 53 10 00 0A 20 20 20 20 20 20 ⓓ

0x07 ⓓ

01 ⓔ

1

0x00 02 03 37 F1 4E 10 1F 84 13 05 14 03 02 12 20 21

0x01 22 15 01 26 15 07 50 09 57 07 ⓕ

0x02 ⓕ

0x03 ⓕ

E3 05 03 01 01 1D 80 18 71 1C 16 20 58

0x04 2C 25 00 A0 5A 00 00 00 9E 01 1D 00 80 51 D0 1A

0x05 20 6E 88 55 00 A0 5A 00 00 00 1A 02 3A 80 18 71

0x06 38 2D 40 58 2C 45 00 A0 5A 00 00 00 1E 00 00 00

0x07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ⓔ

2

(2) ADC 1920*1080 RGB

1) Check connected condition of Component & RGB cable to the equipment

2) Give a 1920*1080 Mode, 100 % Horizontal Color Bar

Pattern to RGB port.

(MSPG-925 Series -> model: 225 , pattern: 65 )

3) Change input mode as RGB and picture mode as “Standard”.

4) Press the In-start Key on the ADJ remote after at least 1 min of signal reception. Then, select 7. External ADC ->

1. COMP 1080p on the menu. Press enter key. The adjustment will start automatically.

5) If ADC calibration is successful, “ADC RGB Success” is displayed.

If ADC calibration is failure, “ADC RGB Fail” is displayed.

6) If ADC calibration is failure, after recheck ADC pattern or condition retry calibration Error message refer to 5).

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 11 -

A

RGB

0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F

0x00 00 FF FF FF FF FF FF 00 1E 6D ⓐ ⓑ

0x01 ⓒ

01 03 68 10 09 78 0A EE 91 A3 54 4C 99 26

0x02 0F 50 54 A1 08 00 81 80 61 40 45 40 31 40 01 01

0x03 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C

0x04 45 00 A0 5A 00 00 00 1E 01 1D 00 72 51 D0 1E 20

0x05 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A

0x06 3E 1E 53 10 00 0A 20 20 20 20 20 20 ⓓ

0x07 ⓓ

00 ⓔ

3

A Reference

- HDMI1 ~ HDMI4 / RGB

- In the data of EDID, bellows may be different by S/W or

Input mode.

LGE Internal Use Only

Product ID

Model Name HEX

ALL 0001

0001

EDID Table DDC Function

0100 Analog

0100 Digital ⓑ

Serial No. : Controlled on product line ⓒ Month, Year: Controlled on production line: ex) Monthly : ‘01’ -> ‘01’

Year : ‘2010’ -> ‘14’ ⓓ

Model Name(Hex):

MODEL all

MODEL NAME(HEX)

00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20

INPUT

HDMI1

HDMI2

HDMI3

HDMI4

HDMI5 ⓔ Checksum: Changeable by total EDID data.

1

D7

D7

D7

D7

X

2

CB

BB

AB

9B

X

X

X

3

X

X

1D ⓕ Vendor Specific(HDMI)

INPUT MODEL NAME(HEX)

HDMI1 78 03 0C 00 10 00 B8 2D 20 C0 0E 01 40 0A 3C 08 10 18 10 98 10 58 10 38 10

HDMI2 78 03 0C 00 20 00 B8 2D 20 C0 0E 01 40 0A 3C 08 10 18 10 98 10 58 10 38 10

HDMI3 78 03 0C 00 30 00 B8 2D 20 C0 0E 01 40 0A 3C 08 10 18 10 98 10 58 10 38 10

HDMI4 78 03 0C 00 40 00 B8 2D 20 C0 0E 01 40 0A 3C 08 10 18 10 98 10 58 10 38 10

HDMI5 78 03 0C 00 50 00 B8 2D 20 C0 0E 01 40 0A 3C 08 10 18 10 98 10 58 10 38 10

4.3. White Balance Adjustment

4.3.1 Overview

(1) W/B adj. Objective & How-it-works

(2) Objective: To reduce each Panel’s W/B deviation

(3) How-it-works : When R/G/B gain in the OSD is at 192, it means the panel is at its Full Dynamic Range. In order to prevent saturation of Full Dynamic range and data, one of

R/G/B is fixed at 192, and the other two is lowered to find the desired value.

(4) Adj. condition : normal temperature

1) Surrounding Temperature : 25 ºC ± 5 ºC

2) Warm-up time: About 5 Min

3) Surrounding Humidity : 20 % ~ 80 %

4.3.2 Equipment

1) Color Analyzer: CA-210 (LED Module : CH 14)

2) Adj. Computer(During auto adj., RS-232C protocol is needed)

3) Adjust Remote control

4) Video Signal Generator MSPG-925F 720p/216-Gray

(Model:217, Pattern:78)

-> Only when internal pattern is not available

A

Color Analyzer Matrix should be calibrated using CS-1000

4.3.3. Equipment connection MAP

Probe

Co lo r An alyzer

RS -232C

Co m p ut er

RS -232C

RS -232C

Pat t ern Gen erat o r

Signal Source

* If TV internal pattern is used, not needed

4.3.4. Adj. Command (Protocol)

<Command Format>

LEN CMD VAL

- LEN: Number of Data Byte to be sent

- CMD: Command

- VAL: FOS Data value

- CS: Checksum of sent data

- A: Acknowledge

Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]

CS

A RS-232C Command used during auto-adj.

RS-232C COMMAND Explanation wb wb wb

[CMD ID wb 00 wb wb

00

00

00

00

00

20

2f ff

DATA]

00

10

1f

Begin White Balance adj.

Gain adj.(internal white pattern)

Gain adj. completed

Offset adj.(internal white pattern)

Offset adj. completed

End White Balance adj.(Internal pattern disappears)

Ex) wb 00 00 -> Begin white balance auto-adj.

wb 00 10 -> Gain adj.

ja 00 ff -> Adj. data jb 00 c0

...

...

wb 00 1f -> Gain adj. completed

*(wb 00 20(Start), wb 00 2f(completed)) -> Off-set adj.

wb 00 ff -> End white balance auto-adj.

A

Adj. Map

ITEM

Cool R-Gain

G-Gain

B-Gain

R-Cut

G-Cut

B-Cut

Medium R-Gain

G-Gain

Warm

B-Gain

R-Cut

G-Cut

B-Cut

R-Gain

G-Gain

B-Gain

R-Cut

G-Cut

Command

Cmd 1 Cmd 2 j j j g h i

Data Range(Hex.) Default(Decimal)

Min Max

00

00

00

C0

C0

C0 j j j j j j a b c d e f

00

00

00

00

00

00

C0

C0

C0

C0

C0

C0

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 12 LGE Internal Use Only

4.3.5. Adj. method

(1) Auto adj. method

1) Set TV in adj. mode using POWER ON key.

2) Zero calibrate probe then place it on the center of the

Display.

3) Connect Cable (RS-232C)

4) Select mode in adj. Program and begin adjustment.

5) When adj. is complete (OK Sing), check adj. status pre mode. (Warm, Medium, Cool)

6) Remove probe and RS-232C cable to complete adj.

A

W/B Adj. must begin as start command “wb 00 00” , and finish as end command “wb 00 ff”, and Adj. offset if need.

(2) Manual adj. method

1) Set TV in Adj. mode using POWER ON

2) Zero Calibrate the probe of Color Analyzer, then place it on the center of LCD module within 10cm of the surface.

3) Press ADJ key -> EZ adjust using adj. R/C -> 7. White-

Balance then press the cursor to the right (KEY

G

).

(When KEY( G ) is pressed 216 Gray internal pattern will be displayed)

4) One of R Gain / G Gain / B Gain should be fixed at 192, and the rest will be lowered to meet the desired value.

5) Adj. is performed in COOL, MEDIUM, WARM 3 modes of color temperature.

A

If internal pattern is not available, use RF input. In EZ

Adj. menu 7.White Balance, you can select one of 2

Test-pattern: ON, OFF. Default is inner(ON). By selecting OFF, you can adjust using RF signal in 216

Gray pattern.

A Adj. condition and cautionary items

1) Lighting condition in surrounding area

Surrounding lighting should be lower 10 lux. Try to isolate adj. area into dark surrounding.

2) Probe location

: Color Analyzer (CA-210) probe should be within

10cm and perpendicular of the module surface (80°~

100°)

3) Aging time

- After Aging Start, Keep the Power ON status during

5 Minutes.

- In case of LCD, Back-light on should be checked using no signal or Full-white pattern.

4.3.6. Reference (White Balance Adj. coordinate and temperature)

A

A

Luminance : 216 Gray

Standard color coordinate and temperature using CS-1000

(over 26 inch)

Mode Temp ∆UV

COOL

MEDIUM

WARM

Color Coordination x y

0.269

0.273

0.285

0.313

0.293

0.329

13000 K

9300 K

6500 K

0.0000

0.0000

0.0000

A

Standard color coordinate and temperature using CA-

210(CH 9)

Mode Color Coordination Temp ∆UV

COOL x

0.269 ± 0.002

y

0.273 ± 0.002 13000 K 0.0000

MEDIUM 0.285 ± 0.002

0.293 ± 0.002

9300 K 0.0000

WARM 0.313 ± 0.002

0.329 ± 0.002

6500 K 0.0000

7

8

5

6

3

4

1

2

4.3.7. IOP & Edge LED White balance table

A

IOP & Edge LED module change color coordinate because

A of aging time.

apply under the color coordinate table, for compensated aging time.

- EDGE LED(LX65)

GP2 Aging Time

(Min.)

0-2

3-5

6-9

10-15

20-35

36-49

50-79

Over 80

273

270

269

269

X

269

Cool

Y

273

280

278

276

274

291

288

285

282

279

276

273

273

294

292

290

289

Medium

X Y

285

296

293

311

308

305

302

299

287

286

285

296

293

293

312

310

308

308

Warm

X

313

Y

329

319

317

315

313

340

338

335

332

329

326

323

323

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 13 LGE Internal Use Only

4.4. Wireless function check

Step 1) Connect set and Dongle of Wireless to Cable of HDMI

& TTA 20Pin

Step 2) At OSD of SET, check the message like Fig.3

Step 3) Detach Cable of Wireless Dongle

4.6. Local Dimming Function Check

Step 1) Turn on TV.

Step 2) At the Local Dimming mode, module Edge Backlight moving right to left Back light of IOP module moving.

Step 3) Confirm the Local Dimming mode.

Step 4) Press “exit” key

Connect

Fi g . 1

< Do ng le>

Fi g . 2

< Wireles s Read y Set >

Local Dimming Demo (Edge LED Model)

Fig . 3 Connect the Dongle

( Do ng le Co n n ec t io n Di s p lay)

4.5. EYE-Q function check

Step 1) Turn on TV

Step 2) Press EYE key of Adj. R/C

Step 3) Cover the Eye Q II sensor on the front of the using your hand and wait for 6 seconds

Step 4) Confirm that R/G/B value is lower than 10 of the “Raw

Data (Sensor data, Back light)”. If after 6 seconds,

R/G/B value is not lower than 10, replace Eye Q II sensor.

Step 5) Remove your hand from the Eye Q II sensor and wait for 6 seconds.

Step 6) Confirm that “ok” pop up. If change is not seen, replace Eye Q II sensor.

Local Dimming Demo (IOP Model)

4.7. 3D function test

(Pattern Generator MSHG-600, MSPG-6100 [Support HDMI 1.4])

* HDMI mode No. 872, pattern No. 83)

1) Please input 3D test pattern like below

2) When 3D OSD appear automatically, then select OK button.

3) Don’t wear a 3D Glasses, Check the picture like below.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 14 LGE Internal Use Only

4.8. IR emitter inspection

(1) Start 3D pattern inspection

(2) If IR emitter emitter signal is correctly received to IR receiver, the lamp of IR tester turn on

<IR Emitter inspection>

<IR Tester Lamp turned off(NG)> <IR Tester Lamp turned on(OK)>

5. GND and Internal Pressure check

5.1. Method

1) GND & Internal Pressure auto-check preparation

- Check that Power Cord is fully inserted to the SET.

(If loose, re-insert)

2) Perform GND & Internal Pressure auto-check

- Unit fully inserted Power cord, Antenna cable and A/V arrive to the auto-check process.

- Connect D-terminal to AV JACK TESTER

- Auto CONTROLLER(GWS103-4) ON

- Perform GND TEST

- If NG, Buzzer will sound to inform the operator.

- If OK, changeover to I/P check automatically.

(Remove CORD, A/V form AV JACK BOX)

- Perform I/P test

- If NG, Buzzer will sound to inform the operator.

- If OK, Good lamp will lit up and the stopper will allow the pallet to move on to next process.

5.2. Checkpoint

• TEST voltage

- GND: 1.5KV/min at 100mA

- SIGNAL: 3KV/min at 100mA

• TEST time: 1 second

• TEST POINT

- GND TEST = POWER CORD GND & SIGNAL CABLE

METAL GND

- Internal Pressure TEST = POWER CORD GND & LIVE &

NEUTRAL

• LEAKAGE CURRENT: At 0.5mArms

4.9. Option selection per country

(1) Overview

- Option selection is only done for models in Non-EU.

- Applied model: LD03D/03E Chassis applied EU model.

(2) Method

1) Press ADJ key on the Adj. Remote Control, then select

Country Group Menu.

2) Depending on destination, select Country Group Code

04 or Country Group EU then on the lower Country option, select US, CA, MX. Selection is done using +, or GF KEY.

4.10. Tool Option selection

- Method : Press Adj. key on the Adj. Remote Control, then select Tool option.

Mode Tool 1

42LX6500 33760

Tool 2

31795

Tool 3

54316

Tool 4

22956

Tool 5

2874

4.11. Ship-out mode check(In-stop)

After final inspection, press IN-STOP key of the Adj. R/C and check that the unit goes to Stand-by mode.

6. Audio

Measurement condition:

1. RF input: Mono, 1KHz sine wave signal, 100% Modulation

2. CVBS, Component: 1KHz sine wave signal 0.4Vrms

3. RGB PC: 1KHz sine wave signal 0.7Vrms

No.

Item Min. Typ. Max. Unit

1. Audio practical max 4.5

5 6 W EQ Off

Output, L/R

(Distortion=10 % max Output)

AVL Off

6.33 6.93 Vrms Clear Voice Off

5 7

Impedance)

W EQ

AVL On

Clear Voice On

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 15 LGE Internal Use Only

7. USB S/W Download (option, Service only)

1) Put the USB Stick to the USB socket

2) Automatically detecting update file in USB Stick

- If your downloaded program version in USB Stick is Low, it didn’t work. But your downloaded version is High, USB data is automatically detecting

3) Show the message “Copying files from memory”

4) Updating is starting.

5) Updating Completed, The TV will restart automatically

6) If your TV is turned on, check your updated version and

Tool option. (explain the Tool option, next stage)

* If downloading version is more high than your TV have,

TV can lost all channel data. In this case, you have to channel recover. if all channel data is cleared, you didn’t have a DTV/ATV test on production line.

* After downloading, have to adjust TOOL OPTION again.

1) Push "IN-START" key in service remote control.

2) Select "Tool Option 1" and Push “OK” button.

3) Push in the number. (Each model has their number.)

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 16 LGE Internal Use Only

1. MAIN

BLOCK DIAGRAM

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 17 LGE Internal Use Only

2. 3F BOARD

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 18 LGE Internal Use Only

EXPLODED VIEW

IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW.

It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.

Do not modify the original design without permission of manufacturer.

Copyright LG Electronics. Inc. All rights reserved.

Only for training and service purposes

- 19 LGE Internal Use Only

RESET

SMD GASKET

SOC_RESET

+3.3V_NORMAL

NVRAM

+3.3V_NORMAL

R1030 0

+3.3V_NORMAL

IC102

M24M01-HRMN6TP

C103

0.1uF

R1032

0

NC

1 8

VCC

E1

2 7

WP

E2

3

A8’h

6

SCL

VSS

4 5

SDA

C171

8pF

OPT

R1026

R1028

C167

8pF

OPT

SYS_RESETb

22

22

Boot Strap

NAND_DATA[0-7]

NAND_ALE

Default Res. of all NAND pin is Pull-down

+3.3V_NORMAL

R1000

2.7K

NAND_DATA[0]

R1036

OPT

2.7K

OPT R1008

2.7K

NAND_DATA[1]

R1005

2.7K

R1040

OPT

2.7K

NAND_DATA[2]

R1039

R169

2.7K

2.7K

NAND_DATA[3]

OPT

R1004

2.7K

R1037

OPT

2.7K

NAND_DATA[4]

R1003

2.7K

R1002

OPT

2.7K

NAND_DATA[5]

R1034

R1035

2.7K

2.7K

NAND_DATA[6]

OPT R1007

2.7K

R1006

OPT

2.7K

NAND_DATA[7]

R1038

2.7K

R158

OPT

2.7K

R156

2.7K

R157 OPT

2.7K

R1001

2.7K

NAND_CLE

NAND_IO[0] : Flash Select (1)

0 : Boot From Serial Flash

1 : Boot From NAND Flash

NAND_IO[1] : NAND Block 0 Write (DNS)

0 : Enable Block 0 Write

1 : Disable Block 0 Write

NAND_IO[3:2] : NAND ECC (1, DNS)

00 : No ECC

01 : 1 ECC Bit

10 : 4 ECC Bit

11 : 8 ECC Bit

NAND_IO[4] : CPU Endian (0)

0 : Little Endian

1 : Big Endian

NAND_IO[6:5] : Xtal Bias Control (1, DNS)

00 : 1.2mA (Fundmental Recommand)

01 : 1.8mA

10 : 2.4mA (3rd over tune Recommand)

11 : 3.0mA

NAND_IO[7] : MIPS Frequency (DNS)

0 : 405MHz

1 : 378MHz

NAND_ALE : I2C Level (DNS)

0 : 3.3V Switching

1 : 5V Switching

NAND_CLE

0 : Enable D2CDIFF AC (DNS)

1 : Disabe D2CDIFF AC

SCL3_3.3V

SDA3_3.3V

IC100

LGE3556CP (C0 3D PIP)

CI_A[0-13]

NAND_CEb

NAND_ALE

NAND_REb

NAND_CLE

NAND_WEb

NAND_RBb

EBI_CS

+3.3V_NORMAL

R1045

/CI_WAIT

EBI_WE

4.7K

EBI_RW

EBI_CS

CI_A[3]

CI_A[4]

CI_A[2]

CI_A[1]

CI_A[0]

CI_A[5]

CI_A[6]

CI_A[8]

CI_A[9]

CI_A[13]

CI_A[12]

CI_A[11]

CI_A[10]

CI_A[7]

22

R116

22

R122

R117

33

22

R127

22

R140

NAND_DATA[0-7]

+3.3V_NORMAL

NAND_DATA[0]

NAND_DATA[1]

NAND_DATA[2]

NAND_DATA[3]

NAND_DATA[4]

NAND_DATA[5]

NAND_DATA[6]

NAND_DATA[7]

J26

H27

G26

J27

J28

F27

G24

H26

G27

J23

J24

H25

H24

H23

J25

F26

H28

G28

K23

G25

EBI_ADDR3

EBI_ADDR4

EBI_ADDR2

EBI_ADDR1

EBI_ADDR0

EBI_ADDR5

EBI_ADDR6

EBI_ADDR8

EBI_ADDR9

EBI_ADDR13

EBI_ADDR12

EBI_ADDR11

EBI_ADDR10

EBI_ADDR7

EBI_TAB

EBI_WE1B

EBI_CLK_IN

EBI_CLK_OUT

EBI_RWB

EBI_CS0B

R23

T23

T25

R24

U25

U24

T26

T27

U26

U27

V26

V27

V28

T24

NAND_DATA0

NAND_DATA1

NAND_DATA2

NAND_DATA3

NAND_DATA4

NAND_DATA5

NAND_DATA6

NAND_DATA7

NAND_CS0B

NAND_ALE

NAND_REB

NAND_CLE

NAND_WEB

NAND_RBB

* I2C MAP

* I2C_0 :

* I2C_1 :

* I2C_2 :

* I2C_3 :

W24

U23

V23

V24

SF_MISO

SF_MOSI

SF_SCK

SF_CSB

M2

M1

L4

L6

W27

W28

W26

W25

J2

J1

K3

K2

N23

R28

R27

R26

P28

P27

K6

K5

P26

M3

G6

G4

L24

P25

L5

K4

K1

L27

M26

AE19

M4

M5

L23

Y28

Y27

G2

G3

G5

M27

AA25

R25

N28

N27

AH18

P23

M23

AD19

K25

AA27

AA28

AA26

L1

L3

L2

Y25

Y26

N26

L26

N25

L25

K27

K28

K24

K26

GPIO_37

GPIO_38

GPIO_39

GPIO_40

GPIO_41

GPIO_42

GPIO_43

GPIO_44

GPIO_45

GPIO_46

GPIO_47

GPIO_48

GPIO_49

GPIO_50

GPIO_51

GPIO_52

GPIO_53

GPIO_54

GPIO_55

GPIO_56

GPIO_57

SGPIO_00

SGPIO_01

SGPIO_02

SGPIO_03

SGPIO_04

SGPIO_05

SGPIO_06

SGPIO_07

GPIO_19

GPIO_20

GPIO_21

GPIO_22

GPIO_23

GPIO_24

GPIO_25

GPIO_26

GPIO_27

GPIO_28

GPIO_29

GPIO_30

GPIO_31

GPIO_32

GPIO_33

GPIO_34

GPIO_35

GPIO_36

GPIO_00

GPIO_01

GPIO_02

GPIO_03

GPIO_04

GPIO_05

GPIO_06

GPIO_07

GPIO_08

GPIO_09

GPIO_10

GPIO_11

GPIO_12

GPIO_13

GPIO_14

GPIO_15

GPIO_16

GPIO_17

GPIO_18

R111

R107

R108

R1033

R1046

R132

R1050

R161

R133

R103

0

1K

R1029

0

OPT

R1047

22

R192

R199

R106

R1048

R109

R110

1K

100

100

100

1K

0

22

100

22

22

22

1K

100

100

22

22

22

100

22

0

R129

R160

R102

R1049

R1051

LOCAL DIMMING

R1042

R1044

100 NON_LEX8

22

* NAND FLASH MEMORY 4Gbit (512M for BB)

+3.3V_NORMAL

NAND_RBb

NAND_REb

NAND_CEb

NAND_CLE

NAND_ALE

NAND_WEb

FLASH_WP

+3.3V_NORMAL

B

Open Drain

C

Q101

C114

0.1uF

KRC103S

C116

4700pF

NC_1

1

NC_2

2

NC_3

3

NC_4

4

NC_5

5

NC_6

6

RB

7

R

8

E

9

NC_7

10

NC_8

11

VDD_1

12

VSS_1

13

NC_9

14

NC_10

15

CL

16

AL

17

W

18

WP

19

NC_11

20

NC_12

21

NC_13

22

NC_14

23

NC_15

24

E

IC101

NAND04GW3B2DN6E

NAND FLASH

NC_29

48

NC_28

47

NC_27

46

NC_26

45

I/O7

44

I/O6

43

I/O5

42

I/O4

41

40

NC_25

39

NC_23

38

VDD_2

37

VSS_2

36

NC_22

35

NC_21

34

NC_20

33

I/O3

32

I/O2

31

I/O1

30

I/O0

29

NC_19

28

NC_18

27

26

NC_17

NC_16

25

NAND_DATA[7]

NAND_DATA[6]

NAND_DATA[5]

NAND_DATA[4]

C136 10uF

10V

C115

0.1uF

NAND_DATA[3]

NAND_DATA[2]

NAND_DATA[1]

NAND_DATA[0]

NAND_DATA[0-7]

IF_AGC_SEL

LNA2_CTL/BOSTER_CTL

RF_SWITCH_CTL

E_TMS

/CI_SEL

R1012

R1019

R1024

R1061

R130

100

100

100

0

22

BT_RESET

MODEL_OPT_2

FOR ESD 12V Pattern

+12V

C178

0.1uF

50V

C179

0.1uF

50V

+3.3V_NORMAL

R1064

0

R1062

0

E_TDO

E_TDI

POWER_DET

DC

INTERRUPT PIN

ERROR_OUT

MODEL_OPT_4

INTERRUPT PIN

INTERRUPT PIN

MODEL_OPT_5

SIDE_AV_DET

CI_5V_CTL

For CI

DC

HDMI_HPD_4

USB_PWRFLT3

PWM_DIM

HDMI_HPD_3

MODEL_OPT_1

R1053 2.7K

+3.3V_NORMAL

17page : Motion Remocon

DSUB_DET

BT_RESET

/RST_HUB

BCM_RX

BCM_TX

SC_RE1

SC_RE2

CI_MOD_RESET

MODEL_OPT_0

DD

DD

R105

17page : Motion Remocon

56

AUD_MASTER_CLK

HDMI_HPD_2

IR_IN

HDMI_HPD_1

12K

IR_IN

5V_HDMI_1

R1041

EPHY_ACTIVITY

EPHY_LINK

BB Add.

/CI_CD1 For CI

EMI

C180

100pF

50V

C173

22uF

16V

A_DIM

L/R_SYNC

M_REMOTE_TX

17page : Motion Remocon

M_REMOTE_RX 17page : Motion Remocon

TUNER_RESET

DTV_ATV_SELECT

5V_HDMI_2

REAR_AV_DET

R115 1.8K

R1063

0

For CI

E_TCK

CI_OUTCLK

/CI_CD2

/CI_IREQ

MODEL_OPT_6

MODEL_OPT_3

M_REMOTE_RX

M_REMOTE_TX

FE_TS_VAL_ERR

External Demod.

5V_HDMI_3

5V_HDMI_4

MODEL_OPT_2

SCART1_DET

SIDE_COMP_DET

M_RFModule_RESET

RGB_DDC_SCL

FRC_RESET

R1052

4.7K

+3.3V_NORMAL

RGB_DDC_SDA

COMP1_DET

LG5111_RESET

HP_DET

LG5111_RESET

MODEL_OPT_0

MODEL_OPT_1

MODEL_OPT_2

MODEL_OPT_3

MODEL_OPT_4

MODEL_OPT_5

MODEL_OPT_6

MODEL OPTION

PIN NAME

MODEL_OPT_0

PIN NO.

N28

MODEL_OPT_1 AA26

MODEL_OPT_2

MODEL_OPT_3

MODEL_OPT_4

MODEL_OPT_5

MODEL_OPT_6

R26

K1

L25

K27

K4

EXT IRQ

GPIO_00, GPIO_01, GPIO_02,

GPIO_11, GPIO_11, GPIO_39

IR_INT : GPIO_23

IR1_IN : GPIO_25

IR2_IN : GPIO_29

IR_OUT : GPIO_26

PWM0 : GPIO_24

PWM1 : GPIO_09

+3.3V_NORMAL

HIGH

URSA3

MAIN_MINI_LVDS

DDR-512M

FHD

FRC

GIP

OLED

*MODEL_OPT_0 & MODEL_OPT_4

REFER TO THIS OPTION

MODEL_OPT_0

LOW

HIGH

HIGH

LOW

MODEL_OPT_4

LOW

LOW

HIGH

HIGH

NO FRC

URSA3 Internal

URSA3 External

PWIZ Pannel T-con with LG FRC

For LEX8(ALEF)

For LEX8(ALEF)

CHINA

MODEL_OPT_3 43page:/BT_ON_OFF

MODEL_OPT_4 15page:/TW_9910_RESET

MODEL_OPT_5 15page:/CHB_RESET

EU

26page:USB_PWRON3

SCL0_3.3V

SDA0_3.3V

SCL1_3.3V

SDA1_3.3V

SCL2_3.3V

SDA2_3.3V

SCL3_3.3V

SDA3_3.3V

SIDE_AV_DET

HDMI_HPD_4

BT_RESET

/RST_HUB

SIDE_COMP_DET

HP_DET

SIDE_COMP_DET

HP_DET

5V_HDMI_4

WIRELESS_DL_RX

WIRELESS_DL_TX

USB_PWRFLT3

LOW

NON_URSA3

MAIN_LVDS

DDR-236M

HD

NON_FRC

NON-GIP

NON_OLED

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BCM (EUROBBTV)

BCM3556 & NAND FLASH 1

2009.06.18

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

IC100

LGE3556CP (C0 3D PIP)

Route INCM between associated left and right signals of same channel

The INCM trace ends at the same point where the connector ground connects to the board ground

(thru-hole connector pin).

Place test points, resistors near audio connector.

Connect the other side of the resistor to GND as close as possible to the ground connection of the associated audio connector.

BROAD BAND STUDIO

For LEX8(ALEF)

COMP1_L_IN

COMP1_R_IN

SIDE_AV_L_IN

SIDE_AV_R_IN

COMP1_L_IN

COMP1_R_IN

P200

TJC2508-4A

1

2

3

4

AUDIO IN CAP Replacement of MLCC

+3.3V_NORMAL

A2.5V

BLM18PG121SN1D

L212

041:B5

041:B5

REAR_AV_L_IN

REAR_AV_R_IN

002:J6 REAR_AV_LR_INCM

COMP1_L_IN

COMP1_R_IN

002:J6 COMP1_LR_INCM

041:B5

041:B5

SC1_L_IN

SC1_R_IN

002:J7

SC1_LR_INCM

041:B5

SIDE_AV_L_IN

041:B5

SIDE_AV_R_IN

002:J6

SIDE_AV_LR_INCM

009:I3 PC_L_IN

009:I3

002:J7

PC_R_IN

PC_LR_INCM

DTV/MNT_V_OUT

A3.3V

C201

100pF

R204

R214

R228

R229

R230

R231

R234

A1.2V

L200

BLM18PG121SN1D

C2026

4.7uF

R232 51

NON_LEX8

R233 51

C225

C226

FE_TS_DATA_CLK

FE_TS_SERIAL

FE_TS_SYNC

CI_OUTDATA[0-7],CI_OUTSTART,CI_OUTVALID

BLM18PG121SN1D

51

51

51

51

NON_LEX8

51

51

NON_LEX8

51

51

R209

3.9K

R210

120

16V

L202

A1.2V

C244

0.1uF

C206

C210

A3.3V

NON_LEX8

C211

C232

C220

C221

C224

C227

045:V14

A1.2V

A2.5V

0.015uF

0.015uF

NON_LEX8

0.015uF

0.015uF

A2.5V

BLM18PG121SN1D

L209

BLM18PG121SN1D

L210

0.015uF

0.015uF

NON_LEX8

0.015uF

0.015uF

NON_LEX8

0.015uF

0.015uF

D3.3V

EPHY_RDN

EPHY_RDP

EPHY_TDN

EPHY_TDP

SIDE_USB_DM

SIDE_USB_DP

R235

2.7K

TP4021

TP4022

TP4023

CI_A[14]

CI_OUTDATA[0]

G23

D25

CI_OUTDATA[1]

CI_OUTDATA[2]

D24

C25

CI_OUTDATA[3]

CI_OUTDATA[4]

E27

E26

CI_OUTDATA[5]

D28

CI_OUTDATA[6]

CI_OUTDATA[7]

CI_OUTSTART

CI_OUTVALID

D27

D26

E23

E24

F25

C27

C26

B28

B27

A27

F24

F23

E25

C28

A28

R220 : BCM recommened resistor 562 ohm

C215

0.1uF

C213

0.01uF

R266

2.7K

R218

240

R220

1K

R219

C222

0.1uF

AF19

AD20

AE20

560

AH22

AH20

AG19

AE7

AH5

AG7

AH6

AD8

AF8

AE8

AH7

AH8

AE6

AD7

AF6

AH4

AG5

AG4

AG6

AF7

AG8

AF5

AB9

AA10

AB10

AA11

AB11

AC8

AE5

D23

C24

B26

A25

B25

A26

AC18

AF20

AG20

AG21

AH21

M25

M24

U1

U2

T5

R5

R1

R4

U4

V1

V2

T8

R3

U3

T4

T3

R6

T6

R7

T7

R2

T2

T1

N3

N2

P1

P4

N4

P6

P5

P3

P2

N1

N5

P7

AUDMX_LEFT1

AUDMX_RIGHT1

AUDMX_INCM1

AUDMX_LEFT2

AUDMX_RIGHT2

AUDMX_INCM2

AUDMX_LEFT3

AUDMX_RIGHT3

AUDMX_INCM3

AUDMX_LEFT4

AUDMX_RIGHT4

AUDMX_INCM4

AUDMX_LEFT5

AUDMX_RIGHT5

AUDMX_INCM5

AUDMX_LEFT6

AUDMX_RIGHT6

AUDMX_INCM6

AUDMX_AVSS_1

AUDMX_AVSS_2

AUDMX_AVSS_3

AUDMX_AVSS_4

AUDMX_AVSS_5

AUDMX_AVSS_6

AUDMX_LDO_CAP

AUDMX_AVDD2P5

PKT0_CLK

PKT0_DATA

PKT0_SYNC

RMX0_CLK

RMX0_DATA

RMX0_SYNC

POD2CHIP_MCLKI

POD2CHIP_MDI0

POD2CHIP_MDI1

POD2CHIP_MDI2

POD2CHIP_MDI3

POD2CHIP_MDI4

POD2CHIP_MDI5

POD2CHIP_MDI6

POD2CHIP_MDI7

POD2CHIP_MISTRT

POD2CHIP_MIVAL

CHIP2POD_MCLKO

CHIP2POD_MDO0

CHIP2POD_MDO1

CHIP2POD_MDO2

CHIP2POD_MDO3

CHIP2POD_MDO4

CHIP2POD_MDO5

CHIP2POD_MDO6

CHIP2POD_MDO7

CHIP2POD_MOSTRT

CHIP2POD_MOVAL

VDAC_AVDD2P5

VDAC_AVDD1P2

VDAC_AVDD3P3_1

VDAC_AVDD3P3_2

VDAC_AVSS_1

VDAC_AVSS_2

VDAC_AVSS_3

VDAC_RBIAS

VDAC_1

VDAC_2

VDAC_VREG

CLK54_AVDD1P2

CLK54_AVDD2P5

CLK54_AVSS

CLK54_XTAL_N

CLK54_XTAL_P

CLK54_MONITOR

PM_OVERRIDE

BSC_S_SCL

BSC_S_SDA

USB_AVSS_1

USB_AVSS_2

USB_AVSS_3

USB_AVSS_4

USB_AVSS_5

VCXO_AGND_1

VCXO_AGND_2

VCXO_AGND_3

VCXO_AVDD1P2

VCXO_PLL_AUDIO_TESTOUT

USB_AVDD1P2

USB_AVDD1P2PLL

USB_AVDD2P5

USB_AVDD2P5REF

USB_AVDD3P3

USB_RREF

USB_DM1

USB_DP1

USB_DM2

RESET_OUTB

RESETB

NMIB

TMODE_0

TMODE_1

TMODE_2

TMODE_3

SPI_S_MISO

POR_OTP_VDD2P5

POR_VDD1P2 USB_DP2

USB_MONCDR

USB_MONPLL

USB_PWRFLT_1

USB_PWRFLT_2

USB_PWRON_1

USB_PWRON_2

EJTAG_TCK

EJTAG_TDI

EJTAG_TDO

EJTAG_TMS

EJTAG_TRSTB

EJTAG_CE0

EJTAG_CE1

EPHY_VREF

EPHY_RDAC

EPHY_RDN

EPHY_RDP

EPHY_TDN

PLL_MAIN_AVDD1P2

PLL_MAIN_AGND

PLL_MAIN_MIPS_EREF_TESTOUT

EPHY_TDP

EPHY_AVDD1P2

EPHY_AVDD2P5

EPHY_PLL_VDD1P2

EPHY_AGND_1

EPHY_AGND_2

EPHY_AGND_3

PLL_RAP_AVD_TESTOUT

PLL_RAP_AVD_AVDD1P2

PLL_RAP_AVD_AGND

BYP_CPU_CLK

BYP_DS_CLK

BYP_SYS216_CLK

BYP_SYS175_CLK

LVDS_TX_0_DATA0_P

LVDS_TX_0_DATA0_N

LVDS_TX_0_DATA1_P

LVDS_TX_0_DATA1_N

LVDS_TX_0_DATA2_P

LVDS_TX_0_DATA2_N

LVDS_TX_0_DATA3_P

LVDS_TX_0_DATA3_N

LVDS_TX_0_DATA4_P

LVDS_TX_0_DATA4_N

LVDS_TX_0_CLK_P

LVDS_TX_0_CLK_N

LVDS_TX_1_DATA0_P

LVDS_TX_1_DATA0_N

LVDS_TX_1_DATA1_P

LVDS_TX_1_DATA1_N

LVDS_TX_1_DATA2_P

LVDS_TX_1_DATA2_N

LVDS_TX_1_DATA3_P

LVDS_TX_1_DATA3_N

LVDS_TX_1_DATA4_P

LVDS_TX_1_DATA4_N

LVDS_TX_1_CLK_P

LVDS_TX_1_CLK_N

LVDS_PLL_VREG

LVDS_TX_AVDDC1P2

LVDS_TX_AVDD2P5_1

LVDS_TX_AVDD2P5_2

LVDS_TX_AVSS_1

LVDS_TX_AVSS_2

LVDS_TX_AVSS_3

LVDS_TX_AVSS_4

LVDS_TX_AVSS_5

LVDS_TX_AVSS_6

LVDS_TX_AVSS_7

LVDS_TX_AVSS_8

LVDS_TX_AVSS_9

LVDS_TX_AVSS_10

LVDS_TX_AVSS_11

AD27

AD28

AD26

AC26

AC27

AE25

Y23

P24

F6

N24

J5

J4

J6

J3

V25

AH3

AB8

H4

H3

H2

H1

G1

H6

H5

C1

F3

C4

A5

E5

F5

F1

F4

F2

E2

E3

E4

D3

D4

C2

C3

D1

D2

E1

E6

D7

E7

F7

G7

H7

C5

B5

B1

B2

A3

A1

A2

D5

D6

B4

A4

C6

B6

B3

AA23

AB24

AC24

AF25

AF24

AB26

AC25

AB27

M6

N6

N7

C228

10uF

C233

0.1uF

A1.2V

A2.5V

4.7K

R221

A2.5V

L211

BLM18PG121SN1D

C231

10uF

R240

390

OPT

OPT

C235

4.7uF

C234

0.1uF

1K

R249

AA24

Y24

AE24

AD25

1K

1K

R222

R262

TP is Necessory

LVDS_TX_1_DATA4_N013:E7;035:AK20

LVDS_TX_1_DATA4_P013:E7;035:AK19

LVDS_TX_1_DATA3_N013:E7;035:AK19

LVDS_TX_1_DATA3_P013:E7;035:AK19

LVDS_TX_1_DATA2_N013:E7;035:AK17

LVDS_TX_1_DATA2_P013:E7;035:AK17

LVDS_TX_1_DATA1_N013:E7;035:AK17

LVDS_TX_1_DATA1_P013:E7;035:AK16

LVDS_TX_1_DATA0_N013:E7;035:AK16

LVDS_TX_1_DATA0_P013:E7;035:AK16

LVDS_TX_1_CLK_N

LVDS_TX_1_CLK_P

013:E7;035:AK18

013:E7;035:AK18

LVDS_TX_0_DATA4_N013:F7;035:AK15

LVDS_TX_0_DATA4_P013:F7;035:AK14

LVDS_TX_0_DATA3_N013:F7;035:AK14

LVDS_TX_0_DATA3_P013:F7;035:AK14

LVDS_TX_0_DATA2_N013:F7;035:AK12

LVDS_TX_0_DATA2_P013:F7;035:AK12

LVDS_TX_0_DATA1_N013:E7;035:AK12

LVDS_TX_0_DATA1_P013:E7;035:AK11

LVDS_TX_0_DATA0_N013:E7;035:AK11

LVDS_TX_0_DATA0_P013:E7;035:AK11

LVDS_TX_0_CLK_N 013:E7;035:AK13

LVDS_TX_0_CLK_P

013:E7;035:AK13

L203

BLM18PG121SN1D

+3.3V_NORMAL

A1.2V

54MHz_XTAL_N

54MHz_XTAL_P

002:I1

002:I2

A1.2V

SYS_RESETb

001:A6;001:B7

L204

BLM18PG121SN1D

A1.2V

L207 A1.2V

BLM18PG121SN1D

OPT

R224

2.7K

R226

2.7K

A1.2V

A2.5V

+3.3V_NORMAL

OPT

R225

2.7K

R227

2.7K

C206-*1

0.015uF

50V

15nF_U2J

C210-*1

0.015uF

50V

15nF_U2J

C211-*1

0.015uF

50V

15nF_U2J

C232-*1

0.015uF

50V

15nF_U2J

C220-*1

0.015uF

50V

15nF_U2J

C221-*1

0.015uF

50V

15nF_U2J

C224-*1

0.015uF

50V

15nF_U2J

C225-*1

0.015uF

50V

15nF_U2J

C226-*1

0.015uF

50V

15nF_U2J

C227-*1

0.015uF

50V

15nF_U2J

C2027-*1

0.047uF

350V

47nF_X7T

C277-*1

0.047uF

350V

47nF_X7T

C279-*1

0.047uF

350V

47nF_X7T

C296-*1

0.047uF

350V

47nF_X7T

C298-*1

0.047uF

350V

47nF_X7T

C299-*1

0.047uF

350V

47nF_X7T

C252-*1

0.047uF

350V

47nF_X7T

C253-*1

0.047uF

350V

47nF_X7T

C254-*1

0.047uF

350V

47nF_X7T

C256-*1

0.047uF

350V

47nF_X7T

C217

10uF

A2.5V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

When usding FUNDMENTAl then series R = 0 ohm and CL = 8 pF

54MHz X-TAL

When usding Dip-type X-tal then series R = 22 ohm and CL = 12 pF

22

R212

C230

12pF

54MHz_XTAL_N

54MHz_XTAL_P

22

R211

12pF

C229

Near Q1705

Near J1500

VIDEO INCM

Run Along TUNER_CVBS_IF_P Trace

Run Along SC1_R,SC_G,SC_B Trace

PLACE NEAR BCM CHIP

C258 0.1uF

TU_CVBS_INCM

003:A3

C2019 0.1uF

SC1_RGB_INCM

003:A4

C261 0.1uF

REAR_AV_CVBS_INCM

003:A3

Near J1603

Run Along COMP_Y_IN,COMP_Pr_IN,COMP_Pb_IN Trace

C262 0.1uF

NON_LEX8

COMP1_VID_INCM

Near P1600

Near J1500

Near J1501

Run Along DSUB_R Trace

Run Along DSUB_G Trace

Run Along DSUB_B Trace

Run Along SC1_CVBS_IN Trace

Run Along SC2_CVBS_IN Trace

C2015 0.1uF

C2016 0.1uF

C264 0.1uF

R_VID_INCM

003:A5

G_VID_INCM

003:A5

B_VID_INCM

003:A5

C2011 0.1uF

SC1_CVBS_INCM 003:A3

C2023 0.1uF

NON_LEX8

SIDE_AV_CVBS_INCM 003:A3

PLACE NEAR Jacks

Near J1501

5.1

R256

Near J1600

5.1

R258

Near J1603

Near J1500

Near J1602

Near Q1704

5.1

R259

5.1

R257

5.1

R252

AUDIO INCM

Route Between SC2_L_IN & SC2_R_IN

Route Between AV1_L_IN & AV1_R_IN

PLACE NEAR BCM CHIP

NON_LEX8

0.15uF

C2014 0.47uF

C271

NON_LEX8

SIDE_AV_LR_INCM

002:C6

0.15uF

C2024

0.47uF

C2017

REAR_AV_LR_INCM

002:C6

Route Between COMP1_L_IN & COMP1_R_IN

0.15uF

C265

NON_LEX8

C2025

0.47uF

NON_LEX8

COMP1_LR_INCM

002:C6

Route Between SC1_L_IN & SC1_R_IN

Route Between PC_L_IN & PC_R_IN

0.15uF

C2022 0.47uF

C270

SC1_LR_INCM

002:C6

0.15uF

C269

0.47uF

C2010

PC_LR_INCM

002:C6

TU_SIF_INCM 003:A3

Route Along With TUNER_SIF_IF_N

BCM (EUROBBTV)

BCM3556 AUD_IN/LVDS

2

2009.06.18

LGE Internal Use Only

Place here for common circuit with ATSC

+1.8V_AMP

+1.8V_HDMI

L111

BLM18PG121SN1D

+3.3V_NORMAL

L112

CIC21J501NE

A3.3V

C2008

0.1uF

16V

C2007

0.1uF

16V

D1.2V

C243

0.1uF

C249

4.7uF

C250

1000pF

C382

0.01uF

C381

0.1uF

C380

10uF

C379

10uF

C286

33uF

C287

100uF

FOR ESD

IC100

LGE3556CP (C0 3D PIP)

26page : TUNER(HALF NIM)

COMPONENT

COMP1_Y

COMP1_Pr

COMP1_Pb

COMP1_VID_INCM

SC1_RGB(EU)

SC1_G

SC1_R

SC1_B

SC1_RGB_INCM

SIDE COMPONENT

SIDE_COMP_Y

SIDE_COMP_Pr

SIDE_COMP_Pb

SIDE_COMP_INCM

CVBS

For LEX8(ALEF)

SIDE_AV_CVBS

TU_IF_AGC_1

TU_IF_AGC_2

TU_IF_N_1

TU_IF_P_1

DSUB

TU_IF_N_1

TU_IF_P_1

DSUB_R

R_VID_INCM

DSUB_G

R195

1%

G_VID_INCM

DSUB_B

B_VID_INCM

10

R138-*1 10

NON_EU

R138

1%

0 EU

TU_SIF

TU_SIF_INCM

R196

10

1%

TU_IF_AGC_1

TU_IF_AGC_2

SIDE_COMP_Y

SIDE_COMP_Pr

SIDE_COMP_Pb

SIDE_COMP_INCM

TU_CVBS

REAR_AV_CVBS

SC1_CVBS_IN

SIDE_AV_CVBS

TU_CVBS_INCM

REAR_AV_CVBS_INCM

SC1_CVBS_INCM

SIDE_AV_CVBS_INCM

SC1_FB

R128

0

R135-*1

NON_EU

82 1%

R3055

240

0.1uF

C106

C4020

0.1uF

CONNECT NEAR BCM CHIP

A1.2V

C111

0.1uF

EU

R2112

1% 18

R2113

12

R2114

0

R2115

12

A2.5V

A2.5V

A2.5V

A1.2V

BLM18PG121SN1D

A2.5V

ONLY USE NON_EU

FOR COMP 1

R137

10K

R139

12K

R2117

0

R4020

10K

C112

0.1uF

R100

R142

R143

R141

BLM18PG121SN1D

L102

C113

0.1uF

L103

NON_EU

R2112-*1

5% 12

62

OPT

62

75

1% EU

NON_EU

R141-*1

5%

62

C110

C124

C125

C100

A1.2V

L106

BLM18PG121SN1D

SC1_ID

C121

0.1uF

C172

4.7uF

C119

0.1uF

RGB_HSYNC

RGB_VSYNC

C130

C131

C132

C133

C134

C135

C174

C175

C176

C140

4.7uF

C144

0.1uF

C122

4.7uF

BLM18PG121SN1D

L104

C120

1000pF

BLM18PG121SN1D

L105

C117

1000pF

C118

0.01uF

C123

0.01uF

C127

C128

C129

A1.2V

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

AG28

AH28

AA21

AB22

AF26

AF27

AF28

AG27

AE26

AE28

AE27

AD24

AB19

AB25

AF10

AH12

AG13

AF17

AG17

AD15

AE16

AE17

AB16

AA15

AC16

AG3

AF4

AH11

AH13

AE12

AF12

AD9

AG11

AG12

AF13

AC9

AG14

AE14

AF14

AH14

AH10

AG10

AE10

AE11

AF11

AG9

AG15

AE15

AF15

AH15

AG16

AF16

AH17

AH16

AA14

AC11

AD11

AB12

AD10

AC10

AE9

AF9

AH9

AB18

AC17

AB17

AD14

AD16

AB15

AC15

AD13

AE13

AC13

AB14

AC14

AC12

AD12

AB13

DS_AGCI_CTL

DS_AGCT_CTL

EDSAFE_AVSS_1

EDSAFE_AVSS_2

EDSAFE_AVSS_3

EDSAFE_AVSS_4

EDSAFE_AVSS_5

EDSAFE_AVDD2P5

EDSAFE_DVDD1P2

EDSAFE_IF_N

EDSAFE_IF_P

PLL_DS_AGND

PLL_DS_AVDD1P2

PLL_DS_TESTOUT

SD_V5_AVDD1P2

SD_V5_AVDD2P5

SD_V5_AVSS

SD_V1_AVDD1P2

SD_V1_AVDD2P5

SD_V1_AVSS_1

SD_V1_AVSS_2

SD_V2_AVDD1P2

SD_V2_AVDD2P5

SD_V2_AVSS_1

SD_V2_AVSS_2

SD_V2_AVSS_3

SD_V3_AVDD1P2

SD_V3_AVDD2P5

SD_V3_AVSS_1

SD_V3_AVSS_2

I2S_CLK_IN

I2S_CLK_OUT

I2S_DATA_IN

I2S_DATA_OUT

I2S_LR_IN

I2S_LR_OUT

AUD_LEFT0_N

AUD_LEFT0_P

AUD_AVDD2P5_0

AUD_AVSS_0_1

AUD_AVSS_0_2

AUD_AVSS_0_3

AUD_AVSS_0_4

AUD_AVSS_0_5

AUD_RIGHT0_N

AUD_RIGHT0_P

AUD_LEFT1_N

AUD_LEFT1_P

AUD_RIGHT1_N

AUD_RIGHT1_P

AUD_AVDD2P5_1

AUD_AVSS_1_1

AUD_AVSS_1_2

AUD_AVSS_1_3

AUD_LEFT2_N

AUD_LEFT2_P

AUD_RIGHT2_N

AUD_RIGHT2_P

AUD_AVDD2P5_2

AUD_AVSS_2_1

AUD_AVSS_2_2

AUD_SPDIF

SD_V4_AVDD1P2

SD_V4_AVDD2P5

SD_V4_AVSS

SD_R

SD_INCM_R

SD_G

SD_INCM_G

SD_B

SD_INCM_B

SPDIF_AVDD2P5

SPDIF_AVSS

SPDIF_IN_N

SPDIF_IN_P

HDMI_RX_0_CEC_DAT

HDMI_RX_0_HTPLG_IN

HDMI_RX_0_HTPLG_OUT

SD_Y1

SD_PR1

SD_PB1

SD_INCM_COMP1

SD_Y2

SD_PR2

SD_PB2

SD_INCM_COMP2

SD_Y3

HDMI_RX_0_DDC_SCL

HDMI_RX_0_DDC_SDA

HDMI_RX_0_RESREF

HDMI_RX_0_CLK_N

HDMI_RX_0_CLK_P

HDMI_RX_0_DATA0_N

HDMI_RX_0_DATA0_P

HDMI_RX_0_DATA1_N

HDMI_RX_0_DATA1_P

SD_PR3

SD_PB3

SD_INCM_COMP3

SD_L1

SD_C1

SD_INCM_LC1

SD_L2

SD_C2

SD_INCM_LC2

HDMI_RX_0_DATA2_N

HDMI_RX_0_DATA2_P

HDMI_RX_0_VDD3P3

HDMI_RX_0_VDD1P2

HDMI_RX_0_VDD2P5

HDMI_RX_0_AVSS_1

HDMI_RX_0_AVSS_2

HDMI_RX_0_AVSS_3

HDMI_RX_0_AVSS_4

SD_L3

SD_C3

HDMI_RX_0_AVSS_5

HDMI_RX_0_AVSS_6

SD_INCM_LC3

SD_CVBS1

HDMI_RX_0_PLL_AVSS

HDMI_RX_0_PLL_DVDD1P2

SD_CVBS2 HDMI_RX_0_PLL_DVSS

SD_CVBS3

SD_CVBS4

SD_INCM_CVBS1 HDMI_RX_1_CEC_DAT

SD_INCM_CVBS2 HDMI_RX_1_HTPLG_IN

SD_FS HDMI_RX_1_CLK_P

SD_FS2

HDMI_RX_1_DATA0_P

PLL_VAFE_AVDD1P2

PLL_VAFE_AVSS

HDMI_RX_1_DATA0_N

HDMI_RX_1_DATA1_N

HDMI_RX_1_DATA1_P

PLL_VAFE_TESTOUT

RGB_HSYNC HDMI_RX_1_DATA2_N

RGB_VSYNC HDMI_RX_1_DATA2_P

HDMI_RX_1_VDD3P3

HDMI_RX_1_VDD1P2

AA3

SD_INCM_CVBS3 HDMI_RX_1_HTPLG_OUT

SD_INCM_CVBS4

SD_SIF1

HDMI_RX_1_DDC_SCL

HDMI_RX_1_DDC_SDA

SD_INCM_SIF1

SD_FB

HDMI_RX_1_RESREF

HDMI_RX_1_CLK_N

V4

U6

V5

V3

W4

W2

W3

Y1

Y2

AA2

AA1

AB2

AB1

Y3

HDMI_RX_1_VDD2P5

HDMI_RX_1_AVSS_1

HDMI_RX_1_AVSS_2

HDMI_RX_1_AVSS_3

HDMI_RX_1_AVSS_4

HDMI_RX_1_AVSS_5

HDMI_RX_1_AVSS_6

HDMI_RX_1_AVSS_7

HDMI_RX_1_AVSS_8

W6

U7

V7

W7

U8

Y4

W5

W1

U5

HDMI_RX_1_AVSS_9

HDMI_RX_1_PLL_AVSS

HDMI_RX_1_PLL_DVDD1P2

HDMI_RX_1_PLL_DVSS

V8

Y5

V6

AA4

Y7

AF22

AG22

AD21

AC20

AD22

AH2

AC6

AE4

AF3

AH1

AG23

AG24

AH24

AE22

AB20

AC21

AE23

AF21

AE21

AF23

AA20

AB21

AC22

AC23

AD23

AH25

AG25

AH23

AE18

AF18

AD17

AH19

AD18

AG18

AG26

AH26

AC1

AC2

AD1

AD2

AE1

AE2

AF1

AF2

AD3

AG1

AA6

AA5

AB3

Y6

AC4

AE3

AC3

AD4

AB5

AB6

AG2

AB4

AA7

Y8

AC5

W8

BT_LOUT_N

BT_LOUT_P

BT_ROUT_N

BT_ROUT_P

R2036

1K

R309

499

C150

0.1uF

10K

R152

C145

4.7uF

499

OPT

R153

C158

1000pF

AUD_LRCK

HP_LOUT_N

HP_LOUT_P

C147

0.01uF

C155

0.1uF

C162

10uF

C148

0.01uF

C156

0.1uF

SCART1_Lout_N

SCART1_Lout_P

SCART1_Rout_N

SCART1_Rout_P

C149

0.01uF

C157

0.1uF

C164

10uF

SPDIF_OUT

+5V_NORMAL

0

0

C153

0.1uF

C151

0.01uF

C146

4.7uF

R307

R308

C159

1000pF

AUD_SCK

AUD_LRCH

HP_ROUT_N

HP_ROUT_P

HDMI_CLK-

HDMI_CLK+

HDMI_RX0-

HDMI_RX0+

HDMI_RX1-

HDMI_RX1+

HDMI_RX2-

HDMI_RX2+

C160

0.1uF

C165

10uF

D3.3V

C154

0.1uF

BLM18PG121SN1D

L108

C152

0.01uF

HDMI_SCL

HDMI_SDA

BLM18PG121SN1D

L107

C161

0.1uF

C166

10uF

C163

10uF

A3.3V

A3.3V

C384

33uF

10V

A2.5V

A2.5V

For LEX8(ALEF)

C3006

0.1uF

16V

BLM18PG121SN1D

L109

A1.2V

A2.5V

BLM18PG121SN1D

L110

A1.2V

A2.5V

FOR ESD

HP_LOUT_N

HP_LOUT_P

HP_ROUT_N

HP_ROUT_P

D1.2V

C383

1000pF

C246

0.01uF

C378

0.1uF

C376

4.7uF

C259

1000pF

C374

0.01uF

C366

0.1uF

C266

4.7uF

C288

1000pF

C290

0.01uF

D3.3V

C216

0.1uF

C268

1000pF

C371

0.01uF

C370

0.1uF

C369

4.7uF

C292

1000pF

C293

0.01uF

C294

0.1uF

D1.8V

C248

1000pF

C281

1000pF

C282

1000pF

C283

1000pF

C284

0.01uF

C285

0.01uF

C2005

0.01uF

C2006

0.01uF

D1.2V

IC100

LGE3556CP (C0 3D PIP)

A3.3V

R205

20

C2003

0.1uF

D3.3V

AH27

AGC_VDDO

AA12

AA13

AA18

AA19

E28

L28

U28

AB28

VDDO_1

VDDO_2

VDDO_3

VDDO_4

VDDO_5

VDDO_6

VDDO_7

VDDO_8

D1.8V

A9

G9

G11

G13

A14

G15

G17

A19

G19

DDRV_1

DDRV_2

DDRV_3

DDRV_4

DDRV_5

DDRV_6

DDRV_7

DDRV_8

DDRV_9

N21

P21

R21

T21

U21

V21

W21

Y21

H16

H17

H18

H19

H21

J21

K21

L21

M21

R8

AA8

H9

H10

H11

H12

H13

H14

H15

H8

J8

K8

L8

M8

N8

P8

VDDC_18

VDDC_19

VDDC_20

VDDC_21

VDDC_22

VDDC_23

VDDC_24

VDDC_25

VDDC_26

VDDC_27

VDDC_28

VDDC_29

VDDC_30

VDDC_31

VDDC_32

VDDC_33

VDDC_1

VDDC_2

VDDC_3

VDDC_4

VDDC_5

VDDC_6

VDDC_7

VDDC_8

VDDC_9

VDDC_10

VDDC_11

VDDC_12

VDDC_13

VDDC_14

VDDC_15

VDDC_16

VDDC_17

D3.3V

C245

4.7uF

C255

1000pF

C377

0.01uF

C375

0.1uF

C263

4.7uF

C373

1000pF

C267

0.01uF

C289

0.1uF

C291

10uF

D1.8V

C274

0.1uF

C272

0.1uF

C275

0.1uF

C276

0.1uF

C278

4.7uF

C280

4.7uF

C297

4.7uF

C2004

33uF

D1.8V

C365

0.1uF

16V

C364

0.1uF

16V

C363

0.1uF

16V

C357

10uF

10V

C356

0.1uF

16V

C348

0.1uF

16V

C320

0.1uF

16V

C319

0.1uF

16V

C318

0.1uF

16V

C304

0.1uF

16V

IC100

LGE3556CP (C0 3D PIP)

DVSS_36

DVSS_37

DVSS_38

DVSS_39

DVSS_40

DVSS_41

DVSS_42

DVSS_43

DVSS_44

DVSS_45

DVSS_46

DVSS_47

DVSS_48

DVSS_49

DVSS_50

DVSS_51

DVSS_52

DVSS_53

DVSS_54

DVSS_55

DVSS_56

DVSS_57

DVSS_58

DVSS_59

DVSS_60

DVSS_61

DVSS_17

DVSS_18

DVSS_19

DVSS_20

DVSS_21

DVSS_22

DVSS_23

DVSS_24

DVSS_25

DVSS_26

DVSS_27

DVSS_28

DVSS_29

DVSS_30

DVSS_31

DVSS_32

DVSS_33

DVSS_34

DVSS_35

DVSS_1

DVSS_2

DVSS_3

DVSS_4

DVSS_5

DVSS_6

DVSS_7

DVSS_8

DVSS_9

DVSS_10

DVSS_11

DVSS_12

DVSS_13

DVSS_14

DVSS_15

DVSS_16

P14

R14

T14

U14

V14

L15

M15

N15

P15

N13

P13

R13

T13

U13

V13

G14

L14

M14

N14

R15

T15

U15

V15

A16

G16

L16

M16

N16

M12

N12

P12

R12

T12

U12

V12

L13

M13

N11

P11

R11

T11

U11

V11

D12

G12

L12

AB7

AC7

G8

D9

AA9

G10

A11

L11

M11

AD5

AD6

J7

K7

L7

M7

DVSS_78

DVSS_79

DVSS_80

DVSS_81

DVSS_82

DVSS_83

DVSS_84

DVSS_85

DVSS_86

DVSS_87

DVSS_88

DVSS_89

DVSS_90

DVSS_91

DVSS_92

DVSS_93

DVSS_94

DVSS_95

DVSS_62

DVSS_63

DVSS_64

DVSS_65

DVSS_66

DVSS_67

DVSS_68

DVSS_69

DVSS_70

DVSS_71

DVSS_72

DVSS_73

DVSS_74

DVSS_75

DVSS_76

DVSS_77

DVSS_96

DVSS_97

DVSS_98

DVSS_99

DVSS_100

DVSS_101

DVSS_102

DVSS_103

DVSS_104

DVSS_105

DVSS_106

DVSS_107

DVSS_108

DVSS_109

DVSS_110

DVSS_111

DVSS_112

DVSS_113

DVSS_114

DVSS_115

DVSS_116

DVSS_117

U18

V18

D20

G20

H20

A21

E21

F21

G21

AA17

AC19

G18

L18

M18

N18

P18

R18

T18

D17

L17

M17

N17

P17

R17

T17

U17

V17

P16

R16

T16

U16

V16

AA16

P22

R22

T22

U22

V22

W22

Y22

AA22

W23

AB23

E22

F22

G22

H22

J22

K22

L22

M22

N22

F28

M28

T28

AC28

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

EUROBBTV

BCM3556 VIDEO IN

2009.06.18

3

LGE Internal Use Only

D1.8V

IC100

LGE3556CP (C0 3D PIP)

A1.2V

E20

A22

F17

B22

E17

A10

C10

A20

F19

C20

A18

B21

C21

B18

B20

D18

E18

D21

F18

D8

E10

E9

F11

F12

E8

D10

F8

C18

A17

A8

B11

B8

D11

E11

C8

C11

C9

R411

OPT

B10

B9

F10

F9

B19

C19

E19

D19

C16

A7

A23

C17 D1.8V

C7

D22

C13

D13

B13

F15

C15

D16

F16

B16

E15

A15

D15

E13

E12

F13

C14

F14

B14

D14

C22

E16

C23

B12

C12

A13

A12

B15

E14

A6

A24

B7

B24

F20

B23

B17

0.1uF

0.1uF

0

R412

1%

C403

C404

240

DDR01_A[0]

DDR01_A[1]

DDR01_A[2]

DDR01_A[3]

DDR0_A[4]

DDR0_A[5]

DDR0_A[6]

DDR01_A[7]

DDR01_A[8]

DDR01_A[9]

DDR01_A[10]

DDR01_A[11]

DDR01_A[12]

DDR01_A[13]

DDR1_A[4]

DDR1_A[5]

DDR1_A[6]

DDR0_DQ[0]

DDR0_DQ[1]

DDR0_DQ[2]

DDR0_DQ[3]

DDR0_DQ[4]

DDR0_DQ[5]

DDR0_DQ[6]

DDR0_DQ[7]

DDR0_DQ[8]

DDR0_DQ[9]

DDR0_DQ[10]

DDR0_DQ[11]

DDR0_DQ[12]

DDR0_DQ[13]

DDR0_DQ[14]

DDR0_DQ[15]

DDR1_DQ[0]

DDR1_DQ[1]

DDR1_DQ[2]

DDR1_DQ[3]

DDR1_DQ[4]

DDR1_DQ[5]

DDR1_DQ[6]

DDR1_DQ[7]

DDR1_DQ[8]

DDR1_DQ[9]

DDR1_DQ[10]

DDR1_DQ[11]

DDR1_DQ[12]

DDR1_DQ[13]

DDR1_DQ[14]

DDR1_DQ[15]

C406

C415

DDR1_DQ03

DDR1_DQ04

DDR1_DQ05

DDR1_DQ06

DDR1_DQ07

DDR1_DQ08

DDR1_DQ09

DDR1_DQ10

DDR1_DQ11

DDR1_DQ12

DDR1_DQ13

DDR1_DQ14

DDR1_DQ15

DDR0_DM0

DDR0_DM1

DDR1_DM0

DDR1_DM1

DDR0_DQS0

DDR0_DQ00

DDR0_DQ01

DDR0_DQ02

DDR0_DQ03

DDR0_DQ04

DDR0_DQ05

DDR0_DQ06

DDR0_DQ07

DDR0_DQ08

DDR0_DQ09

DDR0_DQ10

DDR0_DQ11

DDR0_DQ12

DDR0_DQ13

DDR0_DQ14

DDR0_DQ15

DDR1_DQ00

DDR1_DQ01

DDR1_DQ02

DDR_BVDD0

DDR_BVDD1

DDR_BVSS0

DDR_BVSS1

DDR_PLL_TEST

DDR_PLL_LDO

DDR01_CKE

DDR_COMP

DDR01_ODT

DDR_EXT_CLK

DDR0_CLK

DDR0_CLKB

DDR1_CLK

DDR1_CLKB

DDR01_A00

DDR01_A01

DDR01_A02

DDR01_A03

DDR0_A04

DDR0_A05

DDR0_A06

DDR01_A07

DDR01_A08

DDR01_A09

DDR01_A10

DDR01_A11

DDR01_A12

DDR01_A13

DDR1_A04

DDR1_A05

DDR1_A06

DDR01_BA0

DDR01_BA1

DDR01_BA2

DDR01_CASB

DDR0_DQS0B

DDR0_DQS1

DDR0_DQS1B

DDR1_DQS0

DDR1_DQS0B

DDR1_DQS1

DDR1_DQS1B

DDR01_RASB

DDR_VREF0

DDR_VREF1

DDR01_WEB

DDR_VDDP1P8_1

DDR_VDDP1P8_2

0.1uF

0.1uF

DDR01_CKE

DDR01_ODT

DDR0_CLK 004:C7;004:C4

DDR0_CLKb 004:C7;004:C4

DDR1_CLK 004:F7;004:F4

DDR1_CLKb 004:F7;004:F4

DDR01_A[0-3]

DDR0_A[4-6]

DDR01_A[7-13]

004:A7;004:C4

DDR0_CLK

004:A7;004:C4

DDR0_CLKb

DDR01_CKE

R406

100

1%

DDR01_RASb

DDR01_CASb

DDR01_WEb

DDR01_BA0

DDR01_BA1

DDR01_BA2

DDR01_A[0-3,7-13]

DDR0_A[4-6]

DDR1_A[4-6]

DDR01_BA0

DDR01_BA1

DDR01_BA2

DDR01_CASb

DDR0_DQ[0-7]

DDR0_DM0 004:E6

DDR0_DM1

004:E3

DDR1_DM0

004:H6

DDR1_DM1

004:H3

DDR0_DQS0 004:E6

DDR0_DQS0b 004:E6

DDR0_DQS1 004:E3

DDR0_DQS1b 004:E3

DDR1_DQS0 004:H6

DDR1_DQS0b 004:H6

DDR1_DQS1 004:H3

DDR1_DQS1b 004:H3

DDR01_RASb

DDR01_WEb

DDR0_DQ[8-15]

DDR1_DQ[0-7]

DDR1_DQ[8-15]

* DDR_VTT

DDR_VTT

D3.3V

C426

10uF

16V

C425

10uF

16V

C417

10uF

10V

DDR1_VREF0

DDR0_VREF0

R414

0

R415

0

C419

10uF

10V

C413

0.1uF

16V

R418

10K

GND

1

EN

2

VTTS

3

VREF

4

IC404

BD35331F-E2

8

VTT

7

VTT_IN

6

VCC

5

VDDQ

R417

220

C422

1uF

10V

C411

0.1uF

16V

C412

0.1uF

16V

C423

10uF

10V

D1.8V

C416

10uF

10V

C420

0.1uF

16V

C418

1uF

10V

DDR01_ODT

004:A7;004:C7

DDR0_CLK

DDR0_VREF0

004:A7;004:C7

DDR0_CLKb

DDR01_CKE

004:A7;004:C7;004:F7;004:F4

DDR1_VREF0

DDR01_RASb

DDR01_CASb

DDR01_WEb

DDR01_BA0

DDR01_BA1

DDR01_BA2

DDR01_A[0-3,7-13]

DDR0_A[4-6]

DDR01_ODT

D1.8V

DDR01_A[0]

DDR01_A[1]

DDR01_A[2]

DDR01_A[3]

DDR0_A[4]

DDR0_A[5]

DDR0_A[6]

DDR01_A[7]

DDR01_A[8]

DDR01_A[9]

DDR01_A[10]

DDR01_A[11]

DDR01_A[12]

DDR01_A[13]

IC400

NT5TU128M8DE_BD

E8

F8

F2

CK

CK

CKE

F7

G7

F3

G8

RAS

CAS

WE

CS

G2

G3

G1

BA0

BA1

NC_1/BA2

K2

K8

K3

H2

K7

L2

L8

H8

H3

H7

J2

J8

J3

J7

A4

A5

A6

A7

A0

A1

A2

A3

A8

A9

A10/AP

A11

A12

A13

L3

L7

NC_2/A14

NC_3/A15

F9

ODT

DDR0_DQ[0-7] 004:B6

004:A7;004:F4 DDR1_CLK

VDDQ_1

VDDQ_2

VDDQ_3

VDDQ_4

VDDQ_5

VDD_1

VDD_2

VDD_3

VDD_4

VSSQ_1

VSSQ_2

VSSQ_3

VSSQ_4

VSSQ_5

VSS_1

VSS_2

VSS_3

VSS_4

VREF

VDDL

VSSDL

E2

E1

E7

A7

B2

B8

D2

D8

A3

E3

J1

K9

A9

C1

C3

C7

C9

A1

L1

E9

H9

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

D1

D9

B1

B9

C8

C2

D7

D3

DDR0_DQ[0]

DDR0_DQ[1]

DDR0_DQ[2]

DDR0_DQ[3]

DDR0_DQ[4]

DDR0_DQ[5]

DDR0_DQ[6]

DDR0_DQ[7]

DQS

DQS

DM/RDQS

NU/RDQS

B7

A8

B3

A2

004:A7;004:F4

DDR1_CLKb

DDR01_CKE

DDR01_RASb

DDR01_CASb

DDR01_WEb

D1.8V

DDR0_DQS0

DDR0_DQS0b

DDR0_DM0

004:A4

004:A4

004:A4

DDR01_BA0

DDR01_BA1

DDR01_BA2

DDR01_A[0-3,7-13]

004:B6;004:F3;004:I7

DDR1_A[4-6]

DDR0_VREF0

C449 C452

0.1uF

470pF

R407

100

1%

DDR01_A[0]

DDR01_A[1]

DDR01_A[2]

DDR01_A[3]

DDR1_A[4]

DDR1_A[5]

DDR1_A[6]

DDR01_A[7]

DDR01_A[8]

DDR01_A[9]

DDR01_A[10]

DDR01_A[11]

DDR01_A[12]

DDR01_A[13]

004:A7;004:C5;004:C2;004:F2;004:I4;004:I6

DDR01_ODT

NT5TU128M8DE_BD

E8

F8

F2

CK

CK

CKE

F7

G7

F3

G8

RAS

CAS

WE

CS

G2

G3

G1

BA0

BA1

NC_1/BA2

K2

K8

K3

H2

K7

L2

L8

H8

H3

H7

J2

J8

J3

J7

A4

A5

A6

A7

A0

A1

A2

A3

A8

A9

A10/AP

A11

A12

A13

L3

L7

NC_2/A14

NC_3/A15

F9

ODT

IC402

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

D1

D9

B1

B9

C8

C2

D7

D3

DQS

DQS

DM/RDQS

NU/RDQS

B7

A8

B3

A2

VDDQ_1

VDDQ_2

VDDQ_3

VDDQ_4

VDDQ_5

VDD_1

VDD_2

VDD_3

VDD_4

VSSQ_1

VSSQ_2

VSSQ_3

VSSQ_4

VSSQ_5

VSS_1

VSS_2

VSS_3

VSS_4

VREF

VDDL

VSSDL

E2

E1

E7

A7

B2

B8

D2

D8

A3

E3

J1

K9

A9

C1

C3

C7

C9

A1

L1

E9

H9

DDR1_DQ[0-7]

004:B5

DDR01_A[0-3,7-13]

DDR1_DQ[0]

DDR1_DQ[1]

DDR1_DQ[5]

DDR1_DQ[3]

DDR1_DQ[4]

DDR1_DQ[2]

DDR1_DQ[6]

DDR1_DQ[7]

D1.8V

DDR1_DQS0

DDR1_DQS0b

DDR1_DM0

004:A4

004:A3

004:A4

DDR1_A[4-6]

DDR0_A[4-6]

DDR1_VREF0

C463 C466

470pF 0.1uF

Close to IC

Close to IC

DDR_VTT

SI

DDR01_RASb

DDR01_A[2]

DDR01_CASb

DDR01_A[0]

DDR1_A[6]

75

AR400

R408

DDR01_A[12]

R409

DDR01_A[9]

DDR01_A[7]

DDR01_BA1

DDR01_BA0

DDR01_BA2

DDR01_WEb

DDR1_A[5]

DDR1_A[4]

DDR01_A[11]

DDR01_A[8]

75

AR401

DDR01_A[13]

DDR01_A[3]

AR402

DDR01_A[1]

DDR01_A[10]

75

AR403

DDR01_CKE

DDR01_ODT

75

AR404

R410

75

75

75

C485

0.1uF

C486

0.1uF

C487

0.1uF

C488

0.1uF

C489

0.1uF

C490

0.1uF

C499

0.1uF

75

C421

0.1uF

DDR_VTT

PI

DDR01_RASb

DDR01_A[2]

DDR01_A[0]

DDR0_A[6]

DDR01_A[3]

DDR01_A[1]

DDR01_A[10]

75

AR405

DDR01_BA1

75

DDR01_A[12]

AR406

DDR01_A[9]

DDR01_A[7]

DDR0_A[5]

DDR0_A[4]

DDR01_A[11]

75

AR407

DDR01_A[8]

DDR01_BA0

DDR01_A[13]

75

AR408

DDR01_BA2

DDR01_WEb

DDR01_CKE

DDR01_ODT

75

AR409

R404 75

C491

0.1uF

C483

0.1uF

C484

0.1uF

C492

0.1uF

C493

0.1uF

C494

0.1uF

IC401

NT5TU128M8DE_BD

E8

F8

F2

CK

CK

CKE

F7

G7

F3

G8

RAS

CAS

WE

CS

G2

G3

G1

BA0

BA1

NC_1/BA2

DDR01_A[0]

DDR01_A[1]

DDR01_A[2]

DDR01_A[3]

DDR0_A[4]

DDR0_A[5]

DDR0_A[6]

DDR01_A[7]

DDR01_A[8]

DDR01_A[9]

DDR01_A[10]

DDR01_A[11]

DDR01_A[12]

DDR01_A[13]

K2

K8

K3

H2

K7

L2

L8

H8

H3

H7

J2

J8

J3

J7

A0

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10/AP

A11

A12

A13

L3

L7

NC_2/A14

NC_3/A15

F9

ODT

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

D1

D9

B1

B9

C8

C2

D7

D3

DDR0_DQ[9]

DDR0_DQ[8]

DDR0_DQ[12]

DDR0_DQ[13]

DDR0_DQ[15]

DDR0_DQ[11]

DDR0_DQ[10]

DDR0_DQ[14]

DQS

DQS

DM/RDQS

NU/RDQS

B7

A8

B3

A2

VDDQ_1

VDDQ_2

VDDQ_3

VDDQ_4

VDDQ_5

VDD_1

VDD_2

VDD_3

VDD_4

A9

C1

C3

C7

C9

A1

L1

E9

H9

VSSQ_1

VSSQ_2

VSSQ_3

VSSQ_4

VSSQ_5

VSS_1

VSS_2

VSS_3

VSS_4

A7

B2

B8

D2

D8

A3

E3

J1

K9

VREF

VDDL

VSSDL

E2

E1

E7

D1.8V

DDR0_VREF0

C450

DDR0_DQS1

DDR0_DQS1b

DDR0_DM1

C453

0.1uF

470pF

DDR0_DQ[8-15]

DDR1_CLK

DDR1_CLKb

DDR01_CKE

DDR01_RASb

DDR01_CASb

DDR01_WEb

DDR01_BA0

DDR01_BA1

004:A4

004:A4

004:A4

DDR01_BA2

DDR01_A[0-3,7-13]

DDR1_A[4-6]

004:B6;004:F6;004:I7

DDR01_ODT

DDR01_A[0]

DDR01_A[1]

DDR01_A[2]

DDR01_A[3]

DDR1_A[4]

DDR1_A[5]

DDR1_A[6]

DDR01_A[7]

DDR01_A[8]

DDR01_A[9]

DDR01_A[10]

DDR01_A[11]

DDR01_A[12]

DDR01_A[13]

E8

F8

F2

CK

CK

CKE

F7

G7

F3

G8

RAS

CAS

WE

CS

G2

G3

G1

BA0

BA1

NC_1/BA2

K2

K8

K3

H2

K7

L2

L8

H8

H3

H7

J2

J8

J3

J7

A0

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10/AP

A11

A12

A13

L3

L7

NC_2/A14

NC_3/A15

F9

ODT

IC403

NT5TU128M8DE_BD

DDR1_DQ[8-15]

004:B5

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

D1

D9

B1

B9

C8

C2

D7

D3

DDR1_DQ[9]

DDR1_DQ[8]

DDR1_DQ[12]

DDR1_DQ[13]

DDR1_DQ[15]

DDR1_DQ[14]

DDR1_DQ[10]

DDR1_DQ[11]

DQS

DQS

DM/RDQS

NU/RDQS

B7

A8

B3

A2

VDDQ_1

VDDQ_2

VDDQ_3

VDDQ_4

VDDQ_5

VDD_1

VDD_2

VDD_3

VDD_4

A9

C1

C3

C7

C9

A1

L1

E9

H9

VSSQ_1

VSSQ_2

VSSQ_3

VSSQ_4

VSSQ_5

VSS_1

VSS_2

VSS_3

VSS_4

A7

B2

B8

D2

D8

A3

E3

J1

K9

VREF

VDDL

VSSDL

E2

E1

E7

D1.8V

DDR1_DQS1

DDR1_DQS1b

DDR1_DM1

DDR1_VREF0

C464 C467

470pF 0.1uF

004:A3

004:A3

004:A4

C496

0.1uF

C497

0.1uF

C498

0.1uF

SI

Close to IC

Close to IC

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

HONG YEON HYUK

BCM (EUROBBTV)

DDR Memory

4

2009.06.18

LGE Internal Use Only

EARPHONE BLOCK - spec out

COMPONENT

[GN]E-LUG

6A

5A

[GN]O-SPRING

[GN]CONTACT

4A

[BL]E-LUG-S

7B

[BL]O-SPRING

5B

[RD]E-LUG-S

7C

[RD]O-SPRING_1

5C

[WH]O-SPRING

5D

[RD]CONTACT

4E

[RD]O-SPRING_2

5E

[RD]E-LUG

PPJ234-01

JK900

6E

+3.3V_NORMAL

D903

5.1V

D910

5.1V

R902

10K

D900

5.6V

R903

1K

C931

100pF

50V

C932

27pF

50V

D904 5.5V

C933

27pF

50V

D901

5.6V

D902

5.6V

C934

27pF

50V

C935

25V

R907

470K

1uF

C936

25V

R961

470K

1uF

L904

270nH

C904

27pF

50V

L903

270nH

L902

270nH

C906

27pF

50V

C905

27pF

50V

R910

0

C939

100pF

50V

R909

0

C937

100pF

50V

COMP1_DET

COMP1_Y

COMP1_Pb

COMP1_Pr

COMP1_L_IN

COMP1_R_IN

Rear CVBS

REAR_AV

JK902

PPJ233-01

5C

[RD]E-LUG

4C

[RD]O-SPRING

3C

[RD]CONTACT

4B

[WH]C-LUG

3A

[YL]CONTACT

4A

[YL]O-SPRING

5A

[YL]E-LUG

REAR_AV

D907

5.6V

REAR_AV

D906

5.1V

REAR_AV

D911

5.1V

REAR_AV

R957

0

D908

5.6V

REAR_AV

REAR_AV

R920

470K

REAR_AV

C909

47pF

50V

REAR_AV_CVBS

D909

5.6V

REAR_AV

R921

470K

REAR_AV

+3.3V_NORMAL

REAR_AV

C910

100pF

50V

REAR_AV

R925

10K

REAR_AV

R926

1K

C941

25V

1uF

REAR_AV

R928

0

REAR_AV

REAR_AV_DET

C916

100pF

50V

REAR_AV

REAR_AV_R_IN

C940

25V

1uF

REAR_AV

REAR_AV

R927

0

REAR_AV

C915

100pF

50V

REAR_AV_L_IN

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

EUROBBTV

ETC SUB BOARD I/F

2009.06.18

9

LGE Internal Use Only

Motion Remote controller

Motion Remocon Interface

P1700

12507WR-08L

4

5

6

7

8

1

2

3

9

+3.3V_NORMAL

+3.3V_NORMAL

L1700

120-ohm

BLM18PG121SN1D

R1700

100

R1701

100

R1702

100

R1703

100

R1704

100

M_REMOTE_RX

9:F3;9:G4

M_REMOTE_TX

9:F3;9:G4

M_RFModule_RESET

9:F3;9:G4

DC

9:F3;9:G3

DD 9:F3;9:G3

M_REMOTE

ALL M_REMOTE OPTION

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

GP2_BCM_ATSC

MOTION_REMOCON

09/10/xx

20 100

LGE Internal Use Only

+24V_AMP

Sub AMP.

+3.3V_NORMAL

C2136

0.1uF

50V

C2146

10uF

35V

3AMP OPT

R2121

3.3

3AMP OPT

C2155

0.01uF

50V

C2154

0.1uF

50V

C2149

22000pF

50V

R2162

0

3AMP OPT

POWER_DET

D2100

1N4148W

100V

3AMP OPT

D2101

1N4148W

100V

3AMP OPT

R2127

12

C2158

390pF

50V

R2136

12

C2159

390pF

50V

R2128

12

R2134

12

L2104

C2134

22000pF

50V

AUD_LRCH

AUD_LRCK

AUD_SCK

SDA2_3.3V

SCL2_3.3V

AMP_RESET_N

+1.8V_AMP

L2100

AUD_MASTER_CLK

+1.8V_AMP

L2102

C2111

1000pF

50V

R2100

56

C2110

100pF

C2118

0.1uF

C2106

100pF

50V

C2115

1000pF

50V

R2157

3.3K

3AMP OPT

C2100

10uF

10V

C2102

0.1uF

16V

3AMP OPT

C2104

10uF

10V

C2107

0.1uF

16V

R2161

10K

BST1A

C2128

1uF

VDR1A

25V

/RESET

AD

DGND_1

GND_IO

CLK_I

VDD_IO

DGND_PLL

AGND_PLL

LF

AVDD_PLL

DVDD_PLL

GND

9

10

11

12

13

14

7

8

5

6

3

4

1

2

THERMAL

57

IC2100

NTP-7000

EAN60969601

+1.8V_AMP

3AMP OPT

C2125

10uF

10V

C2132

0.1uF

16V

C2140

1uF

25V

R2101

R2102

R2103

R2104

R2105

100

100

100

100

100

C2138

1000pF

50V

C2142

22000pF

50V

C2144

1uF

25V

42

41

40

39

38

37

36

35

34

33

32

31

30

29

NC

VDR2A

BST2A

PGND2A_2

C2148

25V 1uF

PGND2A_1

OUT2A_2

OUT2A_1

PVDD2A_2

PVDD2A_1

PVDD2B_2

PVDD2B_1

OUT2B_2

OUT2B_1

PGND2B_2

C2152

22000pF

50V

+24V_AMP

D2102

1N4148W

100V

3AMP OPT

D2103

1N4148W

100V

3AMP OPT

R2129

12

C2160

390pF

50V

C2161

390pF

50V

R2130

12

R2135

12

R2133

12

C2157

10uF

35V

OPT

C2114

33pF

50V

OPT

C2120

33pF

50V

C2122

22pF

50V

C2124

22pF

50V

C2130

22pF

50V

3AMP OPT 3AMP OPT 3AMP OPT R2118 100

AMP_MUTE1

2S

L2107

AD-9060

2F

1S 1F

15uH

2S

L2106

AD-9060

2F

1S 1F

15uH

+24V_AMP

Woofer AMP.

+3.3V_NORMAL

C2137

0.1uF

50V

C2147

10uF

35V

3AMP OPT

R2122

3.3

3AMP OPT

C2156

0.01uF

50V

D2104

1N4148W

100V

3AMP OPT

D2105

1N4148W

100V

3AMP OPT

R2131

12

C2162

390pF

50V

C2163

390pF

50V

R2132

12

R2138

12

R2137

12

L2105

C2135

22000pF

50V

AUD_LRCH

AUD_LRCK

AUD_SCK

SDA2_3.3V

SCL2_3.3V

AMP_RESET_N

+1.8V_AMP

L2101

AUD_MASTER_CLK

+1.8V_AMP

L2103

C2112

1000pF

50V

R2111

56

C2113

100pF

C2119

0.1uF

C2108

100pF

50V

C2117

1000pF

50V

R2158

3.3K

3AMP OPT

C2101

10uF

10V

C2103

0.1uF

16V

3AMP OPT

C2105

10uF

10V

C2109

0.1uF

16V

C2129

1uF

BST1A

VDR1A

25V

/RESET

AD

DGND_1

GND_IO

CLK_I

VDD_IO

DGND_PLL

AGND_PLL

LF

AVDD_PLL

DVDD_PLL

GND

+1.8V_AMP

3AMP OPT

C2127

10uF

10V

C2133

0.1uF

16V

R2106

R2107

R2108

R2109

R2110

100

100

100

100

100

OPT

C2116

33pF

50V

OPT

C2121

33pF

50V

C2123

22pF

50V

C2126

22pF

50V

C2131

22pF

50V

3AMP OPT 3AMP OPT 3AMP OPT

8

9

10

11

12

13

14

5

6

3

4

7

1

2

THERMAL

57

IC2101

NTP-7000

EAN60969601

C2141

1uF

25V

C2139

1000pF

50V

C2143

22000pF

50V

C2145

1uF

25V

42

41

40

39

38

37

36

35

34

33

32

31

30

29

NC

VDR2A

BST2A

PGND2A_2

PGND2A_1

OUT2A_2

OUT2A_1

C2150

25V 1uF

PVDD2A_2

PVDD2A_1

PVDD2B_2

PVDD2B_1

OUT2B_2

OUT2B_1

PGND2B_2

C2153

22000pF

50V

R2124

4.7K

+24V_AMP

R2120

C2151

22000pF

50V

R2119

0

3AMP OPT

100

R2123

4.7K

POWER_DET

AMP_MUTE1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

2S

L2108

AD-9060

2F

1S 1F

15uH

C2164

0.47uF

50V

C2167

0.1uF

50V

C2168

0.1uF

50V

R2139

4.7K

R2140

4.7K

C2173

0.01uF

50V

3AMP OPT

3.3

3.3

C2174

0.01uF

50V

3AMP OPT

SPK2_L+

SPEAKER2_L

SPK2_L-

SPK2_R+

SPK2_L+

SPK2_L-

SPK2_R+

SPK2_R-

R2151

0

R2152

0

R2153

0

R2154

0

C2165

0.47uF

50V

C2169

0.1uF

50V

R2141

4.7K

C2170

0.1uF

50V

R2142

4.7K

0.01uF

50V

3.3

3.3

C2176

0.01uF

50V

3AMP OPT

SPK2_R-

SPEAKER2_R

WAFER-ANGLE

4

3

2

1

P2101

C2166

0.47uF

50V

C2171

0.1uF

50V

C2172

0.1uF

50V

R2143

4.7K

R2144

4.7K

C2177

0.01uF

50V

3AMP OPT

3.3

3.3

C2178

0.01uF

50V

3AMP OPT

SPK_Woofer+

SPK_Woofer-

Woofer

SPK_Woofer-

SPK_Woofer+

R2156

0

R2155

0

3AMP

1

2

FW25001-02(SPK 2P)

P2100

Development Item(Slim Depth)

GP2_BCM_ATSC

AMP_SUB_NTP

09.10

21 100

LGE Internal Use Only

LG LOGO FOR LE9500

LED_B/LG_LOGO

+5V_NORMAL

1/10W

33

R2299

+3.5V_ST

1/10W

0

R2298

P2200

12507WR-04L

3

4

1

2

5

B

D2200

CDS3C05HDMI1

5.6V

OPT

C

Q2200

2SC3052

E

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

GP2_BCM_ATSC

LG_LOGO_LE9500

09/10/xx

22 100

LGE Internal Use Only

SIDE IR Emitter sync USB JACK

P2402

12507WR-03L

1

2

3

4

L2403

120-ohm

+5V_USB

D2403

5.5V

3DTV

R2404

0

3DTV

C2401

10pF

50V

3DTV

3D_SYNC_OUT

78:T9

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

GP2_BCM_ATSC

3D_IR_GENDER

09/11/18

24 100

LGE Internal Use Only

VERTICAL_NIM

TU2701-*1

TDFR-G155D

31

SHIELD

1

RF_S/W_CNTL

BST_CNTL

2

+B1[5V]

3

NC[RF_AGC]

4

AS

5

SCL[A_DEMOD]

6

SDA[A_DEMOD]

7

NC(IF_TP)

8

SIF

9

NC

10

VIDEO

11

GND

12

1.2V

13

3.3V

14

RESET

15

2.5V

16

SCL[D_DEMOD]

17

SDA[D_DEMOD]

18

ERR

19

SYNC

20

VALID

21

MCL

22

D0

23

D1

24

D2

25

D3

26

D4

27

D5

28

D6

29

D7

30

31

CN_VERTICAL_LGS8G85

TU2701-*2

TDFR-C155D

1

RF_S/W_CNTL

BST_CNTL

2

+B1[+5V]

3

NC[RF_AGC]

4

NC_1

5

SCLT

6

SDAT

7

NC_2

8

SIF

9

NC_3

10

VIDEO

11

GND

12

+B2[1.2V]

13

+B3[3.3V]

14

RESET

15

NC_4

16

SCL

17

SDA

18

ERR

19

SYNC

20

VALID

21

MCL

22

D0

23

D1

24

D2

25

D3

26

D4

27

D5

28

D6

29

D7

30

SHIELD

CAN H-NIM/NIM TUNER for EU

HORIZONTAL_NIM

TU2701

TDFR-G135D

31

SHIELD

EU_VERTICAL_NIM_T2

TU2701-*4

TDFR-G055D

1

RF_S/W_CNTL

BST_CNTL

2

+B1[5V]

3

NC[RF_AGC]

4

AS

5

SCL[A_DEMOD]

6

SDA[A_DEMOD]

7

NC(IF_TP)

8

SIF

9

NC

10

VIDEO

11

GND

12

1.2V

13

3.3V

14

RESET

15

2.5V

16

SCL[D_DEMOD]

17

SDA[D_DEMOD]

18

ERR

19

SYNC

20

VALID

21

MCL

22

D0

23

D1

24

D2

25

D3

26

D4

27

D5

28

D6

29

D7

30

31

CN_HORIZONTAL_LGS8G85

TU2701-*3

TDFR-C135D

1

RF_S/W_CNTL

BST_CNTL

2

+B1[+5V]

3

NC[RF_AGC]

4

NC_1

5

SCLT

6

SDAT

7

NC_2

8

SIF

9

NC_3

10

VIDEO

11

GND

12

+B2[1.2V]

13

+B3[3.3V]

14

RESET

15

+B4[2.5V]

16

SCL

17

SDA

18

ERR

19

SYNC

20

VALID

21

MCL

22

D0

23

D1

24

D2

25

D3

26

D4

27

D5

28

D6

29

D7

30

SHIELD

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Tuner ( Full Nim )

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

R2754

CN

0

RF_SWITCH_CTL

R2720 0

31

1

2

3 close to TUNER

RF_S/W_CNTL

BST_CNTL

C2701

0.1uF

16V

4

NC[RF_AGC]

AS

5

6

+B1[5V]

SCL[A_DEMOD]

R2700 0

OPT

SDA[A_DEMOD]

7

NC(IF_TP)

8

SIF

9

C2702

0.1uF

16V close to TUNER

NC

10

+5V_TU

C2704

100pF

50V

C2706

0.1uF

16V

VIDEO

11

GND

+3.3V_TU

12

+1.2V_TU

13

1.2V

3.3V

CN

C2737

4700pF

50V

CN

C2738

1000pF

50V

C2700

100pF

50V

14

C2703

0.1uF

16V

C2705

100pF

50V

C2707

0.1uF

16V

RESET

15

16

2.5V

C2733

0.1uF

SCL[D_DEMOD]

R2701 0

17

SDA[D_DEMOD]

18

ERR

19

SYNC

20

VALID

21

MCL

22

23

24

25

26

27

28

29

30

SHIELD

D0

D1

D2

D3

D4

D5

D6

D7

C2708

0.1uF

16V

OPT

C

Q2700

2SC3052

OPT

E

C2709

10uF

10V

OPT

B

+2.5V_TU

CN R2757

CN R2717

CN R2716

CN

R2711

CN

R2709

CN R2708

CN R2707

CN

R2710

CN R2705

CN

R2706

CN R2704

CN

R2703

EU R2757-*1

47

0

EU

R2717-*1

47

0

EU

R2716-*1

47

0

EU R2711-*1

47

0

0

EU R2709-*1

47

EU R2708-*1

47

0

EU

R2707-*1

47

0

0

EU

R2710-*1

47

EU

R2705-*1

47

0

EU R2706-*1

47

0

EU

R2704-*1

47

0

0

EU

R2703-*1

47

R2721

100

OPTION : RF AGC

R2724

10K

OPT

+3.3V_TU

R2723

100K

TUNER_RESET

C2710

0.1uF

16V

FE_TS_ERR

C2712

18pF

50V

FE_TS_SYNC

FE_TS_VAL

IF_AGC_SEL

C2711

10pF

50V

C2713

10pF

50V

33 R2726

C2714

18pF

50V

33

R2727

R2728

R2729

FE_TS_DATA_CLK

FE_TS_DATA[0]

FE_TS_DATA[1]

FE_TS_DATA[2]

FE_TS_DATA[3]

FE_TS_DATA[4]

FE_TS_DATA[5]

FE_TS_DATA[6]

FE_TS_DATA[7]

33

33

Close to the tuner

R2722

CN

0

C2790

10pF

50V

OPT

C2791

10pF

50V

OPT

R2736 0

SCL2_3.3V

SDA2_3.3V

FE_TS_DATA[0-7]

FE_TS_SERIAL

SCL0_3.3V

SDA0_3.3V

+5V_TU

L2700

BLM18PG121SN1D

R2738

0

E

C2718

0.01uF

25V

C

Q2701

ISA1530AC1

R2740

2.2K

B

Q2703

2SC3052

C

E

R2742

10K

B

R2755

10K

LNA2_CTL/BOSTER_CTL

B

B

+5V_TU

R2739

200

E

C

Q2702

ISA1530AC1

+5V_TU

R2702

200

E

R2741

200

R2712

200

R2743

4.7K

C

Q2705

ISA1530AC1

+5V_TU

R2746

470

E

B

R2749

82

C

Q2704

ISA1530AC1

TU_CVBS

ATV_OUT

+3.3V_NORMAL

+3.3V_TU

L2702

CIC21J501NE

C2722

0.1uF

16V

C2724

0.1uF

16V

C2728

22uF

10V

+5V_NORMAL

L2701

BLM18PG121SN1D

+5V_TU

C2721

0.1uF

16V

C2725

0.1uF

16V

C2727

10uF

16V

C2729

22uF

10V

C2734

0.1uF

16V

TU_SIF

+3.3V_TU

L2703

CIC21J501NE

60mA

200mA

C2715

22uF

10V

FE_TS_VAL

FE_TS_ERR

CN

R2713-*1

56K

1/8W

1%

EU

R2713

75K

1/8W

1%

R2

IN_B 1

IN_A 2

GND 3

IC2702

NL17SZ08DFT2G

1 DVB_T/C 5

2

3

IC2702-*1

TC7SZ02FU

DVB_T2

5 VCC

4 OUT_Y

4

+3.3V_TU

C2736

0.1uF

16V

R2758

47

CN

R2731-*1

0

1/16W

5%

CN

R2756-*1

30K

1/10W

1%

C2716

FB

1

GND

2

IN

3

BS

4

IC2701

MP2212DN

100pF

50V EU

R2731

1%

22K

Close to IC

EU

R2756

18K

R1

1%

8

EN/SYNC

10K

R2732

SW_2

POWER_ON/OFF2_2

Reduce analog beat noise

NR8040T3R6N

3A

7

6

SW_1

3.6uH

L2704

C2730

22uF

10V

VCC

5

C2720

0.1uF

16V

R2719

R2718

10

1/10W

1%

0

C2717

1uF

10V

Vout=0.8*(1+R1/R2)

+3.3V_TU

+2.5V_TU

IC2700

AZ2940D-2.5TRE1

C2719

0.1uF

16V

VIN

1

$0.11

2

3

GND

VOUT

R2744

1

C2723

10uF

10V

C2726

0.1uF

16V

FE_TS_VAL_ERR

+1.2V_TU

C2731

0.1uF

C2735

10uF

16V

27

LGE Internal Use Only

USB2 OPTION

C2208 15pF C2210 15pF

R2202

1M

1%

X2201

24MHz

+3.3V_NORMAL

L2201

BLM18PG121SN1D

+3.3V_USB

+3.3V_USB

+3.3V_USB

C2201

1uF

10V

C2202

0.1uF

USB_DM1

USB_DP1

USB_DM2

USB_DP2

C2203

0.1uF

C2204

0.1uF

USBDN1_DM

USBDN1_DP

USBDN2_DM

C2205

0.1uF

USBDN2_DP

VDDA33_1

NC_1

NC_2

NC_3

6

7

8

NC_4

9

4

5

1

2

3

THERMAL

37

IC2201

USB2512A_AEZG

27

26

25

VBUS_DET

RESET_N

HS_IND/CFG_SEL1

SCL/SMBCLK/CFG_SEL0

VDD33

C2212

0.1uF

R2209

100K

OPT

R2214

0

/RST_HUB

R2210

100K

C2215

0.1uF

OPT

R2212 100K OPT

+3.3V_USB

24

23

22

21

20

SDA/SMBDATA/NON_REM1

NC_8

NC_7

19

NC_6

0

0

R2211

R2213

100K OPT

100K OPT

R2207

OPT

R2208

OPT

SCL2_3.3V

SDA2_3.3V

+3.3V_USB

C2213

0.1uF

C2214

4.7uF

USB / DVR Ready

L2202

MLB-201209-0120P-N2

C2218

120-ohm

100uF

16V

IC2202

AP2191SG-13

NC

8

OUT_2

7

OUT_1

6

FLG

1

5

EAN60921001

4

GND

2

IN_1

3

IN_2

EN

KJA-UB-4-0004

JK2201

R2225 0

+3.3V_NORMAL

R2220

4.7K

OPT

USB_CTL1

R2226

2.7K

C2220

10uF

10V

/USB_OCD1

+5V_USB

C2222

0.1uF

USB_DM1

USB_DP1

D2201

CDS3C05HDMI1

5.6V

D2203

CDS3C05HDMI1

5.6V

USB

KJA-UB-4-0004

JK2202

L2203

MLB-201209-0120P-N2

C2219

120-ohm

100uF

16V

IC2203

AP2191SG-13

NC

8

OUT_2

7

OUT_1

6

FLG

5

EAN60921001

1

GND

2

IN_1

3

IN_2

4

EN

R2227 0

D2202

CDS3C05HDMI1

5.6V

D2204

CDS3C05HDMI1

5.6V

+3.3V_NORMAL

R2221

4.7K

OPT

USB_CTL2

USB_DM2

USB_DP2

+5V_USB

R2223

2.7K

C2221

10uF

10V

C2223

0.1uF

/USB_OCD2

040:J6

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

USB

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

40

LGE Internal Use Only

FIX-TER

11

PPJ-230-01

JK4101

CN

13

[GN]GND

10

[GN]G

9

[GN]C_DET

8

[BL]B

7

[RD]R

6

[WH]L_IN

5

[RD]R_IN

4

[RD]MONO

AV_DET

22

21

COM_GND

20

SYNC_IN

19

SYNC_OUT

18

SYNC_GND2

SYNC_GND1

17

16

RGB_IO

15

R_OUT

14

RGB_GND

13

12

R_GND

R4168

D2B_OUT

EU

0

11

G_OUT

10

9

D2B_IN

G_GND

8

ID

B_OUT

7

6

AUDIO_L_IN

B_GND

5

AUDIO_GND

4

AUDIO_L_OUT

3

AUDIO_R_IN

2

1

AUDIO_R_OUT

PSC008-01

JK4100

EU

[SCART2 PIN 8]

EU_SCART [OPT]

SC_RE1

SC_RE2

+12V

R4152

4.7K

EU

EU

R4154

1K

EU

R4155

1K

B

R4156

10K

EU

R4157

0

EU

EU

B

R4160

EU 0

B

R4159

12K

C

EU

Q4110

2SC3052

E

C

EU

Q4108

2SC3052

E

C

EU

Q4111

2SC3052

E

REC_8

+12V

+5V_NORMAL

D4101

30V

OPT

D4107

5.6V

CN

EU

R4164

12

EU

R4112

75

D4102

5.6V

OPT

D4106

30V

OPT

D4103

5.6V

CN

CN

D4113

5.1V

D4104

5.1V

CN

EU

R4101

75

1%

EU

R4104

75

1%

270nH CN

R4108-*1

CM2012FR27KT

CN

C4147

27pF

50V

R4108

0 EU

EU

CN

C4148

27pF

50V

R4111

75

1%

D4110

5.6V

CN

EU

R4102

75

1%

D4109

5.6V

CN

R4103

470K

D4108

5.6V

CN

R4100

470K

C4105

25V

1uF

C4104

25V

1uF

D4100

5.6V

OPT

L4100

BLM18PG121SN1D

EU

D4105

5.6V

OPT

L4101

BLM18PG121SN1D

EU

C4100

1000pF

50V

EU

R4105

0

EU

1/16W

5%

EU

R4107

0

1/16W

5%

EU

C4101

1000pF

50V

EU

C4107

4700pF

50V

EU

C4108

4700pF

50V

EU

R4115

62

EU

C4113

47pF

50V

EU

R4123

0

R4116

0

R4113

0

C4112

100pF

50V

SC1_B

OPT

D4111

30V

C4111

100pF

50V

EU

EU

SC1_R

R4122

22

C4114

100uF

16V

SC1_G

SC1_L_IN

C4115

220pF

50V

OPT

SC1_R_IN 002:C6

+3.3V_NORMAL

R4126

10K

C4116

0.1uF

16V

R4129

1K

EU

R4128

0

EU

30V

D4112

EU

R4127

15K

EU

R4130

3.9K

SCART1_DET

SC1_CVBS_IN

EU

ISA1530AC1

Q4104

E

C

EU

R4135

470

B

EU

R4133

390

C

EU

Q4105

2SC3052

B

E

EU

R4132

390

Rf

Rg

Gain=1+Rf/Rg

EU

R4134

180

EU

R4136

47K EU

C4117

47uF

16V

EU

R4137

15K

SC1_FB

R4131

0

OPT

EU

R4138

0

EU

L4105

EU

C4118

0.1uF

16V

EU

C4119

0.1uF

16V

EU

C4134

0.1uF

16V

REC_8

SC1_ID

EU

R4163

10K

SELECT

6

VCC

5

A

4

IC4101

NLASB3157DFT2G

EU

1

B1

2

GND

3

B0

Selece = High ==> A = B1

Selece = Low ==> A = B0

DTV_ATV_SELECT

ATV_OUT

DTV/MNT_V_OUT

+12V

Audio Out Amp

+12V

EU

C4120

0.1uF

16V

DTV/MNT_L_OUT

OPT

R4141

68K

OPT

R4142

68K

C4122

33pF

OPT

EU

EU_SCART [OPT]

EU

R4146

1K

C4123

10uF

16V

C4126

6800pF

50V

EU

EU

R4149

33K

C4127

33pF

1

2

1

2

EU R4176

10K EU

SCART1_Lout_N

SCART1_Lout_P

EU

5.6K

R4148

5.6K

R4147

EU

3

3

4

4

SCART1_Rout_P

SCART1_Rout_N

5.6K

EU

R4143

5.6K

EU

R4144

EU

R4150

33K

5

5

6

6

IC4100

LM324D

14

14

13

13

12

12

11

11

10

10

9

9

7

7 8

8

OPT

R4139

68K

OPT

R4140

68K

C4121

33pF

OPT

DTV/MNT_R_OUT

C4128 33pF

R4177

10K EU

EU

C4124

10uF

16V

R4145

1K

EU

EU

C4125

6800pF

50V

DTV/MNT_L_OUT

041:F4;041:G2

DTV/MNT_R_OUT

041:F3;041:G2

DTV/MNT_L_OUT

DTV/MNT_R_OUT

Q4106

2SC3052

EU

Q4107

2SC3052

EU

EU

R4151

2K

1/16W

3

RT1P141C-T112

Q4109

EU

1

2

EU

C4130

0.1uF

SCART1_MUTE

For Frequency Response

EU

R4153

2K

1/16W

EARPHONE BLOCK

EARPHONE AMP - Spec out

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

EUROBBTV

ETC SUB BOARD I/F

2009.06.18

41

LGE Internal Use Only

CI CONTROL BUFFER

016:G13;016:AJ2

016:T13;016:AJ2

016:H12

016:T12

016:G13

016:T13

/CI_CE1

/CI_CE2

/CI_WE

/CI_IOWR

/CI_OE

/CI_IORD

CI

D3.3V

VCC

20

OE2

19

O0

18

O1

17

O2

16

O3

15

O4

14

O5

13

O6

12

O7

11

IC4500

MC74LCX541DTR2G

1

OE1

CI

2

D0

3

D1

4

D2

5

D3

6

D4

7

D5

8

D6

9

D7

10

GND

D3.3V

EBI_CS

007:E7;007:E6;016:AL23

/CI_SEL 007:H5

NAND_WEb

NAND_ALE

007:C2;007:E5

EBI_WE

NAND_REb

007:E6

007:C3;007:E6

007:C2;007:E6

CI

AR4515

10K

CI

AR4517

10K

CI

AR4501

10K

CI

AR4504

10K

CI_A[0]

CI_A[1]

CI_A[2]

CI_A[3]

CI_A[4]

CI_A[5]

CI_A[6]

CI_A[7]

CI_A[8]

CI_A[9]

CI_A[10]

CI_A[11]

CI_A[12]

CI_A[13]

CI_A[0-13]

007:E7;016:C13

CI POWER ENABLE CONTROL

+5V_NORMAL

S

Q4501

RSR025P03

D

CI

0.1uF

16V

R4512

10K

OPT

C4509

4.7uF

16V

CI

G

CI_5V_CTL

007:H7 [GP27]

R4526

2.2K

CI

R4513

10K

B CI

C

E

Q4500

2SC3052

CI

C4508

47uF

16V

+5V_CI_Vs

CI

C4510

0.1uF

16V

007:E6

EBI_RW

016:F16

CI_D[0-7]

D3.3V

CI_D[0]

CI_D[1]

CI_D[2]

CI_D[3]

CI_D[4]

CI_D[5]

CI_D[6]

CI_D[7]

CI

1

A0

2

A1

3

A2

4

A3

5

A4

6

A5

7

A6

8

A7

9

GND

10

IC4501

74LVC245A

20

VCC

19

OE

18

B0

17

B1

16

B2

15

B3

14

B4

13

B5

12

B6

11

B7

NAND_DATA[0]

NAND_DATA[1]

NAND_DATA[2]

NAND_DATA[3]

NAND_DATA[4]

NAND_DATA[5]

NAND_DATA[6]

NAND_DATA[7]

EBI_CS

007:E7;007:E6;016:K26

NAND_DATA[0-7]

016:AG22

CI_D[0-7]

CI_D[3]

CI_D[4]

CI_D[5]

CI_D[6]

AR4511

33

CI

CI_A[0-14]

CI_D[7]

CI_D[0]

CI_D[1]

CI_D[2]

AR4507

33 CI

47

47

CI

R4501

CI

R4502

CI_A[10]

CI_A[11]

CI_A[9]

CI_A[8]

CI_A[13]

CI_A[14]

CI_A[12]

33

AR4518

CI

CI

AR4509

33

/CI_CE1

/CI_OE

/CI_WE

/CI_IREQ

[GP39]

007:H5;016:AJ3

47

CI

CI

R4500

CI_A[7]

CI_A[6]

CI_A[5]

CI_A[4]

CI_A[3]

CI_A[2]

CI_A[1]

CI_A[0]

33

AR4506

CI

CI

AR4513

33

016:AJ3 [GP41] /CI_IOIS16

+5V_CI_Vs

C4502

0.1uF

R4505

0

CI

R4504

OPT

100

CI

14

15

16

17

18

19

20

21

22

23

28

29

30

31

32

24

25

26

27

33

34

8

9

5

6

7

10

11

12

13

3

4

1

2

P4500

10067972-000LF

G1 69 G2

48

49

50

51

52

44

45

46

47

53

54

55

56

57

62

63

64

65

66

58

59

60

61

67

68

39

40

41

42

43

35

36

37

38

R4507 100

OPT

R4506

OPT

C4503

0.1uF

100

/CI_INPACK

CI

0 R4508

R4510

100

CI

C4505

0.1uF

CI

/CI_CD1

007:H6;016:AJ3

R4509

100

CI

CI

AR4502 33

CI

CI

AR4512 33

47

CI

R4511

CI

CI_OUTCLK,CI_OUTDATA[0-7],CI_OUTSTART,CI_OUTVALID

CI_OUTDATA[4]

CI_OUTDATA[5]

CI_OUTDATA[6]

CI_OUTDATA[7]

/CI_CE2

/CI_VS1

/CI_IORD

/CI_IOWR

016:H25;016:AJ2

[GP26] 016:AJ3

016:H24

016:H25

CI

FE_TS_DATA[0]

FE_TS_DATA[1]

FE_TS_DATA[2]

FE_TS_DATA[3]

AR4516

CI

33

FE_TS_DATA[4]

FE_TS_DATA[5]

FE_TS_DATA[6]

FE_TS_DATA[7]

AR4505 33

007:G6;016:AJ2

CI_MOD_RESET [GP49]

/CI_WAIT 007:E6;016:AJ3

CI_OUTCLK

CI_OUTVALID

CI_OUTSTART

FE_TS_DATA[0-7]

AR4514 33

CI

CI_OUTDATA[0]

CI_OUTDATA[1]

CI_OUTDATA[2]

CI_OUTDATA[3]

AR4520 33

[GP38]

/CI_CD2

007:H5;016:AJ2

CI

AR4519

33

FE_TS_SYNC

FE_TS_VAL_ERR

FE_TS_DATA_CLK

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

DVB-CI PULL-DOWN (Near CI Slot)

016:O9

/CI_INPACK

External Demod.

DVB-CI PULL-UP (Near CI Slot)

+5V_NORMAL

/CI_IOIS16

/CI_IREQ

/CI_VS1

/CI_WAIT

CI_OUTCLK

/CI_CD1

/CI_CD2

/CI_CE1

/CI_CE2

CI_MOD_RESET

EUROBBTV

CI

2009.06.18

45

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

[51Pin LVDS Connector]

(For FHD 60/120Hz)

P7800

TF05-51S

TM480Hz

52

45

46

47

42

43

44

39

40

41

36

37

38

48

49

50

51

32

33

34

35

29

30

31

26

27

28

23

24

25

20

21

22

17

18

19

14

15

16

11

12

13

8

9

10

5

6

7

1

2

3

4

PANEL_VCC

L7800

120-ohm

TM480Hz

C7800

10uF

25V

OPT

C7801

1000pF

50V

TM480Hz

C7802

0.1uF

50V

TM480Hz

RRXB4+/RLV0P

RRXB4-/RLV0N

RRXB3+/RLV1P

RRXB3-/RLV1N

RRXBCK+/RLV2P

RRXBCK-/RLV2N

RRXB2+

RRXB2-

RRXB1+

RRXB1-

RRXB0+/RLCLKP

RRXB0-/RLCLKN

R7810 0

OPT

R7809

3D_DIMMING

R7808 0

3DTV

0

R7800 0

TM480Hz

R7801 0

TM480Hz

R7802 0

TM480Hz

R7803 0

TM480Hz

R7807 0

3DTV

RRXA4+/RLV3P

RRXA4-/RLV3N

RRXA3+

RRXA3-

RRXACK+/RLV4P

RRXACK-/RLV4N

RRXA2+/RLV5P

RRXA2-/RLV5N

RRXA1+

RRXA1-

RRXA0+

RRXA0-

3D_DIMMING_2

3D_DIMMING

L/R_SYNC

FRC_RESET

SCL3_3.3V

SDA3_3.3V

V_SYNC

3D_SYNC_OUT

I2C_#3 Check(LG5111,LG1120,etc)

For Debugging

OPT

P7801

12507WR-04L

3

4

1

2

R7806

OPT

0

R7805

OPT

0

SCL3_3.3V

SDA3_3.3V

R7804

OPT

0

V_SYNC

5

If current of 12V is over 2A, use another power cable for 3DTV

P7802

12507WR-04L

1

L7801

120-ohm

PANEL_VCC

2

3

4

5

P7803

12507WR-06L

4

5

6

1

2

3

7

R7811

0

R7812

0

R7813

0

R7814

0

E_TCK

E_TDO

E_TMS

E_TDI

COMMON

LG5111 60Hz LVDS

09/10/xx

78 100

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

[To MASTER LED DRIVER]

P7900

12507WR-10L

IOP

7

8

5

6

9

10

3

4

1

2

11

+3.3V_NORMAL

R7907

3.3K

Edge

R7908

3.3K

Edge

R7909

3.3K

Edge

R7904

IOP

22

R7905

IOP

22

R7906

IOP

22

C7901

100pF

50V

OPT

C7903

100pF

50V

OPT

C7905

100pF

50V

OPT

C7907

100pF

50V

OPT

C7909

100pF

50V

OPT

C7911

100pF

50V

OPT

C7913

100pF

50V

OPT

C7914

100pF

50V

OPT

L_VS

M0_MOSI

M0_SCLK

M1_MOSI

M1_SCLK

S_CS_N

S_MOSI

S_SCLK

[To SLAVE LED DRIVER]

P7901

12507WR-08L

Except Edge(42/47")

9

7

8

5

6

1

2

3

4

R7900

OPT

22

R7901 22

Edge(55")

R7902

IOP

22

R7916 22

Edge(55")

R7917 22

Edge(55")

R7903 22

IOP

R7910

R7911

R7912

R7913

C7900

100pF

50V

OPT

C7902

100pF

50V

OPT

C7904

100pF

50V

OPT

C7906

100pF

50V

OPT

C7908

100pF

50V

OPT

C7910

100pF

50V

OPT

C7912

100pF

50V

OPT

22

IOP

22

22

IOP

22 Edge(55")

IOP

R7914 22 Edge(55")

R7918 22

IOP

R7919 22

IOP

R7915 22 Edge(55")

R_VS

M2_MOSI

M2_SCLK

M2_SCLK

M2_MOSI

M3_MOSI

M3_SCLK

R_VS

GP2_Saturn7M

Interface for LG5111

Ver. 1.0

72

LGE Internal Use Only

FROM LIPS & POWER B/D

+3.5V_ST

RT1P141C-T112

Q8002

R8000

10K

B

R8004

4.7K

1

3

+24V

RL_ON

+3.5V_ST

C8000

100uF

16V

C8001

100uF

25V

+12V

L8002

MLB-201209-0120P-N2

C8003

0.1uF

50V

C8005

0.1uF

50V

C8006

0.1uF

16V

<OS MODULE PIN MAP>

PIN No

18

20

C

Q8000

2SC3052

E

L8003

MLB-201209-0120P-N2

C8004

0.1uF

16V

LGD

INV_ON

V4:VBR-A

V5:NC

CMO(09)

A-DIM

NC

2

NORMAL_26~52

P8000

FW20020-24S

AUO

INV_ON

Err_out

PWR ON

24V

GND

GND

3.5V

3.5V

GND

GND

12V

12V

12V

GND/P.DIM2

SLIM_32~52

25

SMAW200-H24S2

24V

24V

GND

GND

3.5V

L8005

MLB-201209-0120P-N2

3.5V

GND

GND/V-sync

INV ON

A.DIM

P.DIM1

Err OUT

C8018

0.1uF

50V

R8082 0

400Hz_VSYNC

C8024

68uF

35V

400Hz_VSYNC/42_47_LOCAL DIMMING

R8078

0

R_VS

400Hz_VSYNC

R8036

0 L_VS

V_SYNC

R8028

400Hz_MO_SCLK/42_47_LOCAL DIMMING

R8077 0

M2_SCLK

0

MO_SCLK

400Hz_MO_SCLK

NON_CMO

R8019

100

+3.3V_NORMAL

R8026

1K

P8001

R8018

100

CMO

C

R8023

6.8K

OPT

E

B

Q8005

R8032

10K

2SC3052

INV_CTL

R8039

10K

OPT

CMO

R8029

0

SHARP

INV_ON

Err_out

R8084

0

SCAN_PSU

R8021

AUO

0

R8022

0

R8020

NON_SCAN_PSU

0

C8017

0.1uF

OPT

AUO R8030

LGD_IOP

0

R8031 0

LGD_V4

R8027

0

NON_OPC

C8021

1uF

25V

OPT

A_DIM

PWM_DIM

R8033

0

SCAN_BLK1/OPC_OUT

SCAN/FHD_OPC

R8034

0

HD_OPC

OPC_OUT

R8035

0

+3.3V_NORMAL

22 PWM_DIM PWM_DIM

A-DIM

PWM_DIM

24

Err_out

INV_ON PWM_DIM

GND

R8024

0

AUO/SHARP

R8025

0

OPT

ERROR_OUT

C8069

0.1uF

OPT

L_VS

R_VS

MO_SCLK

M2_SCLK

MO_MOSI

M2_MOSI

SCAN_BLK1/OPC_OUT

OPC_OUT

SCAN_BLK2

Vout=0.8*(1+R1/R2)

C8026

0.1uF

+3.5V_ST

+12V

L8007

CIC21J501NE

C8028

10uF

25V

C8030

10uF

25V

16

18

22

23

EP

N.C

Driver

On

N.C

N.C

+5V_NORMAL

AGND

1

SS

2

14

FB

13

EN/SYNC

PGND_1

3

IC8001

12

SW_1

4 11

PGND_2

SW_2

IN_1

5 10

IN_2

NC

6

BS

7

9

8

POK

VCC

R8040

100K

R8041

10

MP2208DL-LF-Z

PGND

1

VIN

C8068

0.1uF

16V

AGND

2

3

FB

4

IC8003

AOZ1072AI

2A

C8036

0.1uF

R8042

0

8

LX_2

7

LX_1

6

EN

5

COMP

R8044

C8037

22uF

10V

L8010

3.6uH

NR8040T3R6N

R8050

10K

POWER_ON/OFF2_2

12K

R8049

2200pF

C8040

10K

POWER_ON/OFF2_1

ESD

D8000

5.6V

R8045

ESD

R8045-*1

100K

L8009

2uH

0

NON_ESD

R8043 R8046

470K

1%

30K

1%

R1

R8048

910K

1%

R2

D1.2V

L8011

BLM18PG121SN1D

C8041

22uF

10V

C8043

10uF

16V

MAX 350mA

R1

OPT

C8046

100pF

50V

R2

BCM core 1.2V volt

C8045

0.1uF

16V

C8047

22uF

10V

MAX 3.1A

A1.2V

+5V_NORMAL

C8066

22uF

10V

C8049

0.1uF

16V

+12V

PIN No LX95

PANEL_POWER

L8000

CIC21J501NE

C8008

0.01uF

25V

C8009

0.1uF

50V

C8010

10uF

25V

OPT

C8027

0.1uF

C8029

22uF

16V

C8032

0.1uF

C8033

1uF

10V

C8035

22uF

Vout=0.8*(1+R1/R2)

Q8004

AO3407A

C8013

10uF

16V

PANEL_VCC

R8003

22K

R8011 1.8K

G

OPT

C8015

1uF

25V

PANEL_CTL

1:AK10

+12V

C8002

10uF

25V

OPT

R8002

10K

R8001

47K

B

C

Q8001

2SC3052

E

B

R8008

22K

C

Q8003

2SC3052

E

+5V_USB

IC8000

MP8706EN-C247-LF-Z

IN

1

SW_1

2

C8007

0.1uF

SW_2

3

BST

4

R8006

22

3A

8

GND

7

VCC

C8014

1uF

50V

R8012

10K

OPT

C8016

100pF

50V

6

FB

5

EN/SYNC

POWER_ON/OFF2_1

R8013

10K

MAX 1500mA

C8022

0.1uF

50V

OPT

C8019

R1

100pF

50V

C8020

22uF

10V

C8023

0.1uF

16V

+5V_USB

C8025

0.1uF

16V

BCM DDR 1.8V

+3.5V_ST

Placed on SMD-TOP

C IN

C8031

22uF

10V

Max 1100 mA

Vout=0.9*(1+R1/R2)

Replaced Part

L8012

3.6uH

NR8040T3R6N

IC8002

MP2108DQ

10

RUN

10K

R8052 BST

1

VIN

2

POWER_ON/OFF1

LX

3

PGND

4

SGND

5

3A

9

8

VREF

COMP

7

FB

6

SS

C8042

0.01uF

25V

C8039

3300pF

50V

C8038

0.01uF

25V

R8051

6.8K

OPT

50V

100pF

C8044

R2

R8056

10K

1/10W

1%

R1

R8057

10K

1%

C8048

22uF

10V

D1.8V

Placed on SMD-TOP

C8050

0.1uF

R2

L8004

3.6uH

NR8040T3R6N

+5V_USB

Vout=(1+R1/R2)*0.8

15V-->3.6V

20V-->3.5V

24V-->3.48V

12V-->3.58V

ST_3.5V-->3.5V

Power_DET

C8051

0.1uF

50V

OPT

R8080

14K 1%

+12V

+3.5V_ST

L8013

CIC21J501NE

C8052

22uF

25V

R8058

20K

C8054

2200pF

50V

POWER 18.5V

R8061-*2

22K 1%

POWER 18.5V

R8062-*2

4.7K 1%

+3.3V_NORMAL

C8053

10uF

16V

C8055

0.1uF

+12V

+24V

POWER 24V

R8061-*1

24K 1%

POWER 20V

R8061

24K 1%

POWER 24V

R8062-*1

4.3K

1%

POWER 20V

R8062

5.1K

5%

+3.5V_ST

IC8004

SC4215ISTRT

R8068

100K

IC8007

NCP803SN293

VCC

3

GND

1

2

RESET

R8079

100K

IC8008

NCP803SN293

VCC

3

GND

1

2

RESET

+3.3V_NORMAL

R8060

10K

VIN

EN

6

FB

4

COMP

5

IC8005

7

LX

AOZ1024DI

R8059

10K

OPT

C8056

0.1uF

A2.5V

1

NC_1

2

EN

VIN

3

4

NC_2

POWER_ON/OFF2_2

L8015

3.6uH

8

GND

7

6

ADJ

VO

5

NC_3

R8081

100

R8074

100

MAX 2.3A

+3.5V_ST

+3.3V_NORMAL

C8057

22uF

10V

C8059

22uF

10V

C8067

10uF

10V

C8063

0.1uF

16V

VOUT : 2.533V

C8058

10uF

16V

Vout=0.8*(1+R1/R2)

R8073

18K

R2

1%

R8072

39K R1

1%

A2.5V

POWER_DET not to RESET at 8kV ESD

L8016

CIC21J501NE

C8061

10uF

16V

ESD

C8065

0.1uF

16V

C8062

0.1uF

D3.3V

C8064

0.1uF

16V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

BCM (EUROBBTV)

POWER

15

LGE Internal Use Only

P8100

12505WS-12A00

13

11

12

9

10

7

8

5

6

3

4

1

2

+3.5V_ST

R8104 10K

R8113

R8115

R8116

R8118

R8119

22

22

22

22

22

+3.5V_ST

R8108 10K

R8105 10K

R8106 10K

R8107 10K

NEC_ISP_Tx

NEC_ISP_Rx

OCD1A

OCD1B for Debugger

MICOM_RESET

NEC_ISP_Tx

NEC_ISP_Rx

OCD1A

OCD1B

FLMD0

EEPROM for Micom

NC_1

1

NC_2

2

NC_3

3

VSS

4

IC8100

M24C16-WMN6T

8

VCC

7

WC

6

SCL

5

SDA

R8117

22

R8114

22

+3.5V_ST

NEC_EEPROM_SCL

NEC_EEPROM_SDA

+3.5V_ST

SCL1_3.3V

SDA1_3.3V

NEC_EEPROM_SCL

OPT

R8126

10K

NEC_EEPROM_SDA

HDMI_CEC

POWER_ON/OFF2_1

AMP_MUTE

MODEL1_OPT_0

SOC_RESET

INV_CTL

MODEL1_OPT_1

OCD1B

MICOM MODEL OPTION

+3.5V_ST

AMP_RESET_N

PANEL_CTL

OPC_EN

R8102

R8103

R8101

OPC

100

100

100

MODEL1_OPT_0

MODEL1_OPT_1

MODEL1_OPT_2

MODEL1_OPT_3

PIN NAME

MODEL_OPT_0

MODEL_OPT_1

MODEL_OPT_2

MODEL_OPT_3

MODEL_OPT_0

MODEL_OPT_3

MODEL_OPT_1

MODEL_OPT_2

LCD

0

0

LOW

0

0

MODEL OPTION

PIN NO.

8

11

30

31

HIGH

OLED/3D

LOGO_BUZZ

TOUCH_KEY

PDP/3D

LOW

LCD/PDP

PWM_LED

TACT_KEY

LCD/OLED

PDP

0

1

LOW_SMALL

0

1

OLED

1

0

LX9500

1

0

HIGH

1

1

3D

1

1

GND

50V

15pF

C8101

50V

15pF

C8102

10MHz

X8100

0

R8138

+3.5V_ST

R8139

10K

OPT

0

R8146

MICOM_DOWNLOAD

X8101

32.768KHz

R8175

4.7M

+3.5V_ST

C8103

0.1uF

GND

C8108

0.1uF

SW8100

JTP-1127WEM

2 1

4 3

R8186 20K

1/16W

1%

R8129

R8130

R8131

R8132

R8133

R8134

R8135

R8136

R8127

R8128

22

22

P60/SCL0

P61/SDA0

P62/EXSCL0

P63

22

P33/TI51/TO51/INTP4

22

22

P75

P74

22

22

P73/KR3

P72/KR2

P71/KR1

22

22

P70/KR0

22

P32/INTP3/OCD1B

NON_M-REMOTE

6

7

4

5

1

2

3

8

9

10

11

12

IC8101

UPD78F0513AGA-GAM-AX

NEC_MICOM

31

30

29

28

27

26

25

36

35

34

33

32

P140/PCL/INTP6

P00/TI000

P01/TI010/TO00

P130

P20/ANI0

ANI1/P21

ANI2/P22

ANI3/P23

ANI4/P24

ANI5/P25

ANI6/P26

ANI7/P27

R8187 22

R8188 22

R8189

R8192

10K

22

R8194 22

R8195 22

R8196 22

R8190 22

R8193 22

R8191 22

B

C

Q8100

2SC3052

E

EDID_WP

RL_ON

SCART1_MUTE

WIRELESS_SW_CTRL

FLASH_WP

MODEL1_OPT_3

MODEL1_OPT_2

POWER_ON/OFF1

MICOM_DOWNLOAD

SIDE_HP_MUTE

KEY2

KEY1

+3.5V_ST

SCART1_MUTE

FOR ATSC Assy

TP8100

OPC_EN

SIDE_HP_MUTE

+3.5V_ST

R8181

R8182

10K

OPT

10K

OPT

R8183 10K

OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

GP2_Saturn7M

MICOM

Ver. 1.4

5

LGE Internal Use Only

IR

R8200

22

+3.5V_ST

IR & KEY

KEY1

R8211

10K

1%

R8209

100

R8210

100

R8213

10K

1%

L8200

BLM18PG121SN1D

KEY2

L8201

BLM18PG121SN1D

C8206

0.1uF

C8207

0.1uF

D8200

5.6V

AMOTECH

+3.5V_ST

+3.5V_ST

L8202

BLM18PG121SN1D

+3.5V_ST

R8202

47K

R8204

47K

Q8200

2SC3052

C

E

B

R8203

10K

Q8201

2SC3052

C

B

E

+3.5V_ST

R8205

47K

R8206

3.3K

OPT

COMMERCIAL

R8201

0

OPT

+3.5V_ST

C8208

0.1uF

16V

Q8202

2SC3052

COMMERCIAL_EU

+3.5V_ST

R8207

22

IR_OUT

COMMERCIAL

R8214

47K

COMMERCIAL_EU

C

R8218

47K

R8216

COMMERCIAL

10K

B

E

COMMERCIAL_EU C

B

Q8204

2SC3052

COMMERCIAL

E

R8220

47K

COMMERCIAL

D8201

5.6V

AMOTECH

C8209

1000pF

50V

C8210

0.1uF

16V

NEC_EEPROM_SCL

NEC_EEPROM_SDA

LED_B/LG_LOGO

+3.3V_NORMAL

L8203

BLM18PG121SN1D

EYEQ

R8225

100

C8213

1000pF

50V

OPT

D8204

CDS3C05HDMI1

5.6V

EYEQ

R8226

100

C8214

1000pF

50V

OPT

D8205

CDS3C05HDMI1

5.6V

R8227 1.5K

TACT_KEY

OPT

C8215

0.1uF

16V

R8224

100

C8212

100pF

50V

D8206

5.6V

AMOTECH

LED_R/BUZZ

C8211

1000pF

50V

R8276

1.5K

OPT

R8280

10K

R8212

0

COMMERCIAL_US

Zener Diode is close to wafer

WIRELESS

IR_PASS

R8208

22

WIRELESS

+3.5V_ST

Q8203

2SC3052

WIRELESS

+3.5V_ST

R8215

47K

WIRELESS

R8217

10K

R8219

47K

WIRELESS

C

E

B

WIRELESS

Q8205

2SC3052

WIRELESS

C

B

E

R8221

47K

WIRELESS

P8200

12507WR-12L

6

7

4

5

1

2

3

10

11

8

9

12

13

RS232C

+3.5V_ST

C8200 0.33uF

IC8200

MAX3232CDR

C8201

0.1uF

C8202

0.1uF

C1+

1

V+

2

C1-

3

C2+

4

C8203

0.1uF

C2-

5

V-

6

C8204

0.1uF

DOUT2

7

RIN2

8

EAN41348201

16

VCC

15

GND

14

DOUT1

13

RIN1

12

ROUT1

11

DIN1

10

DIN2

9

ROUT2

C8205

0.1uF

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

+3.5V_ST

R8222

4.7K

OPT

R8223

4.7K

OPT

IR_OUT

OPT

R8279

0

R8277

100

R8278

100

D8202

CDS3C30GTH

30V

D8203

CDS3C30GTH

30V

R8273 0

R8274 0

R8272 0

R8275 0

BCM_RXD1

NEC_RXD

BCM_TXD1

NEC_TXD

9

10

5

4

8

3

7

2

6

1

SPG09-DB-009

JK8201

ETHERNET CONNECT

EPHY_TDP

EPHY_TDN

EPHY_RDP

EPHY_RDN

R8283

0

OPT

C8218

10pF

50V

R8284

0

R8285

0

OPT

C8221

10pF

50V

R8286

0

OPT

C8220

10pF

50V

OPT

C8222

10pF

50V

EPHY_LINK

EPHY_ACTIVITY

C8216

1000pF

50V

C8217

1000pF

A2.5V

L8204

CIC21J501NE

JK8200

XRJV-01V-D12-180

D3.3V

R8281

R8282

510

510

6

7

4

5

1

2

3

D2

D3

8

D1

D4

9

Trace impedance : 100 ohm differenctial impedance to GND plane

5 mils trace width with 7 mils air gap on P/N pair.

Adjacent TX/RX differential pairs should be separated by more than

15 mils to each other

LGE Internal Use Only

SHIELD

20

HP_DET

19

5V

18

GND

17

DDC_DATA

16

15

NC

14

CE_REMOTE

13

CK-

12

DDC_CLK

CK_GND

11

JK8302 10

CK+

D0-

9

D0_GND

8

D0+

7

D1-

6

D1_GND

5

D1+

4

D2-

3

D2_GND

2

D2+

1

D8302

5.5V

OPT

GND

R8302

1K

R8307

0

GND

KRC104S

Q8302

E

C

KRC104S

Q8305

E

C

B

B

R8311

4.7K

R8308

0

JP8304

JP8305

DDC_SDA_1

DDC_SCL_1

GND

D8305

5.5V

OPT

HDMI_HPD_1

5V_HPD1

5V_HDMI_1

CEC_REMOTE

CK-_HDMI1

CK+_HDMI1

D0-_HDMI1

D0+_HDMI1

D1-_HDMI1

D1+_HDMI1

D2-_HDMI1

D2+_HDMI1

YKF45-7058V

GND UI_HW_PORT1

SHIELD

20

4

3

2

7

6

5

HP_DET

19

5V

18

GND

17

DDC_DATA

16

DDC_CLK

15

NC

14

13

CE_REMOTE

CK-

12

CK_GND

11

CK+

9

8

D0-

D0_GND

D0+

D1-

D1_GND

D1+

D2-

D2_GND

D2+

1

D8300

5.5V

OPT

HDMI_3

GND

R8300

1K

HDMI_3

R8303

0

GND

HDMI_3

KRC104S

Q8300

E

C

HDMI_3

KRC104S

Q8303

E

C

B

B

R8309

4.7K

HDMI_HPD_2

HDMI_3

5V_HPD2

5V_HDMI_2

JP8300

D8303

5.5V

OPT

DDC_SDA_2

DDC_SCL_2

R8304

0

HDMI_3

JP8301

GND

CEC_REMOTE

CK-_HDMI2

CK+_HDMI2

D0-_HDMI2

D0+_HDMI2

D1-_HDMI2

D1+_HDMI2

D2-_HDMI2

D2+_HDMI2

HDMI_3

YKF45-7058V

UI_HW_PORT3

GND

SHIELD

20

4

3

2

7

6

5

HP_DET

19

5V

18

GND

17

DDC_DATA

16

DDC_CLK

15

NC

14

13

CE_REMOTE

CK-

12

CK_GND

11

CK+

9

8

D0-

D0_GND

D0+

D1-

D1_GND

D1+

D2-

D2_GND

D2+

1

D8301

5.5V

OPT

GND

R8301

1K

GND

KRC104S

Q8301

R8305

0

JP8302

E

C

E

KRC104S

Q8304

C

B

B

R8310

4.7K

DDC_SDA_3

DDC_SCL_3

R8306

0

JP8303

GND

D8304

5.5V

OPT

HDMI_HPD_3

5V_HPD3

5V_HDMI_3

CEC_REMOTE

CK-_HDMI3

CK+_HDMI3

D0-_HDMI3

D0+_HDMI3

D1-_HDMI3

D1+_HDMI3

D2-_HDMI3

D2+_HDMI3

YKF45-7058V

GND

UI_HW_PORT2

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

JACK_GND

GND

20

HP_DET

19

5V

18

GND

17

DDC_DATA

16

DDC_CLK

15

NC

14

13

CE_REMOTE

CK-

12

CK_GND

11

JK8303 10

CK+

D0-

9

D0_GND

8

D0+

7

D1-

6

5

D1_GND

D1+

4

D2-

3

D2_GND

2

D2+

1

D8308

5.5V

ESD

GND

R8316

1K

GND

KRC104S

Q8306

E

C

KRC104S

Q8307

E

C

B

B

R8321

4.7K

R8317

82

JP8306

DDC_SDA_4

DDC_SCL_4

R8318

82

JP8307 GND

D8311

5.5V

ESD

HDMI_HPD_4

5V_HPD4

5V_HDMI_4

CEC_REMOTE

CK-_HDMI4

GND

CK+_HDMI4

D0-_HDMI4

D0+_HDMI4

D1-_HDMI4

D1+_HDMI4

D2-_HDMI4

D2+_HDMI4

KJA-ET-0-0032

GND

SIDE_HDMI_PORT4

+5V_NORMAL

5V_HDMI_1

5V_HPD1

D8306

R8312

47K

R8314

47K

+5V_NORMAL

5V_HDMI_2

5V_HPD2

HDMI_3

D8309

R8319

47K

HDMI_3

R8322

47K

HDMI_3

DDC_SDA_1

DDC_SCL_1

DDC_SDA_2

DDC_SCL_2

+5V_NORMAL

5V_HDMI_3

5V_HPD3

D8307

R8313

47K

R8315

47K

DDC_SDA_3

DDC_SCL_3

+5V_NORMAL

5V_HDMI_4

5V_HPD4

D8310

R8320

4.7K

R8323

4.7K

DDC_SDA_4

DDC_SCL_4

EDID Pull-up

LEE GI YOUNG

* HDMI CEC

CEC_REMOTE

R8326

22K

D8312

MMBD301LT1G

+3.5V_ST

HDMI_CEC

+3.3V_HDMI

HDMI2

HDMI4

+5V_NORMAL

R8325

1.8K

R8324

1.8K

5V_HDMI_4

C8312

0.1uF

16V

C8319

0.1uF

C8320

0.1uF

C8321

0.1uF

C8322

0.1uF

HDMI1

HDMI_HPD_1

DDC_SDA_1

DDC_SCL_1

CK-_HDMI1

CK+_HDMI1

D0-_HDMI1

D0+_HDMI1

D1-_HDMI1

D1+_HDMI1

D2-_HDMI1

D2+_HDMI1

C8302

0.1uF

16V

5V_HDMI_1

OPT

R8328

0

VSS_1

OUT_C+

OUT_C-

VDDO[3V3]

OUT_DDC_CLK

OUT_DDC_DAT

VSS_2

VDDDC[1V8]_1

RXA_HPD

RXA_5V

RXA_DDC_DAT

RXA_DDC_CLK

RXA_C-

RXA_C+

VDDH[3V3]_1

RXA_D0-

RXA_D0+

VSS_3

RXA_D1-

RXA_D1+

VDDH[3V3]_2

RXA_D2-

RXA_D2+

VDDH[1V8]_1

AUX_5V

13

14

15

16

8

9

10

11

12

5

6

3

4

7

1

2

22

23

24

25

17

18

19

20

21

+5V_NORMAL

C8300

0.1uF

R8327

0

+1.8V_HDMI

C8301

0.1uF

16V

C8303

0.1uF

16V

C8304

0.1uF

16V

5V_HDMI_2

C8306

0.1uF

16V

R8335 0

IC8300

TDA19997

R8337

0

Place close to TDA9996

68

67

66

65

64

63

62

61

60

59

58

57

56

55

54

53

52

51

75

74

73

72

71

70

69

VDDH[1V8]_2

R12K

R8344

VSS_9 12K

RXC_D2+

RXC_D2-

VDDH[3V3]_6

RXC_D1+

RXC_D1-

VSS_8

RXC_D0+

RXC_D0-

VDDH[3V3]_5

RXC_C+

RXC_C-

RXC_DDC_CLK

RXC_DDC_DAT

RXC_5V

RXC_HPD

CEC

VSS_7

VDDS[3V3]

CDEC_STBY

INT_N/MUTE

RXE_DDC_DAT

RXE_DDC_CLK

+1.8V_HDMI

C8316

0.1uF

16V

C8318

0.1uF

16V

C8323

0.1uF

16V

5V_HDMI_3

C8317

0.1uF

16V

D2+_HDMI3

D2-_HDMI3

D1+_HDMI3

D1-_HDMI3

D0+_HDMI3

D0-_HDMI3

R8345

0

OPT

R8346

OPT

0

CK+_HDMI3

CK-_HDMI3

DDC_SCL_3

DDC_SDA_3

HDMI_HPD_3

Ready for TDA19997

OPT

R8347

4.7K

+3.3V_HDMI

OPT

4.7K

R8348

HDMI3

0

OPT

R8343

C8313

0.1uF

16V

C8314

0.1uF

16V

BCM (EUROBBTV)

HDMI

+3.3V_NORMAL

+3.3V_HDMI

L8300

BLM18PG121SN1D

C8324

0.1uF

2009.06.18

8

LGE Internal Use Only

SPDIF_OUT

+3.3V_NORMAL

R8400

1K

D8400

30V

OPT

C8400

0.1uF

16V

JK8400

JST1223-001

JP8401

GND

JP8402

VCC

JP8400

VINPUT

FIX_POLE

RGB PC

RGB_HSYNC

RGB_VSYNC

R8401

22

R8402

22

D0A

1

D0B

2

Q0

3

D1A

4

D1B

5

Q1

6

GND

7

IC8400

74F08D

+5V_NORMAL

14

VCC

13

D3B

12

D3A

11

Q3

10

D2B

9

D2A

8

Q2

C8401

0.1uF

R8406

22

BCM Reference

R8405

22

DSUB_B

DSUB_G

DSUB_R

R8403

75

R8404

75

R8407

75

IC8401-*1

R1EX24002ASAS0A

A0

1

A1

2

8

VCC

7

WP

A2

VSS

4

3

DEV

6

SCL

5

SDA

RGB_EDID_RENESAS

IC8401

M24C02-RMN6T

E0

E1

E2

1

2

3

8

VCC

7

WC

6

SCL

VSS

4

0IMMR00014A

5

SDA

RGB_EDID_ST

0.1uF 16V

+5V_NORMAL

D8409

ENKMC2838-T112

A1

C

A2

R8416

R8415

22

22

OPT

OPT

L8408 60-ohm

RGB_BEAD

L8409 60-ohm

RGB_BEAD

L8410 60-ohm

RGB_BEAD

D8402

30V

D8404

30V

BCM Reference

D8405

30V

L8408-*1 0

RGB_0OHM

L8409-*1 0

RGB_0OHM

L8410-*1 0

RGB_0OHM

OPT

D8408

CDS3C05HDMI1

5.6V

SPG09-DB-010

JK8402

RGB AUDIO IN

JK8401

PEJ027-01

3

E_SPRING

6A

T_TERMINAL1

7A

B_TERMINAL1

4

R_SPRING

5

T_SPRING

7B

B_TERMINAL2

6B

T_TERMINAL2

D8406

AMOTECH

5.6V

R8411

470K

D8407

AMOTECH

5.6V

R8412

470K

R8420

10K

R8422

100

C8407

1uF

25V

R8418

0

C8408

1uF

25V

R8419

0

EDID_WP

RGB_DDC_SCL

RGB_DDC_SDA

OPT

D8410

CDS3C05HDMI1

5.6V

+3.3V_NORMAL

R8424

10K

OPT

0

R8423

OPT

D8411

5.6V

1K

R8425

C8409

100pF

PC_R_IN

PC_L_IN

RGB IN

DSUB_DET

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

EUROBBTV

ETC SUB BOARD I/F

2009.06.18

9

LGE Internal Use Only

ALL for SIDE_GENDER option

SIDE CVBS PHONE JACK

(New Item Developmen)

D8600

5.5V

R8603

0

JK8600

KJA-PH-1-0177

5 M5_GND

4 M4

3 M3_DETECT

1 M1

6 M6

D8601

5.6V

C8600

100pF

50V

C8605

47pF

50V

+3.3V_NORMAL

R8605

10K

R8608

1K

D8602

5.6V

R8601

470K

D8603

5.6V

R8602

470K

C8607

25V

1uF

C8606

25V

1uF

R8606

0

R8607

0

C8611

100pF

50V

C8612

100pF

50V

SIDE_AV_CVBS

SIDE_AV_DET

SIDE_AV_L_IN

SIDE_AV_R_IN

SIDE COMPONENT PHONE JACK

(New Item Developmen)

L8600

270nH

D8064

5.1V

D8068

5.1V

C8601

27pF

50V

C8608

27pF

50V

JK8601

KJA-PH-1-0177

5 M5_GND

4 M4

3 M3_DETECT

1 M1

6 M6

+3.3V_NORMAL

R8600

10K

D8606

5.6V

D8607

5.5V

C8603

27pF

50V

D8605

5.5V

C8602

27pF

50V

R8604

1K

C8604

100pF

50V

L8602

270nH

L8601

270nH

C8610

27pF

50V

C8609

27pF

50V

SIDE_COMP_Y

SIDE_COMP_DET

SIDE_COMP_Pb

SIDE_COMP_Pr

Near J

Run Along SIDE_COMP_Y_IN,SIDE_COMP_Pr_IN,SIDE_COMP_Pb_IN Trace

C8613 0.1uF

SIDE_COMP_INCM

SIDE_GENDER

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

11

LGE Internal Use Only

WIRELESS READY MODEL

From wireless_I2C to micom I2C

+3.3V_NORMAL

WIRELESS_SDA

WIRELESS_SCL

Q103

FDV301N

OPT

Q104

FDV301N

R123

R124

OPT

0 WIRELESS

0

WIRELESS

JK8700

KJA-PH-3-0168

Wireless power

SDA2_3.3V

SCL2_3.3V

+24V

+3.3V_NORMAL

C8700

0.1uF

50V

WIRELESS_PWR_EN

R8702

10K

B

R8705

2.2K

R8704

22K

C8701

2.2uF

S

G

Q8701

AO3407A

D

C

L8700

MLB-201209-0120P-N2

WIRELESS_DETECT

WIRELESS_SCL

WIRELESS_SDA

Q8700

E

C8702

0.01uF

50V

C8704

10uF

35V

C8705

10uF

35V

WIRELESS_RX

WIRELESS_TX

R8714

10K

R8713 1K

IR_PASS

VCC[24V/20V/17V]_1

1

VCC[24V/20V/17V]_2

2

VCC[24V/20V/17V]_3

3

VCC[24V/20V/17V]_4

4

VCC[24V/20V/17V]_5

5

VCC[24V/20V/17V]_6

6

DETECT

7

TP8700

INTERRUPT

GND_1

TP8701

8

RESET

GND_2

11

I2C_SCL

12

I2C_SDA

13

GND_3

14

UART_RX

15

UART_TX

16

GND_4

17

IR

10

18

GND_5

9

19

GND_6

20

21

SHIELD

WIRELESS_DL_RX

WIRELESS_TX

BCM_TX

+3.5V_ST

NON_WIRELESS

R8703

0

IC8700

MC14053BDR2G

WIRELESS

R8707

0

WIRELESS

R8700

0

R8701

0

WIRELESS

Z0

5

INH

6

VEE

7

VSS

8

Y1

1

WIRELESS

16

VDD

Y0

2 15

Y

Z1

3

Z

4

14

13

X

X1

12

11

10

9

X0

A

B

C

BCM_TXD1

C8703

0.1uF

BCM_RXD1

R8708

0

WIRELESS

WIRELESS_DL_TX

R8706

0 NON_WIRELESS

WIRELESS_RX

+3.5V_ST

BCM_RX

RS232C & Wireless

WIRELESS_SW_CTRL

WIRELESS_SW_CTRL SELECT PIN

HIGH

LOW

X1/Y1/Z1

X0/Y0/Z0

STATUS

WIRELESS Dongle connect --> WIRELESS RS232

WIRELESS Dongle Dis_con --> S7 RS232

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

WIRELESS

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

12

LGE Internal Use Only

+24V

L8803

MLB-201209-0120P-N2

+24V_AMP

C8827

0.1uF

50V

+1.8V_AMP

+3.3V_NORMAL

IC8800

AP1117E18G-13

C8800

0.1uF

16V

IN

3 Vd=1.4V

1

ADJ/GND

OUT

2

C8802

10uF

10V

C8803

0.1uF

16V

120 mA

CCFL = 20V

Edge_LED 32~47 Inch = 20V

55 Inch & IOP Module = 24V

+24V_AMP

+3.3V_NORMAL

L8802

C8819

22000pF

50V

C8820

0.1uF

50V

C8824

0.1uF

50V

C8826

10uF

35V

C8823

22000pF

50V

C8825

1uF

25V

EMI

R8809

3.3

EMI

C8832

0.01uF

50V

D8800

1N4148W

100V

OPT

D8801

1N4148W

100V

OPT

R8812

12

C8835

390pF

50V

R8819

12

C8836

390pF

50V

R8813

12

R8817

12

AUD_LRCH

AUD_LRCK

AUD_SCK

SDA1_3.3V

SCL1_3.3V

AMP_RESET_N

C8808

1000pF

50V

+1.8V_AMP

AUD_MASTER_CLK

+1.8V_AMP

L8800

L8801

C8811

0.1uF

C8806

100pF

50V

C8810

1000pF

50V

R8806

3.3K

OPT

C8801

10uF

10V

C8804

0.1uF

16V

OPT

C8805

10uF

10V

C8807

0.1uF

16V

R8801

R8802

R8803

R8804

R8805

100

100

100

100

100

C8809

33pF

50V

C8812

33pF

50V

C8813

47pF

50V

EMI

BST1A

C8816

1uF

VDR1A

25V

/RESET

AD

DGND_1

GND_IO

CLK_I

VDD_IO

DGND_PLL

AGND_PLL

LF

AVDD_PLL

DVDD_PLL

GND

10

11

12

13

14

7

8

5

6

9

3

4

1

2

THERMAL

57

IC8801

EAN60969601

NTP-7000

+1.8V_AMP

OPT

C8815

10uF

10V

C8818

0.1uF

16V

C8822

1uF

25V

42

41

40

39

38

37

36

35

34

33

32

31

30

29

NC

VDR2A

BST2A

PGND2A_2

C8828

25V 1uF

PGND2A_1

OUT2A_2

OUT2A_1

PVDD2A_2

PVDD2A_1

PVDD2B_2

PVDD2B_1

OUT2B_2

OUT2B_1

PGND2B_2

C8830

22000pF

50V

+24V_AMP

D8802

1N4148W

100V

OPT

D8803

1N4148W

100V

OPT

R8814

12

C8837

390pF

50V

C8838

390pF

50V

R8815

12

R8818

12

R8816

12

C8834

10uF

35V

C8814

47pF

50V

EMI

C8817

47pF

50V

EMI

C8821

1000pF

50V

C8831

0.1uF

50V

C8833

0.1uF

50V

R8807

0

OPT

C8829

22000pF

50V

POWER_DET

+3.5V_ST

R8808 100

R8810

10K

C

Q8800

2SC3052

E

B

R8811

10K

AMP_MUTE

2S

L8805

AD-9060

2F

1S 1F

15uH

2S

L8804

AD-9060

2F

1S 1F

15uH

C8839

0.47uF

50V

C8841

0.1uF

50V

C8842

0.1uF

50V

R8820

4.7K

R8821

4.7K

C8840

0.47uF

50V

C8843

0.1uF

50V

R8822

4.7K

C8844

0.1uF

50V

R8823

4.7K

SPK_L+

SPK_L-

SPK_R+

SPK_R-

R8824

0

R8825

0

R8826

0

R8827

0

WAFER-ANGLE

4

3

2

1

P8800

SPK_L+

SPEAKER_L

SPK_L-

SPK_R+

SPK_R-

SPEAKER_R

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

KIM JONG HYUN

BCM (EUROBBTV)

NTP7000

2009.06.18

38

LGE Internal Use Only

LVDS_TX_1_DATA0_P

LVDS_TX_1_DATA1_P

LVDS_TX_1_DATA2_P

LVDS_TX_1_CLK_P

LVDS_TX_1_DATA3_P

LVDS_TX_1_DATA4_P

R9710

R9711

R9712

R9713

R9714

R9715

100

100

100

100

100

100

[RESET for LG5111]

+3.3V_NORMAL

SW9700

JTP-1127WEM

R9777

330

R9728

1K

IC9700

KIA7027AF

I

1 3

O

2

G C9700

0.1uF

16V

LVDS_TX_0_DATA0_P

LVDS_TX_0_DATA0_N

LVDS_TX_0_DATA1_P

LVDS_TX_0_DATA1_N

LVDS_TX_0_DATA2_P

LVDS_TX_0_DATA2_N

LVDS_TX_0_CLK_P

LVDS_TX_0_CLK_N

LVDS_TX_0_DATA3_P

LVDS_TX_0_DATA3_N

LVDS_TX_0_DATA4_P

LVDS_TX_0_DATA4_N

LVDS_TX_1_DATA0_P

LVDS_TX_1_DATA0_N

LVDS_TX_1_DATA1_P

LVDS_TX_1_DATA1_N

LVDS_TX_1_DATA2_P

LVDS_TX_1_DATA2_N

LVDS_TX_1_CLK_P

LVDS_TX_1_CLK_N

LVDS_TX_1_DATA3_P

LVDS_TX_1_DATA3_N

LVDS_TX_1_DATA4_P

LVDS_TX_1_DATA4_N

Close to LG5111 LVDS Input PIN

LVDS_TX_0_DATA0_P

LVDS_TX_0_DATA1_P

LVDS_TX_0_DATA2_P

LVDS_TX_0_CLK_P

LVDS_TX_0_DATA3_P

LVDS_TX_0_DATA4_P

R9704

R9705

R9706

R9707

R9708

R9709

100

100

100

100

100

100

LVDS_TX_0_DATA0_N

LVDS_TX_0_DATA1_N

LVDS_TX_0_DATA2_N

LVDS_TX_0_CLK_N

LVDS_TX_0_DATA3_N

LVDS_TX_0_DATA4_N

LVDS_TX_1_DATA0_N

LVDS_TX_1_DATA1_N

LVDS_TX_1_DATA2_N

LVDS_TX_1_CLK_N

LVDS_TX_1_DATA3_N

LVDS_TX_1_DATA4_N

+3.3V_NORMAL

R9700

3.3K

TM480Hz

+3.3V_NORMAL

R9729

3.3K

TM480Hz

/TCON_EN DUAL_LVDS

R9701

10K

TM240Hz

R9730

10K

TM240Hz

TX Output Mode Selection

- High : LVDS(TM480Hz, LE9500)

- LOW : Mini-LVDS

(TM240Hz, LE5500/7500/8500)

+3.3V_NORMAL

R9702

3.3K

TM480Hz

VS_SLAVE_MODE

R9703

10K

TM240Hz

Master/Slave Mode Selection

- High : Slave Mode(TM480Hz,LE9500)

- LOW : Master Mode

(TM240Hz,LE5500/7500/8500)

Dual/Quad-Link LVDS Input Selection

- High : Dual-Link LVDS(TM480Hz,LE9500)

- LOW : Quad-Link LVDS

(TM240Hz, LE5500/7500/8500)

+3.3V_NORMAL

R9731

3.3K

OPT

EEPROM_NA

R9732

10K

External Serial EEPROM Avalibility

- High : Not Available

- LOW : Use EEPROM

+3.3V_NORMAL

R9733

10K

R9734

OPT

22

C9701

4.7uF

10V

IC9701

LG5111

K1

K2

L1

L2

M1

M2

N2

N1

N3

P3

P1

P2

R2A1P

R2A1M

R2B1P

R2B1M

R2C1P

R2C1M

R2CLK1P

R2CLK1M

R2D1P

R2D1M

R2E1P

R2E1M

R2

R1

R3

T3

T1

T2

U2

U1

U3

V4

V2

V3

R2A2P

R2A2M

R2B2P

R2B2M

R2C2P

R2C2M

R2CLK2P

R2CLK2M

R2D2P

R2D2M

R2E2P

R2E2M

B1

B2

C2

C1

A3

A2

A4

B3

C3

D3

D1

D2

R1A1P

R1A1M

R1B1P

R1B1M

R1C1P

R1C1M

R1CLK1P

R1CLK1M

R1D1P

R1D1M

R1E1P

R1E1M

F1

F2

G1

G2

E2

E1

E3

F3

H1

H2

J1

J2

R1A2P

R1A2M

R1B2P

R1B2M

R1C2P

R1C2M

R1CLK2P

R1CLK2M

R1D2P

R1D2M

R1E2P

R1E2M

T1A1P

T1A1N

T1B1P

T1B1N

T1C1P/RLV0N

T1C1N/RLV0P

T1CLK1P/RLV1N

T1CLK1N/RLV1P

T1D1P

T1D1N

T1E1P/RLV2N

T1E1N/RLV2P

A17

A16

B16

A15

B17

B18

C18

C17

D16

C16

D17

D18

T1A2P/RCLKN

T1A2N/RCLKP

T1B2P

T1B2N

T1C2P

T1C2N

T1CLK2P/RLV3N

T1CLK2N/RLV3P

T1D2P/RLV4N

T1D2N/RLV4P

T1E2P/RLV5N

T1E2N/RLV5P

E18

E17

F16

E16

F17

F18

G18

G17

H18

H17

J18

J17

T2A1P

T2A1N

T2B1P/LLV0N

T2B1N/LLV0P

T2C1P/LLV1N

T2C1N/LLV1P

T2CLK1P/LLV2N

T2CLK1N/LLV2P

T2D1P

T2D1N

T2E1P/LCLKN

T2E1N/LCLKP

K18

K17

L18

L17

M18

M17

N18

N17

P16

N16

P17

P18

T2A2P

T2A2N

T2B2P

T2B2N

T2C2P/LLV3N

T2C2N/LLV3P

T2CLK2P/LLV4N

T2CLK2N/LLV4P

T2D2P

T2D2N

T2E2P/LLV5N

T2E2N/LLV5P

R18

R17

T16

R16

T17

T18

U18

U17

V15

U16

V16

V17

EAN60997801

RRXA0+

RRXA0-

RRXA1+

RRXA1-

RRXA2+/RLV5P

RRXA2-/RLV5N

RRXACK+/RLV4P

RRXACK-/RLV4N

RRXA3+

RRXA3-

RRXA4+/RLV3P

RRXA4-/RLV3N

RRXB0+/RLCLKP

RRXB0-/RLCLKN

RRXB1+

RRXB1-

RRXB2+

RRXB2-

RRXBCK+/RLV2P

RRXBCK-/RLV2N

RRXB3+/RLV1P

RRXB3-/RLV1N

RRXB4+/RLV0P

RRXB4-/RLV0N

C9704

27pF

50V

X9700

25MHz

C9707

27pF

50V

IC9701

LG5111

R9741

1M 1%

M0_SCLK

M0_MOSI

M1_SCLK

M1_MOSI

M2_SCLK

M2_MOSI

M3_SCLK

M3_MOSI

S_CS_N

S_SCLK

S_MOSI

R9742

R9743

R9744

R9745

R9746

R9747

R9748

R9749

22

22

22

22

22

22

22

22

A5

B5

A7

B7

A6

B6

R6

T6

U6

V6

A8

B8

B9

CLK25_XOUT

CLK25_XIN

M0_SCLK

M0_MOSI

M1_SCLK

M1_MOSI

M2_SCLK

M2_MOSI

M3_SCLK

M3_MOSI

S_CS

S_SCLK

S_MOSI

VS_SLAVE_MODE

/TCON_EN

R_VS

DUAL_LVDS

+3.3V_NORMAL

V_SYNC

L_VS

R9750

R9737

3.3K

TM240Hz

R9751

LG5111_RESET

22

R5

T5

U5

V5

VS_SLAVE_MODE

TCON_EN

R_VS

DUAL_LVDS

22

A9

A10

A11

A12

A13

B4

B10

B11

B12

VS_IN

L_VS

H_CONV

DPM

SOE

PORES_N

OPT_N

POL

FLK

TMODE3

TMODE2

TMODE1

TMODE0

P4

R4

T4

U4

GPIO0

GPIO1

GPIO2

GPIO3

GPIO4

GPIO5

GPIO6

GPIO7

R7

R8

R9

R10

R11

R12

R13

R14

R9716

EEPROM_WP

EEPROM_NA

EEPROM_A1

T8

R9759

U8

V8

22

M_SDA

M_SCL

S_SDA

S_SCL

UARTRXD

UARTTXD

U7

V7

U9

V9

V10

R9760

R9761

R9762

R9763

U10

R9764

TMS

TCK

TDI

TDO

TRST_N

T11

U11

V12

U12

V11

22

22

22

22

22

0

A14

B13

B14

B15

GCLK1[GSP_R]

GCLK2

VDD_ODD[GSC] GCLK3

VDD_EVEN[GOE] GCLK4[OPT_P]

VST[GSP]

RMLVDS

GCLK5

GCLK6

V13

U13

T13

T14

V14

U14

R9739

12K

V_SYNC

3D_DIMMING_2

3D_DIMMING

EEPROM_WP

EEPROM_NA

EEPROM_A1

M_SDA

M_SCL

SDA3_3.3V

SCL3_3.3V

UART_RXD

UART_TXD

TMS

TCK

TDI

TDO

TRST_N

[Mini-LVDS Signal Strength]

1. Adjust Mini-LVDS Tx voltage swing level

(swing level can be affected by FFC cable)

2. Add resistor and make option for each model

[+1.8V for LG5111]

+12V

IC9702

AOZ1072AI

L9700

120-ohm

C9702

10uF

25V

C9703

10uF

25V

PGND

1

VIN

C9776

0.1uF

16V

AGND

2

3

8

7

6

LX_2

LX_1

EN

FB

4

EAN60922901

5

COMP

+1.8V_L/DIMMING

Vout = 0.8*(1+R1/R2)

L9701

3.6uH

+3.3V_NORMAL

R9740

10K

R1

R9754

10.5K

1%

C9709

22uF

10V

C9710

0.1uF

16V

R9755

2K

1%

R9738

9.1K

C9708

2200pF

C9705

1000pF

50V

R9756

10K

1%

R2

IC9701

LG5111

+1.8V_RXVDD

G3

H3

J3

K3

L3

M3

RXVDD_18_1

RXVDD_18_2

RXVDD_18_3

RXVDD_18_4

RXVDD_18_5

RXVDD_18_6

+1.8V_TXVDD

L16

M15

M16

N15

P15

E15

F15

G15

G16

H16

J16

K16

TXVDD_18_1

TXVDD_18_2

TXVDD_18_3

TXVDD_18_4

TXVDD_18_5

TXVDD_18_6

TXVDD_18_7

TXVDD_18_8

TXVDD_18_9

TXVDD_18_10

TXVDD_18_11

TXVDD_18_12

+1.8V_PLL

+1.8V_VDD

+3.3V_VDD

E4

C4

PLL_AVDD

PLL2_AVDD

C11

C12

C13

D7

D8

D9

D10

D11

D12

C6

C7

C8

C9

C10

G8

G9

G10

G11

J7

J12

K7

K12

L7

L12

M7

M8

M9

C5

C14

D6

D13

G7

G12

H7

H12

M10

M11

M12

VDD_18_1

VDD_18_2

VDD_18_3

VDD_18_4

VDD_18_5

VDD_18_6

VDD_18_7

VDD_18_8

VDD_18_9

VDD_18_10

VDD_18_11

VDD_18_12

VDD_18_13

VDD_18_14

VDD_18_15

VDD_18_16

VDD_18_17

VDD_18_18

VDD_18_19

VDD_18_20

VDD_33_1

VDD_33_2

VDD_33_3

VDD_33_4

VDD_33_5

VDD_33_6

VDD_33_7

VDD_33_8

VDD_33_9

VDD_33_10

VDD_33_11

VDD_33_12

VDD_33_13

VDD_33_14

VDD_33_15

VDD_33_16

VDD_33_17

VDD_33_18

RX_GND_1

RX_GND_2

RX_GND_3

RX_GND_4

RX_GND_5

RX_GND_6

G4

H4

J4

K4

L4

M4

TX_GND_1

TX_GND_2

TX_GND_3

TX_GND_4

TX_GND_5

TX_GND_6

TX_GND_7

TX_GND_8

TX_GND_9

TX_GND_10

TX_GND_11

TX_GND_12

K14

K15

L14

L15

M14

N14

F14

G14

H14

H15

J14

J15

GND_18

GND_19

GND_20

GND_21

GND_22

GND_23

GND_24

GND_25

GND_26

GND_27

GND_28

GND_29

GND_30

GND_31

GND_32

GND_33

GND_34

GND_35

GND_1

GND_2

GND_3

GND_4

GND_5

GND_6

GND_7

GND_8

GND_9

GND_10

GND_11

GND_12

GND_13

GND_14

GND_15

GND_16

GND_17

GND_36

GND_37

GND_38

GND_39

GND_40

GND_41

GND_42

L5

L8

L9

L10

L11

M5

N4

N5

P5

J5

J8

J9

J10

J11

K5

K8

K9

K10

K11

P14

R15

T7

T9

T10

T12

T15

U15

E14

F4

F5

G5

H5

H8

H9

H10

H11

C15

D4

D5

D14

D15

E5

[JTAG for LG5111]

R9765 22

R9767 22

R9768 22

R9769 22

R9766 22

LG5111_RESET

[EEPROM for LG5111]

EEPROM_A1

+3.3V_NORMAL

R9735

3.3K

R9736

10K

OPT

+3.3V_NORMAL

I2C Slave Address : 0xA4

Write Protection

Low : Normal Operation

High : Write Protection

C9706

0.1uF

16V

IC9703

M24512-WMW6G(REV.B)

E0

1

E1

2

E2

3

VSS

4

8

VCC

7

WC

6

SCL

5

SDA

R9752

3.3K

OPT

R9757

2K

R9758

2K

EEPROM_WP

M_SCL

M_SDA

R9753

10K

R9771

10K

R9772

10K

R9773

10K

R9774

10K

R9775

1K

TDO

TDI

TCK

TMS

TRST_N

+1.8V_RXVDD

C9712

0.1uF

16V

C9718

0.1uF

16V

C9724

0.1uF

16V

C9731

0.1uF

16V

C9738

0.1uF

16V

C9745

0.1uF

16V

+1.8V_PLL

C9762

0.1uF

16V

C9768

0.1uF

16V

+1.8V_TXVDD

C9713

0.1uF

16V

C9719

0.1uF

16V

C9725

0.1uF

16V

C9732

0.1uF

16V

C9739

0.1uF

16V

C9746

0.1uF

16V

C9751

0.1uF

16V

C9757

0.1uF

16V

C9764

0.1uF

16V

C9769

0.1uF

16V

C9773

0.1uF

16V

C9775

0.1uF

16V

+1.8V_VDD

C9714

0.1uF

16V

C9720

0.1uF

16V

C9726

0.1uF

16V

C9733

0.1uF

16V

C9740

0.1uF

16V

C9747

0.1uF

16V

C9752

0.1uF

16V

C9758

0.1uF

16V

C9765

0.1uF

16V

C9770

0.1uF

16V

+1.8V_VDD

C9715

0.1uF

16V

C9721

0.1uF

16V

C9727

0.1uF

16V

C9734

0.1uF

16V

C9741

0.1uF

16V

C9748

0.1uF

16V

C9753

0.1uF

16V

C9759

0.1uF

16V

C9766

0.1uF

16V

C9771

0.1uF

16V

+3.3V_VDD

C9716

0.1uF

16V

C9722

0.1uF

16V

C9728

0.1uF

16V

C9735

0.1uF

16V

C9742

0.1uF

16V

C9749

0.1uF

16V

C9754

0.1uF

16V

C9760

0.1uF

16V

C9767

0.1uF

16V

C9772

0.1uF

16V

+3.3V_VDD

C9717

0.1uF

16V

C9723

0.1uF

16V

C9729

0.1uF

16V

C9736

0.1uF

16V

C9743

0.1uF

16V

C9750

0.1uF

16V

C9755

0.1uF

16V

C9761

0.1uF

16V

+1.8V_L/DIMMING +1.8V_RXVDD

+1.8V_TXVDD

+1.8V_PLL

+1.8V_VDD

L9702 120-ohm

L9703 120-ohm

L9704 120-ohm

L9705 120-ohm

C9730

10uF

10V

C9737

10uF

10V

C9744

10uF

10V

C9756

10uF

10V

+3.3V_NORMAL

+3.3V_VDD

L9706 120-ohm

C9774

10uF

10V

[UART for LG5111]

FOr Debugging

P9701

12505WS-04A00

1

+3.3V

2

GND

3

RX

4

TX

+3.3V_NORMAL

C9763

0.1uF

16V

R9776 22

5

OPT

.

UART_RXD

UART_TXD

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

COMMON_LD_400/480HZ

LG5111 (L.D.) from BCM

09/10/13

97

LGE Internal Use Only

+0.9VREF

R104

100

R108

100

R112

100

R113

100

R114

100

R120

100

008:V20 LVRX1_CLKP

008:V20 LVRX1_CLKM

008:V22

008:V22

008:V21

LVRX1_AP

LVRX1_AM

008:V22

008:V21

008:V21

008:V19

008:V19

008:V18

008:V19

LVRX1_BP

LVRX1_BM

LVRX1_CP

LVRX1_CM

LVRX1_DP

LVRX1_DM

LVRX1_EP

LVRX1_EM

009:E22

009:E22

009:O11

009:O11

009:O9

009:O9

009:O8

009:O8

009:O6

009:O6

009:O5

009:O6

009:E21

009:E21

009:E16

009:E17

009:O5

009:O5

009:E14

009:E14

009:E15

009:E15

009:E17

009:E17

LVTX1_CLK+

LVTX1_CLK-

LVTX1_A+

LVTX1_A-

LVTX1_B+

LVTX1_B-

LVTX1_C+

LVTX1_C-

LVTX1_D+

LVTX1_D-

LVTX1_E+

LVTX1_E-

LVTX2_CLK+

LVTX2_CLK-

LVTX2_A+

LVTX2_A-

LVTX2_B+

LVTX2_B-

LVTX2_C+

LVTX2_C-

LVTX2_D+

LVTX2_D-

LVTX2_E+

LVTX2_E-

009:E20

009:E20

009:E16

009:E16

009:E11

009:E12

009:E8

009:E8

009:E12

009:E12

009:E10

009:E11

LVTX3_CLK+

LVTX3_CLK-

LVTX3_A+

LVTX3_A-

LVTX3_B+

LVTX3_B-

LVTX3_C+

LVTX3_C-

LVTX3_D+

LVTX3_D-

LVTX3_E+

LVTX3_E-

+3.3VD

R102

3.3K

R103

3.3K

R105

3.3K

R109

3.3K

009:E5

009:E5

009:E10

009:E10

009:E8

009:E8

009:E7

009:E7

009:E6

009:E6

009:E11

009:E11

LVTX4_CLK+

LVTX4_CLK-

LVTX4_A+

LVTX4_A-

LVTX4_B+

LVTX4_B-

LVTX4_C+

LVTX4_C-

LVTX4_D+

LVTX4_D-

LVTX4_E+

LVTX4_E-

TMODE[0]

001:AO38

R119 10K AL12

AN10

AP10

AL11

AM11

A16

B16

A14

B14

C15

C14

B15

A15

C17

C16

B17

A17

TCLK4P

TCLK4N

TA4P

TA4N

TB4P

TB4N

TC4P

TC4N

TD4P

TD4N

TE4P

TE4N

SMODE

TMODE[0]

TMODE[1]

TMODE[2]

TMODE[3]

[TEST MODE SETTING]

- SMODE = 0 : Serial Flash Setting

- TMODE(All) = 1 : Normal Mode

SW100

JTP-1127WEM

OPT

For 3D Formatter I2C (Ready)

FPGA_SCL

FPGA_SDA

+3.3VD

OPT

R101

1K

OPT

C112

0.1uF

50V

I

1

IC100

KIA7029AF

OPT

2

G

3

OPT

R106

10K

O

+3.3VD

R107

1K

R110

1K

R1181

3.3K

OPT

R1182

3.3K

OPT

+3.3VD

001:AO35;001:AX5

001:AO37;001:AX5

SPI_CS

001:AO36;001:BD4

SPI_SCLK

SPI_DI

001:AO36;001:BD4 SPI_DO

OPT

C123

0.1uF

50V

001:E12

001:E12

UART_TX

008:W24

R111

OPT 33

FRC_TCK

FRC_TMS

FRC_TDI

FRC_TDO

R1183

R1184

R115

R116

R121

3.3K

AP31

AN31

AM31

AK31

AL31

TRST_N

TCK

TMS

TDI

TDO

33

33

0 OPT

0 OPT

AN8

AM8

AL9

AP8

M_SCL

M_SDA

SCL

SDA

UART_RX

FRC_RESET

R117

R118

R122

R123

33

33

33

33

AL10

AP9

AN9

AM9

AL8

AP7

AM10

AP11

AN11

SPI_CS

SPI_SCLK

SPI_DI

SPI_DO

UART_RXD

UART_TXD

PORES_N

XTALI

XTALO

A8

B8

A6

B6

C7

C6

B7

A7

C9

C8

B9

A9

TCLK2P

TCLK2N

TA2P

TA2N

TB2P

TB2N

TC2P

TC2N

TD2P

TD2N

TE2P

TE2N

A12

B12

A10

B10

C11

C10

B11

A11

C13

C12

B13

A13

TCLK3P

TCLK3N

TA3P

TA3N

TB3P

TB3N

TC3P

TC3N

TD3P

TD3N

TE3P

TE3N

AN18

AP18

AP15

AN15

AP16

AN16

AP17

AN17

AN19

AP19

AN20

AP20

C3

C2

B3

A3

C5

C4

A4

B4

A2

B2

B5

A5

TCLK1P

TCLK1N

TA1P

TA1N

TB1P

TB1N

TC1P

TC1N

TD1P

TD1N

TE1P

TE1N

RCLK1P

RCLK1M

RA1P

RA1M

RB1P

RB1M

RC1P

RC1M

RD1P

RD1M

RE1P

RE1M

+3.3V_IO

P100

12505WR-04A00

OPT

+3.3V

1

2

GND

3

RX

4

TX

5

.

+3.3VD

C113

0.1uF

50V

R1186

33

UART_RX

001:H18

UART_TX 001:H18

+0.9VREFS

IC102

LG1120

C100

0.1uF

16V

C105

0.1uF

16V

C106

0.1uF

16V

C109

0.1uF

16V

C114

0.1uF

16V

C117

0.1uF

16V

C120

0.1uF

16V

C126

0.1uF

16V

C127

0.1uF

16V

C130

0.1uF

16V

C133

0.1uF

16V

C137

0.1uF

16V

C139

0.1uF

16V

C142

0.1uF

16V

C145

0.1uF

16V

C148

0.1uF

16V

C151

0.1uF

16V

C154

0.1uF

16V

C156

0.1uF

16V

C159

0.1uF

16V

C162

0.1uF

16V

C165

0.1uF

16V

C168

0.1uF

16V

C170

0.1uF

16V

C173

0.1uF

16V

C176

0.1uF

16V

C179

0.1uF

16V

C181

0.1uF

16V

C182

10uF

10V

R170

100

TCLK6P

TCLK6N

TA6P

TA6N

TB6P

TB6N

TC6P

TC6N

TD6P

TD6N

TE6P

TE6N

TCLK7P

TCLK7N

TA7P

TA7N

TB7P

TB7N

TC7P

TC7N

TD7P

TD7N

TE7P

TE7N

A28

B28

A26

B26

C27

C26

B27

A27

C29

C28

B29

A29

A24

B24

A22

B22

C23

C22

B23

A23

C25

C24

B25

A25

RCLK2P

RCLK2M

RA2P

RA2M

RB2P

RB2M

RC2P

RC2M

RD2P

RD2M

RE2P

RE2M

TCLK5P

TCLK5N

TA5P

TA5N

TB5P

TB5N

TC5P

TC5N

TD5P

TD5N

TE5P

TE5N

A20

B20

A18

B18

C19

C18

B19

A19

C21

C20

B21

A21

AN24

AP24

AN21

AP21

AN22

AP22

AN23

AP23

AN25

AP25

AN26

AP26

GPIO[0]

GPIO[1]

GPIO[2]

GPIO[3]

GPIO[4]

GPIO[5]

GPIO[6]

GPIO[7]

GPIO[8]

GPIO[9]

GPIO[10]

GPIO[11]

GPIO[12]

GPIO[13]

GPIO[14]

GPIO[15]

GPIO[16]

GPIO[17]

GPIO[18]

GPIO[19]

GPIO[20]

GPIO[21]

GPIO[22]

GPIO[23]

GPIO[24]

TCLK8P

TCLK8N

TA8P

TA8N

TB8P

TB8N

TC8P

TC8N

TD8P

TD8N

TE8P

TE8N

A32

B32

A30

B30

C31

C30

B31

A31

C33

C32

B33

A33

M_VS

M_SCLK

M_MOSI

S_VS

S_SCLK

S_MOSI

AL30

AM30

AN30

AP5

AN5

AM5

AN7

AL27

AN28

AP29

AN29

AN27

AP27

AP30

AM27

AP28

AM28

AL28

AM29

AL29

AL4

AM4

AN4

AP4

AL5

AL6

AM6

AN6

AP6

AL7

AM7

R1190

R1219

R173

R1191

R180

R1220

R1214

R1215

R1216

R1217

R1218

R1192

R1193

R1194

R1195

R1196

R1201

R1221

R171

100

R172

100

R174

100

LVTX5_CLK+

LVTX5_CLK-

LVTX5_A+

LVTX5_A-

LVTX5_B+

LVTX5_B-

LVTX5_C+

LVTX5_C-

LVTX5_D+

LVTX5_D-

LVTX5_E+

LVTX5_E-

LVTX6_CLK+

LVTX6_CLK-

LVTX6_A+

LVTX6_A-

LVTX6_B+

LVTX6_B-

LVTX6_C+

LVTX6_C-

LVTX6_D+

LVTX6_D-

LVTX6_E+

LVTX6_E-

LVTX7_CLK+

LVTX7_CLK-

LVTX7_A+

LVTX7_A-

LVTX7_B+

LVTX7_B-

LVTX7_C+

LVTX7_C-

LVTX7_D+

LVTX7_D-

LVTX7_E+

LVTX7_E-

LVTX8_CLK+

LVTX8_CLK-

LVTX8_A+

LVTX8_A-

LVTX8_B+

LVTX8_B-

LVTX8_C+

LVTX8_C-

LVTX8_D+

LVTX8_D-

LVTX8_E+

LVTX8_E-

R176

100

009:H21

009:H21

009:E31

009:E32

009:E29

009:E30

009:E29

009:E29

009:E26

009:E27

009:E26

009:E26

009:E36

009:E37

009:E35

009:E35

009:E35

009:E35

009:E33

009:E34

009:E5

009:E5

009:E33

009:E33

009:H22

009:H22

009:E32

009:E32

009:E28

009:E29

009:E27

009:E27

009:E31

009:E31

009:E36

009:E36

R179

100

009:O24

009:O23

009:E28

009:E28

009:O34

009:O34

009:E25

009:E26

009:O35

009:O35

009:O33

009:O33

+3.3VD

R177

4.7K

OPT

R178

4.7K

P102

YFW254-06

OPT

1

2

3

4

5

6

LVRX2_CLKP

LVRX2_CLKM

LVRX2_AP

LVRX2_AM

LVRX2_BP

LVRX2_BM

LVRX2_CP

LVRX2_CM

LVRX2_DP

LVRX2_DM

LVRX2_EP

LVRX2_EM

008:V15

008:V15

008:V17

008:V18

008:V17

008:V17

008:V16

008:V16

008:V14

008:V15

008:V14

008:V14

+3.3VD

Serial Flash Boot Mode

- GPIO[0]=1 : 50MHz Booting

- GPIO[0]=0 : 25MHz Booting

+3.3VD

R1210

22

R1211

22

R1212

22

R1213

22

FRC_TDI

FRC_TMS

FRC_TCK

FRC_TDO

P101

12505WR-10

11

+2.5VQ

+3.3V

+1.0VDC

1

2

3

4

5

6

7

8

9

10

L100

120-ohm

L101

120-ohm

L102

120-ohm

TCON_SCL 004:AA9

TCON_SDA 004:AE9

+2.5LVDS_TX

+2.5VPLL

+2.5LVDS_RX

L103

120-ohm

+3.3VD

L105

120-ohm

C1162

22uF

16V

C1165

22uF

16V

+3.3V_IO

TMODE[0] 001:H22

SPI_DI 001:H18;001:AX5

SPI_DO 001:H18;001:BD4

SPI_CS 001:H19;001:AX5

C1163

22uF

16V

C1166

22uF

16V

+1.0VPLL

C1167

0.1uF

16V

C1164

22uF

16V

33

33

33

33

WP_EEPROM_TCON

L/R_SYNC

004:AL21;005:AJ5

004:K10;005:I9

PWM_SEQ

R1225

10K

33

33

0

R1197

10K

OPT

R175

10K

33

33

33

33

33

33

33

33

33

33

33

+3.3VD

R1222

10K

VSYNC 008:Y25

/FPGA_RESET

3D_FRAME_INFO

009:AN29

010:AN12

OPT

R1185

10K

L/R_SYNC_FRC_OUT

LVDS_IN

LVDS_OUT

VIDEO_OUT

M_TCON_EN

I2CEN

S_TCON_EN

FPGA_D/L_CTRL

INCH_OPT_1

INCH_OPT_2

TCON_SCL_M

TCON_SDA_M

TCON_SCL_S

TCON_SDA_S

005:AA14

005:AG12

OD data D/L, during 2D/3D mode switching

R1226 0

OPT

R1227 0

OPT

GAMMA_BKSEL

DPM_CTRL1

R1223

R1224

OPT

0

0

+3.3VD

OPT

R1188

4.7K

008:M17

008:M17

TCON_POWER_EN

DPM_CTRL

LVDS_IN

- GPIO[5] = 1 : JEIDA

- GPIO[5] = 0 : VESA

007:Q15;006:P14

Input LVDS Data Mapping Selection

004:AM14

+3.3VD

OPT

R1198

4.7K

LVDS_OUT

Output LVDS Data Mapping Selection

- GPIO[6] = 1 : JEIDA

- GPIO[6] = 0 : VESA

+3.3VD

R1200

4.7K

OPT

VIDEO_OUT

Video Output Selection

- GPIO[7] = 1 : Reverse(LED Model)

- GPIO[7] = 0 : Normal(LAMP Model)

VDD_51

VDD_52

VDD_53

VDD_54

VDD_55

VDD_56

VDD_57

VDD_58

VDD_59

VDD_60

VDD_61

VDD_62

VDD_63

VDD_64

VDD_65

VDD_66

VDD_67

VDD_35

VDD_36

VDD_37

VDD_38

VDD_39

VDD_40

VDD_41

VDD_42

VDD_43

VDD_44

VDD_45

VDD_46

VDD_47

VDD_48

VDD_49

VDD_50

VDD_12

VDD_13

VDD_14

VDD_15

VDD_16

VDD_17

VDD_18

VDD_19

VDD_20

VDD_21

VDD_22

VDD_23

VDD_24

VDD_25

VDD_26

VDD_27

VDD_28

VDD_29

VDD_30

VDD_31

VDD_32

VDD_33

VDD_34

VDD_1

VDD_2

VDD_3

VDD_4

VDD_5

VDD_6

VDD_7

VDD_8

VDD_9

VDD_10

VDD_11

M30

N30

P30

R30

T30

U30

V30

W30

Y30

AA30

AB30

AC30

AD5

AE5

AG5

AF5

G30

H30

J30

K30

L30

AD30

AE30

AF30

AG30

AL14

AL15

AL16

AL17

AL18

AL19

AL20

AL21

AL22

AL23

AL24

AM15

AM16

AM25

AM26

H5

J5

K5

L5

M5

N5

P5

R5

T5

U5

V5

W5

Y5

AA5

AB5

AC5

E9

E11

E13

E15

E17

E19

E21

E23

E25

E27

G5

IC102

LG1120

+3.3V_IO

+2.5LVDS_TX

D7

D28

D29

D30

D3

D4

D5

D6

D31

D32

AJ5

AK5

AK6

AK7

AK8

AK9

AK10

AJ30

AK27

AK28

AK29

AK30

VDD33_1

VDD33_2

VDD33_3

VDD33_4

VDD33_5

VDD33_6

VDD33_7

VDD33_8

VDD33_9

VDD33_10

VDD33_11

VDD33_12

VDD33_13

VDD33_14

VDD33_15

VDD33_16

VDD33_17

VDD33_18

VDD33_19

VDD33_20

VDD33_21

VDD33_22

D8

D10

D12

D14

D20

D22

D24

D26

D16

D18

LVTX_VDD_1

LVTX_VDD_2

LVTX_VDD_3

LVTX_VDD_4

LVTX_VDD_5

LVTX_VDD_6

LVTX_VDD_7

LVTX_VDD_8

PVCC1

PVCC2

+1.0VDC

SS_DISP_DVDD

DDRPLL_DVDD

AM14

AN12

DDRPLL_AVDD

SS_AVDD

DISP_AVDD

AL13

AN13

AP14

+2.5LVDS_RX

LVRX_VDD1

LVRX_VDD2

LVRX_VDD3

LVRX_VDD4

AM18

AM20

AM22

AM24

+1.8V_DDRS

DDRS_VDDQ_1

DDRS_VDDQ_2

DDRS_VDDQ_3

DDRS_VDDQ_4

DDRS_VDDQ_5

DDRS_VDDQ_6

DDRS_VDDQ_7

DDRS_VDDQ_8

DDRS_VDDQ_9

DDRS_VDDQ_10

DDRS_VDDQ_11

DDRS_VDDQ_12

DDRS_VDDQ_13

DDRS_VDDQ_14

DDRS_VDDQ_15

DDRS_VDDQ_16

DDRS_VDDQ_17

DDRS_VDDQ_18

DDRS_VDDQ_19

DDRS_VDDQ_20

DDRS_VDDQ_21

DDRS_VDDQ_22

T4

U3

U4

Y4

AA3

AA4

AB4

AC4

AD4

AF1

AG4

AJ4

AK1

P1

P3

H1

K4

L3

M4

N4

P4

R4

DDR_VDDQ_1

DDR_VDDQ_2

DDR_VDDQ_3

DDR_VDDQ_4

DDR_VDDQ_5

DDR_VDDQ_6

DDR_VDDQ_7

DDR_VDDQ_8

DDR_VDDQ_9

DDR_VDDQ_10

DDR_VDDQ_11

DDR_VDDQ_12

DDR_VDDQ_13

DDR_VDDQ_14

DDR_VDDQ_15

DDR_VDDQ_16

DDR_VDDQ_17

DDR_VDDQ_18

DDR_VDDQ_19

DDR_VDDQ_20

DDR_VDDQ_21

DDR_VDDQ_22

L31

M31

M34

N31

P31

R31

R32

T31

U31

V31

Y31

AA31

AB31

AB34

AC31

AD31

AE31

AE32

AE34

AG31

AH31

AK34

+1.8V_DDR

+1.0VPLL

+2.5VPLL

For 3D Formatter

+3.3VD

+3.3VD

INCH_1_HIGH

R1205

4.7K

INCH_1_LOW

INCH_2_HIGH

INCH_OPT_1

R1207

4.7K

INCH_2_LOW

INCH_OPT_2

42

INCH_1

LOW

INCH_2

LOW

47

55

LOW

HIGH

HIGH

LOW

XTAL

XTAL_IN

001:H17

R191

1M

X100

25MHz

C1159

15pF

50V

C1160

15pF

50V

XTAL_OUT

001:H17

IC102

LG1120

VSS_195

VSS_196

VSS_197

VSS_198

VSS_199

VSS_200

VSS_201

VSS_202

VSS_203

VSS_204

VSS_205

VSS_206

VSS_207

VSS_208

VSS_209

VSS_210

VSS_179

VSS_180

VSS_181

VSS_182

VSS_183

VSS_184

VSS_185

VSS_186

VSS_187

VSS_188

VSS_189

VSS_190

VSS_191

VSS_192

VSS_193

VSS_194

VSS_211

VSS_212

VSS_213

VSS_214

VSS_215

VSS_216

VSS_217

VSS_218

VSS_219

VSS_220

VSS_221

VSS_222

VSS_223

VSS_224

VSS_225

VSS_226

VSS_227

VSS_228

VSS_229

VSS_142

VSS_143

VSS_144

VSS_145

VSS_146

VSS_147

VSS_148

VSS_149

VSS_150

VSS_151

VSS_152

VSS_153

VSS_154

VSS_155

VSS_156

VSS_157

VSS_127

VSS_128

VSS_129

VSS_130

VSS_131

VSS_132

VSS_133

VSS_134

VSS_135

VSS_136

VSS_137

VSS_138

VSS_139

VSS_140

VSS_141

VSS_158

VSS_159

VSS_160

VSS_161

VSS_162

VSS_163

VSS_164

VSS_165

VSS_166

VSS_167

VSS_168

VSS_169

VSS_170

VSS_171

VSS_172

VSS_173

VSS_174

VSS_175

VSS_176

VSS_177

VSS_178

AB21

AB22

AB23

AB32

AB33

AC12

AC13

AC14

AC15

AC16

AC17

AC18

AC19

AC20

AC21

AC22

AA17

AA18

AA19

AA20

AA21

AA22

AA23

AB12

AB13

AB14

AB15

AB16

AB17

AB18

AB19

AB20

Y13

Y14

Y15

Y16

Y17

Y18

Y19

Y20

Y21

Y22

Y23

AA12

AA13

AA14

AA15

AA16

W19

W20

W21

W22

W23

W32

Y12

W13

W14

W15

W16

W17

W18

AJ31

AJ34

AK2

AK11

AK12

AK13

AK14

AK15

AK16

AK17

AK18

AK19

AC23

AD3

AE33

AF2

AF32

AG3

AH5

AH30

AH33

AK20

AK21

AK22

AK23

AK24

AK25

AK26

AK33

AL1

AL3

AL25

AL26

AL32

AM3

AN2

AN3

AN32

AP2

AP3

AP32

AP33

LVTX_VSS_1

LVTX_VSS_2

LVTX_VSS_3

LVTX_VSS_4

LVTX_VSS_5

LVTX_VSS_6

LVTX_VSS_7

LVTX_VSS_8

D9

D11

D13

D15

D21

D23

D25

D27

PGND1

PGND2

D17

D19

LVRX_VSS1

LVRX_VSS2

LVRX_VSS3

LVRX_VSS4

AM17

AM19

AM21

AM23

DDRPLL_DVSS

SS_AVSS

DISP_AVSS

DDRPLL_AVSS

SS_DISP_DVSS

AM12

AM13

AN14

AP12

AP13

VSS_74

VSS_75

VSS_76

VSS_77

VSS_78

VSS_79

VSS_80

VSS_81

VSS_82

VSS_83

VSS_84

VSS_85

VSS_86

VSS_87

VSS_88

VSS_89

VSS_90

VSS_91

VSS_92

VSS_93

VSS_94

VSS_58

VSS_59

VSS_60

VSS_61

VSS_62

VSS_63

VSS_64

VSS_65

VSS_66

VSS_67

VSS_68

VSS_69

VSS_70

VSS_71

VSS_72

VSS_73

VSS_111

VSS_112

VSS_113

VSS_114

VSS_115

VSS_116

VSS_117

VSS_118

VSS_119

VSS_120

VSS_121

VSS_122

VSS_123

VSS_124

VSS_125

VSS_126

VSS_95

VSS_96

VSS_97

VSS_98

VSS_99

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105

VSS_106

VSS_107

VSS_108

VSS_109

VSS_110

VSS_42

VSS_43

VSS_44

VSS_45

VSS_46

VSS_47

VSS_48

VSS_49

VSS_50

VSS_51

VSS_52

VSS_53

VSS_54

VSS_55

VSS_56

VSS_57

VSS_21

VSS_22

VSS_23

VSS_24

VSS_25

VSS_26

VSS_27

VSS_28

VSS_29

VSS_30

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

VSS_36

VSS_37

VSS_38

VSS_39

VSS_40

VSS_41

VSS_1

VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_8

VSS_9

VSS_10

VSS_11

VSS_12

VSS_13

VSS_14

VSS_15

VSS_16

VSS_17

VSS_18

VSS_19

VSS_20

U15

U16

U17

U18

U19

U20

U21

U22

U23

V12

V13

V14

V15

V16

V17

V18

V19

V20

V21

V22

V23

W4

W12

R23

T12

T13

T14

T15

T16

T17

T18

T19

T20

T21

T22

T23

U12

U13

U14

P19

P20

P21

P22

P23

R12

R13

R14

R15

R16

R17

R18

R19

R20

R21

R22

N16

N17

N18

N19

N20

N21

N22

N23

P2

P12

P13

P14

P15

P16

P17

P18

E18

E20

E22

E24

E26

E28

E29

E30

E31

E6

E7

E8

E10

E12

E14

E16

E32

F1

F5

F30

G3

G31

H2

B1

B34

C1

C34

D1

D2

D33

D34

E3

E4

E5

M18

M19

M20

M21

M22

M23

M32

M33

N12

N13

N14

N15

J3

K1

L32

M12

M13

M14

M15

M16

M17

+1.0VPLL

+1.8V_DDRS

C183

0.1uF

16V

C186

0.1uF

16V

C189

0.1uF

16V

C193

0.1uF

16V

C195

0.1uF

16V

C198

0.1uF

16V

C1101

0.1uF

16V

C1104

0.1uF

16V

C1107

0.1uF

16V

C1110

0.1uF

16V

C1113

0.1uF

16V

C1116

0.1uF

16V

C1121

0.1uF

16V

C1122

0.1uF

16V

C1127

0.1uF

16V

C1129

0.1uF

16V

C1133

0.1uF

16V

C1136

0.1uF

16V

C1139

0.1uF

16V

C1140

0.1uF

16V

C1143

0.1uF

16V

C1148

0.1uF

16V

C1151

10uF

10V

C1152

22uF

16V

C1153

22uF

16V

C1154

22uF

16V

C1155

22uF

16V

C1157

0.1uF

16V

C1158

0.1uF

16V

+2.5LVDS_TX

C101

0.1uF

16V

C103

0.1uF

16V

C107

0.1uF

16V

C110

0.1uF

16V

C115

0.1uF

16V

C119

0.1uF

16V

C121

0.1uF

16V

C124

0.1uF

16V

C128

0.1uF

16V

C131

0.1uF

16V

C134

0.1uF

16V

C136

0.1uF

16V

C140

0.1uF

16V

C143

0.1uF

16V

C146

0.1uF

16V

C149

10uF

10V

C152

22uF

16V

+2.5LVDS_RX

C157

0.1uF

16V

C160

0.1uF

16V

C163

0.1uF

16V

C166

0.1uF

16V

+2.5VPLL

C172

0.1uF

16V

C175

0.1uF

16V

C177

0.1uF

16V

+1.8V_DDR

C102

0.1uF

16V

C104

0.1uF

16V

C108

0.1uF

16V

C111

0.1uF

16V

C116

0.1uF

16V

C118

0.1uF

16V

C122

0.1uF

16V

C125

0.1uF

16V

C129

0.1uF

16V

C132

0.1uF

16V

C135

0.1uF

16V

C138

0.1uF

16V

C141

0.1uF

16V

C144

0.1uF

16V

C147

0.1uF

16V

C150

0.1uF

16V

C153

0.1uF

16V

C155

0.1uF

16V

C158

0.1uF

16V

C161

0.1uF

16V

C164

0.1uF

16V

C167

0.1uF

16V

C169

10uF

10V

C171

22uF

16V

C174

22uF

16V

C178

22uF

16V

C180

22uF

16V

+1.0VDC

C184

0.1uF

16V

C187

0.1uF

16V

C190

0.1uF

16V

C192

0.1uF

16V

C196

0.1uF

16V

C199

0.1uF

16V

C1102

0.1uF

16V

C1105

0.1uF

16V

C1108

0.1uF

16V

C1111

0.1uF

16V

C1114

0.1uF

16V

C1117

0.1uF

16V

C1119

0.1uF

16V

C1123

0.1uF

16V

C1125

0.1uF

16V

C1130

0.1uF

16V

C1131

0.1uF

16V

C1134

0.1uF

16V

C1137

0.1uF

16V

C1141

0.1uF

16V

C1144

0.1uF

16V

C1146

10uF

10V

C1149

10uF

10V

+1.0VDC

C185

0.1uF

16V

C188

0.1uF

16V

C191

0.1uF

16V

C194

0.1uF

16V

C197

0.1uF

16V

C1100

0.1uF

16V

C1103

0.1uF

16V

C1106

0.1uF

16V

C1109

0.1uF

16V

C1112

0.1uF

16V

C1115

0.1uF

16V

C1118

0.1uF

16V

C1120

0.1uF

16V

C1124

0.1uF

16V

C1126

0.1uF

16V

C1128

0.1uF

16V

C1132

0.1uF

16V

C1135

0.1uF

16V

C1138

0.1uF

16V

C1142

0.1uF

16V

C1145

0.1uF

16V

C1147

10uF

10V

C1150

10uF

10V

SPI FLASH(2Mbit)

+3.3VD

SPI_CS

001:H19;001:AO35

SPI_DI

001:H18;001:AO37

R188

4.7K

R189

33

IC101

W25X20AVSNIG

R190

10K

CS

1 8

VCC

DO

2

WP

3

GND

4

7

HOLD

6

CLK

5

DIO

R192

3.3K

C1161

0.1uF

SPI_SCLK

001:H19;001:AO36

SPI_DO

001:H18;001:AO36

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

3D + 240 FRC + TCON BOARD

1

2009. 11. 13

10

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

+0.9VREF

IC200

H5PS5162FFR-S6C

DDR_ADDR[0-12]

001:L40;002:W39;002:AH39;002:BD39

001:Z38;002:U33;002:AI36;002:BB34

001:AA38;002:U33;002:AI36;002:BB33

001:V38;002:AI35

001:V38;002:AI35

001:X38;002:U32;002:AI35;002:BB33

001:Y38;002:U31;002:AI34;002:BB31

001:X38;002:U33;002:AI34;002:BB33

001:Y38;002:U31;002:AI34;002:BB32

001:Y38;002:U32;002:AI34;002:BB32

001:X38;002:U32;002:AI34;002:BB32

001:V38

001:W38

DDR_DQS0

DDR_DQS1

001:Y38

001:Z38

DDR_BA0

DDR_BA1

DDR_CLK

DDR_CLK

DDR_CKE

DDR_ODT

DDR_CS

DDR_RAS

DDR_CAS

DDR_WE

DDR_DM0

DDR_DM1

001:V38

001:W38

DDR_DQS0

DDR_DQS1

DDR_ADDR[0]

DDR_ADDR[1]

DDR_ADDR[2]

DDR_ADDR[3]

DDR_ADDR[4]

DDR_ADDR[5]

DDR_ADDR[6]

DDR_ADDR[7]

DDR_ADDR[8]

DDR_ADDR[9]

DDR_ADDR[10]

DDR_ADDR[11]

DDR_ADDR[12]

R204

200

VREF

J2

A9

A10/AP

A11

A12

A0

A1

A2

A3

A4

A5

A6

A7

A8

M8

M3

M7

N2

N8

N3

N7

P2

P8

P3

M2

P7

R2

BA0

BA1

L2

L3

CK

CK

CKE

J8

K8

K2

ODT

CS

RAS

CAS

WE

K9

L8

K7

L7

K3

R202

100

OPT

R205

100

OPT

LDQS

UDQS

F7

B7

LDM

UDM

F3

B3

LDQS

UDQS

E8

A8

NC4

NC5

NC6

L1

R3

R7

NC1

NC2

NC3

A2

E2

R8

VSSDL

J7

+1.8V_DDR

VDDL

J1

H9

F1

F9

C8

C2

D7

D3

D1

D9

B1

B9

G8

G2

H7

H3

H1

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DDR_DATA[0]

DDR_DATA[1]

DDR_DATA[2]

DDR_DATA[3]

DDR_DATA[4]

DDR_DATA[5]

DDR_DATA[6]

DDR_DATA[7]

DDR_DATA[8]

DDR_DATA[9]

DDR_DATA[10]

DDR_DATA[11]

DDR_DATA[12]

DDR_DATA[13]

DDR_DATA[14]

DDR_DATA[15]

+1.8V_DDR

A1

E1

J9

M9

R1

VDD5

VDD4

VDD3

VDD2

VDD1

A9

C1

C3

C7

C9

E9

G1

G3

G7

G9

VDDQ10

VDDQ9

VDDQ8

VDDQ7

VDDQ6

VDDQ5

VDDQ4

VDDQ3

VDDQ2

VDDQ1

A3

E3

J3

N1

P9

VSS5

VSS4

VSS3

VSS2

VSS1

B2

B8

A7

D2

D8

E7

F2

F8

H2

H8

VSSQ10

VSSQ9

VSSQ8

VSSQ7

VSSQ6

VSSQ5

VSSQ4

VSSQ3

VSSQ2

VSSQ1

DDR_DATA[0-31]

001:O40;002:AQ40

+1.8V_DDR

C200

0.1uF

16V

C203

0.1uF

16V

C206

0.1uF

16V

C209

0.1uF

16V

C212

0.1uF

16V

C215

0.1uF

16V

C218

0.1uF

16V

C221

0.1uF

16V

C223

0.1uF

16V

C225

0.1uF

16V

C227

0.1uF

16V

C229

0.1uF

16V

C231

0.1uF

16V

C233

0.1uF

16V

C235

0.1uF

16V

C237

0.1uF

16V

C243

10uF

10V

For Termination of DDR

+0.9VTT

DDR_ADDR[0-12]

001:L40;002:E39;002:AH39;002:BD39

150

150

150

150

R288

R289

R290

R291

DDR_ADDR[0]

DDR_ADDR[1]

DDR_ADDR[2]

DDR_ADDR[3]

150

150

150

150

R292

R293

R294

R295

DDR_ADDR[4]

DDR_ADDR[5]

DDR_ADDR[6]

DDR_ADDR[7]

150

150

150

150

150

R296

R297

R298

R299

DDR_ADDR[8]

DDR_ADDR[9]

DDR_ADDR[10]

DDR_ADDR[11]

R215

DDR_ADDR[12]

150

150

150

150

150

150

150

150

R216

R217

R218

R219

R220

R221

R222

R223

DDR_BA0 001:Z38;002:F36;002:AI36;002:BB34

DDR_BA1 001:AA38;002:F36;002:AI36;002:BB33

DDR_CS

001:X38;002:F34;002:AI34;002:BB33

DDR_CKE 001:X38;002:F35;002:AI35;002:BB33

DDR_WE 001:X38;002:F34;002:AI34;002:BB32

DDR_CAS 001:Y38;002:F34;002:AI34;002:BB32

DDR_RAS 001:Y38;002:F34;002:AI34;002:BB32

DDR_ODT 001:Y38;002:F34;002:AI34;002:BB31

+3.3VD

+0.9VTT

C259

0.1uF

16V

C255

4.7uF

10V

C253

47uF

10V

+0.9VREF

C254

47uF

10V

C263

0.01uF

50V

C261

0.1uF

16V

C257

10uF

6.3V

R224

10K

IC202

BD35331F-E2

GND

1

EN

2

VTTS

3

VREF

4

8

VTT

7

VTT_IN

6

VCC

5

VDDQ

C265

1uF

10V

RC FILTER

R236

220

C269

2.2uF

25V

+1.8V_DDR

C201

0.1uF

16V

C204

0.1uF

16V

C207

0.1uF

16V

C210

0.1uF

16V

C213

0.1uF

16V

C216

0.1uF

16V

C219

0.1uF

16V

C222

0.1uF

16V

C224

0.1uF

16V

C226

0.1uF

16V

C228

0.1uF

16V

C230

0.1uF

16V

C232

0.1uF

16V

C234

0.1uF

16V

C236

0.1uF

16V

C238

0.1uF

16V

C244

10uF

10V

+0.9VREF

C202

0.1uF

16V

C205

0.1uF

16V

C208

0.1uF

16V

C211

0.1uF

16V

C214

0.1uF

16V

C217

0.1uF

16V

C220

0.1uF

16V

+0.9VREFS

DDRS_ADDR[0-12]

001:K12;002:W13;002:AK17;002:BD12

DDRS_ADDR[0]

DDRS_ADDR[1]

DDRS_ADDR[2]

DDRS_ADDR[3]

DDRS_ADDR[4]

DDRS_ADDR[5]

DDRS_ADDR[6]

DDRS_ADDR[7]

DDRS_ADDR[8]

DDRS_ADDR[9]

DDRS_ADDR[10]

DDRS_ADDR[11]

DDRS_ADDR[12]

001:Z13;002:U8;002:AK13;002:BB7

001:AA13;002:U7;002:AK13;002:BB6

DDRS_BA1

001:V13;002:AK13

001:V13;002:AK12

001:X13;002:U7;002:AK12;002:BB6

001:Y13;002:U5;002:AK12;002:BB4

001:X13;002:U7;002:AK12;002:BB6

001:Y13;002:U6;002:AK11;002:BB5

001:Y13;002:U6;002:AK11;002:BB5

001:X13;002:U6;002:AK11;002:BB5

001:V13

001:W13

001:Y13

001:Z13

001:V13

001:W13

DDRS_BA0

DDRS_CLK

DDRS_CLK

DDRS_CKE

DDRS_ODT

DDRS_CS

DDRS_RAS

DDRS_CAS

DDRS_WE

DDRS_DQS0

DDRS_DQS1

DDRS_DM0

DDRS_DM1

DDRS_DQS0

DDRS_DQS1

R200

200

R201

100

OPT

R203

100

OPT

+1.8V_DDRS

VREF

J2

A6

A7

A8

A9

A10/AP

A11

A12

A0

A1

A2

A3

A4

A5

N7

P2

P8

P3

M2

P7

R2

M8

M3

M7

N2

N8

N3

BA0

BA1

L2

L3

CK

CK

CKE

J8

K8

K2

ODT

CS

RAS

CAS

WE

K9

L8

K7

L7

K3

LDQS

UDQS

F7

B7

LDM

UDM

F3

B3

LDQS

UDQS

E8

A8

NC4

NC5

NC6

L1

R3

R7

NC1

NC2

NC3

A2

E2

R8

VSSDL

J7

IC201

H5PS5162FFR-S6C

G8

G2

H7

H3

H1

H9

F1

F9

C8

C2

D7

D3

D1

D9

B1

B9

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DDRS_DATA[0]

DDRS_DATA[1]

DDRS_DATA[2]

DDRS_DATA[3]

DDRS_DATA[4]

DDRS_DATA[5]

DDRS_DATA[6]

DDRS_DATA[7]

DDRS_DATA[8]

DDRS_DATA[9]

DDRS_DATA[10]

DDRS_DATA[11]

DDRS_DATA[12]

DDRS_DATA[13]

DDRS_DATA[14]

DDRS_DATA[15]

+1.8V_DDRS

A1

E1

J9

M9

R1

VDD5

VDD4

VDD3

VDD2

VDD1

VDDL

J1

A9

C1

C3

C7

C9

E9

G1

G3

G7

G9

VDDQ10

VDDQ9

VDDQ8

VDDQ7

VDDQ6

VDDQ5

VDDQ4

VDDQ3

VDDQ2

VDDQ1

A3

E3

J3

N1

P9

VSS5

VSS4

VSS3

VSS2

VSS1

B2

B8

A7

D2

D8

E7

F2

F8

H2

H8

VSSQ10

VSSQ9

VSSQ8

VSSQ7

VSSQ6

VSSQ5

VSSQ4

VSSQ3

VSSQ2

VSSQ1

DDRS_DATA[0-31]

001:N11;002:AT17

+3.3VD

+0.9VTTS

C260

0.1uF

16V

C256

4.7uF

10V

C2201

47uF

10V

C2202

47uF

10V

+0.9VREFS

C264

0.01uF

50V

C262

0.1uF

16V

C258

10uF

6.3V

R225

10K

IC203

BD35331F-E2

GND

1

EN

2

VTTS

3

VREF

4

8

VTT

7

VTT_IN

6

VCC

5

VDDQ

C266

1uF

10V

RC FILTER

R237

220

C270

2.2uF

25V

For Termination of DDR

+0.9VTTS

DDRS_ADDR[0-12]

001:K12;002:E16;002:AK17;002:BD12

150

150

150

150

R2200

R2201

R2202

R2203

DDRS_ADDR[0]

DDRS_ADDR[1]

DDRS_ADDR[2]

DDRS_ADDR[3]

150

150

150

150

R2204

R2205

R2206

R2207

DDRS_ADDR[4]

DDRS_ADDR[5]

DDRS_ADDR[6]

DDRS_ADDR[7]

150

150

150

150

R2208

R2209

R2210

R2211

DDRS_ADDR[8]

DDRS_ADDR[9]

DDRS_ADDR[10]

DDRS_ADDR[11]

150 R206

DDRS_ADDR[12]

150

150

150

150

150

150

150

150

R207

R208

R209

R210

R211

R212

R213

R214

DDRS_BA0 001:Z13;002:F13;002:AK13;002:BB7

DDRS_BA1 001:AA13;002:F13;002:AK13;002:BB6

DDRS_CS

001:X13;002:F11;002:AK12;002:BB6

DDRS_CKE 001:X13;002:F12;002:AK12;002:BB6

DDRS_WE 001:X13;002:F11;002:AK11;002:BB5

DDRS_CAS

001:Y13;002:F11;002:AK11;002:BB5

DDRS_RAS 001:Y13;002:F11;002:AK11;002:BB5

DDRS_ODT

001:Y13;002:F11;002:AK12;002:BB4

+1.8V_DDR

C267

10uF

6.3V

C273

0.01uF

50V

C271

0.1uF

16V

C268

10uF

6.3V

+1.8V_DDRS

C274

0.01uF

50V

C272

0.1uF

16V

+0.9VREF

IC205

H5PS5162FFR-S6C

DDR_ADDR[0-12]

001:L40;002:E39;002:W39;002:BD39

001:Z38;002:F36;002:U33;002:BB34

DDR_BA0

001:AA38;002:F36;002:U33;002:BB33 DDR_BA1

001:V38;002:F35

DDR_CLK

001:V38;002:F35

DDR_CLK

001:X38;002:F35;002:U32;002:BB33

DDR_CKE

001:Y38;002:F34;002:U31;002:BB31 DDR_ODT

001:X38;002:F34;002:U33;002:BB33 DDR_CS

001:Y38;002:F34;002:U31;002:BB32

DDR_RAS

001:Y38;002:F34;002:U32;002:BB32

DDR_CAS

001:X38;002:F34;002:U32;002:BB32 DDR_WE

001:W38

001:W38

DDR_DQS2

DDR_DQS3

001:Z38

001:Z38

DDR_DM2

DDR_DM3

001:W38

001:X38

DDR_DQS2

DDR_DQS3

DDR_ADDR[0]

DDR_ADDR[1]

DDR_ADDR[2]

DDR_ADDR[3]

DDR_ADDR[4]

DDR_ADDR[5]

DDR_ADDR[6]

DDR_ADDR[7]

DDR_ADDR[8]

DDR_ADDR[9]

DDR_ADDR[10]

DDR_ADDR[11]

DDR_ADDR[12]

R246

200

R247

100

OPT

R249

100

OPT

VREF

J2

A9

A10/AP

A11

A12

A0

A1

A2

A3

A4

A5

A6

A7

A8

M8

M3

M7

N2

N8

N3

N7

P2

P8

P3

M2

P7

R2

BA0

BA1

L2

L3

CK

CK

CKE

J8

K8

K2

ODT

CS

RAS

CAS

WE

K9

L8

K7

L7

K3

LDQS

UDQS

F7

B7

LDM

UDM

F3

B3

LDQS

UDQS

E8

A8

NC4

NC5

NC6

L1

R3

R7

NC1

NC2

NC3

A2

E2

R8

VSSDL

J7

+1.8V_DDR

VDDL

J1

H9

F1

F9

C8

C2

D7

D3

D1

D9

B1

B9

G8

G2

H7

H3

H1

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DDR_DATA[16]

DDR_DATA[17]

DDR_DATA[18]

DDR_DATA[19]

DDR_DATA[20]

DDR_DATA[21]

DDR_DATA[22]

DDR_DATA[23]

DDR_DATA[24]

DDR_DATA[25]

DDR_DATA[26]

DDR_DATA[27]

DDR_DATA[28]

DDR_DATA[29]

DDR_DATA[30]

DDR_DATA[31]

+1.8V_DDR

A1

E1

J9

M9

R1

VDD5

VDD4

VDD3

VDD2

VDD1

A9

C1

C3

C7

C9

E9

G1

G3

G7

G9

VDDQ10

VDDQ9

VDDQ8

VDDQ7

VDDQ6

VDDQ5

VDDQ4

VDDQ3

VDDQ2

VDDQ1

A3

E3

J3

N1

P9

VSS5

VSS4

VSS3

VSS2

VSS1

B2

B8

A7

D2

D8

E7

F2

F8

H2

H8

VSSQ10

VSSQ9

VSSQ8

VSSQ7

VSSQ6

VSSQ5

VSSQ4

VSSQ3

VSSQ2

VSSQ1

DDR_DATA[0-31] 001:O40;002:N40

For Termination of DDR

+0.9VTT

DDR_ADDR[0-12]

001:L40;002:E39;002:W39;002:AH39

150

150

150

150

R2212

R2213

R2214

R2215

DDR_ADDR[0]

DDR_ADDR[1]

DDR_ADDR[2]

DDR_ADDR[3]

150

150

150

150

R2216

R2217

R2218

R2219

DDR_ADDR[4]

DDR_ADDR[5]

DDR_ADDR[6]

DDR_ADDR[7]

150

150

150

150

R2220

R2221

R2222

R2223

DDR_ADDR[8]

DDR_ADDR[9]

DDR_ADDR[10]

DDR_ADDR[11]

150 R258

DDR_ADDR[12]

150

150

150

150

150

150

150

150

R259

R260

R261

R262

R263

R264

R265

R266

DDR_BA0 001:Z38;002:F36;002:U33;002:AI36

DDR_BA1 001:AA38;002:F36;002:U33;002:AI36

DDR_CS

001:X38;002:F34;002:U33;002:AI34

DDR_CKE 001:X38;002:F35;002:U32;002:AI35

DDR_WE 001:X38;002:F34;002:U32;002:AI34

DDR_CAS

001:Y38;002:F34;002:U32;002:AI34

DDR_RAS 001:Y38;002:F34;002:U31;002:AI34

DDR_ODT 001:Y38;002:F34;002:U31;002:AI34

0.9V DDR VREF POWER DIVIDER

- For Main Chip Side

+1.8V_DDR

+0.9VREF

OPT

+0.9VREF

+1.8V_DDR

OPT

C1216

0.1uF

16V

C1222

0.01uF

50V

R251

4.7K

OPT

C1236

0.1uF

16V

C1240

0.01uF

50V

R277

4.7K

OPT

+1.8V_DDR

+0.9VREF

OPT

C1244

0.1uF

16V

C1246

0.01uF

50V

R285

4.7K

OPT

+1.8V_DDRS

C275

0.1uF

16V

C278

0.1uF

16V

C281

0.1uF

16V

C284

0.1uF

16V

C287

0.1uF

16V

C290

0.1uF

16V

C293

0.1uF

16V

C296

0.1uF

16V

C298

0.1uF

16V

C1200

0.1uF

16V

C1202

0.1uF

16V

C1204

0.1uF

16V

C1206

0.1uF

16V

C1208

0.1uF

16V

C1210

0.1uF

16V

C1212

0.1uF

16V

C1214

10uF

10V

+1.8V_DDRS

C276

0.1uF

16V

C279

0.1uF

16V

C282

0.1uF

16V

C285

0.1uF

16V

C288

0.1uF

16V

C291

0.1uF

16V

C294

0.1uF

16V

C297

0.1uF

16V

C299

0.1uF

16V

C1201

0.1uF

16V

C1203

0.1uF

16V

C1205

0.1uF

16V

C1207

0.1uF

16V

C1209

0.1uF

16V

C1211

0.1uF

16V

C1213

0.1uF

16V

C1215

10uF

10V

+1.8V_DDRS

+0.9VREFS

R252

4.7K

OPT

C1217

0.1uF

16V

C1223

0.01uF

50V

R253

4.7K

OPT

+1.8V_DDRS

+0.9VREFS

R278

4.7K

OPT

C1237

0.1uF

16V

C1241

0.01uF

50V

R279

4.7K

OPT

+1.8V_DDRS

+0.9VREFS

R286

4.7K

OPT

C1245

0.1uF

16V

C1247

0.01uF

50V

R287

4.7K

OPT

+0.9VREFS

C277

0.1uF

16V

C280

0.1uF

16V

C283

0.1uF

16V

C286

0.1uF

16V

C289

0.1uF

16V

C292

0.1uF

16V

C295

0.1uF

16V

- For SDRAM Side

+1.8V_DDR

+0.9VREF

R254

4.7K

OPT

C1218

0.1uF

16V

C1224

0.01uF

50V OPT

+1.8V_DDR

+0.9VREF

OPT

C1238

0.1uF

16V

C1242

0.01uF

50V OPT

DDRS_ADDR[0-12]

001:K12;002:E16;002:W13;002:BD12

001:Z13;002:F13;002:U8;002:BB7

001:AA13;002:F13;002:U7;002:BB6

DDRS_BA0

DDRS_BA1

001:V13;002:F12

DDRS_CLK

001:V13;002:F12

001:X13;002:F12;002:U7;002:BB6

DDRS_CLK

DDRS_CKE

001:Y13;002:F11;002:U5;002:BB4

001:X13;002:F11;002:U7;002:BB6

001:Y13;002:F11;002:U6;002:BB5

001:Y13;002:F11;002:U6;002:BB5

001:X13;002:F11;002:U6;002:BB5

DDRS_ODT

DDRS_CS

DDRS_RAS

DDRS_CAS

DDRS_WE

001:W13

001:W13

DDRS_DQS2

DDRS_DQS3

001:Z13

001:Z13

DDRS_DM2

DDRS_DM3

001:W13

001:X13

DDRS_DQS2

DDRS_DQS3

+0.9VREFS

IC204

H5PS5162FFR-S6C

DDRS_ADDR[0]

DDRS_ADDR[1]

DDRS_ADDR[2]

DDRS_ADDR[3]

DDRS_ADDR[4]

DDRS_ADDR[5]

DDRS_ADDR[6]

DDRS_ADDR[7]

DDRS_ADDR[8]

DDRS_ADDR[9]

DDRS_ADDR[10]

DDRS_ADDR[11]

DDRS_ADDR[12]

R245

200

R244

100

OPT

R248

100

OPT

+1.8V_DDRS

CK

CK

CKE

J8

K8

K2

ODT

CS

RAS

CAS

WE

K9

L8

K7

L7

K3

LDQS

UDQS

F7

B7

LDM

UDM

F3

B3

LDQS

UDQS

E8

A8

NC4

NC5

NC6

L1

R3

R7

NC1

NC2

NC3

A2

E2

R8

VREF

J2

A9

A10/AP

A11

A12

A0

A1

A2

A3

A4

A5

A6

A7

A8

N7

P2

P8

P3

M2

P7

R2

M8

M3

M7

N2

N8

N3

BA0

BA1

L2

L3

VSSDL

J7

VDDL

J1

H9

F1

F9

C8

C2

D7

D3

D1

D9

B1

B9

G8

G2

H7

H3

H1

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DDRS_DATA[16]

DDRS_DATA[17]

DDRS_DATA[18]

DDRS_DATA[19]

DDRS_DATA[20]

DDRS_DATA[21]

DDRS_DATA[22]

DDRS_DATA[23]

DDRS_DATA[24]

DDRS_DATA[25]

DDRS_DATA[26]

DDRS_DATA[27]

DDRS_DATA[28]

DDRS_DATA[29]

DDRS_DATA[30]

DDRS_DATA[31]

+1.8V_DDRS

A1

E1

J9

M9

R1

VDD5

VDD4

VDD3

VDD2

VDD1

A9

C1

C3

C7

C9

E9

G1

G3

G7

G9

VDDQ10

VDDQ9

VDDQ8

VDDQ7

VDDQ6

VDDQ5

VDDQ4

VDDQ3

VDDQ2

VDDQ1

A3

E3

J3

N1

P9

VSS5

VSS4

VSS3

VSS2

VSS1

B2

B8

A7

D2

D8

E7

F2

F8

H2

H8

VSSQ10

VSSQ9

VSSQ8

VSSQ7

VSSQ6

VSSQ5

VSSQ4

VSSQ3

VSSQ2

VSSQ1

DDRS_DATA[0-31]

001:N11;002:N17

+0.9VREFS

+1.8V_DDRS

R256

4.7K

OPT

C1219

0.1uF

16V

C1225

0.01uF

50V

R257

4.7K

OPT

+0.9VREFS

+1.8V_DDRS

R282

4.7K

OPT

C1239

0.1uF

16V

C1243

0.01uF

50V

R283

4.7K

OPT

For Termination of DDR

+0.9VTTS

DDRS_ADDR[0-12]

001:K12;002:E16;002:W13;002:AK17

150

150

150

150

R2224

R2225

R2226

R2227

DDRS_ADDR[0]

DDRS_ADDR[1]

DDRS_ADDR[2]

DDRS_ADDR[3]

150

150

150

150

R2228

R2229

R2230

R2231

DDRS_ADDR[4]

DDRS_ADDR[5]

DDRS_ADDR[6]

DDRS_ADDR[7]

150

150

150

150

150

R2232

R2233

R2234

R2235

DDRS_ADDR[8]

DDRS_ADDR[9]

DDRS_ADDR[10]

DDRS_ADDR[11]

R267

DDRS_ADDR[12]

150

150

150

150

150

150

150

150

R268

R269

R270

R271

R272

R273

R274

R275

DDRS_BA0 001:Z13;002:F13;002:U8;002:AK13

DDRS_BA1 001:AA13;002:F13;002:U7;002:AK13

DDRS_CS

001:X13;002:F11;002:U7;002:AK12

DDRS_CKE 001:X13;002:F12;002:U7;002:AK12

DDRS_WE 001:X13;002:F11;002:U6;002:AK11

DDRS_CAS 001:Y13;002:F11;002:U6;002:AK11

DDRS_RAS 001:Y13;002:F11;002:U6;002:AK11

DDRS_ODT 001:Y13;002:F11;002:U5;002:AK12

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

3D + 240 FRC + TCON BOARD

DDR2 SDRAM 2

2009. 11. 13

10

LGE Internal Use Only

MAIN 3.3V & 3.3V IO POWER

VLCD_POWER

L301

120-ohm

C301

22uF

25V

C302

0.1uF

R301

22

IC301

MP8706EN-C247-LF-Z

IN

1

SW_1

2

SW_2

3

BST

4

Vout= 0.8*(1+R1/R2)

8

GND

7

VCC

6

FB

5

EN/SYNC

C309

0.47uF

50V

OPT

C308

1uF

50V

C311

100pF

50V

OPT

R308

39K

1%

R1

R307

100K

R306

39K

VLCD_POWER

(+12V)

R309

12.4K

1%

R2

L305

3.6uH

4.9A

C377

22uF

16V

+3.3V

C374

22uF

16V

C317

22uF

16V

1.0V DIGITAL CORE POWER

+3.3V

L303

120-ohm

Vout= 0.8*(1+R1/R2)

C304

100pF

R302

3K

1%

R1

R303

9.1K

1%

R2

FB

1

GND

2

IN

3

BS

4

R305

100K

IC302

MP2212DN

8

EN/SYNC

7

SW_2

6

SW_1

5

VCC

C303

22uF

16V

C306

10uF

6.3V

OPT

R304

10

1%

C312

1uF

10V

C314

0.22uF

50V

+1.0VDC

L306

3.6uH

NR8040T3R6N

C315

0.1uF

50V

C316

22uF

16V

C318

22uF

16V

C319

0.1uF

16V

DDR2 SDRAM SOURCE POWER for FRC

VLCD_POWER

(+12V)

L304

120-ohm

C330

1uF

25V

C334

0.1uF

50V

C320

10uF

25V

R310

100K

C325

0.1uF

16V

R318

100K

PGOOD

22

EN/PSV

25

ENL

28

FB

1

TON

27

IC304

SC424MLTRT

+2.5VQ

15

LX_1

LX_2

20

LX_3

21

LX_4

P3

12

LXBST

LXS

24

ILIM

23

7

BST

L307

3.3uH

4.1A

R320

8.2K

C338

0.1uF

50V

R334

39K

OPT

C368

0.01uF

OPT

C340

1000pF

OPT

R335

10K

1%

R1

C369

100pF

50V

C371

22uF

16V

C372

22uF

16V

C373

22uF

16V

R338

4.3K

1%

R2

DDR2 SDRAM SOURCE POWER for FPGA

VLCD_POWER

L310

120-ohm

C321

22uF

25V

IC310

MP8706EN-C247-LF-Z

C326

0.1uF

R311

22

IN

1

SW_1

2

SW_2

3

BST

4

8

GND

7

VCC

6

FB

5

EN/SYNC

C337

0.47uF

50V

C335

1uF

50V

C339

100pF

50V

OPT

VLCD_POWER

(+12V)

R321

100K

R319

39K

Vout= 0.8*(1+R1/R2)

R336

10K

1%

R1

R337

4.7K

1%

R2

L314

3.6uH

4.9A

C375

22uF

16V

C376

22uF

16V

2V5

C370

22uF

16V

1.2V FPGA CORE POWER

+3.3V

Vout= 0.8*(1+R1/R2)

L308

120-ohm

R314

100K

C327 100pF

R312

10K

R313

0

R317

5.1K

IC305

MP2212DN

FB

1

GND

2

IN

3

BS

4

OPT

C322

22uF

16V

C323

0.1uF

50V

C324

22uF

16V

OPT

D302

1N4148W_DIODES

100V

R315

10

R316

10

C328

0.1uF

8

EN/SYNC

7

SW_2

6

SW_1

5

VCC

C329

1uF

25V

L309

3.6uH

C332

0.47uF

50V

1V2

C331

22uF

16V

C333

0.1uF

50V

C336

22uF

16V

OPT

1.8V DDR SDRAM POWER

IC307

SC4215ISTRT

Vout= 0.8*(1+R1/R2)

+1.8V_DDR

+2.5VQ

R323

91K

C349

10uF

10V

C353

0.1uF

16V

NC_1

1

EN

2

VIN

3

C356

0.22uF

50V

NC_2

4

8

GND

7

ADJ

6

VO

5

NC_3

R330

15K

1%

R1

R331

12K

1%

R2

C361

22uF

16V

C365

0.1uF

16V

+2.5VQ

R324

100K

C350

10uF

10V

C354

0.1uF

16V

IC308

SC4215ISTRT

Vout= 0.8*(1+R1/R2)

+1.8V_DDRS

NC_1

1

EN

2

VIN

3

C357

0.22uF

50V

NC_2

4

8

GND

7

ADJ

6

VO

5

NC_3

R332

15K

1/10W

1%

R1

R333

12K

1/10W

1%

R2

C362

22uF

16V

C366

0.1uF

16V

1.8V FPGA DDR SDRAM POWER

2V5

R322

100K

C348

10uF

10V

C352

0.1uF

16V

1V8

IC306

SC4215ISTRT

Vout= 0.8*(1+R1/R2)

NC_1

1

EN

2

VIN

3

C355

0.22uF

50V

NC_2

4

8

GND

7

ADJ

6

VO

5

NC_3

R327

15K

1/10W

1%

R1

R328

12K

1/10W

1%

R2

C360

22uF

16V

C364

0.1uF

16V

DDR_VTT

1.8V FPGA DDR SDRAM VTT & VREF

C310

22uF

16V

OPT

C305

22uF

16V

C307

22uF

16V

C344

10uF

16V

C347

0.1uF

16V

DDR_VREF0

DDR_VREF1

C343

0.1uF

16V

L311

BLM18PG121SN1D

C346

0.1uF

16V

OPT

C351

0.1uF

16V

L312

BLM18PG121SN1D

C342

0.1uF

16V

C345

0.1uF

16V

+3.3V

C358

0.1uF

16V

IC309

BD35331F-E2

GND

1

EN

2

VTTS

3

VREF

4

8

VTT

7

VTT_IN

6

VCC

5

VDDQ

R329

220

1V8

C359

10uF

25V

C363

2.2uF

10V

C367

0.1uF

16V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

3D + 240 FRC + TCON BOARD

FRC & FPGA Power Block

2009. 11. 13

3 10

LGE Internal Use Only

[T-CON LEFT => Master]

+1.8V_TCON

L400

120-ohm

+1.8V_TCON_M

C400

0.1uF

16V

C402

0.1uF

16V

C404

0.1uF

16V

C409

0.1uF

16V

C410

0.1uF

16V

C412

0.1uF

16V

C414

1uF

10V

C416

1uF

10V

004:R6;009:O8

004:U6;009:O7

TA5-

TA5+

TB5004:R5;009:O10

004:U5;009:O10

004:R5;009:O11

004:U5;009:O11

TB5+

TC5-

TC5+

004:R5;009:O13 TCLK5-

004:U5;009:O13 TCLK5+

004:R5;009:O12 TD5-

004:U5;009:O12

004:R5;009:O14

004:U5;009:O13

004:R4;009:O14

004:U4;009:O14

004:R3;009:O15

TD5+

TE5-

TE5+

TA6-

TA6+

004:U3;009:O15

TB6-

TB6+

004:R3;009:Y6

004:U3;009:Y5

TC6-

TC6+

004:R3;009:Y5

TCLK6-

004:U3;009:Y5 TCLK6+

004:R3;009:Y8

004:U3;009:Y7

004:R3;009:Y7

004:U3;009:Y7

004:X6;009:Y6

004:AA6;009:Y6

004:X5;009:Y8

004:AA5;009:Y8

TD6-

TD6+

TE6-

TE6+

TA7-

TA7+

TB7-

TB7+

004:X5;009:Y9 TC7-

004:AA5;009:Y9

TC7+

004:X5;009:Y10

TCLK7-

004:X5;009:Y12

004:AA5;009:Y12

TD7-

004:X5;009:Y14

004:AA5;009:Y14

004:X4;009:Y13

004:AA4;009:Y12

004:X3;009:Y11

TD7+

TE7-

TE7+

TA8-

TA8+

004:AA3;009:Y10

TB8-

TB8+

004:X3;009:Y11

004:AA3;009:Y11

TC8-

TC8+

004:X3;009:Y13

TCLK8-

004:X3;009:Y14

004:AA3;009:Y14

004:X3;009:Y16

004:AA3;009:Y16

TD8-

TD8+

TE8-

TE8+

+3.3V_TCON_M

+1.8V_TCON_M

R2CLKN

R2CLKP

LGND_1

R2DN

R2DP

R2EN

R2EP

R3AN

R3AP

R3BN

R3BP

LVDD_2

R3CN

R3CP

R3CLKN

R3CLKP

LGND_2

R3DN

R1AN

R1AP

R1BN

R1BP

R1CN

R1CP

R1CLKN

R1CLKP

R1DN

R1DP

R1EN

R1EP

R2AN

R2AP

R2BN

R2BP

LVDD_1

R2CN

R2CP

R3DP

R3EN

R3EP

R4AN

R4AP

R4BN

R4BP

R4CN

R4CP

R4CLKN

R4CLKP

R4DN

R4DP

R4EN

R4EP

33

34

35

36

37

29

30

31

32

24

25

26

27

28

20

21

22

23

15

16

17

18

19

10

11

12

13

14

8

9

6

7

3

4

1

2

5

47

48

49

50

51

52

43

44

45

46

38

39

40

41

42

IC400

TL2425MC (GLORY)

+3.3V_TCON_M

R400

3.3K

OPT

R401

10K

LVDS Data mapping seletion

L:VESA format

H:JEIDA format

+3.3V_TCON_M

R404

3.3K

R405

10K

OPT

10bit or 8bit Seletion

L:8bit

H:10bit

+3.3V_TCON_M

+3.3V_TCON_M

+3.3V_TCON_M

R402

3.3K

OPT

R403

10K

R406

3.3K

OPT

REVERSE_M 004:N26

R407

10K

Reverse option Selection

L : Normal operation

H : Reverse operation

R408

3.3K

RBF_M 004:J10

When No Video input, Pattern Selection

L:Black Pattern

H:Rotate Pattern

R409

10K

OPT

FRC_ON_M

FRC Funtion Seletion

L:Disable(8Bit)

H:Enable(10Bit(D))

004:O26

+1.8V_TCON_M

R412

1K

1%

R413

1K

1%

TA5-

TB5-

TC5-

TCLK5-

TD5-

TE5-

TA6-

TB6-

TC6-

TCLK6-

TD6-

TE6-

R451

R452

R453

R454

R455

R456

100

100

100

100

100

100

R457

R458

R459

R460

R461

R462

100

100

100

100

100

100

RLV7-

NLVDD_4

RLV8+

RLV8-

LLV0+

LLV0-

NLVSS_4

LLV1+

LLV1-

LLV2+

LLV2-

NLVDD_3

LLV3+

LLV3-

LLV4+

LLV4-

NLVSS_3

LLV5+

LLV5-

LLV6+

LLV6-

NLVDD_2

LLV7+

LLV7-

NLVSS_2

LLV8+

LLV8-

NLVSS_1

NLVDD_1

RNLVDS

CGND_6

CVDD_5

CGND_5

RLV0+

RLV0-

NLVDD_6

RLV1+

RLV1-

NLVSS_6

RLV2+

RLV2-

RLV3+

RLV3-

NLVDD_5

RLV4+

RLV4-

RLV5+

RLV5-

NLVSS_5

RLV6+

RLV6-

RLV7+

137

136

135

134

133

132

131

130

129

128

127

126

125

124

123

122

121

120

119

118

117

116

115

114

113

112

111

110

109

108

107

106

105

156

155

154

153

152

151

150

149

148

147

146

145

144

143

142

141

140

139

138

+3.3V_TCON

+3.3V_TCON_M

L401

120-ohm

C401

0.1uF

16V

C403

0.1uF

16V

C405

0.1uF

16V

C407

0.1uF

16V

C411

0.1uF

16V

C413

0.1uF

16V

C415

0.1uF

16V

C417

0.1uF

16V

C418

0.1uF

16V

C419

0.1uF

16V

C423

0.1uF

16V

C424

0.1uF

16V

C425

0.1uF

16V

C426

0.1uF

16V

C427

0.1uF

16V

C429

0.1uF

16V

C430

1uF

10V

C432

1uF

10V

C433

1uF

10V

C435

1uF

10V

+3.3V_TCON

RRMV6N

RRMV6P

RRMV5N

RRMV5P

RRMV4N

RRMV4P

RRMVCLKN

RRMVCLKP

008:AE10

008:AE10

008:AE10

008:AE11

008:AE11

008:AE11

008:AE11

008:AE12

+3.3V_TCON_M

R415

2K

R417

2K

R422

2K

R425

2K

R427

2K

RRMV2N

RRMV2P

RRMV1N

RRMV1P

RRMV0N

RRMV0P

008:AE12

008:AE12

008:AE12

008:AE13

008:AE13

008:AE13

R416

2K

OPT

R418

2K

OPT

R423

2K

OPT

R426

2K

OPT

R428

2K

OPT

RLMV6N

RLMV6P

RLMV5N

RLMV5P

RLMV4N

RLMV4P

RLMVCLKN

RLMVCLKP

008:AE13

008:AE14

008:AE14

008:AE14

008:AE14

008:AE14

008:AE15

008:AE15

RLMV2N

RLMV2P

RLMV1N

RLMV1P

RLMV0N

RLMV0P

R414

18K

42/47LX6500

R414-*1

24K

55LX6500

008:AE15

008:AE16

008:AE16

008:AE16

008:AE16

008:AE16

GOE_A

004:M10

GSP_A

004:M10

GSP_R_A

004:M10

R421

33

R419

33

R420

33

OPT

MS_SEL_M 004:N10

I2CEN_M004:O10;004:X8

VCO_SYNC_M004:P10

SSC_SYNC_M004:R10

TCON_AGP_M004:S26

C406

10pF

OPT

GOE

008:AE23;008:AL12

POL_A

004:R10

C408

10pF

OPT

GSP

008:AE18;008:AL18

FLK_A

004:L10

NC/E0

IC401

M24C16-WMN6T

C428

0.1uF

16V

VCC

1 8

NC/E1

2 7

WC

NC/E2

3

VSS

4

6

SCL

5

SDA

Write Protection

Low/NC : Normal Operation

High : Write Protection

I2C Slave Address : 0xA0

R436

100

R437

33

C421

10pF

50V

FLK

006:D12

R448

3.3K

OPT

R433

3.3K

R434

3.3K

C420

220pF

OPT

POL

008:AE18;008:AL18

GSC_A

004:M10

R446

33

WP_EEPROM_TCON001:AD21;005:AJ5

C431

10pF

OPT

GSC

008:AE23;008:AL12

DPM_A

004:L10

C436

10pF

OPT

R447

33

R477

0

OPT

DPM

007:W8;006:D12;006:Q5

R480

0

OPT

SOE_A

004:R10;004:AF13

R424

270

SOE_L

008:AL18

SOE_A

004:R10;004:AA13

R438

220

C422

10pF

50V

SOE_R

008:AE17

I2CEN

TA5+

TB5+

TC5+

TCLK5+

TD5+

TE5+

TA6+

TB6+

TC6+

TCLK6+

TD6+

TE6+

TA7-

TB7-

TC7-

TCLK7-

TD7-

TE7-

TA8-

TB8-

TC8-

TCLK8-

TD8-

TE8-

001:AF18;004:L27;004:AL20;005:AA15

TCON_SCL_M

001:AO39

TCON_SCL

TCON_SCL_S

001:AF18;005:J26;005:AA13;005:AJ4

R475

33

R476

33

I2CEN_M

I2CEN_S

1

2

3

SW400

JS2235S

6

5

4

R463

R464

R465

R466

R467

R468

100

100

100

100

100

100

R469

R470

R471

R472

R473

R474

100

100

100

100

100

100

TA7+

TB7+

TC7+

TCLK7+

TD7+

TE7+

TA8+

TB8+

TC8+

TCLK8+

TD8+

TE8+

001:AF18;004:L27;004:AL20;005:AA14

TCON_SDA_M

TCON_SDA001:AO39

TCON_SDA_S

001:AF17;005:J26;005:AA13;005:AJ4

[TCON Reset Block]

+3.3V_TCON

R440

6.8K

R441

20K

1%

R445

1K

R449

10K

Q400

2SA1530A-T112-1R

R450

10K

C434

0.47uF

50V

TCON_RST

004:K10;005:I9

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

3D + 240 FRC + TCON BOARD

240Hz T-Con (Master,Left) 4

2009. 11. 13

10

LGE Internal Use Only

[T-CON RIGHT => Slave]

005:Q6;009:Y26

005:T6;009:Y27

005:Q6;009:Y28

TA3-

TA3+

TB3-

005:T6;009:Y28

005:Q6;009:Y27

TB3+

TC3-

005:T6;009:Y27 TC3+

005:Q6;009:Y29 TCLK3-

005:T6;009:Y29 TCLK3+

005:Q6;009:Y30

005:T6;009:Y31

TD3-

TD3+

005:Q5;009:Y31

005:T5;009:Y31

TE3-

TE3+

005:Q4;009:Y29

005:T4;009:Y29

005:Q4;009:Y32

005:T4;009:Y33

TA4-

TA4+

TB4-

TB4+

005:Q3;009:Y24

005:T3;009:Y25

TC4-

TC4+

005:Q3;009:Y25 TCLK4-

005:T3;009:Y26 TCLK4+

005:Q3;009:Y33

005:T3;009:Y33

005:Q3;009:Y34

005:T3;009:Y34

005:W6;009:Y30

005:Y6;009:Y30

005:W6;009:Y32

005:Y6;009:Y32

TD4-

TD4+

TE4-

TE4+

TA1-

TA1+

TB1-

TB1+

005:W6;009:Y36

005:Y6;009:Y36

TC1-

TC1+

005:W6;009:Y35 TCLK1-

005:Y6;009:Y35 TCLK1+

005:W6;009:Y35

005:Y6;009:Y35

005:W5;009:O28

005:Y5;009:O29

005:W4;009:O32

005:Y4;009:O32

005:W4;009:O31

005:Y4;009:O31

005:W4;009:O26

005:Y4;009:O27

TC2-

TC2+

005:W3;009:O27 TCLK2-

005:Y3;009:O28 TCLK2+

005:W3;009:O35

005:Y3;009:O35

005:W3;009:O30

005:Y3;009:O30

TD2-

TD2+

TE2-

TE2+

TD1-

TD1+

TE1-

TE1+

TA2-

TA2+

TB2-

TB2+

+3.3V_TCON_S

+1.8V_TCON_S

R2BP

LVDD_1

R2CN

R2CP

R2CLKN

R2CLKP

LGND_1

R2DN

R2DP

R2EN

R2EP

R3AN

R3AP

R3BN

R3BP

LVDD_2

R3CN

R3CP

R3CLKN

R1AN

R1AP

R1BN

R1BP

R1CN

R1CP

R1CLKN

R1CLKP

R1DN

R1DP

R1EN

R1EP

R2AN

R2AP

R2BN

R3CLKP

LGND_2

R3DN

R3DP

R3EN

R3EP

R4AN

R4AP

R4BN

R4BP

R4CN

R4CP

R4CLKN

R4CLKP

R4DN

R4DP

R4EN

R4EP

30

31

32

33

25

26

27

28

29

21

22

23

24

16

17

18

19

20

11

12

13

14

15

7

8

9

10

1

4

5

2

3

6

48

49

50

51

52

44

45

46

47

39

40

41

42

43

34

35

36

37

38

IC500

TL2425MC (GLORY)

+1.8V_TCON

L500

120-ohm

+1.8V_TCON_S

C500

0.1uF

16V

C502

0.1uF

16V

C504

0.1uF

16V

C507

0.1uF

16V

C508

0.1uF

16V

C510

0.1uF

16V

C512

1uF

10V

C515

1uF

10V

+3.3V_TCON

L501

120-ohm

+3.3V_TCON_S

C501

0.1uF

16V

C503

0.1uF

16V

C505

0.1uF

16V

C506

0.1uF

16V

C509

0.1uF

16V

C511

0.1uF

16V

C513

0.1uF

16V

C516

0.1uF

16V

C517

0.1uF

16V

C518

0.1uF

16V

C519

0.1uF

16V

C520

0.1uF

16V

C521

0.1uF

16V

C522

0.1uF

16V

C523

0.1uF

16V

C524

0.1uF

16V

C525

1uF

10V

C526

1uF

10V

C527

1uF

10V

C528

1uF

10V

+3.3V_TCON_S

R513

2K

OPT

R515

2K

R517

2K

R519

2K

R521

2K

MS_SEL_S

I2CEN_S

005:L9

004:X7;005:M9

VCO_SYNC_S 005:N9

005:P9

SSC_SYNC_S

TCON_AGP_S 005:Q25

R514

2K

R516

2K

OPT

R518

2K

OPT

R520

2K

OPT

R522

2K

OPT

NLVSS_5

RLV6+

RLV6-

RLV7+

RLV7-

NLVDD_4

RLV8+

RLV8-

LLV0+

LLV0-

NLVSS_4

LLV1+

LLV1-

LLV2+

LLV2-

NLVDD_3

LLV3+

LLV3-

LLV4+

LLV4-

NLVSS_3

LLV5+

LLV5-

LLV6+

LLV6-

NLVDD_2

LLV7+

LLV7-

NLVSS_2

LLV8+

LLV8-

NLVSS_1

NLVDD_1

RNLVDS

CGND_6

CVDD_5

CGND_5

RLV0+

RLV0-

NLVDD_6

RLV1+

RLV1-

NLVSS_6

RLV2+

RLV2-

RLV3+

RLV3-

NLVDD_5

RLV4+

RLV4-

RLV5+

RLV5-

141

140

139

138

137

136

135

134

133

132

131

130

129

128

127

126

125

124

123

122

121

120

119

118

117

116

115

114

113

112

111

110

109

108

107

106

105

156

155

154

153

152

151

150

149

148

147

146

145

144

143

142

LRMV6N

LRMV6P

LRMV5N

LRMV5P

LRMV4N

LRMV4P

LRMVCLKN

LRMVCLKP

008:AL19

008:AL19

008:AL19

008:AL20

008:AL20

008:AL20

008:AL20

008:AL21

LRMV2N

LRMV2P

LRMV1N

LRMV1P

LRMV0N

LRMV0P

008:AL21

008:AL21

008:AL21

008:AL22

008:AL22

008:AL22

LLMV6N

LLMV6P

LLMV5N

LLMV5P

LLMV4N

LLMV4P

LLMVCLKN

LLMVCLKP

008:AL22

008:AL23

008:AL23

008:AL23

008:AL23

008:AL23

008:AL24

008:AL24

LLMV2N

LLMV2P

008:AL24

008:AL25

LLMV1N

LLMV1P

008:AL25

008:AL25

R512

18K

42/47LX6500

LLMV0N

LLMV0P

R512-*1

24K

55LX6500

008:AL25

008:AL25

+3.3V_TCON

+3.3V

L502

120-ohm

L503

120-ohm

OPT

+3.3V_FET

+3.3V_FET

R595

3.3K

OPT

R596

3.3K

R597

3.3K

OPT OPT

R598

3.3K

OPT

001:E19;008:F18;008:V24;008:AL4;009:AP8

I2C_SCL R599

C533

10pF

OPT

33

C534

10pF

OPT

SCL0

I2C_SDA

R1500

001:E19;008:N18;008:V25;008:AL4;009:AP11

R1501

TCON_SCL_M

33

33

TCON_SDA_M

001:AF19

M_TCON_EN

TCON_SCL_S

R1502

R1503

R1504

SDA0

2

SCL1

3

33

33

33

SDA1

4

EN1

5

R1506

2K

SCL2

6

SDA2

7

TCON_SDA_S

R1505 33

GND

8

IC502

PA9516APW

1 16

VCC

C535

0.1uF

15

EN4

2K

R1512

14

SDA4

13

SCL4

12

EN3

2K

R1511

11

SDA3

10

SCL3

9

EN2 R1508

S_TCON_EN

33

001:AF19

R1507

2K

+3.3V_TCON_S

+3.3V_TCON_S

R500

3.3K

OPT

R504

3.3K

R501

10K

LVDS_SEL_S 005:I25

LVDS Data mapping seletion

L:VESA format

H:JEIDA format

R505

10K

OPT

BIT_SEL_S 005:M25

10bit or 8bit Seletion

L:8bit

H:10bit

+3.3V_TCON_S

+3.3V_TCON_S

+3.3V_TCON_S

+1.8V_TCON_S

R510

1K

1%

R511

1K

1%

R502

3.3K

OPT

R506

3.3K

OPT

R503

10K

REVERSE_S

005:L25

Reverse option Selection

L : Normal operation

H : Reverse operation

R507

10K

R508

3.3K

RBF_S

005:H9

When No Video input, Pattern Selection

L:Black Pattern

H:Rotate Pattern

R509

10K

OPT

FRC_ON_S

005:M25

FRC Funtion Seletion

L:Disable(8Bit)

H:Enable(10Bit(D))

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

TA3-

TB3-

TC3-

TCLK3-

TD3-

TE3-

TA4-

TB4-

TC4-

TCLK4-

TD4-

TE4-

R527

R528

R529

R530

R531

R532

100

100

100

100

100

100

R533

R534

R535

R536

R537

R538

100

100

100

100

100

100

TA3+

TB3+

TC3+

TCLK3+

TD3+

TE3+

TA1-

TB1-

TC1-

TCLK1-

TD1-

TE1-

TA4+

TB4+

TC4+

TCLK4+

TD4+

TE4+

TA2-

TB2-

TC2-

TCLK2-

TD2-

TE2-

R539

R540

R541

R542

R543

R544

100

100

100

100

100

100

R545

R546

R547

R548

R549

R550

100

100

100

100

100

100

TA1+

TB1+

TC1+

TCLK1+

TD1+

TE1+

TA2+

TB2+

TC2+

TCLK2+

TD2+

TE2+

[TCON EEPROM(16Kbit)]

+3.3V_TCON

IC501

M24C16-WMN6T

NC/E0

1 8

VCC

C514

0.1uF

16V

NC/E1

2

NC/E2

3

7

WC

6

SCL

VSS

4 5

SDA

Write Protection

Low/NC : Normal Operation

High : Write Protection

I2C Slave Address : 0xA0

R526

3.3K

OPT

R551

3.3K

R552

3.3K

3D + 240 FRC + TCON BOARD

240Hz T-Con(Slave,Right)

WP_EEPROM_TCON001:AD21;004:AL21

5

2009. 11. 13

10

LGE Internal Use Only

008:AL13 VCOMLOUT

004:AI15

007:W8;004:AN15;006:Q5

FLK

DPM

VGH_I

(+27V)

C600

1uF

25V

R602

0

5%

1/10W

D600

BAV99W_NXP

VGH

(+24V)

R600 0

OPT

R601 0

VGH_I

(+24V)

VGH_M

(+24V)

VDD_LCM

(+16V)

C649

10uF

25V

C660

10uF

25V

C662

10uF

25V

C664

10uF

25V

C666

10uF

25V

C668

10uF

25V

C670

10uF

25V

C672

10uF

25V

C674

10uF

25V

C676

10uF

25V

[POWER-VDD/VCC/VGH/VGL]

VLCD_POWER

(+12V)

VDD_LCM

(+16V)

008:AE22 VCOMROUT

008:AE22 VCOMRFB

008:AL13

R603

0

VGH_M

(+24V)

C601

100pF

50V

OPT

VCOMLFB

VDD_LCM

(+16V)

R638 0

R639 0

R637

OPT

0

R609

R605

330K

1%

1/8W

008:N25

P_VCOM

R608-*2

150

55LX6500

R608-*1

300

0

R610-*2

180

55LX6500

R610-*1

330

47LX6500 47LX6500

R613

0

OPT

R607

82K

5%

R608

200

42LX6500

C604

68pF

50V

R610

200

42LX6500

R604

4.7K

R645

4.7K

R606

OPT

C602

10uF

35V

C688

10uF

35V

C603

10uF

35V

C689

10uF

35V

R611

220K

1%

1/16W

R612

18K

1%

R614

27K

1%

R615 1K

R616 1K

C611

22uF

25V

C615

22uF

25V

D603-*1

L600

ONSEMI_DIODE

22uH

2.2A

D603

SMAB34

VLCD_LCM_OUT

(+16V)

R623

5.6K

C617

22000pF

50V

VLCD_LCM_OUT

C622

22uF

25V

C626

22uF

25V

(+16V)

C629

0.1uF

50V

D604

100V

C650

10uF

25V

C661

10uF

25V

C663

10uF

25V

C665

10uF

25V

C667

10uF

25V

C669

10uF

25V

C671

10uF

25V

C673

10uF

25V

DPM_VDD 006:Q12;006:S5

C675

10uF

25V

C677

10uF

25V

VDD_LCM

(+16V)

R618

R617

1K

1K

C606

1uF

25V

R624

30K

1%

1/16W

R625

5.1K

C624

680pF

50V

R629

5.1K

1%

C630

10uF

25V

C632

10uF

25V

C635

10uF

25V

C638

10uF

25V

C640

10uF

25V

C644

10uF

25V

C645

10uF

25V

C646

10uF

25V

POS1

OUT1

VDD

CE

VFLK

VDPM

RE

VGHM

VGH

FBP

GND

DRVP

7

8

5

6

9

1

2

3

4

10

11

12

IC600

TPS65162RGZR

36

35

34

33

32

31

30

29

28

27

26

25

PGND3

PGND2

PGND1

EN1

EN2

VC

SS

DLY2

FREQ

VIN

PVIN_2

PVIN_1

VLCD_LCM_OUT

(+12V)

C605

1uF

50V

C690

1uF

50V

C607

1uF

25V

C612

0.047uF

50V

OPT

C613

0.22uF

16V

C616

0.1uF

50V

R646

0

OPT

R630

15K

VLCD_POWER

(+12V)

R626

5.6K

C642

OPT

C625 22000pF

50V

C621

22000pF

50V

DPM_VDD 006:S16;006:S5

VLCD_POWER

(+12V)

C627

22000pF

50V

R632

10

1/10W

1%

C618

1uF

25V

C623

10uF

25V

C628

22uF

25V

C631

22uF

25V

C634

22uF

25V

C637

22uF

25V

VLCD_POWER

(+12V)

VCC_LCM

(+3.3V)

L601

22uH

2.2A

D602

40V

SMAB34

KEC_DIODE

C619

470pF

50V

R627

4.7K

1%

R631

3.9K

1%

C633

22uF

16V

C636

22uF

16V

C639

22uF

16V

R635

5.1K

VDD_LCM

(+16V)

C647

10uF

25V

C648

10uF

25V

C641

0.1uF

50V

C651

10uF

25V

C652

10uF

25V

C653

10uF

25V

C654

10uF

25V

C655

10uF

25V

R636

7.5K

5%

C656

10uF

25V

C657

10uF

25V

C658

10uF

25V

D602-*1

C608

0.47uF

50V

D601

BAV99W_NXP

VGL(-7V)

R619

33K

1%

R620

100K

1%

ONSEMI_DIODE

VGL

(-5V)

C620

470pF

50V

OPT

R628

1.3K

1%

C609

10uF

10V

C610

10uF

10V

C614

10uF

10V

R622

1K

1%

DPM

007:W8;004:AN15;006:D12

R640

33

DPM_VDD

006:Q12;006:S16

C643

10pF

OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

3D + 240 FRC + TCON BOARD

Power Block (TCON)

2009. 11. 13

6 10

LGE Internal Use Only

VLCD_POWER

(+12V)

VLCD_POWER

(+12V)

R700

5.1K

+3.3V_TCON

C700

0.1uF

50V

C704

0.1uF

50V

C711

22uF

25V

C701

22uF

16V

C703

22uF

16V

Vout = 0.6*(1+R1/R2)

R1

R705

1K

1%

R704

510

C706

820pF

50V

R706

30K

1%

R707

6.8K

1%

R2

L700

10uH

3.1A

R713

2.2

C713

2200pF

50V

C730

22uF

25V

C734

0.1uF

50V

Q700

SI4804BDY

Q702

SI4804BDY

D2_1

5

D2_2

6

D1_1

7

D1_2

8

R719

10

R728

10

4

G2

3

S2

2

G1

1

S1

R745

4.7

C722

0.22uF

16V

C724

0.22uF

16V

R746

4.7

G2

4

S2

3

G1

2

S1

1

5

D2_1

6

D2_2

7

D1_1

8

D1_2

L702

10uH

3.1A

R716

10K

C716

47pF

50V

C717

2200pF

50V

PGND2

R718

0

OPT

C720

DL2

PGOOD2

10uF

25V

VCC

FB2

COMP2

13 6

PGND1

14 5

15

IC700

4

16

MAX15023ETG+T

3

17

18

DL1

PGOOD1

EN2

2

EN1

1

FB1

VLCD_POWER

(+12V)

R729

0

OPT

R722

27K

R725

16K

C727

2200pF

50V

TCON_POWER_EN

001:AJ20;006:P14

R731

10K

C728

47pF

50V

C723

1uF

50V

R723

11K

R734

9.1K

C729

2200pF

50V

R735

510

C732

820pF

50V

R1

R736

1K

1%

R737

36K

C708

22uF

16V

R2

R738

18K

1%

Vout = 0.6*(1+R1/R2)

C733

22uF

16V

C735

22uF

16V

+1.8V_TCON

C737

22uF

16V

C738

0.1uF

50V

R742

5.1K

VLCD_POWER

(+12V)

HVDD

(+8V)

R703

5.1K

C702

0.1uF

50V

C705

22uF

16V

C707

22uF

16V

C709

0.1uF

50V

R708

510

C710

820pF

50V

C712

22uF

25V

R1

R710

6.8K

1%

R711

120K

1%

R712

10K

1%

Vout = 0.592*(1+R1/R2)

R2

C714

22uF

25V

L701

10uH

3.1A

R715

2.2

C715

2200pF

50V

Q701

SI4804BDY

D2_1

5

D2_2

6

D1_1

7

D1_2

8

R717

10K

C718

47pF

50V

R721

10

4

G2

3

S2

2

G1

1

S1

C719

2200pF

50V

007:Z8

VLCD_POWER

(+12V)

C726

1uF

50V

C721

10uF

25V

DPM_HVDD

R720

0

OPT

R726

11K

IN

1

VCC

2

PGOOD

3

EN

4

LIM

5

COMP

6

FB

7

IC701

MAX15026BETD+

14

DH

13

LX

12

BST

11

DL

10

DRV

9

GND

8

RT

R747

4.7

C740

2.2uF

25V

R748

2.2

R724

27K

C725

0.22uF

16V

D700

OPT

R701

22K

DPM

004:AN15;006:D12;006:Q5

C731

1uF

DPM_HVDD

007:O6

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

3D + 240 FRC + TCON BOARD

Power Block (TCON) 7

2009. 11. 13

10

LGE Internal Use Only

008:AE21;008:AL17

V1

008:AE21;008:AL17

V2

008:AE21;008:AL17

V3

008:AE21;008:AL17 V4

008:AE20;008:AL16

V5

008:AE20;008:AL16 V6

008:AE20;008:AL16

V7

008:AE20;008:AL16

V9

008:AE20;008:AL16

V10

I2C_SCL

001:E19;005:AA16;008:V24;008:AL4;009:AP8

VDD_LCM

(+16V)

L800

120-ohm

R805

R822

R823

R824

R825

R826

R827

R806

R807

R808

0

0

0

0

0

0

33

VCOM2

1

OUT1

2

OUT2

3

OUT3

4

0

0

0

OUT4

5

OUT5

6

OUT6

7

VCC_LCM

(+3.3V)

GNDA_1

8

VS_1

9

OUT7

10

OUT8

11

OUT9

12

VSD

13

SCL

14

C824

OPT

IC801

BUF16821AIPWPR

C801

0.1uF

50V

C802

0.1uF

50V

C803

10uF

25V

C804

10uF

25V

C807

10uF

25V

C808

10uF

25V

28

VCOM1

27

OUT16

26

OUT15

25

OUT14

24

GNDA_2

23

VS_2

22

OUT13

21

OUT12

20

OUT11

19

OUT10

18

GNDD

17

BKSEL

16

AO

15

SDA

R809

R810

R828

R829

R830

R831

R832

R833

0

0

0

0

0

0

0

0

P_VCOM 006:H14

V18

V17

V16

V15

V14

V13

V12

008:AE18;008:AL14

008:AE18;008:AL14

008:AE19;008:AL15

008:AE19;008:AL15

008:AE19;008:AL15

008:AE19;008:AL15

008:AE19;008:AL15

R834

OPT

0

R835

1K

1%

R811

33

GAMMA_BKSEL 001:AD16

I2C_SDA

001:E19;005:AA15;008:V25;008:AL4;009:AP11

C825

OPT

P803

12507WR-04L

1

2

3

4

5

P804

12507WR-06L

3

4

1

2

5

6

7

L802

120-ohm

VLCD_POWER

E_TCK

E_TDO

E_TMS

E_TDI

P802

FI-R51S-HF

52

46

47

48

43

44

45

49

50

51

40

41

42

37

38

39

34

35

36

31

32

33

28

29

30

25

26

27

21

22

23

24

18

19

20

15

16

17

12

13

14

9

10

11

6

7

8

3

4

5

1

2

For LED Sync from 3D Formatter

R801

R821

For Shutter Glasses Sync

0

R804

0

FPGA_VSYNC

010:AX10

3D_SYNC_OUT

009:AK20

R812

OPT

VSYNC

001:AD17

0

I2C_SDA

001:E19;005:AA15;008:N18;008:AL4;009:AP11

I2C_SCL

33

001:E19;005:AA16;008:F18;008:AL4;009:AP8

FRC_RESET

001:I17

R813

R802

R803

0

0

OPT

0

L/R_SYNC

3D_DIMMING

010:AY5

3D_DIMMING_2

010:BE5

LVRX1_AM 001:E35

LVRX1_AP 001:E35

LVRX1_BM

001:E34

LVRX1_BP 001:E34

LVRX1_CM 001:E34

LVRX1_CP

001:E34

LVRX1_DM 001:E33

LVRX1_DP

001:E34

LVRX1_EM 001:E33

LVRX1_EP 001:E33

LVRX2_AM

001:AG35

LVRX2_AP 001:AG35

LVRX2_BM 001:AG34

LVRX2_BP

001:AG34

LVRX2_CM 001:AG34

LVRX2_CP 001:AG34

LVRX2_CLKM001:AG35

LVRX2_CLKP001:AG35

LVRX2_DM 001:AG33

LVRX2_DP 001:AG34

LVRX2_EM

001:AG33

LVRX2_EP 001:AG33

L801

120-ohm

C805

10uF

25V

C806

10uF

25V

VLCD_POWER

P805

104060-8017

81

68

69

70

71

72

64

65

66

67

59

60

61

62

63

55

56

57

58

73

74

75

76

77

78

79

80

50

51

52

53

54

45

46

47

48

49

41

42

43

44

36

37

38

39

40

32

33

34

35

27

28

29

30

31

22

23

24

25

26

18

19

20

21

13

14

15

16

17

9

10

11

12

6

7

4

5

8

1

2

3

[RIGHT FFC CONNECTOR]

VDD_LCM

(+16V)

C814

0.1uF

50V

C815

10uF

25V

C810

10uF

25V

HVDD

(+8V)

VGL

(-5V)

OPT_P 004:R10

GOE

GSC

VGH

004:AN17;008:AL12

VCOMRFB

VCOMROUT

Z_OUT

006:H17

006:H18

008:AL14

V1

V2

V3

V4

V5

V6

V7

V9

V10

V12

V13

V14

V15

V16

V17

V18

008:F24;008:AL17

008:F24;008:AL17

008:F23;008:AL17

008:F23;008:AL17

008:F22;008:AL16

008:F22;008:AL16

008:F20;008:AL16

008:F20;008:AL16

008:F19;008:AL16

008:N20;008:AL15

008:N21;008:AL15

008:N21;008:AL15

008:N22;008:AL15

008:N23;008:AL15

008:N24;008:AL14

008:N24;008:AL14

GSP

POL

004:AD15;008:AL18

004:AI17;008:AL18

SOE_R

H_CONV

OPT_N

004:AI13

004:O10;008:AL18

004:R10;008:AL19

RLMV0P

RLMV0N

RLMV1P

RLMV1N

RLMV2P

RLMV2N

004:V14

004:V14

004:V15

004:V15

004:V15

004:V16

RLMVCLKP

RLMVCLKN

RLMV4P

RLMV4N

RLMV5P

RLMV5N

RLMV6P

RLMV6N

004:V16

004:V17

RRMV0P

RRMV0N

RRMV1P

RRMV1N

RRMV2P

RRMV2N

RRMVCLKP

RRMVCLKN

004:V21

004:V21

RRMV4P

RRMV4N

RRMV5P

RRMV5N

RRMV6P

RRMV6N

004:V21

004:V22

004:V22

004:V22

004:V22

004:V23

004:V17

004:V17

004:V17

004:V18

004:V18

004:V18

004:V19

004:V19

004:V19

004:V20

004:V20

004:V20

VCC_LCM

(+3.3V)

C816

0.1uF

50V

C817

0.01uF

50V

[LEFT FFC CONNECTOR]

P806

104060-8017

81

68

69

70

71

72

64

65

66

67

59

60

61

62

63

55

56

57

58

73

74

75

76

77

78

79

80

50

51

52

53

54

45

46

47

48

49

41

42

43

44

36

37

38

39

40

32

33

34

35

27

28

29

30

31

22

23

24

25

26

18

19

20

21

13

14

15

16

17

9

10

11

12

6

7

4

5

8

1

2

3

VDD_LCM

(+16V)

C819

0.1uF

50V

C821

10uF

25V

C809

10uF

25V

LLMV0P

LLMV0N

LLMV1P

LLMV1N

LLMV2P

LLMV2N

LLMVCLKP

LLMVCLKN

LLMV4P

LLMV4N

LLMV5P

LLMV5N

LLMV6P

LLMV6N

005:T14

005:T14

005:T14

005:T14

005:T15

005:T15

005:T16

005:T16

005:T16

005:T16

005:T17

005:T17

005:T17

005:T17

LRMV0P

LRMV0N

LRMV1P

LRMV1N

LRMV2P

LRMV2N

LRMVCLKP

LRMVCLKN

005:T18

005:T18

005:T19

005:T19

005:T19

005:T19

005:T20

005:T20

LRMV4P

LRMV4N

LRMV5P

LRMV5N

LRMV6P

LRMV6N

005:T21

005:T21

005:T21

005:T21

005:T22

005:T22

OPT_N

H_CONV

GSP

POL

004:R10;008:AE17

004:O10;008:AE17

004:AD15;008:AE18

004:AI17;008:AE18

V1

V2

V3

V4

V5

V6

V7

V9

V10

V12

V13

V14

V15

V16

V17

V18

SOE_L 004:AD13

008:F24;008:AE21

008:F24;008:AE21

008:F23;008:AE21

008:F23;008:AE21

008:F22;008:AE20

008:F22;008:AE20

008:F20;008:AE20

008:F20;008:AE20

008:F19;008:AE20

008:N20;008:AE19

008:N21;008:AE19

008:N21;008:AE19

008:N22;008:AE19

008:N23;008:AE19

008:N24;008:AE18

008:N24;008:AE18

Z_OUT

VCOMLOUT

VCOMLFB

008:AE22

006:D13

006:H16

VGH

(+24V)

GSC 004:AN17;008:AE23

GOE 004:AC17;008:AE23

VGL

(-5V)

HVDD

(+8V)

VCC_LCM

(+3.3V)

C818

0.1uF

50V

C820

0.01uF

50V

+3.3V

2V5

E_TCK

R814

0

FDV301N

Q801

R849

22

TCK_FLASH

R818

22

OPT

C811

18pF

50V

OPT

TCK

E_TDO

R819

0

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

+3.3V

2V5

FDV301N

Q802

+3.3V

2V5

R850

22

TDO_FLASH

R838

22

OPT

C812

18pF

50V

OPT

TDO

E_TMS

R839

0

FDV301N

Q803

+3.3V

2V5

R851

22

TMS_FLASH

R843

22

OPTC813

18pF

50V

OPT

TMS

E_TDI

R844

0

FDV301N

Q804

R852

22

TDI_FLASH

R848

22

OPT

C822

18pF

50V

OPT

TDI

1

For P-Gamma Data Download

P807

12505WR-04A00

VDD_LCM

(+16V)

OPT

1

2

3

4

5

OPT

ZD800

5.5V

TVS

OPT

ZD801

5.5V

TVS

I2C_SCL

I2C_SDA

3D + 240 FRC + TCON BOARD

Interface 8

2009. 11. 13

10

LGE Internal Use Only

LVTX5_CLK-

LVTX5_CLK+

LVTX6_E-

LVTX6_E+

LVTX5_A-

LVTX5_A+

LVTX5_B-

LVTX5_B+

LVTX5_C-

LVTX5_C+

LVTX5_E-

LVTX5_E+

LVTX6_A-

LVTX6_A+

LVTX7_A-

LVTX7_A+

LVTX6_D-

LVTX6_D+

LVTX7_B-

LVTX7_B+

LVTX7_C-

LVTX7_C+

LVTX6_B-

LVTX6_B+

LVTX8_A-

LVTX8_A+

LVTX6_C-

LVTX6_C+

LVTX7_D-

LVTX7_D+

LVTX7_E-

LVTX7_E+

LVTX8_C-

LVTX8_C+

R901

R916

R903 100

R904 100

R905

R907

R909

R912

R915

R914

R934

R908

R932

R911

100

100

100

100

100

100

100

100

100

100

100

100

R936 100

R935 100

R910 100

IC1000

EP3C55F484C6N

B8_IO[0]

B8_IO[1]

B8_IO[2]

B8_IO[3]

B8_IO[4]

B8_IO[5]

B8_IO[6]

B8_IO[7]

B8_IO[8]

B8_IO[9]

B8_IO[10]

B8_IO[11]

B8_IO[12]

B8_IO[13]

B8_IO[14]

B8_IO[15]

B8_IO[16]

B8_IO[17]

B8_IO[18]

B8_IO[19]

B8_IO[20]

B8_IO[21]

B8_IO[22]

B8_IO[23]

B8_IO[24]

B8_IO[25]

B8_IO[26]

B8_IO[27]

B8_IO[28]

B8_IO[29]

B8_IO[30]

B8_IO[31]

B8_IO[32]

B8_IO[33]

B8_IO[34]

B8_IO[35]

B8_IO[36]

B8_IO[38]

B8_IO[39]

B8_IO[40]

B8_IO[41]

B8_IO[42]

B8_IO[43]

D7

A4

B4

F8

G8

E8

A5

B5

G10

F10

C6

B7

A6

B6

E9

C8

C7

D8

A9

B9

C10

G11

A8

B8

A7

A11

B11

D10

E10

A10

B10

A3

B3

D6

E7

C3

C4

F7

G7

F9

E6

E5

G9

LVTX1_CLK-

LVTX1_CLK+

LVTX2_CLK-

LVTX2_CLK+

LVTX3_CLK-

LVTX3_CLK+

R1901

R1902

100

100

R1903 100

LVTX6_CLK-

LVTX6_CLK+

LVTX7_CLK-

LVTX7_CLK+

R1904 100

R1905 100

VS_STATUS2V5

SDA2V5

SCL2V5

LVTX3_D-

LVTX3_D+

LVTX3_B-

LVTX3_B+

LVTX4_E-

LVTX4_E+

LVTX3_E-

LVTX3_E+

LVTX4_A-

LVTX4_A+

LVTX4_B-

LVTX4_B+

LVTX3_C-

LVTX3_C+

LVTX4_C-

LVTX4_C+

LVTX4_D-

LVTX4_D+

LVTX5_D-

LVTX5_D+

LVTX4_CLK-

LVTX4_CLK+

LVTX2_E-

LVTX2_E+

LVTX2_A-

LVTX2_A+

LVTX3_A-

LVTX3_A+

LVTX2_D-

LVTX2_D+

LVTX2_C-

LVTX2_C+

R926

R943

R925

R923

100

100

100

100

R921 100

R918

R927

R928

R919

100

R920 100

R929 100

R924 100

100

100

100

R930 100

R931 100

R906

R933

100

100

IC1000

EP3C55F484C6N

F13

A15

B15

C13

D13

A17

B17

A16

B16

C15

E14

E13

A14

B14

A13

B13

E12

E11

F11

A12

B12

A19

A18

B18

D15

E15

G14

G13

F14

C18

D18

D17

C19

D19

A20

B20

C17

B19

F16

E16

F15

G16

G15

B7_IO[18]

B7_IO[19]

B7_IO[20]

B7_IO[21]

B7_IO[22]

B7_IO[23]

B7_IO[24]

B7_IO[25]

B7_IO[26]

B7_IO[27]

B7_IO[28]

B7_IO[29]

B7_IO[30]

B7_IO[31]

B7_IO[32]

B7_IO[33]

B7_IO[34]

B7_IO[35]

B7_IO[36]

B7_IO[37]

B7_IO[38]

B7_IO[39]

B7_IO[40]

CLK8

CLK9

B7_IO[0]

B7_IO[1]

B7_IO[2]

B7_IO[3]

B7_IO[4]

B7_IO[5]

B7_IO[6]

B7_IO[7]

B7_IO[8]

B7_IO[9]

B7_IO[10]

B7_IO[11]

B7_IO[12]

B7_IO[13]

B7_IO[14]

B7_IO[15]

B7_IO[16]

B7_IO[17]

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

2V5

C902

0.1uF

16V

1V2

C904

0.1uF

16V

1V2 2V5

/RESET2V5

SYSCLK

CONFIG_DONE

MSEL[0]

MSEL[1]

MSEL[2]

MSEL[3]

TB6-

TB6+

TA6-

TA6+

TE5-

TE5+

TCLK5-

TCLK5+

TD5-

TD5+

LVTX1_A-

LVTX1_A+

TC5-

TC5+

TB5-

TB5+

LVTX1_B-

LVTX1_B+

LVTX1_C-

LVTX1_C+

TA5-

TA5+

LVTX1_D-

LVTX1_D+

LVTX1_E-

LVTX1_E+

LVTX2_B-

LVTX2_B+

R938 100

R939 100

R940

R941

R942

R922

100

100

100

100

IC1000

EP3C55F484C6N

H18

H16

D22

D21

F20

J19

J17

H20

H19

E22

E21

H21

K17

K18

J18

F22

F21

J20

L17

K20

L22

L21

K19

K22

K21

J22

J21

H22

G22

G21

M18

M17

L18

C20

D20

F17

G17

F18

E18

E17

F19

G18

H17

C22

C21

B22

B21

B6_IO[11]

B6_IO[12]

B6_IO[13]

B6_IO[14]

B6_IO[15]

B6_IO[16]

B6_IO[17]

B6_IO[18]

B6_IO[19]

B6_IO[20]

B6_IO[21]

B6_IO[22]

B6_IO[23]

B6_IO[24]

B6_IO[25]

B6_IO[26]

B6_IO[27]

B6_IO[28]

B6_IO[29]

B6_IO[30]

B6_IO[31]

B6_IO[32]

B6_IO[33]

B6_IO[34]

B6_IO[35]

B6_IO[36]

VCCA2

GNDA2

VCCD_PLL2

CLK5

CLK4

CONF_DONE

MSEL0

MSEL1

MSEL2

MSEL3

B6_IO[0]

B6_IO[1]

B6_IO[2]

B6_IO[3]

B6_IO[4]

B6_IO[5]

B6_IO[6]

B6_IO[7]

B6_IO[8]

B6_IO[9]

B6_IO[10]

2V5

C901

0.1uF

16V

1V2

C903

0.1uF

16V

TD2+

TD2-

LVTX8_D+

LVTX8_D-

LVTX8_B+

LVTX8_B-

LVTX8_E+

LVTX8_E-

ASDO

TA2+

TA2-

TB2+

TB2-

/CSO

TE2+

TE2-

/STATUS

TE1+

TE1-

TCLK2+

TCLK2-

TC2+

TC2-

DCLK

DATA0

/CONFIG

TDI

TCK

TMS

TDO

/CE

LVTX8_CLK+

LVTX8_CLK-

2V5

R913

R902

R917

R937

1V2

100

100

100

100

IC1000

EP3C55F484C6N

F6

F5

G6

VCCD_PLL3

GNDA3

VCCA3

L5

L2

L1

L4

L3

G2

G1

H1

J3

J2

J1

K2

K1

K5

K6

J7

K7

J4

H2

E2

E1

F2

F1

J5

H5

G5

E4

E3

C2

C1

G4

G3

B2

B1

D2

D1

H7

H6

J6

H4

H3

B1_IO[12]

B1_IO[13]

B1_IO[14]

B1_IO[15]

B1_IO[16]

B1_IO[17]

B1_IO[18]

B1_IO[19]

B1_IO[20]

B1_IO[21] nSTATUS

B1_IO[22]

B1_IO[23]

B1_IO[24]

B1_IO[25]

B1_IO[26]

B1_IO[27]

B1_IO[28]

B1_IO[29]

DCLK

B1_IO[30] nCONFIG

TDI

TCK

TMS

TDO nCE

CLK0

CLK1

B1_IO[0]

B1_IO[1]

B1_IO[2]

B1_IO[3]

B1_IO[4]

B1_IO[5]

B1_IO[6]

B1_IO[7]

B1_IO[8]

B1_IO[9]

B1_IO[10]

B1_IO[11]

TA1-

TA4+

TA4-

TCLK3+

TCLK3-

TB3+

TB3-

TB1+

TB1-

TE3+

TE3-

TD3+

TD3-

TA1+

TC3+

TC3-

TA3+

TA3-

TC1+

TC1-

TCLK1+

TCLK1-

TD1+

TD1-

TE4+

TE4-

TD4+

TD4-

TB4+

TB4-

1V2 2V5

TCLK4+

TCLK4-

TC4+

TC4-

2V5

C905

0.1uF

16V

1V2

C907

0.1uF

16V

IC1000

EP3C55F484C6N

CLK2

CLK3

B2_IO[0]

B2_IO[1]

B2_IO[2]

B2_IO[3]

B2_IO[4]

B2_IO[5]

B2_IO[6]

B2_IO[7]

B2_IO[8]

B2_IO[9]

B2_IO[10]

B2_IO[11]

B2_IO[12]

B2_IO[13]

B2_IO[14]

B2_IO[15]

B2_IO[16]

B2_IO[17]

B2_IO[18]

B2_IO[19]

B2_IO[20]

B2_IO[21]

B2_IO[22]

B2_IO[23]

B2_IO[24]

B2_IO[25]

B2_IO[26]

B2_IO[27]

B2_IO[28]

B2_IO[29]

B2_IO[30]

B2_IO[31]

B2_IO[32]

B2_IO[33]

B2_IO[34]

B2_IO[35]

B2_IO[36]

B2_IO[37]

B2_IO[38]

B2_IO[39]

VCCA1

GNDA1

VCCD_PLL1

W2

W1

Y2

Y1

T3

V2

V1

P5

N6

R4

R3

R2

R1

N5

P4

P3

U2

U1

M4

M3

N2

N1

M5

P2

P1

T2

T1

L6

M6

M2

M1

R5

T4

T5

R6

T6

U5

U6

N7

P7

AA2

AA1

V4

V3

P6

2V5

C906

0.1uF

16V

1V2

C908

0.1uF

16V

TE8-

TE8+

TB8-

TB8+

TCLK7-

TCLK7+

TC7-

TC7+

TB7-

TB7+

TD6-

TD6+

TE6-

TE6+

TA7-

TA7+

TC6-

TC6+

TCLK6-

TCLK6+

TA8-

TA8+

TD7-

TD7+

TC8-

TC8+

TD8-

TD8+

TE7-

TE7+

TCLK8-

TCLK8+

2V5 1V2

IC1000

EP3C55F484C6N

R21

P20

P22

P21

N20

U22

U21

R18

R19

N16

R22

T20

T19

R17

P17

V22

V21

R20

T17

T18

W20

W19

Y22

Y21

U20

U19

W22

W21

V17

V18

U18

AA22

AA21

N19

N17

N18

N22

N21

M22

M21

M20

M19

M16

T22

T21

B5_IO[15]

B5_IO[16]

B5_IO[17]

B5_IO[18]

B5_IO[19]

B5_IO[20]

B5_IO[21]

B5_IO[22]

B5_IO[23]

B5_IO[24]

B5_IO[25]

B5_IO[26]

B5_IO[27]

B5_IO[28]

B5_IO[29]

B5_IO[30]

B5_IO[31]

B5_IO[32]

B5_IO[33]

B5_IO[34]

B5_IO[35]

B5_IO[36]

B5_IO[37]

B5_IO[38]

B5_IO[39]

CLK7

CLK6

VCCD_PLL4

GNDA4

VCCA4

B5_IO[0]

B5_IO[1]

B5_IO[2]

B5_IO[3]

B5_IO[4]

B5_IO[5]

B5_IO[6]

B5_IO[7]

B5_IO[8]

B5_IO[9]

B5_IO[10]

B5_IO[11]

B5_IO[12]

B5_IO[13]

B5_IO[14]

2V5

X901

54.0000MHz

TRISTATE/OPEN

1 4

VDD

GND

2 3

OUTPUT

R949

22

C909

0.1uF

16V

2V5

SYSCLK

TMS_FLASH

/CSO

DATA0

TDI_FLASH

EJTAG_TO_FLASH

R945

0

R946

0

EJTAG_TO_FLASH

R964

22

R965

27

CONFIG_DONE

/STATUS

/CONFIG

/CE

R950

10K

R951

10K

R952

10K

R953

1K

OPT

+3.3V

OPT

SW901

JTP-1127WEM

1 2

3 4

OPT

R948

330

OPT

C911

0.1uF

16V

IC901

KIA7029AF

I

1

OPT

2

G

3

O

OPT

C914

0.1uF

16V

OPT

R959

0

/FPGA_RESET

R963

0

/3D_FPGA_RESET

2V5

L902

BLM18PG121SN1D

C917

10uF

16V

C919

0.1uF

16V

C920

100pF

50V

IC904

EPCS16SI8N_

NCS

1

DATA

2

VCC

3

GND

4

8

VCC_2

7

VCC_1

6

DCLK

5

ASDI

R967

22

R968

22

EJTAG_TO_FLASH

R947

0

TCK_FLASH

DCLK

C921

10pF

ASDO

R956

0

EJTAG_TO_FLASH

TDO_FLASH

P901

12505WR-10

11

10

8

9

6

7

4

5

1

2

3

FPGA Reset Level Shifter (3.3V to 2.5V)

+3.3V

2V5

/3D_FPGA_RESET

R1906

10K

R1907

B

10K

C

Q901

2SC3052

E

R1908

10K

R1909

B

C

4.7K

R1910

22

Q902

2SC3052

E

/RESET2V5

R991 1K

OPT

16V

C924

0.1uF

2V5

R995

22

R996

22

R997

22

R994

22

TCK

TDO

TMS

TDI

FPGA_D/L_CTRL

R2239

0

R2236

10K

R2237 4.7K

R2238

22

B

C

Q908

2SC3052

E

/CE

/CONFIG

FPGA DOWNLOAD CONTROL

2V5

IR Emitter Vsync Level Shift (2.5V to 3.3V)

3D_SYNC_OUT

+3.3V

+3.3V

R955

0

OPT

C915

18pF

50V

R1928

22

3.3K

C

Q906

2SC3052

E

R1929

B

10K

R1930

10K

Q907

2SC3052

C

E

R1931

B

R1932

10K

+3.3V

2V5

VS_STATUS2V5

R1921

22

OPT

FDV301N

Q905

R1925

OPT

22

VS_STATUS2V5

FPGA I2C Level Shift (3.3V <-> 2.5V)

2V5 +3.3V

SDA2V5

OPT

R1911

C910

18pF

50V

22

FDV301N

Q903

2V5 +3.3V

R1915

0

R1927

0

OPT

I2C_SDA

FPGA_SDA

SCL2V5

OPT

R1916

C913

18pF

50V

22

FDV301N

Q904

R1920

0

R1926

0

OPT

I2C_SCL

FPGA_SCL

2V5

MSEL[3]

MSEL[2]

MSEL[1]

MSEL[0]

AR901

1/16W

22

SMD Gasket - 4.5T (8x6)

GAS1

MDS62110208

GAS1_4.5T(8x6)

GAS2

MDS62110208

GAS2_4.5T(8x6)

GAS3

MDS62110208

GAS3_4.5T(8x6)

GAS4

MDS62110208

GAS4_4.5T(8x6)

GAS5

MDS62110208

GAS5_4.5T(8x6)

GAS6

MDS62110208

GAS6_4.5T(8x6)

GAS7

MDS62110208

GAS7_4.5T(8x6)

GAS8

MDS62110208

GAS8_4.5T(8x6)

GAS9

MDS62110208

GAS9_4.5T(8x6)

GAS10

MDS62110208

GAS10_4.5T(8x6)

GAS11

MDS62110208

GAS11_4.5T(8x6)

GAS12

MDS62110208

GAS12_4.5T(8x6)

SMD Gasket - 4.5T (8x5)

GAS1-*1

MDS62110201

GAS1_4.5T(8x5)

GAS2-*1

MDS62110201

GAS2_4.5T(8x5)

GAS3-*1

MDS62110201

GAS3_4.5T(8x5)

GAS4-*1

MDS62110201

GAS4_4.5T(8x5)

GAS5-*1

MDS62110201

GAS5_4.5T(8x5)

GAS6-*1

MDS62110201

GAS6_4.5T(8x5)

GAS7-*1

MDS62110201

GAS7_4.5T(8x5)

GAS8-*1

MDS62110201

GAS8_4.5T(8x5)

GAS9-*1

MDS62110201

GAS9_4.5T(8x5)

GAS10-*1

MDS62110201

GAS10_4.5T(8x5)

GAS11-*1

MDS62110201

GAS11_4.5T(8x5)

GAS12-*1

MDS62110201

GAS12_4.5T(8x5)

SMD Gasket - 5.5T (8x6)

GAS1-*2 GAS2-*2

MDS62110204

GAS1_5.5T(8x6)

MDS62110204

GAS2_5.5T(8x6)

GAS3-*2

MDS62110204

GAS3_5.5T(8x6)

GAS4-*2

MDS62110204

GAS4_5.5T(8x6)

GAS5-*2

MDS62110204

GAS5_5.5T(8x6)

GAS6-*2

MDS62110204

GAS6_5.5T(8x6)

GAS7-*2

MDS62110204

GAS7_5.5T(8x6)

GAS8-*2

MDS62110204

GAS8_5.5T(8x6)

GAS9-*2

MDS62110204

GAS9_5.5T(8x6)

GAS10-*2

MDS62110204

GAS11-*2

MDS62110204

GAS10_5.5T(8x6) GAS11_5.5T(8x6)

GAS12-*2

MDS62110204

GAS12_5.5T(8x6)

3D + 240 FRC + TCON BOARD

EP3C55_C6N (FPGA IC) 9

2009. 11. 13

10

LGE Internal Use Only

DDR_VREF0

DDR_A[12-0]

DDR_BA[0]

DDR_BA[1]

DDR2_CLK

/DDR2_CLK

DDR2_CKE

DDR2_ODT

/DDR_CS

/DDR_RAS

/DDR_CAS

/DDR_WE

DDR_LDQS[0]

DDR_UDQS[0]

DDR_LDM[0]

DDR_UDM[0]

C1004

0.1uF

16V

C1006

470pF

50V

DDR_A[0]

DDR_A[1]

DDR_A[2]

DDR_A[3]

DDR_A[4]

DDR_A[5]

DDR_A[6]

DDR_A[7]

DDR_A[8]

DDR_A[9]

DDR_A[10]

DDR_A[11]

DDR_A[12]

R1002 33

R1003 33

ODT

CS

RAS

CAS

WE

K9

L8

K7

L7

K3

LDQS

UDQS

F7

B7

LDM

UDM

F3

B3

R1004 1K

LDQS

UDQS

E8

A8

R1005 1K

NC4

NC5

NC6

L1

R3

R7

NC1

NC2

NC3

A2

E2

R8

VREF

J2

A5

A6

A7

A8

A9

A0

A1

A2

A3

A4

A10/AP

A11

A12

N3

N7

P2

P8

P3

M8

M3

M7

N2

N8

M2

P7

R2

BA0

BA1

L2

L3

CK

CK

CKE

J8

K8

K2

VSSDL

J7

IC1001

H5PS5162FFR-S6C

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

G8

G2

H7

H3

H1

H9

F1

F9

C8

C2

D7

D3

D1

D9

B1

B9

VDDL

J1

A1

E1

J9

M9

R1

VDD5

VDD4

VDD3

VDD2

VDD1

A9

C1

C3

C7

C9

E9

G1

G3

G7

G9

VDDQ10

VDDQ9

VDDQ8

VDDQ7

VDDQ6

VDDQ5

VDDQ4

VDDQ3

VDDQ2

VDDQ1

A3

E3

J3

N1

P9

VSS5

VSS4

VSS3

VSS2

VSS1

D8

E7

F2

F8

H2

H8

B2

B8

A7

D2

VSSQ10

VSSQ9

VSSQ8

VSSQ7

VSSQ6

VSSQ5

VSSQ4

VSSQ3

VSSQ2

VSSQ1

DDR_DQ[0]

DDR_DQ[1]

DDR_DQ[2]

DDR_DQ[3]

DDR_DQ[4]

DDR_DQ[5]

DDR_DQ[6]

DDR_DQ[7]

DDR_DQ[8]

DDR_DQ[9]

DDR_DQ[10]

DDR_DQ[11]

DDR_DQ[12]

DDR_DQ[13]

DDR_DQ[14]

DDR_DQ[15]

1V8

C1019

100pF

50V

1V8

DDR_DQ[5]

DDR_DQ[2]

DDR_DQ[0]

DDR_DQ[7]

33

AR1001

DDR_DQ[13]

DDR_DQ[10]

DDR_DQ[8]

DDR_DQ[15]

33

AR1002

DDR_DQ[14]

DDR_DQ[9]

DDR_DQ[12]

DDR_DQ[11]

33

AR1003

DDR_DQ[6]

DDR_DQ[1]

DDR_DQ[3]

DDR_DQ[4] 33

AR1004

SDDR_DQ[5]

SDDR_DQ[2]

SDDR_DQ[0]

SDDR_DQ[7]

SDDR_DQ[13]

SDDR_DQ[10]

SDDR_DQ[8]

SDDR_DQ[15]

SDDR_DQ[14]

SDDR_DQ[9]

SDDR_DQ[12]

SDDR_DQ[11]

SDDR_DQ[6]

SDDR_DQ[1]

SDDR_DQ[3]

SDDR_DQ[4]

DDR_VREF1

SDDR_DQ[15-0]

DDR_A[12-0]

DDR2_CLK

DDR_BA[0]

DDR_BA[1]

/DDR2_CLK

DDR2_CKE

DDR2_ODT

/DDR_CS

/DDR_RAS

/DDR_CAS

/DDR_WE

DDR_LDQS[1]

DDR_UDQS[1]

DDR_LDM[1]

DDR_UDM[1]

C1028

0.1uF

16V

C1031

470pF

50V

DDR_A[0]

DDR_A[1]

DDR_A[2]

DDR_A[3]

DDR_A[4]

DDR_A[5]

DDR_A[6]

DDR_A[7]

DDR_A[8]

DDR_A[9]

DDR_A[10]

DDR_A[11]

DDR_A[12]

ODT

CS

RAS

CAS

WE

K9

L8

K7

L7

K3

R1007 33

R1008 33

LDQS

UDQS

F7

B7

LDM

UDM

F3

B3

R1009 1K

LDQS

UDQS

E8

A8

R1010 1K

NC4

NC5

NC6

L1

R3

R7

NC1

NC2

NC3

A2

E2

R8

VREF

J2

A5

A6

A7

A8

A9

A10/AP

A0

A1

A2

A3

A4

A11

A12

N7

P2

P8

P3

M2

P7

R2

M8

M3

M7

N2

N8

N3

BA0

BA1

L2

L3

CK

CK

CKE

J8

K8

K2

VSSDL

J7

IC1002

H5PS5162FFR-S6C

G8

G2

H7

H3

H1

H9

F1

F9

C8

C2

D7

D3

D1

D9

B1

B9

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

VDDL

J1

A1

E1

J9

M9

R1

VDD5

VDD4

VDD3

VDD2

VDD1

A9

C1

C3

C7

C9

E9

G1

G3

G7

G9

VDDQ10

VDDQ9

VDDQ8

VDDQ7

VDDQ6

VDDQ5

VDDQ4

VDDQ3

VDDQ2

VDDQ1

A3

E3

J3

N1

P9

VSS5

VSS4

VSS3

VSS2

VSS1

D8

E7

F2

F8

H2

H8

B2

B8

A7

D2

VSSQ10

VSSQ9

VSSQ8

VSSQ7

VSSQ6

VSSQ5

VSSQ4

VSSQ3

VSSQ2

VSSQ1

DDR_DQ[16]

DDR_DQ[17]

DDR_DQ[18]

DDR_DQ[19]

DDR_DQ[20]

DDR_DQ[21]

DDR_DQ[22]

DDR_DQ[23]

DDR_DQ[24]

DDR_DQ[25]

DDR_DQ[26]

DDR_DQ[27]

DDR_DQ[28]

DDR_DQ[29]

DDR_DQ[30]

DDR_DQ[31]

1V8

1V8

C1042

100pF

50V

DDR_DQ[21]

DDR_DQ[18]

DDR_DQ[16]

DDR_DQ[23] 33

AR1005

DDR_DQ[29]

DDR_DQ[26]

DDR_DQ[24]

DDR_DQ[31] 33

AR1006

DDR_DQ[30]

DDR_DQ[25]

DDR_DQ[28]

DDR_DQ[27]

33

AR1007

DDR_DQ[22]

DDR_DQ[17]

DDR_DQ[19]

DDR_DQ[20]

33

AR1008

SDDR_DQ[21]

SDDR_DQ[18]

SDDR_DQ[16]

SDDR_DQ[23]

SDDR_DQ[29]

SDDR_DQ[26]

SDDR_DQ[24]

SDDR_DQ[31]

SDDR_DQ[30]

SDDR_DQ[25]

SDDR_DQ[28]

SDDR_DQ[27]

SDDR_DQ[22]

SDDR_DQ[17]

SDDR_DQ[19]

SDDR_DQ[20]

SDDR_DQ[31-16]

1V2

C1047

10uF

16V

C1050

0.1uF

16V

C1053

100pF

50V

IC1000

EP3C55F484C6N

K15

L16

M15

R12

R10

R8

H9

N9

P9

P10

P13

P14

N14

J16

L9

M9

J13

J14

K14

J10

K9

J11

J12

L14

M14

P11

P12

G12

J8

M8

T7

T9

T13

P15

H15

H11

K8

L7

VCCINT[0]

VCCINT[1]

VCCINT[2]

VCCINT[3]

VCCINT[4]

VCCINT[5]

VCCINT[6]

VCCINT[7]

VCCINT[8]

VCCINT[9]

VCCINT[10]

VCCINT[11]

VCCINT[12]

VCCINT[13]

VCCINT[14]

VCCINT[15]

VCCINT[16]

VCCINT[17]

VCCINT[18]

VCCINT[19]

VCCINT[20]

VCCINT[21]

VCCINT[22]

VCCINT[23]

VCCINT[24]

VCCINT[25]

VCCINT[26]

VCCINT[27]

VCCINT[28]

VCCINT[29]

VCCINT[30]

VCCINT[31]

VCCINT[32]

VCCINT[33]

VCCINT[34]

VCCINT[35]

VCCINT[36]

VCCINT[37]

VCCIO1[0]

VCCIO1[1]

VCCIO1[2]

D4

F4

K4

VCCIO2[0]

VCCIO2[1]

VCCIO2[2]

N4

U4

W4

VCCIO3[0]

VCCIO3[1]

VCCIO3[2]

VCCIO3[3]

AB2

W5

W9

W11

VCCIO4[0]

VCCIO4[1]

VCCIO4[2]

VCCIO4[3]

AB21

W12

W16

W18

VCCIO5[0]

VCCIO5[1]

VCCIO5[2]

P18

V19

Y19

VCCIO6[0]

VCCIO6[1]

VCCIO6[2]

E19

G19

L19

VCCIO7[0]

VCCIO7[1]

VCCIO7[2]

VCCIO7[3]

A21

D12

D14

D16

VCCIO8[0]

VCCIO8[1]

VCCIO8[2]

VCCIO8[3]

A2

D5

D9

D11

C1066

100pF

50V

C1068

0.1uF

16V

C1070

10uF

16V

2V5

C1067

100pF

50V

C1069

0.1uF

16V

2V5

C1071

10uF

16V

1V8

IC1000

EP3C55F484C6N

J15

K16

L15

N15

R13

R11

R9

N13

N10

K10

J9

F12

H12

H13

M12

M13

N11

K11

N12

K12

K13

L10

L11

M10

M11

L12

L13

T12

P16

L8

M7

A1

C5

C9

C11

P8

H14

H10

H8

N8

R7

T8

GND[9]

GND[10]

GND[11]

GND[12]

GND[13]

GND[14]

GND[15]

GND[16]

GND[17]

GND[18]

GND[19]

GND[20]

GND[21]

GND[22]

GND[0]

GND[1]

GND[2]

GND[3]

GND[4]

GND[5]

GND[6]

GND[7]

GND[8]

GND[23]

GND[24]

GND[25]

GND[26]

GND[27]

GND[28]

GND[29]

GND[30]

GND[31]

GND[32]

GND[33]

GND[34]

GND[35]

GND[36]

GND[37]

GND[38]

GND[39]

GND[40]

GND[41]

GND[51]

GND[52]

GND[53]

GND[54]

GND[55]

GND[56]

GND[57]

GND[58]

GND[59]

GND[60]

GND[61]

GND[62]

GND[63]

GND[64]

GND[65]

GND[42]

GND[43]

GND[44]

GND[45]

GND[46]

GND[47]

GND[48]

GND[49]

GND[50]

Y12

Y11

Y9

Y5

AB1

N3

U3

W3

D3

F3

K3

L20

P19

V20

Y20

AB22

Y18

Y16

C12

C14

C16

A22

E20

G20

1V8

C1001

10uF

16V

C1002

0.1uF

16V

C1003

0.1uF

16V

C1005

0.1uF

16V

C1007

0.1uF

16V

C1008

0.1uF

16V

C1010

0.1uF

16V

C1012

0.1uF

16V

C1013

0.1uF

16V

C1014

0.1uF

16V

C1015

0.1uF

16V

C1016

0.1uF

16V

C1017

0.1uF

16V

C1018

0.1uF

16V

C1020

0.1uF

16V

C1021

0.1uF

16V

C1022

0.1uF

16V

C1023

0.1uF

16V

SDDR_DQ[15-0]

DDR_VREF0

SDDR_DQ[14]

SDDR_DQ[9]

SDDR_DQ[8]

SDDR_DQ[15]

SDDR_DQ[12]

SDDR_DQ[13]

SDDR_DQ[10]

SDDR_DQ[11]

DDR_UDQS[0]

/DDR_CAS

DDR_A[11]

DDR_LDM[0]

SDDR_DQ[4]

DDR_LDQS[0]

DDR_A[1]

SDDR_DQ[1]

DDR_A[9]

/DDR_RAS

SDDR_DQ[3]

SDDR_DQ[6]

SDDR_DQ[7]

SDDR_DQ[2]

DDR_A[0]

DDR_A[2]

SDDR_DQ[0]

DDR2_ODT

/DDR_CS

DDR_A[4]

SDDR_DQ[5]

DDR2_CLK

/DDR2_CLK

DDR_A[8]

DDR_A[6]

DDR_A[5]

FPGA_VSYNC_1V8

C1009

0.1uF

16V

C1011

470pF

50V

IC1000

EP3C55F484C6N

T14

T15

AB18

AA17

AB17

AA18

AA19

W14

U13

V14

U14

U15

V15

W15

AB15

U12

Y14

Y15

AA16

AB16

V13

AA12

AB12

AA13

AB13

AA14

AB14

V12

W13

Y13

AA15

AB19

W17

Y17

AA20

AB20

V16

U16

U17

T16

R16

R14

R15

B4_IO[11]

B4_IO[12]

B4_IO[13]

B4_IO[14]

B4_IO[15]

B4_IO[16]

B4_IO[17]

B4_IO[18]

B4_IO[19]

B4_IO[20]

B4_IO[21]

B4_IO[22]

B4_IO[23]

B4_IO[24]

CLK13

CLK12

B4_IO[0]

B4_IO[1]

B4_IO[2]

B4_IO[3]

B4_IO[4]

B4_IO[5]

B4_IO[6]

B4_IO[7]

B4_IO[8]

B4_IO[9]

B4_IO[10]

B4_IO[25]

B4_IO[26]

B4_IO[27]

B4_IO[28]

B4_IO[29]

B4_IO[30]

B4_IO[31]

B4_IO[32]

B4_IO[33]

B4_IO[34]

B4_IO[35]

B4_IO[36]

B4_IO[37]

B4_IO[38]

B4_IO[39]

B4_IO[40]

SDDR_DQ[31-16]

DDR_VTT

1V8

C1024

0.1uF

16V

C1025

0.1uF

16V

C1026

0.1uF

16V

C1029

0.1uF

16V

C1032

0.1uF

16V

C1033

0.1uF

16V

C1034

0.1uF

16V

C1035

0.1uF

16V

C1036

0.1uF

16V

C1037

0.1uF

16V

C1038

0.1uF

16V

C1039

0.1uF

16V

C1040

0.1uF

16V

C1041

0.1uF

16V

C1043

0.1uF

16V

C1044

0.1uF

16V

DDR2_ODT

/DDR_CS

DDR_A[0]

DDR_A[2]

DDR_A[4]

DDR_A[6]

DDR_A[8]

DDR_A[11]

DDR_VREF1

C1027

0.1uF

16V

C1030

470pF

50V

LVDS_STABLE_1V8

DDR_LDM[1]

L/R_SYNC_1V8

3D_DIMMING_1V8

/DDR_WE

SDDR_DQ[20]

DDR_BA[0]

DDR2_CKE

DDR_BA[1]

SDDR_DQ[22]

SDDR_DQ[19]

SDDR_DQ[17]

DDR_A[10]

SDDR_DQ[21]

SDDR_DQ[18]

DDR_A[3]

SDDR_DQ[23]

SDDR_DQ[16]

DDR_UDM[1]

SDDR_DQ[27]

SDDR_DQ[25]

3D_DIMMING_2_1V8

FRAME_INFO_1V8

DDR_LDQS[1]

SDDR_DQ[26]

SDDR_DQ[30]

SDDR_DQ[28]

SDDR_DQ[31]

DDR_UDQS[1]

SDDR_DQ[29]

DDR_A[12]

SDDR_DQ[24]

DDR_UDM[0]

DDR_A[7]

IC1000

EP3C55F484C6N

Y8

T10

T11

V9

V10

U10

AA8

W8

AA7

AB7

W7

Y7

U9

V8

V7

AA4

AB4

AA5

AA6

AB6

AB5

AA3

AB3

W6

U8

Y4

Y3

Y6

V6

V5

U7

AA10

AB10

AA11

AB11

AB8

AA9

AB9

U11

V11

W10

Y10

B3_IO[13]

B3_IO[14]

B3_IO[15]

B3_IO[16]

B3_IO[17]

B3_IO[18]

B3_IO[19]

B3_IO[20]

B3_IO[21]

B3_IO[22]

B3_IO[23]

B3_IO[24]

B3_IO[25]

B3_IO[26]

B3_IO[0]

B3_IO[1]

B3_IO[2]

B3_IO[3]

B3_IO[4]

B3_IO[5]

B3_IO[6]

B3_IO[7]

B3_IO[8]

B3_IO[9]

B3_IO[10]

B3_IO[11]

B3_IO[12]

B3_IO[27]

B3_IO[28]

B3_IO[29]

B3_IO[30]

B3_IO[31]

B3_IO[32]

B3_IO[33]

B3_IO[34]

B3_IO[35]

B3_IO[36]

B3_IO[37]

B3_IO[38]

B3_IO[39]

CLK15

CLK14

/DDR_CAS

/DDR_RAS

DDR_A[1]

DDR_A[5]

DDR_A[9]

DDR_A[12]

DDR_A[7]

DDR_A[3]

DDR_BA[0]

DDR_BA[1]

DDR2_CKE

/DDR_WE

DDR_A[10]

DDR_VTT

AR1009

AR1010

AR1011

AR1012

AR1013

R1011

56

56

56

56

56

56

C1045

0.1uF

16V

C1048

0.1uF

16V

C1051

0.1uF

16V

C1054

0.1uF

16V

C1056

0.1uF

16V

DDR_VTT

C1046

0.1uF

16V

C1049

0.1uF

16V

C1052

0.1uF

16V

C1055

0.1uF

16V

C1057

0.1uF

16V

56

AR1014

56

AR1015

56

AR1016

56

AR1017

56

AR1018

R1012

L/R_SYNC

L/R_SYNC_FRC_OUT

56

C1059

0.1uF

16V

C1061

0.1uF

16V

C1063

0.1uF

16V

DDR2_ODT

/DDR_CS

DDR_A[0]

DDR_A[2]

DDR_A[4]

DDR_A[6]

DDR_A[8]

DDR_A[11]

/DDR_CAS

/DDR_RAS

DDR_A[1]

DDR_A[5]

DDR_A[9]

DDR_A[12]

DDR_A[7]

DDR_A[3]

DDR_BA[0]

DDR_BA[1]

DDR2_CKE

/DDR_WE

DDR_A[10]

C1058

0.1uF

16V

C1060

0.1uF

16V

C1062

0.1uF

16V

C1064

0.1uF

16V

C1065

0.1uF

16V

+3.3V

1V2

1V8

C1072

0.1uF

16V

C1077

0.1uF

16V

1V2

C1073

0.1uF

16V

C1078

0.1uF

16V

C1082

0.1uF

16V

C1087

0.1uF

16V

C1092

0.1uF

16V

C1083

0.1uF

16V

C1088

0.1uF

16V

3D_FRAME_INFO

C1093

0.1uF

16V

R1013

10K

C1097

0.1uF

16V

C2002

0.1uF

16V

C2007

0.1uF

16V

C1098

0.1uF

16V

B

C2003

0.1uF

16V

+3.3V

R1014

10K

+3.3V

C2008

0.1uF

16V

C

Q1001

2SC3052

E

R1015

10K

C2012

0.1uF

16V

C2016

0.1uF

16V

C2013

0.1uF

16V

3D Frame Info Level Shift (3.3V to 1.8V)

FPGA V-SYNC Level Shift (1.8V to 3.3V)

1V8

R1016

B

C

3.3K

R1017

22

Q1002

2SC3052

E

1V8

2V5

C1074

0.1uF

16V

C1079

0.1uF

16V

2V5

C1075

0.1uF

16V

1V8

C1076

0.1uF

16V

FRAME_INFO_1V8

FPGA_VSYNC_1V8

C1080

0.1uF

16V

C1081

0.1uF

16V

R1018

10K

C1084

0.1uF

16V

C1089

0.1uF

16V

C1094

0.1uF

16V

C1085

0.1uF

16V

C1086

0.1uF

16V

+3.3V

R1019

B

C1090

0.1uF

16V

C1091

0.1uF

16V

10K

R1020

10K

C

Q1003

2SC3052

E

+3.3V

C1095

0.1uF

16V

C1096

0.1uF

16V

C1099

0.1uF

16V

C2004

0.1uF

16V

C2009

0.1uF

16V

C2000

0.1uF

16V

C2001

0.1uF

16V

+3.3V

C2005

0.1uF

16V

C2006

0.1uF

16V

R1021 1K

B

C

Q1004

2SC3052

E

R1022

22

+3.3V

C2010

0.1uF

16V

C2011

0.1uF

16V

C2014

0.1uF

16V

C2017

0.1uF

16V

C2015

0.1uF

16V

FPGA_VSYNC

C2018

0.1uF

16V

OPT

R1023

10K

R1028

10K

R1024

B

10K

R1025

10K

C

Q1005

2SC3052

E

R1026

B

C

3.3K

R1027

22

Q1006

2SC3052

E

L/R_SYNC_1V8

FPGA_D/L_CTRL

R1029

10K

OPT

R1030

OPT

B

10K

R1031

10K

OPT

C

E

Q1007

2SC3052

OPT

R1032

OPT

B

3.3K

R1033

22

C

Q1008

2SC3052

OPT

OPT

E

LVDS_STABLE_1V8

3D_DIMMING_1V8

R1034

10K

R1035

B

10K

R1036

10K

C

Q1009

2SC3052

E

R1037

B

1K

R1038

22

C

Q1010

2SC3052

E

3D_DIMMING

3D_DIMMING_2_1V8

+3.3V

+3.3V

R1039

10K

R1040

B

10K

R1041

10K

C

Q1011

2SC3052

E

R1042

B

1K

R1043

22

C

Q1012

2SC3052

E

3D_DIMMING_2

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

3D + 240 FRC + TCON BOARD

DDR2 10

2009. 11. 13

10

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

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