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WLC1115
Wireless charging IC (WLC) - Transmitter
15W with integrated USB Type-C PD controller
General description
WLC1115 is a highly integrated, Qi compliant wireless power transmitter with integrated USB Type-C Power
Delivery (PD). WLC1115 complies with the latest Qi specification for 15W applications. WLC1115 is also compliant with the latest USB Type-C and PD specifications and is ideal for up to 15W charging applications.
WLC1115 has integrated gate drivers for the buck and inverter power supplies that are necessary for wireless transmitter applications. WLC1115 supports a wide input voltage range and offers many programmable features for creating distinct wireless transmitter solutions.
WLC1115 is a highly programmable wireless power transmitter and integrated USB-PD sink solution with an on-chip 32-bit Arm® Cortex®-M0 processor, 128KB flash, 16KB RAM, and 32KB ROM that allows most flash available for user application use. It also includes various analog and digital peripherals such as ADC, PWMs, and timers. The inclusion of a fully programmable MCU with analog and digital peripherals enables scalable multi-coil wireless charging solutions for free positioning transmitter designs.
Potential applications
• Wireless charging pads for extended power profile
(EPP) (15W) and basic power profile (BPP) (5W)
• Smart speakers
• Portable accessories
• Furniture and home goods
• Docking stations
• High speed charging support
Features
• Protection
- Overcurrent protection (OCP), overvoltage protection (OVP)
- Supports over-temperature protection through integrated ADC circuit and internal temperature sensor
• Temperature range
- -40°C to +105°C extended industrial temperature range
• Package
- 68 lead QFN 8.0 8.0 0.65mm LD68B 5.7 5.7mm
EPAD
• Qi v1.3.x compliant transmitter (MP-A11 coil)
VBUS
USB Type‐C
Receptacle • Integrated USB-PD controller
- Supports latest USB-PD 3.0 version
- Programmable power supply (PPS) mode
- Support for USB PD legacy charging protocols like
QC 2.0/ 3.0 and AFC
• Integrated buck converter controller for VBRIDGE
(VBRG)
• Integrated gate drivers for buck converter and inverter
• Integrated Q factor detection
VDDD
C
VDDD
VCCD
C
VIN
Q5
Q6
WLC1115-68LQXQ/T
VBRG
CSPO
CSNO
LG1_1
L1
HG1_1
SW1_1
HG2_1
SW2_1
Q1
Q2
VBRG
R
SNS
VBB_1
Q3
Q4
C1
C
BRG
C
ZVS1
Cp
Tx Coil
C
ZVS2
• Integrated FSK modulator
• Wide input voltage range: 4.5V-24V
• Communication ports: I
2
C, UART
C
VCCD
LED(s)
GPIOs
LG2_1
ASK_DEMOD
ASK Demod filters
DEMOD
Note
1. Customers must acquire the licensing for QC2.0/3.0 and AFC. For any other legacy charging protocol support, contact your local Infineon sales representative.
Datasheet www.infineon.com
Please read the Important Notice and Warnings at the end of this document
page 1 of 40
002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Logic block diagram
Logic block diagram
WLC1115: Wireless Transmitter Controller with Integrated PD
MCU Subsystem arm
®
CORTEX -M0
48 MHZ
Integrated Digital Blocks
4 x TCPWM
SCB X 4
(2 x I2C, SPI, UART)
IO Subsystem
CC
GPIOs
Flash
(128 KB)
SROM
(32 KB)
Buck Controller
PWM
High Side & Low
Side Gate drivers
Current Sense
Amplifier
2 X OVT
SRAM
(16 KB)
System
Resource
USB PD Legacy Charging
Protocols - QC 2.0 / 3.0 & AFC
Wireless Controller with Integrated PD
Qi v1.3.x Stack
PWM
Baseband MAC &
PHY
Hi-Voltage LDO
High Side & Low
Side Gate Drivers
FOD
Q Factor, Resonance
Freq. & Power Loss
VBRG OVP, SCP
Protection
1 x 8-bit SAR ADC
ASK Demodulator
Voltage & Current
ASK Decoder
NFET Gate Driver w/
Slew Rate Control
Current Sense
Amplifier
PPDE/Samsung FC,
Apple 7.5W
Note
2. Customers need to acquire their own licensing for Samsung FC.
Datasheet 2 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Table of contents
Table of contents
.................................................................................................................................................................................. 24
Datasheet 3 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Table of contents
Datasheet 4 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Application diagram for 15W transmitter solution with MP-A11 Tx coil
1 Application diagram for 15W transmitter solution with MP-A11
Tx coil
illustrates a typical application of WLC1115 for 15W, Qi v1.3.x compliant transmitter for fixed frequency and voltage control based MP-A11 Qi transmitter coil. The input power to the system is through Type-C PD sink, powering the buck converter. The buck converter powers the full bridge inverter which in turn drives the transmitter coil. The WLC1115 controls the inverter bridge voltage (VBRG) using the buck converter to regulate the power flow to the transmitter coil powering the receiver. A dual Opamp is used for converting the amplitude shift key (ASK) modulated power signal into binary signal. WLC1115 uses a digital logic for decoding the binary signals. The OPTIGA ™ Trust Security IC is interfaced over I 2 C for authentication requirements per Qi v1.3.x.
VBUS_IN BB_IN 5 m 10 m
NFET_CTRL_1
DP
DM
CC1
CC2
VDDD
68 67 1 2
0.1μF 1μF
GND
390pF
390pF
66
CSNI_0
65
61
CSPI_0
VIN
62
VCCD
10
COMP
69
64
34
GND (EPAD)
GND
GND
23
DP
24
DM
15
CC1
16
CC2
Config PC
USB-I2C*
VDDD
Optiga Trust
Charge
( Qi v1.3.x EPP )
VDDD
VDDD 63
0.1μF 10μF
25
0.1μF 1μF
28
SWD_DAT/HPI_SDA 56
SWD_CLK/HPI_SCL
57
VDDD
VDDD
XRES
SWD_DAT/GPIO9
SWD_CLK/GPIO10
VDDD
I2C_SDA
I2C_SCL
OPTIGA RESET
29
30
33
31
SDA_SEC
SCL_SEC
RES_SEC
UART/GPIO7
USB-UART*
58
59
Debug PC
VDDD
5 9 7 8 6 13 11 12 14
WLC1115-68LQXQ/T
PVDD_0
PGND_0
PVDD_1
PGND_1
DNU2
1μF
4
3
48
49
1μF
55
DNU1
54
VBB_1
HG2_1
46
44
VDDD
BST2_1
SW2_1
LG2_1
43
45
HG1_1
47
52
VDDD
BST1_1 53
SW1_1
51
LG1_1
50
ASK_P
ASK_N
41
40
ASK_OUT
ASK_DEMOD
ASK_SEL
18
19
36
VDDD
Dual Opamp
VBB_1
Qi PTx Coil
26 27 60 39
QCOMP2
QCOMP1
32
37
Oscillator
(optional)
NOTE:
1/ Sink FET is Optional
2/ Optiga Trust Charge is required for Qi v1.3.x EPP 15W only
* These are External Dongle Board not part of Solution HW
Figure 1 Application diagram for 15W transmitter solution with MP-A11 Tx coil
Datasheet 5 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Pin information
16
17
18
19
20
3
4
5
9
10
7
8
11
12
13
14
2
Table 1
Pin#
1
2
6
15
Pin information
WLC1115 pinouts
Pin name
Pin function for 15W
MP-A11 application firmware
VBRG_DIS
NFET_CTRL_0
ASK_OUT
ASK_DEMOD
GD_OVR_HB_1
SW1_0
LG1_0
PGND_0
PVDD_0
LG2_0
VBB_0
SW2_0
HG2_0
BST2_0
COMP
CSPO
CSNO
VBRG
CC1
CC2
PWM_IN1
Pin description
Buck converter switching node (DC-DC bank 1) and input to zero current detector for low side gate driver. Connect this pin to switch node of buck with a short and wide trace.
Low side gate driver output for buck converter (DC-DC bank 1).
Connect to the buck Low side FET gate. Use a wide trace to minimize inductance of this connection.
Ground for gate driver (DC-DC). Connect all grounds (GND) and
PGND pins (PNGD_0 and PGND_1) together. Connect directly PCB ground plane and Exposed pad (E-PAD).
Connect to VDDD and to decoupling capacitors (1µF and 0.1µF), as close to the IC as possible.
Low side gate driver output for DC-DC bank 2.
Float this pin for 15W MP-A11 application.
Input rail of inverter bridge, connected to output of the buck converter. Connect this to the buck side terminal of current sense resistor for inverter bridge input current sensing. Use a dedicated
(Kelvin) trace for this connection.
Switching node (DC-DC bank 2).
Connect this pin directly to the E-PAD.
High side gate driver output of DC-DC bank 2.
Float this pin for 15W MP-A11 application.
Bootstrap power supply for DC-DC bank 2.
Connect this pin to VDDD via a Schottky diode.
Error amplifier (EA) output for buck controller.
Connect the RC compensation network to GND.
Positive input of current sensing amplifier of inverter bridge input current. Connect to positive terminal of the output current sense resistor (VBB_0).
Negative input of current sensing amplifier of inverter bridge input current. Connect to negative terminal of the current sense resistor.
Feedback pin for buck output voltage. Connect it to buck output before inverter bridge input current sense resistor.
Inverter input power supply voltage. Connect to buck output before inverter bridge input current sense resistor. Used as weak discharge of VBRG.
Type-C connector configuration channel 1. Connect directly to the CC1 pin on the port’s Type-C connector and to a capacitor
(recommended value 390pF) to ground.
Type-C connector configuration channel 2. Connect directly to the CC2 pin on the port’s Type-C connector and to a capacitor
(recommended value 390pF) to ground.
NFET gate driver output. Float this pin if it is not used.
ASK voltage/current sensing path.
IC output for ASK signal processing.
Input for ASK signal decoding. Connect external ASK comparator output to this pin. Short this pin to pin-36 (ASK_SEL).
Inverter gate driver input signal for inverter bank 1.
Short this pin to pin-22. PWM_OUT.
Datasheet 6 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Pin information
63
26
27
28
29
30
31
32
33
34, 64
35
36
37
38
Table 1
Pin#
21
22
23
24
25
39
40
41
WLC1115 pinouts
(continued)
Pin name
Pin function for 15W
MP-A11 application firmware
GD_OVR_HB_2
DP/GPIO1
DM/GPIO2
GPIO3
GPIO4
GPIO5/SCB0
GPIO6/SCB0
GPIO7/SCB1
GPIO8
PWM_OUT
VDDD
XRES
QCOMP2
GND
NFET_CTRL_1
ASK_SEL
QCOMP1
BB_IN
VBUS_IN
ASK_N
ASK_P
PWM_IN2
DP
DM
LED1
LED2
SDA_SEC
SCL_SEC
UART/GPIO7
RES_SEC
Pin description
Inverter gate driver input signal for inverter bank 2.
Short this pin to pin-22 PWM_OUT.
Inverter PWM signal output used for the inverter gate drive inputs. Short this pin to pin 20 (PWM_IN1) and pin 21 (PWN_IN2).
Default USB D+ / configurable GPIO. For support of legacy charging AFC and QC. IC does not support USB data transmission on this pin.
Default USB D- / configurable GPIO. For support of legacy charging AFC and QC. IC does not support USB data transmission on this pin.
VDDD 5V LDO output from VIN. Connect a ceramic bypass capacitor (recommended value 1µF) from this pin to GND close to the IC. Connect all VDDD pins together.
VDDD 5V LDO output from VIN. Connect a ceramic bypass capacitor (recommended value 10µF) from this pin to GND close to the IC. Connect all VDDD pins together.
Default LED1 for 15W MP-A11 application/configurable GPIO.
Float this pin if it is not used.
Default LED2 for 15W MP-A11 application/configurable GPIO.
Float this pin if it is not used.
External reset – active low, internally pulled-up (~6k Ω ).
Float this pin if it is not used.
Used for interfacing as Master, with OPTIGA™ Trust I pin is configured for open drain connection, connect an external pull-up resistor. Float this pin if it is not used.
2
C SDA. The
Used for interfacing with OPTIGA™ Trust I 2 C SCL. The pin is configured for open drain connection, connect an external pull-up resistor. Float this pin if it is not used.
Default UART Tx for debug/configurable GPIO.
Float this pin if it is not used.
Q-factor based foreign object detection (FOD) pre-charge measurement input for frequency counting. Short this pin to pin
37 (QCOMP1).
RESET for OPTIGA™ Trust IC. Configured for using OPTIGA™ Trust in low power mode. Float this pin if it is not used.
Ground. Connect directly to the E-PAD and to ground plane.
NFET gate driver output. Float this pin if it is not used.
Input for ASK signal decoding. Short this pin to pin-19
(ASK_DEMOD).
Q-factor based FOD pre-charge measurement input for peak voltage detect. Short this pin to pin 32 (QCOMP2).
Input voltage to BUCK (DC-DC) controller. Connect to USB Type-C connector's VBUS pin. If EMI filter/choke is used after Type-C connector then connect it to output of the EMI filter/choke.
Input voltage feedback of buck (DC-DC). Connect to USB Type-C connector's VBUS pin. If EMI filter/choke is used after Type-C connector then connect it to output of the EMI filter/choke.
Negative input of ASK voltage sensing signal input to internal amplifier.
Positive input of ASK voltage sensing signal input to internal amplifier.
Datasheet 7 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Pin information
Table 1
Pin#
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57 GPIO10/SCB3/SWD_CLK SWD_CLK/GPIO10
58
59
60
61
62
65
WLC1115 pinouts
(continued)
Pin name
Pin function for 15W
MP-A11 application firmware
CSNI_1
CSPI_1
GPIO9/SCB3/SWD_DAT
GPIO11/SCB3
ASK_TST
GPIO12/SCB3
GPIO13/CLK_IN
BST2_1
HG2_1
SW2_1
VBB_1
LG2_1
PVDD_1
PGND_1
LG1_1
SW1_1
HG1_1
BST1_1
VIN
VCCD
CSPI_0
DNU1
DNU2
SWD_DAT/GPIO9
TEMP_FB
GPIO12
GPIO13/CLK_IN
Pin description
ASK voltage sensing comparator output. Float this pin if it is not used.
Bootstrap power supply for (inverter bank 2) inverter high side gate driver. Connect a capacitor (recommended value 0.1µF) from this pin to SW2_1. Also, connect a Schottky diode from
VDDD to BST2_1.
High side gate driver for inverter FET (inverter bank 2). Connect to the Inverter bank 2, high side FET gate. Use a wide trace to minimize inductance of this connection.
Inverter switching node for inverter bank 2. Connect this pin to the inverter bank 2 switching node with a short and wide trace.
Inverter input voltage sense. Connect to inverter input voltage, after the current sense resistor. Use a dedicated (Kelvin) trace for this connection.
Low side gate driver for inverter FET (inverter bank 2). Connect to the inverter bank 2 low side FET gate.
Connect to VDDD pin. Connect bypass capacitors (recommended values 1µF and 0.1µF) as close to the IC as possible.
Ground for inverter gate driver. Connect directly to PCB ground plane and E-PAD. Connect all GND and PGND pins together.
Low side gate driver for inverter FET (inverter bank 1). Connect to the inverter bank 1 Low side FET gate.
Inverter switching node for inverter bank 1. Connect this pin to the Inverter bank 1 switching node with a short and wide trace.
High side gate driver for inverter FET (inverter bank 1). Connect to the inverter bank 1 high side FET gate.
Bootstrap power supply for (inverter bank 1) inverter high side gate driver. Connect a capacitor (recommended values 0.1µF) from this pin to SW1_1. Also, connect a Schottky diode from
VDDD to BST1_1.
Negative input of input current sense amplifier for inverter.
Float this pin if it is not used.
Positive input of input current sense amplifier for inverter.
Float this pin if it is not used.
Used for I
GPIO.
2 C/SWD register access or programming/configurable
Used for I
GPIO.
2 C/SCL register access or programming/configurable
Tx coil temperature measurement via thermistor monitoring for
15W MP-A11 application/configurable GPIO. Float this pin if it is not used.
Configurable GPIO. Float this pin if it is not used.
Default used as input for external clock/configurable GPIO.
Float this pin if it is not used.
4.5V–24V input supply. Connect a decoupling capacitor
(recommended value 0.1µF) from this pin to GND close to this pin.
1.8V LDO output for Arm®-M0 power and 1.8V references.
Connect a decoupling capacitor (recommended value 0.1µF) from this pin to ground. Not for external use or loading.
Positive input of USB input current sense amplifier (DC-DC).
Connect to the positive terminal of the input current sense resistor. Use a dedicated (Kelvin) connection.
Datasheet 8 of 40 002-34241 Rev. *B
2022-04-22
Table 1
Pin#
66
67
68
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Pin information
WLC1115 pinouts
(continued)
Pin name
Pin function for 15W
MP-A11 application firmware
CSNI_0
BST1_0
HG1_0
EPAD
Pin description
Negative input of USB input current sense amplifier t (DC-DC).
Connect to the negative terminal of the input current sense resistor. Use a dedicated (Kelvin) connection.
Bootstrap power supply for buck (DC-DC) high side gate driver.
Connect a capacitor (recommended value 0.1µF) from this pin to
SW1_0. Also, connect a Schottky diode from VDDD to BST1_0.
High side gate driver output of buck converter (DC-DC bank 1).
Connect to the buck high side FET gate. Use a wide trace to minimize inductance of this connection.
Exposed ground pad. Connect directly to ground plane and pins
34 and 64.
DC‐DC bank 1
NFET_CTRL_1
HG1_0
SW1_0
LG1_0
Inverter bank 1
Inverter bank 2
HG1_1
SW1_1
LG1_1
HG2_1
SW2_1
LG2_1
Figure 2 WLC1115 key pin mapping with buck and inverter power supplies
Note
inverter power supplies.
Datasheet 9 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Pin information
SW1_0
LG1_0
PGND_0
PVDD_0
LG2_0
VBB_0
SW2_0
HG2_0
BST2_0
COMP
CSPO
CSNO
VBRG
VBRG_DIS
CC1
CC2
NFET_CTRL_0
12
13
14
15
16
17
7
8
9
10
11
5
6
3
4
1
2
Figure 3 WLC1115 68-QFN pinout
EPAD
48
47
46
51
50
49
41
40
39
38
37
36
35
45
44
43
42
SW1_1
LG1_1
PGND_1
PVDD_1
LG2_1
VBB_1
SW2_1
HG2_1
BST2_1
ASK_TST
ASK_P
ASK_N
VBUS_IN
BB_IN
QCOMP1
ASK_SEL
NFET_CTRL_1
Datasheet 10 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Electrical specifications
3
3.1
Electrical specifications
Absolute maximum ratings
Table 2 Absolute maximum ratings
Exceeding maximum ratings may shorten the useful life of the device.
All specifications are valid for -40°C TA 105°C and TJ 125°C, except where noted.
Parameter Typ Max Unit
VIN
VDDD, PVDD
VBUS
CC_0, ASK_SEL
QCOMP1
QCOMP2
GPIO
IGPIO
IGPIO_INJECTION
ESD_HBM
ESD_HBM_CC
ESD_CDM
LU
TJ
Description
Maximum input supply voltage
Maximum supply voltage relative to VSS
Max VBRG_DIS (P0/P1) voltage relative to VSS
Max voltage on CC and
ASK_SEL pins
Max voltage on QCOMP1 pins
Input to QCOMP2
Min
–
–0.7
Inputs to GPIO
Maximum current per
GPIO
GPIO injection current,
Max for VIH > VDDD, and
Min for VIL < VSS
Electrostatic discharge
(ESD) human body model
(HBM)
–0.7
–0.5
–25
–0.5
2000
ESDHBM for CC1 and CC2 pins for both ports
1100
ESD charged device model 500
Pin current for latch-up –100
Junction temperature –40
–
40
6
24
24
24
VDDD + 0.5
VDDD + 0.5
25
0.5
–
100
125
V mA
V mA
°C
–
Current limited to 1mA for -0.7V minimum specification.
–
Description
Absolute max, current injected per pin
Applicable for all pins except
CC1_0, CC2_0, ASK_SEL,
QCOMP1 pins.
Only applicable to CC1_0, CC2_0,
ASK_SEL, QCOMP1 pins
Charged device model ESD
–
Note
4. Usage above the absolute maximum conditions listed in
may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods of time may affect device reliability. The maximum storage temperature is 150°C in compliance with JEDEC Standard JESD22-A103, high temperature storage life. When used below absolute maximum conditions but above normal operating conditions, the device may not operate to specification.
Datasheet 11 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Electrical specifications
Table 3 Pin based absolute maximum ratings
5
6
3
4
1
2
Pin#
11
12
13
14
9
10
7
8
19
20
21
22
15
16
17
18
23
24
25, 63
26
27
28
29
30
Pin name
SW1_0
LG1_0
PGND_0
PVDD_0
LG2_0
VBB_0
SW2_0
HG2_0 (w.r.t SW2_0)
COMP
Pin function for 15W
MP-A11 application firmware
BST2_0 (w.r.t SW2_0)
CSPO
CSNO
VBRG
VBRG_DIS
CC1
CC2
NFET_CTRL_0
ASK_OUT
ASK_DEMOD
GD_OVR_HB_1
GD_OVR_HB_2
PWM_OUT
DP/GPIO1
DM/GPIO2
VDDD
GPIO3
GPIO4
XRES
GPIO5/SCB0
GPIO6/SCB0
GPIO7/SCB1
QCOMP2
GPIO8
GND
PWM_IN1
PWM_IN2
DP
DM
LED1
LED2
SDA_SEC
SCL_SEC
UART/GPIO7 31
32
33
34,64
RES_SEC
35
36
37
NFET_CTRL_1
ASK_SEL
QCOMP1
Notes
5. Max voltage cannot exceed 6 V.
6. Max absolute voltage w.r.t GND must not exceed 40V.
7. Min absolute voltage w.r.t GND must not be lower than -0.3V.
8. Current limited to 1mA for -0.7V minimum specification only.
Absolute minimum (V) Absolute maximum (V)
-0.5
-0.5
-0.3
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.7
-0.5
-0.3
-0.5
-0.5
-0.7
-0.3
-0.3
-0.3
-0.3
-0.3
-0.5
0
-0.5
-0.7
-0.5
-0.3
-0.3
-0.5
-0.3
24
24
32
PVDD+0.5
PVDD+0.5
PVDD+0.5
PVDD+0.5
PVDD+0.5
PVDD+0.5
PVDD+0.5
6
PVDD+0.5
PVDD+0.5
PVDD+0.5
PVDD+0.5
PVDD+0.5
35
PVDD+0.5
0.3
VDD
PVDD+0.5
24
24
PVDD+0.5
PVDD+0.5
PVDD+0.5
24
24
24
24
PVDD+0.5
PVDD+0.5
PVDD+0.5
0.3
32
24
24
Datasheet 12 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Electrical specifications
Table 3 Pin based absolute maximum ratings
(continued)
38
39
40
41
42
43
Pin# Pin name
BB_IN
VBUS_IN
SW2_1
VBB_1
LG2_1
Pin function for 15W
MP-A11 application firmware
ASK_N
ASK_P
ASK_TST
BST2_1 (w.r.t SW2_1)
HG2_1 (w.r.t SW2_1)
48
49
50
51
44
45
46
47
55
56
57
58
59
52
53
54
60
61
62
65
PVDD_1
PGND_1
LG1_1
SW1_1
HG1_1 (w.r.t SW1_1)
BST1_1 (w.r.t SW1_1)
CSNI_1 DNU1
CSPI_1
GPIO9/SCB3/SWD_DAT
GPIO10/SCB3/SWD_CLK
GPIO11/SCB3
GPIO12/SCB3
GPIO13/CLK_IN
VIN
VCCD
CSPI_0
DNU2
SWD_DAT/GPIO9
SWD_CLK/GPIO10
TEMP_FB
GPIO12
GPIO13/CLK_IN
66
67
68
CSNI_0
BST1_0 (w.r.t SW1_0)
HG1_0 (w.r.t SW1_0)
EPAD
Notes
5. Max voltage cannot exceed 6 V.
6. Max absolute voltage w.r.t GND must not exceed 40V.
7. Min absolute voltage w.r.t GND must not be lower than -0.3V.
8. Current limited to 1mA for -0.7V minimum specification only.
Absolute minimum (V) Absolute maximum (V)
-0.5
-0.3
-0.3
-0.3
-0.3
0
-0.5
-0.3
-0.5
0
-0.3
-0.3
-0.5
-0.5
-0.5
-0.5
-0.3
-0.3
-0.5
-0.7
-0.5
-0.7
-0.3
-0.5
-0.3
-0.3
-0.3
-0.3
-0.5
0
PVDD+0.5
PVDD+0.5
40
40
PVDD+0.5
PVDD+0.5
PVDD+0.5
PVDD+0.5
PVDD+0.5
40
2
40
40
PVDD+0.5
PVDD+0.5
0.3
24
24
24
24
PVDD+0.5
PVDD+0.5
PVDD+0.5
24
24
PVDD+0.5
VDDD
0.3
PVDD+0.5
35
Datasheet 13 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Electrical specifications
3.2
Device-level specifications
All specifications are valid for -40°C TA 105°C and TJ 125°C, except where noted.
3.3
DC specifications
Table 4 DC specifications (Operating conditions)
Spec ID Parameter
SID.PWR#1 VIN
SID.PWR#2 VDDD
Description
Input supply voltage
VDDD output voltage range
Min
4.5
4.6
SID.PWR#3 VDDD_MIN
SID.PWR#20 VBRG
SID.PWR#5 VCCD
VDDD dropout voltage VIN - 0.2
VBRG_0 output range
VCCD output voltage
3
Typ
–
1.8
Max
24
5.5
–
22
Unit
V
SID.PWR#25 IDD_ACT48M
Operating quiescent current at 0.4MHz
switching frequency
–
87
– mA
Details/conditions
–
5.5V < VINS < 24V;
Max load = 150 mA
4.5V < VIN < 5.5V;
Max load = 20 mA
VIN > VBRG
–
TA = 25°C, VIN = 12V.
CC IO in Transmit or Receive, no I/O sourcing current,
No VCONN load current,
CPU at 48MHz, buck and inverter ON,
3-nF gate driver capacitance.
3.3.1
CPU
Table 5
Spec ID
SID.CLK#4
SYS.XRES#5 Tx RES
SYS.FES#1
CPU specifications
Parameter
F CPU
T _PWR_RDY
Description
CPU input frequency
External reset pulse width
Power-up to “Ready to accept I 2 command”
C/CC
Min
–
5
–
Typ
–
–
5
Max
48
–
25
Unit
MHz
µs ms
–
Details/conditions
Datasheet 14 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Electrical specifications
3.3.2
GPIO
All specifications are valid for -40°C TA 105°C and TJ 125°C, except where noted.
Table 6 GPIO specifications
Spec ID
GPIO DC specifications
Parameter
SID.GIO#9 V
IH_CMOS
SID.GIO#10
SID.GIO#7
SID.GIO#8
SID.GIO#2
SID.GIO#3
SID.GIO#4
SID.GIO#5
V
IL_CMOS
V
OH
V
OL
Rpu
Rpd
I
IL
C
PIN_A
Description Min
Input voltage HIGH threshold
Input voltage LOW threshold
Output voltage HIGH level
Output voltage LOW level
Pull-up resistor when enabled
Pull-down resistor when enabled
Input leakage current
(absolute value)
0.7 × VDDD
–
VDDD – 0.6
–
3.5
3.5
Max pin capacitance
–
Typ
–
5.6
5.6
–
Max
–
0.3 × VDDD
–
0.6
8.5
8.5
2
22
Unit
V
CMOS input
IOH = –4mA
IOL = 10mA k Ω –
SID.GIO#6
SID.GIO#13
C
PIN
V
HYSTTL
SID.GIO#14 V
HYSCMOS
GPIO AC specifications
SID.GIO#16 T
RISEF
Max pin capacitance
Input hysteresis,
LVTTL, VDDD > 2.7V
Input hysteresis
CMOS
100
0.1 × VDDD
2
3
–
7
–
12 pF mV
–
Details/
Conditions
Capacitance on
DP, DM pins
–40°C < TA < +105°C,
All VDDD, all other I/Os
VDDD > 2.7V
SID.GIO#17
SID.GIO#18
SID.GIO#19
SID.GIO#20
SID.GIO#21
SID.GIO#22
T
FALLF
T
RISES
T
FALLS
F
GPIO_OUT1
F
GPIO_OUT2
F
GPIO_IN
Rise time in Fast
Strong mode
Fall time in Fast
Strong mode
Rise time in Slow
Strong mode
Fall time in Slow
Strong mode
GPIO FOUT;
3.0V VDDD 5.5V.
Fast Strong mode.
GPIO FOUT;
3.0V VDDD 5.5V.
Slow Strong mode.
GPIO input operating frequency;
3.0 V VDDD 5.5 V.
2
10
10
–
–
12
60
60
16
7
48 ns
MHz
Cload = 25pF
-40°C TA +105°C
GPIO OVT DC specifications
SID.GPIO_20VT_
GIO#4
GPIO_20VT_I_LU
GPIO_20VT latch up current limits
–140 – 140 mA
Max / min current in to any input or output, pin-to-pin, pin-to-supply
Datasheet 15 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Electrical specifications
Table 6
Spec ID
SID.GPIO_20VT_
GIO#5
SID.GPIO_20VT_
GIO#6
GPIO specifications
(continued)
Parameter
GPIO_20VT_RPU
GPIO_20VT_RPD
Description
GPIO_20VT pull-up resistor value
GPIO_20VT pull-down resistor value
GPIO_20VT input leakage current
(absolute value)
SID.GPIO_20VT
_GIO#16
SID.GPIO_20VT
_GIO#17
SID.GPIO_20VT
_GIO#33
SID.GPIO_20VT
_GIO#36
SID.GPIO_20VT
_GIO#41
SID.GPIO_20VT
_GIO#42
SID.GPIO_20VT
_GIO#43
GPIO_20VT_IIL
GPIO_20VT_Voh
GPIO_20VT_Vol
GPIO_20VT_Vih_
LV TTL
GPIO_20VT_Vil_
LV TTL
GPIO_20VT_
Vhysttl
SID.GPIO_20VT
_GIO#45
GPIO_20VT_
ITOT_G PIO
GPIO OVT AC specifications
Min
3.5
3.5
–
GPIO_20VT output voltage high level
GPIO_20VT output voltage low level
GPIO_20VT LVTTL input
GPIO_20VT LVTTL input
GPIO_20VT input hysteresis LVTTL
GPIO_20VT maximum total sink pin current to ground
VDDD - 0.6
–
2
–
100
–
1
Typ
–
SID.GPIO_20VT_
GIO#46
SID.GPIO_20VT_
GIO#47
SID.GPIO_20VT_
GIO#48
GPIO_20VT_
TriseS
GPIO_20VT Rise time in Slow Strong Mode
1
10
10
–
SID.GPIO_20VT_
GIO #50
SID.GPIO_20VT_
GIO #52
GPIO_20VT_FGPIO
_OUT1
GPIO_20VT_FGPIO
_OUT3
GPIO_20VT_FGPIO
_IN
GPIO_20VT GPIO
Fout;
3V ≤ VDDD ≤ 5.5V.
Fast Strong mode.
GPIO_20VT GPIO Fout;
3V ≤ VDDD ≤ 5.5V.
Slow Strong mode.
GPIO_20VT GPIO input operating frequency;
3V ≤ VDDD ≤ 5.5V
–
7
8
15
15
70
70
2
10
–
0.6
–
0.8
–
95
Max
8.5
8.5
Unit k Ω
Details/
Conditions
–40°C ≤ TA ≤
+105°C, All VDDD
–40°C ≤ TA ≤
+105°C, All VDDD nA +25°C TA, 3V VDDD pF –40°C
≤ TA ≤
+105°C, All VDDD
IOH = -4mA
V
IOL = 8mA
–40°C ≤ TA ≤
+105°C, All VDDD
–40°C ≤ TA ≤
+105°C, All VDDD
≤ TA ≤
33 ns
MHz
All VDDD,
Cload = 25pF
All VDDD
Datasheet 16 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Electrical specifications
3.3.3
XRES and POR
All specifications are valid for -40°C TA 105°C and TJ 125°C, except where noted.
Table 7 XRES specifications
Typ Max Spec ID Parameter Description Min
XRES DC specifications
SID.XRES#1 V
IH_XRES
Input voltage HIGH threshold on XRES pin 0.7 × VDDD
SID.XRES#2
SID.XRES#3
V
C
IL_XRES
IN_XRES
Input voltage LOW threshold on XRES pin
Input capacitance on
XRES pin
SID.XRES#4 V
HYSXRES
Input voltage hysteresis on XRES pin
Imprecise POR (IPOR) specifications
–
SID185 V
RISEIPOR
POR rising trip voltage
SID186 V
FALLIPOR
POR falling trip voltage
Precise POR (POR) specifications
SID190 V
FALLPPOR
Brown-out detect
(BOD) trip voltage in active/sleep modes
SID192 V
FALLDPSLP
BOD trip voltage in
Deep Sleep mode
0.80
0.70
1.48
1.1
–
0.05 × VDDD
–
–
–
0.3 × VDDD
7
–
1.50
1.4
1.62
1.5
Unit
V CMOS input pF mV
V
V
–
Details/ conditions
-40°C < TA < +105°C, all VDDD
-40°C < TA < +105°C, all VDDD
Datasheet 17 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Electrical specifications
3.4.3
Table 10
Spec ID
SID.MEM#2
SID.MEM#1
SID.MEM#5
SID178
SID180
SID.MEM#6
SID182
3.4
Digital peripherals
All specifications are valid for -40°C TA 105°C and TJ 125°C, except where noted.
The following specifications apply to the Timer/counter/PWM peripherals in the Timer mode.
3.4.1
Inverter pulse-width modulation (PWM) for GPIO pins
Table 8 PWM AC specifications
Spec ID Parameter Description
SID.TCPWM.1 PWM_OUT Operating frequency
Min
85
Typ
127.7
Max
600
SID.TCPWM.3 T
PWMEXT
Output trigger pulse width
2/Fc – –
Unit Details/conditions kHz PWM_OUT pin ns
Minimum possible width of overflow, underflow, and CC
(counter equals compare value) outputs.
Fc = System clock.
3.4.2
I
2
C, UART, SWD interface
Table 9 Communication interface specifications
Spec ID Parameter
Fixed I 2 C AC specifications
SID153 F
I2C1
Fixed UART AC specifications
SID16 F
UART
SWD interface specifications
SID.SWD#1
SID.SWD#2
SID.SWD#3
SID.SWD#4
SID.SWD#5
F_SWDCLK1
T_SWDI_SETUP
T_SWDI_HOLD
T_SWDO_VALID
T_SWDO_HOLD
Bit rate
Bit rate
Description
3.0V ≤ VDDIO ≤ 5.5V
T = 1/f SWDCLK
Min
–
–
–
0.25 × T
0.25 × T
–
1
Typ
–
–
–
Max
1
1
14
–
–
0.50 × T
–
Unit
Mbps –
Mbps –
MHz – ns –
Details/conditions
SID182A
Memory
Flash AC specifications
Parameter
FLASH_WRITE
FLASH_ERASE
FLASH_ROW_
PGM
T
BULKERASE
T
DEVPROG
FLASH
ENPB
F
RET1
F
RET2
Description
Row (block) write time
(erase and program)
Row erase time
Row program time after erase
Bulk erase time (32KB)
Total device program time
Flash write endurance
Flash retention,
T
A
< 55°C, 100K P/E cycles
Flash retention,
T
A
< 85°C, 10K P/E cycles
Min
–
100k
20
10
Typ
–
7
35
7.5
Max
20
15.5
–
Unit ms
– s cycles 25°C < T
A
< 55°C years –
Details/conditions
Datasheet 18 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Electrical specifications
3.5
System resources
All specifications are valid for -40°C TA 105°C and TJ 125°C, except where noted.
3.5.1
Table 11
Internal main oscillator clock
IMO AC, clock specifications
Description Spec ID Parameter
IMO AC specifications
SID.CLK#13 F
IMOTOL
SID226
SID.CLK#1
T
STARTIMO
F
IMO
External clock specifications
Frequency variation at
48MHz (trimmed)
IMO start-up time
IMO frequency
Min Typ Max Unit
–2
–
24
–
+2
7
48
Details/ conditions
% 3.0V < VDDD < 5.5V
µs
MHz
–
SID.305
EXTCLKFREQ
External clock input frequency
– 48 – MHz
-40°C < T
A
< 105°C;
3.0 V < VDDD <
5.5V. Tolerance
50 ppm.
3.5.2
PD
Table 12
Spec ID
PD DC specifications
Parameter
SID.DC.cc_shvt.1
vSwing
SID.DC.cc_shvt.2
vSwing_low
SID.DC.cc_shvt.3
zDriver
SID.DC.cc_shvt.4
zBmcRx
SID.DC.cc_shvt.8
Rd
SID.DC.cc_shvt.10 zOPEN
Description
Transmitter output high voltage
Transmitter output low voltage
Transmitter output impedance
Receiver input impedance
Pull down termination resistance when acting as
UFP
CC impedance to ground when disabled
Min Typ Max Unit Details/conditions
1.05
1.2
V
– 0.075
33
10
4.59
108
–
75
–
5.61
–
M k
–
0.61
0.7
V
SID.DC.cc_shvt.16 UFP_1.5A_1p23
SID.DC.cc_shvt.17 Vattach_ds
SID.DC.cc_shvt.18 Rattach_ds
SID.DC.cc_shvt.19 VTX_step
CC voltages on UFP side-1.5A
Deep Sleep attach threshold
Deep Sleep pull-up resistor
TX drive voltage step size
1.16
0.3
10
80
1.31
0.6
50
120
% k mV
Datasheet 19 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Electrical specifications
3.5.3
ADC
All specifications are valid for -40°C TA 105°C and TJ 125°C, except where noted.
Table 13 ADC DC specifications
Spec ID
SID.ADC.1
SID.ADC.2
SID.ADC.3
SID.ADC.4
SID.ADC.5
SID.ADC.6
INL
DNL
Parameter
Resolution
Gain Error
VREF_ADC1
VREF_ADC2
Description
ADC resolution
Integral non-linearity
Differential non-linearity
Gain error
Reference voltage of
ADC
Reference voltage of
ADC
Min
–
-1.5
-2.5
-1.5
VDDDmin
1.96
Typ
8
–
2.0
Max
–
1.5
2.5
1.5
VDDDmax
2.04
Unit
Details/ conditions
Bits –
Reference voltage generated from bandgap
LSB
V
Reference voltage generated from
VDDD
Reference voltage generated from bandgap
Reference voltage generated from
VDDD
Reference voltage generated from deep sleep reference
3.5.4
Current sense amplifier (CSA) / ASK amplifier (ASK_P and ASK_N)
Table 14 CSA/ASK amplifier specifications
Spec ID Parameter
HS CSA DC specifications
Description
SID.HSCSA.7
SID.HSCSA.8
SID.HSCSA.9
Csa_SCP_Acc1
Csa_SCP_Acc2
Csa_OCP_1A
SID.HSCSA.10
Csa_OCP_5A
CSA short circuit protection (SCP) at 6A with
5/10/20m sense resistor
CSA SCP at 10A with
5/10/20m sense resistor
CSA OCP at 1A with
5/10/20m sense resistor
CSA OCP for 5A with
5/10/20m sense resistor
Min Typ Max Unit
-10
-10
–
10
10
104 130 156
117 130 143
%
Details/conditions
Active mode
SID.HSCSA.13
Csa_CBL_MON_Acc2 Vsense > 10mV – 3.5
–
CSA sense accuracy.
Active mode.
3.0 V < VDDD < 5.5 V.
T
A
= 25°C.
CSA AC specifications
SID.HSCSA.AC.1 T
SCP_GATE
SID.HSCSA.AC.2 T
SCP_GATE_1
Delay from SCP threshold trip to external NFET power gate turn off
Delay from SCP threshold trip to external NFET power gate turn off
–
3.5
8
– µs
1 nF NFET gate
3 nF NFET gate
Datasheet 20 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Electrical specifications
3.5.5
VIN UV/OV
All specifications are valid for -40°C TA 105°C and TJ 125°C, except where noted.
Table 15
Spec ID
SID.UVOV.1
SID.UVOV.2
SID.UVOV.3
SID.UVOV.4
SID.UVOV.5
VIN UV/OV specifications
Parameter
VTHOV1
VTHOV2
VTHUV1
VTHUV2
VTHUV3
Description
Overvoltage threshold accuracy, 4V-11V
Overvoltage threshold accuracy, 11V-21.5V
Undervoltage threshold accuracy, 3V-3.3V
Undervoltage threshold accuracy, 3.3V-4.0V
Undervoltage threshold accuracy, 4.0V-21.5V
Min Typ Max Unit Details/conditions
-3
-3.2
-4
-3.5
-3
–
3
3.2
4
3.5
3
% Active mode
3.5.6
Voltage regulation - VBRG
Table 16 VBRG specifications
Spec ID Parameter
VBRG discharge specifications
SID.VBUS.DISC.1 R_DIS1
Description
20V NMOS ON resistance for
DS = 1
SID. VBUS.DISC.2 R_DIS 2
20V NMOS ON resistance for
DS = 2
SID. VBUS.DISC.3 R_DIS 4
SID. VBUS.DISC.4 R_DIS 8
SID. VBUS DISC.5 R_DIS 16
20V NMOS ON resistance for
DS = 4
20V NMOS ON resistance for
DS = 8
20V NMOS ON resistance for
DS = 16
Min Typ Max Unit Details/conditions
500
250
125
62.5
31.25
–
2000
1000
500
250
125
Ω Measured at 0.5V
– 10 %
When VBRG is discharged to 5V
Voltage regulation DC specifications
SID.DC.VR.1
VBB VBB output voltage range
SID.DC.VR.2
VR VBB voltage regulation accuracy
SID.DC.VR.3
VIN_UVLO
VIN supply below which chip will get reset
SID.VREG.1
TSTART
Total startup time for the regulator supply outputs
3.0
-5
1.7
–
–
±3
–
22
+5
3.0
V
%
V
200 µs
–
Specification for
VDDD LDO
Datasheet 21 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Electrical specifications
3.5.7
NFET gate driver specifications
All specifications are valid for -40°C TA 105°C and TJ 125°C, except where noted.
Table 17 NFET gate driver specifications
Spec ID Parameter
NFET gate driver DC specifications
Description
SID.GD.1
GD_VGS
Gate to source overdrive during
ON condition
Min Typ Max Unit Details/conditions
4.5
5 10 V NFET driver is ON
SID.GD.2
GD_RPD
Resistance when pull-down enabled
– – 2 k Ω
Applicable on
NFET_CTRL to turn off external NFET.
NFET gate driver AC specifications
SID.GD.3
SID.GD.4
T
ON
T
OFF
NFET_CTRL Low to High
(1V to VBUS + 1V) with 3nF external capacitance.
NFET_CTRL High to Low
(90% to 10%) with 3nF external capacitance.
2
–
5
7
10 ms VBUS = 5V
– µs VBUS = 21.5V
3.5.8
Buck PWM controller
Table 18 PWM controller specifications
Spec ID Parameter
PWM controller specifications
PWM.1
F SW
Description
Buck switching frequency
Min Typ Max Unit Details/conditions
150 – 600
GD1 Fsw Gd Ovr
PWM.2
FSS
Buck gate driver specifications
DR.1
R_HS_PU
Inverter switching frequency
Spread spectrum frequency dithering span
85
– 10
2
600
– kHz
–
Pins PWM_IN1 and
PWM_IN2 are connected to pin
PWM_OUT.
% –
DR.2
DR.3
DR.4
DR.5
R_HS_PD
R_LS_PU
R_LS_PD
Dead_HS
DR.6
Dead_LS
DR.7
DR.8
Tr_HS
Tf_HS
NFET gate driver specifications
DR.9
Tr_LS
DR.10
Tf_LS
Top-side gate driver on-resistance - gate pull-up
Top-side gate driver on-resistance - gate pull-down
Bottom-side gate driver on-resistance - gate pull-up
Bottom-side gate driver on-resistance - gate pull-down
Dead time before high-side rising edge
Dead time before low-side rising edge
Top-side gate driver rise time
Top-side gate driver fall time
Bottom-side gate driver rise time
Bottom-side gate driver fall time
–
–
1.5
2
1.5
30
30
25
20
25
20
–
–
Ω ns
– ns –
Datasheet 22 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Electrical specifications
3.5.9
Thermal
All specifications are valid for -40°C TA 105°C and TJ 125°C, except where noted.
Table 19
Spec ID
SID.OTP.1
Thermal specifications
OTP
Parameter Description
Thermal shutdown
Min Typ Max Unit Details/conditions
120 125 130 °C –
Datasheet 23 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Functional overview
4 Functional overview
4.1
Wireless power transmitter
WLC1115 supports wireless power transfer between power transmitter (TX) and power receiver (RX), based on inductive power transfer technology (IPT). The Tx runs an alternating electrical current through the Tx coil(s) to generate an alternating magnetic field in accordance with Faraday's law. This magnetic field is mutually coupled to the Rx coil inside the power receiver and is transformed back into an alternating electrical current that is rectified and stored on a Vrect capacitor bank to power the Rx load.
Before the power transfer begins, the Rx and Tx communicate with each other to establish that a valid Rx device has been placed and they negotiate the level of power to be transferred during the charging cycle. The digital communication used by Tx and Rx is in-band communication. The communication from Tx to Rx is frequency shift key (FSK) modulation and from Rx to Tx is amplitude shift key (ASK) modulation. The WLC1115 solution is compliant with the Qi v1.3.x standard up to 15W. The WLC1115 operates in both BPP or EPP depending on the capabilities of the Rx that gets placed by the user.
WLC1115 offers a highly integrated wireless power transmitter solution with a USB Type-C PD controller following the Qi v1.3.x standard. This includes ready to use firmware stack with a robust demodulation scheme for continuous power transfer and reliable FOD to ensure safety. WLC1115 firmware stack comes with a high level of configurable options to enable differentiation by application using the configuration utility tool.
4.2
WPC system control
WLC1115 controls the wireless power system in compliance with Qi standard version 1.3.x. The system control covers power transfer, system monitoring, and various phases of operation under BPP or EPP receivers depending on the Rx type placed onto the Tx pad.
Error
Error
No
Response or
No power nedded
Selection
Object
Detected
Start
Ping
Receiver
Present
Identification
&
Configuration
Negotiation
Failure
Or
Error
Negotiation
Requested
Negotiation
No Negotiation
Requested
(<5W PRx)
Power Transfer
Complete
Or
Error
Figure 4
Negotiation
Successful
Calibration
Calibration
Successful
Calibration
Failure
Or
Error
Power Transfer
Limited to 5W
No Is
Authentication
Required
Yes
Is
Authentication
Challenge
Succesful
Yes
No
Renegotiation
Requested
Renegotiation
Power Transfer
As per Negotiation
Renegotiation
Completed
WPC system control flow chart (negotiation, calibration and authentication are for EPP only)
Note
9. The
section only describes the Qi specification. However, IC can support wireless charging proprietary power delivery extensions (PPDE)/Samsung FC.
Datasheet 24 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
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Functional overview
4.2.1
Selection phase
The Tx monitors the interface surface using low energy signals (analog ping or Q-factor) to detect objects' placement and removal. The Analog Ping energy is limited such that impedance changes above the Tx coil may be detected without powering or waking up the receiver. The WLC1115 sets the Bridge (VBRG) voltage powering the inverter to a low voltage to generate sufficient energy to measure for any interface impedance changes without transferring any power during the selection phase.
4.2.2
Digital ping phase
In this phase, the Tx sends a power signal that is sufficient to power the receiver and prompt a response. This signal is called Digital Ping and the magnitude and length of time are predefined by the WPC Tx specifications.
The Digital Ping phase ends when no response is detected or the Rx responds with a signal strength packet (SSP).
When the Tx receives a valid SSP, the Digital Ping is extended and the system proceeds to the Identification and
Configuration phase.
4.2.3
Identification and configuration phase
In this phase, the Tx identifies whether the Rx belongs to BPP or EPP profile. Additionally, in this phase, the Tx obtains configuration information such as the maximum amount of power that the Rx may require at its output.
The power transmitter uses this information to create a Power Transfer Contract.
If the receiver is a BPP type then the power transmitter enters into the power transfer phase at the completion of
the ID and Config phase as shown in Figure 8
or with EPP receivers it proceeds to the negotiation phase if requested by the Rx.
4.2.4
Negotiation
In this phase, the EPP power receiver negotiates with the power transmitter to fine-tune the power transfer contract. For this purpose, the power receiver sends negotiation requests to the power transmitter, which the power transmitter can grant or deny.
In compliance with Q-factor FOD, the Tx will compare the Q-factor reported by the Rx with its own measurement to determine if the Q-factor of the coil is appropriate for the Rx that has been placed (EPP only). If the Tx Q-factor reading is too low it will flag a QFOD alarm and return to the selection phase.
4.2.5
Calibration
When this phase is requested, the Tx will ACK the request and commence with the EPP Rx to enable and enter the calibration phase to calibrate for transmitter power losses at two fixed receiver loads. This system’s power loss information will be used by the Tx to detect the presence of foreign objects on the interface surface during the power delivery phase.
4.2.6
Authentication
Post successful calibration, Tx enters into power transfer mode limited to 5W. In this mode, Rx can request and challenge Tx for authentication. In case of successful authentication, Tx proceeds with negotiated power delivery. If authentication challenge is not successful then Tx continues to be in power transfer mode, limited to
5W. WLC1115 provides an I 2 C port for interfacing with OPTGA ™ Trust Charge IC to enable authentication.
4.2.7
Renegotiation phase
In this phase, the EPP Rx can request to adjust the power transfer contract. This phase may be aborted prematurely without changing the power transfer contract.
Datasheet 25 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
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Functional overview
4.2.8
Power transfer phase
In this phase, the Tx transfers power to the Rx and the power level is determined by the control error packets
(CEP) and limited by the guaranteed power contract. Power loss FOD is also enabled and utilized to prevent excessive power loss which could result in FO heating.
1. CEP: These packets are used by the Tx to adjust the amount of power being sent. The CEP may be positive, negative, or 0. The Tx adjusts its operating point based on the value of the CEP. The CEP packet must be received every 1.8s (configurable) or power will be withdrawn along with other constraints that specify when a CEP may be sent by the Rx as defined in the WPC specifications.
2. Received power packet (RPP): The packet (8 bits for BPP and 24 bits for EPP) contains power received by receiver. The RPP is used by the Tx to determine if the power loss is safe or excessive based on the FOD thresholds contained in the FW.
3. End power transmit (EPT): The Rx may send an EPT packet anytime to inform Tx to withdraw/terminate the power delivery. The Tx will end the power transfer immediately if an EPT packet is received.
The Rx and Tx communicate with each other by modulating the carrier wave used to transfer power. The following sections describe the communication layer used and defined by the WPC.
4.2.9
Bidirectional in-band communication interface
The Qi standard requires bi-directional in-band communication between Tx and Rx. The communication from Tx to Rx is FSK and is implemented by the Tx alternating the carrier wave frequency. The communication from Rx to
Tx is ASK and is created by modulating the load on the Rx side causing a reflection to appear on the Tx which is filtered and decoded.
4.3
Communication from Tx to Rx - FSK
The power transmitter communicates to the power receiver using frequency shift keying, in which the power transmitter modulates the operating frequency of the power signal.
In FSK, the Tx changes its operating frequency between the current operating frequency (f frequency (f
OP
) to an alternate
) in the modulated state. The difference between these two frequencies is characterized by two parameters that are determined during the initial ID and config stage of the wireless power connection:
• Polarity: This parameter determines whether the difference between f
MOD
and f
OP
is positive or negative.
• Depth: This parameter determines the magnitude of the difference between f
OP
and f
MOD
in Hertz (Hz).
The Tx uses a differential bi-phase encoding scheme to modulate data bits to the carrier wave. For this purpose, the Tx aligns each data bit to segments of 512 cycles of the carrier wave frequency.
Figure 5 Example of differential bi-phase encoding - FSK
Datasheet 26 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
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Functional overview
4.4
Communication from Rx to Tx - ASK
In the ASK communication scheme, the Rx modulates the amount of power that it draws from the Tx power signal.
The Tx detects this through as a modulation of the Tx current and/or voltage and uses a demodulation scheme to convert the modulated signal into a binary signal.
The Rx shall use a differential bi-phase encoding scheme to modulate data bits onto the power signal. For this purpose, the power receiver shall align each data bit to a full period t
CLK
of an internal clock signal, such that the start of a data bit coincides with the rising edge of the clock signal. This internal clock (INTCLK) signal shall have a frequency fCLK = 2kHz 4%. tCLK is time period of the INTCLK clock.
Figure 6 Example of differential bi-phase encoding - ASK
When the Tx receives a modulated signal from the Rx the information is decoded and the Tx will react to the packet according to the type and the WPC specification.
4.5
Demodulation
The WLC1115 ASK demodulating and decoding scheme works by detecting voltage and current variations in the
Tx coil caused by the Rx modulation signal. The voltage path for ASK uses an external band pass filter to filter the demod signal out of the carrier wave. The current sense uses the bridge current sense resistor and an integrated differential amplifier to sense the ASK variations. Both ASK sensing paths can be multiplexed to the external
Opamp filter and comparator to improve communication in low signal-to-noise environments or conditions.
shows the demodulation path used for current and voltage sensing of the modulation signal for packet decoding.
COIL‐SNS
Low pass &
Peak detector
High pass filter
5V
ASK_P
ASK_N
ASK_AMP
Volt Path
CSPO_0
CSNO_0
ASK_AMP
Current
Path
ASK_OUT Pulse amplifier
WLC1115 voltage and current demodulation path for ASK
Comparator
ASK_DEMOD
Figure 7
4.6
Inverter
The WLC1115 uses the integrated buck controller to generate the bridge voltage used to power the full-bridge inverter that powers the Tx resonance tank to deliver power to the Rx. The inverter supports a wide input operating voltage range (3V to 22V) for power transfer. The integrated gate drivers of the WLC1115 are designed to control a full bridge or half-bridge Inverter depending on the WPC specification type and operating scenario.
The inverter is capable of operating at switching frequencies between 85kHz and 600kHz but are typically limited to 110kHz to 148kHz. During the power transfer phase, the inverter responds to Rx CEP packets by adjusting the operating frequency or adjusting the bridge voltage. The power control method (variable voltage or variable frequency) is determined by the WPC specification but may be altered in order to promote better interoperability and user experience.
Datasheet 27 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
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Functional overview
4.7
Rx detection
During the selection phase, the Tx will periodically poll the interface to detect impedance changes in order to quickly send a Digital Ping within 0.5s of a user placing an Rx. During this phase, the WLC1115 is able to distinguish between large ferrous objects (such as keys or coins) and regular Rx devices using Q factor, input current, or shifts in resonance frequency to attempt FOD before power transfer. In case of marginally high input current or resonance shifts, the Tx will commence to Digital Ping in order to guarantee a connection with a valid Rx is made in a timely manner. The typical sequence of operations used to scan the interface for Rx placement (or removal if an EPT is received during power transfer) is shown in
.
0 time (s)
APING
Interval (s)
DPING
Interval (s)
Typical selection phase Rx detection timing diagram Figure 8
describes the process used during the selection phase for quick Rx detection and connection.
Yes
Tx
Power up
Run Q‐ factor and
DPING
Rx
Detected?
Goto
APING
@interval
Object
Detected?
DPING interval?
Yes
Go to power
XFER
Typical selection phase flow chart for Rx detection and connection
No
Figure 9
factor. In case of foreign object detection, the process flow proceeds to analog ping (APNG). Further details about
foreign object detection is covered in “Foreign object detection (FOD)” on page 29.
Datasheet 28 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
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Functional overview
4.7.1
Foreign object detection (FOD)
WLC1115 supports enhanced FOD as per Qi v1.3.x standard. This includes FOD based on Q factor, resonance frequency, power loss, and over temperature (if a thermistor is used).
4.7.2
Q factor FOD and Resonance Frequency FOD
WLC1115 offers integrated Q factor and resonance frequency measurements for QFOD pre-power delivery. The measurements are made using the internal comparators QCOMP1 and QCOMP2 and the simple external components to charge the resonance capacitor and then discharge by shorting the LC tank and observing the resulting oscillation and voltage decay. The measurement of the Q factor is performed directly before every digital ping. The number of cycle count ‘N’ between two coil voltages V1 and V2 and period between corresponding rising edge pulses are used for Q factor and resonance frequency measurement as shown in
.
V1
V2
SW1_1
Cp
COIL‐SNS
Lp
SW2_1
VDDD
C1
R1
R2
Q_COMP
C2
T_period
Figure 10
Resonance Frequency = 1 / T_period
WLC1115 Q factor measurement schematic and signal
4.7.3
Power loss FOD
WLC1115 supports power loss FOD during power transfer. The power loss FOD uses the Tx power measured at the buck output and is the product of the bridge voltage and the bridge current (current is sensed at inputs
CSPO_0 and CSNO_0). This result for Tx power is further adjusted by tuning FOD coefficients to account for inverter losses and friendly metal losses. After computing the calibrated Tx power the result is compared against the latest RPP value sent by the Rx. If the difference between Tx_Power_Calibrated and RPP exceeds the Ploss threshold then an FOD event is logged. To prevent erroneous disconnects and improve user experience the
WLC1115 will only disconnect the power for Ploss FOD in the event that three consecutive Ploss threshold breaches occur. The FOD coefficients and the Ploss thresholds are configurable to adapt to the system design.
4.7.4
Over temperature FOD
The WLC1115 is able to monitor interface temperature if an external NTC thermistor is connected and placed in contact with the Tx coil. This can be enabled to disconnect the Tx from the Rx in the event that the Tx coil temperature exceeds a configurable threshold.
Datasheet 29 of 40 002-34241 Rev. *B
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Wireless charging IC (WLC) - Transmitter 15W with integrated
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Functional overview
4.7.5
Buck regulator
The buck regulator powers the inverter at the input node VBRG to enable power transfer per Qi. The buck regulator of WLC1115 requires input and output bypass capacitors as well as two FETs and an inductor. The
necessary external components and connections are shown in Figure 11
. The buck also offers current protection using a cycle-by-cycle current sense amplifier connected across resistance CSR1, integrated high and low side gate drivers, and automatic PWM generation for output voltage control. The effective capacitance and inductor have been deliberately selected to optimize buck performance and any substitutions should be made using equivalent components as those found in the reference schematic and using hardware design guidelines.
USB
PD
5 m
CSR1
VDDD
VBRG
5/10/20 m
CSR2
VBB_1
VDDD
WLC1115
Figure 11 WLC1115 typical buck regulator schematic for VBRG generation
The WLC1115’s buck controller provides two N-channel MOSFET gate drivers: complete with a floating high-side gate driver via HG1_0 and a ground-referenced low-side driver via LG1_0 pins. The gate drivers are powered by
VDDD and are a nominal voltage of 5 V. The Buck regulator switching frequency is programmable and can be set between 150kHz and 600kHz. In order to prevent EMI related issue’s gate drivers, have programmable drive strength, dead-time, and can be run in a dithering mode to spread the radiated spectrum energy levels. An external capacitor and Schottky diode from the BST1_0 pin are used for the high-side gate drive power supply.
Furthermore, the high and low-side gate driver blocks include zero-crossing detector (ZCD) to implement discontinuous-conduction mode (DCM) mode with diode emulation.
The WLC1115’s buck controller uses an integrated error amplifier for output voltage regulation. The error amplifier is a trans-conductance type amplifier with a single compensation pin (COMP_0) which requires the RC filter shown in the reference schematic to be connected from this pin to GND.
The WLC1115 supports high-voltage (22V) VBRG discharge circuitry and upon detection of device disconnection, faults, or hard resets, the chip may discharge the VBRG node to vSafe5V and/or vSafe0V within the time limits specified in the USB PD specification.
Datasheet 30 of 40 002-34241 Rev. *B
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Wireless charging IC (WLC) - Transmitter 15W with integrated
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Functional overview
4.8
Buck operating modes
4.8.1
Pulse-width modulator (PWM)
The WLC1115 has a PWM generator to control the external FETs using the integrated gate drivers in peak current mode control. This is the primary operating mode when the buck is loaded by the inverter and power transfer is in progress.
4.8.2
Pulse skipping mode (PSM)
The WLC1115 buck has two firmware-selectable operating modes to optimize efficiency and reduce losses under light load conditions: Pulse-skipping mode (PSM) and forced-continuous-conduction mode (FCCM). In PSM, the controller reduces the total number of switching pulses without reducing the active switching frequency by working in “bursts” of normal nominal-frequency switching interspersed with intervals without switching. The output voltage thus increases during a switching burst and decreases during a quiet interval. This mode results in minimal losses with a tradeoff of having higher output voltage ripple. When in this mode, WLC1115 devices monitor the voltage across the buck sync FET to detect when the inductor current reaches zero; when this occurs, the WLC1115 devices switch off the buck sync FET to prevent reverse current flow from the output capacitors (i.e. diode emulation mode).
4.8.3
Forced-continuous-conduction mode (FCCM)
In forced-continuous-conduction mode (FCCM), the nominal switching frequency is maintained at all times, with the inductor current going below zero (i.e. “backwards” or from the output to the input) for a portion of the switching cycle as necessary to maintain the output voltage and current. This keeps the output voltage ripple to a minimum at the cost of light-load efficiency.
4.8.4
Overvoltage protection (OVP)
The WLC1115 offers two types of overvoltage protections. The device monitors and limits VIN and VBRG. In case of a USB VIN overvoltage event detected, WLC1115 can be configured to shutdown the Type-C port completely.
In case of VBRG over voltage events, the buck regulator is immediately shut down. The IC can be re-enabled after a physical disconnect and reconnect. The over-voltage fault thresholds are configurable.
4.8.5
Overcurrent protection (OCP)
The WLC1115 protects the inverter from over-current and short-circuit faults by monitoring the bridge current and continuously inspecting for over-current events using the internal CSAs that check the voltage on the current sense resistor. Similar to OVP, the OCP and SCP fault thresholds and response times are configurable as well. The
IC can be re-enabled after a physical disconnect and reconnect.
4.8.6
USB-PD controller
The WLC1115 interfaces directly to Type-C USB power supplies and travel adaptors (TA). The WLC1115 manages the incoming power supply throughout operation using the D+, D-, and CC lines. The WLC1115 manages the
USB-PD physical communication layer, the VCONN switches, as well as monitoring to prevent under-voltage events caused by drawing too much power from the supply. The WLC1115 offers all the necessary electrical controls to be fully compliant with revisions 3.0 and 2.0 of the USB-PD specification and includes SCP.
The USB-PD physical layer consists of the power transmitter and power receiver that communicates BMC encoded data over the CC channel per the PD 3.0 standard. All communication is half-duplex. The physical layer or PHY includes collision avoidance to minimize communication errors on the channel. The WLC1115 uses the RP and RD resistors to implement connection detection and plug orientation detection. The RD resistor establishes the role of the transmitter system as a USB sink. The device supports PPS operation at all valid voltages from 3V to 22V when connected to a power adaptor.
Further, the WLC1115 device supports USB-PD extended messages containing data of up to 260 bytes by implementing a chunking mechanism; messages are limited to revision 2.0 sizes unless both source and sink confirm and negotiate compatibility with longer message lengths.
Datasheet 31 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
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Functional overview
The WLC1115 USB controller also supports battery charger emulation and detection (source and sink) for USB legacy QC 2.0/3.0 & AFC protocols.
4.8.7
MCU
The Cortex®-M0 in WLC1115 device is a 32-bit MCU, which is optimized for low-power operation with extensive clock gating. The device utilizes an interrupt controller (the NVIC block) with 32 interrupt inputs and a wakeup interrupt controller (WIC), which can wake the processor up from Deep Sleep mode. Additionally, the WLC1115 device has 128-KB Flash and 32-KB ROM for nonvolatile storage. ROM stores libraries for device drivers such as
I 2 C, SPI, and so on. The main wireless power firmware is stored in Flash memory to provide the flexibility to store code for all wireless power features, enable the use of configuration tables, and allow firmware upgrades to meet the latest USBPD specifications and application requirements. The device may be reset anytime by toggling the
XRES pin to force a full hardware and software reset.
The WLC1115 devices support external clock (EXTCLK) or INTCLK for the MCU and all internal sub-systems that require clocks. To use the internal clock, float the CLK_IN pin. To use the optional external clock, provide a single ended clock to the CLK_IN pin oscillating at 48MHz.
The TCPWM block of the WLC1115 device has four timers, counters, or PWM (TCPWM) generators. These timers are used by FW to run the wireless power Tx system as required by WPC and USB compliance directives. The
WLC1115 device also has a watchdog timer (WDT) that can be used by FW for various timeout events.
4.8.8
ADC
The WLC1115 device has 8-bit SAR ADCs available for general purpose analog-to-digital conversion applications within the chip and system. The ADCs are accessed from the GPIOs or directly on power supply pins through an
4.8.9
Serial communications block (SCB)
The WLC1115 devices have four SCB blocks that can be configured for I full multi-master and slave I 2
2 C, SPI, or UART. These blocks implement
C interfaces capable of multi-master arbitration. I 2 C is compatible with the standard
Philips I2C specification V3.0. These blocks operate at speeds of up to 1Mbps and have flexible buffering options to reduce interrupt overhead and latency for the CPU. The SCB blocks support 8-byte deep FIFOs for Receive and
Transmit to decrease the time needed to interface by the MCU also reducing the need for clock stretching caused by the CPU not having read data on time.
4.8.10
I/O subsystem
The WLC1115 devices have 13 GPIOs but many of them have dedicated functions for 15W MP-A11 applications such as I2C comm, LED and temperature sensing in the wireless power application and cannot be repurposed.
The GPIOs output states have integrated controls modes that can be enabled by FW which include: weak pull-up with strong pull-down, strong pull-up with weak pull-down, open drain with strong pull-down, open drain with strong pull-up, strong pull-up with strong pull-down, disabled, or weak pull-up with weak pull-down and offer selectable slew rates for dV/dt output control. When GPIOs are used as inputs they can be configured to support different input thresholds (CMOS or LVTTL).
During POR, the GPIO blocks are forced to the disable state preventing any excess currents from flowing.
4.8.11
LDOs (VDDD and VCCD)
The WLC1115 has two integrated LDO regulators. The VDDD LDO is powered by VIN and provides 5V for the GPIOs, gate drivers, and other internal blocks. The total load on VDDD LDO must be less than 150mA including internal consumption. VDDD LDO will be externally loaded as shown in the reference schematic. For connecting any additional external load on it, contact Infineon technical support. The VDDD 5V supply is externally routed to various pins and they should all be externally shorted together. The VCCD LDO is a 1.8V LDO regulator and is powered by VDDD. Do not externally load VCCD. Both LDOs must have ceramic bypass capacitors placed from each pin to ground close to the WLC1115 device.
Datasheet 32 of 40 002-34241 Rev. *B
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Programming the WLC1115 device
5 Programming the WLC1115 device
There are two ways to program application firmware into a WLC1115 device:
1. Programming the device flash over SWD Interface
2. Application firmware update over specific interfaces (CC, I 2 C)
Generally, the WLC1115 devices are programmed over the SWD interface only during development or during the manufacturing process of the end-product. Once the end-product is manufactured, the WLC1115 device application firmware can be updated via the appropriate bootloader interface. Infineon strongly recommends customers to use the configuration utility to turn off the Application FW Update over CC or I 2 C interface in the firmware that is updated into WLC1115’s flash before mass production. This prevents unauthorized firmware from being updated over the CC interface in the field. If you desire to retain the application firmware update over
CC/I 2 C interfaces features post-production for on-field firmware updates, contact your local Infineon sales representative for further guidelines.
5.1
Programming the device Flash over SWD interface
The WLC1115 family of devices can be programmed using the SWD interface. Infineon provides the MiniProg4 programming kit ( CY8CKIT-005 MiniProg4 Kit ) which can be used to program the flash and debug firmware. The
Flash is programmed by downloading the information from a hex file.
As shown in
Figure 12 , the SWD_DAT and SWD_CLK pins are connected to the host programmer’s SWDIO (data)
and SWDCLK (clock) pins respectively. During SWD programming, the device can be powered by the host programmer by connecting its VTARG (power supply to the target device) to the VDDD pins of the WLC1115 device.
If the WLC1115 device is powered using an onboard power supply, it can be programmed using the “Reset
Programming” option. For more details, refer the WLCXXXX programming specification.
VDD
Host Programmer
VTRAG
Figure 12
VDDD
0.1 uF 1 uF
SWDCLK
SWDIO
XRES
GND
SWD_CLK
SWD_DAT
XRES
GND
GND
Connecting the programmer to WLC1115
WLC1115
VDDD
V CCD
0.1 uF 10uF
0.1 uF
Datasheet 33 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
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Ordering information
6 Ordering information
lists the WLC1115 ordering part numbers and applications.
Table 20 WLC1115 ordering part numbers
MPN
WLC1115-68LQXQ
WLC1115-68LQXQT
Power
15W
Application
Qi v1.3.x EPP Tx
Qi v1.3.x EPP Tx - Tape and reel option
6.1
Ordering code definitions
WLC X X XX -- XX XX X X X
T: Tape and reel (Optional)
Grade/temperature range: Q = Extended industrial grade (–40°C to + 105°C)
Lead: X = Pb-free
Package type: LQ = QFN
Number of pins in the package
Wattage: 15 = 15W;
Type-: 1 = Tx, 2 = Rx, 3 = Tx-Rx , 4 = Custom
Product type: 1 = First-Generation product family
Marketing code: WLC = Wireless Charging
Datasheet 34 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Packaging
7
Table 21
Parameter
T
J
T JA
T JB
T JC
Packaging
Package characteristics
Description
Operating junction temperature
Package JA
Package JB
Package JC
–
Test conditions Min
-40
–
Typ
25
–
Max
125
14.8
4.3
12.9
Table 22
Table 23
Solder reflow peak temperature
Package
68-pin QFN
Maximum peak temperature
260°C
Maximum time within 5°C of peak temperature
30 seconds
Package moisture sensitivity level (MSL), IPC/JEDEC J-STD-2
Package
68-pin QFN
MSL
MSL 3
Unit
°C
°C/W
Datasheet 35 of 40 002-34241 Rev. *B
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Wireless charging IC (WLC) - Transmitter 15W with integrated
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Package diagram
8 Package diagram
SYMBOL e
N
ND
L b
D2
E2
D
E
A
A1
A3 (Option 1)
A3 (Option 2)
R
K
MIN.
0.30
0.15
5.60
5.60
-
0.00
DIMENSIONS
NOM.
0.40 BSC
68
17
0.40
0.20
5.70
5.70
8.00 BSC
8.00 BSC
-
-
0.203 REF
0.152 REF
0.20 TYP
0.75 MIN
MAX.
0.50
0.25
5.80
5.80
0.65
0.05
NOTES:
1.
ALL DIMENSIONS ARE IN MILLIMETERS.
2.
N IS THE TOTAL NUMBER OF TERMINALS.
3 DIMENSION "b" APPLIES TO METALLIZED TERMINAL AND IS MEASURED
BETWEEN 0.15 AND 0.30mm FROM TERMINAL TIP. IF THE TERMINAL HAS
THE OPTIONAL RADIUS ON THE OTHER END OF THE TERMINAL, THE
4
DIMENSION "b" SHOULD NOT BE MEASURED IN THAT RADIUS AREA.
ND REFERS TO THE NUMBER OF TERMINALS ON D SIDE.
5
6
PIN #1 ID ON TOP WILL BE LOCATED WITHIN THE INDICATED ZONE.
COPLANARITY ZONE APPLIES TO THE EXPOSED HEAT SINK
SLUG AS WELL AS THE TERMINALS.
7.
JEDEC SPECIFICATION NO. REF. : N/A.
8.
INDEX FEATURE CAN EITHER BE AN OPTION 1 : "MOUSE BITE" OR
OPTION 2 : CHAMFER.
002-31802 *C
Figure 13 68LD QFN (8 8) device package drawing
Datasheet 36 of 40 002-34241 Rev. *B
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Wireless charging IC (WLC) - Transmitter 15W with integrated
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Acronyms
9
Table 24
EA
EPP
EPT
ESD
CEP
CC
CSA
DCM
FET
FCCM
Acronym
ACK
ADC
Arm®
ASK
BPP
BMC
FOD
I
HS
2
C
IC
IMO
IPT
LDO
MCU
NTC
FO
FSK
FW
GPIO
HBM
NVIC
OCP
Opamp
OTP
OV
OVP
PCB
PD
Acronyms
Acronyms used in this document
Description
Acknowledge
Analog-to-digital converter
Advanced RISC machine, a CPU architecture
Amplitude shift key
Basic power profile
BiPhase mark code
Control error packet
Configuration channel
Current sense amplifier
Discontinuous-conduction mode
Error amplifier
Extended power profile
End power transfer
Electrostatic discharge
Field effect transistor
Forced-continuous-conduction mode
Foreign object detection
Foreign object
Frequency shift key
Firmware
General-purpose I/O
Human body model
High speed
Inter-integrated circuit
Integrated circuit
Internal main oscillator
Inductive power transfer technology
Linear drop out
Microcontroller unit
Negative temperature coefficient
Nested vectored interrupt controller
Overcurrent protection
Operational amplifier
Over temperature protection
Overvoltage
Overvoltage protection
Printed circuit board
Power delivery
UART
UFP
USB
UV
WDT
WIC
WPC
ZCD
RPP
RCP
Rx
SAR
SCP
SPI
SSP
SWD
TCPWM
Tx
Acronym
POR
PPDE
PPS
PSM
PWM
QFOD
Description
Power-on reset proprietary power delivery extensions
Programmable power supply
Pulse-skipping mode
Pulse-width modulator
Q factor FOD
Received power packet
Reverse current protection
Power receiver
Successive approximation register
Short circuit protection
Serial peripheral interface
Signal strength packet
Serial wire debug, a test protocol
Timer/counter pulse-width modulation
Power transmitter
Universal asynchronous receiver transmitter
Upstream facing port
Universal serial bus
Undervoltage
Watchdog timer
Wakeup interrupt controller
Wireless power consortium
Zero-crossing detector
Datasheet 37 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Document conventions
10
s
V
% pF
W
10.1
Table 25 nA ns nV
mA mm ms mV
µH
µs
µV
µW
MHz
M
µA
µF
Symbol
°C
Hz
KB kHz k
LSB
Document conventions
Units of measure
Units of measure milliampere millimeter millisecond millivolt nanoampere nanosecond nanovolt ohm percent picofarad second volt watt
Unit of measure degree Celsius hertz
1024 bytes kilohertz kilo ohm least significant bit megahertz mega-ohm microampere microfarad microhenry microsecond microvolt microwatt
Datasheet 38 of 40 002-34241 Rev. *B
2022-04-22
Wireless charging IC (WLC) - Transmitter 15W with integrated
USB Type-C PD controller
Revision history
Revision history
Document version
*B
Date of release
2022-04-22 Publish to web.
Description of changes
Datasheet 39 of 40 002-34241 Rev. *B
2022-04-22
Please read the Important Notice and Warnings at the end of this document
Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2022-04-22
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2022 Infineon Technologies AG.
All Rights Reserved.
Do you have a question about this document?
Go to www.infineon.com/support
Document reference
002-34241 Rev. *B
IMPORTANT NOTICE
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”).
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office
( www.infineon.com
).
With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon
Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party.
WARNINGS
Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon
Technologies office.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications.
Except as otherwise explicitly approved by Infineon
Technologies in a written document signed by authorized representatives of Infineon
Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application.
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