XDAS-V2 user manual

SENS - TECH
SENSOR TECHNOLOGIES
XDAS-V2
X-ray data acquisition
system
Sens-Tech Limited
6A Langley Business Centre
Station Road, Langley, Berkshire
SL3 8DS. UK
tel:
+44 (0) 1753 214714
fax:
+44 (0) 1753 214715
email: info@sens-tech.co.uk
www.sens-tech.com
registered in England 668759
an ISO 9001 registered company
© Sens-Tech Limited, 2007
the contents may not be copied or disclosed to any
unauthorised third party without written permission
user manual
XDAS-V2 X-ray data acquisition system
XDAS-V2 User Manual
Issue 1, 23 October 2007
page 1 of 44
© Sens-Tech Limited, 2007
contents
page
1
introduction
1.1
general
1.2
applications
1.3
features
1.4
product
3
3
3
3
precautions
2.1
supply voltage
2.2
maintenance
2.3
cleaning
2.4
environment
2.5
radiation
2.6
connections
2.7
electrical screens
5
5
5
5
5
5
5
installation
3.1
system requirements
3.2
interfaces
3.3
mounting
3.4
software installation
3.5
software operation
6
6
7
8
9
start-up software
4.1
command interpreter
4.2
X-ray data acquisition
10
14
advanced user guide
5.1
the control channel
5.2
the data channel
5.3
additional configuration jumpers
15
17
19
6
troubleshooting
20
7
module and system operation
7.1
XDAS module operation
7.2
XDAS system operation
21
21
appendix
appendix A
appendix B
appendix C
appendix D
appendix E
appendix F
appendix G
appendix H
appendix I
23
26
27
29
33
34
36
40
42
2
3
4
5
8
XDAS-V2 User Manual
interface characteristics
environmental conditions
block diagrams
cable interconnections
USB2 protocol
system (data) bus waveforms
detector pin out
outline drawings
peripheral connections
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1
introduction
1.1
general
XDAS is a modular system of boards for use in any X-ray linescan application. Each board has 64 or
128 channels, corresponding to a detector pitch of 2.5, 1.6, 0.8 or 0.4 mm. Multiple boards can be
connected in series and detectors can be butted end-to-end to provide a continuous array.
Data output is in 16 bit format. The system can be interfaced to a PC via:
•
•
•
•
USB2 Local (5m maximum)
USB2 Remote
PCI-7300A data I/O card
standard frame grabber card
Control signals are transmitted to the board via the USB2 connection or an RS485 serial interface,
which can be easily generated from a standard RS232 serial port, using an RS232 to RS485
converter.
X-rays are detected using a scintillator and a photodiode array. Scintillators, such as phosphor strip,
CsI(Tl), or CDW04 are offered to cover a wide energy range from 30 keV to 450 keV.
1.2
applications
These include security, food inspection, thickness measurement, bone densitometry and nondestructive testing.
1.3
features
•
•
•
•
•
•
•
•
1.4
2.5, 1.6, 0.8 or 0.4 mm detector pitch
range of scintillator types available
up to 21504 (128x24DHx7SP) channels in a system
simultaneous data acquisition and read-out
dual energy option
wide dynamic range
16 bit output
high speed USB2 or parallel RS485 link to CPU
product
hardware
A standard XDAS board is supplied in 2 basic formats, depending on whether a dual energy version
or a single energy version is required.
•
The dual energy version has 64 detector channels on each side of the board for detection of
low and high energy X-rays.
•
The single energy version has 64 or 128 detector channels on one side of the board only.
XDAS-V2 User Manual
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© Sens-Tech Limited, 2007
XDAS-V2 is a series of products that consists of two basic building blocks:
•
A detector head (DH) board populated with custom radiation detectors. It is possible to daisy
chain up to12 DH boards.
•
A signal processing (SP) board that allows the user to control the operation of two chains of
12 DH boards each. It is also possible to connect up to 7 SP boards together to form a single
system output.
Further details can be found in the XDAS-V2 datasheet available from the Sens-Tech website:
www.sens-tech.com.
XDAS units should be operated within a housing to provide electrical and radiation screening. A test
box can be supplied for system evaluation.
Connection cables for module interconnection and for connection to a PC can be supplied as
required. They include the communications link and power connections. Signal terminators must be
used for the local and system buses and must be fitted to the master signal processing board and the
last detector board of every sub chain of an XDAS system. These can be supplied to order.
standard software
Standard XDAS software is supplied to permit basic operation and evaluation of the system. The
software enables the user to set signal integration time and sub-sample rate, acquire and log data,
and perform offset and gain corrections on live data. This is described in section 4, start up
software.
user software applications
Users may wish to write their own independent software application to provide system control and
data acquisition. This is described in section 5 advanced, user guide. A Software Development Kit
(SDK) is available. This provides the data acquisition source code.
module and system operation
This is described in section 7, module system and operation.
XDAS-V2 User Manual
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© Sens-Tech Limited, 2007
2
2.1
precautions
supply voltage
Ensure the +6V supply voltage does not exceed +9V or fall below +5.5V. Exceeding these limits may
result in unpredictable behaviour. The power supply must not exceed the absolute maximum ratings
which can cause permanent damage to the unit. (see appendix A).
2.2
maintenance
There are no user maintainable components. The user must not attempt disassembly. Boards must
be returned to Sens-Tech for service or repair.
2.3
cleaning
The Boards may be hand cleaned using conventional printed circuit board techniques. Residues
should not be left on the board that could affect the performance of the sensitive front-end analogue
electronics.
2.4
environment
The Boards must not be exposed to levels outside those specified in appendix B.
2.5
radiation
The Boards use components of limited radiation hardness. Additional shielding is required to protect
the electronics from the X-ray source.
2.6
connections
Always make connections to the Boards with the power supplies switched off.
2.7
electrical screens
The complete system of XDAS boards must reside in a fully shielded enclosure, to protect from
external noise and interference.
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3
installation
The following instructions will enable users to operate the XDAS unit using the software provided.
Results can be taken immediately and the hardware setup can be checked for correct operation.
3.1
system requirements
Intel Pentium® III or faster CPU
(A USB2.0 capable PC is required for USB2 interface)
Microsoft Windows® 98, 2000 or XP
A mouse or a tablet
VGA or higher resolution monitor
CD drive
+6V low noise DC power supply
3.2
interfaces (see appendix A for details)
The diagrams of appendix D show three different types of connection: USB2, PCI-7300A and a
frame grabber card connection. Please make connections as shown.
3.2.1
control interface
Set up the serial interface as follows:
type
baud rate
data bits
parity
stop bits
RS485
9600
8
odd
1
USB2 connection does not require a separate serial interface.
3.2.2
data interface
One of three types of interface can be used: USB2; PCI-7300A Data I/O card or frame grabber.
These should be set up as follows:
USB2
type
data rate
mode
Buffer
USB 2.0
2.5-20 Mbytes per second sustained
Bulk transfer mode.
130kBytes of cache buffer
A standard USB B socket is used, conforming to industry standards.
PCI data I/O card
type
data rate
mode
TTL, parallel 8 bit
2.5-20 Mbytes per second clocked using gated PCLK
synchronous
Signal types and connector definition are detailed in appendix A.
Details of the synchronous protocol are defined in appendix F.
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Frame Grabber
type
data rate
mode
RS422, parallel 8 bit
5-20 Mbytes per second clocked using PCLK
synchronous
Signal types and connector definition are detailed in appendix A.
Details of the synchronous protocol and line and frame synchronization are defined in appendix F.
3.2.3
detector interface
Where users are fitting their own detectors, details of the detector connections, for 16 and 32 channel
detectors, can be found in appendix G.
3.2.4
ID address
Ensure dip switches are set on each signal processing module, based on the position of each module
in the system chain. For systems with only one processing board, the address is always set to
address 1.
address
1
2
3
4
5
6
7
address positions
(jumper or dip switch)
2
1
0
0
0
0
1
1
1
1
0
1
1
0
0
1
1
1
0
1
0
1
0
1
Note that each board is factory set to address ‘000’. The user must set the address for each SP
board in the system before use.
Address ‘001’ is Master.
3.2.4
Board Header
Set the dip switch H to ON position. This enables the addition of two header bytes in the beginning of
each data block identifying each detector board. This setting is required for XDAS software and is
optional for customer specific software.
3.3
mounting (see mechanical interface drawing appendix H)
Four mounting holes, suitable for M3 fasteners are provided on each detector module to allow the
securing of the modules into the system. The signal processing module has eight mounting holes
suitable for M3 fasteners. Each provides a ground connection for the board.
Care must be taken to ensure the modules are electrically screened from external interference. They
must also be screened from the X-ray beam using appropriate techniques.
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3.4
software installation
Insert the XDAS software CD into the computer’s CD-ROM drive.
If the setup program does not auto-run, carry out the following.
•
•
Select Run from the Start menu.
In the command line box, type d:\setup (where d is the letter of your CD-ROM drive),
then click OK or press the Return (↵)
↵) key.
•
Follow the on screen instructions.
•
The setup program creates a program icon in the Start menu.
•
Browse and click the XDAS Demo (V1x/V2) icon to start the program.
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3.5
software operation (version 3.41) – V1x/V2
On entering the program, the driver selection window is displayed first. Select the correct option
applicable to the type of data interface you are using and click OK. The software will then display the
Command Interpreter box and the Data Acquisition window.
The system is now ready to be used. Data acquisition parameters are set up on the Command
Interpreter and sent to XDAS using the Send button. The button turns green after a successful
XDAS configuration.
The system will commence data acquisition by pressing the Start button. Detailed setting-up
instructions can be found in section 4, start up software.
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4
start-up software
XDAS Software is provided with the unit to allow immediate use of the product. Custom user
programs may be required and section 5, advanced user guide defines the necessary interface
protocol for users to follow.
These instructions are written for Microsoft Windows XP™. The software provided with the unit can
be operated by carrying out the following steps.
Before using the software the module(s) must be connected together and to the host PC as stated in
section 3, installation.
A copy of the latest version of XDAS Demo software must be installed.
Start the XDAS demonstration software by browsing to Start\All Programs\XDAS\XDAS Demo (V1x).
Select the applicable cable interface option in the driver selection window and click OK.
*The EPP mode is not available on XDAS-V2.
4.1
command interpreter
In the Command Interpreter set up the following default configuration:
Graph mode
Integration period AB
Integration period CD
Subsamples
Test mode
nModules
Host speed
Refresh rate
XDAS-V2 User Manual
:
:
:
:
:
:
:
:
All
50 (i.e., 500us)
50 (i.e., 500us)
2
unchecked
1x1
5MHz
10ms
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Now click on the Send button which should turn Green indicating successful XDAS setup.
4.1.1
graph mode
The axis of the graph is automatically scaled to correspond to the total number of channels depending
on the number of modules in the system. The following modes can be set via the Command
Interpreter:
AB
CD
ALL
Dual
This selects only channels 1 to 64 to be displayed from each module.
This selects only channels 65 to 128 to be displayed from each module.
This selects all channels to be displayed in a single line.
This selects modes AB and CD to be displayed at the same time, as different colours on the
same x and y axis.
4.1.2
scan control
This starts or stops the data acquisition process based on the last set of settings sent from the
Command Interpreter.
4.1.3
integration period
This allows the user to set either identical or different integration periods for channels 1 to 64 and 65
to 128 on each module. The integration period and can be set between 1 and 50000 (10 µs to 0.5 s)
in steps of 10us.
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4.1.4
test mode
This mode must only be used with the integration time set to a maximum of 30us for 2pF mode and
150us for 10pF mode.
The test mode injects a factory defined signal into the odd and even inputs such that the odd
numbered channels produce an output twice to that of even numbered channels. This feature allows
the testing of the system in the absence of an external signal.
4.1.5
sub-sample
There is a choice of three different levels of sub-samples: 1, 2, and 4.
When Sub-samples is activated, multiple integration periods are taken dependent on the number of
sub-samples requested. This allows the dynamic range of the module to be extended. The user may
perform further sub-sampling in software.
4.1.6
modules
This input tells both the hardware and the software how many modules are connected in the system.
A
4.1.7
X
B
= Analogue x Digital
refresh rate
This sets the software refresh rate for acquiring new data and can be varied from 1 ms to 100 s.
4.1.8
data log
When data logging is activated a separate menu is displayed requesting the file name, number of
data points required, and whether to add calibration data and command interpreter settings. The
system then logs data based on these parameters and saves it in csv format.
4.1.9
open last log file
This allows the last set of data to be logged or to be reloaded for analysis or viewing.
4.1.10 calibrate
The calibration mode allows the user to acquire offset and gain calibration parameters. These are as
follows:
offset: takes a reading based on the current settings and stores the figure for each channel as the
offset correction factor. This is carried out with no signal present.
gain:
takes a reading based on the current settings and calculates the gain correction factor for
each channel to give 95 % of full scale. This should be carried out with maximum signal
present on all channels.
The calibrate function allows 3 display options as follows:
offset correct:
this automatically deducts the stored offset from all readings before displaying and
storing.
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gain correct:
this automatically calibrates with the stored gain correction factor for each channel
before displaying and storing.
set threshold:
this allows all readings below a set number (0 to 65536) to be set to zero, to allow
for threshold detection.
The calibration factors can be applied to either live or static data.
4.1.11 save defaults
This allows the current settings in the Command Interpreter to be set as the module power-on
defaults that are used on initial switch-on.
4.1.12 send
This transmits the current parameters setup on the Command Interpreter screen to the hardware.
The Send box remains highlighted in Red if settings have been changed and not transmitted to
XDAS.
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4.2
X-ray data acquisition
The following facilities are available from the X-ray Data Acquisition menu bar:
file
open:
save/save as:
settings:
exit:
enables the user to select a previous set of results for analysis.
enables the user to save a set of results.
allows the data and control interface to be selected as defined in section 3,
installation.
exits the program.
edit
copy:
copies data to the clipboard to enable it to be pasted into other software
applications, such as a spreadsheet or word processor.
view
graph only:
channel as:
graph
displays graph only.
channel/number: table referenced to channel numbers ( 1 to 8064 ) or
module/channel: table referenced as module and channel number
(ie. 1/63 = module 1 channel 63 ).
type:
selects bar, line or bar/line combination display types.
window
data acquisition:
command interpreter:
cascade:
switches on/off the graphical display.
switches on/off the command interpreter.
allows data acquisition and command interpreter to be cascaded.
help
help:
About:
future option. For help contact the Sens-Tech technical help line.
Opens a software information shield.
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5
advanced user guide
XDAS-V2 has two interface channels. These are the control channel and the data channel. The
control channel is used to issue commands to the XDAS system whereas the data channel is used
only to receive channel data from the XDAS system. In this section, hexadecimal numbers are
indicated by the prefix 0x.
5.1 the control channel
The control channel is used to issue commands to the XDAS system. It is an RS485 serial input and
is bussed to all the modules in the system. External connections to this bus are typically made using
pins 8 [SCTRL+] and 7 [SCTRL-] of the system bus connector.
5.1.1
command format
All commands sent to the XDAS system follow a generic pattern described below.
0xC0
Cmd
Data
All commands start with the byte 0xC0. This is followed by one or two byte(s) representing the
command (Cmd). Where a command has parameters, these are sent immediately after the Cmd
byte.
5.1.2
parameter format
There are two types of parameters that can be sent with a command. These are one byte and two
byte parameters.
one byte parameters are sent simply as one byte.
two byte parameters however, must be split into nibbles (half bytes) and sent as four separate bytes.
The most significant byte is sent first.
An example of this is given in section 5.1.4.
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5.1.3
command listing
The commands for controlling an XDAS system are shown below.
Cmd byte
function
0x00
0x01
start scan
stop scan
parameter type
(see section 5.1.2)
none
none
description
0x02
set number of SP boards
one byte
0x03 *
set integration period AB
two byte
0x04
set output data bus speed
one byte
0x05
set sub-samples
one byte
0x06
test mode ON
none
0x07
0x08 *
reserved
set integration period CD
two byte
sets the integration period for
block CD (ch65-128).
default = 68 (680us)
0x09
0x0A
reserved
test mode OFF
none
0x0B
set number of DH boards
one byte
disable test mode
default = OFF
sets the number of detector
boards in the system.
N = 1 to 24
default = 12
0x0C
0x0D
reserved
save boot defaults
none
Saves current settings as power
on defaults.
0x0E
0x0F
reserved
reserved
start continuous scan
stop scan
default = OFF
sets the number of signal
processing boards in the
system
N = 1 to 7
default = 2
sets the integration period for
block AB (ch1-64).
default = 68 (680us)
sets the PCLK frequency where
0=2.5, 1=5, 2=10, 3=20MHz
default = 2 (10MHz)
sets the sub-samples, S where
N is the parameter.
N
S=2
default = 0 (1 ss)
enable test mode
default = OFF
* the integration time, T, is derived from the integration period, P as follows:
T = 10 µs x N
5.1.4
example commands
Set number of sub-samples in system to 4
2
4=2
0xC0
XDAS-V2 User Manual
0x05
0x02
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Set integration period to 2600 (2600 = 0x0A28) on both AB and CD
0xC0
0x03
0x00
0x0A
0x02
0x08
0xC0
0x07
0x00
0x0A
0x02
0x08
Start Scanning
0xC0
5.1.5
0x00
scan trigger (nSCAN)
There is an option to start and stop the scan using hardware, for example, to synchronise scanning to
an X-Ray shutter.
nSCAN is a 5V CMOS signal (locally pulled high) and should be input to the first SP board in the
system. The module address does not matter. nSCAN is then bussed to other modules over the
system bus.
By default, nSCAN is a level triggered pin and as such, when nSCAN is Logic 0, continuous scanning
begins. When nSCAN is Logic 1, continuous scanning stops.
Switch A switches nSCAN from level
triggering to edge triggering on both rising
and falling edges.
Set
nSCAN edge triggered
Not Set
nSCAN level triggered
(factory setting)
For edge triggering, there is one line acquisition and readout for each of the rising and falling edges.
The integration time and subsamples are set using the serial control interface. XDAS ignores any
nSCAN edges that appear while the current integration cycle is in progress.
It is advised to use an opto-coupler to isolate nSCAN from XDAS if the trigger source is referenced to
a different ground plane.
5.2
the data channel
The data channel is used to receive channel data from an XDAS system. It is an 8-bit wide, RS485
(differential) parallel data bus running through all signal processing modules in the system.
In a multi-processor system, the external connection between the XDAS system is made from the
module with the highest address and not from the module with address 1. The modules send their
data in order of address, starting at address 1.
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5.2.1
Dip switches affecting the data transfer protocol
The data transfer protocol is set up using dip switches B, C, F, and H.
switch B allows the user to change the order
of channel readout from each detector board.
switch C allows the user to change the order
of detector board readout from each signal
processing board.
Set
readout reversed
Not set
standard output
(factory setting)
Set
standard output
Not set
readout reversed
(factory setting)
switch F switches the gated pixel clock
(PCLK) mode. When PCLK is gated, PCLK
only clocks valid data. When PCLK is ungated, PCLK clocks continuously. In ungated mode, LVAL ± is used to validate the
data. Un-gated mode is normally used for
frame-grabber cards. The un-gated mode is
available only in single SP board systems.
Set
PCLK ungated
switch H controls the address header prefix.
When enabled, two header bytes are prefixed
to each packet data per module. The first
bytes represents the SP board ID and the
second byte represents the DH board ID.
This enables software to verify that it is in
sync with the data.
Set
header prefix
enabled
(factory setting)
Not set
PCLK gated
(factory setting)
Not set
header prefix
disabled
DIP switches B and C allow to user to set XDAS to one of all the possible combinations of the readout
direction.
5.2.2
data format
Data bytes are presented on the data output connector. The data from each module is organised as
shown below. The channels are output in order from 1 to 128. Channel data is two bytes wide.
If switch H is set, a two byte header is added to the output of each module. The header contains the
address of the signal processing board (m) in the first byte and the module number (n) in the second.
For example, data output for the first DH board connected to first SP board with switch H (two header
bytes) and switch E (digital test pattern enable – section 5.3) are set to ON is given below.
SP
address*
0x0m
DH
address*
0x0n
0x01
0x01
CH1 Data
low byte
0x00
CH128 data
high byte
0x00
low byte
high byte
0xFC
0x01
The test mode changes when the readout order is changed using switch B and switch C
corresponding to data from different RAM locations. The header bytes remain the same.
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5.2.2.1 synchronous mode
Data is output synchronised to PCLK, running at 2.5/5/10/20 MHz. This allow up to 20Mbytes/s data
output. Both USB2 and PCI7300 interfaces are able to meet these requirements.
J1 & J2
PCLK PCLK +
37
38
Data must be read from the data pins on the NEGATIVE edge of PCLK.
5.3 additional configuration jumpers
switch D is for factory testing only. This
forces the system to boot from hardware
defaults and is useful if saved boot data is
corrupted.
switch E causes the ADC to be
disconnected and replaced by a known
incrementing digital test pattern (a ramp
function). All data processing is performed
on this data in exactly the same way as if it
were real ADC data, enabling the digital
electronics to be tested.
Not set
(factory setting)
Set
test pattern ON
switch G is used to change the integration
capacitance on the front end charge
integration amplifiers.
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Set
2 pF
Not set
test pattern OFF
(factory setting)
Not set
10 pF
(factory setting)
© Sens-Tech Limited, 2007
6
6.1
troubleshooting
No response
Check all the connections have been made correctly including data and power cables and
termination sockets.
Check the +6 V power supply is on and correctly set.
(Note that the system will not operate if voltage at any module
drops below +5.5 V).
Check that module address has been setup correctly using DIP switches.
Check that the unit has been set up properly on the software command window.
6.2
Count overflow or very high count rates
Check module optical connection is light-tight.
Check the front end gain setting on DIP switch G.
6.3
Half full scale output even without any signal
Remove and reinsert the local bus termination socket carefully.
Check that offset adjustment potentiometer VR1 is not damaged.
6.4
Output data/image is scrambled
Check that the readout order is set correctly using DIP switches B and C.
6.5
Output is not synchronised
Check that header bytes are enabled/disabled as required using the DIP switch H.
6.6
Software will not install
Check computer running Microsoft Windows® 98, or later.
6.7
No readings can be taken
Check unit connected to the USB2 port, data I/O card or frame grabber has been correctly
installed.
6.8
System not operating correctly with multiple signal processing boards
Check addresses are set correctly.
Please contact Sens-Tech for further support.
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7
7.1
module and system operation
XDAS module operation
A schematic of a single XDAS module is shown on the module block diagram, appendix C.
The detector array is connected to the board via 4 x 16 way (1.6 mm pitch) or 4 x 32 way (0.8 mm
pitch) headers. The dual energy boards are available in 1.6 mm or 2.5 mm pitch, and has a second
row of detectors connected to the back of the board. The single energy board will accept 1.6 mm or
0.8 mm pitch arrays.
Current from the photodiodes is measured by a custom designed microcircuit containing 128 charge
integrating amplifiers and a multiplexer. The microcircuit provides two serial analogue outputs,
corresponding to amplifier output voltages at the beginning and end of signal integration. These are
fed via a differential amplifier, eliminating common mode noise, to a 14-bit ADC.
The system can operate in continuous mode with one set of data being read out while the next set is
being acquired. In continuous operation the dead time is less than 1 µs.
The maximum charge that can be collected per cycle depends on the choice of the storage
capacitors, one per channel, which are internal to the microcircuit. These can be set to 2 pF or
10 pF. High linearity is maintained with a voltage swing of 1.5 V providing charge storage of 3 pC
or 15 pC per cycle.
If higher dynamic range is required, a facility for sub-sampling and data summation is incorporated onboard. This is the image data store (see module block diagram, appendix C). Up to 4 sub-samples
can be acquired and stored in the image data store, which is a 16 bit device. When data is ready for
transmission, the 16 bits are transmitted via the chosen interface to the host CPU.
Operation is controlled by a gate array (FPGA), which provides the central intelligence for the board
and the timing and control signals for system operation. The gate array is based on fused link
technology, providing a high level of radiation hardness.
User settings to control integration times, sub-sampling, and refresh rate, together with information on
system configuration, are transmitted via an RS485 interface and can be stored in non-volatile RAM
such that on switch-on, the system is initiated in the last mode saved. The RS485 is compatible with
the RS232 serial port on standard PCs using the interface converter supplied as part of the cable set.
The data output bus is a differential RS485 link (multi-drop RS422) capable of transmitting at
2.5/5/10/20 MB/s. Interface to a PC is via USB2, PCI-7300A data I/O card or frame grabber card.
The same configuration of XDAS board is used for each mode but a different cable set is required to
connect to the PC. If USB2 mode selected, no additional board is required for a PC. USB2 cable is
capable of providing a single link for both data and control buses.
7.2
XDAS system operation
Up to 12 detector boards can be daisy-chained to form a single detector system. Each SP board can
process two chains of 12 DH boards each. It is further possible to daisy chain up to 7 SP boards. The
first SP board in the system acts as the master board, ensuring that all boards in the system are
synchronised. The master board transmits the image data from all boards to the host CPU via the
RS485 link, see the system block diagram, appendix C. It also transmits all control settings from the
host to the slave boards.
To enable control settings to be made, each module is set up with a unique address, from 1 to 7.
Address 0 is reserved as a broadcast address for all modules. The address is set by means of DIP
switches links on the board.
XDAS-V2 User Manual
Issue 1, 23 October 2007
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© Sens-Tech Limited, 2007
The SP boards share the multi drop system bus. One of either the speed of the communications link
or the ADC sample rate is normally the factor limiting data acquisition and read-out rate for the
system.
Sens Tech provides an XDAS-V2 system builder tool for rapid system configuration or alternatively,
contact Sens-Tech for support and advice.
XDAS-V2 User Manual
Issue 1, 23 October 2007
page 22 of 44
© Sens-Tech Limited, 2007
appendix A
XDAS interface characteristics
absolute maximum ratings
test conditions
supply voltage (+6 V)
min
typ
max
units
+5.5
+6.0
+9.0
V
typ
max
units
0.8
V
DC characteristics (Ta = 25 °C supply = +5.5 V to +6.5 V)
test conditions
min
digital (TTL 5 V)
input low volts (max)
O/P sinking current
input high volts (min)
3.7
V
output low volts (max)
0.2
output high volts (min)
4.7
V
V
+6 V supply (SP)
supply volts
+5.5
supply current:
Master board with
termination sockets
supply current:
Each slave board
+6 V supply (DH)
supply volts
+5.5
supply current
110
+6.0
+9.0
V
200
700
mA
100
400
mA
+6.0
+9.0
V
125
140
mA
*XDAS V2 may not operate if the supply voltage drops below +5.25V or exceeds +9.5V.There is
limited over voltage protection for up to +13.0V.
XDAS-V2 User Manual
Issue 1, 23 October 2007
page 23 of 44
© Sens-Tech Limited, 2007
appendix A (continued)
signal processing board
connector
J5
-
40 way 2.54mm pitch male IDC header for system bus
mates with 40way 2.54mm pitch female IDC connector
pin
designation
description
signal type
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
GND
nRST
LA2LA2+
NC
NC
SCTRLSCTRL+
nSCAN
LAEN+
LAENLA0+
LA0LA1+
LA1NC
NC
NC
LVALLVAL+
D7D7+
D6D6+
D5D5+
D4D4+
D3D3+
D2D2+
D1D1+
D0D0+
PCLKPCLK+
MCLKMCLK+
Ground
System Reset
Local address 2
TTL (5V)
RS485
Not connected
Not connected
-
System Control
RS485
Scan Enable
Local Address Enable
TTL (5V)
RS485
Local Address 0
RS485
Local Address 1
RS485
Not Connected
Not Connected
Not Connected
-
Line Valid
RS485
Data Bit 7
RS485
Data Bit 6
RS485
Data Bit 5
RS485
Data Bit 4
RS485
Data Bit 3
RS485
Data Bit 2
RS485
Data Bit 1
RS485
Data Bit 0
RS485
Pixel Clock
RS485
Master Clock
RS485
XDAS-V2 User Manual
Issue 1, 23 October 2007
page 24 of 44
© Sens-Tech Limited, 2007
appendix A (continued)
Connectors
pin
1
2
3
4
J1 J2 -
4 way polarised male header MOLEX 2203-5045
4 way polarised RA male header MOLEX 2205-7045
mates with crimp housing MOLEX 5037-5043
and crimp MOLEX 870-1040
designation
description
signal type
GND
nSCAN
+6 V
+6 V
Ground
Scan Initiation
6 V Power
6 V Power
TTL
DC
DC
Connectors J3 & J4 - 50 way 2mm pitch IDC header for local bus E-TEC SLS-050-H562-55/2
mates with 2mm pitch female IDC connector E-TEC IDS-050-S200-95/P
J3 connects to modules 1 to 12 and J4 connects modules 13 to 24. Both sub chains must be
terminated.
detector head board
connectors
pin
1
2
3
4
J1 J2 -
4 way polarised male header MOLEX 2203-5045
4 way polarised RA male header MOLEX 2205-7045
mates with crimp housing MOLEX 5037-5043
and crimp MOLEX 870-1040
designation
description
signal type
GND
nSCAN
+6 V
+6 V
Ground
Scan Initiation
6 V Power
6 V Power
TTL
DC
DC
J1 and J2 are optional for a system with less than six detector head boards. In a larger system ,it is
acceptable to connect power only to the last DH board in every sub chain.
Connectors
J3
J4
-
50 way 2mm pitch male IDC header for local bus output
50 way 2mm pitch male IDC header for local bus input
E-TEC SLS-050-H562-55/2
mates with 2mm pitch female IDC connector E-TEC IDS-050-S200-95/P
J3 is the output connector and J4 is the input connector. The output of each DH board is connected
to the input of the next to form a chain of up to 12 DH boards. The output of the first DH board is
connected to relevant local bus connector on the SP board. Each SP board can accept two daughter
chains of 12 DH boards each. The input of the first DH board in every chain must be properly
terminated.
XDAS-V2 User Manual
Issue 1, 23 October 2007
page 25 of 44
© Sens-Tech Limited, 2007
appendix B
environmental conditions
1
temperature (operating)
+5 to +35 °C
2
sinusoidal vibration (all 3 axes, non-operating)
10 to 500 Hz for 10 cycles in each axis, at peak amplitude of 2 g,
1 octave/min.
3
random vibration (all 3 axes, non-operating)
10 - 20 Hz roll on
20 - 50 Hz
50 - 500 Hz roll off
at 500 Hz
4
6 dB/octave
0.02 g²/Hz
6 dB/octave
0.001 g²/Hz
humidity (non-condensing)
93 % at 30 ºC
5
pressure (for transportation)
can withstand pressure reductions from 68 kPa (1 bar) to 100 kPa (0.68 bar).
XDAS-V2 User Manual
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© Sens-Tech Limited, 2007
appendix C
detector head board
signal processing board
XDAS-V2 User Manual
Issue 1, 23 October 2007
page 27 of 44
© Sens-Tech Limited, 2007
appendix C (continued)
system block diagram for a system of n boards
XDAS-V2 User Manual
Issue 1, 23 October 2007
page 28 of 44
© Sens-Tech Limited, 2007
System readout direction is fully programmable using
switch B and switch C on the signal processing
boards, regardless of the module interconnection.
Please refer to section 5.2 of this manual.
appendix D
cable interconnections
High speed data I/O PCI-7300A connections
XDAS-V2 User Manual
Issue 1, 23 October 2007
page 29 of 44
© Sens-Tech Limited, 2007
System readout
System
direction
readout
is direction
fully programmable
is fully programmable
using
using
switch B and
switch
switch
B and
C onswitch
the signal
C onprocessing
the signal processing
boards, regardless
boards, regardless
of the module
of the
interconnection.
module interconnection.
Please refer
Please
to section
refer5.2
to section
of this manual.
5.2 of this manual.
appendix D (continued)
Frame Grabber connections
XDAS-V2 User Manual
Issue 1, 23 October 2007
page 30 of 44
© Sens-Tech Limited, 2007
appendix D (continued)
USB2 local connections
XDAS-V2 User Manual
Issue 1, 23 October 2007
page 31 of 44
© Sens-Tech Limited, 2007
System readout direction is fully programmable using
switch B and switch C on the signal processing
boards, regardless of the module interconnection.
Please refer to section 5.2 of this manual.
appendix D (continued)
USB2 remote connections
XDAS-V2 User Manual
Issue 1, 23 October 2007
page 32 of 44
© Sens-Tech Limited, 2007
appendix E
USB2 protocol
USB2.0 High Speed Mode
Bulk transfer protocol for data acquisition
Integrated control and data interface
XDAS SDK library files available with example code
XDAS-V2 User Manual
Issue 1, 23 October 2007
page 33 of 44
© Sens-Tech Limited, 2007
appendix F
system (data) bus waveforms
These clock pulses are not present if PCLK is gated with LVAL. The un-gated PCLK mode is only
available in a single SP board system. Two header bytes are transmitted only if enabled using DIP
switch H. The first byte is the SP board ID and the second byte is the DH board ID.
XDAS-V2 User Manual
Issue 1, 23 October 2007
page 34 of 44
© Sens-Tech Limited, 2007
appendix F (continued)
XDAS-V2 User Manual
Issue 1, 23 October 2007
page 35 of 44
© Sens-Tech Limited, 2007
appendix G
16 channel detector pin out
XDAS-V2 User Manual
Issue 1, 23 October 2007
page 36 of 44
© Sens-Tech Limited, 2007
appendix G (continued)
XDAS-V2 User Manual
Issue 1, 23 October 2007
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© Sens-Tech Limited, 2007
appendix G (continued)
32 channel detector pin out
k
CH8
22
15
18
XDAS-V2 User Manual
19
Issue 1, 23 October 2007
page 38 of 44
CH31
k
20
17
CH27
CH29
21
16
CH23
CH25
23
14
CH30
CH32
24
13
CH19
CH21
25
12
CH26
CH28
26
11
CH15
CH17
27
10
CH22
CH24
28
9
CH18
CH20
29
8
CH11
CH13
30
7
CH7
CH9
31
6
CH14
CH16
32
5
CH3
CH5
33
4
CH10
CH12
34
3
CH6
CH1
35
2
CH2
CH4
36
1
k
© Sens-Tech Limited, 2007
k
appendix G (continued)
XDAS-V2 User Manual
Issue 1, 23 October 2007
page 39 of 44
© Sens-Tech Limited, 2007
appendix H
outline drawings (in mm)
XDAS-SP2-01 signal processing board
XDAS-DH2-01 1.6mm pitch dual energy detector head
* To obtain height of detector above board, add detector socket height to detector height (exc. pins)
XDAS-V2 User Manual
Issue 1, 23 October 2007
page 40 of 44
© Sens-Tech Limited, 2007
appendix H (continued)
XDAS-DH2-10 1.6mm pitch single energy detector head
XDAS-DH2-20 0.8mm pitch single energy detector head
XDAS-DH2-40 2.5mm pitch dual energy detector head
XDAS-V2 User Manual
Issue 1, 23 October 2007
page 41 of 44
© Sens-Tech Limited, 2007
appendix I
peripheral connections
50 way SCSI interface adapters XDAS-DATA3, XDAS-DATA4 or XDAS-DATA6
Pin
Designation
Description
Signal Type
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
RES
VBUS
PCLK+
VBUS
LVAL+
NC
RES
NC
D0+
NC
D1+
NC
D2+
NC
D3+
DC
D4+
NC
D5+
NC
D6+
GND
D7+
GND
SCTRL+
RES
VBUS
PCLKVBUS
LVALNC
RES
NC
D0NC
D1NC
D2NC
D3NC
D4NC
D5NC
D6GND
D7GND
SCTRLXDAS-V2 User Manual
Reserved for system
5V bus supply
Pixel clock
5V bus supply
Line valid
No connection
Reserved for system
No connection
Data bit 0
No connection
Data bit 1
No connection
Data bit 2
No connection
Data bit 3
No connection
Data bit 4
No connection
Data bit 5
No connection
Data bit 6
Ground
Data bit 7
Ground
Serial control
Reserved for system
5V bus supply
Pixel clock
5V bus supply
Line valid
No connection
Reserved for system
Not connected
Data bit 0
Not connected
Data bit 1
Not connected
Data bit 2
No connection
Data bit 3
No connection
Data bit 4
No connection
Data bit 5
No connection
Data bit 6
Ground
Data bit 7
Ground
Serial control
use
use
use
use
Issue 1, 23 October 2007
page 42 of 44
DC
RS485
DC
RS485
RS485
RS485
RS485
RS485
RS485
RS485
RS485
DC
RS485
DC
RS485
DC
RS485
DC
RS485
RS485
RS485
RS485
RS485
RS485
RS485
RS485
DC
RS485
DC
RS485
© Sens-Tech Limited, 2007
appendix I (continued)
USB2 module (Part No. XDAS-USB2)
XDAS interface
Local USB2 adapter connects directly to the system control and data bus using a 40way 2.54mm
pitch IDC connector.
Remote USB2 adapter connects to the 50way SCSI cable using the SCSI interface adapters XDASDATA3, XDAS-DATA4 or XDAS-DATA6.
Host Interface:
Standard USB B type connector
USB2.0 High Speed Mode
Bulk transfer protocol for data acquisition
Integrated control and data interface
XDAS SDK library files available with example code
XDAS-V2 User Manual
Issue 1, 23 October 2007
page 43 of 44
© Sens-Tech Limited, 2007
appendix I (continued)
PCI7300 Interface Adaptor (Part No. XDAS-485A-TTL)
PCI7300A port (CN1)
Pin
Designation
Description
Signal Type
1 to 50
51 to 82
83
84 to 88
80 to 90
91
92
93
94
95
96
97
98
99
100
GND
NC
PCLK
GND
NC
FVL
LVAL
D7
D6
D5
D4
D3
D2
D1
D0
Ground
Not connected
Pixel clock
Ground
Not connected
Frame valid
Line valid
Data bit 7
Data bit 6
Data bit 5
Data bit 4
Data bit 3
Data bit 2
Data bit 1
Data bit 0
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
Serial Port (COM1 or 2)
Pin
Designation
Description
Signal Type
1
2
3
5
9
NC
NC
TXD
GND
NC
Not connected
Not connected
Transmit data
Ground
Not connected
RS232
-
The following pins are connected together
Pin
Designation
Description
Signal Type
4 and 6
DTR and
DSR
Data terminal ready and
Data set ready
RS232
7 and 8
RTS and
CTS
Request to send and
Clear to send
RS232
XDAS-V2 User Manual
Issue 1, 23 October 2007
page 44 of 44
© Sens-Tech Limited, 2007