IP-OptoAD16

IP-OptoAD16
Opto-Isolated 16-bit
A/D Conversion
IndustryPack
User’s Manual
 SBS GreenSpring Modular I/O
Subject to change without notice.
Manual Revision: 2 7/27/99 Hardware Revision: A
IP-OptoAD16
Opto-Isolated 16-bit A/D
Conversion IndustryPack®
SBS GreenSpring Modular I/O
181 Constitution Drive
Menlo Park, CA 94025
(415) 327-1200
(415) 327-3808 FAX
 1994-1998 SBS GreenSpring Modular I/O.
IndustryPack is a registered trademark of SBS
GreenSpring. QuickPack, Unilin and LineSafe are
trademarks of SBS GreenSpring.
SBS GreenSpring acknowledges the trademarks of
other organizations for their respective products
mentioned in this document.
All rights are reserved: No one is permitted to
reproduce or duplicate, in any form, the whole or part
of this document without the express consent of SBS
GreenSpring. This document is meant solely for the
purpose in which it was delivered.
SBS GreenSpring reserves the right to make any
changes in the devices or device specifications
contained herein at any time and without notice.
Customers are advised to verify all information
contained in this document.
The electronic equipment described herein generates,
uses and may radiate radio frequency energy, which can
cause radio interference. SBS GreenSpring assumes no
liability for any damages caused by such interference.
SBS GreenSpring products are not authorized for use
as critical components in medical applications such as
life support equipment, without the express consent of
the president of SBS GreenSpring.
This product has been designed to operate with
IndustryPack carriers and compatible user-provided
equipment. Connection of incompatible hardware is
likely to cause serious damage. SBS GreenSpring
assumes no liability for any damages caused by such
incompatibility.
Table of Contents
PRODUCT DESCRIPTION .......................................................................................................1
FUNCTIONAL DESCRIPTION ................................................................................................2
ANALOG INPUT ..........................................................................................................................2
DATA CORRECTION ....................................................................................................................2
ADC Correction Formula ......................................................................................................2
ID PROM CONTENTS...............................................................................................................3
ID PROM CONTENTS IP-OPTOAD16 .........................................................................................3
ID PROM CONTENTS IP-OPTOAD16 MODEL DEPENDENT ............................................................4
IP ADDRESSING........................................................................................................................5
ADC REGISTER SET ...................................................................................................................5
ADC Control Register Address $00........................................................................................5
ADC Channel Selection ................................................................................................................... 5
ADC Gain Selection ........................................................................................................................ 6
ADC Automatic Settling Time Control............................................................................................. 6
ADC Pipeline Mode Control ............................................................................................................ 7
ADC Interrupt Enable ...................................................................................................................... 7
ADC Data Register Address $02 ............................................................................................7
ADC Status Register Address $05 ..........................................................................................8
ADC Convert Start Register Address $07 ...............................................................................8
Interrupt Vector Register Address $09 ...................................................................................8
ID Write Enable Register Address $0B...................................................................................9
OPERATING MODES .............................................................................................................10
MODE OVERVIEW ....................................................................................................................10
AUTOMATIC MODE ..................................................................................................................10
State Diagram Automatic Mode ...........................................................................................11
Automatic Mode with Data Pipeline.....................................................................................11
Automatic Mode without Data Pipeline................................................................................12
NORMAL MODE .......................................................................................................................13
State Diagram Normal Mode ...............................................................................................14
Normal Mode with Data Pipeline.........................................................................................14
Normal Mode without Data Pipeline....................................................................................15
IP I/O CONNECTOR ...............................................................................................................17
ANALOG INPUT CONNECTIONS .................................................................................................17
POWER INPUT CONNECTIONS ....................................................................................................18
SPECIFICATIONS...................................................................................................................19
WARRANTY AND REPAIR....................................................................................................20
SERVICE POLICY ......................................................................................................................20
OUT OF WARRANTY REPAIRS ...................................................................................................20
ORDER INFORMATION ............................................ERROR! BOOKMARK NOT DEFINED.
SCHEMATICS..............................................................ERROR! BOOKMARK NOT DEFINED.
List of Figures
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9
Figure 10
Figure 11
Figure 12
Figure 13
Figure 14
Figure 15
Figure 16
Figure 17
Figure 18
Figure 19
Figure 20
Figure 21
IP-OptoAD16 Block Diagram......................................................................................1
ID PROM Contents IP-OptoAD16 ...............................................................................3
ID PROM Contents Model Dependent .........................................................................4
CONTREG Input Channel Selection and Mode ............................................................6
CONTREG Input Gain Selection..................................................................................6
CONTREG Automatic Settling Time Control................................................................7
CONTREG Pipeline Mode Control ..............................................................................7
CONTREG Interrupt Enable........................................................................................7
ADC Data Register .....................................................................................................7
Data Register Description .........................................................................................8
ADC Status Register..................................................................................................8
INTVEC Interrupt Vector Register .............................................................................9
Operating Modes.....................................................................................................10
State Diagram Automatic Mode...............................................................................11
Flowchart Automatic Mode with Data Pipeline........................................................12
Flowchart Automatic Mode without Data Pipeline ...................................................13
State Diagram Normal Mode...................................................................................14
Flowchart Normal Mode with Data Pipeline............................................................15
Flowchart Normal Mode without Data Pipeline .......................................................16
IP-OptoAD16 Analog Input Connections .................................................................17
IP-OptoAD16 Power Input Connections ..................................................................18
Product Description
The IP-OptoAD16 is an IndustryPack® compatible module providing a galvanically isolated 16 channel multiplexed
16 bit ADC with on board DC/DC converter.
Data acquisition and conversion time is mode dependent: up to 12 ms without channel / gain change and up to
14.5 µs with channel / gain change.
Opto Couplers
Control &
Interface
16-Bit A/D
Converter
with SH
ID-PROM
PGA
gain 1,2,5,10
or
gain 1,2,4,8
16 Channel
Input
Multiplexer
DC/DC
Converter
Figure 1
IP-OptoAD16 Block Diagram
1
IndustryPack I/O Interface
IndustryPack Logic Interface
The 16 input channels of the multiplexer can be configured by software to operate either in single ended mode or
in differential mode with eight inputs. The multiplexer of the ADC circuit is over voltage protected up to 70 Vp-p. A
programmable gain amplifier allows gains of 1, 2, 5, 10 (IP-OptoAD16-BPV-1/UPV-1) or 1, 2, 4, 8 (IPOptoAD16-BPV-2/UPV-2). The full scale input range is ±10V for the IP-OptoAD16-BPV-1/BPV-2 and 0V to
10V for the IP-OptoAD16-UPV-1/UPV-2 (for a gain of 1). Each IP-OptoAD16 is calibrated at the factory.
Calibration information is stored in the Identification PROM unique to each IP.
Functional Description
Analog Input
The IP-OptoAD16 provides 16 single ended or 8 differential multiplexed analog inputs for. The desired input and
the mode (single ended or differential) is selected by programming the input multiplexer.
A software programmable gain amplifier with gain settings of 1, 2, 5 and 10 for the IP-OptoAD16-BPV-1/UPV-1
and 1, 2, 4 and 8 for the IP-OptoAD16-BPV-2/UPV-2 allows a direct connection of a wide range of sensors and
instrumentation. The maximum analog input voltage range is ±10V at a gain of 1 for IP-OptoAD16-BPV-1/BPV2. For the IP-OptoAD16-UPV-1/UPV-2 the maximum analog input voltage range is 0V to 10V at a gain of 1.
The ADC is a 16 bit ADS7809 with a maximum sample and conversion time of 10µs.
In multiplexed analog input systems a settling time must expire before the data can be converted after the change
of the input channel. This settling time is depended on the programmed gain. At the most analog input solutions it
is the responsibility of the user to observe the settling time. The IP_OptoAD16 module has an Automatic Settling
Time Control mode. If this mode is enabled, a write to the ADC Control Register, which is necessary to select a
new input channel by the multiplexer, initiates a data conversion automatically after the settling time has expired.
The absolute accuracy of the module is increased by using the possibility to correct the data by software with
factory calibration factors, which are stored in the individual ID PROM of the module.
Data Correction
There are two errors which affect the DC accuracy of the ADC. The first is the zero error (offset). This is the data
value when converting with the input connected with its own ground in single ended mode, or with shorted inputs
in differential mode. This error is corrected by subtracting the known error from all readings.
The second error is the gain error. Gain error is the difference between the ideal gain and the actual gain of the
programmable gain amplifier and the ADC. It is corrected by multiplying the data value by a correction factor.
The data correction values are obtained during factory calibration and are stored in the modules individual version
of the ID PROM. The ADC has a pair of offset and gain correction values for each of the programmable gains.
The correction values are stored in the ID PROM as two's complement 16-Bit wide values in the range -32768 to
32767. For higher accuracy they are scaled to 1/4 LSB.
ADC Correction Formula
The basic formula for correcting any ADC reading for the IP-OptoAD16-BPV-1/BPV-2 ( input voltage range
+/- 10V ) is :
Value = Reading * ( 1 - Gaincorr / 131072 ) - Offsetcorr ÷ 4
The basic formula for correcting any ADC reading for the IP-OptoAD16-UPV-1/UPV-2 ( input voltage range 0V
to 10V ) is:
Value = Reading * ( 1 - Gaincorr / 262144 ) - Offsetcorr ÷ 4
Value is the corrected result, Reading is the data read from the ADC, Gaincorr and Offsetcorr are the correction
factors from the ID PROM.
Gaincorr and Offsetcorr correction factors are stored for each for the possible gain settings.
Note: Floating point arithmetics or scaled integer arithmetics is necessary to avoid rounding error while computing
above formula.
2
ID PROM Contents
ID PROM Contents IP-OptoAD16
ADDRESS
FUNCTION
$01
ASCII 'I'
$49
$03
ASCII 'P'
$50
$05
ASCII 'A'
$41
$07
ASCII 'C'
$43
$09
Manufacturer ID
$B3
$0B
Model Number
$22
$0D
Revision
$10
$0F
RESERVED
$00
$11
Driver-ID low-byte
$00
$13
Driver-ID high-byte
$00
$15
number of bytes used
$1D
$17
CRC
$ 19
Version -xx
$ 1B
Offset Error at Gain = 1 low byte
$ 1D
Offset Error at Gain = 1 high byte
$ 1F
Offset Error at Gain = 2 low byte
$ 21
Offset Error at Gain = 2 high byte
$ 23
Offset Error at Gain = 4 / 5 low byte
$ 25
Offset Error at Gain = 4 / 5 high byte
$ 27
Offset Error at Gain = 8 / 10 low byte
$ 29
Offset Error at Gain = 8 / 10 high byte
$ 2B
Gain Error at Gain = 1 low byte
$ 2D
Gain Error at Gain = 1 high byte
$ 2F
Gain Error at Gain = 2 low byte
$ 31
Gain Error at Gain = 2 high byte
$ 33
Gain Error at Gain = 4 / 5 low byte
$ 35
Gain Error at Gain = 4 / 5 high byte
$ 37
Gain Error at Gain = 8 / 10 low byte
$ 39
Gain Error at Gain = 8 / 10 high byte
$ 3B
$ variable
$ see Figure 3
Not used
board
dependent
$ 00
......
.......
$ 3F
$ 00
Figure 2
ID PROM Contents IP-OptoAD16
3
ID Prom Contents IP-OptoAD16 Model dependent
Figure 3
IP-OptoAD16
Version $19
BPV − 1
$0A
BPV –2
$0B
UPV –1
$14
UPV –2
$15
ID PROM Contents Model Dependent
4
IP Addressing
The IP-OptoAD16 is controlled by a set of registers, which are directly accessible in the IO address space of the IP.
ADDRESS
NAME
FUNCTION
SIZE
ACCESS
$ 00
$ 02
$ 05
$ 07
$ 09
$ 0B
CONTREG
DATAREG
STATREG
CONVERT
INTVEC
IDWRENA
ADC Control Register
ADC Data Register
ADC Status Register
ADC Convert Start Register
Interrupt Vector Register
ID-PROM write enable
word
word
byte
byte
byte
byte
R/W
R/W
R
W
R/W
W
Note: IDWRENA is for factory use only, do not write to this register.
ADC Register Set
The ADC of the IP-OptoAD16 is controlled by a set of 4 registers. All registers are cleared by IP_RESET.
ADC Control Register
ADC Data Register
ADC Status Register
ADC Convert Start Register
ADC Control Register Address $00
The ADC Control Register CONTREG is used to select an input channel, the gain and the mode for the next data
conversion. This is done by writing the corresponding bit pattern into bit 0 to bit 9.
15
14
13
12
11
10
X
X
X
X
X
X
9
8
7
6
5
4
3
2
1
0
unused bits
access undefined
access don't care
read
write
ADC Channel Selection
Bit 0 to bit 3 of the ADC Control Register CONTREG are used to select an input channel for the data
conversion.
Bit 4 of the ADC Control Register CONTREG is used to control if the module operates in differential or in single
ended mode. If this bit is set to '1' differential mode is selected.
5
6
5
4
DIF
3
CS3
2
CS2
1
CS1
0
CS0
Input Channel Selection
Differential
Single Ended
0000= CH1
.
.
0111= CH8
0000= CH1
.
.
1111= CH16
Differential Mode
Figure 4
CONTREG Input Channel Selection and Mode
Note: In differential mode only channels 1 to 8 may be selected. In this mode channels 9 to 16 are used as - input
for channels 1 to 8.
ADC Gain Selection
Bit 5 and bit 6 of the ADC Control Register CONTREG are used to program the gain of the input amplifier.
7
6
GAIN1
5
4
GAIN0
Gain Selection
IP-OptoAD16-BPV-1/UPV-1
Figure 5
IP-OptoAD16-BPV-2/UPV-2
00 = G1
00 = G1
01 = G2
01 = G2
10 = G5
10 = G4
11 = G10
11 = G8
CONTREG Input Gain Selection
ADC Automatic Settling Time Control
If bit 7 of the ADC Control Register CONTREG is set to '1', the Automatic Mode for the settling time is enabled.
In this mode a data conversion is initiated by writing to the ADC Control Register CONTREG, but however is
automatically delayed by hardware until the gain depended settling time has expired. If bit 7 of the ADC Control
Register CONTREG is set to '0', the Normal Mode for the settling time is enabled. In this mode a data conversion
is initiated by writing to the ADC Convert Start Register CONVERT after selecting the desired channel and gain by
writing to the ADC Control Register CONTREG.
6
8
7
6
ASTCE
Automatic Settling Time Control Enable
Figure 6
CONTREG Automatic Settling Time Control
Note: The settling time for all IP-OptoAD16 Modules is 10µs for all gains.
ADC Pipeline Mode Control
If bit 8 is set to '1' the pipeline mode is selected. In pipeline mode the result from the conversion (N-1) is shifted
into the ADC Data Register DATAREG during the conversion N.
9
8
7
PIPL
Pipeline Mode select
Figure 7
CONTREG Pipeline Mode Control
ADC Interrupt Enable
Bit 8 of the ADC Control Register CONTREG is used to enable interrupt generation of the module. If this bit is
set to '1' interrupts are always initiated, whenever the settling time is over ( on IP_INTREQ1 ) and data conversion
has been completed ( on IP_INTREQ0 ). If the module is in the automatic mode ( bit7 set to '1' ) only one
interrupt at the end of data conversion ( on IP_INTREQ0 ) is being generated.
10
9
8
INT
ENA
Interrupt Enable
Figure 8
CONTREG Interrupt Enable
ADC Data Register Address $02
The ADC Data Register DATAREG contains the converted data value. The 16 bit ADC value allows direct
processing of the data as a 16 bit two's complement integer value for the IP-OptoAD16-BPV-1/BPV-2 and 16 bit
straight binary for IP-OptoAD16-UPV-1/UPV-2.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
16 bit ADC data
Figure 9
ADC Data Register
7
DIGITAL OUTPUT
binary two's
complement
DESCRIPTION
TIP501-10/11
+ Full Scale (FS - 1LSB)
Midscale
One LSB Below Midscale
- Full Scale
Figure 10
straight binary
TIP501-20/21
$7FFF
$0000
$FFFF
$8000
$FFFF
$8000
$7FFF
$0000
Data Register Description
Note: The contents of ADC Data Register DATAREG is not valid as long as the ADC Busy Flag is read as '1'.
ADC Status Register Address $05
Bit 0 and bit 1 of the ADC Status Register STATREG reflect the status of the ADC converter. As long as bit 0 is
read as '1', the settling time did not expire after writing to the ADC Control Register CONTREG. Bit 1 indicates
the busy status of the ADC converter itself ( '1' = ADC busy ). If Automatic Mode is active bit 1 indicates a '1'
during the settling time and the conversion time.
1
ADC
Busy
0
Settle
Busy
Settling Time Busy
ADC Busy
Figure 11
ADC Status Register
Note: Bit 2 - 7 of the ADC Status Register are undefined.
ADC Convert Start Register Address $07
If the IP-OptoAD16 is configured in Normal Mode writing any value into the ADC Convert Register CONVERT
starts a data conversion immediately.
Note: In normal mode it is in the responsibility of the user to observe the settling time busy flag and the ADC busy
flag of the ADC Status Register. Writes to the ADC Convert Start Register CONVERT during ADC busy = '1' are
ignored.
Interrupt Vector Register Address $09
The Interrupt Vector Register INTVEC is a byte wide read/write register. The Interrupt Vector Register is shared
between both interrupt sources, but both, the settling time ready and the ADC data ready will create an individual
interrupt. A read cycle to the INTVEC Register acknowledges and clears the interrupt.
8
7
6
5
4
3
2
1
0
X
Will read at interrupt as
0 - for ADC data ready
1 - for settling time ready
Interrupt vector loaded
by software
Figure 12
INTVEC Interrupt Vector Register
For an interrupt from settling time ready bit 0 of the interrupt vector will read as '1'. For an interrupt from the
ADC data ready bit 0 will read as '0'. If the vector register is for example loaded with '$60', settling time ready
interrupt vector will be read as '$61' and ADC data ready interrupt vector will be read as '$60'. In I/O space D0 of
the interrupt vector register is always read as '0'.
Note: The interrupt settling time ready is created by the falling edge of settling time busy status and uses the
INTREQ1, the interrupt ADC ready is created by the falling edge of ADC busy status and uses the INTREQ0
interrupt line of the IP bus.
ID Write Enable Register Address $0B
This register is for factory use only. Do not write to this register. If bit 0 is set '1' a write access to the ID-PROM is
enabled.
9
Operating Modes
The IP-OptoAD16 supports four operating modes which are selected with bit 7 ( Normal / Automatic Mode ) and
bit 8 ( Pipeline / no Pipeline Mode ) of the ADC Control Register CONTREG.
Mode Overview
D
Normal Mode / No Pipeline Mode
D
Automatic Mode / No Pipeline Mode
D
Normal Mode / Pipeline Mode
D
Automatic Mode / Pipeline Mode
CONTREG Bit 8 = 1
Pipline Mode
CONTREG Bit 8 = 0
No Pipline Mode
CONTREG Bit 7 = 1
CONTREG Bit 7 = 0
Automatic Mode
Normal Mode
After the settling time
has expired conversion
N is started and the
result of conversion
N-1 is shifted into the
ADC Data Register.
A write access to the
CONVERT register
starts conversion N and
shifts the result of
conversion N-1 into the
ADC Data Register.
After the settling time
has expired conversion
N is started and the
result of conversion N
is shifted into the ADC
Data Register.
A write access to the
CONVERT register
starts conversion N and
shifts the result of
conversion N into the
ADC Data Register.
Figure 13
Operating Modes
Note: In Normal Mode the user should observe the settling time by the settle busy flag in the ADC Status Register.
Automatic Mode
The Automatic Mode is enabled by setting bit 7 of the ADC Control Register CONTREG to '1'. A write access to
the ADC Control Register CONTREG with bit 7 set to '1' start a conversion for the programmed channel and
gain after the settling time has expired. In Pipeline Mode ( bit 8 of the ADC Control Register CONTREG set to '1'
) the result of the previous conversion is shifted into the ADC Data Register DATAREG during the actual
conversion. If the Pipeline Mode is switched off the result of the actual conversion is shifted into the ADC Data
Register DATAREG.
10
State Diagram Automatic Mode
no cycle
next
ADC busy = 1
ADC busy = 0
RESET
IDLE
Figure 14
write access to CONTREG
BUSY
State Diagram Automatic Mode
In Automatic Mode the ADC busy flag is active during the whole cycle of channel/gain select, settling time and
data conversion. When the ADC busy flag becomes inactive ( = '0' ) the conversion result is accessible in the ADC
Data Register DATAREG and an interrupt will be generated if interrupts are enabled.
Automatic Mode with Data Pipeline
If Automatic Mode with Pipeline is selected during conversion N the result of conversion N-1 is shifted into the
ADC Data Register DATAREG. The acquisition and conversion time in this mode is 22µs.
11
START
Write access to the ADC Control Register
starts automatically the conversion N after
the settling time has expired and shifts the
result of conversion N-1 into the ADC Data
Register.
select new
gain & channel
Auto & Pipeline active
ADC
BUSY
Bit1 of the ADC Status Register indicates
ADC busy during the whole cycle.
?
y
n
read data of
conversion N-1
Figure 15
Read data of the conversion N-1 from ADC
Data Register
Flowchart Automatic Mode with Data Pipeline
Automatic Mode without Data Pipeline
If Automatic Mode without Pipeline is selected the result of the actual conversion is shifted into the ADC Data
Register DATAREG. The acquisition and conversion time in this mode is 32ms.
12
START
Write access to the ADC Control Register
starts automatically the conversion after the
settling time has expired and shifts the result
into the ADC Data Register.
select new
gain & channel
Auto active
ADC
BUSY
Bit1 of the ADC Status Register indicates ADC
busy during the whole cycle.
?
y
n
read data of
conversion (n)
Figure 16
Read data of the actual conversion from the
ADC Data Register
Flowchart Automatic Mode without Data Pipeline
Normal Mode
The Normal Mode is enabled by setting bit 7 of the ADC Control Register CONTREG to `0`. A write access to
the ADC Control Register CONTREG with bit 7 set to '0' ( Normal Mode enabled ) selects a new channel and
gain for the next conversion. As long as the settling time expires bit 0 of the ADC Status Register STATREG (
settle busy flag ) reads as `1`. After the settling time has expired a conversion can be started by writing to the ADC
Convert Start Register CONVERT. To achieve higher conversion rates it is possible to select a new channel and
gain for the next conversion after the previous conversion has been started. In this mode the settling time for the
new channel and the conversion time of the actual channel proceed simultaneously. As long as bit 1 of the ADC
Status Register STATREG ( ADC busy flag ) reads as `1` conversion is in progress. Reading bit 1 of the ADC
Status Register as `0`indicates that the conversion result is accessible in the ADC Data Register DATAREG.
If interrupts are enabled two interrupts will be generated: the first interrupt at the end of the settling time, the
second interrupt at the end of conversion.
13
State Diagram Normal Mode
ADC busy = 1
Settle busy = 1
SETTLE_
BUSY
ADC
BUSY
A
C
B
D
RESET
A: Write access to
CONTREG
B: Settling time
expired
C: Write access to
CONVERT
D: ADC ready, conversion result
in ADC Data Register
IDLE
no cycle
next
Figure 17
State Diagram Normal Mode
Normal Mode with Data Pipeline
If Normal Mode with Pipeline is selected during conversion N the result of conversion N-1 is shifted into the ADC
Data Register DATAREG. In this mode it is possible that the settling time and conversion time simultaneous
proceed. The acquisition and conversion time in this mode is 12ms with no change of channel / gain and 14.5ms
with change of channel / gain.
14
START
Write access to ADC Control Register.
select gain & channel
Pipeline active
Read bit 0 of ADC Status Register to check for
end of settling time.
SETTLE
BUSY
?
y
n
Write access to ADC Start Convert Register
starts conversion N and shifts result of
conversion N-1 into the ADC Data Register.
start conversion
Select a new channel and a new gain
during conversion proceeds by a write
access to the ADC Control Register.
select new gain & new
channel
Pipeline active
ADC BUSY
?
y
Read bit1 of the ADC Status Register
to check for end of conversion.
n
Read result of the conversion N-1
from ADC Data Register.
read data of
conversion N-1
Figure 18
Flowchart Normal Mode with Data Pipeline
Note: For conversions without channel and gain change it is not necessary to observe the settle busy flag of the
ADC Status Register.
Normal Mode without Data Pipeline
If Normal Mode without Pipeline is selected the result of the actual conversion is shifted into the ADC Data
Register DATAREG. In this mode it is possible that the settling time and conversion time simultaneous proceed.
The acquisition and conversion time in this mode is 22µs.
15
START
Write access to ADC Control Register
select gain & channel
SETTLE BUSY
?
y
Read bit 0 of ADC Status Register to check
end of settling
for
time.
n
Write access to ADC Start Convert
starts conversion and shifts result of
Register
into
the ADC Data
conversion
Register.
start conversion
Select a new channel and a new
during
gain conversion proceeds by a
access
write to the ADC Control
Register.
select new gain &
channel
ADC
BUSY
y
?
Read bit1 of the ADC Status
to
check for end of
Register
conversion.
n
read data of
conversion
Figure 19
Read result of the conversion
ADC Data
from
Register.
Flowchart Normal Mode without Data Pipeline
Note: For conversions without channel and gain change it is not necessary to observe the settle busy flag of the
ADC Status Register.
16
IP I/O connector
Analog Input Connections
Mode
Pin Number
Single Ended
Differential
01
ADC Input 1
ADC Input 1 +
02
ADC Input 9
ADC Input 1 -
03
AGND
AGND
04
ADC Input 10
ADC Input 2 -
05
ADC Input 2
ADC Input 2 +
06
AGND
AGND
07
ADC Input 3
ADC Input 3 +
08
ADC Input 11
ADC Input 3 -
09
AGND
AGND
10
ADC Input 12
ADC Input 4 -
11
ADC Input 4
ADC Input 4 +
12
AGND
AGND
13
ADC Input 5
ADC Input 5 +
14
ADC Input 13
ADC Input 5 -
15
AGND
AGND
16
ADC Input 14
ADC Input 6 -
17
ADC Input 6
ADC Input 6 +
18
AGND
AGND
19
ADC Input 7
ADC Input 7 +
20
ADC Input 15
ADC Input 7 -
21
AGND
AGND
22
ADC Input 16
ADC Input 8 -
23
ADC Input 8
ADC Input 8 +
24
AGND
AGND
Figure 20
IP-OptoAD16 Analog Input Connections
17
Power Input Connections
Figure 21
Pin Number
Function
44
AGND
45
-15V
46
AGND
47
+15V
48
AGND
49
+5V
50
AGND
IP-OptoAD16 Power Input Connections
Note: The power input connections are reserved for special versions of the IP-OptoAD16 without on board
DC/DC converter.
18
Specifications
Logic Interface
IndustryPack Logic Interface
Size
single wide IP
I/O Interface
50-conductor flat cable
Analog Inputs
16 single ended channels or
8 differential channels
Input Isolation
All channels are galvanically isolated from
the IP Interface. DC/DC converter on board.
Input Gain Amplifier
Programmable for gain 1, 2, 5, 10 (IP-OptoAD16-BPV-1/UPV-2)
Programmable for gain 1, 2, 4, 8 (IP-OptoAD16-BPV-2/UPV-2)
Input Voltage Range
IP-OptoAD16-BPV-1:
±10V, 0V to 10V
±5V ,
0V to 5V
±2V ,
0V to 2V
±1V ,
0V to 1V
IP-OptoAD16-UPV-1:
(gain = 1)
(gain = 2)
(gain = 5)
(gain = 10)
IP-OptoAD16-BPV-2:
±10V, 0V to 10V
±5V,
0V to 5V
±2.5V, 0V to 2.5V
±1.25V, 0V to 1.25V
IP-OptoAD16-UPV-2:
(gain = 1)
(gain = 2)
(gain = 4)
(gain = 8)
Input Over Voltage
Input over voltage protection up to 70V p-p
Input ADC
16 bit ADC; data acquisition and conversion time up to 12ms
without channel / gain change and up to 14.5ms with channel / gain
change (mode dependent).
Calibration Data
Calibration data for gain and offset correction in ID PROM
Accuracy
± 4LSB, after calibration for all IP-OptoAD16 Modules.
Linearity
± 4LSB for all IP-OptoAD16 Modules
No Missing Code
Minimum 15 LSB
Wait States
IDSEL 1 wait state
IOSEL 0 wait state
INTSEL 0 wait state
Power Requirements
typ. 310 mA @ 5V
Temperature Range
Specification -25°C to 85°C
Operating -40°C to 85°C
Storage -45°C to 125°C
Humidity5 - 95% non-condensing
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Warranty and Repair
SBS GreenSpring warrants this product to be free from defects in workmanship and materials under normal use
and service and in its original, unmodified condition, for a period of one year from the time of purchase. If the
product is found to be defective within the terms of this warranty, SBS GreenSpring's sole responsibility shall be to
repair, or at SBS GreenSpring's sole option to replace, the defective product. The product must be returned by the
original customer, insured, and shipped prepaid to SBS GreenSpring. All replaced products become the sole
property of SBS GreenSpring.
SBS GreenSpring's warranty of and liability for defective products is limited to that set forth herein. SBS
GreenSpring disclaims and excludes all other product warranties and product liability, expressed or implied,
including but not limited to any implied warranties of merchantability or fitness for a particular purpose or use,
liability for negligence in manufacture or shipment of product, liability for injury to persons or property, or for any
incidental or consequential damages.
SBS GreenSpring’s products are not authorized for use as critical components in life support devices or systems
without the express written approval of the president of SBS GreenSpring.
Service Policy
Before returning a product for repair, verify as well as possible that the suspected unit is at fault. Then call the
Customer Service Department for a RETURN MATERIAL AUTHORIZATION (RMA) number. Carefully
package the unit, in the original shipping carton if this is available, and ship prepaid and insured with the RMA
number clearly written on the outside of the package. Include a return address and the telephone number of a
technical contact. For out-of-warranty repairs, a purchase order for repair charges must accompany the return. SBS
GreenSpring will not be responsible for damages due to improper packaging of returned items. For service on SBS
GreenSpring products not purchased directly from SBSGreenSpring, contact your reseller. Products returned to
SBS GreenSpring for repair by other than the original customer will be treated as out-of-warranty.
Out of Warranty Repairs
Out of warranty repairs will be billed on a material and labor basis. The current minimum repair charge is $100.
Customer approval will be obtained before repairing any item if the repair charges will exceed one half of the
quantity one list price for that unit. Return transportation and insurance will be billed as part of the repair and is in
addition to the minimum charge.
For Service Contact:
Customer Service Department
SBS GreenSpring Modular I/O
181 Constitution Drive
Menlo Park, CA 94025
(415) 327-1200
FAX: (415) 327-3808
email: support@greenspring.com
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