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GE
Intelligent Platforms
Programmable Control Products
Series 90
*-70 PLC
CPU Instruction Set
Reference Manual
GFK-0265J
March 2010
Warnings, Cautions, and Notes as Used in this Publication
GFL-002
Warning
Warning notices are used in this publication to emphasize that hazardous voltages, currents, temperatures, or other conditions that could cause personal injury exist in this equipment or may be associated with its use.
In situations where inattention could cause either personal injury or damage to equipment, a Warning notice is used.
Caution
Caution notices are used where equipment might be damaged if care is not taken.
Note: Notes merely call attention to information that is especially significant to understanding and operating the equipment.
This document is based on information available at the time of its publication. While efforts have been made to be accurate, the information contained herein does not purport to cover all details or variations in hardware or software, nor to provide for every possible contingency in connection with installation, operation, or maintenance. Features may be described herein which are not present in all hardware and software systems. GE Intelligent Platforms assumes no obligation of notice to holders of this document with respect to changes subsequently made.
GE Intelligent Platforms makes no representation or warranty, expressed, implied, or statutory with respect to, and assumes no responsibility for the accuracy, completeness, sufficiency, or usefulness of the information contained herein. No warranties of merchantability or fitness for purpose shall apply.
* indicates a trademark of GE Intelligent Platforms, Inc. and/or its affiliates. All other trademarks are the property of their respective owners.
©Copyright 2010 GE Intelligent Platforms, Inc.
All Rights Reserved
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Preface
This manual describes the system operation, fault handling, and Logicmaster 90-70 programming instructions for the Series 90™-70 programmable controller. The Series 90-70 PLC is a member of the Series 90™ family of programmable logic controllers from GE Intelligent Platforms Automation.
Revisions to This Manual
The following changes have been made to this manual to reflect feature changes, corrections, and updates to existing information:
•
•
•
•
•
•
•
•
•
References made to CPX and CGR model CPUs, where appropriate, throughout the
ý` ` ` ` `
Value for Constant Sweep timer corrected (chapter 2, pg. 2-46).
Note added after Table 2-18 regarding CPU Mode switch and description of privilege level 1 updated in table. (chapter 2, page 2-79)
Description of System Faults updated (chapter 3, pg. 3-2)
Chapters 4 through 12 contain information that was presented in a single chapter (Chapter
4) in previous versions. This information has been divided into separate chapters to improve access to the programming instruction descriptions.
Appendix A, CPU Performance Data, tables revised (all information not available, will be added to a future version)
Paragraph added , beginning with “Each Ethernet Global . . . . “, page A-24
Section titled “Relative CPU Test Performance” added at end of Appendix A
Other corrections and clarifications as necessary
Content of This Manual
Chapter 1. Introduction: provides an overview of the Series 90-70 PLC system and the Series
90-70 instruction set.
Chapter 2. System Operation: describes certain system operations of the Series 90-70 PLC system. This includes a discussion of the PLC system sweep sequences, the system power-up and power-down sequences, clocks and timers, security, I/O, and fault handling. It also includes general information for a basic understanding of programming ladder logic.
Chapter 3. Fault Explanations and Correction: provides troubleshooting information for a
Series 90-70 PLC system. It explains fault descriptions in the PLC fault table and fault categories in the I/O fault table.
Chapters 4 — 12. Series 90-70 Instruction Set: describes programming instructions available for Series 90-70 PLCs. These chapters correspond to the main program function groups.
iv GFK-0265J
Preface
Appendix A. CPU Performance Data: lists the memory size in bytes and the execution time in microseconds for each programming instruction. Memory size is the number of bytes required by the function in a ladder diagram application program. Appendix A also contains timing information for other PLC tasks which, when used in conjunction with the instruction timings, can be used to predict CPU sweep times. Refer to Appendix F for IEEE format when dealing with floating-point math operations.
Appendix B. Interpreting Fault Tables: describes how to interpret the message structure format when reading the fault tables using Logicmaster 90-70 software.
Appendix C. Instruction Mnemonics: lists mnemonics that can be typed to display programming instructions while searching or editing a program. Provides a worksheet for use in determining the total number of bytes of user data used and how much is still available for the user program.
Appendix D. Memory Allocation: provides a worksheet for determining the total number of bytes of user data used and how much is still available for the user program.
Appendix E. Key Functions: lists the special keyboard assignments used for the Logicmaster 90 software.
Appendix F. Using Floating-Point Numbers: describes special considerations for using floating-point math operations.
GFK-0265J Series 90™-70 PLC CPU Instruction Set Reference Manual–January 2000 v
Preface
Related Publications
Logicmaster™ 90-70 Programming Software User’s Manual (GFK-0263).
Logicmaster
™
90-70 Important Product Information (GFK-0350).
Series 90
™
-70 Programmable Controller Installation Manual (GFK-0262).
Series 90
™
Programmable Coprocessor Module and Support Software User’s Manual
(GFK-0255) .
Series 90
™
PCM Development Software (PCOP) User’s Manual (GFK-0487).
C Programmer’s Toolkit for Series 90™-70 PLCs User’s Manual (GFK-0646).
Series 90
™
Sequential Function Chart Programming Language User’s Manual (GFK-0854).
MegaBasic
™
Programming Language Reference Manual (GFK-0256).
CIMPLICITY
™
90-ADS Alphanumeric Display System User’s Manual (GFK-0499).
CIMPLICITY
™
90-ADS Alphanumeric Display System Reference Manual (GFK-0641).
Alphanumeric Display Coprocessor Module Data Sheet (GFK-0521).
Series 90™-70 Genius I/O System User’s Manual (GEK-90486-1).
Series 90™-70 Genius I/O Analog and Discrete Blocks User’s Manual (GEK-90486-2).
Workmaster® II PLC Programming Unit Guide to Operation (GFK-0401).
Series 90
™
-70 Genius Bus Controller User’s Manual (GFK-0398).
Series 90-70 FIP Bus Controller User’s Manual (GFK-1038).
Guidelines for the Selection of Third-Party VME Modules (GFK-0448).
Series 90™ Ethernet Communications User’s Manual (GFK-0868).
Series 90™ MAP 3.0 Communications User’s Manual (GFK-0869).
TCP/IP Ethernet Communications for the Series 90 PLC User's Manual (GFK-1541)
vi Preface GFK-0265J
Contents
Chapter 1
Chapter 2
GFK-0265J
Introduction..................................................................................................... 1-1
Software Architecture............................................................................................. 1-1
Terminology Used in This Manual.......................................................................... 1-1
Fault Handling........................................................................................................ 1-2
Hardware Configuration ......................................................................................... 1-2
Using This Manual ................................................................................................. 1-2
System Operation ............................................................................................ 2-1
Section 1: Basic PLC Sweep Summary.......................................................... 2-2
Basic PLC Sweep ......................................................................................................... 2-3
Housekeeping......................................................................................................... 2-4
Input Scan .............................................................................................................. 2-4
Application Program Task Execution (Logic Window) ........................................... 2-5
Output Scan............................................................................................................ 2-5
Programmer Communications Window .................................................................. 2-6
System Communications Window .......................................................................... 2-7
Background Window.............................................................................................. 2-7
Window Modes ............................................................................................................ 2-8
Data Coherency in Communications Windows ....................................................... 2-8
CPU Sweep in STOP Mode.................................................................................... 2-9
PLC Sweep Modes ............................................................................................... 2-10
Section 2: User Reference Data.....................................................................2-11
User References.......................................................................................................... 2-11
Indirect References............................................................................................... 2-11
User Reference Size and Default................................................................................. 2-14
%G User References and CPU Memory Locations................................................ 2-15
Genius Global Data .................................................................................................... 2-15
Transitions and Overrides ........................................................................................... 2-16
Retentiveness of Logic and Data ................................................................................. 2-16
Data Scope ................................................................................................................. 2-18
Data Types ................................................................................................................. 2-19
System Status References ........................................................................................... 2-20
Other References .................................................................................................. 2-25
Section 3: Program Organization .................................................................2-27
Ladder Logic Programming ........................................................................................ 2-28
Main Block .......................................................................................................... 2-29
Blocks .................................................................................................................. 2-30
Examples of Using Blocks .................................................................................. 2-30
How Blocks Are Called....................................................................................... 2-33
Parameterized Subroutine Blocks................................................................................ 2-35
Parameterized Subroutine Blocks and Local Data ................................................. 2-35
How Parameterized Subroutine Blocks Are Called................................................ 2-36
vii
Contents viii
Referencing Formal Parameters Within a Parameterized Subroutine Block ........... 2-37
Restrictions on Formal Parameters within a Parameterized Subroutine Block........ 2-38
BIT Type Parameters in PSBs .............................................................................. 2-38
External Blocks .......................................................................................................... 2-39
How External Blocks Are Called .......................................................................... 2-39
External Blocks and Local Data............................................................................ 2-40
Local Data Initialization ....................................................................................... 2-40
Standalone C Programs............................................................................................... 2-41
Data Encapsulation............................................................................................... 2-41
Input/Output Specifications................................................................................. 2-42
Standalone C Programs and Local Data ................................................................ 2-44
Local Data Initialization ...................................................................................... 2-44
Referencing I/O Specification Data Within a Standalone C Program..................... 2-45
Data Coherency of I/O Specifications.................................................................. 2-45
Using LD vs. Standalone C Programs ......................................................................... 2-46
Differences in Operation: LD and Standalone C Programs .................................... 2-46
Retentiveness of Data.......................................................................................... 2-46
Global Data ........................................................................................................ 2-47
Interrupt Execution ............................................................................................. 2-47
Queuing of Interrupts .......................................................................................... 2-47
System Status References.................................................................................... 2-47
Section 4: PLC Sweep Modes and Program Scheduling Modes.................2-48
Normal Sweep Mode .................................................................................................. 2-48
Constant Sweep Mode ................................................................................................ 2-49
Constant Window Mode ............................................................................................. 2-50
Microcycle Sweep Mode............................................................................................. 2-51
Microcycle Sweep Mode Output Scan Estimation................................................. 2-53
Output Scan Estimation for Pre-Release 7.00 CPUs ............................................. 2-53
Output Scan Estimation for Release 7.00 and Later CPUs .................................... 2-54
Choosing PLC Sweep and Program Scheduling Modes ............................................... 2-56
User Program Execution....................................................................................... 2-56
User Program Priorities....................................................................................... 2-56
User Program Execution in Normal Sweep, Constant Sweep, and Constant Window
Modes................................................................................................................. 2-57
User Program Execution in Microcycle Sweep Mode............................................ 2-60
Interrupt Handling ...................................................................................................... 2-64
Interrupt Handling and Scheduling with Blocks .................................................... 2-64
I/O Interrupt Blocks.............................................................................................. 2-65
Timed Interrupt Blocks......................................................................................... 2-66
Interrupt Handling and Scheduling with User Programs .............................................. 2-67
I/O-Triggered Programs........................................................................................ 2-67
Timed Programs ................................................................................................... 2-68
Interrupt Blocks vs. Interrupt Programs....................................................................... 2-69
Series 90™-70 PLC CPU Instruction Set Reference Manual–January 2000 GFK-0265J
Contents
GFK-0265J
Section 5: Run/Stop Operations...................................................................2-70
Modes of Operation .................................................................................................... 2-70
Mode Transitions........................................................................................................ 2-71
Stop-to-Run Transition ......................................................................................... 2-71
Run-to-Stop Transition ......................................................................................... 2-71
Wind-Down Period for Microcycle Sweep Mode................................................. 2-71
Section 6: Power-Up and Power-Down Sequences.......................................2-72
Power-Up ................................................................................................................... 2-72
Power-Up Self-Test .............................................................................................. 2-72
PLC Memory Validation ...................................................................................... 2-72
System Configuration........................................................................................... 2-73
Intelligent Option Module Self-Test Completion................................................... 2-73
Intelligent Option Module Dual Port Interface Tests ............................................. 2-73
I/O System Initialization....................................................................................... 2-74
Power-Down Sequence............................................................................................... 2-74
Retention of Data Memory Across Power Failure........................................................ 2-75
Section 7: Clocks and Timers........................................................................2-76
Elapsed Time Clock.................................................................................................... 2-76
Time-of-Day Clock..................................................................................................... 2-76
Watchdog Timer ......................................................................................................... 2-77
Software Watchdog Timer .................................................................................... 2-77
Hardware Watchdog Timer................................................................................... 2-77
Section 8: System Security ............................................................................2-78
Passwords and Privilege Levels .................................................................................. 2-78
Protection Level Request from Programmer.......................................................... 2-79
Disabling Passwords............................................................................................. 2-80
OEM Protection.......................................................................................................... 2-80
Write Protect Keyswitch ............................................................................................. 2-80
Section 9: Series 90-70 PLC I/O System.......................................................2-81
I/O Data Mapping....................................................................................................... 2-82
Default Conditions ............................................................................................... 2-82
Genius I/O .................................................................................................................. 2-82
Genius I/O Bus Configuration .............................................................................. 2-82
Genius I/O Data Mapping..................................................................................... 2-82
Analog Grouped Block......................................................................................... 2-83
Low-Level Analog Blocks.................................................................................... 2-83
Default Conditions ............................................................................................... 2-83
Genius Global Data Communications ......................................................................... 2-84
FIP I/O ....................................................................................................................... 2-84
FIP I/O Bus Configuration.................................................................................... 2-84
FIP I/O Data Mapping .......................................................................................... 2-85
Contents ix
Contents x
Chapter 3
Default Conditions ............................................................................................... 2-85
Diagnostic Data Collection ......................................................................................... 2-85
Discrete I/O Diagnostic Information ........................................................................... 2-86
Analog I/O Diagnostic Data........................................................................................ 2-86
Fault Explanation and Correction.................................................................. 3-1
Section 1: System Handling of Faults (General) ........................................... 3-2
System Fault References ............................................................................................... 3-3
Configurable Fault Actions ........................................................................................... 3-4
Non-Configurable Faults .............................................................................................. 3-5
Fault Contacts............................................................................................................... 3-6
Fault Locating References (Rack, Slot, Bus, Module).................................................... 3-7
Format of Fault References..................................................................................... 3-7
Behavior of Fault References.................................................................................. 3-8
Alarm Contacts............................................................................................................. 3-8
Point Faults .................................................................................................................. 3-9
Section 2: Fault Handling .............................................................................3-10
Alarm Processor ......................................................................................................... 3-10
Classes of Faults ......................................................................................................... 3-11
System Reaction to Faults........................................................................................... 3-11
Fault Tables.......................................................................................................... 3-11
Fault Action ......................................................................................................... 3-12
Fault Response ..................................................................................................... 3-12
PLC Fault Table ......................................................................................................... 3-13
User-Defined Faults.................................................................................................... 3-13
I/O Fault Table ........................................................................................................... 3-14
Accessing Additional Fault Information...................................................................... 3-15
Section 3: PLC Fault Table Explanations ....................................................3-16
Configurable Faults .................................................................................................... 3-17
Loss of or Missing Rack ............................................................................................. 3-17
Loss of or Missing Option Module.............................................................................. 3-18
Addition of or Extra Rack........................................................................................... 3-21
Reset of, Addition of, or Extra Option Module............................................................ 3-21
System Configuration Mismatch ................................................................................. 3-22
System Bus Error........................................................................................................ 3-25
PLC CPU Hardware Failure........................................................................................ 3-26
Module Hardware Failure ........................................................................................... 3-26
Option Module Software Failure................................................................................. 3-27
Program or Block Checksum Failure........................................................................... 3-28
Low Battery Signal ..................................................................................................... 3-28
Constant Sweep or Microcycle Time Exceeded........................................................... 3-29
Series 90™-70 PLC CPU Instruction Set Reference Manual–January 2000 GFK-0265J
Contents
Chapter 4
PLC System Fault Table Full ...................................................................................... 3-29
I/O Fault Table Full .................................................................................................... 3-29
Application Fault ........................................................................................................ 3-30
Non-Configurable Faults ............................................................................................ 3-31
System Bus Failure..................................................................................................... 3-32
No User Program on Power-Up................................................................................... 3-32
Corrupted User Program on Power-Up........................................................................ 3-33
Window Completion Failure....................................................................................... 3-34
Password Access Failure............................................................................................. 3-34
Null System Configuration for Run Mode................................................................... 3-34
PLC CPU System Software Failure............................................................................. 3-35
Too Many Bus Controllers.......................................................................................... 3-36
Communications Failure During Store ........................................................................ 3-36
Run Mode Store Failure.............................................................................................. 3-37
Section 4: I/O Fault Table Explanations ......................................................3-38
Circuit Fault ............................................................................................................... 3-41
Discrete Fault ............................................................................................................. 3-42
Analog Fault............................................................................................................... 3-43
Low-Level Analog Fault............................................................................................. 3-44
GENA Fault ............................................................................................................... 3-45
Loss of IOC (I/O Controller)....................................................................................... 3-45
Addition of IOC (I/O Controller) ................................................................................ 3-45
Loss of I/O Module..................................................................................................... 3-46
Addition of I/O Module .............................................................................................. 3-46
Extra I/O Module........................................................................................................ 3-46
Loss of Block ............................................................................................................. 3-47
Addition of Block ....................................................................................................... 3-47
Extra Block................................................................................................................. 3-47
I/O Bus Fault .............................................................................................................. 3-48
Module Fault .............................................................................................................. 3-49
IOC (I/O Controller) Software Fault ........................................................................... 3-49
IOC (I/O Controller) Hardware Failure ....................................................................... 3-50
Forced and Unforced Circuit ....................................................................................... 3-50
Block Switch .............................................................................................................. 3-50
Relay Functions ............................................................................................... 4-1
Using Contacts ............................................................................................................. 4-2
Using Coils................................................................................................................... 4-3
Normally Open Contact –| |– ..................................................................................... 4-4
Normally Closed Contact –|\|–................................................................................... 4-4
Positive Transition Contact –|
↑
|– .............................................................................. 4-4
Negative Transition Contact –|
↓
|– ............................................................................. 4-4
GFK-0265J Contents xi
Contents xii
Chapter 5
Chapter 6
Chapter 7
Chapter 8
Fault Contact –[FAULT]–......................................................................................... 4-7
No Fault Contact –[NOFLT]– ................................................................................... 4-7
High Alarm Contact –[HIALR]–............................................................................... 4-7
Low Alarm Contact –[LOALR]– .............................................................................. 4-7
Coil –( )– .................................................................................................................. 4-8
Negated Coil –(/)– .................................................................................................... 4-8
Retentive Coil –(M)– ................................................................................................ 4-8
Negated Retentive Coil –(/M)– ................................................................................. 4-8
Positive Transition Coil –(
↑
)–................................................................................... 4-9
Negative Transition Coil –(
↓
)– ................................................................................. 4-9
SET Coil –(S)– ....................................................................................................... 4-10
RESET Coil –(R)–.................................................................................................. 4-10
Retentive SET Coil –(SM)– .................................................................................... 4-11
Retentive RESET Coil –(RM)–............................................................................... 4-11
Links .......................................................................................................................... 4-11
Continuation Coils (– – –<+>) and Contacts (<+>– – –) .................................... 4-12
Timers and Counters....................................................................................... 5-1
Function Block Data Required for Timers and Counters................................................ 5-1
ONDTR........................................................................................................................ 5-3
OFDT........................................................................................................................... 5-6
TMR ............................................................................................................................ 5-9
UPCTR ...................................................................................................................... 5-12
DNCTR...................................................................................................................... 5-14
Math Functions ............................................................................................... 6-1
MATH (ADD, SUB, MUL, DIV).............................................................................. 6-2
MOD (INT, UINT, DINT) ........................................................................................ 6-4
SQRT (INT, DINT, REAL) ...................................................................................... 6-6
ABS (INT, DINT, REAL)......................................................................................... 6-8
Trig Functions (SIN, COS, TAN, ASIN, ACOS, ATAN) ........................................ 6-10
Logarithmic/Exponential Functions (LOG, LN, EXP, EXPT).................................. 6-12
Radian Conversion (RAD, DEG) ............................................................................ 6-14
Relational Functions........................................................................................ 7-1
EQ, NE, GT, GE, LT, and LE (INT, UINT, DINT, REAL) ....................................... 7-2
CMP (INT, UINT, DINT, REAL) ............................................................................. 7-4
RANGE (INT, UINT, DINT, WORD, DWORD) ...................................................... 7-6
Bit Operation Functions.................................................................................. 8-1
AND and OR (WORD, DWORD) ............................................................................ 8-3
XOR (WORD, DWORD) ......................................................................................... 8-5
Series 90™-70 PLC CPU Instruction Set Reference Manual–January 2000 GFK-0265J
Contents
NOT (WORD, DWORD).......................................................................................... 8-7
SHL and SHR (WORD, DWORD) ........................................................................... 8-9
ROL and ROR (WORD, DWORD)......................................................................... 8-12
BTST (WORD, DWORD) ...................................................................................... 8-14
BSET and BCLR (WORD, DWORD)..................................................................... 8-16
BPOS (WORD, DWORD)...................................................................................... 8-18
MCMP (WORD, DWORD) .................................................................................... 8-20
Chapter 9 Data Move Functions ...................................................................................... 9-1
MOVE (INT, UINT, DINT, BIT, WORD, DWORD, REAL) .................................... 9-2
BLKMOV (INT, UINT, DINT, WORD, DWORD, REAL)....................................... 9-4
BLKCLR (WORD)................................................................................................... 9-6
SHFR (BIT, WORD, DWORD)................................................................................ 9-8
BITSEQ (BIT)........................................................................................................ 9-11
SWAP (WORD, DWORD)..................................................................................... 9-15
COMMREQ ............................................................................................................... 9-17
VMERD (BYTE, WORD) ...................................................................................... 9-25
VMEWRT (BYTE, WORD)................................................................................... 9-27
VMERMW (BYTE, WORD).................................................................................. 9-29
VMETST (BYTE, WORD)..................................................................................... 9-31
VME_CFG_RD.......................................................................................................... 9-34
VME_CFG_WRITE................................................................................................... 9-37
DATA_INIT (INT, UINT, DINT, WORD, DWORD, REAL) ................................. 9-40
Zooming into the DATA_INIT_type Function Block............................................ 9-42
DATA_INIT_COMM................................................................................................. 9-43
Zooming into the DATA_INIT_COMM Function Block ...................................... 9-45
DATA_INIT_ASCII................................................................................................... 9-46
Zooming into the DATA_INIT_ASCII Function Block......................................... 9-47
DATA_INIT_DLAN .................................................................................................. 9-48
Chapter 10 Data Table Functions .....................................................................................10-1
Moving Values In and Out of a Table.......................................................................... 10-1
TBLRD (INT, UINT, DINT, WORD, DWORD)..................................................... 10-3
TBLWRT (INT, UINT, DINT, WORD, DWORD) ................................................. 10-5
LIFORD (INT, UINT, DINT, WORD, DWORD) ................................................... 10-7
LIFOWRT (INT, UINT, DINT, WORD, DWORD) ................................................ 10-9
FIFORD (INT, UINT, DINT, WORD, DWORD).................................................. 10-11
FIFOWRT (INT, UINT, DINT, WORD, DWORD) .............................................. 10-13
SORT (INT, UINT, WORD)................................................................................. 10-15
ARRAY_MOVE (INT, UINT, DINT, BIT, BYTE, WORD, DWORD)................. 10-17
SRCH_EQ and SRCH_NE (INT, UINT, DINT, BYTE, WORD, DWORD)
SRCH_GT and SRCH_LT SRCH_GE and SRCH_LE .......................................... 10-21
GFK-0265J Contents xiii
Contents xiv
ARRAY RANGE (INT, DINT, WORD, DWORD)............................................... 10-24
Chapter 11 Conversion Functions.....................................................................................11-1
BCD-4 (INT, UINT) ............................................................................................... 11-2
BCD-8 (DINT) ....................................................................................................... 11-4
UINT (INT, DINT, BCD-4, REAL) ........................................................................ 11-6
INT (UINT, DINT, BCD-4, REAL) ........................................................................ 11-8
DINT (INT, UINT, BCD-8, REAL) ...................................................................... 11-10
REAL (INT, UINT, DINT, BCD-4, BCD-8) ......................................................... 11-12
TRUN (INT, DINT).............................................................................................. 11-14
Chapter 12 Control Functions...........................................................................................12-1
CALL......................................................................................................................... 12-3
CALL EXTERNAL.................................................................................................... 12-4
CALL SUBROUTINE................................................................................................ 12-6
DOIO ....................................................................................................................... 12-10
SUSIO...................................................................................................................... 12-14
MCR ........................................................................................................................ 12-16
ENDMCR ................................................................................................................ 12-17
JUMP ....................................................................................................................... 12-18
LABEL..................................................................................................................... 12-19
COMMENT ............................................................................................................. 12-20
FOR, END_FOR, and EXIT ..................................................................................... 12-21
SVCREQ.................................................................................................................. 12-25
SVCREQ #1: Change/Read Constant Sweep Timer ........................................... 12-28
SVCREQ #2: Read Window Values .................................................................. 12-31
SVCREQ #3: Change Programmer Communications Window Mode and
Timer Value................................................................................................. 12-32
SVCREQ #4: Change System Communications Window Mode and Timer
Value ........................................................................................................... 12-33
SVCREQ #5: Change Background Task Window Mode and Timer Value ......... 12-34
SVCREQ #6: Change/Read Checksum Task State and Number of Words to
Checksum .................................................................................................... 12-36
SVCREQ #7: Change/Read Time-of-Day Clock State and Values ..................... 12-38
SVCREQ #8: Reset Watchdog Timer ................................................................ 12-42
SVCREQ #9: Read Sweep Time from Beginning of Sweep ............................... 12-43
SVCREQ #10: Read Folder Name ..................................................................... 12-44
SVCREQ #11: Read PLC ID ............................................................................. 12-45
SVCREQ #12: Read PLC Run State .................................................................. 12-46
SVCREQ #13: Shut Down (Stop) PLC .............................................................. 12-47
SVCREQ #14: Clear Fault Tables...................................................................... 12-48
SVCREQ #15: Read Last-Logged Fault Table Entry.......................................... 12-49
SVCREQ #16: Read Elapsed Time Clock.......................................................... 12-53
Series 90™-70 PLC CPU Instruction Set Reference Manual–January 2000 GFK-0265J
Contents
SVCREQ #17: Mask/Unmask I/O Interrupt ....................................................... 12-54
SVCREQ #18: Read I/O Override Status ........................................................... 12-56
SVCREQ #19: Set Run Enable/Disable ............................................................. 12-57
SVCREQ #20: Read Fault Tables ...................................................................... 12-58
SVCREQ #21: User-Defined Fault Logging ...................................................... 12-62
SVCREQ #22: Mask/Unmask Timed Interrupts................................................. 12-64
SVCREQ #23: Read Master Checksum ............................................................. 12-65
SVCREQ #25: Disable/Enable EXE Block and Standalone C Program
Checksums................................................................................................... 12-67
SVCREQ #26: Role Switch ............................................................................... 12-68
SVCREQ #27 and #28: Write to/Read from Reverse Transfer Area ................... 12-69
SVCREQ #32: Suspend/Resume I/O Interrupt .................................................... 12-70
SVCREQ #39: ESCM Port Status....................................................................... 12-72
Return Values ................................................................................................... 12-73
SVCREQ #44: Logic Driven Dynamic Ethernet Global Data .............................. 12-74
Service Request Function Block ........................................................................ 12-74
Returned Status Values ..................................................................................... 12-75
Details of the Service Request Commands......................................................... 12-75
Command 2 - Retrieve Local Producer ID ......................................................... 12-76
Commands 3 and 4 - Establish a Produced Exchange/Consumed Exchange........ 12-77
Format for the Establish a Produced Exchange Command.................................. 12-78
Format for the Establish a Consumed Exchange Command................................ 12-80
Commands 5 and 6 - Terminate a Produced Exchange/Consumed Exchange...... 12-82
Command 7 - Refresh Production Data Every Sweep......................................... 12-83
Additional Notes on Logic Driven Dynamic Ethernet Global Data ..................... 12-84
Exchange Status Word ...................................................................................... 12-84
PID .................................................................................................................... 12-88
Appendix A CPU Performance Data ..................................................................................A-1
Instruction Timing ....................................................................................................... A-1
Overhead Sweep Impact Time ................................................................................... A-10
What the Tables Contain...................................................................................... A-10
Base Sweep Times..................................................................................................... A-11
Programmer Sweep Impact Times.............................................................................. A-12
I/O Scan and I/O Fault Sweep Impact ........................................................................ A-14
Sweep Impact of Series 90-70 I/O Modules................................................................ A-14
Sweep Impact of Genius I/O and GBCs ..................................................................... A-17
Sweep Impact of FIP I/O and FBCs ........................................................................... A-21
Ethernet Global Data Sweep Impact........................................................................... A-24
Sweep Impact of Intelligent Option Modules ............................................................. A-26
I/O Interrupt Performance and Sweep Impact............................................................. A-27
Timed Interrupt Performance ..................................................................................... A-30
Examples of Calculating Predicted Sweep Times ....................................................... A-31
Small System....................................................................................................... A-31
Large System....................................................................................................... A-33
GFK-0265J Contents xv
Contents
Relative CPU Performance Comparison..................................................................... A-38
Test Program....................................................................................................... A-38
Interpreting the Chart ......................................................................................... A-38
Appendix B Interpreting Faults Using Logicmaster 90-70 Software.................................B-1
Appendix C Instruction Mnemonics ...................................................................................C-1
Appendix D Memory Allocation..........................................................................................D-1
Fault Tables........................................................................................................... D-2
Ethernet Global Data ............................................................................................. D-2
C Debugger Connection......................................................................................... D-2
I/O Scan Set File ................................................................................................... D-2
Module Configuration Files ................................................................................... D-2
Name Resolution Files........................................................................................... D-2
User Protocol Files ................................................................................................ D-2
User Programs....................................................................................................... D-2
User Program Memory Usage...................................................................................... D-3
Appendix E Key Functions.................................................................................................. E-1
Appendix F Using Floating-Point Numbers ....................................................................... F-1
xvi Series 90™-70 PLC CPU Instruction Set Reference Manual–January 2000 GFK-0265J
Contents
Figure 2-1. Phases of a Typical PLC Sweep.............................................................................................. 2-3
Figure 2-2. CPU Sweep in Stop/NoIO and Stop/IOScan Mode................................................................ 2-9
Figure 2-3. Typical Sweeps in Normal Sweep Mode............................................................................. 2-48
Figure 2-4. Typical Sweeps in Constant Sweep Mode........................................................................... 2-50
Figure 2-5. Typical Sweeps in Constant Window Mode........................................................................ 2-51
Figure 2-6. Typical Sweeps in Microcycle Sweep Mode ....................................................................... 2-53
Figure 2-7. Ordered Program Execution Sequence................................................................................ 2-58
Figure 2-8. Ordered, Timed, I/O-Triggered and Interrupt Block Execution Sequence............................ 2-59
Figure 2-9. Periodic Program Execution Sequence................................................................................ 2-60
Figure 2-10. Periodic and I/O-Triggered Execution Sequence ............................................................... 2-62
Figure 2-11. I/O Interrupt Block Declarations......................................................................................... 2-65
Figure 2-12. Timed Interrupt Block Declarations .................................................................................... 2-66
Figure 2-13. Series 90-70 PLC I/O Structure ........................................................................................ 2-81
Figure 12-1. Independent Term Algorithm (PIDIND) .......................................................................... 12-97
Figure A-1. Chart of Relative CPU Performance................................................................................... A-39
GFK-0265J Contents xvii
Contents
Table 2-2. Register References ............................................................................................................... 2-11
Table 2-3. Discrete References .............................................................................................................. 2-12
Table 2-3. Discrete References - Continued .......................................................................................... 2-13
Table 2-4. User Reference Sizes ........................................................................................................... 2-14
Table 2-5. Default Memory Sizes ......................................................................................................... 2-14
Table 2-6. %G References and Memory Locations ............................................................................... 2-15
Table 2-7. Data Scope of User Reference Data ..................................................................................... 2-18
Table 2-8. Data Types .......................................................................................................................... 2-19
Table 2-9. System Status References .................................................................................................... 2-21
Table 2-9. System Status References - Continued ................................................................................. 2-23
Table 2-9. System Status References - Continued ................................................................................... 2-24
Table 2-10. System Fault References...................................................................................................... 2-25
Table 2-11. Configurable Fault References ............................................................................................ 2-25
Table 2-12. Non-Configurable Faults .................................................................................................... 2-26
Table 2-13. Block Types....................................................................................................................... 2-28
Table 2-14. Coherency of I/O Specification .......................................................................................... 2-45
Table 2-15. LD vs. Standalone C Program Tradeoffs ............................................................................ 2-46
Table 2-16. Available Program Scheduling Modes in Each PLC Sweep Mode ....................................... 2-56
Table 2-17. Priority Values for Timed and I/O-Triggered Programs ...................................................... 2-57
Table 2-18. Privilege Levels ................................................................................................................. 2-79
Table 3-1. System Fault References.......................................................................................................... 3-3
Table 3-2. Fault References for Configurable Faults ................................................................................. 3-4
Table 3-3. Non-Configurable Faults ........................................................................................................ 3-5
Table 3-3. Non-Configurable – Continued ............................................................................................... 3-6
Table 3-4. Fault Reference Names ............................................................................................................ 3-7
Table 3-5. Classes of Faults................................................................................................................... 3-11
Table 3-6. Fault Attributes..................................................................................................................... 3-11
Table 3-7. Fault Actions ........................................................................................................................ 3-12
Table 3-8. Fault Category Descriptions.................................................................................................. 3-39
Table 3-8. Fault Category Descriptions - Continued.............................................................................. 3-40
Table 3-9. Circuit Fault Category Description........................................................................................ 3-41
Table 4-1. Types of Contacts ................................................................................................................... 4-2
Table 4-2. Types of Coils ........................................................................................................................ 4-3
Table 12-1. Service Request Functions ............................................................................................... 12-25
Table 12-2. General Format of SVCREQ #44 Function Block ............................................................. 12-74
Table 12-3. Command Status Possible for All Commands ................................................................... 12-75
xviii Series 90™-70 PLC CPU Instruction Set Reference Manual–January 2000 GFK-0265J
Contents
Table 12-4. Format of Set Local Producer ID Command...................................................................... 12-75
Table 12-5. Command Status for Set Local Producer ID Command ..................................................... 12-76
Table 12-6. Format of Retrieve Local Producer ID Command.............................................................. 12-76
Table 12-7. Command Status for Retrieve Local Producer ID Command ............................................. 12-76
Table 12-8. Exchange Status Word for Establish Exchange Commands ............................................... 12-77
Table 12-9. Format of the Establish a Produced Exchange Command .................................................. 12-78
Table 12-10. Command Status for the Establish a Produced Exchange Command................................ 12-79
Table 12-11. Format of the Establish a Consumed Exchange Command .............................................. 12-80
Table 12-12. Command Status for the Establish a Consumed Exchange Command.............................. 12-81
Table 12-13. Format of the Terminate Produced Exchange Command ................................................. 12-82
Table 12-14. Format of the Terminate Consumed Exchange Command ............................................... 12-82
Table 12-15. Command Status for the Terminate Exchange Commands............................................... 12-83
Table 12-16. Format of the Refresh Production Data Every Sweep Command ..................................... 12-83
Table 12-17. Command Status for Refresh Production Data Every Sweep Command........................... 12-84
Table 12-18. Format of Exchange Status Word Address ...................................................................... 12-85
Table 12-19. Exchange Status Word Values ........................................................................................ 12-85
Table 12-20. Format of Variables ........................................................................................................ 12-86
Table 12-21. Format of Timestamp Address ........................................................................................ 12-86
Table 12-22. POSIX Clock Timestamp Format.................................................................................... 12-86
Table 12-23. PLC Memory Type Formatting ....................................................................................... 12-87
Table 12-4. PID Parameters Overview................................................................................................. 12-90
Table 12-4. PID Parameters Overview - Continued............................................................................. 12-91
Table 12-5. PID Parameters Details ..................................................................................................... 12-93
Table 12-5. PID Parameters Details - Continued.................................................................................. 12-94
Table 12-5. PID Parameters Details - Continued.................................................................................. 12-95
Table A-1. Instruction Timing ................................................................................................................ A-2
Table A-1. Instruction Timing - Continued ............................................................................................. A-3
Table A-1. Instruction Timing - Continued ............................................................................................. A-4
Table A-1. Instruction Timing - Continued ............................................................................................. A-5
Table A-1. Instruction Timing - Continued ............................................................................................ A-6
Table A-1. Instruction Timing - Continued ............................................................................................. A-7
Table A-1. Instruction Timing - Continued ............................................................................................. A-8
Table A-1. Instruction Timing - Continued ............................................................................................ A-9
Table A-2. Base Sweep vs. Full Sweep Phases ..................................................................................... A-11
Table A-3. Base Sweep Times.............................................................................................................. A-12
Table A-4. Programmer Sweep Impact Times....................................................................................... A-12
Table A-5. I/O Scan Overhead ............................................................................................................. A-14
GFK-0265J Contents xix
Contents xx
Table A-6. Worksheet A: I/O Module Sweep Time.............................................................................. A-15
Table A-7. Sweep Impact Time for Model 70 I/O Modules and Racks * ............................................... A-16
Table A-7. Sweep Impact Time for Model 70 I/O Modules and Racks – Continued .............................. A-17
Table A-8. Sweep Impact Time of Genius I/O and GBCs .................................................................... A-19
Table A-9. Worksheet B: Genius I/O Sweep Time............................................................................... A-20
Table A-10. Sweep Impact Time of FIP I/O and FBCs ........................................................................ A-22
Table A-11. Worksheet B: FIP I/O Sweep Time .................................................................................. A-23
Table A-12. Worksheet: Ethernet Global Data Sweep Time ................................................................ A-25
Table A-13. Fixed Sweep Impact Times for Intelligent Option Modules ............................................. A-26
Table A-14. I/O Interrupt Block Performance and Sweep Impact Times ............................................. A-28
Table A-15. I/O-Triggered Interrupt Performance and Sweep Impact Times ....................................... A-28
Table A-16. Worksheet C: Programmer, IOM, I/O Interrupt Sweep Time ........................................... A-29
Table A-17. Timed Interrupt Performance and Sweep Impact Times ................................................... A-30
Table A-18. I/O-Triggered Interrupt Performance and Sweep Impact Times ........................................ A-31
Table A-19. Worksheet A.................................................................................................................... A-35
Table A-20. Worksheet B ................................................................................................................... A-36
Table A-21. Sample Worksheet A ....................................................................................................... A-37
Table A-22. Sample Worksheet B........................................................................................................ A-37
Table B-1. PLC Fault Groups ............................................................................................................... B-4
Table B-2. PLC Fault Actions............................................................................................................... B-5
Table B-3. Alarm Error Codes for PLC CPU Software Faults ............................................................... B-6
Table B-4. Alarm Error Codes for PLC CPU Faults.............................................................................. B-7
Table B-4. Alarm Error Codes for PLC CPU Faults - Continued............................................................. B-8
Table B-4. Alarm Error Codes for PLC CPU Faults - Continued............................................................. B-9
Table B-5. PLC Fault Extra Data – System Configuration Mismatch .................................................... B-10
Table B-6. Genius Block Model Numbers ............................................................................................ B-11
Table B-7. GENA Application ID Numbers.......................................................................................... B-12
Table B-8. Genius Installed Module I/O Types ..................................................................................... B-12
Table B-9. Genius Configured Module I/O Types................................................................................. B-12
Table B-10. Fault Specific Data - Bad Genius Bus Request .................................................................. B-13
Table B-11. PLC Fault Time Stamp...................................................................................................... B-14
Table B-12. I/O Fault Table Format Indicator Byte............................................................................... B-18
Table B-13. I/O Reference Address ...................................................................................................... B-19
Table B-14. I/O Reference Address Memory Type ............................................................................... B-19
Table B-15. I/O Fault Groups ............................................................................................................... B-20
Table B-16. PLC Fault Actions............................................................................................................. B-21
Table B-17. I/O Fault Categories .......................................................................................................... B-22
Series 90™-70 PLC CPU Instruction Set Reference Manual–January 2000 GFK-0265J
Contents
Table B-18. I/O Fault Types ................................................................................................................. B-23
Table B-18. I/O Fault Types - Continued.............................................................................................. B-24
Table B-19. I/O Fault Descriptions ....................................................................................................... B-24
Table B-19. I/O Fault Descriptions - Continued .................................................................................... B-25
Table B-20. I/O Fault Specific Data...................................................................................................... B-27
Table B-20. I/O Fault Specific Data - Continued................................................................................... B-28
Table B-21. I/O Fault Time Stamp........................................................................................................ B-28
GFK-0265J Contents xxi
Chapter
1
-
Introduction
The Series 90™-70 PLC is a member of the GE Intelligent Platforms Series 90™ PLC family of programmable logic controllers (PLCs). It is easy to install and configure, offers advanced programming features, and is designed for compatibility with other PLCs offered in the Series
90 family of PLCs. Through the use of the latest design and manufacturing technology, open architecture VME bus, and the ability to connect to Genius and FIP I/O, the Series 90-70 PLC
provides a powerful, cost-effective platform for small applications through the very largest.
This manual discusses the features of the Release 7.80, and later Series 90-70 PLC.
Software Architecture
The programming software architecture provides a platform upon which to build structured control programs. Programs may be built from many program blocks, each of which is related to a control function. Structured programs permit parallel development of a complete program as a collection of program blocks developed independently by many different individuals or OEMs.
Structured programs are also easier to understand and debug. A control program may be built of many smaller program blocks, each of which can relate to a specific machine function. This approach makes it easier to isolate and associate control logic with machine functions.
Beginning with Release 6 PLC CPUs, it has been possible to incorporate multiple programs into a folder. All of these programs can be written in C or one program can be an RLD (Relay Ladder
Diagram language) or SFC (Sequential Function Chart language) program with the remaining programs written in C. In addition, Release 6 and later PLCs have built-in debugging capabilities for C programs and external blocks. For more information on this feature, refer to the C
Programmer’s Toolkit manual (GFK-0646).
Note that Logicmaster 90-70 does not support many of the features new to release 7.0 and later
CPUs, such as Ethernet Global Data, I/O Scan Sets, VME 3 rd
party Interrupts, and Bulk Memory
Access (BMA).
Terminology Used in This Manual
The following terms are used with their defined meanings throughout this manual:
User program: any user-generated code, that is, an RLD program, an SFC program, or a standalone C program
Block: any RLD block, Parameterized Subroutine Block, or external block; an external block being either a C block or a C function block (CFBK)
GFK-0265J 1-1
1
Fault Handling
Faults are handled by a software alarm processor function that time-stamps and logs system and
I/O faults in two tables (the PLC fault table and the I/O fault table). These tables can be displayed on the programming software screen or uploaded to a host computer or other coprocessor.
Application programs can also gain access to the fault information.
Hardware Configuration
Configuration is the process of assigning logical addresses, as well as other characteristics, to the hardware modules in the system. It may be done either before or after programming; however, it is recommended that configuration be done first.
Using This Manual
This manual is distributed with Logicmaster 90 programming software, and describes the PLC hardware and programming features available in the CPU. Refer to the IPI distributed with
Logicmaster 90 for CPU and programming features not described in this version of the manual.
Reference information is available in this manual, as described below:
Appendix A lists the memory size in bytes and the execution time in microseconds for each of the programming instructions. Appendix A also contains timing information for other PLC tasks which, when used in conjunction with the instruction timings, can be used to predict CPU sweep times.
Appendix B describes how to interpret the message structure format when reading the PLC and
I/O fault tables.
Use the worksheet in Appendix C to determine the total number of bytes of user data used and how much is still available for the user program.
Refer to Appendix D for IEEE format when dealing with floating-point math operations.
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Chapter
2
System Operation
This chapter describes certain system operations of the Series 90-70 PLC system. The table displayed below summarizes the content of each section in this chapter.
Section
1
2
3
4
5
6
7
8
9
Title
Basic PLC Sweep
Summary
User Reference Data
Program Organization
PLC Sweep Modes and
Program Scheduling
Modes
Run/Stop Operations
Power-Up and Power-
Down Sequences
Clocks and Timers
System Security
Series 90-70 PLC I/O
System
Description
Describes the major steps in a typical PLC sweep, including application program task execution, Programmer
Communications Window, System Communications Window, and Background Window.
Describes user reference data, system status/fault references, and data types.
Describes the structure and use of LD blocks, PSB blocks, external blocks, and standalone C programs.
Explains Normal Sweep, Constant Sweep, Constant Window,
Microcycle Sweep, and Stop modes. Also describes Triggered
Interrupt blocks/programs and timed interrupts.
Describes the four modes of operation supported by the 90-70
PLC: Run/Outputs Enabled, Run/Outputs Disabled, Stop/IO
Scan, and Stop/No IO Scan.
Describes the three parts of system power-up (including power-up self-test, PLC operation initialization, and system configuration), the power-down sequence, and the retention of data memory.
Describes the elapsed time clock, time-of-day clock, and watchdog timers.
Describes protection level request from the programmer, including password assignment and block lock, OEM protection and password, and the write protect keyswitch.
Describes I/O data mapping and diagnostic data.
Page
2-2
2-11
2-27
2-48
2-70
2-72
2-76
2-78
2-81
GFK-0265J 2-1
2
Section 1: Basic PLC Sweep Summary
The user program(s) in the Series 90-70 PLC execute in a repetitive fashion until stopped by a command from the programmer or a command from another device or from the Run/Stop toggle switch on the CPU module. In addition to executing the user program(s), the PLC obtains data from input devices, sends data to output devices, performs internal housekeeping, services the programmer, services other communications, and performs self-tests. The sequence of operations necessary to execute these components one time is called a sweep. This section summarizes the sweep phases; for more detailed information, refer to section 4 of this chapter.
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2
Basic PLC Sweep
There are seven major phases in a typical PLC sweep as shown in the following figure:
HOUSEKEEPING
START-OF-SWEEP
INPUT SCAN
APPLICATION PROGRAM
TASK EXECUTION
(LOGICWINDOW)
OUTPUT SCAN
PROG
WINDOW
SCHEDULED
?
YES
PROGRAMMER
COMMUNICATIONS
WINDOW
NO
COMM
WINDOW
SCHEDULED
?
YES
SYSTEM
COMMUNICATIONS
WINDOW
NO
BACKGROUND
TASK
SCHEDULED
?
YES
NO
BACKGROUND
WINDOW
START NEXT SWEEP
Figure 2-1. Phases of a Typical PLC Sweep
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2
Table 2-1. Major Phases in a Typical PLC Sweep
Step Description
Housekeeping
Input Scan
Updating %S bits, determining timer update values, and determining the sweep mode occur in this phase.
The CPU reads input data from Bus controllers and input modules during this phase.
The CPU solves the logic program(s), using data obtained from the input devices and sets bits to affect the state of output devices.
Application Program Task
Execution (Logic Window)
Output Scan
Programmer Communications
Window
The CPU writes output data to Bus controllers and output modules during this phase. The user program checksum is computed during this phase of the sweep except when in Microcycle sweep mode.** Polling for faulted boards also occurs during this phase.
Communication with the programmer when using serial and WSI devices occurs here with data and/or status transfer in both directions. In addition, reconfiguration of a module or rack also occurs during this portion of the sweep.
System Communications
Window
Communications with all intelligent devices (except the Serial or WSI programmer when using a serial or WSI connection) occur during this window. For example, supplying data to a PCM* that is driving a process display would occur during this window. The Ethernet programmer communicates in the System Communications Window.
Background Task Window CPU self-tests occur in this window.
*For information about the PCM, refer to the Series 90™ Programmable Coprocessor Module and Software Support (GFK-0255).
**In Microcycle sweep mode the user program checksum is computed during the Input Scan.
Housekeeping
The housekeeping portion of the sweep performs all of the tasks necessary to prepare for the start of the sweep. This includes updating %S bits, determining timer update values, and determining the mode of the sweep (Stop or Run).
Input Scan
The scanning of the inputs occurs just prior to the logic solution. During the input scan, the CPU reads input data from the Genius Bus Controllers, FIP Bus Controllers, and Series 90-70 input modules. Also, the Ethernet Global Data for Consumed exchanges is read from the Ethernet module into PLC memory. For details, see the TCP/IP Ethernet Communications for the Series 90
PLC User’s Manual, GFK-1541.
When referring to FIP in this scan, only periodic VCOM (MPS) services are affected. Messages are received in the System Communication Window.
Series 90-70 I/O modules are scanned from lowest to highest I/O reference address. There is no guaranteed scanning order for Bus Controllers.
Note
The input scan will not be performed if a program has an active Suspend I/O function on the previous sweep.
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Application Program Task Execution (Logic Window)
The Logic Window is the phase of the sweep where user programs execute. Immediately following the completion of the input scan, the PLC Executive determines which user program(s) are to be run. Programs are then resumed and/or invoked as necessary. Solving the logic provides a new set of outputs.
Interrupt programs and blocks can execute during any phase of the sweep. Refer to section 4 for further details.
There are many ways in which program execution can be controlled to meet the system’s timing requirements. The following is a partial list of the commonly used methods:
•
JUMP functions can be used to skip portions of the logic.
•
The Suspend I/O function can be used to stop both the input scan and output scan for one sweep. I/O can be updated, as necessary, during the logic execution through the use of DO I/O instructions.
•
The Service Request function can be used to suspend or change the time allotted to the window portions of the sweep.
•
Program logic can be structured so that blocks and programs are called more or less frequently, depending on their importance and on timing constraints.
•
Microcycle sweep mode can be used to phase programs which need to run less often while limiting the logic window execution time.
A list of execution times for instructions can be found in Appendix A.
Note
In Microcycle Sweep mode, the Logic Window can be skipped or preempted as necessary by the PLC Executive.
Output Scan
Outputs are scanned immediately following logic solution. During the output scan, the CPU sends output data to the Genius Bus Controllers, FIP Bus Controllers, and Series 90-70 output modules.
Also, the PLC, as the producer in an Ethernet Global Data exchange will periodically produce new samples of data for use by the configured devices on the Ethernet network. (For details, see GFK-
1541, the TCP/IP Ethernet Communications for the Series 90 PLC User’s Manual).
Series 90-70 output modules are scanned from lowest to highest I/O reference address. Bus
Controllers are scanned from rack 0 to rack 7 and lowest to highest slot number within each rack.
Note
The output scan will not be performed if a program has an active Suspend I/O function on the current sweep.
When referring to FIP in this scan, only periodic VCOM (MPS) services are affected. Messages are received in the System Communication Window.
Polling for faulted boards also occurs during the output scan phase of the sweep. Faulted board polling recognizes replacement boards for faulted ones and reconfigures them into the system. If a board that was previously in the system or configured by the user to be in the system is listed as
GFK-0265J Chapter 2 System Operation 2-5
2-6
2
faulted, it must be polled periodically to determine if a new board has replaced it. Once a previously faulted board is detected as no longer faulted, reconfiguration is run in the Programmer
Communications Window until the board(s) are reconfigured into the system.
The background checksum calculation also occurs during the output phase of the sweep. During each output scan phase of the sweep, the configured amount of words of user program are included in the checksum calculation. This checksum helps to ensure the integrity of the user logic while the
CPU is executing. If the CPU is configured to perform a background checksum calculation (16 is the default), then this part of the output phase is performed; otherwise, it is skipped.
There are other tests performed during the Output Scan: Processor test–tests basic operation of the microprocessor and BCP Opcode test–tests basic operation of all BCP instructions.
Note
Beginning with the Release 7 CPUs, for Microcycle Sweep only, the background checksum calculation will occur during the input phase of the sweep.
Programmer Communications Window
This part of the sweep is dedicated to serial and parallel communications with the programmer and performing faulted board reconfiguration. This is also when communication with the C debugger occurs. If there is a programmer attached, a debugging session is active, or if there is a board in the system that requires reconfiguration (as detected during the faulted board polling portion of the sweep), the CPU executes the Programmer Window. The Programmer Window will not execute if there is no programmer attached, no active debug session occurring, and no board to be configured in the system. During the Programmer Window, highest priority is given to board configuration.
Boards are configured as needed, up to the total time allocated to the Programmer Window.
The built-in SNP connection and the parallel programmer connection (the two dedicated programmer ports on most systems) communicate to the CPU through the Programmer Window.
For the CPX models, there are three built-in SNP ports. All three of these communicate through the Programmer Window. The CPU will complete any previously unfinished requests and then begin to process any pending requests in the queue. When the time allocated for the window expires, processing stops.
The Programmer Window time defaults to 10 milliseconds. This value can be configured and stored to the PLC or it can be changed online using your programming software.
Time and execution of the Programmer Window can also be dynamically controlled from the user program using Service Request function #3. The Programmer Communications Window time can be set to a value from 0 to 255 milliseconds. Note that if the Programmer Communications
Window is set to 0, there are 3 ways to again open the window; perform a batteryless power-cycle, go to STOP mode, or use the parallel programming port as noted below.
Note
Even if the Programmer Window is skipped, the PLC can still respond to commands to change mode or state, or to redefine the Programmer Window if the programmer is attached through the parallel port on the Bus Transmitter Module
(BTM), or by manually putting the PLC into STOP mode.
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2
System Communications Window
The System Communications Window is the part of the sweep used for communication between the CPU and intelligent modules such as the PCM, Genius Bus Controller, FIP Bus Controller, and
TCP/IP Ethernet modules. Note that the Ethernet programmer communicates in the System
Communications Window.
At the start of the System Communications Window, the CPU will complete any previously unfinished request before executing any pending requests in the queue. When the time allocated for the window expires, processing stops.
The System Communications Window defaults to “Run to Completion” mode. This means that all currently pending requests on all intelligent option modules are processed every sweep. A different mode can be configured and stored to the PLC, or it can be changed online using your programming software.
Time and execution of the System Communications Window can also be dynamically controlled from the user program using Service Request function #4. This allows communications functions to be skipped during certain time-critical sweeps. The System Communications Window time can be set to a value from 0 to 255 milliseconds.
Background Window
A CPU self-test is performed in this window. Included in this self-test is a verification of the checksum for the 90-70 CPU operating system software.
The Background Window time defaults to 0 milliseconds. A different value can be configured and stored to the PLC, or it can be changed online using your programming software.
Time and execution of the Background Window can also be dynamically controlled from the user program using Service Request function #5. This allows background functions to be skipped during certain time-critical sweeps.
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2
Window Modes
The previous sections have described the phases of a typical PLC sweep. The Programmer
Window, System Communications Window, and Background Window phases of the PLC sweep can be run in various modes, based on the PLC Sweep mode. (PLC sweep modes are described in detail in section 4.) The following three window modes are available:
Run-to-
Completion
Constant
In Run-to-Completion mode, all requests made when the window has started are serviced. When all pending requests in the given window have completed, the PLC will transition to the next phase of the sweep.
In Constant Window mode, the total amount of time that the Programmer
Communications Window, System Communications Window, and
Background Window run is fixed. If the time expires while in the middle of servicing a request, these windows are closed, and communications will be resumed the next sweep. If no requests are pending in this window, the PLC will cycle through these windows the specified amount of time polling for further requests. If any window is put in constant window mode, all will be in constant window mode.
Limited
In Limited mode, the maximum time that the window runs is fixed. If time expires while in the middle of servicing a request, the window is closed, and communications will be resumed the next time that the given window is run. If no requests are pending in this window, the PLC will proceed to the next phase of the sweep.
Data Coherency in Communications Windows
When running in Constant or Limited Window mode, the Programmer and System
Communications Windows may be terminated early in all PLC sweep modes. If an external device, such as a GBC (Genius Bus Controller), is transferring a block of data, the coherency of the data block may be disrupted if the communications window is terminated prior to completing the request. The request will complete during the next sweep; however, part of the data will have resulted from one sweep and the remainder will be from the following sweep. When the PLC is in
Normal Sweep mode and the Communications Window is in Run-to-Completion mode, the data coherency problem described above does not exist.
Note
External devices that communicate to the PLC while it is stopped will read information as it was left in its last state. This may be misleading to operators viewing an HMI system that does not indicate PLC RUN/STOP state. Process graphics will often indicate everything is still operating normally.
Also, note that non-retentive outputs do not clear until PLC CPU is changed from
STOP to RUN.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
2
CPU Sweep in STOP Mode
The 90-70 PLC has two modes of operation while it is in Stop mode: Stop/NoIO and
Stop/IOScan
.
When the PLC is in Stop/NoIO mode the Input Scan, Logic Window, and Output Scan phases of the PLC sweep are skipped.
When the PLC is in Stop/IOScan mode the Logic Window phase of the PLC is skipped but the
Input Scan and Output Scan phases are performed each sweep.
In both Stop/NoIO and Stop/IOScan modes, the two Communications Windows run in Run-to-
Completion mode and the Background Window runs in Limited mode with a 10 millisecond limit.
START-OF-SWEEP
HOUSEKEEPING
INPUT SCAN
OUTPUT SCAN
PROGRAMMER
COMMUNICATIONS
WINDOW
SYSTEM
COMMUNICATIONS
WINDOW
BACKGROUND
WINDOW
EXECUTES
IN STOP/IOSCAN
ONLY
EXECUTES
IN STOP/IOSCAN
ONLY
RUNS
TO
COMPLETION
RUNS
TO
COMPLETION
LIMITED
(10 MS)
Figure 2-2. CPU Sweep in Stop/NoIO and Stop/IOScan Mode
Note
Stop/IOScan is not supported in Microcycle Sweep mode.
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PLC Sweep Modes
The 90-70 PLC supports four PLC sweep modes:
Normal Sweep
In Normal Sweep mode, each PLC sweep can consume a variable amount of time. The Logic Window is executed in its entirety each sweep. The
Communications and Background Windows can be set to execute in a Limited or Run-to-Completion mode.
Constant
Sweep
In Constant Sweep mode, each PLC sweep begins at a user-specified Constant
Sweep time after the previous PLC sweep began. The Logic Window is executed in its entirety each sweep. If there is sufficient time at the end of the sweep, the PLC will alternate among the Communications and Background
Windows, allowing them to execute until it is time for the next sweep to begin.
Constant
Window
In Constant Window mode, each PLC sweep can consume a variable amount of time. The Logic Window is executed in its entirety each sweep. The PLC will alternate among the Communications and Background Windows, allowing them to execute for a time equal to the user-specified Constant Window timer.
Microcycle
Sweep
In Microcycle Sweep mode, like Constant Sweep mode, each PLC sweep takes a fixed amount of time. The total sweep time (base cycle time) and the total time for the Communications and Background Windows is specified by the user. The Logic Window can be preempted in order to maintain the total sweep time and the Communications Windows and Background Window times. To satisfy the specified window times, the PLC alternates among the Programmer
Communications Window, the System Communications Window, and the
Background Window, allowing them to execute until it is time for the next sweep to begin.
Note
The information presented above summarizes the different sweep modes. For detailed information on PLC Sweep Modes, refer to “PLC Sweep Modes and
Program Scheduling Modes” in section 4 of this chapter.
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2
Section 2: User Reference Data
User References
The PLC data used in an application program is stored as either discrete or register references.
Table 2-2. Register References
Type Description
%R Use the prefix %R to assign system register references which will store program data such as the results of calculations.
%AI The prefix %AI represents an analog input register. This prefix is followed by the register address of the reference (for example, %AI0015). An analog input register holds the value of one analog input or other non-discrete value.
%AQ The prefix %AQ represents an analog output register. This prefix is followed by the register address of the reference (for example, %AQ0056). An analog output register holds the value of one analog output or other non-discrete value.
%P* Use the prefix %P to assign program register references which will store program data from the
_MAIN block. This data can be accessed from all program blocks. The size of the %P data block is based on the highest %P reference in all blocks. (For more information, refer to the Appendix
D, “Memory Allocation.”) The %P references are not normally accessible from external hosts.
%L* Use the prefix %L to assign local register references which will store program data unique to a block. The size of the %L data block is based on the highest %L reference in the associated block. (For more information, refer to Appendix D, “Memory Allocation.”) The %L references are accessible only from within the local block.
* These reference types are scoped at a program level and are therefore only visible to LD programs.
Note
All register references are retained across a power cycle to the CPU.
Indirect References
You can use indirect referencing for all register references (%R, %AI, %AQ, %P, and %L) to identify a location in memory that contains the offset in the same memory type of the data to be used. Indirect references are entered in the same way as direct references, except that the @ character is used in place of the % character. For example, if %R00101 contains the value 1000, then @R00101 would instruct the PLC to use the data location of %R01000.
Indirect references can be useful when you want to perform the same operation to many registers.
Use of indirect references can also be used to avoid repetitious ladder logic within the application program. It can be used in loop situations where each register is incremented by a constant or by a value specified until a maximum is reached.
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Table 2-3. Discrete References
Type
%I
%Q
%M
%T
Description
The %I prefix represents input references. This prefix is followed by the reference’s address in the input table (for example, %I00121). %I references are located in the input status table, which stores the state of all inputs received from input modules during the last input scan. A reference address is assigned to discrete input modules using your programming software. Until a reference address is assigned, no data will be received from the module. %I memory is always retentive.
The %Q prefix represents physical output references. The coil check function checks for multiple uses of %Q references with relay coils or outputs on functions. Beginning with Release 4 of the Logicmaster, you can select the level of coil checking desired (Single, Warn
Multiple, or Multiple).
The %Q prefix is followed by the reference’s address in the output table (for example, %Q00016). %Q references are located in the output status table, which stores the state of the output references as last set by the application program. This output status table’s values are sent to output modules at the end of the program scan. A reference address is assigned to discrete output modules using your programming software. Until a reference address is assigned, no data is sent to the module. A particular %Q reference may be either retentive or non-retentive. *
The %M prefix represents internal references. The coil check function of your programming software checks for multiple uses of %M references with relay coils or outputs on functions. A particular %M reference may be either retentive or non-retentive. *
The %T prefix represents temporary references. These references are never checked for multiple coil use and can, therefore, be used many times in the same program even when coil use checking is enabled— this is not a recommended practice because it makes subsequent trouble-shooting more difficult. %T may be used to prevent coil use conflicts while using the cut/paste and file write/include functions.
Because this memory is intended for temporary use, it is never retained through power loss or Run-to-Stop-to-Run transitions and cannot be used with retentive coils.
Retentiveness
Always retentive
Based on type of coil used
Based on type of coil used
Always non-retentive
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Table 2-3. Discrete References - Continued
Type
%S
%SA
%SB
%SC
Description
The %S, %SA, %SB, and %SC prefixes represent system status references. These references are used to access special PLC data such as timers, scan information, and fault information. For example, the
%SC0012 bit can be used to check the status of the PLC fault table.
Once the bit is set on by an error, it will not be reset until after the sweep.
•
%S, %SA, %SB, and %SC can be used on any contacts.
•
%SA, %SB, and %SC can be used on retentive coils -(M)-.
Note
Retentiveness
Retentive, yet always initialized at power-up
(See description for behavior of each individual bit in Table 2-9.)
Although the programming software forces the logic to use retentive coils with %SA,
%SB, and %SC references, most of these references are not preserved across batterybacked power cycles.
•
%S can be used as word or bit-string input arguments to functions or function blocks.
•
%SA, %SB, and %SC can be used as word or bit-string input or output arguments to functions and function blocks.
%G
%GA
%GB
%GC
%GD
%GE
The %G, %GA, %GB, %GC, %GD, and %GE prefixes represent global data references. These references are used to access data shared among several PLCs. %G, %GA, %GB, %GC, %GD, and %GE references can be used on contacts and retentive coils because the memory is always retentive. %G, %GA, %GB, %GC, %GD, and %GE cannot be used on non-retentive coils.
Always retentive
* Retentiveness is based on the type of coil. For more information, refer to “Retentiveness of Logic and Data” later in this section.
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2-14
User Reference Size and Default
Maximum user references and default reference sizes for each model of CPU are listed in the tables below.
Table 2-4. User Reference Sizes
CPU Model
Item 935/928
925/915/790 924/914 788
780/781
782/789 771/772 731/732
Maximum %I reference
Maximum %Q reference
Maximum %M reference
Maximum %T reference
%S total
(S, SA, SB, SC)
%G (GA, GB, GC,
GD, GE)
User RAM
12288 points
12288 points
12288 points
256 points
512 points
7680 points
12288 points
12288 points
12288 points
256 points
512 points
7680 points
352 points
352 points
1
1
12288 points
256 points
512 points
7680 points
12288 points
12288 points
12288 points
256 points
512 points
7680 points
2
2
2048 points
2048 points
4096 points
256 points
512 points
7680 points
2
2
512 points
512 points
2
2
2048 points
256 points
512 points
1280 points
1024K bytes
(6MB for 928)
512K bytes 512K bytes 512K bytes
(CPX 782 has
1024 KB)
CPU771/2:
64, 128, 256, 512
KB depending on expansion memory board purchased
CPX772: 512 KB
8K words
32K bytes
8K words Maximum %AI reference
Maximum %AQ reference
Maximum %R, 1K word increments
Maximum %L (per block)
8K words
8K words
16K words
8K words.
8K words
8K words
16K words
8K words
8K words
8K words
16K words
8K words
8K words
8K words
16K words
8K words
8K words
16K words
8K words
8K words
16K words
8K words
Maximum %P 8K words 8K words 8K words 8K words 8K words 8K words
1
Total number of physical input and output points together cannot exceed 352 points. This corresponds to approximately 100 redundant points. Refer to Chapter 1 of GFK-1277 for more information.
2
Prior to Release 6 of Logicmaster, the programming software restricted the total %I and %Q to the limit shown individually for each. For example, when using previous programming packages with a 782 CPU, there was a maximum of 12288 points of %1 and %Q combined.
This restriction no longer exists with the newer versions of Logicmaster.
Table 2-5. Default Memory Sizes
Memory
Type
%AI
%AQ
%R
%P
%L
935/928
925/915/790 924/914
64 words 64 words
64 words 64 words
1024 words 1024 words
0 words 0 words
0 words 0 words
CPU Model
780/781/782
788/789 781/782 771/772 731/732
64 words 64 words 64 words 64 words
64 words 64 words 64 words 64 words
1024 words 1024 words 1024 words 1024 words
0 words 0 words 0 words 0 words
0 words 0 words 0 words 0 words
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
2
%G User References and CPU Memory Locations
The Series 90-70 CPU contains only one data space for all of the global data references (%G,
%GA, %GB, %GC, %GD, and %GE). The internal CPU memory for this data is 7680 bits long.
Your programming software provides the user a subdivided representation by using %G, %GA,
%GB, %GC, %GD, and %GE prefixes—allowing each of these prefixes to be used with bit offsets in the range 1–1280. Your programming software interprets the requested global reference type
(%G, %GA, %GB, %GC, %GD, or %GE) and converts it to the %G memory type and correct bit offset for use by the CPU. The actual mapping is shown in the table displayed below.
Table 2-6. %G References and Memory Locations
Global Data
Type %G %GA %GB %GC %GD %GE
References
Used by the
Programming
Software
Memory
Locations Used by the CPU
%G1–1280 %GA1–1280 %GB1–1280 %GC1–1280 %GD1–1280 %GE1–1280
%G1–1280 %G1281–
2560
%G2561–
3840
%G3841–
5120
%G5121–
6400
%G6401–
7680
This information is useful when programming 90-70 CPU applications in C language using the C
Programmer’s Toolkit. For more information about using the C Programmer’s Toolkit, refer to the
C Programmer’s Toolkit for Series 90™ PLCs User’s Manual (GFK-0646).
Note
A 731 CPU supports only %G since it has only 1280 points of global data.
Genius Global Data
The Series 90-70 PLC supports the sharing of data among multiple PLC systems that share a common Genius I/O bus. This mechanism provides a means for the automatic and repeated transfer of %G, %I, %Q, %AI, %AQ, and %R data. No special application programming is required to use global data since it is integrated into the I/O scan. All GE Intelligent Platforms PLCs that have
Genius I/O capability can send and receive global data from a Series 90-70 PLC.
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2
Transitions and Overrides
The %I, %Q, %M, and %G user references have associated transition and override bits. %T, %S,
%SA, %SB, and %SC references have transition bits but not override bits. The CPU uses transition bits for counters, transitional contacts, and transitional coils. Note that counters do not use the same kind of transition bits as contacts and coils. Transition bits for counters are stored within the locating reference.
Caution
Do not override transitional coils. If a transitional coil is overridden and the override is then removed, the coil will come on for one sweep. This can cause unexpected consequences in the PLC ladder logic and in field devices attached to the PLC.
When override bits are set, the associated references cannot be changed from the program or the input device; they can only be changed on command from the programmer.
Retentiveness of Logic and Data
Data is defined as retentive if it is saved by the PLC when the PLC transitions from STOP mode to
RUN mode. On STOP to RUN transition, the Series 90-70 PLC preserves program logic, fault tables and diagnostics, checksums for program logic, overrides and output forces, word data (%R,
%L, %P, %AI, %AQ), and bit data (%I, %G, fault locating references, and reserved bits), and %Q and %M data (unless used with non-retentive coils). %T data is non-retentive and therefore not saved on STOP to RUN transitions.
Retentive data is also preserved during battery-backed power-cycles of the PLC CPU. Exceptions to this rule include the fault locating references and most of the %S, %SA, %SB, and %SC references. These references are initialized to zero at power-up regardless of the state of the battery. (See table 2-9 for a description of the behavior of each system status reference.)
When %Q and %M references are used with non-retentive coils, they are non-retentive (that is, cleared when the PLC transitions from Stop to Run, including power-up in Run mode). Nonretentive coils include coils -()-, negated coils -(/)-, SET coils -(S)-, and RESET coils -(R)-.
When %Q or %M references are used with retentive coils or are used as function block outputs, the contents are retained through power loss and Run-to-Stop-to-Run transitions. Retentive coils include retentive coils -(M)-, negated retentive coils -(/M)-, retentive SET coils -(SM)-, and retentive RESET coils -(RM)-.
The last time a %Q or %M reference is programmed on a coil instruction determines whether the
%Q or %M reference is retentive or non-retentive based on the coil type. For example, if %Q00001 was last programmed as the reference of a retentive coil, the %Q00001 data will be retentive.
However, if %Q00001 was last programmed on a non-retentive coil, the %Q00001 data will be non-retentive.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Note
When only standalone C programs are used, the retentive nature of data is based solely on the memory type since there are no coil instructions. In this case %Q and %M memory types are retentive.
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Data Scope
Each of the user references has “scope”; that is, it may be available throughout the system, available to all programs, restricted to a single program, or restricted to local use within a block.
Table 2-7. Data Scope of User Reference Data
User Reference
%I, %Q, %M, %T, %S, %SA, %SB,
%SC, %G, %R, %AI, %AQ, convenience references, fault locating references
%P
Range
System
%L
Scope
From any program, block, or host computer
Program From any block, but not from other programs
(also available to a host computer)
Local From within a block only (also available to a host computer)
In an LD block:
•
%P should be used for program references that are shared with other blocks.
•
%L are local references which can be used to restrict the use of register data to that block.
These local references are not available to other parts of the program.
%I, %Q, %M, %T, %S, %SA, %SB, %SC, %G, %R, %AI, and %AQ references are available throughout the system.
Appendix D contains Memory Allocation formulas for determining the total number of bytes of user data used and how much is still available for the logic.
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Data Types
Table 2-8. Data Types
Type Name Description Data Format
BOOL Boolean
BYTE
WORD
Byte
Word
A Byte data type has an 8-bit value. It has 256 values (0–255). A
BYTE array may have length N.
A Word data type uses 16 consecutive bits of data memory. The valid range of word values is 0000 hex to FFFF hex.
Register 1
(16 bit states)
16 1
DWORD Double Word A Double Word data type has the same characteristics as a single word data type, except that it uses 32 consecutive bits in data memory instead of only 16 bits.
UINT
INT
DINT
REAL
Unsigned
Integer
Signed
Integer
Double
Precision
Integer
Floating-
Point
Register 2 Register 1
32 17 16
(32 bit states)
1
Unsigned integers use 16-bit memory data locations. They have a valid range of 0 to +65535 (FFFF hex).
Register 1
(Binary value)
16 1
Signed integers use 16-bit memory data locations, and are represented in 2’s complement notation. The valid range of an INT data type is –32768 to +32767.
Double precision integers are stored in 32-bit data memory locations (two consecutive 16-bit memory locations) and are always signed values (bit 32 is the sign bit.) The valid range of a
DINT data type is –2147483648 to +2147483867.
Real numbers use 32 consecutive bits (two consecutive 16-bit memory locations). The range of numbers that can be stored in this format is from ± 1.401298E-45 to ± 3.402823E+38. Refer to
Appendix D “Using Floating-Point Math,” for IEEE format.
Register 1
S
16 1
(Two’s
Complement value) s
32
Register 2 Register 1
17 16
(Binary value)
1
Register 2
32
Register 1
17 16
(IEEE format)
1
BCD-4 Four-Digit
Binary Coded
Decimal
A Boolean data type is the smallest unit of memory. It has two states, 1 or 0. A BOOL array may have length N.
BCD-8
MIXED
Eight-
Digit Binary
Coded
Decimal
Mixed
Four-digit BCD numbers use 16-bit data memory locations. Each
BCD digit uses four bits and can represent numbers between 0 and
9. This BCD coding of the 16 bits has a legal value range of 0 to
9999.
Eight-digit BCD data types use two consecutive 16-bit data memory locations (32 consecutive bits). Each BCD digit uses 4 bits per digit to represent numbers from 0 to 9. The complete valid range of the 8-digit BCD data type is 0 to 99999999.
A Mixed data type is available only with the MUL and DIV functions. The MUL function takes two integer inputs and produces a double integer result. The DIV function takes a double integer dividend and an integer divisor to product an integer result.
Register 1
4 3 2 1
13 9 5 1
(4 BCD digits)
Register 2
8 7 6 5
32
29
25
21 17
Register 1
4 3 8 1
16 13 9 5 1
16
32
(8 BCD digits)
16
16
=
32
=
16
ASCII
ASCII Eight-bit encoded characters. A single reference is required to make up 2 (packed) ASCII characters. The first character of the pair corresponds to the low byte of the reference word. The remaining 7 bits in each section are converted. Command codes and non-displayable characters appear on the screen as nonalphanumeric characters (for example, @).
S = Sign bit (0 = positive, 1 = negative).
2
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2
Note
Using function blocks that are not explicitly bit-typed will affect transitions for all bits in the written byte/word/dword.
Also for information about using floating-point numbers, refer to Appendix D,
“Using Floating-Point Numbers.”
System Status References
System status references (formerly called “Convenience” references) in the Series 90-70 PLC are assigned to %S, %SA, %SB, and %SC memory. They each have a system-supplied nickname which enables you to enter the nickname rather than the exact %S reference. Examples of time tick references include T_10MS, T_100MS, T_SEC, and T_MIN. Examples of other system status references include FST_SCN, ALW_ON, and ALW_OFF.
Note
%S bits are read-only bits; do not write to these bits. You may, however, write to
%SA, %SB, and %SC bits.
Listed below are available system status references that may be used in an application program.
When entering logic, either the reference or the nickname can be used. Refer to Chapter 3, “Fault
Explanation and Correction,” for more detailed fault descriptions and information on correcting faults.
While it is possible to use these special names in another context, their use is restricted (for example, you cannot use them as a block name or folder name).
Note
Most references not listed in the following table (for example, %S0002) are not used for the Series 90-70 PLC. Products that have Genius Modular Redundancy
(CPU788, CPU789, and CPU790) have additional references, as does the 780
CPU and CGR935 (with CPU redundancy). Refer to GFK-1277 for status references for Genius Modular Redundancy (GMR) and GFK-1527 for CPU redundancy.
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GFK-0265J
2
Table 2-9. System Status References
Reference
%S0001
%S0003
%S0004
%S0005
%S0006
%S0007
%S0008
%S0009
%S0010
%S0011
%S0012
%S0013
%S0014
%S0121
%SA0001
%SA0002
%SA0003
%SA0009
%SA0010
%SA0011
%SA0012
Name
FST_SCN
T_10MS
T_100MS
T_SEC
T_MIN
ALW_ON
ALW_OFF
SY_FULL
IO_FULL
OVR_PRE
FRC_PRE
PRG_CHK
PLC_BAT
FST_EXE
PB_SUM
OV_SWP
APL_FLT
CFG_MM
HRD_CPU
LOW_BAT
LOS_RCK
Definition
Current sweep is the first sweep in which the LD executed. Set the first time the user program is executed after a Stop/Run transition and cleared upon completion of its execution.
NOTE: In a C stand-alone program, use a C macro to determine
FST_SCN, not %S0001.
0.01 second timer contact.
0.1 second timer contact.
1.0 second timer contact.
1.0 minute timer contact.
Always ON.
Always OFF.
Set when the PLC fault table fills up (size configurable with a default of
16 entries). Cleared when an entry is removed from the PLC fault table and when the PLC fault table is cleared.
Set when the I/O fault table fills up (size configurable with a default of
32 entries). Cleared when an entry is removed from the I/O fault table and when the I/O fault table is cleared.
Set when an override exists in %I, %Q, %M, or %G memory.
Set when force exists on a Genius point.
Set when background program check is active.
Set to indicate a bad battery in a Release 4 or later CPU. The contact is updated when a change in the battery status occurs.
Current sweep is the first time this block has been called. Set when transitioning from Stop to Run. FST_EXE is not available to standalone
C programs.
Set when a checksum calculated on the application program does not match the reference checksum. If the fault was due to a temporary failure, the condition can be cleared by again storing the program to the
CPU. If the fault was due to a hard RAM failure, then the CPU must be replaced.
To clear this bit, clear the PLC fault table or power cycle the CPU.
Set when the PLC detects that the previous sweep took longer than the time specified by the user. To clear this bit, clear the PLC fault table or power cycle the CPU. Only occurs if the PLC is in Constant Sweep or
Microcycle Sweep mode
.
Set when an application fault occurs. To clear this bit, clear the PLC fault table or power cycle the CPU.
Set when a configuration mismatch fault is logged in the fault tables. To clear this bit, clear the PLC fault table or power cycle the CPU.
Set when the diagnostics detects a problem with the CPU hardware. . To clear this bit, clear the PLC fault table or power cycle the CPU.
Set when a low battery fault occurs. To clear this bit, clear the PLC fault table or power cycle the CPU.
Set when an expansion rack stops communicating with the PLC CPU. To clear this bit, clear the PLC fault table or power cycle the CPU.
Chapter 2 System Operation 2-21
2
Note
%SA, %SB, and %SC contacts are not set or reset until the input scan phase of the sweep following the occurrence of the fault or a clearing of the fault table(s).
%SA, %SB, and %SC contacts can also be set or reset by user logic and PLC monitoring devices.
Also please note that if you have not fixed the condition that caused the fault, the fault may return immediately after power-cycling the PLC.
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Table 2-9. System Status References - Continued
Reference
%SA0013
%SA0014
%SA0015
%SA0017
%SA0018
%SA0019
%SA0020
%SA0022
%SA0023
%SA0027
%SA0029
%SA0031
%SA0032
%SA0081 –
%SA0112
%SB0001
%SB0009
Name
LOS_IOC
LOS_IOM
LOS_SIO
ADD_RCK
ADD_IOC
ADD_IOM
ADD_SIO
IOC_FLT
IOM_FLT
HRD_SIO
SFT_IOC
SFT_SIO
SBUS_ER
WIND_ER
NO_PROG
Definition
Set when a Bus Controller stops communicating with the PLC.
To clear this bit, clear the I/O fault table or power cycle the CPU.
Set when an I/O module stops communicating with the PLC CPU.
To clear this bit, clear the I/O fault table or power cycle the CPU.
Set when an option module stops communicating with the PLC CPU.
To clear this bit, clear the PLC fault table or power cycle the CPU.
Set when an expansion rack is added to the system.
To clear this bit, clear the PLC fault table or power cycle the CPU.
Set when a Bus Controller is added to a rack.
To clear this bit, clear the I/O fault table or power cycle the CPU.
Set when an I/O module is added to a rack.
To clear this bit, clear the I/O fault table or power cycle the CPU.
Set when an intelligent intelligent option module is added to a rack.
To clear this bit, clear the I/O fault table or power cycle the CPU.
Set when a Bus Controller reports a bus fault, a global memory fault, or an IOC hardware fault.
To clear this bit, clear the I/O fault table or power cycle the CPU.
Set when an I/O module reports a circuit or module fault.
To clear this bit, clear the I/O fault table or power cycle the CPU.
Set when a hardware failure is detected in an option module.
To clear this bit, clear the I/O fault table or power cycle the CPU.
Set when there is a software failure in the I/O Controller.
To clear this bit, clear the I/O fault table or power cycle the CPU.
Set when an option module detects an internal software error.
To clear this bit, clear the I/O fault table or power cycle the CPU.
Set when a bus error occurs on the VME bus backplane
To clear this bit, clear the I/O fault table or power cycle the CPU.
Set when a user-defined fault is logged in the PLC fault table.
To clear this bit, clear the PLC fault table or power cycle the CPU. For more information, see discussion of Service Request 21 in Chapter 4.
Set when there is not enough time to start the Programmer Window in
Constant Sweep or Microcycle Sweep mode, or when there is not enough time to start the Logic Window in Microcycle Sweep mode.
To clear this bit, clear the PLC fault table or power cycle the CPU.
Set when the PLC CPU powers up with memory preserved, but no user program is present. Cleared when the PLC powers up with a program present or by clearing the PLC fault table.
2
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Table 2-9. System Status References - Continued
Reference
%SB0010
%SB0011
%SB0012
%SB0013
%SB0014
%SB0016
%SB0017
%SC0009
%SC0010
%SC0011
%SC0012
%SC0013
%SC0014
%SC0015
Name
BAD_RAM
BAD_PWD
NUL_CFG
SFT_CPU
STOR_ER
MAX_IOC
SBUS_FL
ANY_FLT
SY_FLT
IO_FLT
SY_PRES
IO_PRES
HRD_FLT
SFT_FLT
Definition
Set when the CPU detects corrupted RAM memory at power-up.
Cleared when the CPU detects that RAM memory is valid at power-up or by clearing the PLC fault table.
Set when a password access violation occurs. Cleared when the PLC fault table is cleared or when the CPU is power cycled..
Set when an attempt is made to put the PLC in Run mode when there is no configuration data present.
To clear this bit, clear the PLC fault table or power cycle the CPU.
Set when the CPU detects an error in the CPU operating system software.
To clear this bit, clear the PLC fault table or power cycle the CPU.
Set when an error occurs during a programmer store operation.
To clear this bit, clear the PLC fault table or power cycle the CPU.
Set when more than 32 IOCs are configured for the system.
To clear this bit, clear the PLC fault table or power cycle the CPU.
Set when the PLC fails to gain access to the bus.
To clear this bit, clear the PLC fault table or power cycle the CPU.
Set when any fault occurs that causes an entry to be placed in the PLC or I/O fault table. Cleared when both fault tables are cleared or when the CPU is power cycled.
Set when any fault occurs that causes an entry to be placed in the PLC fault table. Cleared when the PLC fault table is cleared or when the
CPU is power cycled.
Set when any fault occurs that causes an entry to be placed in the I/O fault table. Cleared when the I/O fault table is cleared or when the
CPU is power cycled.
Set as long as there is at least one entry in the PLC fault table. Cleared when the PLC fault table is cleared.
Set as long as there is at least one entry in the I/O fault table. Cleared when the I/O fault table is cleared.
Set when a hardware fault occurs. Cleared when both fault tables are cleared or when the CPU is power cycled.
Set when a software fault occurs. Cleared when both fault tables are cleared or when the CPU is power cycled.
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Other References
The fault references are discussed in Chapter 3 of this manual but are presented here for your convenience.
Table 2-10. System Fault References
System Fault Reference
ANY_FLT
SY_FLT
IO_FLT
SY_PRES
IO_PRES
HRD_FLT
SFT_FLT
Description
Any new fault in either table since the last power-up or clearing of the fault tables
Any new system fault in the PLC fault table since the last power-up or clearing of the fault tables
Any new fault in the I/O fault table since the last power-up or clearing of the fault tables
Indicates that there is at lease one entry in the PLC fault table
Indicates that there is at least one entry in the I/O fault table
Any hardware fault
Any software fault
Table 2-11. Configurable Fault References
Configurable Faults
(Default Action
Description
SBUS_ER (diagnostic) System bus error. (The BSERR signal was generated on the VME system bus.)
SFT_IOC (diagnostic)* Non-recoverable software error in a Genius Bus Controller.
LOS_RCK (diagnostic) Loss of rack (BRM failure, loss of power) or missing a configured rack.
LOS_IOC (diagnostic)* Loss of Bus Controller missing a configured Bus Controller.
LOS_IOM (diagnostic) Loss of I/O module (does not respond) or missing a configured I/O module.
LOS_SIO (diagnostic)
IOC_FLT (diagnostic)
Loss of intelligent option module (does not respond) or missing a configured module.
Non-fatal bus or Bus Controller error—more than 10 bus errors in 10 seconds
(error rate is configurable).
CFG_MM (fatal) Wrong module type detected during power-up, store of configuration, or Run mode. The PLC does not check the configuration parameters set up for individual modules such as Genius I/O blocks.
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2-26
Table 2-12. Non-Configurable Faults
Non-Configurable
Faults (Action) Description
SBUS_FL (fatal) System bus failure. The PLC CPU was not able to access the VME bus.
BUSGRT-NMI error.
HRD_CPU (fatal)
HRD_SIO (diagnostic)
PLC CPU hardware fault, such as failed memory device or failed serial port.
Non-fatal hardware fault on any module in the system, such as the failure of a serial port on a PCM.
Non-recoverable software error in a PCM or LAN interface module.
SFT_SIO (diagnostic)
PB_SUM (fatal) Program or block checksum failure during power-up or in Run mode.
LOW_BAT (diagnostic) Low battery signal from CPU or another module in the system.
OV_SWP (diagnostic)
SY_FULL, IO_FULL
(diagnostic)
Constant sweep time exceeded.
PLC fault table full
I/O fault table full
IOM_FLT (diagnostic)
APL_FLT (diagnostic)
Point or channel on an I/O module—a partial failure of the module.
Application fault.
ADD_RCK (diagnostic) New rack added, extra, or previously faulted rack has returned.
ADD_IOC (diagnostic) Extra I/O Bus Controller or reset of I/O Bus Controller.
ADD_IOM (diagnostic) Previously faulted I/O module is no longer faulted or extra I/O module.
ADD_SIO (diagnostic) New intelligent option module is added, extra, or reset.
NO_PROG (information) No application program is present at power-up. Should only occur the first time the PLC is powered up or if the battery-backed RAM containing the program fails.
BAD_RAM (fatal) Corrupted program memory at power-up. Program could not be read and/or did not pass checksum tests.
WIND_ER (information) Window completion error. Servicing of Programmer or Logic Window was skipped. Occurs in Constant Sweep or Microcycle Sweep mode.
BAD_PWD (information) Change of privilege level request to a protection level was denied; bad password.
NUL_CFG (fatal) No configuration present upon transition to Run mode. Running without a configuration is similar to suspending the I/O scans.
SFT_CPU (fatal)
MAX_IOC (fatal)
CPU software fault. A non-recoverable error has been detected in the CPU.
May be caused by Watchdog Timer expiring.
The maximum number of bus controllers has been exceeded. The Series 90
PLC supports 32 bus controllers.
STOR_ER (fatal) Download of data to PLC from the programmer failed; some data in PLC may be corrupted.
Note
Fault and FIP locating references are discussed in Chapter 3, section 1 of this manual
Refer to the Series 90™ Sequential Function Chart Programming Language User’s
Manual (GFK-0854) for SFC references.
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Section 3: Program Organization
The user program(s) contains the logic that is used to process input data and control output data.
Program logic is executed repeatedly by the PLC. The Series 90-70 PLC allows up to 16 user programs, with a maximum of 1 LD program. Refer to Tables 2-4 and 2-5 for a listing of program sizes and reference limits for each CPU model.
The following figure depicts three user programs, two of which are standalone C programs. The
LD program consists of four blocks (_MAIN, LD_1, PSB_X, and EXT4). The figure further illustrates the scoping of various memory types: all references except %P and %L are visible to the standalone programs; %P memory is visible to all of the program blocks, and the LD_1 block has its own local data, %L. Details of standalone programs and blocks are described later in this section.
Program “A” (Standalone)
Program “B” (RLD)
_MAIN
%P Memory
LD 1
PSB X
EXT4
%L
Program “C” (Standalone)
User Data References (%I, %Q, %R, %AI, %AQ, etc.)
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Ladder Logic Programming
An LD program for the Series 90-70 PLC consists of one or more units called blocks. Four types of blocks are supported by the Series 90-70 PLC:
Table 2-13. Block Types
Block
Type
LD
SFC
PSB
External
Programming
Language
Ladder Logic
Ladder
Logic/SFC
Ladder Logic
C
Size Limit
16 KB in
Logicmaster;
16 KB in
Logicmaster;
16 KB in
Logicmaster;
64,000 bytes
Number of
Parameter
Pairs
n/a n/a
0–7
0–7
Notes
SFC blocks cannot be used as
Interrupt blocks.
External blocks cannot call any other blocks. External blocks are created using the C
Programmer’s Toolkit.
•
SFC programming is described in detail in the Series 90 Sequential Function Chart
Programming Language User’s Manual, GFK-0854. Sequential Function Chart (SFC) is an
IEC-compliant, graphical, state language specifically designed for controlling sequential processes.
•
LD (also known as Relay Logic Diagram language) is the language used in the LD Editor window within Control software and in Logicmaster.
•
PSB (Parameterized Subroutine Blocks) are LD blocks that have input and output parameters.
Note
Up to 255 blocks can be used. The maximum number of block calls that can be programmed within a given block is 64. The maximum number of programmed calls to a particular block is 255. (A block can be executed any number of times, but there cannot be more than 255 explicit calls to any given block.)
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Main Block
When using an LD program there is always a _MAIN block. LD program execution begins with the _MAIN block.
read inputs
_
MAIN
BLOCK write outputs
2
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Blocks
Structuring a program as blocks enables you to re-use logic. Logic that needs to be repeated can be entered in a block. Calls would then be made to that block to execute the logic. In this way, total program size is reduced. Dividing a program into smaller blocks also simplifies programming and reduces the overall amount of logic needed for the program.
Examples of Using Blocks
As an example, the logic for an LD program could be divided into three blocks, each of which could be called as needed from the _MAIN block. (A block cannot call the _MAIN block.) In this example, the _MAIN block might contain little logic, serving primarily to sequence the other blocks.
read inputs
_
MAIN
BLOCK write outputs
BLOCK
2
BLOCK
3
BLOCK
4
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A block can be used many times as the program executes. Logic that needs to be repeated several times in a program could be entered in a block. Calls would then be made to that block to access the logic.
read inputs
MAIN
BLOCK write outputs
BLOCK
2
2
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In addition to being called from the _MAIN block, blocks can also be called by other blocks. A block may even call itself.
read inputs
_
MAIN
BLOCK write outputs
BLOCK
2
BLOCK
3
BLOCK
5
BLOCK
4
There may be no limit to the number of levels of calls to blocks that your programming software will allow. However, the PLC will only allow a certain number of nested calls before an
“Application Stack Overflow” fault is logged and the PLC transitions to Stop/Halt mode. The call depth is guaranteed to be at least four on the 731 and 732 CPUs and eight on all other models. The actual call depth allowed depends on the amount of data (non-Boolean) flow used in the blocks. If less than the 171 word data flow limit is used, then more nested calls may be made. The call level nesting counts the _MAIN block as level 1. The illustration above shows three levels of calls.
Note
Before a block can be used, you need to define it in the block declarations. For information on block declarations, refer to the Logicmaster 90-70 Programming
Software User’s Manual (GFK-0263) .
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How Blocks Are Called
A block executes when called from the program logic in the _MAIN block or another block.
| ___________
| | |
|——| CALL PBK1 |
| |___________|
| _____________
|%I00500 %Q00076 | |
|——| |—————| |———| CALL PBK2 |
| |_____________|
|
In the example above, PBK1 will always be called. Conditional logic can be used to control calling the block. In order for PBK2 to be called, both input %I00500 and output %Q00076 must be ON.
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Blocks and Local Data
Each block in the LD program can have an associated data block. The _MAIN data block is referenced by %P; all other data blocks are referenced by %L.
The size of the data block is dependent on the highest reference in its block for %L and in all blocks for %P. Appendix C, “Memory Allocation,” provides a worksheet for determining the total number of bytes of user data used and how much is still available for the user program.
data
%P
MAIN
BLOCK data
%L
BLOCK
2 data
%L
BLOCK
3 data
%L
BLOCK
4
All blocks within the LD program can use data associated with the _MAIN block (%P). Blocks can use their own %L references as well as the %P references that are available to all blocks. The
_MAIN block cannot use %L.
Note
External blocks and Parameterized Subroutine Blocks do not have their own %L data; instead, they inherit the %L data of the calling block.
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Parameterized Subroutine Blocks
A Parameterized Subroutine Block (PSB) is an optional, user-defined function block, configured with between zero and seven input/output parameter pairs.
As with other blocks, Parameterized Subroutine Blocks can be called by the _MAIN block, other blocks, or itself. The calling block may pass parameters to the Parameterized Subroutine Block.
When a Parameterized Subroutine Block is declared, it must be assigned a unique block name along with the number, type, and length of the parameters. Each parameter, other than the Enable and Enable Out parameters, is designated as a BOOL, WORD, or NWORD type, along with a specified length. BOOL lengths range from 1 to 256; WORD and NWORD lengths range from 1 to
1024. Default is one bit for BOOL lengths or one word for WORD and NWORD lengths. In addition, you may also declare an optional three-character formal parameter reference name.
Parameterized Subroutine Blocks and Local Data
Parameterized Subroutine Blocks support the use of %P global data. Parameterized Subroutine
Blocks do not have their own %L data, but instead inherit the %L data of the calling block.
Parameterized Subroutine Blocks also inherit %S contacts, such as FST_EXE, from the calling block. If %L references are used within a Parameterized Subroutine Block and the block is called by _MAIN, %L references will be inherited from the %P references wherever encountered in the
Parameterized Subroutine Block (for example, %L0005 = %P0005).
data
%P
MAIN
BLOCK
Inherits as %L
PSB 1 data
%L
BLOCK
1
Inherits as %L
PSB 2
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How Parameterized Subroutine Blocks Are Called
A Parameterized Subroutine Block executes when called from the program logic in the _MAIN block, another block, or itself.
In the following example, if %I00001 is set, the parameterized subroutine named LOAD_41 is executed. The LOAD_41 subroutine block operates on the input data (located at reference addresses %I00100 – %I00111 and %I00001 – %I00016) and produces values in the block of output data (located at reference addresses %T00001 – %T00016, and at register memory addresses
%R00200 – %R00201). The logic within the subroutine can also control the OK output of the
Parameterized Subroutine Block. This example shows the subroutine CALL instruction as it will appear in the calling block.
| ______________
|%I00001 | | %Q00001
|——| |—————| CALL LOAD_41 |————————————————————————————————————————————————()—
| | (SUBROUTINE) |
| |B012 B016|
| %I00100 —|ABC Y1|—%T00001
| | |
| |B016 W002|
| %I00001 —|X2 Y2|—%R00200
| |______________|
|
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Referencing Formal Parameters Within a Parameterized Subroutine Block
Formal parameters are those parameters used within Parameterized Subroutine Block that are passed from and to the calling block. They are either BOOL, WORD, or NWORD types. NWORD type parameters may be used on any multi-word type operands, but not on discrete types. (An
NWORD is a number of words passed into a Parameterized Subroutine Block).
The formal parameters are identified as X input parameters or Y output parameters, followed by the number of the input or output parameter, respectively. For example, X2 indicates the parameter used at location X2 in the parameterized subroutine declaration. The X2 label could be followed by a value of 1 to 16 to the length provided in the subroutine declaration (B016).
Up to seven formal parameter pairs may be declared in a Parameterized Subroutine Block. The formal parameter type, number, and length use the form: where :
a = X a = Y b c
ab[ccc]
denotes an input formal parameter.
denotes an output formal parameter.
is a parameter number between 1 and 7.
is a valid BOOL, WORD, or NWORD index.
The labels X1 through X7 and Y1 through Y7 may be assigned a nickname of up to three characters.
Each parameterized Subroutine Block has a predefined local variable, YO, which the CPU sets to 1 upon each execution of the block. YO can be controlled by logic within the block and provides the output status of the block.
Assigned parameters are PLC references or data flow that pass their address or data into or out of a
Parameterized Subroutine Block. An assigned parameter may pass either the value of the data in the assigned parameter (BOOL type parameters) or the address of the assigned parameter (WORD or NWORD type parameters). Assigned parameters are defined in a parameter assignment table.
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2-38
Restrictions on Formal Parameters within a Parameterized Subroutine Block
In general, formal BOOL parameters are allowed on all contacts, coils, and function block parameters that allow discrete references (%I, %Q, %M, %T, %S, %G, and %U). Formal WORD and NWORD parameters are allowed on all function block parameters that allow register references (%R, %AI, %AQ, %P, %L, and %UR). NWORD parameters are allowed only on multiword type parameters (that is, DINT, DWORD, or REAL). (An NWORD is a number of words passed into a Parameterized Subroutine Block.)
The following list contains several exceptions and restrictions which have been identified when using formal parameters within a Parameterized Subroutine Block:
1.
T ransitional contacts, transitional coils, and retentive coils are not allowed with formal parameters. The editor (that is, the editor tool within the programming package) will substitute the non-retentive equivalent of these functions,
+–––(M), +–––(SM), and +–––(/M) and display an appropriate warning message.
2
.
Formal BOOL input parameters cannot be used as output parameters on a function block.
3
.
The DO I/O function is not allowed with formal parameters.
4
.
Multi-word type function block parameters (that is, DINT, DWORD, or REAL) are only allowed with formal NWORD parameters.
5
.
Formal parameters are not allowed on the following function block parameters:
Function Parameter
Service Request (Service Request) PARMS input parameter.
Communications Request (COMMREQ) IN input parameter.
DATA_INIT
DATA_INIT_COMM
DATA_INIT_PID
DATA_INIT_ASCII
Q output parameter.
6
.
A Parameterized Subroutine Block’s BOOL type formal parameters may not be passed to another Parameterized Subroutine Block.
7
.
WORD formal parameters cannot be passed into another Parameterized Subroutine
Block’s NWORD input parameter.
BIT Type Parameters in PSBs
PSB output parameters of type BIT will affect the transitions in all bytes within the range of the
BIT parameter. For example, a BIT parameter of length 4, connected to physical output %Q6, will affect the transitions of all bits within the byte containing %Q1 through %Q8 as well as all bits in the byte containing %Q9 through %Q16.
For arrays of BIT type, each array element is written one bit after the other. Since memory write operations and management of transitional state are done a byte at a time, the transitional status of each element will typically be cleared, except for the final array element. This is not an issue for
BIT parameters of length 1, as only a single write operation is performed. Note, however, that as described above, the transition value of other bits within the byte will be affected.
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External Blocks
External blocks are created using the C Programmer’s Toolkit. Refer to the C Programmer’s
Toolkit for Series 90™ PLCs (GFK-0646) for detailed information regarding external blocks.
How External Blocks Are Called
External blocks are added to a user program by using the Librarian function in your programming software.
An external block executes when called from the program logic in the _MAIN block or from another block. To facilitate the passing and returning of data, an external block may have 0 to 7 parameter pairs.
In the following example, if %I00001 is set, the external block named EXT_11 is executed. The block operates on the input data, located at reference addresses %I00100 – %I00111 and %I00001
– %I00016, and produces values in the block of output data, located at reference addresses
%T00001 – %T00016, and at register memory addresses %R00200 – %R00201. The logic within the block can also control the Enable Out output of the external block.
| ______________
|%I00001 | | %Q00001
|——| |—————| CALL EXT_11 |————————————————————————————————————————————————()—
| | (EXTERNAL) |
| | |
| %I00100 –|X1 X1|–%T00001
| | |
| | |
| %I00001 –|X2 X2|–%R00200
| |______________|
|
Note
Unlike other block types, external blocks cannot call any other blocks.
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External Blocks and Local Data
External blocks support the use of %P global data. External blocks do not have their own %L data, but instead inherit the %L data of the calling block. External blocks also inherit %S contacts, such as FST_EXE, from the calling block. If %L references are used within an external block and the block is called by _MAIN, %L references will be inherited from the %P references wherever encountered in the external block (for example, %L0005 = %P0005).
data
%P
MAIN
BLOCK
Inherits as %L
EXT 1 data
%L
BLOCK
1
Inherits as %L
EXT 2
Local Data Initialization
When an external block is stored to the PLC, a copy of most of its internal data is saved. Global and static initialized data are saved, but if static variables are declared without an initial value, the initial value is undefined and must be initialized by the C application. (Refer to the “Global
Variable Initialization” and “Static Variable” parts in Section 6 of Chapter 2 of the C
Programmer’s Toolkit for Series 90™ PLCs (GFK-0646). This data is used to re-initialize the block’s data area whenever the PLC transitions from Stop to Run.
External/standalone programs do not use %L data, but the internal data they use is somewhat similar to local data, as discussed above. Internal data used in a standalone program should not be confused with %L data.
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Standalone C Programs
Like external blocks, standalone programs are developed using the C Programmer’s Toolkit.
Unlike external blocks, however, standalone C Programs can be up to 564 KB in size. Standalone
C programs cannot call other standalone programs, nor can they call blocks within an LD program.
Similarly, blocks within an LD program cannot call a standalone program. Instead, standalone C programs are scheduled for execution using one of several possible program scheduling modes, described in section 4 of this chapter.
Note
For information on adding C programs to your folder, refer to the Logicmaster
90-70 Programming Software User’s Manual (GFK-0263) .
A maximum of 16 standalone programs can be used at one time. If an LD program is used, only 15 standalone programs are allowed, for a total of 16 programs.
Note
Since standalone C programs are truly separate programs, they do not have access to memory types local to an LD program (%L and %P). The internal or local data used in a standalone C program should not be confused with %L and
%P data.
Data Encapsulation
Each standalone C program is provided with a means of obtaining its own local copy of user data references. Instead of operating on the global set of user references, each standalone program can operate on its own local set of data. This feature is supported through the use of an input/output specification.
The following steps occur when using an I/O specification with a standalone C program:
1.
When the program is scheduled for execution, any corresponding input specification is copied from the global user reference data area(s) to an area local to the program.
2.
As the program executes, it can operate on its local set of input and output data. Any interruptions during the execution phase will not affect this program’s local copies of input or output data.
3.
When the program completes, its local output specification is copied back to the specified set of user data reference areas.
Two particular concerns are addressed by using an input/output specification. First, if a program is suspended mid-execution and an output scan is performed before execution is resumed, output values will remain consistent since the output scan values are obtained from the user data reference locations. Second, if a program is interrupted mid-execution by another program, the first program is unaffected by changes to global data caused by the second program, since it has its own local copy of data.
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Another benefit to using an input specification is to provide a more accurate sampling of input values. If a program’s execution is postponed due to higher priority programs, the input specification may provide the program with a set of data that more accurately represents the state of that data when the program was scheduled since global user reference data may have been modified by higher priority programs or by the scanning of input values.
Input/Output Specifications
Unlike external blocks, standalone C and LD programs cannot have any input or output parameters.
Standalone C programs may utilize an input/output specification which lists a maximum of eight input and eight output ranges. The input ranges will be copied to the program at the start of program execution. The output ranges are copied from the standalone C program to the global reference on the completion of program execution. Note that this differs from external block parameters which are passed by reference, not by value. This operation is especially important for programs which may be time-sliced over multiple sweeps, which can occur when using Microcycle
Sweep mode
1
.
Caution
When the PLC runs in Microcycle Sweep mode, programs can be suspended in the middle of execution, possibly in the middle of a line of C code or in the middle of a rung of logic or function block. If the program uses global references such as %Q, %R, etc., a possibly inconsistent set of reference values may be present at the time an Interrupt program or output scan occurs. This inconsistency could even be within a given reference value if the value is not accessed according to its type.
2-42
1
Incoherent data can result if a program uses global data and is suspended across multiple sweeps.
The data referenced will be from two successive sweeps. Although data cannot be incoherent within a byte or word, global data should only be accessed using its basic type (byte, word, etc.), otherwise incoherency can apply to individual elements as well.
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To illustrate the possibility of inconsistent output data, consider the following example program which updates a given output value in several locations. For this example, assume that the user has configured %AQ1 as an output specification from the second program, and that user reference
%AQ1 contains the value 0 when the two programs begin execution.
Differences Between Accessing Global and Local (Internal) Data
Program Accessing Global Data
%AQ1 = 0
<program begins>
%AQ1 = %AQ1 + 2
An output scan occurring after this line of code would output a 0 to AQ1.
An output scan occurring after this line of code would output a 2 to AQ1.
%AQ1 = %AQ1 + 12 An output scan occurring after this line of code would output a 14 to AQ1.
%AQ1 = %AQ1 / 2 An output scan occurring after this line of code would output a 7 to AQ1.
<program completes>
Program Using I/O
Specification
LOC[1] = 0
<program begins>
LOC[1] = LOC[1]+2
An output scan occurring after this line of code would output a 0 to AQ1.
An output scan occurring after this line of code would output a 0 to AQ1.
LOC[1]=LOC[1] + 12 An output scan occurring after this line of code would output a 0 to AQ1.
LOC[1]=LOC[1]/2 An output scan occurring after this line of code would output a 0 to AQ1.
<program completes>
The PLC copies the output specification from a local area back to the global areas when the program completes.
Further output scans will output a 7 to AQ1.
Further output scans will output a 7 to AQ1.
Note
Remember that standalone C programs are truly separate programs. They do not have access to memory types local to an LD program (%L and %P). The internal or “local” data used in a standalone C program should not be confused with %L and %P data.
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Standalone C Programs and Local Data
Standalone C programs do not have a local data copy provided by the PLC. Similarly, they are not able to access %P memory of an LD program, nor can they access any %L memory associated with a block within an LD program. Standalone C programs do have local data that is declared within the C source file(s) used to create the standalone C program. Refer to the C Programmer’s Toolkit
User’s Manual (GFK-0646) for further information.
Local Data Initialization
When a standalone C program is stored to the PLC, a copy of its internal data is saved. This data is used to re-initialize the program’s data area whenever the PLC transitions from Stop to Run.
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Referencing I/O Specification Data Within a Standalone C Program
Several new C macros used to define and access input and output specification data are defined for standalone C programs. Refer to the C Programmer’s Toolkit User’s Manual (GFK-0646, revision
C or later) for information regarding referencing I/O specification data within a standalone C program.
Data Coherency of I/O Specifications
Since standalone C programs can be interrupted by other programs and Interrupt blocks, data incoherency within an I/O specification can occur. Each individual I/O specification is limited to
2048 bytes, for a maximum of 16KB of input data and 16KB of output data. The 90-70 PLC will ensure the following:
•
Each byte within an individual I/O specification is coherent with respect to that individual specification.
•
If the total length of all input specifications is no more than 2048 bytes, the entire input specification will be coherent.
•
If the total length of all output specifications is no more than 2048 bytes, the entire output specification will be coherent.
If the total length of an input or output specification exceeds 2048 bytes, groups of individual specifications whose combined lengths do not exceed 2048 bytes will be coherent. The following table indicates coherency in this case.
Table 2-14. Coherency of I/O Specification
I/O specification Length (bytes)
1 2000
2 48
3
Interrupts may occur
1024
5
6
7
4
Interrupts may occur
1026
Interrupts may occur
8
10
20
20
20
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Using LD vs. Standalone C Programs
Several options need to be considered when determining which type of program is to be used. The following list summarizes many of the features supported in each of the types of programs:
•
Interrupt Blocks are preferred over standalone programs when interrupt latency is a concern.
The overhead to process an Interrupt Standalone program is much larger than that of an
Interrupt block.
•
LD programs may operate only on global user reference data. This can introduce data coherency problems when the LD program is run in Microcycle Sweep mode and the program is suspended over multiple sweeps.
•
Standalone C programs incur an 8K overhead per program.
•
An LD program is preferred over a standalone C program when you are using large amounts of
Boolean instructions. LD programs are better suited for relay-type logic than are standalone C programs.
Table 2-15. LD vs. Standalone C Program Tradeoffs
LD
Programming
Language
Ladder
Logic
Standalone C, using the C
Programmer’s
Toolkit.
Program Size
Limit
Data Types
Accessible smaller of
544K or available memory size, organized into 16K blocks.
smaller of
564K or available memory size
All
All except
%P, %L
Local Data
Size
8k %P, 8K
%L per block unlimited, counts as part of program size
Scheduling
Modes
All*
Data
Encapsulation
No
Block Types
Supported
LD
SFC
PSB
External
All * Yes n/a
*Using Microcycle Sweep mode with an LD program is not recommended. LD programs always operate on global data directly, which can lead to inconsistent output values if the LD program is suspended mid-execution. Refer to section 4 of this chapter for more information on Microcycle Sweep mode.
Differences in Operation: LD and Standalone C Programs
Retentiveness of Data
When only standalone C programs are used, the retentive nature of data is based solely on memory type since there are no coil instructions. In this case %Q and %M are retentive. If both LD and standalone C programs are used, the retentive property of memory types is driven by their use in the LD program. For more information about retention of logic and data, refer to the “Retentiveness of Logic and Data” discussion in section 2 of this chapter. For more information on retentive properties of specific memory types, refer to the Table 2-3.
Global Data
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LD programs only have access to global data areas since they do not have the ability to use input/output specifications. This can lead to inconsistent output values if an LD program is used in
Microcycle Sweep mode.
Interrupt Execution
Interrupt blocks within the LD program have the highest priority in the system. In addition, they cannot be preempted, while standalone C programs can be.
Queuing of Interrupts
There are differences between programs and blocks in the queuing of additional interrupts. Refer to the “Interrupt Handling” on page 2-64 and the related sections that follow for detailed information.
System Status References
The following differences exist when using System Status References* (called “Convenience
References” in previous editions of 90-70 Reference manual):
•
The reference FST_EXE is not available to standalone C programs.
•
The reference FST_SCN does not refer to %S0001 within standalone C programs. Instead, a macro is provided by the C Toolkit to provide identical functionality.
*For information on System Status References, refer to Table 2-9 as well as section 2 of this chapter.
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Section 4: PLC Sweep Modes and Program Scheduling Modes
Normal Sweep Mode
In Normal Sweep mode, each PLC sweep can consume a variable amount of time. The Logic
Window is executed in its entirety each sweep. The Communications and Background Windows can be set to execute in a Limited or Run-to-Completion mode. Normal Sweep is the most common sweep mode used for PLC applications.
The following figure illustrates three successive PLC sweeps in Normal Sweep mode. Note that the total sweep times may vary due to sweep-to-sweep variations in the Logic Window,
Communications Windows, and Background Window.
SWEEP n
HK
INPUT
LOGIC
SWEEP n+1
HK
INPUT
LOGIC a45529
SWEEP n+2
HK
INPUT
LOGIC
OUTPUT
PRG
SYS
BG
OUTPUT
PRG
SYS
BG
OUTPUT
PRG
SYS
Abbreviations:
HK = Housekeeping
PRG = Programmer Window
BG
SYS = System Communications Window
BG = Background Window
Figure 2-3. Typical Sweeps in Normal Sweep Mode
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Constant Sweep Mode
In Constant Sweep mode, each PLC sweep begins at a specified Constant Sweep time after the previous PLC sweep began. The Logic Window is executed in its entirety each sweep. If there is sufficient time at the end of the sweep, the PLC will alternate among the Programmer
Communications, System Communications, and Background Windows, allowing them to execute in Run-to-Completion mode until it is time for the next sweep to begin. Some or all of the
Communications and Background Windows may not be executed. The Communications and
Background Windows will terminate when the overall PLC sweep time has reached the value specified as the Constant Sweep time.
One reason for using Constant Sweep mode is to ensure that I/O are updated at constant intervals.
The value of the Constant Sweep timer can be configured to be any value from 3 to 255 milliseconds. The Constant Sweep timer value may also be set and Constant Sweep mode may be enabled or disabled by your programming software or by the user program using Service Request function #1. The Constant Sweep timer has no default value; a timer value must be set prior to or at the same time Constant Sweep mode is enabled.
The Ethernet Global data exchange configured for either consumption or production can add up to
1 millisecond to the sweep time. This sweep impact should be taken into account when configuring the PLC constant sweep mode and setting the CPU watchdog timeout.
If the PLC sweep exceeds the Constant Sweep time in a given sweep, the PLC places an oversweep alarm in the PLC fault table and sets the OV_SWP (%SA0002) status reference at the beginning of the next sweep. The OV_SWP status reference is reset when the time of the last sweep does not exceed the Constant Sweep timer or the PLC is not in Constant Sweep mode. Additional sweep time due to an oversweep condition in a given sweep does not affect the time given to the next sweep.
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The following figure illustrates four successive PLC sweeps in Constant Sweep mode with a
Constant Sweep time of 100 milliseconds. Note that the total sweep time is constant, but an oversweep may occur due to the Logic Window taking longer than normal.
SWEEP n t = 0 ms
HK
INPUT
LOGIC
SWEEP n+1 t = 100 ms
HK
INPUT
LOGIC
SWEEP n+2 t = 220 ms
HK
INPUT
LOGIC a45530
SWEEP n+3 t = 320 ms
HK
INPUT
LOGIC
Constant
Sweep
Time
OUTPUT
PRG
SYS
BG
PRG
SYS
Abbreviations:
HK = Housekeeping
OUTPUT
PRG = Programmer Window.
SYS = System Communications Window.
BG = Background Window
OUTPUT
PRG
SYS
BG
PRG
SYS
BG
20 ms oversweep
OUTPUT
PRG
SYS
BG
PRG
Figure 2-4. Typical Sweeps in Constant Sweep Mode
Constant Window Mode
In Constant Window mode, each PLC sweep can consume a variable amount of time. The Logic
Window is executed in its entirety each sweep. In this mode, the PLC will alternate among the three windows, allowing them to run in a Run-to-Completion mode for a time equal to the value set for the Constant Window timer. The overall PLC sweep time is equal to the time required to execute the Housekeeping, Input Scan, Logic Window, and Output Scan phases of the sweep plus the value of the Constant Window timer. This time may vary due to sweep-to-sweep variances in the execution time of the Logic Window.
An application that requires a certain amount of time between the Output Scan and the Input Scan, permitting inputs to settle after receiving output data from the program, would be ideal for Constant
Window mode.
The value of the Constant Window timer can be configured to be any value from 5 to 255 milliseconds. The Constant Window timer value may also be set by your programming software or by the user program using Service Request functions #3, #4, and #5.
The following figure illustrates three successive PLC sweeps in Constant Window mode. Note that the total sweep times may vary due to sweep-to-sweep variations in the Logic Window, but the
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time given to the Communications and Background Windows is constant. Some of the
Communications or Background Windows may be skipped, suspended, or run multiple times based on the Constant Window time.
a45531 SWEEP n
HK
INPUT
LOGIC
SWEEP
HK
INPUT
LOGIC
SWEEP
HK
INPUT
LOGIC
OUTPUT
PRG
OUTPUT
PRG
SYS
BG
PRG
SYS
BG
PRG
OUTPUT
PRG
SYS
BG
Abbreviations:
HK = Housekeeping
PRG = Programmer Window
SYS = System Communications Window
BG = Background Window
SYS
Constant
Window
Time
Figure 2-5. Typical Sweeps in Constant Window Mode
Microcycle Sweep Mode
In Microcycle Sweep mode, each PLC sweep begins at an absolute time— which is a multiple of the base cycle time—relative to the Stop-to-Run transition of the PLC. The base cycle time specifies how long each sweep should take (similar to the Constant Sweep time in Constant Sweep mode). The user programs are scheduled for execution each sweep based on their period and may execute in a time-sliced fashion over multiple PLC sweeps. The PLC will alternate between the
Communications and Background Windows, allowing them to run in a Run-to-Completion mode until it is time for the next sweep to begin.
Microcycle Sweep mode can be used to allow some programs to execute more often than others.
This allows more processing time to be applied to the more important or more time-critical tasks.
Microcycle Sweep mode also allows programs to execute more in line with the time when their inputs are available.
Although Microcycle Sweep mode has a fixed sweep time, it is significantly different from
Constant Sweep mode. First, user programs do not necessarily execute in their entirety each sweep.
In order to maintain the base cycle time and the Communications and Background Window times, user programs may be suspended during execution and resumed the following PLC sweep. Also, additional sweep time due to an oversweep condition in a given sweep causes the next sweep to be
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shortened by the oversweep time. In this way each PLC sweep (with the exception of sweeps which follow an oversweep condition) begins at an absolute time relative to the Stop-to-Run transition of the PLC. Finally, the Communications and Background Windows are guaranteed to run for at least the specified Window time each sweep. The Logic Window will be suspended, if necessary, to guarantee that the Communications and Background Windows get to run for the specified Window time.
The base cycle time and the window timer value can be configured with a base cycle time of between 5 and 2550 milliseconds. The Constant Window timer can be any value from 5 to 255 milliseconds. The base cycle time and Constant Window timer may also be set while the PLC is in
Stop mode. The base cycle time and window timer cannot be changed while the PLC is in Run mode.
In Microcycle Sweep mode, Periodic programs execute on a priority basis. Periodic programs have priority inverse to their period (smallest period has highest priority). Refer to the “User Program
Execution” discussion later in this section for more information on Periodic programs and their execution.
If the PLC sweep exceeds the base cycle time in a given sweep, the PLC places an oversweep alarm in the PLC fault table and sets the OV_SWP (%SA0002) status reference at the beginning of the next sweep. The OV_SWP status reference is reset when the last sweep time does not exceed the base cycle time. Sweep time due to an oversweep condition in a given sweep causes the next sweep to be shortened by the oversweep time.
The following figure illustrates three successive PLC sweeps in Microcycle Sweep mode with a base cycle time of 100 milliseconds. Note that the sweep time is constant and the Communications and Background Windows are guaranteed to run for the configured window timer. In sweep n and sweep n+1, the Logic finishes early; an I/O-Triggered program can execute during that time. In sweep n+2, the Logic Window is not complete and is suspended so that the Communications and
Background Windows can run for the specified window time. In each case the logic window stays open for the entire time allowed for logic.
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Time
Allowed for
Logic
SWEEP n t = 0 ms
HK
INPUT
LOGIC
SWEEP n+1 t = 100 ms
HK
INPUT
LOGIC a45532
SWEEP n+2 t = 200 ms
HK
INPUT
LOGIC
Base
Cycle
Time
Window
Timer
OUTPUT
PRG
SYS
BG
PRG
SYS
OUTPUT
PRG
SYS
BG
PRG
SYS
BG
OUTPUT
PRG
SYS
BG
Abbreviations: HK = Housekeeping
PRG = Programmer Window.
SYS = System Communications Window.
BG = Background Window
Figure 2-6. Typical Sweeps in Microcycle Sweep Mode
Note
Run Mode Store of logic is not supported in Microcycle Sweep mode. Also, the
Single Sweep Debug feature is not supported in Microcycle Sweep mode.
Microcycle Sweep Mode Output Scan Estimation
Microcycle mode was a new CPU sweep mode beginning with Release 6.00 CPUs. In this sweep mode, each PLC sweep begins at an absolute time relative to the Stop-to-Run transition of the PLC.
In order to meet the deadline for the start of the next sweep, the CPU must estimate the time required for the Output Scan of the current sweep.
Output Scan Estimation for Pre-Release 7.00 CPUs
For Pre-Release 7.00 CPUs, the estimate of the Output Scan is based on the previous sweep’s
Output Scan time. For example, if the actual output scan time for sweep N is 15.3 ms, then the
CPU will allot 15.3 ms to execute the output scan for sweep N+1.For the first PLC scan, Pre-
Release 7.00 CPUs will estimate the Output Scan to be one-third of the configured base cycle time.
For example, if the base cycle time is configured to be 60 milliseconds, then the Output Scan for the first PLC scan will be estimated to require 20 milliseconds. In this example, if the Output Scan does not actually require 20 milliseconds, the time allotted for the Logic Window for the first PLC
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scan will be shorter than the Logic Window time for the remaining sweeps. When programming
PLC logic for first scan, ensure that the logic to be performed in a given program will complete prior to the next execution time for that same program.
Output Scan Estimation for Release 7.00 and Later CPUs
For Release 7.00 and later CPUs, the actual amount of output data that is scheduled to be scanned for the current PLC sweep is used to estimate the Output Scan time. This estimate is based on empirically measured times for the type and amount of output data to be scanned. This results in a fairly accurate estimate of the output scan time which is designed to maximize the amount of time spent in the Logic Window while maintaining the user-configured Communications Window time.
No special consideration of the logic execution time for first sweep is required.
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Program Scheduling Modes
Each user program in the 90-70 PLC can execute, subject to sweep mode restrictions, in one of four program scheduling modes. This section will briefly describe the following four available program scheduling modes:
•
Ordered
•
Timed
•
I/O-Triggered
•
Periodic
Ordered
Ordered programs are executed in the Logic Window with all other Ordered programs. Ordered programs are executed once per sweep in the sequence in which they are declared in the programming software. Ordered programs are not supported in Microcycle Sweep Mode.
Timed
Timed programs are scheduled to execute on a specified time interval with an initial delay (if specified) applied on Stop-to-Run transition of the PLC. Timed programs are scheduled to execute on a priority basis during any phase of the
PLC sweep. Timed programs are not supported in Microcycle Sweep mode.
I/O-Triggered
I/O-Triggered programs are scheduled to execute on the receipt of a configured
I/O Interrupt. I/O-Triggered programs are scheduled to execute on a priority basis during any phase of the PLC sweep when the PLC is in Normal Sweep,
Constant Sweep, or Constant Window Sweep mode.
In Microcycle Sweep mode, I/O-Triggered programs are scheduled to execute on a priority basis in the Logic Window. In this case, the execution of I/O-
Triggered programs may be time-sliced over multiple sweeps.
Periodic
Periodic programs are scheduled for execution based on the user-configured period for the program and are scheduled to execute in the Logic Window with all other Periodic programs. Periodic programs execute on a priority basis relative to all other programs and may be time-sliced over multiple sweeps.
Periodic programs are only supported in Microcycle Sweep mode.
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Choosing PLC Sweep and Program Scheduling Modes
The table shown below indicates the availability of each program scheduling mode in each of the available PLC sweep modes.
Table 2-16. Available Program Scheduling Modes in Each PLC Sweep Mode
Sweep
Mode
Normal
Constant
Constant
Window
Microcycle
* Executes in Logic Window only.
Ordered
Yes
Yes
Yes
No
Program Scheduling Mode
Timed
I/O
Triggered
Yes
Yes
Yes
Yes
Yes
Yes
No Yes *
Periodic
No
No
No
Yes
Interrupt
Blocks
Yes
Yes
Yes
Yes
User Program Execution
User Program Priorities
The priority of a user program specifies its priority relative to other programs. Higher priority programs execute before lower priority programs. If two or more programs with the same priority are scheduled at the same time, the order of execution is undefined. Programs can be suspended in the middle of execution by higher priority programs and Interrupt blocks.
Ordered programs all have the same priority and are executed in the order which you specify in the programming software. Ordered programs have lower priority than Timed programs, I/O-Triggered programs, and Interrupt blocks.
Periodic programs have priority inverse to their period (smallest period has highest priority). The order of execution of Periodic programs with the same period is undefined. Periodic programs have lower priority than Timed programs, I/O-Triggered programs, and Interrupt Blocks.
Timed and I/O-Triggered programs have higher priority than Ordered and Periodic programs. The priority of a Timed or I/O-Triggered program specifies its priority relative to other Timed and I/O-
Triggered programs. The priority range 10–99 (10 being the highest priority) is reserved for Timed and I/O-Triggered programs which can run during any phase of the PLC sweep (that is, not restricted to running in the Logic Window). Timed and I/O-Triggered programs operate this way when the PLC is running in Normal Sweep, Constant Sweep, or Constant Window mode. In
Microcycle Sweep mode, I/O-Triggered programs are executed in the Logic Window, and priorities of 100–109 (100 being the highest priority) are reserved for this mode.
Timed and I/O Interrupt blocks have the highest priority of any user logic.
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Table 2-17. Priority Values for Timed and I/O-Triggered Programs
Scheduling
Mode
Ordered *
Periodic *
I/O-Triggered
Timed
Sweep Mode
Normal Sweep
Constant Sweep
Constant Window Microcycle Sweep
Not supported.
Executed in order declared in the programming software.
Not supported.
10–99
10–99
Smallest period has highest priority.
100–109
Not supported.
* Ordered and Periodic scheduling modes have lower priority than Timed and
I/O-Triggered scheduling modes.
User Program Execution in Normal Sweep,
Constant Sweep, and Constant Window Modes
In Normal Sweep, Constant Sweep, and Constant Window modes, the 90-70 PLC can execute
Ordered, Timed, and I/O-Triggered programs as well as Timed and I/O Interrupt blocks.
Ordered programs execute in their entirety once per sweep in the Logic Window. The programs execute in the order in which they are declared in the programming software. The input specification is copied prior to execution of the program, and the output specification is copied upon completion of the program. In this way, the output of one program can be used as input for the next, if desired.
2
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The following figure depicts two Ordered programs (A and B) executing in a typical PLC sweep in
Normal Sweep mode.
Housekeeping
Input Scan
A Input Spec Copy
A Execution
A Output Spec Copy
B Input Spec Copy
B Execution
B Output Spec Copy
Output Scan
Programmer Comm
System Comm
Background Window
Figure 2-7. Ordered Program Execution Sequence
In Normal Sweep, Constant Sweep, and Constant Window mode, Timed and I/O-Triggered programs execute during any phase of the PLC sweep. These programs will preempt the execution of Ordered programs and lower priority Timed and I/O-Triggered programs. The input specification is copied at the time the program is scheduled to execute (that is, when the time interval expires or the I/O Interrupt occurs). The output specification is copied upon completion of the program.
Timed and I/O Interrupt blocks execute during any phase of the PLC sweep. These blocks will preempt the execution of all programs and have the highest priority of any user logic in the PLC.
Timed and I/O Interrupt blocks do not have an input or output specification copy.
The following figure depicts 2 Ordered programs (A and B) , an I/O-Triggered program (C) with priority 10, a Timed program (D) with priority 20, and an I/O Interrupt block all executing in a typical PLC sweep in Normal Sweep mode.
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SWEEP n
Housekeeping
Input Scan
Inpu t
Scan
Suspended
Input Scan
A Input Spec Copy
A Execution
A Output Spec Copy
B Input Spec Copy
B Execution
X
Y
C Input Spec Copy
C Execution
C Output Spec Copy
D Input Spec Copy
D Execution
B Execution
Suspended
D Execution
Suspended
X
C Input Spec Copy
C Execution
C Execution
Suspended
C Execution
C Output Spec Copy
Z
Interrupt Block E
D Execution
D Output Spec Copy
B Execution
B Output Spec Copy
Programmer Comm
System Comm
System Comm
Window
Suspended
System Comm
Background Window
Z
Interrupt Block E
X - I/O interrupt occurs invoking Event-Triggered Program
Y - Timed interrupt occurs invoking Timed Program
Z - I/O interrupt occurs invoking I/O interrupt block E
Figure 2-8. Ordered, Timed, I/O-Triggered and Interrupt Block Execution Sequence
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User Program Execution in Microcycle Sweep Mode
In Microcycle Sweep mode, the 90-70 PLC can execute Periodic and I/O-Triggered programs as well as Timed and I/O Interrupt blocks.
Periodic programs execute in the Logic Window. These programs are scheduled to execute based on the program’s period. For example, a program with a period of 1 will be scheduled to execute every PLC sweep and a program with a period of 2 will be scheduled to execute every other PLC sweep. Periodic programs have priority inverse to their period (smallest period has highest priority). These programs are subject to time-sliced execution over multiple sweeps based on the time available to the Logic Window. Unlike Ordered programs, the input specification is copied at the beginning of the Logic Window for all Periodic programs that are scheduled to begin execution in a given sweep. In other words, all input specification copies will occur for Periodic programs before any of the Periodic programs begin or continue executing. The output specification is copied upon completion of the program.
The following figure depicts two Periodic programs (A and B) executing in a typical PLC sweep in
Microcycle Sweep mode.
Housekeeping
Input Scan
A Input Spec Copy
B Input Spec Copy
A Execution
A Output Spec Copy
B Execution
B Output Spec Copy
Output Scan
Programmer Comm
System Comm
Background Window
Figure 2-9. Periodic Program Execution Sequence
Unlike other sweep modes, I/O-Triggered programs execute in the Logic Window only when the
PLC is in Microcycle Sweep mode. If the I/O Interrupt occurs during or prior to the end of the
Logic Window, the I/O-Triggered program will be scheduled to execute in the Logic Window of the current PLC sweep. Otherwise, it will be scheduled to execute in the Logic Window of the next
PLC sweep. I/O-Triggered programs will preempt the execution or resumption of Periodic programs and lower priority I/O-Triggered programs. These programs are subject to the same timesliced execution over multiple sweeps as Periodic programs, based on the time available to the
Logic Window. The input specification for an I/O-Triggered program is copied at the time the
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program is scheduled to execute (that is, when the I/O interrupt occurs) not at the beginning of the
Logic Window as with Periodic programs. The output specification is copied upon completion of the program.
Timed and I/O Interrupt blocks execute during any phase of the PLC sweep when the PLC is in
Microcycle Sweep mode. These blocks will preempt the execution of all programs and have the highest priority of any user logic in the PLC. Timed and I/O Interrupt blocks do not have an input or output specification copy.
The following figure depicts two Periodic programs (A and B) and one I/O-Triggered program (C) executing in two successive Microcycle Sweeps. Periodic programs A and B both have a period of 1.
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SWEEP n
Housekeeping
Input Scan
A Input Spec Copy
B Input Spec Copy
A Execution
A Output Spec Copy
B Execution
B Output Spec Copy
Output Scan
Programmer Comm
System Comm
System Comm
Window
Suspended
System Comm
Background Window
Programmer Comm
X
C Input Spec Copy
Programmer Communications window suspended due to window time expiring
SWEEP n+1
Housekeeping
Input Scan
A Input Spec Copy
B Input Spec Copy
C Execution
A Execution
A Execution
Suspended
C Execution
A Execution
A Output Spec Copy
B Execution
B Output Spec Copy
Output Scan
Programmer Comm
System Comm
X
C Input Spec Copy
System Communications Window suspended due to window time expiring
X - I/O interrupt occurs invoking Event-Triggered program
Figure 2-10. Periodic and I/O-Triggered Execution Sequence
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Global Data in Microcycle Sweep Mode
Incoherent data can result if a program that uses global data (%R, %I, %Q, etc.) is suspended across multiple sweeps. The data referenced will be from two successive sweeps. Although data cannot be incoherent within a byte or word, global data should only be accessed using its basic type
(byte, word, etc.); otherwise, incoherency can apply to individual elements as well. If possible, the input and output specifications should be used to access and update global data areas.
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Interrupt Handling
There are two types of interrupts available for user program handling in the 90-70 PLC.
I/O Interrupts
These interrupts are generated by 90-70 I/O modules to indicate discrete input state changes (rising/falling edge), analog range limits (low/high alarms), high speed signal counting events, and interrupts from 3 rd
party VME modules.
Timed
Interrupts
These interrupts are generated by the 90-70 PLC CPU based on a user-specified time interval with an initial delay (if specified) applied on Stop-to-Run transition of the PLC.
Both of these types of interrupts may invoke a user program or block.
Caution
Interrupt blocks and programs can interrupt the execution of non-interrupt logic as well as other Timed and I/O-Triggered programs. Therefore, unexpected results may occur if the interrupting logic and interrupted logic access the same data. If necessary, Service Request #17 or Service Request #
32 can be used to temporarily mask I/O and Timed Interrupt blocks and programs from executing when shared data is being accessed.
Interrupt Handling and Scheduling with Blocks
An Interrupt block has the highest priority of any user logic in the system and may be programmed to execute upon the receipt of a Timed or I/O Interrupt block. The execution of a block triggered from a timed or I/O interrupt preempts the execution of the normal PLC sweep activities. Execution of the normal PLC sweep activities is resumed after the Interrupt block completes. There can be a maximum of 64 I/O Interrupt blocks and 16 Timed Interrupts blocks.
Note
Timer function blocks do not accumulate time if used in a block that is executed as a result of a Timed or I/O Interrupt block.
Beginning with Release 6 of the PLC CPU, LD Interrupt blocks may make calls to other blocks.
The application stack used during the execution of Interrupt blocks is different from the stack used by the LD program. Therefore, the nested call limit is different from the limit described for calls from the _MAIN block. The PLC will log an ”Application Stack Overflow” fault and the PLC will transition to Stop/Fault mode if a call results in insufficient stack space to complete the call.
Note
Blocks which may execute as a result of a timed or I/O interrupt should not be called from the _MAIN block or other Non-Interrupt blocks because portions of the code executed by blocks are not re-entrant. In the example below INT1,
INT2, BLOCK5, and PSB1 should not be called from _MAIN, BLOCK2,
BLOCK3, or BLOCK4.
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MAIN
BLOCK
BLOCK
2
BLOCK
3
BLOCK
4
INT1
INT2
BLOCK
5
PSB
1
I/O Interrupt Blocks
A block may be triggered by an interrupt input from certain hardware modules. For example, on the
32-Circuit 24 VDC Input Module (IC697MDL650), the first input can be configured to generate an interrupt on either the rising or falling edge of the input signal. If the module is configured in this manner, that input can serve as a trigger to cause the execution of an LD or External block.
To program an I/O Interrupt block, the block must first be declared in the programming software. It must then be associated with the interrupt through the use of an interrupt declaration.
The figure below shows two I/O interrupt declarations. The trigger ST_BUT calls LD block INT1 if the input from a stop button wired to input 1 transitions in the configured direction. The module can be configured to generate the interrupt on a rising edge or a falling edge of the input. The LD block INT2 is triggered by %AI00009.
[ ST BUT ]
[%AI00009]
INT1
LANG: LD (* *)
INT2
LANG: LD (* *)
Figure 2-11. I/O Interrupt Block Declarations
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Note
Parameterized subroutine blocks (PSBs) with zero parameters and External blocks
(C blocks and C FBKs) with zero parameters may also be triggered by an interrupt input. (Zero parameter subroutine blocks are called SUBRs in Control software.) For these types of blocks, the local data (%L) is inherited from the _MAIN local data
(%P), for example, %L0005 = %P0005.
Timed Interrupt Blocks
A block may be executed on a user-specified time interval with an initial delay (if specified) applied on a Stop-to-Run transition of the PLC. In Logicmaster, the time base options for Timed
Interrupt blocks are 1.0 second, 0.10 second, 0.01 second, and 0.001 second. In Control software, the time base is 0.001 second (abbreviated msec within the Task Definitions dialog box).
To program a Timed Interrupt block, the block must first be declared. It must then be associated with a timed interrupt and given an interval and initial delay through the use of an interrupt declaration.
The first execution of a Timed Interrupt block will occur at ((DELAY * time base) + (INTVL * time base)) after the PLC is placed in Run mode. The figure below shows two timed interrupt declarations. The LD block BLK1 will be executed at times of 3 seconds, 5 seconds, 7 seconds, etc., after the PLC is placed in Run mode. The LD block BLK2 will be executed at two-second intervals, beginning two seconds after the PLC is placed in Run mode. The absence of a DELAY value for BLK2 indicates that there will not be an initial delay in the first execution of the block.
_____
| | —————————————
|TIMER| | CALL BLK1 | LANG: LD (* *)
| | —————————————
CONST |1.00s|
00002 —|INTVL|
| |
CONST | |
00001 —|DELAY|
|_____|
_____
| | —————————————
|TIMER| | CALL BLK2 | LANG: LD (* *)
| | —————————————
CONST |1.00s|
00002 —|INTVL|
| |
| |
_|DELAY|
|_____|
Figure 2-12. Timed Interrupt Block Declarations
Parameters:
Parameter
INTVL
DELAY
Description
INTVL is a constant value which will be multiplied by the time base of the interrupt to establish the frequency of execution of the associated block.
DELAY is an optional field for the timed interrupt. It is a constant value which will be multiplied by the interrupt time base to establish an additional delay for the first execution of the associated block.
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Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
INTVL
DELAY
•
= Valid data type, or place where power may flow through the function.
•
• •
Note
Parameterized Subroutine Blocks (PSBs) with zero parameters and External blocks
(C blocks and C FBKs) with zero parameters may also be triggered by a timed interrupt. (Zero parameter subroutine blocks are called SUBRs in Control software.)
For these types of blocks, the local data (%L) is inherited from the _MAIN local data
(%P), for example, %L0005 = %P0005.
Interrupt Handling and Scheduling with User Programs
I/O-Triggered Programs
Beginning with Release 6 of the PLC CPU, one of the scheduling modes available for user programs is the activation of programs from an I/O interrupt. The I/O-Triggered scheduling mode allows a user program to be invoked, along with its corresponding input and output specification copy, when a configured I/O interrupt occurs. I/O-Triggered programs execute during any phase of the PLC sweep or only during the Logic Window, based on sweep mode. Refer to “User Program
Execution” earlier in this section for more information on the scheduling and execution of I/O-
Triggered programs.
To program an I/O-Triggered program, the program must first be declared in the programming software. The scheduling mode must then be set to I/O Interrupt Triggered.
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Timed Programs
Beginning with Release 6 of the PLC CPU, one of the scheduling modes available for user programs is the activation of a program from a timed interrupt. The Timed scheduling mode allows a user program to be executed, along with its corresponding input and output specification copy, on a user-specified time interval with an initial delay (if specified) applied on a Stop-to-Run transition of the PLC. Timed programs execute during any phase of the PLC sweep. (Refer to the “User
Program Execution” earlier in this section for more information on the execution of Timed programs.)
To program a Timed program, the program must first be declared. The scheduling mode must then be set to Timed Interrupt.
The time base options for Timed programs are specified in milliseconds. The first execution of a
Timed program will occur at [(Initial Delay) + (Time Interval * time base)] milliseconds after the
PLC is placed in Run mode.
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Interrupt Blocks vs. Interrupt Programs
There are important differences to be aware of when choosing a program instead of a block to handle an interrupt. When a block is selected to handle a Timed or I/O Interrupt, the block will execute immediately upon receipt of the interrupt and run until it completes. Interrupt blocks can execute during any phase of the PLC sweep, regardless of the current PLC sweep mode. Pending
Timed Interrupt blocks will execute before pending I/O Interrupt blocks, but once an Interrupt block (Timed or I/O) begins executing, it will run until it completes. If an interrupt occurs which attempts to execute a Timed or I/O Interrupt block which has not fully completed execution due to a previous interrupt, the interrupt will be queued and the block will be executed again after the
Interrupt block completes execution. If an Interrupt block has already been queued in this manner once, any additional interrupts that occur for this block will be ignored.
Upon receipt of the Interrupt, Timed or I/O-Triggered programs are immediately scheduled to begin execution (including the copying of the input specification). However, the actual execution of the program occurs on a priority basis. Unlike Interrupt blocks, the execution of Timed or I/O-
Triggered programs can be delayed or preempted by other Timed or I/O-Triggered programs of a higher priority as well as other Interrupt blocks. Additionally, if an interrupt occurs which attempts to schedule a Timed or I/O-Triggered program which has not fully completed execution due to a previous interrupt, a “Program not Readied” application fault will be logged in the PLC fault table and the interrupt will be ignored.
When the PLC is in Normal Sweep, Constant Sweep, or Constant Window mode, Interrupt programs can execute during any phase of the PLC sweep. When the PLC is in Microcycle Sweep mode, Interrupt programs are scheduled to execute in the Logic Window.
In summary, the primary differences between Interrupt blocks and Interrupt programs are as follows:
Interrupt Block
•
Executed immediately upon receipt of interrupt
•
Cannot be preempted by other logic once Interrupt block begins execution
•
One additional interrupt for this block is “queued” if the block is still executing due to a previous interrupt
•
Executes during any phase of the PLC sweep
Interrupt Program
•
Scheduled to execute on a priority basis
•
Can be preempted by higher priority Interrupt program or Interrupt block
•
Additional interrupts for this program are ignored and a fault is logged if the program is still executing due to a previous interrupt
•
Executes during any phase of the PLC sweep when PLC is in Normal Sweep, Constant Sweep, or Constant Window mode
•
Executes in Logic Window when PLC is in Microcycle Sweep mode
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Section 5: Run/Stop Operations
Modes of Operation
Four run/stop modes of operation are supported by the 90-70 PLC. You can change these modes in the following ways: the toggle switch, programming software, LD function blocks, and system calls from C applications. Switching to and from various modes can be restricted based on privilege levels, position of the PLC toggle switch, passwords, etc.
Run/Outputs
Enabled
Run/Outputs
Disabled
Stop/IO Scan
In this mode, the PLC runs user programs and continually scans inputs and updates physical outputs, including Genius and Field Control outputs. The
Programmer and System Communications Windows are run in either Limited,
Run-to-Completion, or Constant mode.
In this mode, the PLC runs user programs and continually scans inputs, but updates to physical outputs, including Genius and Field Control, are not performed. Physical outputs are held in their configured default state in this mode. The Programmer and System Communications Windows are run in either
Limited, Run-to-Completion, or Constant mode.
In this mode the PLC does not run user programs, but the inputs and outputs are scanned. The Programmer and System Communications Windows are run in
Run-to-Completion mode. The Background Window is limited to 10 ms.
Stop/No IO
Scan
In this mode the PLC does not run user programs, and the inputs and outputs are not scanned. The Programmer and System Communications Windows are run in a Run-to-Completion mode. The Background Window is limited to 10 ms.
Note
You cannot store changes to %P and %L references in Run Mode unless the %P and %L references are the first of their type in the block being stored or the block being stored is a totally new block.
Note
Stop/IOScan is not supported in Microcycle Sweep mode for all Release 6 CPUs.
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Mode Transitions
Stop-to-Run Transition
Several operations are performed by the CPU on Stop-to-Run transition. These operations include the following:
•
Validation of sweep mode and program scheduling mode selections
•
Validation of references used by programs with the actual configured sizes
•
Re-initialization of data areas for external blocks and standalone C programs
•
Clearing of non-retentive memory
Run-to-Stop Transition
Wind-Down Period for Microcycle Sweep Mode
When the PLC is running in Microcycle Sweep mode (refer to section 4 for information about
Microcycle Sweep mode), a wind-down or logic solution period may occur after the PLC is commanded to Stop mode. This wind-down period is equal to the amount of time that the currently executing program(s) take to complete their execution unless that amount of time exceeds 2.5
seconds. If the currently executing programs exceed 2.5 seconds in their attempt to complete their executions, a fault will be logged in the PLC fault table, and the CPU will complete its transition to
Stop mode. During the wind-down period, no additional programs (including Interrupt programs and blocks) will be scheduled for execution. Input Scans, Output Scans, Communications Windows
(Programmer and System), and the Background Window continue during the wind-down period.
Note
By definition, exceeding the CPU wind-down period means that not all programs completed execution prior to the PLC going to Stop mode. Furthermore, when the PLC is next commanded to Run mode, all programs will begin execution at their normal beginning point. Program(s) are not resumed at their “wind-down exceeded” execution point.
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Section 6: Power-Up and Power-Down Sequences
Power-Up
System power-up consists of the following parts:
•
Power-up self-test
•
PLC memory validation
•
System configuration
•
Intelligent option module self-test completion
•
Intelligent option module dual port interface tests
•
I/O system initialization
Power-Up Self-Test
On system power-up, many modules in the system perform a power-up diagnostic self-test. Series
90-70 PLC modules execute hardware checks and software validity checks. Intelligent option modules perform setup and verification of on-board microprocessors, software checksum verification, local hardware verification, and notification to the CPU of self-check completion. Any failed tests are queued for reporting to the CPU during the system configuration portion of the cycle.
In the CPU, power-up will be either a quick power-up (a warm start) or a full power-up (a cold start), depending on whether the CPU is able to go to Run mode after powering up. If all the conditions are met for the CPU to go to Run mode—a valid program or configuration is present, the switch is in Run mode, and no fatal fault exists—then the CPU will perform a quick power-up.
If any of the conditions are not met, a full power-up is performed.
A quick power-up will only perform the CPU processor and BCP (Boolean Coprocessor) tests, along with a minimal RAM test. The goal of a quick power-up is to get the CPU up and running as quickly as possible. The remaining tests, ROM CRC, exhaustive memory tests, and peripheral tests are only performed on a full power-up.
If a low battery indication is present, then a low battery fault is logged into the PLC fault table.
PLC Memory Validation
The next phase of system power-up is the validation of the PLC memory within the CPU. First, the system verifies that the battery is not low and that battery-backed RAM areas are still valid. A known area of battery-backed application RAM is checked to determine if data was preserved.
Next, if a ladder diagram program exists, then a checksum is calculated across the _MAIN ladder block. If no ladder diagram program exists, then a checksum is calculated across the smallest standalone C program.
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When the system is sure that the application RAM is preserved, then a known area of the BCP
(Boolean Coprocessor) bit cache area is checked to determine if the BCP bit cache data was preserved. If this test passes, then the Bit Cache memory is left containing its power-up values.
(Non-retentive outputs are cleared on a transition from Stop to Run mode.) If this checksum does not compare or the retentive test on the application RAM fails, the Bit Cache memory is assumed to be in error and all areas are cleared. The PLC is now in a cleared state, the same as if a new CPU module were installed. All logic and configuration files must be stored from the programmer to the
PLC.
System Configuration
After completing its own self-test, the CPU performs the system configuration. It first clears all of the system diagnostic bits in the BCP (Boolean Coprocessor) Bit Cache memory. This prevents faults that were present before power-down, but are no longer present, from accidentally remaining as faulted. Then it polls each module in the system, checking for completion of the module’s selftest.
The CPU reads information from each module, comparing it with user-provided rack/slot configuration information. Any differences between actual configuration and user-specified configuration are logged in the fault tables.
Intelligent Option Module Self-Test Completion
Intelligent option modules may take a longer time to complete their self-tests than the CPU due to the time required to test communications media or other interface devices. As an intelligent option module completes its initial self-tests, it tells the CPU the time required to complete the remainder of these self-tests. During this time, the CPU provides whatever additional information the module needs to complete its self-configuration, and the module continues self-tests and configuration. If the module does not report back in the time it specified, the CPU marks the module as faulted and makes an entry in one of the fault tables. When all self-tests are complete, the CPU obtains reports generated during the module’s power-up self-test and places fault information (if any) in the fault tables.
Intelligent Option Module Dual Port Interface Tests
After completion of the intelligent option module self-test and results reporting, integrity tests are jointly performed on the dual-port interface used by the CPU and intelligent option module for communications. These tests validate that the two modules are able to pass information back and forth, as well as verify the interrupt and semaphore capabilities needed by the communications protocol. After dual port interface tests are complete, the communications messaging system is initialized.
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I/O System Initialization
If the module is a Model 70 input module, no further configuration is required. If the module is a
Model 70 output module, the module is commanded to go to its default state. A Model 70 output module defaults to all outputs off at power-up and in failure mode, unless told otherwise. When the module is a Bus Transmitter Module (BTM), it is interrogated about what remote racks are present in the system. Based upon the BTM’s response, the CPU adds those racks and their associated slots into the list of slots to be configured.
Finally, the I/O Scanner performs its initialization. The I/O Scanner initializes all the I/O controllers in the system by establishing the I/O connections to each I/O bus on the I/O controller and obtaining all I/O configuration data from that I/O controller. This configuration data is compared with the user-specified I/O configuration and any differences reported in the I/O fault table. The I/O Scanner then sends each I/O controller a list of the I/O modules to be configured on the I/O bus. After the I/O controllers have been initialized, the I/O Scanner replaces the factory default settings in all I/O modules with any application-specified settings.
For Model 70 input modules, the board may be set to interrupt when the signal(s) change state, and whether the interrupt will occur when the signal(s) transitions from high to low or low to high. For
Model 70 output modules, their default state may be changed from Off to Hold Last State.
Power-Down Sequence
System power-down occurs when the power supply detects that incoming AC power has dropped for more than one power cycle. A signal line on the backplane is driven low to indicate the condition, which causes an interrupt to the CPU. From the time this signal occurs, a minimum of 5 milliseconds remain to complete power-down processing.
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Retention of Data Memory Across Power Failure
Because application RAM and BCP memory are battery-backed, the following types of data are preserved across a power cycle:
•
Application program
•
Fault tables and other diagnostic data
•
Checksums on programs and blocks
•
Override data
•
Data in register (%R), local register (%L), and program register (%P) memory
•
Data in analog memory (%AI and %AQ)
•
State of discrete inputs (%I)
•
State of retentive discrete outputs (%Q)
•
State of retentive discrete internals (%M)
The following types of data are not preserved across a power cycle:
•
State of discrete temporary memory (%T)
•
%M and %Q memories used on non-retentive -()- coils
•
State of discrete system internals (system bits, fault bits, reserved bits)
2
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Section 7: Clocks and Timers
Clocks and timers provided by the Series 90-70 PLC include an elapsed time clock, a time-of-day clock, and software and hardware watchdog timers. Three types of timer function blocks include an on-delay timer, an off-delay timer, and a start-reset timer. Timed contacts cycle on and off (in square-wave form) every 0.01 second, 0.1 second, 1.0 second, and 1 minute.
Elapsed Time Clock
The elapsed time clock uses 100 microsecond “ticks” to track the time elapsed since the CPU powered on. The clock is not retentive across a power failure; it restarts on each power-up. Once per second the hardware interrupts the CPU to enable a seconds count to be updated. This seconds count rolls over (seconds count returns to zero) approximately 100 years after the clock begins timing.
Because the elapsed time clock provides the base for system software operations and timer function blocks, it may not be reset from the user program or the programmer. However, the application program can read the current value of the elapsed time clock by using Service Request function
#16.
Time-of-Day Clock
The time of day in the Series 90-70 PLC is maintained by a hardware time-of-day clock. The timeof-day clock maintains the following seven time functions:
•
Year (two digits)
•
Month
•
Day of month
•
Hour
•
Minute
•
Second
•
Day of week
The time-of-day clock is battery-backed and maintains its present state across a power failure.
However, unless the user initializes the clock, the values it contains are meaningless. The application program can read and set the time-of-day clock using Service Request function #7. The time-of-day clock can also be read and set from your programming software.
The time-of-day clock is designed to handle month-to-month and year-to-year transitions. It automatically compensates for leap years throuh year 2038.
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Watchdog Timer
Software Watchdog Timer
A software watchdog timer in the Series 90-70 PLC is designed to detect “failure to complete sweep” conditions. The timer value for the software watchdog timer is set by using your programming software. The allowable range for this timer is 10 to 2550 milliseconds; the default value is 200 milliseconds. The software watchdog timer always starts from zero at the beginning of each sweep.
The software watchdog timer is useful in detecting abnormal operation of the application program which prevents the PLC sweep from completing within the user-specified time. Examples of such abnormal application program conditions are as follows:
•
Excessive recursive calling of a block
•
Excessive looping (large loop count or large amounts of execution time for each iteration)
•
Infinite execution loop
When selecting a software watchdog value, always set the value higher than the longest expected sweep time to prevent accidental expiration. For Constant Sweep and Microcycle Sweep modes, allowance for oversweep conditions should be considered when selecting the software watchdog timer value.
If the software watchdog timeout value is exceeded, the OK LED blinks, and the CPU goes to
Stop/Halt mode. Certain functions, however, are still possible. A fault is placed in the PLC fault table, and outputs go to their default state. If you are using serial or WSI communications (not
Ethernet), the CPU will only communicate with the programmer; no other communications or operations are possible. To recover, power must be cycled on the rack containing the CPU.
To extend the current sweep beyond the software watchdog timer value, the application program may restart the software watchdog timer using Service Request function #8. However, the software watchdog timer value may only be changed from the configuration software.
Hardware Watchdog Timer
A backup circuit provides additional protection for the PLC. If this backup circuit activates, the
PLC is immediately placed in Reset mode. Outputs go to their default state; no communications of any form are possible, and the CPU will halt. To recover, power must be cycled.
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Section 8: System Security
The Series 90-70 PLC supports the following three types of system security:
1.
Passwords/privilege levels
2.
OEM protection
3.
Write protect keyswitch
Passwords and Privilege Levels
Passwords are a configurable feature of the Series 90-70 PLC. Their use is optional and may be set up using your programming software. The purpose of passwords is to provide different levels of access privilege for the PLC when the programmer is in Online or Monitor mode. Passwords are not used if the programmer is in Offline mode. The use of passwords may restrict the following:
•
Changing I/O and PLC configuration data
•
Changing programs
•
Reading PLC data
•
Reading programs
•
Locking blocks
The default state is no password protection. There is one password for each privilege level in the
PLC. Each password may be unique; however, the same password can be used for more than one level. Passwords are one to seven ASCII characters in length. Only the programmer may change passwords.
PLC password protection can be used to restrict access to selected PLC functions. After passwords have been set up, access to the PLC via any communications path is restricted unless the proper password has been entered. Once a password has successfully been accepted, access to the privilege level requested and below will be granted (for example, provide password for level 3 will allow access to functions at levels 0, 1, 2, and 3). If the PLC communications are suspended, protection level will automatically return to the lowest privilege level of the highest unprotected level or privilege level 2.
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Table 2-18. Privilege Levels
Priv Level Password
4 Yes
3
2
1
0
Yes
Yes
Yes
No
Access Description
Write to all configuration or logic. Configuration may only be written in Stop mode; logic may be written in Stop or Run mode. Set or delete passwords for any level.
Write to all configuration or logic when the CPU is in Stop mode, including word-for-word changes, the addition/deletion of program logic, and the overriding of discrete I/O.
Write to any data memory. This includes the toggle/force of reference values but does not include overriding discrete I/O. The PLC can be started or stopped. PLC and I/O fault tables can be cleared. NOTE: This is the default if no passwords are defined.
Read any PLC data, except for passwords. This includes reading fault tables, performing datagrams, verifying logic/config, load program and configuration, etc. from the PLC. NONE of this data may be changed. At this level, transition to RUN mode from the programmer is not allowed.
Read the current status of the PLC (including features supported by the PLC), read the name of the Resource (CP name prior to release 6.0), change privilege level, and log in as programmer. At this level, transition to RUN mode from the programmer is not allowed.
Note
The user must be aware that the RUN mode switch on the CPU overrides the password protection. Even though the programmer may not be able to switch between RUN and STOP mode, the switch on the CPU can do so.
Protection Level Request from Programmer
Upon connection to the CPU, the Programmer then requests the CPU to move to the highest nonprotected level, thereby giving the programmer access to the highest non-protected level without having to specifically request any particular level.
A programmer requests a privilege level change by supplying the new privilege level and the password for that level. If the password sent by the programmer does not agree with the password stored in the PLCs password access table for the requested level, the privilege level change is denied and a fault is logged in the PLC fault table. The current privilege level is maintained, and no change will occur. A request to change to a privilege level that is not password protected is made by supplying the new level and a null password. A privilege change may be to a lower level as well as to a higher level.
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Disabling Passwords
The use of password protection is optional. If the user desires to prevent the use of password protection, passwords can be disabled using the programming software.
Note
To re-enable passwords after passwords have been disabled, the PLC must be power-cycled with the battery removed.
Password protection also prevents firmware upgrades to the FLASH memories used on the CPM 914, 915, 924, 925, and all CPX models. Prior to attempting a firmware upgrade in any of these modules, disable password protection, then reenable it after the upgrade.
OEM Protection
OEM protection is similar to the passwords and privilege levels; however, OEM protection provides a higher level of security. The OEM protection feature is enabled/disabled using a 1 to 7 character password. When OEM protection is enabled, all read and write access to the PLC program and configuration is prohibited.
Protection for OEMs’ investment in software is provided in the form of a special password known as the OEM key. When the OEM key has been given a non-NULL value, the CPU may be placed in a mode in which reads and writes of the logic as well as writes to the configuration are prohibited.
This allows a third-party OEM to create Control Programs for the PLC CPU and then set the OEMlocked mode which prevents the end-user from reading or modifying the program.
Note
OEM protection also prevents firmware upgrades to the FLASH memories used on the CPM 914, 915, 924, 925, and all CPX models. Prior to attempting a firmware upgrade in any of these modules, disable OEM protection, then enable it again after the upgrade.
Write Protect Keyswitch
The 90-70 CPU models CPU 780, 781, 782, 788, 789, 790, 914, 924, 915, 925; CGR 772 and 935; and all CPX models contain a memory write protect keyswitch. This keyswitch is located on the top of the faceplate, above the upper faceplate-to-rack clip. When in the protected position, the
PLC program and configuration cannot be modified or deleted.
Note
The write protect keyswitch, when in the “write protected” position, also prevents firmware upgrades to the FLASH memories used on the CPM 790, 914, 915,
924, 925, and all CPX models. Prior to attempting a firmware upgrade in any of these modules, place the write protect keyswitch into the “write enabled” position.
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Section 9: Series 90-70 PLC I/O System
The Series 90-70 PLC I/O system provides the interface between the Series 90-70 PLC and usersupplied devices and equipment. The I/O system supports the rack-type Model 70 I/O, the Genius
I/O system, and the FIP I/O system. A Genius I/O Bus Controller (GBC) module provides the interface between the Series 90-70 PLC CPU and a Genius I/O bus. A FIP I/O Bus Controller
(FBC) module provides the interface between the Series 90-70 PLC CPU and a FIP I/O bus. In addition to supporting these three I/O subsystems, the I/O system will also support Ethernet
Interfaces and PCMs.
The I/O structure for the Series 90-70 PLC is shown in the following figure:
APPLICATION
RAM
% AI
% AQ
% R
I/O
CONFIGURATION
DATA
16 BITS
I/O
SCANNER a42946
BCP
MEMORY
% I
% T
% G
% S
% Q
% AQ
1 BIT
2
BACKPLANE
90-70
DISCRETE
INPUT
MODULE(S)
90-70
DISCRETE
OUTPUT
MODULE(S)
90-70
ANALOG
I/O
MODULE(S)
90-70
ANALOG
INPUT
EXPANDER(S)
GENIUS
BUS
CONTROLLER(S)
FIP
BUS
CONTROLLER(S)
GENIUS DEVICES
(SUCH AS FIELD
CONTROL, ETC.)
FIP DEVICES
(SUCH AS FIELD
CONTROL STATIONS,
FIP REMOTE I/O
SCANNERS, ETC.)
Figure 2-13. Series 90-70 PLC I/O Structure
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I/O Data Mapping
Discrete inputs and outputs are stored as bits in the CPU BCP Bit Cache memory. Analog I/O is stored in the application RAM allocated for that purpose. Analog data is always stored in the demultiplexed state, with each channel requiring one word (16 bits).
Default Conditions
The programming software provides the ability to specify that the first input may be an interrupt input and for the filter speed to be fast or slow; but upon power-up, Model 70 discrete input modules always default to the first input on the module not interrupting and the input filter being slow speed. If changed by the user, new defaults are applied when the board is configured by the
CPU during the power-up process or whenever else the module may go through configuration.
Model 70 discrete output modules default to all outputs off. The configuration utility provides the ability to specify the default which will be applied when the CPU transitions from Run/Enabled to
Run/Disabled or Stop mode. It also applies this default information when the system halts.
Genius I/O
Information relative to using Genius I/O in a Series 90-70 PLC system is presented in the following paragraphs. For specific information on Genius I/O block types, configuration, and setup, refer to the Genius I/O System User’s Manuals, GEK-90486-1 and -2.
Genius I/O Bus Configuration
The Bus Controller used in the Series 90-70 PLC controls a single Genius I/O bus. Any type of
Genius I/O block may be attached to the bus.
In the I/O fault table, the rack, slot, bus, module, and I/O point number are given for a fault. Bus number one refers to the bus on the single-channel Genius Bus Controller.
Genius I/O Data Mapping
Genius I/O discrete inputs and outputs are stored as bits in the CPU Bit Cache memory. Genius I/O analog data is stored in the application RAM allocated for that purpose (%AI and %AQ). Analog data is always stored one channel per one word (16 bit).
An analog grouped module consumes (in the input and output data memories) only the amount of data space required for the actual inputs and outputs. For example, the Genius I/O 115 VAC
Grouped Analog Block, IC660CBA100, has four inputs and two outputs; it consumes four words of
Analog Input memory (%AI) and two words of Analog Output memory.
A discrete grouped module, each point of which is configurable with the Hand-Held Monitor
(HHM) to be input, output, or output with feedback, consumes an amount in both discrete input memory (%I) and discrete output memory (%Q) equal to its physical size. Therefore, the 8 I/O 115
VAC Discrete Grouped Block (IC660CBD100) requires 8 bits in the %I memory and 8 bits in the
%Q memory, regardless of how the block is configured.
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The following four Genius I/O blocks are assigned to the analog memories:
•
6-Channel Analog Grouped Block
•
6-Channel Thermocouple Block
•
6-Channel RTD Block
•
4-Channel Strain Gauge/mV Analog Input Block
The Thermocouple and RTD blocks are also referred to as Low-Level Analog Input blocks.
Analog Grouped Block
The Analog Grouped block contains four analog input channels and two analog output channels.
When a block gets its turn on the Genius I/O Bus, it broadcasts the data for all four input channels in one broadcast control message. Then, when the Bus Controller gets its turn, it sends the data for both output channels to the block in a directed control message.
Low-Level Analog Blocks
Unlike the Analog Grouped block, the low-level analog blocks are input-only blocks. All have six channels.
Default Conditions
Genius I/O blocks have a number of default conditions that may be set using the Genius I/O Hand-
Held Monitor. These defaults include the following:
•
Report faults
•
Range select
•
Analog input and output scaling
•
Input filter time
•
Alarm input mode
•
Output hold last state
•
Output default
These defaults are stored in EEPROM in the block itself. The Series 90-70 PLC configuration utility supports the changing of only a small subset of these defaults. For more information, refer to the Genius I/O System User’s Manuals, GEK-90486-1 and -2.
Through the COMMREQ function block, the application program can request the Bus Controller to change any default condition on a specific block. However, this change will only be accepted by the block if it is not in Config Protect mode. If Config Protect mode is set, only the Hand-Held
Monitor can be used to change the defaults. The format of the COMMREQ function block for
Genius I/O is described in the Genius Bus Controller User’s Manual, GFK-0398.
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Genius Global Data Communications
The Series 90-70 PLC supports the sharing of data among multiple PLC systems that share a common Genius I/O bus. This mechanism provides a means for the automatic and repeated transfer of %G, %I, %Q, %AI, %AQ, and %R data. No special application programming is required to use global data since it is integrated into the I/O scan. All GE Intelligent Platforms PLCs that have
Genius I/O capability can send global data to a Series 90-70 PLC and can receive data from a
Series 90-70 PLC. Your programming software is used to configure the receiving and transmitting of global data on a Genius I/O bus.
Note
Genius global data communications do not continue to operate when the 90-70
PLC is in STOP/NOIO mode. However, if the 90-70 PLC is in STOP/IOSCAN mode, then Genius global data communications will continue to operate.
FIP I/O
Information relative to using FIP I/O in a Series 90-70 PLC system is presented in the following paragraphs. For specific information on FIP I/O types, configuration, and setup, refer to the Series
90-70 FIP Bus Controller User’s Manual, GFK-1038.
FIP I/O Bus Configuration
The FIP Bus Controller used in the Series 90-70 PLC controls a single FIP I/O bus. Currently supported are the 90-30 FIP Remote I/O Scanner, FIP Bus Interface Unit (for Field Control), and generic FIP I/O module configurations. All of the FIP I/O interface modules (for example, the FIP
Remote I/O Scanner) must provide input data to the 90-70 FIP Bus Controller so that the FIP Bus
Controller has this same input data to provide to the 90-70 CPU during the next normal input scan.
Similarly, when the 90-70 CPU performs the next output scan, the FIP Bus Controller accepts this output data and passes it on to the appropriate FIP I/O interface module to then update the local
I/O.
90-30 FIP Remote I/O Scanner
The FIP Remote I/O Scanner provides the ability to use 90-30 I/O as a remote I/O node on a FIP
I/O network. The FIP Remote I/O Scanner module provides the communications interface to the
FIP I/O network (communications with the 90-70 FIP Bus Controller) and also provides the I/O scanning function for the local 90-30 I/O modules. (For more information on the 90-30 FIP Remote
I/O Scanner, please refer to the 90-30 FIP Remote I/O Scanner User Manual, GFK-1037)
FIP Bus Interface Unit (Field Control)
The FIP Bus Interface Unit provides the ability to use Field Control I/O as a remote I/O node on a
FIP I/O network. The FIP Bus Interface Unit module provides the communication interface to the
FIP I/O network (communications with the 90-70 FIP Bus Controller) and also provides the I/O
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
2
scanning function for the local Field Control modules. (For more information on FIP Field Control, please refer to the FIP Bus Interface Unit User’s Manual, GFK-1175).
Generic FIP I/O
Generic FIP I/O allows for configuring FIP I/O other than the FIP Remote I/O Scanner and FIP
Bus Interface Unit. This permits the 90-70 CPU and the 90-70 FIP Bus Controller to assign I/O reference addresses to the generic FIP I/O device. The configuration selection also permits the 90-
70 FIP Bus Controller to recognize the generic FIP I/O module on the FIP I/O network.
FIP I/O Fault Data
In the I/O fault table, the rack, slot, FIP drop ID, remote rack, and remote slot number are given for faults occurring in an FIP Remote I/O Scanner or FIP Bus Interface Unit controlled remote I/O node. No fault information can be obtained from generic FIP I/O.
FIP I/O Data Mapping
FIP I/O discrete inputs and outputs are stored as bits in the CPU Bit Cache memory. FIP I/O analog data is stored in the application RAM allocated for that purpose (%AI and %AQ). Analog data is always stored one channel per one word (16 bit).
An analog grouped module consumes (in the input and output data memories) only the amount of data space required for the actual inputs and outputs. For example, an analog module with four inputs and two outputs consumes four words of Analog Input memory (%AI) and two words of
Analog Output memory.
Default Conditions
FIP I/O devices have a number of default conditions which may be set using your programming software. The default conditions include the following:
•
Range select
•
Analog input scaling
•
Analog output scaling
•
Discrete output default Off (fixed)
•
Analog output default Hold Last State (fixed)
Diagnostic Data Collection
Diagnostic data in a Series 90-70 PLC I/O system is obtained in one of the following two ways:
1.
If an I/O module has an associated Bus Controller (Genius Bus Controller or FIP Bus
Controller), then the Bus Controller provides the module’s diagnostic data for the CPU.
2.
If an I/O module is a Model 70 I/O module, then the CPU’s I/O Scanner subsystem generates the diagnostic bits based on the data provided by the I/O module.
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The diagnostic bits are derived from the diagnostic data sent from the I/O modules to their I/O controllers (Genius Bus Controller, FIP Bus Controller, or 90-70 CPU). Diagnostic bits always indicate the current fault status of the associated module. Bits are set when faults occur and are cleared when faults are cleared.
In general, diagnostic data is not maintained by the Series 90-70 PLC for foreign I/O (not GE
Intelligent Platforms) modules. Any diagnostic information provided by those boards must
be specifically accessed by the application program using the VME Read and VME Write functionblocks.
Beginning with 90-70 CPU release 5.50, the 90-70 system supports third-party I/O modules when developed under license agreement with GE Intelligent Platforms . These boards are then configured as
“3 rd
PartyVME” and the interface mode is “I/O Scan.” Boards developed to conform to the I/O Scan interface can provide discrete and analog diagnostic information to the 90-70 CPU.
Discrete I/O Diagnostic Information
Diagnostic information is maintained by the Series 90-70 PLC for each discrete I/O point. Two memory blocks are allocated in application RAM for discrete diagnostic data. One is associated with %I memory and the other with %Q memory. One bit of diagnostic memory is associated with each I/O point. This bit indicates the validity of the associated I/O data. Each discrete point has a fault reference available that may be interrogated using two special contacts: a fault contact (-
[FAULT]-) and a no-fault contact (-[NOFLT]-). The PLC only collects this fault data if enabled to do so through your programming software. The following table shows the state of the fault and nofault contacts.
Condition
Fault Present
Fault Absent
[FAULT]
ON
OFF
[NOFLT]
OFF
ON
Analog I/O Diagnostic Data
Diagnostic information is made available by the PLC CPU for each analog channel associated with
Model 70 analog input modules, Model 70 analog output modules, Genius analog blocks, etc. Two memory blocks are allocated for analog diagnostic data. One is associated with %AI analog input memory and the other with %AQ analog output memory. One byte of diagnostic memory is allocated for each analog I/O channel. Since each analog I/O channel uses two bytes of %AI and
%AQ memory, the diagnostic memory is half the size of the data memory.
The analog diagnostic data contains both diagnostics and process data with the process data being the High Alarm and Low Alarm bits. The diagnostic data is referenced with the -[FAULT]- and -
[NOFLT]- contacts. The process bits are referenced with the -[HIALR]- and -[LOALR]- contacts.
The memory allocation for analog diagnostic data is one byte per word of analog input and analog output allocated by the user. When an analog fault contact is referenced in the application program, the PLC does an Inclusive OR on all the bits in the diagnostic byte except the process bits. The alarm contact is closed if any diagnostic bit is ON and OFF, only if all bits are OFF.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Chapter
3
Fault Explanation and Correction
This chapter is an aid to troubleshooting a Series 90-70 PLC system. It explains the fault descriptions, which appear in the PLC fault table, and the fault categories, which appear in the I/O fault table.
Each fault explanation in this chapter lists the fault description for the PLC fault table or the fault category for the I/O fault table. Find the fault description or fault category corresponding to the entry on the applicable fault table displayed on your programmer screen. Beneath it is a description of the cause of the fault along with instructions to correct the fault.
Chapter 3 contains the following sections:
Section
1
2
3
4
Title
System Handling of
Faults (General)
Fault Handling
PLC Fault Table
Explanations
I/O Fault Table
Explanations
Description
Describes the PLC system faults (SY_FLT) and the I/O faults (IO_FLT). Describes configurable faults, changing the fault action, non-configurable faults, and locating fault references (rack, slot, bus, and FIP locating references).
Describes the type of faults that may occur in the
Series 90-70 PLC and how they are displayed in the fault tables. Descriptions of the PLC and I/O fault table displays are also included.
Provides a fault description of each PLC fault and instructions to correct the fault.
Provides a description of each I/O fault and instructions to correct the fault.
Page
3-2
3-10
3-16
3-38
GFK-0265J 3-1
3
Section 1: System Handling of Faults (General)
The system fault references listed below can be used to identify the specific type of fault that has occurred.
System Fault Reference
ANY_FLT
SY_FLT
IO_FLT
SY_PRES
IO_PRES
HRD_FLT
SFT_FLT
Description
Any fault in the system.
Any system fault in the Series 90 PLC.
Any I/O fault.
Indicates a new entry in the PLC fault table.
Indicates a new entry in the I/O fault table.
Any hardware fault.
Any software fault.
On power-up, the system fault references are cleared. If a fault occurs, the on-transition state of the affected reference(s) is on the next sweep after the fault occurs. The system fault references remain on as long as the fault exists, until the PLC is cleared or until cleared from the program. The
ANY_FLT fault is set when any other fault is set. The SY_PRES and IO_PRES faults are set when the PLC and I/O fault table contain entries.
3-2 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
System Fault References
When a system fault reference is set, additional fault references are also set. The following table lists these other types of faults. References marked with asterisks below are configurable system fault references.
Table 3-1. System Fault References
Fault Type PLC System Fault (SY_FLT) I/O Fault (IO_FLT)
Hardware Fault
(HRD_FLT)
SBUS_ER System bus error
HRD_CPU PLC CPU hardware fault. HRD_SIO
Module hardware fault
SBUS_FL System bus failure *
Software Fault
(SFT_FLT)
SFT_SIO Intelligent module software fault
SFT_CPU PLC software fault *
MAX_IOC Too many Bus Controllers *
STOR_ER Programmer download failed *
Other Faults PB_SUM block checksum fault
LOW_BAT Low battery signal
OV_SWP Over constant sweep time
SY_FULL PLC fault table full
IO_FULL I/O fault table full
APL_FLT Application program fault
NO_PROG No application program at power-up *
BAD_RAM Corrupted program memory *
WIND_ER Incomplete window service *
BAD_PWD Password access failure *
NUL_CFG No configuration present *
LOS_SIO Loss of option module. *
ADD_RCK Addition of expansion rack *
ADD_SIO Addition of option module *
CFG_MM Configuration mismatch *
LOS_RCK Loss of rack *
SFT_IOC I/O Controller software fault
LOS_IOC Loss of I/O Controller
LOS_IOM Loss of I/O module
ADD_IOC Addition of I/O controller
ADD_IOM Addition of I/O module
IOC_FLT Bus or I/O Controller fault
IOM_FLT I/O module fault
* Configurable system fault references.
3
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3
Configurable Fault Actions
For some faults, the PLC must stop execution. For other faults, the appropriate response to a fault may depend on the nature of the application. All faults are initially assigned to one of these three actions:
Fault Action Description
Fatal
Diagnostic
These faults halt the system, set diagnostic variables, and are logged in a fault table.
These faults do not halt the system. They do, however, set diagnostic variables and are logged in a fault table.
Informational These faults are logged in a fault table, but cause no other action.
For some faults, called “non-configurable” faults, the fault action cannot be changed. Other faults, called “configurable” faults, can have their fault type changed to another fault action if such a change is suitable for the application. The following table lists configurable faults:
Table 3-2. Fault References for Configurable Faults
Fault
(Default Action) Description May Also Be Set
SBUS_ER
(diagnostic)
SFT_IOC*
(diagnostic)
LOS_RCK**
(diagnostic)
LOS_IOC***
(diagnostic)
LOS_IOM
(diagnostic)
System bus error.
(The BSERR* signal was generated on the VME system bus.)
Non-recoverable software error in a I/O Controller.
Loss of rack (BRM failure, loss of power), or missing a configured rack.
Loss of I/O Controller channel, or missing a configured
Bus Controller.
Loss of I/O module (does not respond), or missing a configured I/O module.
HRD_FLT
SY_PRES, SY_FLT
Other references may also be set depending on the type of access when the
BSERR* occurred.
IO_FLT, IO_PRES
SFT_FLT
SY_FLT, SY_PRES
IO_FLT, IO_PRES
IO_FLT, IO_PRES
IO_FLT, IO_PRES
LOS_SIO
(diagnostic)
IOC_FLT
(diagnostic)
Loss of intelligent module (does not respond), or missing a configured module.
Non-fatal bus or I/O Controller error, more than 10 bus errors in 10 seconds (error rate is configurable).
SY_FLT, SY_PRES
IO_FLT, IO_PRES
CFG_MM
(fatal)
Wrong module type detected during power-up or Run mode. The PLC does not check the configuration parameters set up for individual modules such as Genius
I/O blocks.
SY_FLT, SY_PRES
* The SFT-IOC software fault will have the same action as what you set for LOS_IOC.
** When a Loss of Rack or Addition of Rack fault is logged, individual loss or add faults for each module in that rack are usually not generated.
*** Even if the LOS-IOC fault is configured as Fatal, the PLC will not go to STOP/FAULT unless both
Genius Bus Controllers of an internal redundant pair fail.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Note
If the fault action for a fault logged to the fault table is informational, the configured action is not used. For example, if the logged fault action for an
SBUS_ERR is informational, but you configure it as fatal, the action is still informational.
Non-Configurable Faults
For non-configurable faults, the fault action cannot be changed.
The following table lists non-configurable faults.
SFT_SIO
(diagnostic)
PB_SUM
(fatal)
LOW_BAT
(diagnostic)
OV_SWP
(diagnostic)
SY_FULL
IO_FULL
(diagnostic)
APL_FLT
(diagnostic)
ADD_RCK**
(diagnostic)
ADD_IOC
(diagnostic)
ADD_IOM
(diagnostic)
ADD_SIO
(diagnostic)
Table 3-3. Non-Configurable Faults
Fault
SBUS_FL
(fatal)
HRD_CPU
(fatal)
HRD_SIO
(diagnostic)
Description Result
System bus failure. The PLC CPU was not able to access the VME bus.
BUSGRT*NMI error.
PLC CPU hardware fault, such as failed memory device or failed serial port).
Non-fatal hardware fault on any module in the system, such as failure of a serial port on a PCM.
Non-recoverable software error in a PCM or LAN interface module.
Program or block checksum failure during power-up or in Run mode.
Low battery signal from CPU or another module in system.
Constant sweep time exceeded.
Sets SY_FLT, HRD_FLT, and
SY_PRES.
SY_FLT, SY_PRES
HRD_FLT
SY_FLT, SY_PRES
HRD_FLT
SY_FLT, SY_PRES
SFT_FLT
SY_FLT, SY_PRES
SY_FLT, SY_PRES
SY_FLT, SY_PRES
IOM_FLT
(diagnostic)
PLC fault table full (16 entries).
I/O fault table full (32 entries).
Application fault.
New rack added, or previously faulted rack has returned.
Previously faulted I/O Controller is no longer faulted.
Previously faulted I/O module is no longer faulted.
New intelligent module is added, or previously faulted module no longer faulted.
Point or channel on an I/O module; a partial failure of the module.
SY_FLT, SY_PRES
IO_FLT, IO_PRES
SY_FLT, SY_PRES
SY_FLT, SY_PRES
IO_FLT, IO_PRES
IO_FLT, IO_PRES
SY_FLT, SY_PRES
IO_FLT, IO_PRES
3
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Table 3-3. Non-Configurable – Continued
Fault Description Result
NO_PROG
(information)
BAD_RAM
(fatal)
WIND_ER
(information)
No application program is present at power-up. Should only occur the first time the PLC is powered up or if the batterybacked RAM containing the program fails.
Does not set any references. PLC will not go to Run mode; it continues executing
Stop mode sweep until a valid program is loaded. This can be a “null” program that does nothing. Sets SY_FLT and
SY_PRES.
Sets SY_FLT and SY_PRES.
Corrupted program memory at power-up.
Program could not be read and/or did not pass checksum tests.
Window completion error. Servicing of
Programmer or Logic Window was skipped. Occurs in Constant Sweep or
Microcycle Sweep Mode.
Sets SY_FLT and SY_PRES.
BAD_PWD
(information)
Change of privilege level request to a protection level was denied; bad password.
Sets SY_FLT and SY_PRES.
NUL_CFG
(fatal)
SFT_CPU
(fatal)
No configuration present upon transition to Run mode. Running without a configuration is equivalent to suspending the I/O scans.
CPU software fault. A non-recoverable error has been detected in the CPU. May be caused by Watchdog Timer expiring.
Sets SY_FLT and SY_PRES.
PLC immediately transitions to Error
Sweep mode. The only activity permitted is communication with the programmer.
To be cleared, PLC power must be cycled. Sets SY_FLT, SY_PRES, and
SFT_FLT.
Sets SY_FLT, SY_PRES, and SFT_FLT.
MAX_IOC
(fatal)
The maximum number of bus controllers has been exceeded. The Series
90 PLC supports 32 bus controllers.
STOR_ER
(fatal)
Download of data to PLC from the programmer failed; some data in PLC may be corrupted.
PLC will not transition to Run mode.
This fault is not cleared at power-up, intervention is required to correct it. Sets
SY_FLT and SY_PRES.
**When a Loss of Rack or Addition of Rack fault is logged, individual loss or add faults for each module in that rack are usually not generated.
Fault Contacts
Fault (-
[
FAULT]-) and no-fault (-
[
NOFLT]-) contacts can be used to detect the presence of various faults in the system. These contacts can not be overridden. The following table shows the state of fault and no-fault contacts.
Condition
Fault Present
Fault Absent
[FAULT]
ON
OFF
[NOFLT]
OFF
ON
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3
Fault Locating References (Rack, Slot, Bus, Module)
The Series 90-70 PLC supports reserved fault names for each rack, slot, bus, and module if the hardware is configured. By programming these names on the FAULT and NOFLT contact instructions, logic can be executed to locate faults associated with configured racks and modules.
Format of Fault References
Table 3-4. Fault Reference Names
Fault Reference
Type
Reserved
Name
Rack
Slot
Bus
Module
FIP Module
RACK_0r
SLOT_rs
BUS_rsb
(Genius only)
M_rsbmm
(Genius only)
F_rsmmm
(FIP only)
Comment
Where r is rack number 0 to 7.
Where r is rack number 0 to 7 and s is slot number 0 to 9.
Where r is rack number 0 to 7, s is slot number 0 to 9, and b is the Genius bus number 1 or 2.
Where r is rack number 0 to 7, s is slot number 0 to 9, b is the Genius bus number 1 or 2, and mm is the Serial Bus
Address (SBA) number 00 to 31.
Where r is rack number 0 to 7, s is slot number 0 to 9, and mmm is the FIP station address 000 to 255.
These fault names can only be programmed on the FAULT and NOFLT contacts. The reserved fault names are always available. It is not necessary to enable a special option, such as point faults.
These fault names do not correspond to %SA, %SB, %SC, or to any other reference type. Only the name is displayed. A reference table screen is not provided for the fault references.
The format of a rack fault name is RACK_0r, where r is the rack number 0 to 7. For example,
RACK_01 shown in the example below represents rack 1.
The format of a slot fault name is SLOT_rs, where r is the rack number 0 to 7 and s is the slot number 0 to 9. For example, SLOT_15 shown in the example below represents rack 1, slot 5.
|
| RACK_01 SLOT_15 %Q00002
|—[FAULT]—[NOFLT]——————————————————————————————————————————————————————————( )—
|
The format of a bus fault name is a BUS_rsb, where r is the rack number 0 to 7, s is the slot number
0 to 9, and b is the bus number 1 or 2. For example, BUS_241 represents rack 2, slot 4, bus 1.
The format of a module fault name is M_rsbmm, where r is the rack number 0 to 7, s is the slot number 0 to 9, b is the bus number 1 or 2, and mm is the module number 00 to 31. For example,
M_26128 represents rack 2, slot 6, bus 1, module 28.
The format of a FIP module fault is F_rsmmm, where r is the rack number 0 to 7, s is the slot number 0 to 9, and mmm is the FIP station address.
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Behavior of Fault References
At power-up, all fault locating references are cleared in the PLC. When a fault is logged, the PLC transitions the state of the affected reference(s). The state of the fault reference remains in the fault state until one of the following actions occurs:
•
Both the PLC and the I/O fault tables are cleared through your programming software either by clearing each table individually or clearing the entire PLC memory.
•
The associated device (rack, I/O module, or Genius device) is added back into the system.
Whenever an “Addition of. . . ” fault is logged, the PLC initializes all fault references associated with the device to the NoFlt state. These references remain in the NoFlt state until another fault associated with the device is reported. (This could take several seconds for distributed I/O faults, especially if the bus controller has been reset.)
•
For FIP faults, refer to the Series 90-70 FIP Bus Controller User's Manual (GFK-1038).
Note
These fault references are set for informational purposes only. They should not be used to qualify I/O data. The I/O point fault references (described on page 3-9) may be used to qualify I/O data. The PLC does not halt execution as a result of setting a fault locating reference to the Fault state.
The fault references have a cascading effect. If there is a problem in the module located at rack 5, slot 6, bus 1, module 29, the following faults references are set: RACK_05, SLOT_56, BUS_561, and M_56129. There will only be one entry in the fault table to describe the problem with the module. The fault table does not show entries pertaining to the rack, slot, and bus in this case. A fault in FIP device at rack 5, slot 6, module 29 results in the following fault references being set:
RACK_05, SLOT_56, F_56029.
A module fault for a FIP Remote I/O Scanner device results in only one module fault type fault reference being set. For example, if FIP module with station ID 43 in 90-70 rack 3, slot 9 is an FIP
Remote I/O Scanner, and within the FIP Remote I/O Scanner there is a faulted module in the FIP
Remote I/O Scanner’s rack 1, slot 5, then only fault reference F_39043 will be set.
Alarm Contacts
High (-
[
HIALR]-) and low (-
[
LOALR]-) alarm contacts are used to represent the state of the analog input module comparator function. However, the use of point faults must first be enabled in
Hardware Configuration. For details about enabling Point Fault References, refer to the
Logicmaster User's Manual (GFK-0263) or the online help in Hardware Configuration within
CIMPLICITY Control.
The following example logic uses both high and low alarm contacts.
|
|%AI0001 %Q00003
|—[HIALR]+—————————————————————————————————————————————————————————————————( )—
| |
|%AI0002 |
|—[LOALR]+
|
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Note
HIALR and LOALR contacts will not create an entry in a fault table.
Point Faults
Point faults pertain to external I/O faults, although they will also be set due to the failure of associated higher-level internal hardware (for example, IOC failure or loss of a rack). In order to use point faults, they must be enabled in Hardware Configuration. For details about enabling Point
Fault References, refer to the Logicmaster User's Manual (GFK-0263) or the online help in
Hardware Configuration within CIMPLICITY Control.
When enabled, a Boolean reference for each discrete I/O point fault and a byte reference for each analog I/O channel level fault are allocated in PLC memory. The PLC memory used for point faults is included in the total reference table memory size. The FAULT and NOFLT contacts described above provide access to the point fault.
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Section 2: Fault Handling
Faults occur in the Series 90-70 PLC system when certain failures or conditions happen which affect the operation and performance of the system. These conditions, such as the loss of an I/O module or rack, may affect the ability of the PLC to control a machine or process. These conditions may also have beneficial effects, such as when a new module comes online and is now available for use. Or these conditions may only act as an alert, such as a low battery signal which indicates that the battery protecting the memory needs to be changed.
For information on system status/fault references, refer to Chapter 2, section 3, “Program
Organization.”
Alarm Processor
The condition or failure itself is called a fault. When a fault is received and processed by the CPU, it is called an alarm. The software in the CPU which handles these conditions is the Alarm
Processor. The interface to the user for the Alarm Processor is through the programming software.
Any detected fault is recorded in a fault table and displayed on either the PLC fault table screen or the I/O fault table screen, as applicable.
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Classes of Faults
The Series 90-70 PLC detects several classes of faults. These include internal failures, external failures, and operational failures.
Table 3-5. Classes of Faults
Fault Class Examples
Internal Failures Non-responding modules.
Low battery condition.
Memory checksum errors.
External I/O Failures Loss of rack or module.
Addition of rack or module.
Loss of Genius I/O block.
Operational Failures Communication failures.
Configuration failures.
Password access failures.
System Reaction to Faults
Typically, hardware failures require that either the system be shut down or the failure be tolerated.
I/O failures may be tolerated by the PLC system, but they may be intolerable by the application or the process being controlled. Operational failures are normally tolerated. Series 90-70 PLC faults have three attributes:
Table 3-6. Fault Attributes
Attribute Description
Fault Table Affected I/O fault table
PLC fault table
Fault Action
Fault Response
Fatal
Diagnostic
Informational
Configurable
Non-configurable
Fault Tables
The two fault tables—the PLC fault table and the I/O fault table—are provided in this chapter to make faults easier to find.
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Fault Action
Fatal faults cause the fault to be recorded in the appropriate table, any diagnostic variables to be set, and the system to be stopped. Diagnostic faults are recorded in the appropriate table, and any diagnostic variables are set. Informational faults are only recorded in the appropriate table.
Table 3-7. Fault Actions
Fault Action Response by CPU
Fatal
Diagnostic
Log fault in fault table.
Set fault references.
Go to Stop mode.
Log fault in fault table.
Set fault references.
Informational Log fault in fault table.
Your programming software provides the capability to change the fault action of certain faults.
There are two possible classifications in the utility: fatal and non-fatal. These correspond to fatal and diagnostic fault action in the PLC. Only fatal faults cause the system to halt. Additionally, the informational fault action only logs faults in the fault table.
When a fault is detected by the CPU, it uses a default fault action for that fault. For those faults which may have their action changed by the programming software, the CPU uses the fault action specified by the software; this may be the default action or the action chosen by the user.
Fault Response
Fault response refers to the ability of a fault to have its fault action changed. Those faults that can have their fault action changed are called configurable faults. Those which cannot are called nonconfigurable faults. Non-configurable faults are either fatal or informational. Also, nonconfigurable faults do not cause application available references to be set and cannot have alarm blocks associated with the detection of the fault. Some non-configurable faults also have other effects associated with them. Generally, these effects control the changing of the CPU’s execution mode (Stop, Run/Disabled, Run/Enabled). An example of such an effect is the disabling of I/O when a null system configuration is detected in the system.
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PLC Fault Table
The PLC fault table displays PLC faults such as password violations, PLC/configuration mismatches, parity errors, and communications errors.
The programmer may be in any operating mode. However, if the programmer is in Offline mode, no faults are displayed. In Online or Monitor mode, PLC fault data is displayed. In Online mode, faults can be cleared (this may be password protected).
Field Description
Top Fault Displayed The index of the PLC fault currently at the top of the fault display is shown on the first line of this screen.
Total Faults The total number of faults since the table was last cleared.
Table Last Cleared The date and time faults were last cleared from the fault table. This information is maintained by the PLC.
Entries Overflowed The number of entries lost because the fault table has overflowed since it was cleared. The PLC fault table can contain up to 40 faults (16 prior to Release 6— configurable in CIMPLICITY Control).
PLC Time/Date The current date and time. This is also maintained by the PLC.
Note
The size of the PLC fault table is configurable (with a default of 16 and a maximum of 40—configurable in CIMPLICITY Control). Additional faults (over the configured limit) cause the table to overflow, and faults are lost. The system reference SY_FULL (%S0009) is set to indicate that the fault table is full.
User-Defined Faults
User-defined faults can be logged in the PLC fault table. When a user-defined fault occurs, it is logged in the appropriate fault table as “Application Msg
(error_code):” and may be followed by a descriptive message up to 24 characters.
All characters in the descriptive message can be defined by the user. Although the message must end with the null character, e.g., zero (0), the null character does not count as one of the 24 characters. If the message contains more than 24 characters, only the first 24 characters are displayed.
Certain user-defined faults can be used to set a system status reference
(%SA0081–%SA0112).
Note
User-defined faults are created using Service Request 21 (refer to Chapter 4 in this manual).
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I/O Fault Table
The I/O fault table displays I/O faults such as circuit faults, address conflicts, forced circuits, and
I/O bus faults.
The programmer may be in any operating mode. However, if the programmer is in Offline mode, no faults are displayed. In Online or Monitor mode, PLC fault data is displayed. In Online mode, faults can be cleared (this feature may be password protected).
Field Description
Top Fault Displayed The index of the I/O fault currently at the top of the fault display is shown on the first line of this screen.
Total Faults
Fault Description
The total number of faults since the table was last cleared.
A more specific indication of the type of fault that is currently highlighted in the
I/O fault table.
Table Last Cleared The date and time faults were last cleared from the fault table. This information is maintained by the PLC.
Entries Overflowed The number of entries lost because the fault table has overflowed since it was cleared. The I/O fault table can contain up to 32 faults.
PLC Time/Date The current date and time. This is also maintained by the PLC.
Note
The size of the I/O fault table is configurable (with a default of 32 and a maximum of 40—configurable in CIMPLICITY Control). Additional faults (over the configured limit) cause the table to overflow, and faults are lost. The system reference IO_FULL (%S0010) is set to indicate that the fault table is full.
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Accessing Additional Fault Information
The fault tables displayed by the programming software contain basic information regarding the fault. For additional information a pertaining to each fault, double-click the fault as it appears in the programming software to access the Details window.
The last entry, Correction, for each fault explanation in this chapter lists the action(s) to be taken to correct the fault. Note that the corrective action for some of the faults includes the statement:
Display the PLC fault table on the programmer. Contact GE Intelligent Platforms PLC Field
Service, giving them all the information contained in the fault entry.
This second statement means that you must tell Field Service both the information readable directly from the fault table and the hexadecimal information. Field Service personnel will then give you further instructions for the appropriate action to be taken.
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Section 3: PLC Fault Table Explanations
Each fault explanation contains a fault description and instructions to correct the fault. Many fault descriptions have multiple causes. In these cases, the error code and additional fault information are used to distinguish among different fault conditions sharing the same fault description. The error code is the first two hexadecimal digits in the fifth group of numbers, as shown in the following example.
01 000000 01030100 0902 0200 000000000000
Error Code (first two hex digits in fifth group
Some faults can occur because random access memory on either the PLC CPU board or the expansion memory board has failed. These same faults may also occur because the system has been powered off and the battery voltage is (or was) too low to maintain memory. To avoid excessive duplication of instructions when corrupted memory may be a cause of the error, the correction simply states:
Perform the corrections for Corrupted Memory.
This means:
1
.
If the system has been powered off, replace the battery. Battery voltage may be insufficient to maintain memory contents.
2
.
Replace the expansion memory board. Integrated circuits on the memory board may be failing.
3
.
Replace the PLC CPU board. The integrated circuits on the PLC CPU board may be failing.
Note
For information about values for fault groups, refer to Appendix B.
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Configurable Faults
Configurable faults can have their fault action (fatal or diagnostic) changed. The CPU uses the fault action specified by the software; this may be the default action or a fault action chosen by the user.
In this section, the default fault action is listed for configurable faults.
Loss of or Missing Rack
The fault group Loss of or Missing Rack occurs when the system cannot communicate with an expansion rack because the BTM (Bus Transmitter Module) in the main rack failed, the BRM (Bus
Receiver Module) in the expansion rack failed, power failed in the expansion rack, or the expansion rack was configured in the configuration file but did not respond during power-up. The default fault action for this group is Diagnostic.
Error Code:
1
Name:
Rack Lost
Description:
The PLC generates this error when the main rack can no longer communicate with an expansion rack. The error is generated for each expansion rack that exists in the system.
Correction:
(1) Power off the system. Verify that both the BTM and the BRM are seated properly in their respective racks and that all cables are properly connected and seated.
(2) Replace the cables.
(3) Replace the BRM.
(4) Replace the BTM.
Error Code:
2
Name:
Rack Not Responding
Description:
The PLC generates this error when the configuration file stored from the programmer indicates that a particular expansion rack should be in the system but none responds for that rack number.
Correction:
(1) Check rack number jumper behind power supply—first on missing rack and then on all other racks—for duplicated rack numbers.
(2) Update the configuration file if a rack should not be present.
(3) Add the rack to the hardware configuration if a rack should be present and one is not.
(4) Power off the system. Verify that both the BTM and the BRM are seated properly in their respective racks and that all cables are properly connected and seated.
(5) Replace the cables.
(6) Replace the BRM.
(7) Replace the BTM.
(8) Check for Termination Plug on last BRM.
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Loss of or Missing Option Module
The fault group Loss of or Missing Option Module occurs when a GEnet, PCM, BTM, or BRM fails to respond. The failure may occur at power-up if the module is missing or during operation if the module fails to respond. The default fault action for this group is Diagnostic.
Error Code:
3
Name:
Bus Transmitter Module Found in Expansion Rack
Description:
The PLC generates this error when a Bus Transmitter Module is found in an expansion rack.
Correction:
Power off the system and remove the BTM from the expansion rack.
Error Code:
16
Name:
Analog Expander Located to the Left of the Base Converter module.
Description:
An Analog Expander module has been placed in a rack to the left of its Base Converter module.
Correction:
Power off the system. Move the Analog Expander module to the right of the Base Converter module.
Error Code:
19
Name:
Lost Analog Expander module
Description:
Base Converter module has lost communications with the Analog Expander module.
Correction:
(1) Verify wiring linking Base Converter module with the Analog Expander module.
(2) Replace the Analog Expander module.
(3) If communication with all Analog Expanders is lost, replace the Base Converter module.
Error Code:
2C, 2D
Name:
Option Module Soft Reset Failed
Description:
PLC CPU unable to re-establish communications with option module after soft reset.
Correction:
(1) Try soft reset a second time.
(2) Replace the option module.
(3) Power off the system. Verify that both the BTM and the BRM are seated properly in their respective racks and that all cables are properly connected and seated.
(4) Replace the cables.
(5) Replace the BRM (Bus Receiver Module).
(6) Replace the BTM (Bus Transmitter Module).
(7) Report failure to GE Intelligent Platforms PLC Field Service.
Error Code:
3B
Name:
Loss of, or Missing Communications Driver
Description:
The PLC generates this error when VME communications fail between the PLC CPU and a third party VME module using the FULL MAIL configuration mode.
Correction:
(1) Update the configuration file with the correct communications parameters.
(2) Replace the communications driver on the module.
(3) Remove the module from the configuration file.
(4) Replace the module.
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Error Code:
3C
Name:
Module in Firmware Update Mode
Description:
The PLC generates this error when it finds a module in Firmware Update mode. Modules in this mode will not communicate with the PLC CPU.
Correction:
(1) Run the firmware update utility for the module.
(2) Reset the module with the push-button.
(3) Power-cycle the entire system.
(4) Power-cycle the rack containing the module.
Error Code:
41
Name:
Unable to Establish VME Communications
Description:
The PLC generates this error when it finds a module in Standalone mode. A module in
Standalone mode will appear to be operating correctly, but it will not communicate with the
PLC CPU.
Correction:
(1) Reset the module with the push-button.
(2) Power-cycle the entire system.
(3) Power-cycle the rack containing the module.
Error Code:
FF
Name:
Option Module Communications Failed
Description:
PLC CPU generates this error when communication to the option module has failed.
Correction:
(1) Check the bus for abnormal activity.
(2) Replace the intelligent option module to which the request was directed.
(3) Check the parallel programmer cable for proper attachment.
Error Code:
4B
Name:
CFG_486_NOT_COMPAT
Description:
The currently installed CPX PLC firmware is not compatible with the ESCM firmare
(Embedded Serial Communications Module firmware—the firmware that controls Serial
Ports 1 and 2).
Byte 0 = Minimum Required CPX major firmware revision
Byte 1 = Minimum Required CPX minor firmware revision
Byte 2 = Currently Installed major firmware revision
Byte 3 = Currently Installed minor firmware revision
Correction:
The CPX PLC firmware needs to be upgraded to be compatible with the ESCM firmware.
Error Code:
4C
Name:
CFG_ESCM_NOT_COMPAT
Description:
The currently installed ESCM firmware (Embedded Serial Communications Module firmware—the firmware that controls Serial Ports 1 and 2) is not compatible with the PLC firmware currently installed.
Byte 0 = Minimum Required ESCM major firmware revision
Byte 1 = Minimum Required ESCM minor firmware revision
Byte 2 = Currently Installed major firmware revision
Byte 3 = Currently Installed minor firmware revision
Correction:
The ESCM firmware needs to be upgraded to be compatible with the CPX PLC firmware.
Error Code:
51
Name:
ESCM_RESET_REQ
Description:
The ESCM (Embedded Serial Communications Module) requested a RESET, which is currently not supported. Most probable cause is that the ESCM is being boot loaded.
Correction:
Cycle power when the ESCM completes the update.
Chapter 3 Fault Explanation and Correction 3-19
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Error Code:
All Others
Name:
Module Failure During Configuration
Description:
The PLC generates this error when a module fails during power-up or configuration store.
Correction:
(1) Power off the system. Replace the module located in that rack and slot.
(2) If the board is located in an expansion rack, verify BTM/BRM cable connections are tight and the modules are seated properly; verify the addressing of the expansion rack.
(3) Replace the BTM.
(4) Replace the BRM.
(5) Replace the rack.
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Addition of or Extra Rack
The fault group Addition of Extra Rack occurs when a configured expansion rack with which the
PLC CPU could not communicate comes online or is powered on, or an unconfigured rack is found. The default fault action for this group is Diagnostic.
Error Code:
1
Name:
Extra Rack
Correction:
(1) Check rack jumper behind power supply for correct setting.
(2) Update the configuration file to include the expansion rack.
(3) Remove the expansion rack from the hardware configuration.
Note: No correction necessary if rack was just powered on.
Reset of, Addition of, or Extra Option Module
The fault group Reset of, Addition of, or Extra Option Module occurs when an option module
(PCM, BTM, etc.) comes online, is reset, or a module is found in the rack but none is specified in the configuration. The default fault action for this group is Diagnostic.
Error Code:
1
Name:
Extra Option Module
Correction:
(1) Update the configuration file to include the module.
(2) Remove the module from the system.
Error Code:
2
Name:
Module Restart Complete
Description:
Restart of module is complete.
Correction:
None
Error Code:
3
Name:
LAN Interface Restart Complete, Running Utility
Description:
The LAN Interface module has restarted and is running a utility program.
Correction:
Refer to the LAN Interface manual, GFK-0868 or GFK-0869 (previously GFK-0533).
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System Configuration Mismatch
The fault group Configuration Mismatch occurs when the module occupying a slot is different from that specified in the configuration file. The default fault action is Fatal. When the I/O Scanner generates the mismatch because of a Genius block, the second byte in the Fault Extra Data field contains the bus address of the mismatched block.
Error Code:
2
Name:
Genius I/O Block Number Mismatch
Description:
The PLC generates this fault when the configured and physical Genius I/O blocks have different model numbers.
Correction:
(1) Replace the Genius I/O block with one corresponding to the configured module.
(2) Update the configuration file.
Error Code:
4
Name:
I/O Type Mismatch
Description:
The PLC generates this fault when the physical and configured I/O types of Genius grouped blocks are different.
Correction:
(1) Remove the indicated Genius module and install the module indicated in the configuration file.
(2) Update the Genius module descriptions in the configuration file to agree with what is physically installed.
Error Code:
7
Name:
Daughter Board Mismatch
Description:
The PLC generates this error when the configuration file indicates one size memory daughter
(expansion) board should be on the PLC CPU and a different size is actually present.
Correction:
(1) Replace the module.
(2) Replace the daughter board with the size indicated in the configuration file.
(3) Update the configuration file to agree with the size of the daughter board actually installed on the PLC CPU.
Error Code:
8
Name:
Analog Expander Mismatch
Description:
The PLC generates this error when the configured and physical Analog Expander modules have different model numbers.
Correction:
(1) Replace the Analog Expander module with one corresponding to configured module.
(2) Update the configuration file.
Error Code:
9
Name:
Genius I/O Block Size Mismatch
Description:
The PLC generates this error when block configuration size does not match the configured size.
Correction:
Reconfigure the block.
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Error Code:
A
Name:
Unsupported Feature
Description:
Configured feature not supported by this revision of the module.
Correction:
(1) Update the module to a revision that supports the feature.
(2) Change the module configuration.
Error Code:
B
Name:
Revision A of BTM not in Right-most Slot
Description:
The BTM (Revision A version) is not the right-most module in the rack.
Correction:
(1) Move the BTM to the right of all other modules in the rack.
(2) Upgrade the BTM to a newer version (Revision B or higher).
Error Code:
E
Name:
LAN Duplicate MAC Address
Description:
This LAN Interface module has the same MAC address as another device on the LAN. The module is off the network.
Correction:
(1) Change the module’s MAC address.
(2) Change the other device’s MAC address.
Error Code:
F
Name:
LAN Duplicate MAC Address Resolved
Description:
Previous duplicate MAC address has been resolved. The module is back on the network.
This is an informational message.
Correction:
None required.
Error Code:
10
Name:
LAN MAC Address Mismatch
Description:
MAC address programmed by softswitch utility does not match configuration stored from software.
Correction:
Change MAC address on softswitch utility or in software.
Error Code:
11
Name:
LAN Softswitch/Modem mismatch
Description:
Configuration of LAN module does not match modem type or configuration programmed by softswitch utility.
Correction:
(1) Correct configuration of modem type.
(2) Consult LAN Interface manual for configuration setup.
Error Code:
17
Name:
Invalid Memory Reference
Description:
Memory references in the logic program exceed what is available.
Correction:
Update the configuration file and store it to the PLC.
Error Code:
1E
Name:
Reference Length Mismatch
Description:
The PLC generates this error when the I/O reference lengths specified in the configuration for this module do not match the actual data sizes reported by the board.
Correction:
Update the configuration file with the correct reference lengths.
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3-24
Error Code:
1F
Name:
Invalid Configuration Parameters
Description:
The PLC generates this error when it determines that critical values in the module’s configuration are unacceptable.
Correction:
Update the configuration file with the correct values.
Error Code:
20
Name:
New Configuration Requires Reset
Description:
The PLC generates this error when it determines that a store of configuration attempted to change critical configuration values for the specified module. The new configuration will not take effect until the module is reset.
Correction:
(1) Power-cycle the entire system.
(2) Power-cycle the rack containing the module.
Error Code:
27
Name:
Unresolved or Disabled Interrupt Reference
Description:
The PLC generates this error when an interrupt trigger reference is either out of range or disabled in the I/O module’s configuration.
Correction:
(1) Remove or correct the interrupt trigger reference.
(2) Update the configuration file to enable this particular interrupt.
Error Code:
1D
Name:
Incompatible Scheduling Mode
Description:
A program with a scheduling mode that is incompatible with the sweep mode has been stored. Logged on a Stop-to-Run transition.
Correction:
(1) Change the sweep mode and try again.
(2) Change the scheduling mode or delete the offending program(s) from the program declaration screen.
Error Code:
24
Name:
I/O Specification Mismatch
Description:
The I/O specification of a program does not match the specification given in the program.
Correction:
Correct the mismatch between the I/O specification by changing the I/O specification declaration or the corresponding macro declaration in the C program source file.
Error Code:
25
Name:
Controller Reference Out of Range
Description:
A reference on either the trigger, disable, or I/O specification is out of the configured limits.
Correction:
Modify the incorrect reference to be within range, or increase the configured size of the reference data.
Error Code:
26
Name:
Bad Program Specification
Description:
The I/O specification of a program is corrupted.
Correction:
Contact GE Intelligent Platforms Field Service.
Error Code:
All Others
Name:
Module and Configuration Do not Match
Description:
The PLC generates this fault when the module occupying a slot is not of the same type that the configuration file indicates.
Correction:
(1) Replace the module in the slot with the type indicated in the configuration file.
(2) Update the configuration file.
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System Bus Error
The fault group System Bus Error occurs when the PLC CPU receives a non-configurable interrupt bus error from the bus system. The default fault action is Diagnostic.
Error Code:
4
Name:
Unrecognized VME Interrupt Source
Description:
The PLC generates this error when a module generates an interrupt not expected by the CPU
(unconfigured or unrecognized).
Correction:
(1) Ensure that all modules configured for interrupts have corresponding interrupt declarations in the program logic.
(2) Ensure that no third-party VME module is generating interrupts on the IRQ6 and IRQ7 lines.
Error Code:
All Others
Name:
System Bus Error
Description:
The PLC generates this fault when it has detected an error signal on the VME backplane, such as a parity error.
Correction:
(1) Ensure that all expansion rack cables are properly connected and seated.
(2) Take action to minimize system noise.
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PLC CPU Hardware Failure
The fault group PLC CPU Hardware occurs when the PLC CPU detects a hardware failure, such as a RAM failure or a communications port failure. When the failure is a RAM failure, the address of the failure is stored in the first four bytes of the Fault Extra Data field.
When a PLC CPU Hardware failure occurs, the PLC OK LED will flash on and off to indicate that the failure was not serious enough to prevent programmer communications to retrieve the fault information. The default fault action for this group is Fatal.
Error Code:
6Eh
Name:
Time-of-Day Clock not Battery-Backed
Description:
The battery-backed value of the time-of-day clock has been lost.
Correction:
(1) Replace the battery. Do not remove power from the main rack until replacement is complete. Reset the time-of-day clock using your programming software.
(2) Replace the module.
Error Code:
All Others
Correction:
Replace the module.
Module Hardware Failure
The fault group Module Hardware Failure occurs when the PLC CPU detects a non-fatal hardware failure on any module in the system, for example, a serial port failure on a PCM. The default fault action for this group is Diagnostic.
Error Code:
1A0
Name:
Missing 12 Volt Power Supply
Description:
A power supply that supplies 12 volts is required to operate the LAN Interface module.
Correction:
(1) Install/replace a GE Intelligent Platforms 100 watt power supply.
(2) Connect an external VME power supply that supplies 12 volts.
Error Code:
1C2 - 1C6
Name:
LAN Interface Hardware Failure
Description:
Refer to the LAN Interface manual, GFK-0868 or GFK-0869 (previously GFK-0533), for a description of these errors.
Error Code:
All Others
Name:
Module Hardware Failure
Description:
A module hardware failure has been detected.
Correction:
Replace the affected module.
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Option Module Software Failure
The fault group Option Module Software Failure occurs when a non-recoverable software failure occurs on a PCM. It is also generated when the identification data read from a module indicates that the module is a GE Intelligent Platforms module but the module type is not a supported GE
Intelligent Platforms type. The default fault action for this group is Fatal.
Error Code:
1
Name:
Unsupported Board Type
Description:
The PLC generates this fault when the identification data read from a board indicates that the board is a GE type of board is not one of the GE
Correction: (1) Upload the configuration file and verify that the software recognizes the board type in the file. If there is an error, correct it, download the corrected configuration file, and retry.
(2) Display the PLC fault table on the programmer. Contact GE Intelligent Platforms
Field Service, giving them all the information contained in the fault entry.
Error Code:
2, 3
Name:
COMMREQ Frequency Too High
Description:
COMMREQs are being sent to a module faster than it can process them.
Correction:
Change the PLC program to send COMMREQs to the affected module at a slower rate or monitor the completion status of each COMMREQ before sending the next.
Error Code:
4
Name:
More Than One BTM in a Rack
Description:
There is more than one BTM present in the rack.
Correction:
Remove one of the BTMs from the rack; there can only be one in a CPU rack.
Error Code:
191, 195
Name:
LAN Interface Software Failure
Description:
Refer to the LAN Interface manual, GFK-0868 or GFK-0869 (previously GFK-0533), for a description of these errors.
Error Code:
All Others
Name:
Option Module Software Failure
Description:
Software failure detected on an option module.
Correction:
(1) Reload software into the indicated module.
(2) Replace the module.
GFK-0265J Chapter 3 Fault Explanation and Correction 3-27
3
Program or Block Checksum Failure
The fault group Program or Block Checksum Failure occurs when the PLC CPU detects error conditions in program or blocks received by the PLC. It also occurs during Run mode background checking. In all cases, the Fault Extra Data field of the PLC fault table record contains the name of the program or block in which the error occurred. The default fault action for this group is Fatal.
Error Code:
All
Name:
Program or Block Checksum Failure
Description:
The PLC generates this error when a program or block is corrupted.
Correction:
(1) Clear PLC memory and retry the store.
(2) Examine C application for errors.
(3) Display the PLC fault table on the programmer. Contact GE Intelligent Platforms
PLC Field Service, giving them all the information contained in the fault entry.
Low Battery Signal
The fault group Low Battery Signal occurs when the PLC CPU detects a low battery on the PLC
CPU board, the PLC CPU memory daughter board, or a module such as the PCM reports a low battery condition. The default fault action for this group is Diagnostic.
Error Code:
0
Name:
Failed Battery Signal
Description:
The CPU module (or other module having a battery) battery is dead.
Correction:
Replace the battery. Do not remove power from the rack until replacement is complete.
Error Code:
1
Name:
Low Battery Signal
Description:
A battery on the CPU or other module has a low signal.
Correction:
Replace the battery. Do not remove power from the rack until replacement is complete.
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3
Constant Sweep or Microcycle Time Exceeded
The fault group Constant Sweep or Microcycle Time Exceeded occurs when the PLC CPU operates in Constant Sweep or Microcycle mode and detects that the sweep has exceeded the constant sweep timer. The fault extra data contains the name of the folder in eight bytes. The default fault action for this group is Diagnostic.
Error Code:
0 Constant Sweep
1 Microcycle
Correction:
If Constant Sweep:
(1) Increase constant sweep time.
(2) Remove logic from application program.
If Microcycle:
(1) Increase the time.
(2) Modify execution intervals to give programs more time to execute.
PLC System Fault Table Full
The fault group PLC System Fault Table Full occurs when the PLC Fault Table reaches its maximum configured limit (see page 3-13). The default fault action for this group is Diagnostic.
Error Code:
0
Correction:
Clear the PLC fault table.
I/O Fault Table Full
The fault group I/O Fault Table Full occurs when the I/O Fault Table reaches its maximum configured limit (see page 3-14). To avoid loss of additional faults, clear the earliest entry from the table. The default fault action for this group is Diagnostic.
Error Code:
0
Correction:
Clear the I/O fault table.
GFK-0265J Chapter 3 Fault Explanation and Correction 3-29
3
Application Fault
The fault group Application Fault occurs when the PLC CPU detects a fault in the user program.
The default fault action for this group is Diagnostic.
Error Code:
1
Name:
Indirect Address Out of Range
Description:
The PLC generates this error when one of the parameters to a function block is an indirect reference (that is, the parameter is an address within that memory type which contains the parameter value) and the contents of the indirect reference are out of range for the memory type. For example, consider a system with 500 %R registers defined. This fault would be generated if the parameter address were %R00100, and the contents of %R00100 were greater than 500 or zero.
The Fault Extra Data field contains in the first two bytes the offset address of where the call was made, the segment selector and offset (reference) in the next four bytes, and the name of the program or block in which the function call resides in the next eight bytes.
Correction:
(1) Correct the indirect reference.
(2) Increase the number of registers available, if possible.
Error Code:
2
Name:
Software Watchdog Timer Expired
Description:
The PLC generates this error when the watchdog timer expires. The PLC CPU stops executing the user program and enters Stop mode. The only recovery is to cycle power to the
PLC CPU. Examples causing timer expiration: Looping, via jump, very long program, etc.
Correction:
(1) Determine what caused the expiration (logic execution, external event, etc.) and correct.
(2) Use the system service function block to restart the watchdog timer.
Error Code:
5
Name:
COMMREQ WAIT Mode Not Supported
Description:
The module receiving the COMMREQ does not support WAIT mode COMMREQs.
Correction:
Use NOWAIT mode COMMREQs.
Error Code:
6
Name:
COMMREQ Bad Task ID
Description:
The task selected by the COMMREQ does not exist on the option module.
Correction:
Correct the task ID.
Error Code:
7
Name:
Application Stack Overflow
Description:
Block call depth has exceeded the PLC capability.
Correction:
Increase the program’s stack size or adjust application program to reduce nesting.
Error Code:
8 through D
Name:
LAN Interface Application Faults
Description:
Refer to the LAN Interface manual, GFK-0868 or GFK-0869 (previously GFK-0533), for a description of these errors.
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3
Error Code:
0E
Name:
External Block Run-Time Error
Description:
A run-time error occurred during execution of an external block.
Correction:
Based on the fault information, correct the specific problem in the external block.
Error Code:
0F
Name:
SORT Interrupt Error
Description:
A SORT function executed in a timed or I/O interrupt at the same time a SORT function was executing in another block.
Correction:
Do not use the SORT function in both Interrupt and Non-Interrupt blocks.
Error Code:
11
Name:
Standalone Run-Time Error
Description:
A run-time error occurred during execution of a Standalone program.
Correction:
Based on the fault information, correct the specific problem in the standalone program.
Error Code:
1C
Name:
Program Exceeded Wind Down
Description:
A program failed to complete execution within the wind-down period (currently 2.5 seconds) after the PLC was commanded to stop.
Correction:
A program has gone into an infinite loop or is taking too long to execute. Correct the coding error or modify the program.
Error Code:
1D
Name:
Program Not Readied
Description:
A program scheduled to be readied has not completed its previous execution. The base cycle time is too small (Periodic programs), or the interrupt rate is too high (I/O-Triggered or
Timed programs).
Correction:
(1) Increase the base cycle time or decrease the interrupt rate.
(2) Increase the execution interval time to allow the program to finish execution.
Non-Configurable Faults
The fault action of Non-Configurable Faults cannot be changed. Fatal faults cause the PLC to enter a form of Stop mode at the end of the sweep in which the error occurred. Diagnostic faults are logged and corresponding fault contacts are set. Informational faults are simply logged in the PLC fault table.
GFK-0265J Chapter 3 Fault Explanation and Correction 3-31
3
System Bus Failure
The fault group System Bus Failure occurs when the PLC CPU software receives the nonconfigurable interrupt bus failure from the bus system. The default fault action for this group is
Fatal.
Error Code:
1
Name:
Bus Grant Failure
Description:
The PLC operating software generates this error when the PLC CPU is unable to obtain control of the VME bus when required.
Correction:
(1) Ensure that any non-GE Intelligent Platforms boards which can become bus masters
are relinquishing control of the VME bus when requested to do so by the PLC CPU.
(2) Replace the PLC CPU module.
No User Program on Power-Up
The fault group No User Program on Power-Up occurs when the PLC CPU powers up with its memory preserved but no user program exists in the PLC. The PLC CPU detects the absence of a user program on power-up; the controller stays in Stop mode, performing the Stop mode sweep until a valid program is downloaded. The default fault action for this group is Informational.
Correction:
Download an application program before attempting to go to Run mode.
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3
Corrupted User Program on Power-Up
The fault group Corrupted User Program on Power-Up occurs when the PLC CPU detects corrupted user RAM. The PLC CPU will remain in Stop mode until a valid user program and configuration file are downloaded. The default fault action for this group is Fatal.
Error Code:
1
Name:
Corrupted User RAM on Power-Up
Description:
The PLC generates this error when it detects corrupted user RAM on power-up.
Correction:
(0) Cycle power without battery.
(2) Examine any C applications for errors.
(3) Replace the battery on the PLC CPU.
(4) Replace the expansion memory board on the PLC CPU.
(5) Replace the PLC CPU.
Error Code:
2
Name:
Illegal Boolean OpCode Detected
Description:
The PLC generates this error when it detects a bad instruction in the user program.
Correction:
(1) Restore the user program and references, if any.
(2) Examine any C applications for errors.
(3) Replace the expansion memory board on the PLC CPU.
(4) Replace the PLC CPU.
Error Code:
6
Name:
Corrupted Remote I/O Scanner EEPROM
Description:
The configuration in the Remote I/O Scanner EEPROM was found to be corrupted at powerup.
Correction:
Restore the Remote I/O Scanner configuration.
GFK-0265J Chapter 3 Fault Explanation and Correction 3-33
3
Window Completion Failure
The fault group Window Completion Failure is generated by the pre-logic and end-of-sweep processing software in the PLC. The fault extra data contains the name of the task that was executing when the error occurred. The default fault action for this group is Informational.
Error Code:
Name:
Description:
Correction:
Error Code:
Name:
Description:
Correction:
0
Window Completion Failure
The PLC generates this error when the PLC is operating in Constant Sweep mode and the constant sweep time was exceeded before the programmer window had a chance to begin executing.
Increase the constant sweep timer value.
1
Logic Window Skipped
The logic window was skipped due to lack of time to execute.
(1) Increase base cycle time.
(2) Reduce Communications Window time.
Password Access Failure
The fault group Password Actual Failure occurs when the PLC CPU receives a request to change to a new privilege level and the password included with the request is not valid for that level. The default fault action for this group is Informational.
Error Code:
0
Correction:
Retry the request with the correct password.
Null System Configuration for Run Mode
The fault group Null System Configuration for Run Mode occurs when the PLC transitions from
Stop to one of the Run modes and a configuration file is not present. The transition to Run is permitted, but no I/O scans occur. The effect of this fault is to perform the function of a Suspend
I/O. The default fault action for this group is Informational.
Error Code:
0
Correction:
Download a configuration file.
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3
PLC CPU System Software Failure
Faults in the fault group PLC CPU System Software Failure are generated by the operating software of the Series 90-70 PLC CPU. They occur at many different points of system operation.
When a fatal fault occurs, the PLC CPU immediately transitions into a special Error Sweep mode.
The only activity permitted when the PLC is in this mode is communications with the programmer.
The only method of clearing this condition is to cycle power on the PLC. The default fault action for this group is Fatal.
Error Code:
14, 27
Name:
Corrupted PLC Program Memory
Description:
The PLC generates these errors when certain PLC operating software problems occur. These should not occur in a production system.
Correction:
(1) Display the PLC fault table on the programmer. Contact GE Intelligent Platforms
Field Service, giving them all the information contained in the fault entry.
(2) Perform the corrections for corrupted memory.
Error Code:
52
Name:
Backplane Communications Failed
Description:
The PLC generates this error when it attempts to comply with a request that requires backplane communications and receives a rejected mail response.
Correction:
(1) Check the bus for abnormal activity.
(2) Replace the intelligent option module to which the request was directed.
(3) Check parallel programmer cable for proper attachment.
Error Code:
5A
Name:
User Shut Down Requested
Description:
The PLC generates this informational alarm when SVCREQ #13 (User Shut Down) executes in the application program.
Correction:
None required. Information-only alarm.
Error Code:
7B
Name:
Remote I/O Scanner Communications Heartbeat Failure
Description:
Refer to the Series 90-70 Remote I/O Scanner User’s Manual, GFK-0579, for a description of this error.
Correction:
None required. Information-only alarm.
Error Code:
94
Name:
Units Contain Mismatched Firmware, Update Recommended
Description:
This fault is logged each time the redundancy state changes and the redundant CPUs contain incompatible firmware.
Correction:
Ensure that redundant CPUs have compatible firmware.
Error Code:
All Others
Name:
PLC CPU Internal System Error
Description:
An internal system error has occurred that should not occur in a production system.
Correction:
Display the PLC fault table on the programmer. Contact GE Intelligent Platforms
PLC Field Service, giving them all the information contained in the fault entry.
GFK-0265J Chapter 3 Fault Explanation and Correction 3-35
3
Too Many Bus Controllers
The fault group Too Many Bus Controllers occurs when the I/O Scanner portion of the PLC operating software detects that more than the maximum number (32) of bus controllers has been defined. The PLC CPU itself is a bus controller for the Model 70 I/O present in the system. The default fault action for this group is Fatal.
Note
Genius bus controllers which are configured for redundant and non-redundant blocks count as two bus controllers.
Correction:
(1) Determine which modules are bus controllers and remove the extra ones.
(2) Delete a bus controller from the configuration file and store the file to the PLC CPU.
(3) If bus controllers have been moved from one slot in the rack to a different slot and this error did not occur before the move, cycle power on the rack. No module
should be inserted with power applied to rack.
(4) Display the PLC fault table on the programmer. Contact GE Intelligent Platforms
PLC Field Service, giving them all the information contained in the fault entry.
Communications Failure During Store
The fault group Communications Failure During Store occurs during the store of programs or blocks and other data to the PLC. The stream of commands and data for storing programs or blocks and data starts with a special start-of-sequence command and terminates with an end-of-sequence command. If communications with the programming device performing the store is interrupted or any other failure occurs which terminates the store, this fault is logged. As long as this fault is present in the system, the controller will not transition to Run mode.
This fault is not automatically cleared on power-up; the user must specifically clear the condition.
The default fault action for this group is Fatal.
Error Code:
0
Correction: Clear the fault and retry the download of the program or configuration file.
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3
Run Mode Store Failure
Error Code:
1
Description:
Communications was lost, or power was lost during a Run Mode Store. The new program or block was not activated and was deleted.
Correction:
Perform the Run Mode Store again. This fault is diagnostic.
Error Code:
2
Description:
Communications was lost, or power was lost during the cleanup of old programs or blocks during a Run Mode Store. The new program or block is installed, and the remaining programs and blocks were cleaned up.
Correction:
None required. This fault is informational.
Error Code:
3
Description:
Power was lost in the middle of a Run Mode Store.
Correction:
Delete and restore the program. This error is fatal.
GFK-0265J Chapter 3 Fault Explanation and Correction 3-37
3
Section 4: I/O Fault Table Explanations
The I/O fault table reports data about faults in three classifications:
•
Fault category
•
Fault type
•
Fault description
All faults have a fault category, but a fault type and fault group may not be listed for every fault.
For additional information pertaining to each fault, double-click the fault to access its Details window.
3-38 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
The following table describes the information provided with each fault category.
Table 3-8. Fault Category Descriptions
Fault Category
Circuit Fault
Fault Type Fault Description
Discrete Fault Loss of User Side Power
Short Circuit in User Wiring
Sustained Overcurrent
Low or No Current Flow
Switch Temperature Too High
Switch Failure
Point Fault
Output Fuse Blown
Analog Fault Input Channel Low Alarm
Input Channel High Alarm
Input Channel Under Range
Input Channel Over Range
Input Channel Open Wire
Output Channel Under Range
Output Channel Over Range
Invalid Data
Expansion Channel Not Responding
Low-Level Input Channel Low Alarm
Analog Fault Input Channel High Alarm
Input Channel Under Range
Input Channel Over Range
Input Channel Open Wire
Wiring Error
Internal Fault
Input Channel Shorted
Invalid Data
GENA Fault
Remote I/O
Scanner Fault
GENA Circuit Fault
Remote I/O Scanner Circuit Fault
Loss of IOC
Fault Specific Data
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
Circuit Configuration *
GENA Fault Byte 2
Byte 1: Circuit Type
Byte 2: I/O Type
Timeout
Unexpected State
Unexpected Mail Status
VME Bus Error
Addition of IOC
Loss of I/O
Module
Addition of I/O
Module
Extra I/O
Module
Loss of Block
Fault Not
Specified
Addition of Block
Extra Block
I/O Bus Fault Bus Fault
Bus Outputs
Disabled
Global Memory
Fault
* Refer to table on next page.
Communications Lost
Subnet Group Number
Global Variable Name
3
GFK-0265J Chapter 3 Fault Explanation and Correction 3-39
3
Table 3-8. Fault Category Descriptions - Continued
Fault Category
Module Fault
Fault Type Fault Description
Headend Fault EPROM or NVRAM Failure
Calibration Memory Failure
Shared Ram Failure
Configuration MisMatch
Watchdog Timeout
Output Fuse Blown
IOC Software
Fault
IOC Hardware
Failure
Forced Circuit
Unforced Circuit
Fault Specific Data
Block Configuration *
Discrete/Analog Indication*
Block Configuration *
Discrete/Analog Indication*
*Refer to table below.
Three types of fault specific data occur in more than one fault category; they are block configuration, circuit configuration, and analog/discrete indication. The codings are shown in the following table.
1
2
3
1
2
3
Value
1
2
Description
Circuit Configuration
Circuit is an input.
Circuit is an output.
Circuit is an output with feedback.
Block Configuration
Block is configured for inputs only.
Block is configured for outputs only.
Block is configured for inputs and outputs (grouped block).
Discrete/Analog Indication
Block is a discrete block.
Block is an analog block.
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3
Circuit Fault
Circuit Fault has four fault types. Three of the four fault types have fault descriptions. Fault specific data is available for all faults. Circuit faults apply specifically to Genius I/O modules. The default fault action is Diagnostic. The following table describes the circuit fault category.
Table 3-9. Circuit Fault Category Description
Fault
Category
Circuit Fault
Fault Type
Discrete Fault
Analog Fault
Low-Level
Analog Fault
Remote Fault
Fault Description
Loss of User Side Power
Short Circuit in User Wiring
Sustained Overcurrent
Low or No Current Flow
Switch Temperature Too High
Switch Failure
Point Fault
Output Fuse Blown
Input Channel Low Alarm
Input Channel High Alarm
Input Channel Under Range
Input Channel Over Range
Input Channel Open Wire
Output Channel Under Range
Output Channel Over Range
Invalid Data
Expansion Channel Not Responding
Input Channel Low Alarm
Input Channel High Alarm
Input Channel Under Range
Input Channel Over Range
Input Channel Open Wire
Wiring Error
Internal Fault
Input Channel Shorted
Invalid Data
Remote I/O Scanner Fault
Fault Specific Data
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
Circuit Configuration
GFK-0265J Chapter 3 Fault Explanation and Correction 3-41
3-42
3
Discrete Fault
Discrete Fault has eight fault descriptions. More than one condition may be present in a particular reporting of the fault.
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Loss of User Side Power
The Genius Bus Controller generates this error when there is a power loss on the field wiring side of a Genius I/O block.
(1) (Only valid for Isolated I/O blocks) Initiate “Pulse Test” COMREQ #1.
Pulse test may be enabled or disabled at I/O block.
(2) Correct the power failure.
Short Circuit in User Wiring
The Genius Bus Controller generates this error when it detects a short circuit in the user wiring of a Genius block. A short circuit is defined as a current level greater than
20 amps.
Fix the cause of the short circuit.
Sustained Overcurrent
The Genius Bus Controller generates this error when it detects a sustained current level greater than 2 amps in the user wiring.
Fix the cause of the over current.
Low or No Current Flow
The Genius Bus Controller generates this error when there is very low or no current flow in the user circuit.
Fix the cause of the condition.
Switch Temperature Too High
The Genius Bus Controller (GBC) generates this error when the Genius block reports a high temperature in the Genius Smart Switch.
(1) Ensure that the block is installed to provide adequate circulation.
(2)
(3)
Decrease the ambient temperature surrounding the block.
Install RC Snubbers on inductive loads.
Switch Failure
The Genius Bus Controller (GBC) generates this error when the Genius block reports a failure in the Genius Smart Switch.
(1)
(2)
Check for shunts across Genius output (pushbuttons).
Replace the Genius I/O block.
Point Fault
The PLC generates this error when it detects a failure of a single I/O point on a Genius
I/O module.
Replace the Genius I/O block.
Output Fuse Blown
The PLC generates this error when it detects a blown fuse on a Genius I/O output block.
(1) Determine and repair the cause of the fuse blowing, and replace the fuse.
(2) Replace the block.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Analog Fault
Analog Fault has nine fault descriptions. More than one condition may be present in a particular reporting of the fault.
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Input Channel Low Alarm
The Genius Bus Controller generates this error when the Genius Analog module reports a low alarm on an input channel.
Correct the condition causing the low alarm.
Input Channel High Alarm
The Genius Bus Controller generates this error when the Genius Analog module reports a high alarm on an input channel.
Correct the condition causing the high alarm.
Input Channel Under Range
The Genius Bus Controller generates this error when the Genuis Analog module reports an under-range condition on an input channel.
Correct the problem causing the condition.
Input Channel Over Range
The Genius Bus Controller generates this error when the Genuis Analog module reports an over-range condition on an input channel.
Correct the problem causing the condition.
Input Channel Open Wire
The Genius Bus Controller generates this error when the Genuis Analog module detects an open wire condition on an input channel.
Correct the problem causing the condition.
Output Channel Under Range
The Genius Bus Controller generates this error when the Genuis Analog module reports an under-range condition on an output channel.
Correct the problem causing the condition.
Output Channel Over Range
The Genius Bus Controller generates this error when the Genuis Analog module reports an over-range condition on an output channel.
Correct the problem causing the condition.
Invalid Data
The Genius Bus Controller generates this error when it detects invalid data from a
Genuis Analog input block.
Correct the problem causing the condition.
Expansion Channel Not Responding
The PLC generates this error when data from an expansion channel on a multiplexed analog input board is not responding.
(1) Check wiring to the module.
(2) Replace the module.
3
GFK-0265J Chapter 3 Fault Explanation and Correction 3-43
3-44
3
Low-Level Analog Fault
Low-Level Analog Fault has nine fault descriptions. More than one condition may be present in a particular reporting of the fault.
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Input Channel Low Alarm
The Genius Bus Controller generates this error when the Genuis Analog module reports a low alarm on an input channel.
Correct the condition causing the low alarm.
Input Channel High Alarm
The Genius Bus Controller generates this error when the Genuis Analog module reports a high alarm on an input channel.
Correct the condition causing the high alarm.
Input Channel Under Range
The Genius Bus Controller generates this error when the Genuis Analog module reports an under-range condition on an input channel.
Correct the problem causing the condition.
Input Channel Over Range
The Genius Bus Controller generates this error when the Genuis Analog module reports an over-range condition on an input channel.
Correct the problem causing the condition.
Input Channel Open Wire
The Genius Bus Controller generates this error when the Genuis Analog module detects an open wire condition on an input channel.
Correct the problem causing the condition.
Wiring Error
The Genius Bus Controller generates this error when the Genuis Analog module detects an improper RTD connections or thermocouple reverse junction fault.
Correct the problem causing the condition.
Internal Fault
The Genius Bus Controller generates this error when the Genuis Analog module reports a cold junction sensor fault on a thermocouple block or an internal error in an
RTD block.
Correct the problem causing the condition.
Input Channel Shorted
The Genius Bus Controller generates this error when it detects an input channel shorted on a Genius RTD or Strain Gauge Block.
Correct the problem causing the condition.
Invalid Data
The Genius Bus Controller generates this error when it detects invalid data from a
Genuis Analog input block.
Correct the problem causing the condition.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
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GENA Fault
The GENA Fault has no fault descriptions associated with it. GENA Fault Byte 2 is the first byte of the fault specific data.
Description:
Correction:
The Genius I/O operating software generates this error when it detects a failure in a
GENA block attached to the Genius I/O bus.
Replace the GENA block.
Loss of IOC (I/O Controller)
The fault category Loss of IOC has no fault types or fault descriptions associated with it. The default fault action is Fatal.
Name:
Description:
Correction:
Loss of or Missing IOC
The PLC generates this error when it cannot communicate with an I/O Controller and an entry for the IOC exists in the configuration file.
(1) Verify that the module in the slot/bus address is the correct module.
(2) Review the configuration file and verify that it is correct.
(3) Replace the module.
(4) Display the PLC fault table on the programmer. Contact GE IntelligentPlatforms
Field Service, giving them all the information contained in the fault entry.
Addition of IOC (I/O Controller)
The fault category Addition of I/O Module has no fault types or fault descriptions associated with it. The default fault action for this category is Diagnostic.
Name:
Description:
Correction:
Addition of IOC
The PLC generates this error when an IOC which has been faulted returns to operation or when an IOC is found in the system and the configuration file indicates that no IOC is to be in that slot.
(1) No action is necessary if the faulted module is in a remote rack and is returning due to a remote rack power cycle.
(2) Update the configuration file or remove the module.
GFK-0265J Chapter 3 Fault Explanation and Correction 3-45
3
Too Many Bus Controllers
The fault group Too Many Bus Controllers occurs when the I/O Scanner portion of the PLC operating software detects that more than the maximum number (32) of bus controllers has been defined. The PLC CPU itself is a bus controller for the Model 70 I/O present in the system. The default fault action for this group is Fatal.
Note
Genius bus controllers which are configured for redundant and non-redundant blocks count as two bus controllers.
Correction:
(1) Determine which modules are bus controllers and remove the extra ones.
(2) Delete a bus controller from the configuration file and store the file to the PLC CPU.
(3) If bus controllers have been moved from one slot in the rack to a different slot and this error did not occur before the move, cycle power on the rack. No module
should be inserted with power applied to rack.
(4) Display the PLC fault table on the programmer. Contact GE Intelligent Platforms
Field Service, giving them all the information contained in the fault entry.
Communications Failure During Store
The fault group Communications Failure During Store occurs during the store of programs or blocks and other data to the PLC. The stream of commands and data for storing programs or blocks and data starts with a special start-of-sequence command and terminates with an end-of-sequence command. If communications with the programming device performing the store is interrupted or any other failure occurs which terminates the store, this fault is logged. As long as this fault is present in the system, the controller will not transition to Run mode.
This fault is not automatically cleared on power-up; the user must specifically clear the condition.
The default fault action for this group is Fatal.
Error Code:
0
Correction: Clear the fault and retry the download of the program or configuration file.
3-36 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
3
PLC CPU System Software Failure
Faults in the fault group PLC CPU System Software Failure are generated by the operating software of the Series 90-70 PLC CPU. They occur at many different points of system operation.
When a fatal fault occurs, the PLC CPU immediately transitions into a special Error Sweep mode.
The only activity permitted when the PLC is in this mode is communications with the programmer.
The only method of clearing this condition is to cycle power on the PLC. The default fault action for this group is Fatal.
Error Code:
14, 27
Name:
Corrupted PLC Program Memory
Description:
The PLC generates these errors when certain PLC operating software problems occur. These should not occur in a production system.
Correction:
(1) Display the PLC fault table on the programmer. Contact GE Intelligent Platforms
Field Service, giving them all the information contained in the fault entry.
(2) Perform the corrections for corrupted memory.
Error Code:
52
Name:
Backplane Communications Failed
Description:
The PLC generates this error when it attempts to comply with a request that requires backplane communications and receives a rejected mail response.
Correction:
(1) Check the bus for abnormal activity.
(2) Replace the intelligent option module to which the request was directed.
(3) Check parallel programmer cable for proper attachment.
Error Code:
5A
Name:
User Shut Down Requested
Description:
The PLC generates this informational alarm when SVCREQ #13 (User Shut Down) executes in the application program.
Correction:
None required. Information-only alarm.
Error Code:
7B
Name:
Remote I/O Scanner Communications Heartbeat Failure
Description:
Refer to the Series 90-70 Remote I/O Scanner User’s Manual, GFK-0579, for a description of this error.
Correction:
None required. Information-only alarm.
Error Code:
94
Name:
Units Contain Mismatched Firmware, Update Recommended
Description:
This fault is logged each time the redundancy state changes and the redundant CPUs contain incompatible firmware.
Correction:
Ensure that redundant CPUs have compatible firmware.
Error Code:
All Others
Name:
PLC CPU Internal System Error
Description:
An internal system error has occurred that should not occur in a production system.
Correction:
Display the PLC fault table on the programmer. Contact GE Intelligent Platforms
Field Service, giving them all the information contained in the fault entry.
GFK-0265J Chapter 3 Fault Explanation and Correction 3-35
3
I/O Bus Fault
The fault category I/O Bus Faults has two fault types associated with it. The default fault action is
Diagnostic.
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Bus Fault
The Genius Bus Controller (GBC) operating software generates this error when it detects a failure with a Genius I/O bus. (Generated when Error Rate in the GBC configuration is exceeded—the default is 10, meaning 10 errors in a 10 second period)
(1) Determine the reason for the bus failure and correct it.
(2) Replace the Genius Bus Controller.
(3) The default of 10 (mentioned above) can be set higher if needed, but the bus should be examined electrically—use an oscilloscope for waveform check.
Bus Outputs Disabled
The Genius Bus Controller operating software generates this error when it times out waiting for the PLC CPU to perform an I/O scan.
(1) Replace the PLC CPU.
(2) Display the PLC fault table on the programmer. Contact GE IntelligentPlatforms
Field Service, giving them all the information contained in the fault entry.
SBA Conflict
The Genius Bus Controller detected a conflict between its serial bus address and that of another device on the bus.
Adjust one of the conflicting serial bus addresses.
3-48 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
3
Module Fault
The fault category Module Fault has one fault type, one headend fault, and eight fault descriptions.
No fault specific data is present. The default fault action for this category is Diagnostic.
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Name:
Description:
Correction:
Configuration Memory Failure
The Genius Bus Controller generates this error when it detects a failure in a Genius block’s EEPROM or NVRAM.
Replace the Genius block’s electronics module.
Calibration Memory Failure
The Genius Bus Controller generates this error when it detects a failure in a Genius block’s calibration memory.
Replace the Genius block’s electronics module.
Shared RAM Fault
The Genius Bus Controller generates this error when it detects an error in a Genius block’s shared RAM.
Replace the Genius block’s electronics module.
Watchdog Timeout
The PLC generates this error when it detects that a Model 70 input module watchdog timer has expired.
Replace the Model 70 input module.
Output Fuse Blown
The PLC generates this error when it detects a blown fuse on a Model 70 output module.
(1) Determine and repair the cause of the fuse blowing, and replace the fuse.
(2) Replace the module.
Module Fault
An internal failure has been detected in a module.
Replace the affected module.
IOC (I/O Controller) Software Fault
The fault category IOC Software Fault applies to any type of I/O Controller. There are no fault types or fault descriptions associated with it. The default fault action is Fatal.
Name:
Description:
Correction:
Name:
Description:
Correction:
Datagram Queue Full, Read/Write Queue Full
Too many datagrams or read/write requests have been sent to the Genius Bus
Controller.
Adjust the system to reduce the request rate to the Genius Bus Controller.
Response Lost
The Genius Bus Controller is unable to respond to a received datagram or read/write request.
Adjust the system to reduce the request rate to the Genius Bus Controller.
GFK-0265J Chapter 3 Fault Explanation and Correction 3-49
3-50
3
IOC (I/O Controller) Hardware Failure
The fault category IOC Hardware Fault has no fault types or fault descriptions. The default fault action is Diagnostic.
Description:
Correction:
The Genius operating software generates this error when it detects a hardware failure in the Bus Communication hardware or a baud rate mismatch.
(1) Verify that the baud rate set in the configuration file for the Genius Bus
Controller agrees with the baud rate programmed in every block on the bus.
(2) Change the configuration file and restore it, if necessary.
(3) Replace the Genius Bus Controller.
(4) Selectively remove each block from the bus until the offending block is isolated then replace it.
Forced and Unforced Circuit
The fault categories Forced Circuit and Unforced Circuit report point conditions and therefore are not technically faults. They have no fault types or fault descriptions. These reports occur when a
Genius I/O point was forced or unforced with the Hand-Held Monitor. The default fault action is
Informational.
Fault Specific Data contains data as shown below.
Byte Number
1
2
Description
Block Configuration
Analog/Discrete Information
Block Switch
The Fault Category Block Switch has no fault types or fault descriptions. The default fault action is
Diagnostic.
Name:
Description:
Correction:
Block Switch
The PLC generates this error when a Genius block on redundant Genius buses switches from one bus to another.
(1) No action is required to keep the block operating.
(2) The bus that the block switched from needs to be repaired.
(a) Verify the bus wiring.
(b) Replace the I/O controller.
(c) Replace the Bus Switching Module (BSM).
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Chapter
4
Relay Functions
Programming consists of creating an application program for a PLC. Chapters 4 through 12 describe the programming instructions that can be used to create ladder logic programs for the
Series 90-70 programmable controller.
If the Logicmaster 90 programming software is not yet installed, please refer to the Logicmaster
90-70 Programming Software User’s Manual, GFK-0263, for instructions. The user’s manual explains how to create, transfer, edit, and print programs.
Configuration is the process of assigning logical addresses, as well as other characteristics, to the hardware modules in the system. It may be done either before or after programming, using the configuration software; however, it is recommended that configuration be done first. If that has not been done, you should refer to the Logicmaster 90-70 Programming Software User’s Manual,
GFK-0263, to decide whether it is best to begin programming at this time.
This chapter explains the use of contacts, coils, and links in ladder logic rungs.
Function
Using contacts
Using coils
Normally open and normally closed contacts.
Positive and negative transition contacts.
Fault and no fault contacts.
High alarm and low alarm contacts.
Coils and negated coils.
Retentive and negated retentive coils.
Positive and negative transition coils.
SET and RESET coils.
Retentive SET and RESET coils.
Horizontal and vertical links.
Continuation coils and contacts.
Page
4-2
4-3
4-9
4-10
4-11
4-11
4-12
4-4
4-4
4-7
4-7
4-8
4-8
GFK-0265J 4-1
4
Using Contacts
A contact is used to monitor the state of a reference. Whether the contact passes power flow depends on the state or status of the reference being monitored and on the contact type. A reference is ON if its state is 1; it is OFF if its state is 0.
Type of Contact
Normally-open contact
Normally-closed contact
Positive transition contact
Negative transition contact
Fault contact
No fault contact
High alarm contact
Low alarm contact
Continuation contact
Table 4-1. Types of Contacts
Display
–| |–
–|/|–
–|
↑
|–
–|
↓
|–
–[FAULT]–
–[NOFLT]–
–HIALR]–
–LOALR]–
<+>–––
Contact Passes Power to Right:
When reference is ON.
When reference is OFF.
If reference goes ON.
If reference goes OFF.
If reference has point fault.
If reference has no point fault.
If reference exceeds high alarm.
If reference exceeds low alarm.
If the preceding continuation coil is set ON.
4-2 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
4
Using Coils
Coils are used to control discrete references. Conditional logic must be used to control the flow of power to a coil. Coils cause action directly; they do not pass power flow to the right. If additional logic in the program should be executed as a result of the coil condition, an internal reference should be used for that coil or a continuation coil/contact combination may be used.
Coils are always located at the rightmost position of a line of logic. A rung may contain up to eight coils.
The type of coil used will depend on the type of program action desired. The states of retentive coils are saved when power is cycled or when the PLC goes from STOP to RUN mode. The states of non-retentive coils are set to zero when power is cycled or the PLC goes from
STOP
to
RUN
mode.
Type of Coil
Coil (normally open)
Negated
Retentive
Negated Retentive
Positive Transition
Negative Transition
SET
RESET
Retentive SET
Retentive RESET
Continuation coil
Table 4-2. Types of Coils
Display Power to Coil
–( )–
–(/)–
–(M)–
–(/M)–
–(
↑
)–
ON
OFF
ON
OFF
ON
OFF
ON
OFF
OFF
→
ON
–(
↓
)–
–(S)–
–(R)–
–(SM)–
–(RM)–
–––<+>
ON
→
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
Result
Set reference ON.
Set reference OFF.
Set reference OFF.
Set reference ON.
Set reference ON, retentive.
Set reference OFF, retentive.
Set reference OFF, retentive.
Set reference ON, retentive.
If reference is OFF, set it ON for one sweep.
If reference is OFF, set it ON for one sweep.
Set reference ON until reset OFF by -(R)-.
Do not change the coil state.
Set reference OFF until set ON by -(S)-.
Do not change the coil state.
Set reference ON until reset OFF by -
(RM)-, retentive.
Do not change the coil state.
Set reference OFF until set ON by
-(SM)-, retentive.
Do not change the coil state.
Set next continuation contact ON.
Set next continuation contact OFF.
GFK-0265J Chapter 4 Relay Functions 4-3
4-4
4
Note
For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Normally Open Contact –| |–
A normally open contact acts as a switch that passes power flow if the associated reference is ON
(1).
Normally Closed Contact –|\|–
A normally closed contact acts as a switch that passes power flow if the associated reference is
OFF (0).
Example:
The following example shows a rung with 10 elements having nicknames from E1 to E10. Coil
E10 is ON when reference E1, E2, E5, E6, and E9 are ON and references E3, E4, E7, and E8 are
OFF.
|
| E1 E2 E3 E4 E5 E6 E7 E8 E9 E10
|——| |—————| |—————|/|—————|/|—————| |—————| |—————|/|—————|/|—————| |—————( )—
|
Positive Transition Contact –|
↑
|–
A positive transition contact passes power flow if the associated reference transitions from OFF
(0) to ON (1). The transition is determined from the write of an OFF (0) to the next write of an
ON (1) value. These writes may occur multiple times during a PLC sweep, resulting in the transition bit being set for only a portion of the sweep; or they may occur several PLC sweeps apart, resulting in the transition bit being set for more than one sweep. Do not use the positive transition contact for references used with transition coils (also called one-shots) or SET and
RESET coils.
Negative Transition Contact –|
↓
|–
A negative transition contact passes power flow if the associated reference transitions from ON (1) to OFF (0). The transition is determined from the write of an ON (1) to the next write of an OFF
(0) value. These writes may occur multiple times during a PLC sweep, resulting in the transition bit being set for only a portion of the sweep; or they may occur several PLC sweeps apart, resulting in the transition bit being set for more than one sweep. Do not use the negative transition contact for references used with transition coils (also called one-shots) or SET and
RESET coils.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
4
Additional Information on Transition Contacts
The transition bit for a reference point is affected when that point is written to. It is set when the point transitions from OFF to ON or from ON to OFF. It is reset when the state after the write is the same as the state before the write, i.e., ON to ON or OFF to OFF. The source of the write is immaterial; it can be an output coil, a function block output, the input scan, an input interrupt, a
PCM SYSWRITE, a data change from the program, or Genius Datagram. When the point is written, the transition bit is immediately affected. Transition bits are not changed by the scan itself; only a write to the reference point. A write must be made to a reference in order to clear the transition bit, or it will appear to be “stuck.” Nothing is done automatically per sweep to clear transition bits, except for configured input points, where a transition is cleared when the input data is read and the input point is in the same state as when read the previous sweep.
Overrides do not protect transition bits. If a write occurs to an overridden point, the transition bit is cleared. For example, the transition bit of an overridden input point is cleared when the input is scanned.
Example 1:
The following example shows the use of positive and negative transition contacts. Coil E2 is on for one logic sweep when element E1 transitions from OFF to ON. Coil E4 is ON for one sweep when element E3 transitions from ON to OFF.
|
| E1 E2
|——(
↑)
—————————————————————————————————————————————————————————————————————( )—
|
| E3 E4
|——(
↓)
—————————————————————————————————————————————————————————————————————( )—
|
GFK-0265J Chapter 4 Relay Functions 4-5
4
Example 2:
In the following example, bit %M00017 is set by a BSET function and then cleared by a BCLR function. The positive transition contact X1 activates the BSET, and the negative transition X2 activates the BCLR.
The positive transition associated with bit %M00017 will be on until %M00017 is reset by the
BCLR function. This occurs because the bit is only written when contact X1 goes from OFF to
ON. Similarly, the negative transition associated with bit %M00017 will be ON until %M00017 is set by the BSET function.
| _____
| X1 | | E2
|——|
↑
|—————| BIT_|—————————————————————————————————————————————————————————( )—
| | SET_|
| | WORD|
| %M00017—|IN |
| | LEN |
| |00001|
| CONST—|BIT |
| 0001 |_____|
|
| _____
| X2 | | E4
|——|
↓
|—————| BIT_|—————————————————————————————————————————————————————————( )—
| | CLR_|
| | WORD|
| %M00017—|IN |
| | LEN |
| |00001|
| CONST—|BIT |
| 0001 |_____|
|
4-6 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
4
Fault Contact –[FAULT]–
Fault contacts are used to detect faults in discrete or analog machine references, or to locate faults
(rack, slot, bus). The use of I/O fault contacts must be enabled during CPU configuration if I/O point fault reporting is desired. (Refer to chapter 2, section 3, “Program Organization and User
Data,” for more information on point faults.)
A fault contact passes power flow if its associated variable or location has a point fault.
Note
Use the machine reference address (%I, %Q, %AI, %AQ) with the
FAULT/NOFLT contacts to guarantee correct indication of module status.
(When using the rack, slot, bus, module reference with a FAULT/NOFLT contact, the fault indication of a given module is cleared when the associated fault is cleared from the fault table.)
No Fault Contact –[NOFLT]–
No fault contacts are also used to detect faults in discrete or analog machine references. The use of I/O No Fault contacts must also be enabled if I/O point fault reporting is desired. (Refer to chapter 2, section 3, “Program Organization and User Data,” for more information on point faults.)
A no fault contact passes power flow if its associated variable or location does not have a point fault.
Note
Use the machine reference address (%I, %Q, %AI, %AQ) with the
FAULT/NOFLT contacts to guarantee correct indication of module status.
(When using the rack, slot, bus, module reference with a FAULT/NOFLT contact, the fault indication of a given module is cleared when the associated fault is cleared from the fault table.)
High Alarm Contact –[HIALR]–
The high alarm contact is used to detect a high alarm associated with an analog reference. Use of this contact and the low alarm contact must be enabled during CPU configuration. (From the configuration software menu, select “Memory Allocation and Point Fault Enable”. Change the setting for point fault reference from
DISABLED
to
ENABLED
).
A high alarm contact passes power flow if the high alarm bit associated with the analog reference is ON.
Low Alarm Contact –[LOALR]–
The low alarm contact is used to detect a low alarm associated with an analog reference. Use of this contact must be enabled during CPU configuration, as described above for the high alarm contact.
A low alarm contact passes power flow if the low alarm bit associated with the analog reference is
ON.
GFK-0265J Chapter 4 Relay Functions 4-7
4
Coil –( )–
A coil sets a discrete reference ON while it receives power flow. It is non-retentive; therefore, it cannot be used with system status references (%SA, %SB, %SC, or %G).
Example:
In the following example, coil E3 is ON when reference E1 is ON and reference E2 is OFF.
|
| E1 E2 E3
|——| |—————|/|—————————————————————————————————————————————————————————————( )—
|
Negated Coil –(/)–
A negated coil sets a discrete reference ON when it does not receive power flow. It is not retentive; therefore, it cannot be used with system status references (%SA, %SB, %SC, or %G).
Example:
In the following example, negated coil E2 is ON when reference E1 is OFF.
|
| E1 E2
|——| |—————————————————————————————————————————————————————————————————————(/)—
|
Retentive Coil –(M)–
Like a normally open coil, the retentive coil sets a discrete reference ON while it receives power flow. The state of the retentive coil is retained across power failure. Therefore, it cannot be used with references from strictly non-retentive memory (%T).
Negated Retentive Coil –(/M)–
The negated retentive coil sets a discrete reference ON when it does not receive power flow. The state of the negated retentive coil is retained across power failure. Therefore, it cannot be used with references from strictly non-retentive memory (%T).
4-8 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
4
Positive Transition Coil –(
↑
)–
If the reference associated with a positive transition coil is OFF, when the coil receives power flow it is set to ON until the next time the coil is executed. (If the rung containing the coil is skipped on subsequent sweeps, it will remain ON.) This coil can be used as a one-shot.
Do not write from external devices (e.g., PCM) to references used on positive transition coils since it will destroy the one-shot nature of these coils.
NOTE
Do not use transition contacts on positive transition coils since the coil uses the transition bit to store the power flow value into the coil.
Transitional coils can be used with references from either retentive or non-retentive memory (%Q,
%M, %T, %G, %SA, %SB, or %SC).
↓
Negative Transition Coil –(
↓
)–
If the reference associated with this coil is OFF, when the coil stops receiving power flow, the reference is set to ON until the next time the coil is executed.
NOTE
Do not write from external devices to references used on negative transition coils since it will destroy the one-shot nature of these coils.
Do not use transition contacts on negative transition coils since the coil uses the transition bit to store the power flow value into the coil.
Transitional coils can be used with references from either retentive or non-retentive memory (%Q,
%M, %T, %G, %SA, %SB, or %SC).
Example:
In the following example, when reference E1 goes from OFF to ON, coils E2 and E3 receive power flow, turning E2 ON for one logic sweep. When E1 goes from ON to OFF, power flow is removed from E2 and E3, turning coil E3 ON for one sweep.
|
| E1 E2
|——| |————————————————————————————————————————————————————————————————————(
↑
)—
|
| E1 E3
|——| |————————————————————————————————————————————————————————————————————(
↓
)—
|
GFK-0265J Chapter 4 Relay Functions 4-9
4
SET Coil –(S)–
SET and RESET are non-retentive coils that can be used to keep (“latch”) the state of a reference
(e.g., E1) either ON or OFF. When a SET coil receives power flow, its reference stays ON
(whether or not the coil itself receives power flow) until it is reset by power flow to a RESET coil of the same reference (e.g., E1 in the example below).
Note
SET coils write an undefined result to the transition bit for the given reference.
Do not use transition contacts on references used on SET coils.
RESET Coil –(R)–
The RESET coil sets a discrete reference OFF if the coil receives power flow. The reference remains OFF until set ON by a SET coil of the same reference (e.g., E1 in the example below).
The last-solved SET coil or RESET coil of a pair takes precedence.
Note
RESET coils write an undefined result to the transition bit for the given reference. Do not use transition contacts on references used on RESET coils.
Example:
In the following example, the coil represented by E1 is turned ON whenever reference E2 or E6 is
ON. The coil represented by E1 is turned OFF whenever reference E5 or E3 is ON.
|
| E2 E1
|——| |—————————————————————————————————————————————————————————————————————(S)—
| |
| E6 |
|——| |——
|
| E5 E1
|——| |—————————————————————————————————————————————————————————————————————(R)—
| |
| E3 |
|——| |——
|
4-10 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
4
Retentive SET Coil –(SM)–
Retentive SET and RESET coils are similar to SET and RESET coils, but they are retained across power failure or when the PLC transitions from
STOP
to
RUN
mode. A retentive SET coil sets a discrete reference ON if the coil receives power flow. The reference remains ON until reset by a retentive RESET coil.
Note
Retentive SET coils write an undefined result to the transition bit for the given reference. Do not use transition contacts on references used on retentive SET coils. (Refer to the information on “Transitions and Overrides” in chapter 2.)
Retentive RESET Coil –(RM)–
This coil sets a discrete reference OFF if it receives power flow. The reference remains OFF until set by a retentive SET coil. The state of this coil is retained across power failure or when the PLC transitions from
STOP
to
RUN
mode.
Note
Retentive RESET coils write an undefined result to the transition bit for the given reference. Do not use transition contacts on references used on retentive
RESET coils. (Refer to the information on “Transitions and Overrides” in chapter 2.)
Links
Horizontal and vertical links are used to connect elements of a line of ladder logic between functions. Their purpose is to complete the flow of logic (“power”) from left to right in a line of logic.
Example:
In the following example, two horizontal links are used to connect contacts E2 and E5. A vertical link is used to connect contacts E3, E6, E7, E8, and E9 to E2.
|
| E2 E5 E1
| ——| |————————————————————+———| |———————————————————————————————————————————(/)—
| |
| |
| E3 E6 E7 |
| ——| |——+———|/|——+———| |——+
| | | |
| | E8 | E9 |
| +———| |——+———| |——+
|
GFK-0265J Chapter 4 Relay Functions 4-11
4
Continuation Coils (– – –<+>) and Contacts (<+>– – –)
Continuation coils (– – –<+>) and contacts (<+>– – –) are used to continue relay ladder logic beyond the limit of ten columns. The state of the last executed continuation coil is the flow state that will be used on the next executed continuation contact. If the flow of logic does not execute a continuation coil before it executes a continuation contact, the state of the contact will be no flow.
The state of the continuation contact is cleared when the PLC transitions from Stop to Run, and there will be no flow unless the transition coil has been set since going to Run mode.
There can be only one continuation coil and contact per rung; the continuation contact must be in column 1 and the continuation coil must be in column 10.
Note
The Continuation coil and contact are not re-entrant and must not be used in different interrupt blocks.
4-12 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Chapter
5
Timers and Counters
This chapter explains how to use on-delay, off-delay, and stopwatch-type timers, up counters, and down counters. The data associated with these functions is retentive through power cycles.
Abbreviation
ONDTR
OFDT
TMR
UPCTR
DNCTR
Function
Retentive On-Delay Timer
Off-Delay Timer
Simple On-Delay Timer
Up Counter
Down Counter
Page
5-3
5- 6
5- 9
5-12
5-14
Function Block Data Required for Timers and Counters
Each timer or counter uses three words (registers) of %R, %P, or %L memory to store the following information: current value (CV) preset value (PV) control word word 1 word 2 word 3
Note
Do not allow other functions to write to these registers when using the timer function.
When you enter a timer or counter, you must enter an address for the location of these three words
(registers) directly below the graphic representing the function. For example:
_____
| |
(enable)
—|ONDTR|—
Q
| |
|1.00s|
| |
(reset) —|R |
| |
| |
(preset value) —|PV CV|— (current value)
|_____|
(address)
GFK-0265J 5-1
5
The control word stores the state of the Boolean input and output of its associated function block, as shown in the following format:
15 14 13 12 11 10 9 8
7 6 5 4 3 2 1 0
Reset input
(counters only)
Enable input, previous execution
(counters only)
Bits 0 through 13 are used for timer accuracy; bits 0 through 10 are not used for counters.
5-2 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
5
ONDTR
A retentive on-delay timer (ONDTR) increments while it receives power flow and holds its value when power flow stops. Time may be counted in seconds (the default selection), tenths of seconds, or hundredths of seconds. The range is 0 to +32,767 time units. The state of this timer is retentive on power failure; no automatic initialization occurs at power-up.
When the ONDTR first receives power flow, it starts accumulating time (current value). When this timer is encountered in the ladder logic, its current value is updated.
Note
If multiple occurrences of the same timer with the same reference address are enabled during a CPU sweep, the current values of the times will be the same.
When the current value (CV) equals or exceeds the preset value (PV), output Q is energized. As long as the timer continues to receive power flow, it continues accumulating until the maximum value is reached. Once the maximum value is reached, it is retained and output Q remains energized regardless of the state of the enable input.
a42931
ENABLE
RESET
Q
A B C D E F G H
A
B
C
D
E
F
G
=
=
=
=
=
=
=
H =
ENABLE goes high; timer starts accumulating.
CV reaches PV; Q goes high.
RESET goes high; Q goes low, accumulated time is reset.
RESET goes low; timer then starts accumulating again.
ENABLE goes low; timer stops accumulating.
Accumulated time stays the same.
ENABLE goes high again; timer continues accumulating time.
CV becomes equal to PV; Q goes high.
Timer continues to accumulate time until ENABLE goes low, RESET goes high, or current value becomes equal to the maximum time.
ENABLE goes low; timer stops accumulating time.
When power flow to the timer stops, the current value stops incrementing and is retained. Output
Q, if energized, will remain energized. When the function receives power flow again, the current value again increments, beginning at the retained value. When reset (R) receives power flow, the current value is set back to zero and output (Q) is de-energized unless PV equals zero.
GFK-0265J Chapter 5 Timers and Counters 5-3
5
5-4
If PV equals zero and the timer is enabled, the output of the timer will activate. Subsequent removal of enable or activation of reset will have no effect on the timer output; it will remain enabled.
_____
| |
(enable)
—|ONDTR|—
Q
| |
|1.00s|
| |
(reset) —|R |
| |
| |
(preset value) —|PV CV|— (current value)
|_____|
(address)
When the ONDTR is used in a program block that is not called every sweep, the timer accumulates time between calls to the program block unless it is reset. his means that it functions like a timer operating in a program with a much slower sweep than the timer in the main program block. For program blocks that are inactive for a long time, the timer should be programmed to allow for this catch-up feature.
For example, if a timer in a program block is reset and the program block is not called (is inactive) for four minutes, when the program block is called, four minutes of time will already have accumulated. This time is applied to the timer when enabled, unless the timer is first reset.
Parameters:
Parameter Description
address The ONDTR uses three consecutive words (registers) of %R, %P, or %L memory to store the:
•
•
•
Current value (CV)
Preset value (PV)
Control word = word 3.
= word 1.
= word 2.
enable
R
PV
Q
CV
When you enter an ONDTR, you must enter an address for the location of these three consecutive words (registers) directly below the graphic representing the function. For more information, refer to page 4-13.
Note: Do not use this address with other instructions.
Caution: Overlapping references will result in erratic operation of the timer.
When enable receives power flow, the timer’s current value is incremented.
When R receives power flow, it resets the current value to zero.
PV is the value to copy into the timer’s preset value when the timer is enabled or reset. For a register (%R) PV reference, the PV parameter is specified as the second word of the address parameter. For example, an address parameter of %R00001 would use %R00002 as the PV parameter.
Output Q is energized when the current value is greater than or equal to the preset value. Since no automatic initialization to the Q state occurs at power-up, the Q state is retentive across power failure.
CV contains the current value of the timer.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
5
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
• address enable
R
PV
Q
CV
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Valid reference or place where power may flow through the function.
•
•
•
Note
•
•
•
•
•
•
•
•
•
•
•
•
•
• •
•
•
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, a retentive on-delay timer is used to create a signal (%Q00011) that turns on 8.0 seconds after %Q00010 turns on, and turns off when %Q00010 turns off.
| _____
|%Q00010 | | %Q00011
|——| |———|ONDTR|———————————————————————————————————————————————————————————( )—
| | 0.1s|
|%Q00010 | |
|——|/|———|R |
| | |
| | |
| CONST —|PV CV|—
| +00080 |_____|
|
| %R00004
GFK-0265J Chapter 5 Timers and Counters 5-5
5
OFDT
The off-delay timer (OFDT) increments while power flow is off, and resets to zero when power flow is on. Time may be counted in seconds (the default selection), tenths of seconds, or hundredths of seconds. The range is 0 to +32767 time units. The state of this timer is retentive on power failure; no automatic initialization occurs at power-up.
When the OFDT first receives power flow, it passes power to the right and the current value (CV) is set to zero. The output remains on as long as the function receives power flow. If the function stops receiving power flow from the left, it continues to pass power to the right and the timer starts accumulating time in CV.
Note
If multiple occurrences of the same timer with the same reference address are enabled during a CPU sweep, the current values of the times will be the same.
The OFDT does not pass power flow if the preset value is zero or negative.
Each time the function is invoked with the enabling logic set OFF, the current value is updated to reflect the elapsed time since the timer was turned off. When the current value (CV) is equal to the preset value (PV), the function stops passing power flow to the right. The current value never exceeds the preset value.
When the function receives power flow again, the current value resets to zero.
a42932
ENABLE
Q
A B C D
E
F G H
A = ENABLE and Q both go high.
B = ENABLE goes low; timer starts accumulating time.
C = CV reaches PV; Q goes low, and timer stops accumulating time.
D = ENABLE goes high; timer is reset (CV = 0).
E = ENABLE goes low; timer starts accumulating time.
F = ENABLE goes high; timer is reset (CV = 0).
G = ENABLE goes low; timer begins accumulating time.
H = CV reaches PV; Q goes low, and timer stops accumulating time.
5-6 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
5
_____
| |
(enable)
—|OFDT |—
Q
| |
|1.00s|
| |
(preset value) —|PV CV|— (current value)
|_____|
(address)
When the OFDT is used in a program block that is not called every sweep, the timer accumulates time between calls to the program block unless it is reset. This means that it functions like a timer operating in a program with a much slower sweep than the timer in the main program block. For program blocks that are inactive for a long time, the timer should be programmed to allow for this catch-up feature.
For example, if a timer in a program block is reset and the program block is not called (is inactive) for 4 minutes, when the program block is called, four minutes of time will already have accumulated. This time is applied to the timer when enabled, unless the timer is first reset.
Parameters:
Parameter Description
address The OFDT uses three consecutive words (registers) of %R, %P, or %L memory to store the:
• Current value (CV) = word 1.
•
•
Preset value (PV)
Control word = word 3.
= word 2.
When you enter an OFDT, you must enter an address for the location of these three consecutive words (registers) directly below the graphic representing the function. For more information, refer to page 4-13.
Note: Do not use this address with other instructions.
enable
PV
Q
CV
Caution: Overlapping references will result in erratic operation of the timer.
When enable receives power flow, the timer’s current value is incremented.
PV is the value to copy into the timer’s preset value when the timer is enabled or reset. For a register (%R) PV reference, the PV parameter is specified as the second word of the address parameter. For example, an address parameter of %R00001 would use %R00002 as the PV parameter.
Output Q is energized when the current value is less than the preset value. Since no automatic initialization to the Q state occurs at power-up, the Q state is retentive across power failure.
CV contains the current value of the timer.
GFK-0265J Chapter 5 Timers and Counters 5-7
5
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
• address enable
PV
•
• • • • • •
•
•
Q
CV
•
• • • • • •
Valid reference or place where power may flow through the function.
•
Note
•
•
•
•
•
•
•
•
•
•
•
•
•
• •
•
•
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, an OFDT timer is used to turn off an output (%Q00001) whenever an input (%I00001) turns on. The output is turned on again 0.3 seconds after the input goes off.
| ___
|%I00001 |—————| %Q00001
|——| |———|OFDT |———————————————————————————————————————————————————————————(/)—
| |0.10s|
| | |
| CONST —|PV CV|—
| +00003 |_____|
|
| %P00019
5-8 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
5
TMR
The simple on-delay timer (TMR) function increments while it receives power flow and resets to zero when power flow stops. Time may be counted in seconds (the default selection), tenths of seconds, or hundredths of seconds. The range is 0 to +32,767 time units. The state of this timer is retentive on power failure; no automatic initialization occurs at power-up.
When the TMR receives power flow, the timer starts accumulating time (current value). The current value is updated when it is encountered in the logic to reflect the total elapsed time since the timer was last reset.
Note
If multiple occurrences of the same timer with the same reference address are enabled during a CPU sweep, the current values of the times will be the same.
Additionally, a TMR timer will expire (pass power flow to the right) the first sweep that it is enabled if the previous sweep time was greater than the preset value (PV).
This update occurs as long as the enabling logic remains ON. When the current value (CV) equals or exceeds the preset value (PV), the function begins passing power flow to the right. The timer continues accumulating time until the maximum value is reached. When the enabling parameter transitions from ON to OFF, the timer stops accumulating time and the current value is reset to zero.
a42933
ENABLE
Q
A B C
D
E
A = ENABLE goes high; timer begins accumulating time.
B = CV reaches PV; Q goes high, and timer continues accumulating time.
C = ENABLE goes low; Q goes low; timer stops accumulating
time and CV is cleared.
D = ENABLE goes high; timer starts accumulating time.
E = ENABLE goes low before CV reaches PV; Q remains low;
timer stops accumulating time and is cleared to zero.
GFK-0265J Chapter 5 Timers and Counters 5-9
5
_____
| |
(enable)
—| TMR |—
Q
| |
|1.00s|
| |
(preset value) —|PV CV|— (current value)
|_____|
(address)
When the TMR is used in a program block that is not called every sweep, the timer accumulates time between calls to the program block unless it is reset. This means that it functions like a timer operating in a program with a much slower sweep than the timer in the main program block. For program blocks that are inactive for a long time, the timer should be programmed to allow for this catch-up feature.
For example, if a timer in a program block is reset and the program block is not called (is inactive) for 4 minutes, when the program block is called, four minutes of time will already have accumulated. This time is applied to the timer when enabled, unless the timer is first reset.
Parameters:
Parameter Description
address The TMR uses three consecutive words (registers) of %R, %P, or %L memory to store the:
•
•
•
Current value (CV)
Preset value (PV)
Control word = word 3.
= word 1.
= word 2.
When you enter an TMR, you must enter an address for the location of these three consecutive words (registers) directly below the graphic representing the function. For more information, refer to page 4-13.
Note: Do not use this address with other instructions.
enable
PV
Q
CV
Caution: Overlapping references will result in erratic operation of the timer.
When enable receives power flow, the timer’s current value is incremented. When the
TMR is not enabled, the current value is reset to zero and Q is turned off.
PV is the value to copy into the timer’s preset value when the timer is enabled or reset. For a register (%R) PV reference, the PV parameter is specified as the second word of the address parameter. For example, an address parameter of %R00001 would use %R00002 as the PV parameter.
Output Q is energized when TMR is enabled and the current value is greater than or equal to the preset value.
CV contains the current value of the timer.
5-10 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
5
Valid Memory Types:
•
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
address enable
PV
•
• • • • • •
•
•
Q
CV
•
• • • • • •
Valid reference or place where power may flow through the function.
•
Note
•
•
•
•
•
•
•
•
•
•
•
•
•
• •
•
•
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, an on-delay timer TMRID is used to control the length of time that coil
DWELL is on. When the normally open (momentary) contact DO_DWL is on, coil DWELL is energized. The contact of coil DWELL keeps coil DWELL energized (when contact DO_DWL is released), and also starts the timer TMRID. When TMRID reaches its preset value of one-half second, coil REL energizes, interrupting the latched-on condition of coil DWELL. The contact
DWELL interrupts power flow to TMRID, resetting its current value and de-energizing coil REL.
The circuit is then ready for another momentary activation of contact DO_DWL.
|
| DO_DWL REL DWELL
|——| |——+——|/|—————————————————————————————————————————————————————————————( )—
| |
| DWELL |
|——| |——+
| _____
| DWELL | | REL
|——| |———| TMR |———————————————————————————————————————————————————————————( )—
| | 0.1s|
| | |
| CONST —|PV CV|—
| +00005 |_____|
|
| TRMID
GFK-0265J Chapter 5 Timers and Counters 5-11
5-12
5
UPCTR
The Up Counter (UPCTR) function is used to count up to a designated value. The range is 0 to
+32,767 counts. When the up counter reset is ON, the current value (CV) of the counter is reset to
0. Each time the enable input transitions from OFF to ON, the current value is incremented by 1.
The current value (CV) can be incremented past the preset value (PV). The output is ON whenever the current value is greater than or equal to the preset value.
The output state (Q) of the UPCTR is retentive on power failure; no automatic initialization occurs at power-up.
_____
| |
(enable)
—|UPCTR|—
(Q)
| |
| |
(reset) —|R |
| |
| |
(preset value) —|PV CV|— (current value)
|_____|
(address)
Parameters:
Parameter Description
address The UPCTR uses three consecutive words (registers) of %R, %P, or %L memory to store the:
• Current value (CV) = word 1.
•
•
Preset value (PV)
Control word = word 3.
= word 2.
enable
R
PV
Q
CV
When you enter an UPCTR, you must enter an address for the location of these three consecutive words (registers) directly below the graphic representing the function. For more information, refer to page 4-13.
Note: Do not use this address with another up counter, down counter, or any other instruction or improper operation will result.
Caution: Overlapping references will result in erratic operation of the counter
.
On a positive transition of enable, the current count is incremented by one.
When R receives power flow, it resets the current value back to zero.
PV is the value to copy into the counter’s preset value when the counter is enabled or reset.
For a register (%R) PV reference, the PV parameter is specified as the second word of the address parameter. For example, an address parameter of %R00001 would use %R00002 as the PV parameter.
Output Q is energized when the current value is greater than or equal to the preset value. The Q state is retentive on power failure; no automatic initialization occurs at power-up.
CV contains the current value of the counter.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
5
Valid Memory Types:
•
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
address enable
R
PV
Q
CV
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Valid reference or place where power may flow through the function.
•
•
•
Note
•
•
•
•
•
•
•
•
•
•
•
•
•
• •
•
•
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, every time input %I00012 transitions from OFF to ON, up counter
PRT_CNT counts up by 1; internal coil %M00001 is energized whenever 100 parts have been counted. Whenever %M00001 is ON, the accumulated count is reset to zero.
| _____
|%I00012 | | %M00001
|——| |—— >UPCTR|———————————————————————————————————————————————————————————( )—
| | |
|%M00001 | |
|——| |———|R |
| | |
| | |
| CONST —|PV CV|—
| +00100 |_____|
|
| PRT_CNT
GFK-0265J Chapter 5 Timers and Counters 5-13
5
DNCTR
The Down Counter (DNCTR) function is used to count down to zero from a preset value. The minimum preset value is zero; the maximum preset value is +32,767 counts. The minimum current value is –32,768. When reset, the current value (CV) of the counter is set to the preset value (PV).
When the enable input transitions from OFF to ON, the current value decrements by one. The output is ON whenever the current value is less than or equal to zero.
The output state (Q) of the DNCTR is retentive on power failure; no automatic initialization occurs at power-up.
_____
| |
(enable)
—>DNCTR|—
(Q)
| |
| |
(reset) —|R |
| |
| |
(preset value) —|PV CV|— (current value)
|_____|
(address)
Parameters:
Parameter Description
address The DNCTR uses three consecutive words (registers) of %R, %P, or %L memory to store the:
•
•
•
Current value (CV)
Preset value (PV)
Control word = word 3.
= word 1.
= word 2.
When you enter an DNCTR, you must enter an address for the location of these three consecutive words (registers) directly below the graphic representing the function. For more information, refer to page 4-13.
enable
R
PV
Q
CV
Note: Do not use this address with another down counter, up counter, or any other instruction or improper operation will result.
Caution: Overlapping references will result in erratic operation of the counter.
On a positive transition of enable, the current value decrements by one.
When R receives power flow, it resets the current value to the preset value.
PV is the value to copy into the counter’s preset value when the counter is enabled or reset.
For a register (%R) PV reference, the PV parameter is specified as the second word of the address parameter. For example, an address parameter of %R00001 would use %R00002 as the PV parameter.
Output Q is energized when the current value is less than or equal to zero. The Q state is retentive on power failure; no automatic initialization occurs at power-up.
CV contains the current value of the counter.
5-14 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
5
Valid Memory Types:
•
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
address enable
R
PV
Q
CV
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Valid reference or place where power may flow through the function.
•
•
•
Note
•
•
•
•
•
•
•
•
•
•
•
•
•
• •
•
•
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, the down counter identified as COUNTP counts 5000 new parts before energizing output %Q00005.
| _____
|NEW_PRT | | %Q00005
|——| |—— >DNCTR|———————————————————————————————————————————————————————————( )—
| | |
|NXT_BAT | |
|——| |———|R |
| | |
| | |
| CONST —|PV CV|—
| +05000 |_____|
|
| COUNTP
GFK-0265J Chapter 5 Timers and Counters 5-15
5
Up/Down Counter Pair Example:
In the following example, the PLC is used to keep track of the number of parts contained in a temporary storage area. There are two ways of accomplishing this function using the Series 90-70 instruction set.
The first method is to use an up/down counter pair with a shared register for the accumulated or current value. When the parts enter the storage area, the up counter increments by 1, increasing the current value of the parts in storage by a value of 1. When a part leaves the storage area, the down counter decrements by 1, decreasing the inventory storage value by 1. To avoid conflict with the shared register, both counters use different register addresses but each has a current value (CV) address that is the same as the accumulated value for the other register. This is the preferred method for this application.
|
| << RUNG 4 >>
|
|
|%I00003
|——| |——
| | _____
|%I00001|| | %Q00001
|——| |—— >UPCTR|———————————————————————————————————————————————————————————( )—
| |1.00s|
|%I00009 | |
|——| |———|R |
| | |
| | |
| CONST —|PV CV|—%R00104
| +00005 |_____|
|
| %R00100
|
|
| << RUNG 5 >>
|
|
|%I00003
|——| |——
| | _____
|%I00002|| | %Q00002
|——| |—— >DNCTR|———————————————————————————————————————————————————————————( )—
| | |
|ALW_OFF | |
|——| |———|R |
| | |
| | |
| CONST —|PV CV|—%R00100
| +00005 | |
| |_____|
|
| %R00104
5-16 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
The second method, shown below, uses the ADD and SUB functions to provide storage tracking.
|
|
| << RUNG 7 >>
| _____
|%I00004 | |
|——|
↑
|———| ADD_ |—
| | INT |
| | |
|%R00201— | I1 Q |—%R00201
| | |
| | |
|
|
| CONST — | I2 |
| +00001 |_____ |
|
| << RUNG 8 >>
| _____
|%I00005 | |
|——|
↑
|———| SUB_|—
| | INT |
| | |
|%R00201—|I1 Q|—%R00201
| | |
| | |
|
| CONST —|I2 |
| +00001 |_____|
5
GFK-0265J Chapter 5 Timers and Counters 5-17
Chapter
6
Math Functions
This chapter describes the Logicmaster 90 math functions:
Abbreviation
ADD
SUB
MUL
DIV
MOD
SQRT
ABS
SIN, COS, TAN,
ASIN, ACOS,
ATAN
LOG, LN
EXP, EXPT
RAD, DEG
Function Description Page
Addition
Subtraction
Multiplication
Division
Add two numbers.
Subtract one number from another.
Multiply two numbers.
Divide one number by another, yielding
a quotient.
Modulo Division
Square Root
Absolute Value
Divide one number by another, yielding
a remainder.
6-4
Find the square root of an integer or real value.
6-6
Find the absolute value of an integer, double precision integer, or real value.
6-8
Trigonometric Functions Perform the appropriate function on the real value in input IN.
6-10
6-2
6-2
6-2
6-2
6-12 Logarithmic/Exponential
Functions
Radian Conversion
Perform the appropriate function on the real value in input IN.
Perform the appropriate function on the real value in input IN.
6-14
Note
Division and modulo division are similar functions which differ in their output; division finds a quotient, while modulo division finds a remainder.
GFK-0265J 6-1
6-2
6
MATH (ADD, SUB, MUL, DIV)
Math functions include addition, subtraction, multiplication, and division. When a function receives power flow, the appropriate math function is performed on input parameters I1 and I2.
These parameters must be the same data type. Output Q is the same data type as I1 and I2.
Note
DIV rounds down; it does not round to the closest integer.
(For example, 24 DIV 5 = 4.)
Math functions operate on these types of data:
Data Type
INT
UINT
DINT
REAL
MIXED
Description
Signed integer.
Unsigned integer.
Double precision signed integer.
Floating point.
Mixed is available for MUL and DIV only.
Note
MUL_MIXED inputs are the same as INT; MUL_MIXED output is the same as
DINT. DIV_MIXED input I1 is the same as DINT; DIV_MIXED input I2 and outputs are the same as INT.
The default data type is signed integer; however, it can be changed after selecting the function. For more information on data types, refer to chapter 2, section 3, “Program Organization and User
Data.”
If the operation of INT or DINT operands results in overflow, the output reference is set to its largest possible value for the data type. For signed numbers, the sign is set to show the direction of the overflow. If signed or double precision integers are used, the sign of the result for DIV and
MUL functions depends on the signs of I1 and I2. If the operation of UINT operands results in overflow, the output reference is set to the overflow value.
If the operation does not result in overflow, the ok output is set ON unless one of these invalid
REAL operations occurs:
•
For ADD,
(
)
(
)
For SUB,
•
For MUL,
0
( )
( ) ( )
•
For DIV, 0 divided by 0.
•
For DIV,
∞ divided by
∞
•
I1 and/or I2 is NaN (Not a Number).
In these cases, ok is set OFF.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
6
GFK-0265J
_____
| |
(enable)
—| ADD_|—
(ok)
| |
| INT |
| |
(input parameter I1) —|I1 Q|— (output parameter Q)
| |
(input parameter I2) —| I2 |
|_____|
Parameters:
Parameter
enable
I1
I2 ok
Q
Description
When the function is enabled, the operation is performed.
I1 contains a constant or reference for the first value used in the operation.
(I1 is on the left side of the mathematical equation, as in I1 – I2.)
I2 contains a constant or reference for the second value used in the operation.
(I2 is on the right side of the mathematical equation, as in I1 – I2.)
The ok output is energized when the function is performed without dividing by zero, unless an invalid operation occurs or I1 and/or I2 is NaN.
Output Q contains the result of the operation.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
•
I1
I2 ok
•
•
•
• o o o o o o o o o o
•
•
•
•
•
•
•
•
Q o o o o o • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• o
Valid reference or place where power may flow through the function.
Valid reference for UINT or INT data only; not valid for DINT or REAL.
•
•
•
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, refer to the "Restrictions on Formal Parameters within a Parameterized Subroutine Block" section of
Chapter 2.
Example:
In the following example, whenever input %I00001 is set, the integer content of %R00002 is decremented by 1 and coil %Q00001 is turned on, provided there is no overflow in the subtraction.
| _____
|%I00001 | | %Q00001
|-—| |———| SUB_|———————————————————————————————————————————————————————————( )—
| | INT |
| | |
|%R00002—|I1 Q|—%R00002
| +00095 | |
| | |
| CONST —|I2 |
| +00001 |_____|
|
Chapter 6 Math Functions 6-3
6-4
6
MOD (INT, UINT, DINT)
The Modulo (MOD) function is used to divide one value by another value of the same data type, to obtain a remainder. If signed or double precision signed integers are used, the sign of the result is always the same as the sign of I1.
The MOD function operates on these types of data:
Data Type
INT
DINT
UINT
Description
Signed integer.
Double precision signed integer.
Unsigned integer.
The default data type is signed integer; however, it can be changed after selecting the function. For more information on data types, refer to chapter 2, section 3, “Program Organization and User
Data.”
When the function receives power flow, it divides input parameter I1 by input parameter I2. These parameters must be the same data type. Output Q is calculated using the formula:
Q = I1 - ((I1 DIV I2) * I2)
where DIV produces an integer number. Q is the same data type as input parameters I1 and I2.
OK is always ON when the function receives power flow, unless there is an attempt to divide by zero. In that case, it is set OFF.
_____
| |
(enable
—| MOD_|—
(ok)
| |
| INT |
| |
(input parameter I1) —|I1 Q|— (output parameter Q)
| |
(input parameter I2) —| I2 |
|_____|
Parameters:
Parameter
enable
I1
I2 ok
Q
Description
When the function is enabled, the operation is performed.
I1 contains a constant or reference for the value to be divided by I2.
I2 contains a constant or reference for the value to be divided into I1.
The ok output is energized when the function is performed without dividing by zero.
Output Q contains the result of dividing I1 by I2 to obtain a remainder.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
6
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
I1
I2 ok
•
•
•
• o o o o o o o o o o
•
•
•
•
•
•
•
•
Q • o o o o o • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function.
o Valid reference for UINT or INT data only; not valid for DINT.
•
•
•
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, the remainder of the integer division of BOXES into PALLETS is placed into NT_FULL whenever %I00001 is ON.
| _____
|%I00001 | |
|——| |———| MOD_|—
| | INT |
| | |
|PALLETS—|I1 Q|—NT_FULL
|—00017 | | t00005
| | |
| BOXES —|I2 |
| +00006 |_____|
|
GFK-0265J Chapter 6 Math Functions 6-5
6
SQRT (INT, DINT, REAL)
The Square Root (SQRT) function is used to find the square root of a value. When the function receives power flow, the value of output Q is set to the integer portion of the square root of the input IN. The output Q must be the same data type as IN.
The SQRT function operates on these types of data:
Data Type
INT
DINT
REAL
Description
Signed integer.
Double precision signed integer
Floating point.
The default data type is signed integer; however, it can be changed after selecting the function. For more information on data types, refer to chapter 2, section 3, “Program Organization and User
Data.”
OK is set ON if the function is performed without overflow, unless one of these invalid REAL operations occurs:
•
IN < 0.
•
IN is NaN (Not a Number).
Otherwise, ok is set OFF.
_____
| |
(enable)
—|SQRT_|—
(ok)
| |
| INT |
| |
(input parameter IN) —|IN Q|— (output parameter Q)
|_____|
Parameters:
Parameter
enable
IN ok
Q
Description
When the function is enabled, the operation is performed.
IN contains a constant or reference for the value whose square root is to be calculated. If IN is less than zero, the function will not pass power flow.
The ok output is energized when the function is performed without overflow, unless an invalid operation occurs or IN is NaN.
Output Q contains the square root of IN.
6-6 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
6
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
I1 ok
•
•
•
• o o o o o • • • •
Q o o o o o • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• o
Valid reference or place where power may flow through the function.
Valid reference for INT only; not valid for DINT or REAL.
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, the square root of the integer number located at %AI0001 is placed into the result located at %R00003 whenever %I00001 is ON.
| _____
|%I00001 | |
|——| |———|SQRT_|
| | INT |
| | |
|%AI0001—|IN Q|—%R00003
| |_____|
|
GFK-0265J Chapter 6 Math Functions 6-7
6
ABS (INT, DINT, REAL)
The Absolute Value (ABS) function is used to find the absolute value of an integer, double precision integer, or real value. When the function receives power flow, it places the absolute value of input IN in output Q.
The ABS function operates on these types of data:
Data Type
INT
DINT
REAL
Description
Signed integer.
Double precision signed integer
Floating point.
The default data type is signed integer; however, it can be changed after selecting the function. For more information on data types, refer to chapter 2, section 3, “Program Organization and User
Data.”
The ok output will receive power flow, unless one of the following conditions occurs:
•
For INT type, IN is MININT.
•
For DINT type, IN is MINDINT.
•
For REAL type, IN is NaN (Not a Number).
_____
| |
(enable)
—| ABS_|—
(ok)
| |
| INT |
| |
(input parameter IN) —|IN Q|— (output parameter Q)
|_____|
Parameters:
Parameter
enable
IN ok
Q
Description
When the function is enabled, the operation is performed.
IN contains the integer or real value to be operated on.
The ok output is energized when the function is performed without overflow, unless an invalid operation occurs and/or IN is NaN.
Output Q contains the absolute value of IN.
6-8 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
6
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
IN ok
•
•
• o o o o o • • • •
Q • o o o o o • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function.
o Valid reference for INT only; not valid for DINT or REAL.
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, refer to the "Restrictions on Formal Parameters within a Parameterized Subroutine Block" section of
Chapter 2..
Example:
In the following example, the absolute value of –2976, which is 2976, is placed in %R00010.
| _____
| | |
|————————| ABS_|—
| | INT |
| | |
| CONST —|IN Q|—%R00010
| -2976 |_____| 2976
|
GFK-0265J Chapter 6 Math Functions 6-9
6
Trig Functions (SIN, COS, TAN, ASIN, ACOS, ATAN)
The SIN, COS, and TAN functions are used to find the trigonometric sine, cosine, and tangent, respectively, of its input. When one of these functions receives power flow, it computes the sine
(or cosine or tangent) of IN, whose units are radians, and stores the result in output Q. Both IN and
Q are floating-point values.
The ASIN, ACOS, and ATAN functions are used to find the inverse sine, cosine, and tangent, respectively, of its input. When one of these functions receives power flow, it computes the inverse sine (or cosine or tangent) of IN and stores the result in output Q, whose units are radians.
Both IN and Q are floating-point values.
The SIN, COS, and TAN functions accept a broad range of input values, where –263 < IN <+263,
(263
≈
9.22x1018).
The ASIN and ACOS functions accept a narrow range of input values, where –
≤
IN
≤
1. Given a valid value for the IN parameter, the ASIN_REAL function will produce a result Q such that:
ASIN (IN)
=
π
2
≤
Q
≤
π
2
The ACOS_REAL function will produce a result Q such that:
ACOS (IN)
=
0
≤
Q
≤ π
The ATAN function accepts the broadest range of input values, where –
∞ ≤
IN
≤
+
∞
.
Given a valid value for the IN parameter, the ATAN_REAL function will produce a result Q such that:
ATAN (IN)
=
π
2
≤
Q
≤
π
2
_____
| |
(enable)
—| SIN_|—
(ok)
| |
| REAL|
| |
(input parameter IN) —|IN Q|— (output parameter Q)
|_____|
NOTE
These functions are only available on floating-point versions of the Series 90-70
CPU.
6-10 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
6
Parameters:
Parameter
enable
IN ok
Q
Description
When the function is enabled, the operation is performed.
IN contains the real value to be operated on.
The ok output is energized when the function is performed without overflow, unless an invalid operation occurs and/or IN is NaN.
Output Q contains the trigonometric value of IN.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
IN ok
•
•
•
• • • •
Q • • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function.
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, the COS of the value in %P00001 is placed in %P00033.
| _____
| | |
|——————————————| COS_|—
| | REAL|
| | |
| %P00001—|IN Q|—%P00033
| +3.141500|_____| œ1.000000
|
GFK-0265J Chapter 6 Math Functions 6-11
6
Logarithmic/Exponential Functions (LOG, LN, EXP, EXPT)
The LOG, LN, and EXP functions have two input parameters and two output parameters. When the function receives power flow, it performs the appropriate logarithmic/exponential operation on the real value in input IN and places the result in output Q.
•
For the LOG function, the base 10 logarithm of IN is placed in Q.
•
For the LN function, the natural logarithm of IN is placed in Q.
•
For the EXP function, e is raised to the power specified by IN and the result is placed in Q.
The EXPT function has three input parameters and two output parameters. When the function receives power flow, the value of input I1 is raised to the power specified by the value I2 and the result is placed in output Q.
The ok output will receive power flow, unless IN is NaN (Not a Number) or is negative.
_____
| |
(enable)
—| LOG_|—
(ok)
| |
| REAL|
| |
(input parameter IN) —|IN Q|— (output parameter Q)
|_____|
Parameters:
Parameter
enable
IN ok
Q
Description
When the function is enabled, the operation is performed.
IN contains the real value to be operated on.
The ok output is energized when the function is performed without overflow, unless an invalid operation occurs and/or IN is NaN or is negative.
Output Q contains the logarithmic/exponential value of IN.
Note
These functions are only available on floating-point versions of the Series 90-70
CPU.
6-12 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
6
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
IN* ok
•
•
•
• • • •
Q • • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
* For the EXPT function, input IN is replaced by input parameters I1 and I2.
• Valid reference or place where power may flow through the function.
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, the value of %AI0001 is raised to the power of 2.5 and the result is placed in %R00001.
| _____
| | |
|——————————————|EXPT_|—
| | REAL|
| | |
| %AI0001—|I1 Q|—%R00001
| | |
| | |
| CONST —|I2 |
| 2.50000E+00|_____|
|
GFK-0265J Chapter 6 Math Functions 6-13
6
Radian Conversion (RAD, DEG)
When the function receives power flow, the appropriate conversion (RAD_TO_DEG or
DEG_TO_RAD) is performed on the real value in input IN and the result is placed in output Q.
The ok output will receive power flow unless IN is NaN (Not a Number).
_____
| |
(enable)
—| RAD_|—
(ok)
| |
| TO_ |
| DEG |
(input parameter IN) —|IN Q|— (output parameter Q)
|_____|
Parameters:
Parameter
enable
IN ok
Q
Description
When the function is enabled, the operation is performed.
IN contains the real value to be operated on.
The ok output is energized when the function is performed without overflow, unless IN is NaN.
Output Q contains the converted value of IN.
Note
These functions are only available on floating-point versions of the Series 90-70
CPU.
6-14 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
6
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
IN ok
•
•
•
• • • •
Q • • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function.
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, +1500 is converted to DEG and is placed in %R0001.
| _____
| | |
|————————————————————————————————| RAD_|
| | TO_|
| | DEG |
| CONST | |
| +1500.000 —|IN Q|— %R0001
| |_____| 85993.67
GFK-0265J Chapter 6 Math Functions 6-15
Chapter
7
Relational Functions
Relational functions are used to compare two numbers. This chapter describes the following relational functions:
Abbreviation
EQ
NE
GT
GE
LT
LE
CMP
RANGE
Function Description
Equal
Not Equal
Greater Than
Test two numbers for equality.
Test two numbers for non-equality.
Test for one number greater than another.
Greater Than or Equal Test for one number greater than or equal to another.
Less Than
Less Than or Equal
Test for one number less than another.
Test for one number less than or equal to another.
Compare
Range
Test for one number less than, equal to, or greater than another.
Determine whether a number is within a specified range.
Page
7-2
7-2
7-2
7-2
7-2
7-2
7-4
7-6
GFK-0265J 7-1
7-2
7
EQ, NE, GT, GE, LT, and LE (INT, UINT, DINT, REAL)
Relational functions are used to determine the relation of two values. When the function receives power flow, it compares input parameter I1 to input parameter I2. These parameters must be the same data type.
Relational functions operate on these types of data:
Data Type
INT
UINT
DINT
REAL
Description
Signed integer.
Unsigned integer.
Double precision signed integer.
Floating point.
The default data type is signed integer. To compare either signed integer, unsigned integer, or double precision integers, select the new data type after selecting the relational function. To compare data of other types or of two different types, first use the appropriate conversion function
(described in Chapter 12, Conversion Functions) to change the data to one of the integer types.
If input parameters I1 and I2 match the specified relation, output Q receives power flow and is set
ON (1); otherwise, it is set OFF (0).
Output ok will always receive power flow when the function is enabled, unless I1 and/or I2 is NaN
(Not a Number).
_____
| |
(enable)
—| EQ_ |—
(ok)
| |
| REAL|
| |
(input parameter I1) —|I1 Q|— (output parameter Q)
| |
| |
(input parameter I2) —|I2 |
|_____|
Parameters:
Parameter
enable
I1
I2 ok
Q
Description
When the function is enabled, the operation is performed.
I1 contains a constant or reference for the first value to be compared.
(I1 is on the left side of the relational equation, as in I1 < I2).
I2 contains a constant or reference for the second value to be compared.
(I2 is on the right side of the relational equation, as in I1 < I2).
The ok output is energized when the function is performed without error, unless I1 and/or I2 is NaN.
Output Q is energized when I1 and I2 match the specified relation.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
7
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
•
I1
I2 ok
•
• o o o o o o o o o o
•
•
•
•
•
•
•
•
Q
•
• o o o o o • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• o
Valid reference or place where power may flow through the function.
Valid reference for INT or UINT data only; not valid for DINT or REAL.
•
•
•
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, two double precision signed integers, PRT_MDE and BIN_FUL, are compared whenever %I00001 is set. If PRT_MDE is less than BIN_FUL, coil %Q00002 is turned on.
| _____
|%I00001 | |
|——| |——————————| LT_ |—
| | DINT|
| | | %Q00002
| PRT_MDE—|I1 Q|————————————————————————————————————————————————————( )—
| | |
| | |
| BIN_FUL—|I2 |
| |_____|
|
GFK-0265J Chapter 7 Relational Functions 7-3
7-4
7
CMP (INT, UINT, DINT, REAL)
Use the Compare (CMP) function to test for one number less than, equal to, or greater than another.
When the function receives power flow, it compares the value I1 to the value I2. These values must be the same data type.
The CMP function operates on these types of data:
Data Type
INT
UINT
DINT
REAL
Description
Signed integer.
Unsigned integer.
Double precision signed integer.
Floating point.
The default data type is signed integer. To compare either signed integer, unsigned integer, or double precision signed integers, select the new data type after selecting the relational function. To compare data of other types or of two different types, first use the appropriate conversion function
(described in Chapter 12, Conversion Functions) to change the data to one of the integer types.
LT, EQ, and GT are set ON (1) or OFF (0) as a result of the comparison.
Output ok will always receive power flow when the function is enabled, unless I1 and/or I2 is NaN
(Not a Number).
_____
| |
(enable)
—| CMP_|—
(ok)
| |
| REAL|
| |
(input parameter I1) —|I1 LT|— (output parameter for less than)
| |
(input parameter I2) —|I2 EQ|— (output parameter for equal)
| |
| |
| GT|— (output parameter for greater than)
|_____|
Parameters:
Parameter
enable
I1
I2 ok
LT
EQ
GT
Description
When the function is enabled, the operation is performed.
I1 contains a constant or reference for the first value to be compared.
I2 contains a constant or reference for the second value to be compared.
The ok output is energized when the function is performed without error, unless I1 and/or I2 is NaN.
Output LT is energized when I1 is less than I2.
Output EQ is energized when I1 is equal to I2.
Output GT is energized when I1 is greater than I2.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
7
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
I1
I2 ok
LT
EQ
GT
•
•
•
•
•
•
• o o o o o o o o o o
•
•
•
•
•
•
•
•
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function.
o Valid reference for INT or UINT data only; not valid for DINT or REAL.
•
•
•
•
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, when %I00001 is ON, the integer variable SHIPS is compared with the variable BOATS. Internal coils %M0001, %M0002, and %M0003 are set to the results of the compare.
| _____
|%I00001 | |
|——| |———| CMP_|—
| | UINT|
| | | %M00001
| SHIPS —|I1 LT|———————————————————————————————————————————————————————————( )—
| | |
| | | %M00002
| BOATS —|I2 EQ|———————————————————————————————————————————————————————————( )—
| | |
| | | %M00003
| | GT|———————————————————————————————————————————————————————————( )—
| |_____|
|
GFK-0265J Chapter 7 Relational Functions 7-5
7
RANGE (INT, UINT, DINT, WORD, DWORD)
The RANGE function is used to compare a single input value against two delimiters to determine whether the input value falls within the range of the delimiters.
Note
The Range function is only available on a Release 5 or higher CPU.
The RANGE function operates on these types of data:
Data Type
INT
DINT
UINT
WORD
DWORD
Description
Signed integer.
Double precision signed integer.
Unsigned integer.
Word data type.
Double word data type.
The default data type is signed integer; however, it can be changed after selecting the function. For more information on data types, please refer to chapter 2, section 2, “Program Organization and
User References/Data.”
When the function is enabled, the RANGE function block will compare the value in input parameter IN against the range specified by the values of the two delimiters specified by parameters L1 and L2, inclusively. When the value in IN is within the range specified by L1 and
L2, output parameter Q is set ON (1). Otherwise, Q is set OFF (0). If the operation is successful, the ok output will receive power flow.
_____
| |
(enable)
–|RANGE|-
(ok)
| |
| INT |
| |
(delimiter L1) –|L1 Q|– (output parameter Q)
| |
(delimiter L2) –|L2 |
| |
(value to be compared) –|IN |
|_____|
Note
Limit parameters L1 and L2 represent the endpoints of a range. There is no fixed minimum/maximum or high/low connotation assigned to either parameter. Thus, a desired range of 0 to 100 could be specified by assigning 0 to L1 and 100 to L2 or 0 to L2 and 100 to L1. In either case, a value of 45 for the input parameter IN would result in the output Q being set ON (1).
7-6 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
GFK-0265J
7
Parameters:
Parameter
enable
L1
L2
IN ok
Q
Description
When the function is enabled, the operation is performed.
L1 contains the start point of the range.
L2 contains the end point of the range.
IN contains the value to be compared against the range specified by L1 and L2.
The ok output is energized unless an error is encountered.
Output Q is energized when the value in IN is within the range specified by L1 and
L2, inclusive.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
•
L1
L2
IN ok
Q o o o o o o o o o o o o o o o o o o o o
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• o
Valid reference or place where power may flow through the function.
Valid reference for INT ,WORD or UINT data only; not valid for DINT or DWORD.
† Constants are limited to integer values for double precision signed integer operations.
•
•
•
•
•†
•†
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, the value in %R00001 is 10, and the value in %R00002 is 50. The output Q will be ON for all IN values in %R00003 greater than or equal to 10 and less than or equal to 50. Output Q will be OFF for all IN values in %R00003 less than 10 or greater than 50.
The ok output is set ON.
| _____
|%I00001 | | %M00001
|——| |——0+RANGE|—————————————————————————————————————————————————————————( )—
| | INT |
| | | %M00002
|%R00001—|L1 Q|—————————————————————————————————————————————————————————( )—
| | |
|%R00002—|L2 |
| | |
|%R00003—|IN |
| |_____|
|
Chapter 7 Relational Functions 7-7
Chapter
8
Bit Operation Functions
Bit operation functions perform comparison, logical, and move operations on bit strings. The maximum string length is 256 words or double words. Bit operation functions require WORD or
DWORD data; the default data type is WORD.
Although data must be specified in 16-bit or 32-bit increments, these functions operate on data as a continuous string of bits, with bit 1 of the first word being the Least Significant Bit (LSB). The last bit of the last word is the Most Significant Bit (MSB). For example, if you specified three words of data beginning at reference %L00100, it would be operated on as 48 contiguous bits.
%L00100 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
%L00101 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
%L00102 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
↑
(MSB)
←
bit 1 (LSB)
Note
Overlapping input and output reference address ranges in multi-word functions may produce unexpected results.
GFK-0265J 8-1
8
The following bit operation functions are described in this chapter:
Abbreviation
AND
OR
XOR
NOT
SHL
SHR
ROL
ROR
BTST
BSET
BCLR
BPOS
MCMP
Function Description
Logical AND
Logical OR
Logical exclusive
OR
Logical Invert
Shift Left
If a bit in bit string I1 and the corresponding bit in bit string I2 are both 1, place a 1 in the corresponding location in output string Q.
If a bit in bit string I1 qnd/or the corresponding bit in bit string I2 are both 1, place a 1 in the corresponding location in output string Q.
If a bit in bit string I1 and the corresponding bit in string I2 are different, place a 1 in the corresponding location in the output bit string.
Set the state of each bit in output bit string Q to the opposite state of the corresponding bit in bit string I1.
Shift all the bits in a word or string of words to the left by a specified number of places.
Shift Right
Rotate Left
Rotate Right
Shift all the bits in a word or string of words to the right by a specified number of places.
Rotate all the bits in a string a specified number of places to the left.
Rotate all the bits in a string a specified number of places to the right.
Bit Test
Bit Set
Bit Clear
Test a bit within a bit string to determine whether that bit is currently 1 or 0.
Set a bit in a bit string to 1.
Clear a bit within a string by setting that bit to 0.
Bit Position Locate a bit set to 1 in a bit string.
Masked Compare Compare the bits in the first string with the corresponding bits in the second.
Page
8-3
8-3
8-5
8-7
8-9
8-9
8-12
8-12
8-14
8-16
8-16
8-18
8-20
Note
Note that, for all bit operations, the bit group of function blocks not explicitly bittyped will affect the transitions (coils and contacts) for all bits in the written byte/word/dword. Please read the second example shown on page for further explanation.
8-2 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
8
AND and OR (WORD, DWORD)
Each scan that power is received, the AND or OR function examines each bit in bit string I1 and the corresponding bit in bit string I2, beginning at the least significant bit in each.
For each two bits examined for the AND function, if both bits are 1, then a 1 is placed in the corresponding location in output string Q. If either or both bits are 0, then a 0 is placed in string Q in that location.
The AND function is useful for building masks or screens, where only certain bits are passed through (those that are opposite a 1 in the mask), and all other bits are set to 0. The function can also be used to clear the selected area of word memory by ANDing the bits with another bit string known to contain all 0s. The I1 and I2 bit strings specified may overlap.
For each two bits examined for the OR function, if either or both bits are 1, then a 1 is placed in the corresponding location in output string Q. If both bits are 0, then a 0 is placed in string Q in that location.
The OR function is useful for combining strings, and to control many outputs through the use of one simple logical structure. The function is the equivalent of two relay contacts in parallel multiplied by the number of bits in the string. It can be used to drive indicator lamps directly from input states, or superimpose blinking conditions on status lights.
The string length can be up to 256 words or double words for either function.
The function passes power flow to the right whenever power is received.
_____
| |
(enable)
—| AND_|—
(ok)
| |
| WORD|
| |
(input parameter I1) —|I1 Q|— (output parameter Q)
| LEN |
|00001|
(input parameter I2) —|I2 |
|_____|
Parameters:
Parameter
enable
I1
I2 ok
Q
Description
When the function is enabled, the operation is performed.
I1 contains a constant or reference for the first word.
I2 contains a constant or reference for the second word.
The ok output is energized whenever enable is energized.
Output Q contains the result of the operation.
GFK-0265J Chapter 8 Bit Operation Functions 8-3
8
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
I1
I2 ok
•
•
•
• o o o o o o o o o o o o
•
•
•
•
•
•
•
•
Q • o o o o o† o • • • • o
†
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function.
Valid reference for WORD data only; not valid for DWORD.
%SA, %SB, %SC only; %S cannot be used.
•
•
•
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, whenever input %I00001 is set, the 16-bit strings represented by nicknames WORD1 and WORD2 are examined. The results of the logical AND are placed in output string RESULT.
| _____
|%I00001 | |
|——| |———| AND_|—
| | WORD|
| | |
| WORD1 —|I1 Q|—RESULT
| | LEN |
| |00001|
| WORD2 —|I2 |
| |_____|
|
WORD1
WORD2
0 0 0 1 1 1 1 1 1 1 0 0 1 0 0 0
1 1 0 1 1 1 0 0 0 0 0 0 1 1 1 1
RESULT 0 0 0 1 1 1 0 0 0 0 0 0 1 0 0 0
8-4 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
8
XOR (WORD, DWORD)
The Exclusive OR (XOR) function is used to compare each bit in bit string I1 with the corresponding bit in string I2. If the bits are different, a 1 is placed in the corresponding position in the output bit string.
Each scan that power is received, the function examines each bit in string I1 and the corresponding bit in string I2, beginning at the least significant bit in each. For each two bits examined, if only one is 1, then a 1 is placed in the corresponding location in bit string Q. The bit string length can be up to 256 words or double words. The XOR function passes power flow to the right whenever power is received.
If string I2 and output string Q begin at the same reference, a 1 placed in string I1 will cause the corresponding bit in string I2 to alternate between 0 and 1, changing state with each scan as long as power is received. Longer cycles can be programmed by pulsing the power flow to the function at twice the desired rate of flashing; the power flow pulse should be one scan long (one-shot type coil or self-resetting timer).
The XOR function is useful for quickly comparing two bit strings, or to blink a group of bits at the rate of one ON state per two scans.
_____
| |
(enable)
—| XOR_|—
(ok)
| |
| WORD|
| |
(input parameter I1) —|I1 Q|— (output parameter Q)
| LEN |
|00001|
(input parameter I2) —|I2 |
|_____|
Parameters:
Parameter
enable
I1
I2 ok
Q
Description
When the function is enabled, the operation is performed.
I1 contains a constant or reference for the first word to be XORed.
I2 contains a constant or reference for the second word to be XORed.
The ok output is energized whenever enable is energized.
Output Q contains the result of I1 XORed with I2.
GFK-0265J Chapter 8 Bit Operation Functions 8-5
8
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
I1
I2 ok
•
•
•
• o o o o o o o o o o o o
•
•
•
•
•
•
•
•
Q • o o o o o† o • • • • o
†
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function.
Valid reference for WORD data only; not valid for DWORD.
%SA, %SB, %SC only; %S cannot be used.
•
•
•
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, whenever input %I00001 is set, the 16-bit string represented by the nickname WORD3 is cleared (set to all zeros).
| _____
|%I00001 | |
|——| |———| XOR_|—
| | WORD|
| | |
| WORD3 —|I1 Q|—WORD3
| | LEN |
| |00001|
| WORD3 —|I2 |
| |_____|
|
I1 (WORD3)
I2 (WORD3)
0 0 0 1 1 1 1 1 1 1 0 0 1 0 0 0
0 0 0 1 1 1 1 1 1 1 0 0 1 0 0 0
Q (WORD3) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
8-6 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
8
NOT (WORD, DWORD)
The NOT function is used to set the state of each bit in the output bit string Q to the opposite of the state of the corresponding bit in bit string I1.
All bits are changed on each scan that power is received, making output string Q the logical complement of I1. A length of 1 to 256 words or double words can be selected. The function passes power flow to the right whenever power is received.
_____
| |
(enable)
—| NOT_|—
(ok)
| |
| WORD|
| |
(input parameter I1) —|IN Q|— (output parameter Q)
| LEN |
|00001|
|_____|
Parameters:
Parameter
enable
I1 ok
Q
Description
When the function is enabled, the operation is performed.
I1 contains a constant or reference for the word to be negated.
The ok output is energized whenever enable is energized.
Output Q contains the NOT (negation) of I1.
GFK-0265J Chapter 8 Bit Operation Functions 8-7
8
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
I1 ok
•
•
•
• o o o o o o • • • •
Q o o o o o† o • • • • o
†
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function.
Valid reference for WORD data only; not valid for DWORD.
%SA, %SB, %SC only; %S cannot be used.
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, whenever input %I00001 is set, the bit string represented by the nickname TAC is set to the inverse of bit string CAT.
| _____
|%I00001 | |
|——| |———| NOT_|—
| | WORD|
| | |
| CAT —|IN Q|—TAC
| | LEN |
| |00001|
| |_____|
|
8-8 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
8
SHL and SHR (WORD, DWORD)
The Shift Left (SHL) function is used to shift all the bits in a word or group of words to the left by a specified number of places. When the shift occurs, the specified number of bits is shifted out of the output string to the left. As bits are shifted out of the high end of the string, the same number of bits is shifted in at the low end.
MSB LSB
B2
←
1 1 0 1 1 1 1 1 1 1 0 0 1 0 0 0
←
B1
The Shift Right (SHR) function is used to shift all the bits in a word or group of words a specified number of places to the right. When the shift occurs, the specified number of bits is shifted out of the output string to the right. As bits are shifted out of the low end of the string, the same number of bits is shifted in at the high end.
MSB LSB
B2
→
1 1 0 1 1 1 1 1 1 1 0 0 1 0 0 0
→
B1
A string length of 1 to 256 words or double words can be selected for either function.
The number of places specified for the shift must be more than zero and less than the number of bits in the string. Otherwise, no shift occurs and no power flow is generated.
The bits being shifted into the beginning of the string are specified via input parameter B1. If a length greater than 1 has been specified as the number of bits to be shifted, each of the bits is filled with the same value (0 or 1). This can be:
•
The Boolean output of another program function.
•
All 1s. To do this, use the special reference nickname ALW_ON as a permissive to input B1.
•
All 0s. To do this, use the special reference nickname ALW_OFF as a permissive to input B1.
The SHL or SHR function passes power flow to the right, unless the number of bits specified to be shifted is greater than the total length of the string or is zero.
Output Q is the shifted copy of the input string. If you want the input string to be shifted, the output parameter Q must use the same memory location as the input parameter IN. The entire shifted string is written on each scan that power is received. Output B2 is the last bit shifted out.
For example, if four bits were shifted, B2 would be the fourth bit shifted out.
GFK-0265J Chapter 8 Bit Operation Functions 8-9
8
_____
| |
(enable)
—| SHL_|—
(ok)
| |
| WORD|
| |
(word to be shifted) —|IN B2|— (last bit shifted out)
| LEN |
|00001|
(number of bits) —|N Q|— (output parameter Q)
| |
(bit shifted in) —|B1 |
|_____|
Parameters:
Parameter
enable
IN
N
B1
B2 ok
Q
LEN
Description
When the function is enabled, the shift is performed.
IN contains the first word to be shifted.
N contains the number of places (bits) that the array is to be shifted.
B1 contains the bit value to be shifted into the array.
B2 contains the bit value of the last bit shifted out of the array.
The ok output is energized when the shift is energized and the shift length is not greater than the array size.
Output Q contains the first word of the shifted array.
LEN is the number of words in the array to be shifted.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
IN
N
B1
B2 ok
•
•
•
•
•
•
• o
• o
• o
• o
• o o
•
•
•
•
•
•
•
•
•
Q o o o o o† o • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function.
o
†
Valid reference for WORD data only; not valid for DWORD.
%SA, %SB, %SC only; %S cannot be used.
•
•
•
•
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
8-10 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
8
Example:
In the following example, whenever input %I00001 is set, the output bit string represented by the nickname WORD2 is made a copy of WORD1, left-shifted by the number of bits represented by the nickname LENGTH. The resulting open bits at the beginning of the output string are set to the value of %I00002.
| _____
|%I00001 | |
|——| |———| SHL_|—
| | WORD|
| | |
| WORD1 —|IN B2|—OUTBIT
| | LEN |
| |00001|
|LENGTH —|N Q|—WORD2
| 8 | |
|%I00002 | |
|——| |———|B1 |
| |_____|
GFK-0265J Chapter 8 Bit Operation Functions 8-11
8
ROL and ROR (WORD, DWORD)
The Rotate Left (ROL) function is used to rotate all the bits in a string a specified number of places to the left. When rotation occurs, the specified number of bits is rotated out of the input string to the left and back into the string on the right.
The Rotate Right (ROR) function rotates the bits in the string to the right. When rotation occurs, the specified number of bits is rotated out of the input string to the right and back into the string on the left.
A string length of 1 to 256 words or double words can be selected for either function.
The number of places specified for rotation must be more than zero and less than the number of bits in the string. Otherwise, no movement occurs and no power flow is generated.
The ROL or ROR function passes power flow to the right, unless the number of bits specified to be rotated is greater than or equal to the total length of the string or is less than or equal to zero.
The result is placed in output string Q. If you want the input string to be rotated, the output parameter Q must use the same memory location as the input parameter IN. The entire rotated string is written on each scan that power is received.
_____
| |
(enable)
—| ROL_|—
(ok)
| |
| WORD|
| |
(word to be rotated) —|IN Q|— (output parameter Q)
| LEN |
|00001|
(number of bits) —|N |
|_____|
Parameters:
Parameter
enable
IN
N ok
Q
LEN
Description
When the function is enabled, the rotation is performed.
IN contains the first word to be rotated.
N contains the number of places that the array is to be rotated.
The ok output is energized when the rotation is energized and the rotation length is not greater than the array size.
Output Q contains the first word of the rotated array.
LEN is the number of words in the array to be rotated.
8-12 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
8
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
IN
N ok
•
•
•
• o
• o
• o
• o
• o o
•
•
•
•
•
•
•
•
•
Q • o o o o o† o • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function.
o
†
Valid reference for WORD data only; not valid for DWORD.
%SA, %SB, %SC only; %S cannot be used.
•
•
•
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, whenever input %I00001 is set, the input bit string %R00001 is rotated 3 bits and the result is placed in %R00002. After execution of this function, the input bit string
%R00001 is unchanged. If the same reference is used for IN and Q, a rotation will occur in place.
| _____
|%I00001 | |
|——| |———| ROL_|—
| | WORD|
| | |
|%R00001—|IN Q|—%R00002
| | LEN |
| |00001|
| CONST —|N |
| +00003 |_____|
|
%R00001:
MSB LSB
←
1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0
←
%R00002 (after %I00001 is set):
MSB LSB
1 1 0 0 0 0 0 0 0 0 0 0 0 1 1 1
GFK-0265J Chapter 8 Bit Operation Functions 8-13
8
BTST (WORD, DWORD)
The Bit Test (BTST) function is used to test a bit within a bit string to determine whether that bit is currently 1 or 0. The result of the test is placed in output Q.
Each sweep power is received, the BTST function sets its output Q to the same state as the specified bit. If a register rather than a constant is used to specify the bit number, the same function block can test different bits on successive sweeps. If the value of BIT is outside the range
(1
≤
BIT
≥
(16 * LEN) ), then Q is set OFF.
A string length of 1 to 256 words or double words can be selected.
_____
| |
(enable)
—| BIT_|—
(ok)
| |
|TEST_|
| WORD|
(bit to be tested) —|IN Q|— (output parameter Q)
| LEN |
|00001|
(bit number of IN) —|BIT |
|_____|
Parameters:
Parameter
enable
IN
BIT ok
Q
LEN
Description
When the function is enabled, the bit test is performed.
IN contains the first word of the data to be operated on.
BIT contains the bit number of IN that should be tested. Valid range is (1
≤
BIT
≥
(16 *
LEN) ).
The ok output is energized when enable is energized and BIT is greater than the string length or is zero.
Output Q is energized if the bit tested was a 1.
LEN is the number of words in the string to be tested.
8-14 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
8
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
•
IN
BIT ok
•
• o
• o
• o
• o
• o o
•
•
•
•
•
•
•
•
•
Q
•
•
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function.
o Valid reference for WORD data only; not valid for DWORD..
•
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, whenever input %I00001 is set, the bit at the location contained in reference PICKBIT is tested. The bit is part of string PRD_CDE. If it is 1, output Q passes power flow to the ADD function, causing 1 to be added to the current value of the ADD function input I1.
| _____
|%I00001 | |
|——| |———| BIT_|—
| |TEST_| _____
| | WORD| | |
|PRD_CDE—|IN Q|——————————| ADD_|—
| | LEN | | UINT|
| |00001| | |
|PICKBIT—|BIT | FND_ON—|I1 Q|—FND_ON
| |_____| | |
| | |
| CONST —|I2 |
| 00001 |_____|
|
GFK-0265J Chapter 8 Bit Operation Functions 8-15
8
BSET and BCLR (WORD, DWORD)
The Bit Set (BSET) function is used to set a bit in a bit string to 1. The Bit Clear (BCLR) function is used to clear a bit within a string by setting that bit to 0.
Each sweep that power is received, the function sets the specified bit to 1 for the BSET function or to 0 for the BCLR function. If a variable (register) rather than a constant is used to specify the bit number, the same function block can set different bits on successive sweeps.
A string length of 1 to 256 words or double words can be selected. The function passes power flow to the right, unless the value for BIT is outside the range (1
_
BIT
_
(16 * LEN) ). Then, ok is set
OFF.
_____
| |
(enable)
—| BIT_|—
(ok)
| |
| SET_|
| WORD|
(first word) —|IN |
| LEN |
|00001|
(bit number of IN) —|BIT |
|_____|
Parameters:
Parameter
enable
IN
BIT ok
LEN
Description
When the function is enabled, the bit operation is performed.
IN contains the first word of the data to be operated on.
BIT contains the bit number of IN that should be set or cleared.
Valid range is (1
≤
BIT
≥
(16 * LEN) ).
The ok output is energized when enable is energized.
LEN is the number of words in the bit string.
8-16 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
GFK-0265J
8
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
IN
BIT ok
•
•
• o
• o
• o
• o
• o† o
•
•
•
•
•
•
•
•
• o
†
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function.
Valid reference for WORD data only; not valid for DWORD.
%SA, %SB, %SC only; %S cannot be used.
•
•
•
• •
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2. Also, please note that, for all bit operations, the bit group of function blocks not explicitly bit-typed will affect the transitions (coils and contacts) for all bits in the written byte/word/dword. Please read the second example shown below and the explanation that precedes it before using bit operations with byte and word blocks that have transitions.
Example 1:
In the following example, whenever input %I00001 is set, bit 12 of the string beginning at reference %L00040 is set to 1.
| _____
|%I00001 | |
|——| |———| BIT_|—
| | SET_|
| | WORD|
|%L00040—|IN |
| | LEN |
| |00001|
| CONST —|BIT |
| 00012 |_____|
|
Example 2:
In the following example, M41–M48 will be solved as written to be a Transition Status. These bits
may not perform as expected when used as a transition contact or coil. If you wish to use Bit Op functions in conjunction with transition functions, your Bit Op function should be type BIT.
| _____
|%I00001 | |
|——| |———| BIT_|—
| | SET_|
| | WORD|
|%M00041—|IN |
| | LEN |
| |00001|
| CONST —|BIT |
| 00003 |_____|
|
Chapter 8 Bit Operation Functions 8-17
8
BPOS (WORD, DWORD)
The Bit Position (BPOS) function is used to locate a bit set to 1 in a bit string.
Each sweep that power is received, the function scans the bit string starting at IN. When the function stops scanning, either a bit equal to 1 has been found or the entire length of the string has been scanned.
POS is set to the position within the bit string of the first non-zero bit; POS is set to zero if no nonzero bit is found.
A string length of 1 to 256 words can be selected. The function passes power flow to the right whenever enable is ON.
_____
| |
(enable)
—| BIT_|—
(ok)
| |
| POS_|
| WORD|
(first word) —|IN Q|—
| LEN |
|00001|
| POS|— (position of non_zero bit or 0)
|_____|
Parameters:
Parameter
enable
IN ok
POS
Q
LEN
Description
When the function is enabled, a bit search operation is performed.
IN contains the first word of the data to be operated on.
The ok output is energized when enable is energized.
The position of the first non-zero bit found, or zero if a non-zero bit is not found.
Output Q is energized if a bit set to 1 is found.
LEN is the number of words in the bit string.
8-18 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
8
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
IN
POS ok
•
•
•
• o
• o
• o
• o
• o o
•
•
•
•
•
•
•
•
•
Q •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function.
o Valid reference for WORD data only; not valid for DWORD.
•
•
•
•
• •
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, if %I00001 is set, the bit string starting at %M00001 is searched until a bit equal to 1 is found, or 6 words have been searched. Coil %Q00001 is turned on. If a bit equal to 1 is found, its location within the bit string is written to %AQ0001 and %Q00002 is turned on.
If %I00001 is set, bit %M00001 is 0, and bit %M00002 is 1, then the value written to %AQ0001 is
2.
| _____
|%I00001 | | %Q00001
|——| |———| BIT_|———————————————————————————————————————————————————————————( )—
| | POS_|
| | WORD| %Q00002
|%M00001—|IN Q|———————————————————————————————————————————————————————————( )—
| | LEN |
| |00006|
| | POS|—%AQ0001
| |_____|
|
GFK-0265J Chapter 8 Bit Operation Functions 8-19
8
MCMP (WORD, DWORD)
The Masked Compare (MCMP) function is used to compare the contents of two bit strings. Input string I1 might contain the states of outputs, such as solenoids or motor starters. Input string I2 might contain their input state feedback, such as limit switches or contacts.
Each scan that power is received, the function begins comparing the bits in the first string with the corresponding bits in the second. Comparison continues until a miscompare is found, or until the end of the string is reached.
The BIT input is used to indicate where the next comparison should start. Ordinarily, this is the same as the number where the last miscompare occurred. Because the bit number of the last miscompare is stored in output BN, the same reference can be used for both BIT and BN. The comparison actually begins 1 bit following BIT; therefore, the initial value of BIT should be 1 less first bit to be compared (for example, zero (0) to begin comparison at %I00001).
If you want to start the next comparison at some other location in the string, you can enter different references for BIT and BN. If the value of BIT is a location that is beyond the end of the string,
BIT is reset reset to the beginning of the input string before starting the next comparison.
The function passes power flow whenever power is received. The other outputs of the function depend on the state of the corresponding mask bit, as described below.
If All Bits in I1 and I2 are the Same
If all corresponding bits in strings I1 and I2 match, the function sets the “miscompare” output MC to 0 and BN to the highest bit number in the input strings. The comparison then stops. On the next invocation of MCMP, it will be reset to 1.
If a Miscompare is Found
When the two bits currently being compared are not the same, the function then checks the correspondingly-numbered bit in string M (the mask). If the mask bit is a 1, the comparison continues until another miscompare or the end of the input strings is reached.
If a miscompare is detected and the corresponding mask bit is a 0, the function:
1
.
Sets the corresponding mask bit to a 1.
2
.
Sets the miscompare (MC) output to 1.
3
.
Updates the output bit string Q to match the new content of mask string M.
4
.
Sets the bit number output (BN) to the number of the miscompared bit (for example, 6).
5
.
Stops the comparison.
8-20 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
_____
| |
(enable)
—|MASK_|—
(ok)
| |
|COMP_|
| WORD|
(input parameter I1) —|I1 MC|— (miscompare)
| LEN |
|00001|
(input parameter I2) —|I2 Q|— (output parameter Q)
| |
| |
(bit string mask) —|M BN|— (bit number for last miscompare)
| |
| |
(bit number) —|BIT |
|_____|
Parameters:
Parameter
enable
I1
I2
M
BIT ok
MC
Q
BN
LEN
Description
Permissive logic to enable the function.
Reference for the first bit string to be compared.
Reference for the second bit string to be compared.
Reference for the bit string mask.
Reference which indicates where the next comparison should start (may be a constant value). The comparison begins 1 bit after BIT. For detailed discussion of this, please read the third paragraph on the preceding page.
The ok output is energized when enable is energized.
User logic to determine if a miscompare has occurred.
Output copy of the mask (M) bit string.
Number of the bit where the latest miscompare occurred.
LEN is the number of words in the bit string.
8
GFK-0265J Chapter 8 Bit Operation Functions 8-21
8
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
I1
I2
M
BIT ok
MC
Q
BN
•
•
•
•
•
• o o o
• o
• o o o
• o
• o o o
• o
• o o o o o†
• o
• o o† o o o
• o
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• o
Valid reference or place where power may flow through the function.
Valid reference for WORD data only; not valid for DWORD.
† %SA, %SB, %SC only; %S cannot be used.
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, whenever %I00001 is set, the function compares the bits represented by the reference VALUES against the bits represented by the reference EXPECT. Comparison begins at the bit number specified in BITNUM. If an unmasked miscompare is detected, the comparison stops. The corresponding bit is set in the mask RESULT. In addition, the output string
NEWVALS is updated with the new value of RESULT, and coil %Q00002 is turned on. Coil
%Q00001 is turned on whenever the function receives power flow.
| _____
|%I00001 | | %Q00001
|——| |———|MASK_|———————————————————————————————————————————————————————————( )—
| |COMP_|
| | WORD| %Q00002
| VALUES—|I1 MC|———————————————————————————————————————————————————————————( )—
| | LEN |
| |00025|
| EXPECT—|I2 Q|—NEWVALS
| | |
| | |
| RESULT—|M BN|—BITNUM
| | |
| | |
| BITNUM—|BIT |
| |_____|
|
8-22 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Chapter
9
Data Move Functions
GFK-0265J
Data move functions provide basic data move capabilities. This chapter describes the following data move functions:
Abbreviation
MOVE
BLKMOV
BLKCLR
SHFR
BITSEQ
SWAP
COMMREQ
VMERD
VMEWRT
VMERMW
VMETST
VME_CFG_RD
VME_CFG_WRT
DATA_INIT
DATA_INIT_COMM
DATA_INIT_ASCII
Function Description Page
Move
Block Move
Block Clear
Shift Register
Bit Sequencer
Copy data as individual bits. The maximum length allowed is 32,767, except for MOVE_BIT which is 256 bits. Data can be moved into a different data type without prior conversion.
Copy a block of seven constants to a specified memory location. The constants are input as part of the function.
Replace the content of a block of data with all zeros. This function can be used to clear an area of bit (%I, %Q, %M,
%G, or %T) or word (%R, %P, %L, %AI, or %AQ) memory. The maximum length allowed is 256 words.
Shift one or more data words into a table. The maximum length allowed is 256 words.
Perform a bit sequence shift through an array of bits. The maximum length allowed is 256 words.
9-2
9-4
9-6
9-8
9-11
Swap Swap two bytes of data within a word, or two words within a double word. The maximum length allowed is 256 words.
9-15
9-17 Communications Request Allow the program to communicate with an intelligent module, such as a Bus Controller, Programmable
Coprocessor Module, or Subnet Module.
VME Read
VME Write
Read data from the VME backplane. The maximum length allowed is 32,767.
Write data to the VME backplane. The maximum length allowed is 32,767.
9-24
9-26
9-28 VME Read/Modify/Write Update a data element using the read/modify/write cycle on the VME bus.
VME Test and Set Handle semaphores on the VME bus.
VME Configuration Read Read the configuration for a VME module.
VME Configuration Write
Data Initialization
Data Initialize
Communications Request
Data Initialize ASCII
Write the configuration to a VME module.
Copy a block of constant data to a reference range.
Initialize a COMMREQ function with a block of constant data. The length should equal the size of the COMMREQ function’s entire command block.
Copy a block of constant ASCII text to a reference range.
The length must be an even number.
9-30
9-33
9-36
9-39
9-42
9-45
9-1
9
MOVE (INT, UINT, DINT, BIT, WORD, DWORD, REAL)
Use the MOVE function to copy data (as individual bits) from one location to another. Because the data is copied in bit format, the new location does not need to be the same data type as the original location.
The MOVE function has two input parameters and two output parameters. When the function receives power flow, it copies data from the input parameter IN to the output parameter Q as bits.
If data is moved from one location in discrete memory to another, (for example, from %I memory to %T memory), the transition information associated with the discrete memory elements is updated to indicate whether or not the MOVE operation caused any discrete memory elements to change state. Data at the input parameter does not change unless there is an overlap in the source destination.
Input IN can be either a reference for the data to be moved or a constant. If a constant is specified, the constant value is placed in the location specified by the output reference. For example, if a constant value of 4 is specified for IN, then 4 is placed in the memory location specified by Q. If the length is greater than 1 and a constant is specified, the constant is placed in the memory location specified by Q and the locations following, up to the length specified. For example, if the constant value 9 is specified for IN and the length is 4, then 9 is placed in the memory location specified by Q and the three locations following.
The LEN operand specifies the number of:
•
Words to be moved for MOVE_INT, MOVE_UINT, and MOVE_WORD.
•
Double words to be moved for MOVE_DINT and MOVE_DWORD.
•
Bits to be moved for MOVE_BIT.
•
Reals to be moved for MOVE_REAL.
The function passes power to the right whenever power is received.
_____
| |
(enable)
—|MOVE_|—
(ok)
| |
| WORD|
| |
(value to be moved) —|IN Q|— (output parameter Q)
| LEN |
|00001|
|_____|
9-2 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
GFK-0265J
9
Parameters:
Parameter
enable
IN ok
Q
LEN
Description
When the function is enabled, the move is performed.
IN contains the value to be moved. For MOVE_BIT, any discrete reference may be used; it does not need to be byte aligned. However, 1 bit, beginning with the reference address specified, is displayed online.
The ok output is energized whenever the function is enabled.
When the move is performed, the value at IN is written to Q. For MOVE_BIT, any discrete reference may be used; it does not need to be byte aligned. However, 1 bit, beginning with the reference address specified, is displayed online.
LEN must be between 1 and 32,767, except for MOVE_BIT, which is between 1 and 256 bits, unless IN is a constant. For MOVE_BIT, when IN is a constant, LEN must be between 1 and 16. The transition references of all bytes in the range are modified.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
IN ok
•
•
• o o o o
∆ o o • • • • •
Q • o o o o † o o • • • •
∆
†
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• o
Valid reference or place where power may flow through the function.
Valid reference for INT, UINT, BIT, or WORD data only; not valid for DINT, DWORD, or REAL.
For MOVE_BIT, discrete user references %I, %Q, %M, and %T need not be byte aligned.
%U is allowed for MOVE_BIT only.
Valid reference for BIT or WORD data only; not valid for INT, UINT, DINT, DWORD, or REAL.
%SA, %SB, %SC only; %S cannot be used.
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In this example, whenever %I00003 is set, the three bits %M00001, %M00002, and %M00003 are moved to %M00100, %M00101, and %M00102, respectively. Coil %Q00001 is turned on.
| _____
|%I00003 | | %Q00001
|——| |———|MOVE_|——————————————————————————————————————————————————————————( )—
| | BIT |
| | |
|%M00001—|IN Q|—%M00100
| | LEN |
| |00003|
| |_____|
|
Chapter 9 Data Move Functions 9-3
9
BLKMOV (INT, UINT, DINT, WORD, DWORD, REAL)
Use the Block Move (BLKMOV) function to copy a block of seven constants to a specified location.
The BLKMOV function has eight input parameters and two output parameters. When the function receives power flow, it copies the constant values into consecutive locations, beginning at the destination specified in output Q. Output Q cannot be the input of another program function.
Note
For BLKMOV_INT, the values of IN1 x IN 7 are displayed as signed decimals.
For BLKMOV_WORD, IN1 x IN7 are displayed in hexadecimal.
The function passes power to the right whenever power is received.
_____
| |
(enable)
—|BLKMV|—
(ok)
| |
| WORD|
| |
(constant value) —|IN1 Q|— (output parameter Q)
| |
| |
(constant value) —|IN2 |
| |
| |
(constant value) —|IN3 |
| |
| |
(constant value) —|IN4 |
| |
| |
(constant value) —|IN5 |
| |
| |
(constant value) —|IN6 |
| |
| |
(constant value) —|IN7 |
|_____|
Parameters:
Parameter Description
enable When the function is enabled the block move is performed.
IN1 - IN7 IN1 through IN7 contain seven constant values.
ok
Q
The ok output is energized whenever the function is enabled.
Output Q contains the first integer of the moved array. IN1 is moved to Q.
9-4 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
9
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
•
IN1-IN7 ok
•
Q o o o o
∆
† o • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• o
∆
†
Valid reference or place where power may flow through the function.
Valid reference for INT, UINT, or WORD only; not valid for DINT, DWORD, or REAL.
Valid reference for WORD data only; not valid for INT, UINT, DINT, DWORD, or REAL.
%SA, %SB, %SC only; %S cannot be used.
• •
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, when the enabling input represented by the nickname FST_SCN is ON, the BLKMOV function copies the seven input constants into memory locations %L00010 through
%L00016.
| _____
|FST_SCN | |
|——| |———|BLKMV|—
| | INT |
| | |
| CONST —|IN1 Q|—%L00010
| +32767 | |
| | |
| CONST —|IN2 |
| _32768 | |
| | |
| CONST —|IN3 |
| +00001 | |
| | |
| CONST —|IN4 |
| +00002 | |
| | |
| CONST —|IN5 |
| +00002 | |
| | |
| CONST —|IN6 |
| +00001 | |
| | |
| CONST —|IN7 |
| +00001 | |
| |_____|
|
GFK-0265J Chapter 9 Data Move Functions 9-5
9
BLKCLR (WORD)
Use the Block Clear (BLKCLR) function to fill a specified block of data with zeros.
The BLKCLR function has two input parameters and one output parameter. When the function receives power flow, it writes zeros into the memory location beginning at the reference specified by IN. When the data to be cleared is from discrete memory (%I, %Q, %M, %G, or %T), the transition information associated with the references is also cleared.
Note
The input parameter IN is not included in coil checking.
The function passes power to the right whenever power is received.
_____
| |
(enable)
—| BLK_|—
(ok)
| |
| CLR_|
| WORD|
(word to be cleared) —|IN |
| LEN |
|00001|
|_____|
Parameters:
Parameter
enable
IN ok
LEN
Description
When the function is enabled, the array is cleared.
IN contains the first word of the array to be cleared.
The ok output is energized whenever the function is enabled.
LEN must be between 1 and 256 words.
9-6 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
9
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
IN ok
•
• • • • •† • • • • •
•
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
•
†
Valid reference or place where power may flow through the function.
%SA, %SB, %SC only; %S cannot be used.
• •
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, at power-up, 32 words of %Q memory (512 points) beginning at
%Q00001 are filled with zeros. The transition information associated with these references will also be cleared.
| _____
|FST_SCN | |
|——| |———| BLK_|—
| | CLR_|
| | WORD|
|%Q00001—|IN |
| | LEN |
| |00032|
| |_____|
|
GFK-0265J Chapter 9 Data Move Functions 9-7
9
SHFR (BIT, WORD, DWORD)
Use the Shift Register (SHFR) function to shift one or more data words or data bits from a reference location into a specified area of memory. For example, one word might be shifted into an area of memory with a specified length of five words. As a result of this shift, another word of data would be shifted out of the end of the memory area.
Note
When assigning reference addresses, overlapping input and output reference address ranges in multi-word functions may produce unexpected results.
The SHFR function has five input parameters and two output parameters. The reset input (R) takes precedence over the function enable input. When the reset is active, all references beginning at the shift register (ST) up to the length specified for LEN, are filled with zeros. LEN determines the length of the shift register.
If the function receives power flow and reset is not active, it shifts data in the shift register down by the number of elements (bit or word) specified in N. The last element in the shift register is shifted into Q. The rightmost element of IN is shifted into the vacated element starting at ST. The contents of the shift register are accessible throughout the program because they are overlaid on absolute locations in logic addressable memory.
The function passes power to the right whenever power is received through the enable logic.
_____
| |
(enable)
—|SHFR_|—
(ok)
| |
| WORD|
| |
(reset) —|R Q|— (output parameter Q)
| LEN |
|00001|
(number of elements) —|N |
| |
| |
(value to be shifted) —|IN |
| |
| |
(first bit or word) —|ST |
|_____|
9-8 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
9
Parameters:
Parameter
enable
R
N
IN
ST ok
Q
LEN
Description
When enable is energized and R is not, the shift is performed.
When R is energized, the shift register located at ST is filled with zeros.
N contains the number of elements to be shifted into the shift register.
IN contains the value to be shifted into the first bit or word of the shift register.
For SHFR_BIT, any discrete reference may be used; it does not need to be byte aligned.
However, 1 bit, beginning with the reference address specified, is displayed online.
ST contains the first bit or word of the shift register. For SHFR_BIT, any discrete reference may be used; it does not need to be byte aligned. However, 16 bits, beginning with the reference address specified, are displayed online.
The ok output is energized whenever the function is enabled.
Output Q contains the bit or word shifted out of the shift register. For SHFR_BIT, any discrete reference may be used; it does not need to be byte aligned. However, 1 bit, beginning with the reference address specified, is displayed online.
LEN must be between 1 and 256 bits, words, or double words.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
R
N
•
•
IN
ST ok
* o o o o o o o o o o† o o
•
•
•
•
•
•
•
•
Q
•
* o o o o o† o o • • • •
* o
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
•
Valid reference or place where power may flow through the function.
Valid reference for WORD or DWORD data only; not valid for BIT.
Valid reference for BIT or WORD data only; not valid for DWORD.
For SHFR_BIT, discrete user references %I, %Q, %M, and %T need not be byte aligned.
† %SA, %SB, %SC only; %S cannot be used.
•
•
•
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
GFK-0265J Chapter 9 Data Move Functions 9-9
9
Example 1:
In the following example, the shift register operates on register memory locations %R00001 through %R00100. When the reset reference CLEAR is active, the shift register words are set to zero.
When the NXT_CYC reference is active and CLEAR is not active, the word from output status table location %Q00033 is shifted into the shift register. The word shifted out of the shift register is stored in output %M00005. Note that, for this example, the length specified for LEN and the amount of data to be shifted (N) are not the same.
| _____
|NXT_CYC | |
|——| |———|SHFR_|—
| | WORD|
| CLEAR | |
|——| |———|R Q|—%M00005
| | LEN |
| |00100|
| CONST —|N |
| 00001 | |
| | |
|%Q00033—|IN |
| | |
| | |
|%R00001—|ST |
| |_____|
|
Example 2:
In this example, the shift register operates on memory locations %M00001 through %M00100.
When the reset reference CLEAR is active, the SHFR function fills %M00001 through %M00100 with zeros.
When NXT_CYC is active and CLEAR is not, the SHFR function shifts the data in %M00001 to
%M00100 down by one bit. The bit in %Q00033 is shifted into %M00001 while the bit shifted out of %M00100 is written to %M00200.
| _____
|NXT_CYC | |
|——| |———|SHFR_|—
| | BIT |
| CLEAR | |
|——| |———|R Q|—%M00200
| | LEN |
| |00100|
| CONST —|N |
| 00001 | |
| | |
|%Q00033—|IN |
| | |
| | |
|%R00001—|ST |
| |_____|
|
9-10 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
9
BITSEQ (BIT)
The Bit Sequencer (BITSEQ) function performs a bit sequence shift through an array of bits. The
BITSEQ function has five input parameters and one output parameter. The operation of the function depends on the previous value of the parameter EN, as shown in the following table.
R Current
Execution
OFF
OFF
OFF
OFF
ON
EN Previous
Execution
OFF
OFF
ON
ON
ON/OFF
EN Current
Execution
OFF
ON
OFF
ON
ON/OFF
Bit Sequencer Execution
Bit sequencer does not execute.
Bit sequencer increments/decrements by 1.
Bit sequencer does not execute.
Bit sequencer does not execute.
Bit sequencer resets.
The reset input (R) overrides the enable (EN) and always resets the sequencer. When R is active, the current step number is set to the value passed in via the step number parameter. If no step number is passed in, step is set to 1. All of the bits in the sequencer are set to 0, except for the bit pointed to by the current step, which is set to 1.
When EN is active and R is not active, the bit pointed to by the current step number is cleared. The current step number is either incremented or decremented, based on the direction parameter. Then, the bit pointed to by the new step number is set to 1.
•
When the step number is being incremented and it goes outside the range of (1
≤
step number
≥
LEN), it is set back to 1.
•
When the step number is being decremented and it goes outside the range of (1
≤
step number
≥
LEN), it is set to LEN.
The parameter ST is optional. If it is not used, the BITSEQ operates as described above, except that no bits are set or cleared. Basically, the BITSEQ then just cycles the current step number through its legal range.
GFK-0265J Chapter 9 Data Move Functions 9-11
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Memory Required for a Bit Sequencer
Each bit sequencer uses three words (registers) of %R, %L, or %P memory to store the following information: current step number length of sequence (in bits) control word word 1 word 2 word 3
Note
Do not write to these registers from other functions.
When you enter a bit sequencer, you must enter an address for the location of these three consecutive words (registers) directly below the graphic representing the function. For example:
_____
| |
(enable)
—| BIT_|—
(ok)
| |
| SEQ |
| |
(reset) —|R |
| LEN |
|00001|
(direction) —|DIR |
| |
| |
(number) —|STEP |
| |
| | this table has no title
(starting address) —|ST |
| |
|_____|
(address)
The control word stores the state of the Boolean inputs and outputs of its associated function block, as shown in the following format:
15 14 13 12 11 10 9 8
7 6 5 4 3 2 1 0
9-12
Note
Bits 0 through 13 are not used.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
9
Parameters:
Parameter Description
address The bit sequencer uses three consecutive words (registers) of %R, %P, or %L memory to store the:
•
•
Current step number = word 1.
Length of sequence in bits = word 2.
• Control word = word 3.
When you enter a bit sequencer, you must enter an address for the location of these three consecutive words (registers) directly below the graphic representing the function. For more information, refer to the preceding page.
Note:
Do not use this address with other instructions.
enable
R
DIR
STEP
ST ok
LEN
Caution:
Overlapping references will result in erratic operation of the bit sequencer.
When the function is enabled, if it was not enabled on the previous sweep and if
R is not energized, the bit sequence shift is performed.
When R is energized, the bit sequencer’s step number is set to the value in STEP (default =
1), and the bit sequencer is filled with zeros, except for the current step number bit.
When DIR is energized, the bit sequencer’s step number is incremented prior to the shift. Otherwise, it is decremented.
When R is energized, the step number is set to this value.
ST contains the first word of the bit sequencer.
The ok output is energized whenever the function is enabled.
LEN must be between 1 and 256 words.
Note
Coil checking for the BITSEQ function checks for 16 bits from the ST parameter, even when LEN is less than 16.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
address
• enable
R
•
•
DIR
•
STEP
ST ok
•
•
•
•
•
•
•
• †
•
•
•
• Valid reference or place where power may flow through the function.
†
%SA, %SB, %SC only; %S cannot be used.
•
•
•
•
•
•
• •
•
•
•
•
• •
•
GFK-0265J Chapter 9 Data Move Functions 9-13
9
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, the sequencer operates on register memory %R00001. Its static data is stored in registers R00004, R00005, and R00006. When CLEAR is active, the sequencer is reset and the current step is set to step number 3. The first 8 bits of %R00001 are set to zero.
When NXT_SEQ is active and CLEAR is not active, the bit for step number 3 is cleared and the bit for step number 2 or 4 (depending on whether DIR is energized) is set.
| _____
|NXT_SEQ | |
|——| |———| BIT_|—
| | SEQ |
| CLEAR | |
|——| |———|R |
| | LEN |
| DIRECT |00008|
|——| |———|DIR |
| | |
| | |
| CONST —|STEP |
| 00003 | |
| | |
|%R00001—|ST |
| |_____|
| %R00004
|
9-14 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
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SWAP (WORD, DWORD)
Use the SWAP function to swap two bytes within a word, or two words within a double word.
The SWAP function can be performed over a range of memory by specifying a length greater than
1 for the function. If this is done, each word or double word of data within the specified length is appropriately swapped.
The SWAP function has two input parameters and two output parameters. When the SWAP function receives power flow, it performs the swap operation on each word or double word of data within the specified area. The results of the swap are stored to output Q.
The SWAP function passes power to the right whenever power is received.
_____
| |
(enable)
—|SWAP_|—
(ok)
| |
| WORD|
| |
(input parameter IN) —|IN Q|— (output parameter Q)
| LEN |
|00001|
|_____|
Parameters:
Parameter
enable
IN ok
Q
LEN
Description
When the function is enabled, the swap is performed.
IN contains the data to be swapped.
The ok output is energized when enable is energized.
Output Q contains the swapped version of the original data IN.
LEN must be between 1 and 256 words.
GFK-0265J Chapter 9 Data Move Functions 9-15
9
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
IN ok
•
•
•
• o o o o o • • • •
Q o o o o o • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• o
Valid reference or place where power may flow through the function.
Valid reference for WORD data only; not valid for DWORD.
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, two bytes located in bits %I00033 through %I00048 are swapped. The result is stored in %L00007.
| _____
| | |
|————————|SWAP_|—
| | WORD|
| | |
|%I00033—|IN Q|—%L00007
| | LEN |
| |00001|
| |_____|
|
9-16 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
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COMMREQ
Use the Communication Request (COMMREQ) function if the program needs to communicate with an intelligent module such as a Bus Controller, Programmable Coprocessor Module, or LAN
Interface Module. The information presented on the following pages shows the format of the
COMMREQ function. You will need additional information to program the COMMREQ for each type of device. Programming requirements for each type of module that uses the COMMREQ function are described in the module’s documentation.
Note
If you are using Serial Communications, refer to the Series 90™ PLC Serial
Communications User’s Manual (GFK-0582). If you are using MMS-Ethernet
Communications, refer to the MMS-Ethernet Communications for the Series
90™-70 PLC User’s Manual (GFK-0686).
As an example of the types of communications that can be requested, the Genius Bus Controller uses the following types of messages:
Command
9
10
11
12
13
14
15
7
8
5
6
3
4
1
2
Description
Pulse test outputs.
Read configuration data from a device on the bus.
Write configuration data to a device on the bus.
Read diagnostics.
Clear circuit fault.
Clear all circuit faults.
Assign monitor.
Enable/disable outputs.
Enable/disable global data.
Switch Bus Switching Module.
Read device.
Write device.
Dequeue datagram.
Read datagram.
Receive datagram.
The Send Datagram and Receive Datagram commands (14 and 15 above) can be used to transmit several additional messages. Refer to the Bus Controller Manual, GFK-0398, for programming information on the bus controller.
Note that devices can also exchange global data with the PLC during the System Communications
Window, which occurs automatically at the end of each sweep. Such communications do not require program assistance.
The COMMREQ function has four input parameters and two output parameters. When the
COMMREQ function receives power flow, a command block of data is sent to the communications
TASK. The command block begins at the reference specified using the parameter IN. The device to be communicated with is indicated by entering its rack and slot number for SYSID.
GFK-0265J Chapter 9 Data Move Functions 9-17
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9-18
The COMMREQ may either send a message and wait for a reply, or send a message and continue without waiting for a reply. If the command block specifies that the program will not wait for a reply, the command block contents are sent to the receiving device and the program execution resumes immediately. (The timeout value is ignored.) This is referred to as
NOWAIT
mode.
If the command block specifies that the program will wait for a reply, the command block contents are sent to the receiving device and the CPU waits for a reply. The maximum length of time the
PLC will wait for the device to respond is specified in the command block. If the device does not respond in that time, program execution resumes. This is referred to as
WAIT
mode.
The function passes power flow, unless the timeout period is exceeded, or if a 0 timeout period has been specified. The Function Faulted (FT) output may be set ON if:
1
.
The specified target module is not present or is faulted..
2
.
The specified task is not valid for the device.
3
.
The data length is 0.
The Function Faulted output may have these states:
Enable
active active not active
Error?
no yes no execution
Function Faulted Output
OFF
ON
OFF
Command Block
The command block provides additional information needed by the COMMREQ function.
The address of the command block is specified for the IN input to the COMMREQ function. This address may be in any word-oriented user reference (%R, %L, %P, %AI, or %AQ). The length of the command block depends on the specific command being sent.
The command block has the following structure:
Data Block Length
Wait/No Wait Flag
Status Pointer Memory Type
Status Pointer Offset
Idle Timeout Value
Maximum Communication Time
Data Block address address + 1 address + 2 address + 3 address + 4 address + 5 address + 6 to address + 133
Information required for the command block can be placed in the designated memory area using the MOV, BLKMOV, or DATA_INIT function block.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
GFK-0265J
9
When entering information for the command block, refer to these definitions:
Data Block
Length
The number of data words starting with th data at address +6 to the end of the command block, inclusive. The data block length ranges from 1 to 128 words.
Each COMMREQ command has its own data block length.. When entering the data block length, you must ensure that the command block fits within the register limits
Wait/No Wait
Flag:
This selects whether or not the program should wait for CCM communications to be completed.
For
No wait
Wait for replay
0
1
Enter
The flag bit is stored in the least significant bit (LSB) at address + 1. The rest of the word should be filled with zeros.
Note
Wait mode COMMREQs cannot be directed to serial ports 1 and 2 on release 7.0
or later CPX CPUs.
Status Pointer
Memory
Type:
The two status pointer words specify a PLC memory location where the status word returned by the device will be written when the COMMREQ completes.
Status Pointer Memory Type
Status Pointer Offset address + 2 address + 3
Status pointer memory type contains a numeric code that specifies the user reference memory type for the status word. The table below shows the code for each reference type:
For This Memory Type Enter This Value *
%I Discrete input table (
BIT
mode)
%Q Discrete output table (
BIT
mode)
%I Discrete input table (
BYTE
mode)
%Q Discrete output table (
BYTE
mode)
%R Register memory
%AI Analog input table
%AQ Analog output table
70
72
16
18
8
10
12
* Numbers shown are decimal.
Note
The value entered determines the mode. For example, if you enter the %I bit mode is 70, then the offset will be viewed as that bit. On the other hand, if the
%I value is 16, then the offset will be viewed as that byte.
The high byte at address + 2 should contain zero.
Status Pointer
Offset:
The word at address + 3 contains the offset for the status word within the selected memory type.
Chapter 9 Data Move Functions 9-19
9
Note
The status pointer offset is a zero-based value. %R00001, for example, is at offset zero in the register table.
Idle Timeout
Value:
Maximum
Communication Time:
The idle timeout value is the maximum time the PLC CPU waits for the device to acknowledge receipt of the COMMREQ. This value is ignored in
NOWAIT
mode. If
WAIT
mode is selected, address + 4 specifies the idle timeout period in 100-microsecond increments.
The value at address +5 specifies the maximum time the PLC CPU waits for the device to complete the COMMREQ. This time is also specified in 100microsecond increments and is ignored in
NOWAIT
mode.
Data Block
The data block contains the parameters of the command. The data block begins with a command number in address + 6, which identifies the type of communications function to be performed.
Refer to the specific device manual (i.e., PCM, GBC, Communications) for specific COMMREQ command formats.
_____
| |
(enable)
—|COMM_|—
(ok)
| |
| REQ |
| |
(first word of Command block) —|IN FT|—
| |
(rack/slot number) —|SYSID|
| |
(task ID) —|TASK |
|_____|
Parameters:
Parameter
enable
IN
SYSID
TASK
FT
Description
When the function is energized, the communications request is performed.
IN contains the first word of the command block.
SYSID contains the rack number (most significant byte) and slot number
(least significant byte) of the target device.
TASK contains the task ID of the process on the target device.
FT is energized when the communication request fails. This was previously discussed in greater detail on page -92.
9-20 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
9
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
•
IN
SYSID
TASK ok
FT
•
•
• • • • •
•
•
•
•
•
•
•
•
•
•
•
•
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function.
•
•
•
•
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example 1:
In the following example, when enabling input %M00020 is ON, a command block located starting at %R00016 is sent to communications task 1 in the device located at rack 1, slot 2 of the PLC. If an error occurs, %Q00100 is set.
| _____
|%M00020 | |
|——| |———|COMM_|—
| | REQ |
| | | %Q00100
|%R00016—|IN FT|———————————————————————————————————————————————————————————( )—
| | |
| | |
| CONST —|SYSID|
| 0102 | |
| | |
| CONST —|TASK |
| 00001 |_____|
|
GFK-0265J Chapter 9 Data Move Functions 9-21
9
Example 2:
This example shows how the MOVE function can be used to enter command block contents for the
COMMREQ described in example 1:
| _____ _____ _____
|FST_SCN | | | | | |
|——| |——————————|MOVE_|—————————————————|MOVE_|—————————————————|MOVE_|
| | | UINT| | UINT| | UINT|
| | | | | | | |
| |CONST —|IN Q|—%R00016 CONST —|IN Q|—%R00017 CONST —|IN Q|—%R00018
| |00100 | LEN | 00001 | LEN | 00008 | LEN |
| | |00001| |00001| |00001|
| | |_____| |_____| |_____|
| | _____ _____ _____
| | | | | | | |
| ———————|MOVE_|—————————————————|MOVE_|—————————————————|MOVE_|—
| | UINT| | UNIT| | UNIT|
| | | | | | |
| CONST —|IN Q|—%R00019 CONST —|IN Q|—%R00020 CONST —|IN Q|—%R00021
| 00512 | LEN | 00100 | LEN | 00200 | LEN |
| |00001| |00001| |00001|
| |_____| |_____| |_____|
|
| _____
|%M00020 | |
|——| |———|COMM_|—
| | REQ |
| | | %Q00100
|%R00016—|IN FT|———————————————————————————————————————————————————————————( )—
| | |
| | |
| CONST —|SYSID|
| 0102 | |
| | |
| CONST —|TASK |
| 00001 |_____|
|
Input IN of the COMMREQ specifies %R00016 as the beginning reference for the command block. Successive references contain the following:
Data Block Length
Wait/No Wait Flag
Status Pointer Memory Type
Status Pointer Offset
Idle Timeout Value
Maximum Communication Time
Data Block
%R00016
%R00017
%R00018
%R00019
%R00020
%R00021
%R00022 to end of data
9-22 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
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MOVE functions supply the following command block data for the COMMREQ. The first MOVE function places the length of the data being communicated in %R00016. The second MOVE function places the constant 1 in %R00017. This specifies
WAIT
mode.
The third MOVE function places the constant 8 in %R00018. This specifies the register table as the location for the status pointer. The next MOVE function places the constant 512 in reference
%R00019. Therefore, the status pointer is located at %R00513. Additional MOVE functions place the constant 100 in %R00020 and 200 in %R00021. 100 is an idle timeout value of 10 milliseconds for the COMMREQ; 200 represents the maximum communications time of 20 milliseconds.
The programming logic displayed in example 2 on the previous page can be simplified by replacing the six MOVE functions with one DATA_INIT_COMM function.
| _____
|FST_SCN | | %Q00002 |——
|——| |———|DATA_|———————————————————————————————————————————————————————————( )—
| |INIT—|
| | COMM|
| | Q|—%R00016
| | LEN |
| |00134|
| |_____|
|
|
| _____
|%M00020 | |
|——| |———|COMM_|—
| | REQ |
| | | %Q00100
|%R00016—|IN FT|———————————————————————————————————————————————————————————( )—
| | |
| | |
| CONST —|SYSID|
| 0012 | |
| | |
| CONST —|TASK |
| 00001 |_____|
|
In Logicmaster, position the cursor on the DATA_INIT_COMM function block, and press
Zoom (F10) to zoom into the DATA_INIT_COMM window.
GFK-0265J Chapter 9 Data Move Functions 9-23
9
VMERD (BYTE, WORD)
The VME Read (VMERD) function is used to read data from the VME bus.
Note
Using a VME function (VMERD, VMEWRT, VMERMW, or VMETST) requires additional information on the correct way to address the VME board.
This information may be obtained from one of two sources. For a qualified VME board, the VME board vendor may issue application notes on the correct use of the board. Otherwise, refer to the Guidelines for the Selection of Third-Party
VME Modules, GFK-0448.
The VMERD function has three input parameters and one output parameter. When the VMERD function receives power flow, the function accesses the VME module at the address specified by
ADR and the address modifier AM. It copies data with the length LEN to PLC locations beginning at output Q. The VMERD function passes power to the right when its operation is successful.
_____
| |
(enable)
—| VME_|—
(ok)
| |
| RD_|
| WORD|
(address modifier) —|AM |
| LEN |
|00001|
(data address) —|ADR Q|— (output parameter Q)
|_____|
Parameters:
Parameter
enable
AM
ADR ok
Q
LEN
Description
When enable is energized, the VME read is performed.
AM contains the address modifier.
ADR contains the address of the data to be read.
The ok output is energized when the function is enabled and the data is successfully read.
Output Q contains the data read from the address specified by ADR and AM.
LEN may be 1 to 32,767.
9-24 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
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Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
AM
ADR ok
Q
•
•
•
• o
•
•
•
•
•
•
•
• o o o o o • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• o
Valid reference or place where power may flow through the function.
Valid reference for BYTE data only; not valid for WORD.
•
•
•
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, when enabling input %I01001 goes ON, 256 bytes of short supervisory space are read from address 3800 on the VME bus into registers %R00001 through %R00128. (In a multiple rack system with a BTM, this would be on rack 4.) Unless an error occurs while reading the data, coil %Q00001 is set ON.
| _____
| %I01001 | | %Q00001
|———|
↑
|—————| VME_|————————————————————————————————————————————————————( )—
| | RD_|
| | BYTE|
| CONST —|AM |
| 0013 | LEN |
| |00256|
| CONST —|ADR Q|—%R00001
| 00003800 |_____|
|
GFK-0265J Chapter 9 Data Move Functions 9-25
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VMEWRT (BYTE, WORD)
The VME Write (VMEWRT) function is used to write data to the VME bus.
Note
Using a VME function (VMERD, VMEWRT, VMERMW, or VMETST) requires additional information on the correct way to address the VME board.
This information may be obtained from one of two sources. For a qualified VME board, the VME board vendor may issue application notes on the correct use of the board. Otherwise, refer to the Guidelines for the Selection of Third-Party
VME Modules, GFK-0448.
The VMEWRT function has four input parameters and one output parameter. When the
VMEWRT function receives power flow, the function copies the data from the input parameter IN to the VME module at the address specified in ADR and the address modifier AM. The VMEWRT function passes power to the right to indicate a successful transfer of data.
_____
| |
(enable)
—| VME_|—
(ok)
| |
| WRT_|
| WORD|
(input parameter IN) —|IN |
| LEN |
|00001|
(address modifier) —|AM |
| |
| |
(data address) —|ADR |
|_____|
Parameters:
Parameter
enable
IN
AM
ADR
LEN
Description
When enable is energized, the VME write is performed.
IN contains the data to be written to the address specified by ADR and AM.
AM contains the address modifier.
ADR contains the address where the data is to be written.
LEN may be 1 to 32,767.
9-26 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
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Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
IN
AM
ADR ok
•
•
•
•
• o
• o
• o
• o
• o
•
•
•
•
•
•
•
•
•
•
•
•
•
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• o
Valid reference or place where power may flow through the function.
Valid reference for BYTE data only; not valid for WORD.
•
•
•
•
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, when enabling input %I00001 is ON, the hexadecimal value FFFF is written to each of 20 words on the VME bus, the first (lowest address) being specified by the content of %R00019 (low word) and %R00020 (high word). Unless an error occurs while writing the data, internal reference %M00055 is set ON.
| _____
|%I00001 | | %M00055
|——| |———| VME_|———————————————————————————————————————————————————————————( )—
| | WRT_|
| | WORD|
| CONST —|IN |
| FFFF | LEN |
| |00020|
| CONST —|AM |
| 00039 | |
| | |
|%R00019—|ADR |
| |_____|
|
GFK-0265J Chapter 9 Data Move Functions 9-27
9-28
9
VMERMW (BYTE, WORD)
The VME Read/Modify/Write (VMERMW) function is used to update a data element on the VME bus.
Note
Using a VME function (VMERD, VMEWRT, VMERMW, or VMETST) requires additional information on the correct way to address the VME board.
This information may be obtained from one of two sources. For a qualified VME board, the VME board vendor may issue application notes on the correct use of the board. Otherwise, refer to the Guidelines for the Selection of Third-Party
VME Modules, GFK-0448.
The VMERMW function has five input parameters and one output parameter. When the
VMERMW function receives power flow, the function reads the data from the board at the address specified by ADR and address modifier AM. This byte or word of data is combined (AND/OR) with the data mask MSK. Selection of AND or OR is made using the OP input. MSK is a word value. If byte data is operated on, only the lower 8 bits of MSK are used.
The result is then written back to the same VME address from which it was read. The VMERMW function passes power flow to the right whenever power is received unless an error occurs.
_____
| |
(enable)
—| VME_|—
(ok)
| |
| RMW_|
| WORD|
(VME operation) —|OP |
| |
| |
(data mask) —|MSK |
| |
| |
(address modifier) —|AM |
| |
| |
(data address) —|ADR |
|_____|
Parameters:
Parameter
enable
OP
MSK
AM ok
Description
When enable is energized, the VME function is performed.
OP specifies whether data is to be ANDed or ORed with the MSK data.
MSK contains the data mask.
AM contains the address modifier.
The ok output is energized whenever the function is enabled and performed without error.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
9
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
•
OP
MSK
AM
ADR ok
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function.
•
•
•
•
•
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, when enabling input %M00044 is ON, the hexadecimal value 80H is
ORed with the byte of data read from address 060010H on the VME bus in rack 0 (the main rack) using Standard Non-Privileged Data Access. Unless an error occurs while accessing the data, coil
%Q00027 is set ON.
| _____
|%M00044 | | %Q00027
|——| |———| VME_|———————————————————————————————————————————————————————————( )—
| | RMW_|
| | BYTE|
| CONST —|OP |
| 00001 | |
| | |
| CONST —|MSK |
| 00080 | |
| | |
| CONST —|AM |
| 00039 | |
| | |
| CONST —|ADR |
|00060010|_____|
|
GFK-0265J Chapter 9 Data Move Functions 9-29
9
VMETST (BYTE, WORD)
Use the VME Test and Set (VMETST) function to handle semaphores on the VME bus. The
VMETST function exchanges a Boolean ON (1) for the value currently at the semaphore location.
If that value was already ON, then the VMETST function does not obtain the semaphore. If the existing value was OFF, then the semaphore is reset and the VMETST function has the semaphore and the use of the memory area it controls. The semaphore is cleared using the VMEWRT function to write a 0 to the semaphore location.
Note
Using a VME function (VMERD, VMEWRT, VMERMW, or VMETST) requires additional information on the correct way to address the VME board.
This information may be obtained from one of two sources. For a qualified VME board, the VME board vendor may issue application notes on the correct use of the board. Otherwise, refer to the Guidelines for the Selection of Third-Party
VME Modules, GFK-0448.
The VMETST function has three input parameters and two output parameters. When the VMETST function receives power flow, a Boolean ON is exchanged with the data at the address specified by
ADR using the address modifier specified by AM. The VMETST function sets the Q output to ON if the semaphore was available (OFF) and was acquired. The function passes power flow to the right whenever power is received and no error occurs during execution.
_____
| |
(enable)
—| VME_|—
(ok)
| |
| TS_ |
| WORD|
(address modifier) —|AM Q|—
| |
| |
(address) —|ADR |
|_____|
9-30 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
9
Parameters:
Parameter
enable
AM
ADR ok
Q
Description
When enable is energized, the VME test and set is performed.
AM contains the address modifier.
ADR contains the address of the semaphore.
The ok output is energized when the function is enabled and performed without error.
Output Q is set ON if the semaphore was available (OFF). Otherwise, Q is set OFF.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
•
AM
ADR ok
Q
•
•
•
•
•
•
•
•
•
•
•
•
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function.
•
•
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
GFK-0265J Chapter 9 Data Move Functions 9-31
9
Example:
In the following example, the VMERD, VMEWRT, and VMETST functions are used to read data protected by a semaphore. When enabling input %M00047 is ON, the VMETST function is executed to obtain the semaphore. The semaphore VME address is stored in %R00041 and
%R00042 using Standard Non-Privileged Data Access. When this is successful, coil %M00047 is reset and coil %M00048 is set. When %M00048 is set, the VMERD function reads the data (20 words of data whose VME address is stored in %R00043 and %R00044, data read into %R00200 through %R00219). When the read is successful (something is broken or not programmed correctly - if it is not), the VMTWRT function relinquishes the semaphore. Coil %M00048 is reset when the VMEWRT is successful. %M00049 is set to indicate that fresh data is now available.
If the semaphore is not available, VMERD and VMEWRT are not executed. The effect is that setting %M00047 causes the PLC to check the semaphore each sweep until the semaphore is available. When it becomes available, the semaphore is acquired, the data is read, and the semaphore is relinquished. No further action is taken until %M00047 is set again.
| _____
|%M00047 | |
|——| |———| VME_|—
| | TS_ |
| | BYTE|
| CONST —|AM Q|——————————————————————————————————————————————————————————(RM)—
| 0039 | | |
| | | | %M00048
|%R00041—|ADR | ————————————————————————————————————————————————————(SM)—
| |_____|
|
| _____ _____
|%M00048 | | | | %M00048 |——
|——| |———| VME_|—————————————————| VME_|——————————————————————————————————(RM)—
| | RD _| | WRT_| |
| | WORD| | BYTE| | %M00049 | |
| CONST —|AM | CONST —|IN | ————————————————————————————————(SM)—
| 0039 | LEN | 0000 | LEN |
| |00020| |00001|
|%R00043—|ADR Q|—%R00200 CONST —|AM |
| |_____| 0039 | |
| | |
| %R00041—|ADR |
| |_____|
9-32 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
9
VME_CFG_RD
Use the VME_CFG_RD function to read data from the VME bus. The VME_CFG_RD function has five input parameters and three output parameters. When the function receives power, the data elements (N) are read from the VME bus at the location defined by rack (R), slot (S), and dual port offset (OFF). The data read is placed in output Q. The status of the operation is placed in the status word output (ST). The function has a length specification (LEN) of the maximum size of the output array.
Note
The module at the specified rack and slot must be configured as a third-party
VME module in BUS INTERFACE mode for this function block to execute successfully. Additional parameters indicating the AM code, the location and size of the module’s dual port, and the bus interface type must be specified in the module’s configuration for correct operation. See chapter 11 of the Logicmaster
90-70 Programming Software User’s Manual (GFK-0263) for more information on configuration of third-party VME modules.
If the function is completed successfully, ok is set ON; otherwise, it is set OFF. It is also set OFF when:
•
The number of data elements (N) is greater than the length (LEN) specified.
•
The rack/slot value (R and S) is out of range or is not a valid VME location.
•
The most significant byte of the dual port offset (OFF) is not zero.
•
The most significant byte of the dual port address plus the dual port offset is not zero.
•
Read beyond the end of dual port memory.
•
Specified rack/slot not configured for a Third-Party VME module in
BUS INTERFACE
mode.
•
If the dual port offset is an even number, configure for the odd byte only. If the dual port offset is an odd number, configure for word or single word.
_____
| |
(enable)
—| VME_|—
(ok)
| |
| CFG_|
| READ|
(rack number) —|R ST|— (status word)
| LEN |
|00001|
(slot number) —|S Q|— (output parameter Q)
| |
| |
(dual port offset) —|OFF |
| |
| |
(data elements) —|N |
|_____|
GFK-0265J Chapter 9 Data Move Functions 9-33
9
Parameters:
Parameter
enable
R
S
OFF
N ok
ST
Q
LEN
Description
When the function is enabled, the data initialization is performed.
The rack number is specified in R.
The slot number is specified in S.
OFF specifies the dual port offset.
N contains the amount of data (data elements) to be read from the VME bus.
The ok output is energized when the function is performed without error.
The status word contains the status of the operation.
When the function is performed, the data is read to array Q.
LEN is the length of the output array in bytes.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
R
S
OFF
N ok
ST
Q
•
†
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
†
•
•
•
•
•
•
•
•
•
%SA, %SB, %SC only; %S cannot be used.
Note
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
• • • • † • • • • • •
Valid reference or place where power may flow through the function
•
•
•
•
•
•
•
•
•
•
•
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
9-34 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Example:
In the following example, when enable is ON, VME data at rack 1, slot 3 and dual port offset defined by %R00100 is read into %R00101 through %R00110 of the array %R00101 through
%R00116. If an error was encountered, the status word %AQ0001 will contain an error code.
| _____
|%I00001 | |
|——| |———| VME_|—
| | CFG_|
| | READ|
| CONST —|R ST|—%AQ0001
| 00001 | LEN |
| |00016|
| CONST —|S Q|—%R00101
| 00003 | |
| | |
|%R00100—|OFF |
| | |
| | |
| CONST —|N |
| 00010 |_____|
|
9
GFK-0265J Chapter 9 Data Move Functions 9-35
9-36
9
VME_CFG_WRITE
Use the VME_CONFIG_WRITE function to write data from the VME bus. The VME_CFG_WRT function has six input parameters and two output parameters. When the function receives power, the data elements (N) are written from the data array (IN) to the VME bus at the location defined by rack (R), slot (S), and dual port offset (OFF). The status of the operation is placed in the status word output (ST). The function has a length specification (LEN) of the maximum size of the output array.
Note
The module at the specified rack and slot must be configured as a third-party
VME module in BUS INTERFACE mode for this function block to execute successfully. Additional parameters indicating the AM code, the location and size of the module’s dual port, and the bus interface type must be specified in the module’s configuration for correct operation. See chapter 11 of the Logicmaster
90-70 Programming Software User’s Manual (GFK-0263) for more information on configuration of third-party VME modules.
If the function is completed successfully, ok is set ON; otherwise, it is set OFF. It is also set OFF when:
•
The number of data elements (N) is greater than the length (LEN) specified.
•
The rack/slot value (R and S) is out of range or is not a valid VME location.
•
The most significant byte of the dual port offset (OFF) is not zero.
•
The most significant byte of the dual port address plus the dual port offset is not zero.
•
Read beyond the end of dual port memory.
•
Specified rack/slot not configured for a Third-Party VME module in
BUS INTERFACE
mode.
•
If the dual port offset is an even number, configure for the odd byte only. If the dual port offset is an odd number, configure for word or single word.
_____
| |
(enable)
—| VME_|—
(ok)
| |
| CFG_|
|WRITE|
(input parameter IN) —|IN ST|— (status word)
| LEN |
|00001|
(rack number) —|R |
| |
| |
(slot number) —|S |
| |
| |
(dual port offset) —|OFF |
| |
| |
(data elements) —|N |
|_____|
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
9
Parameters:
Parameter
enable
IN
R
S
OFF
N ok
ST
LEN
Description
When the function is enabled, the data initialization is performed.
IN contains the data to be written to the VME bus at the location defined by rack (R), slot (S), and dual port offset (OFF).
The rack number is specified in R.
The slot number is specified in S.
OFF specifies the dual port offset.
N contains the amount of data (data elements) to be written to the VME bus.
The ok output is energized when the function is performed without error.
The status word contains the status of the operation.
LEN is the length of the input array in bytes.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
•
† enable
•
IN
R
S
OFF
N ok
ST
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
• • • • † •
Valid reference or place where power may flow through the function
%SA, %SB, %SC only; %S cannot be used.
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
GFK-0265J Chapter 9 Data Move Functions 9-37
9
Example:
In the following example, when enable is ON, data from %R00101 through %R00110 of the array
%R00101 through %R00116 is written to the VME bus at rack 1, slot 3 and dual port offset defined by %R00100. If an error was encountered, the status word %AQ0001 will contain an error code.
| _____
|%I00001 | |
|——| |———| VME_|—
| | CFG_|
| |WRITE|
|%R00101—|IN ST|—%AQ00001
| | LEN |
| |00016|
| CONST —|R |
| 00001 | |
| | |
| CONST —|S |
| 00003 | |
| | |
|%R00100—|OFF |
| | |
| CONST —|N |
| 00010 |_____|
|
9-38 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
DATA_INIT (INT, UINT, DINT, WORD, DWORD, REAL)
Use the Data Initialization (DATA_INIT) function to copy a block of constant data to a reference range.
The DATA_INIT function has one input parameter and two output parameters. When the function receives power flow, it copies the constant data to output Q. The function’s constant data length
(LEN) specifies how much constant data of the function type is copied to consecutive reference addresses starting at output Q.
Note
The output parameter is not included in coil checking.
The function passes power to the right whenever power is received.
_____
| |
(enable)
—|DATA_|—
(ok)
| |
|INIT_|
| WORD|
| Q|— (output parameter Q)
| LEN |
| |
|00001|
|_____|
Note
When the DATA_INIT instruction is first programmed, the constant data is initialized to zeroes. The constant data may be changed by zooming into the function (see below for details).
Parameters:
Parameter
enable ok
Q
LEN
Description
When the function is enabled, the data initialization is performed.
The ok output is energized whenever the function is enabled.
When the data initialization is performed, the constant data is written to Q.
LEN specifies how much constant data is copied to consecutive reference addresses starting at output Q.
9
GFK-0265J Chapter 9 Data Move Functions 9-39
9
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable ok
Q
•
• o o o o o • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• o
Valid reference or place where power may flow through the function.
Valid reference for INT, UINT, or WORD data only..
• •
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, on the first scan (FST_SCN) 100 words of initial data is copied to
%R00005 through %R00104.
| _____
|FST_SCN | |
|——| |———|DATA_|—
| |INIT—|
| | INT |
| | Q|—%R00005
| | LEN |
| |00100|
| |_____|
|
9-40 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
9
Zooming into the DATA_INIT_type Function Block
In Logicmaster, press Zoom (F10) to zoom into the DATA_INIT_type function block.
The DATA_INIT_type window contains a New Value field which functions as a mini command line, an Element field which indicates which data element the cursor is currently positioned on, a
Length field which tells how many elements the DATA_INIT_type instruction contains, and the block of constant data. The Element and Length fields cannot be edited.
To change a value, position the cursor on the element to be changed, and enter the new value in the
New Value field.
To help you position the cursor, the window contains starting element line labels to the left of the data block. The Element field will contain the element number the cursor is currently positioned on.
The data block portion of the window will scroll and page down.
GFK-0265J Chapter 9 Data Move Functions 9-41
9
DATA_INIT_COMM
Use the Data Initialize Communications Request (DATA_INIT_COMM) function to initialize a
COMMREQ function with a block of constant data. The IN parameter of the COMMREQ must correspond with output Q of this DATA_INIT_COMM function.
The DATA_INIT_COMM function has one input parameter and two output parameters. When the function receives power flow, it copies the constant data to output Q. The function’s constant data length (LEN) specifies how many words of constant data are to be copied to consecutive reference addresses starting at output Q. The length should be equal to the size of the COMMREQ function’s entire command block.
Note
The output parameter is not included in coil checking.
The function passes power to the right whenever power is received.
_____
| |
(enable)
—|DATA_|—
(ok)
| |
|INIT_|
| COMM|
| Q|— (output parameter Q)
| LEN |
|00001|
|_____|
Note
When the DATA_INIT instruction is first programmed, the constant data is initialized to zeroes. The constant data may be changed by zooming into the function (see below for details).
Parameters:
Parameter
enable ok
Q
LEN
Description
When the function is enabled, the data initialization is performed.
The ok output is energized whenever the function is enabled.
When the data initialization is performed, the constant data is written to Q.
LEN specifies how many words of constant data are to be copied to consecutive reference addresses starting at output Q. LEN must equal the size of the
COMMREQ function’s entire command block.
9-42 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
9
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable ok
Q
•
•
• • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
•
Valid reference or place where power may flow through the function.
• •
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, on the first scan (FST_SCN) a command block consisting of 100 words of data and 6 words of header is copied to %P00001 through %P00099; and %Q00002 will receive power.
| _____
|FST_SCN | | %Q00002
|——| |———|DATA_|———————————————————————————————————————————————————————————( )—
| |INIT—|
| | COMM|
| | Q|—%P00001
| | LEN |
| |00100|
| |_____|
|
GFK-0265J Chapter 9 Data Move Functions 9-43
9
Zooming into the DATA_INIT_COMM Function Block
In Logicmaster, press Zoom (
F10
) to zoom into the DATA_INIT_COMM function block.
The DATA_INIT_COMM window contains a New Value field for entering values and a Data
Element field, which indicates which data element in the data block the cursor is currently positioned on. Only the Data Element field cannot be changed.
The window also contains the first six words of the COMMREQ command block, with labels consistent with each word’s use and the COMMREQ data block. The first six words are Data
Length, Wait flag, Timeout, Status Memory, Status Offset, and Max comm time.
The line labels to the left of the data block elements and the Data Element field will correspond to the data block portion of the COMMREQ block. For example, the data block elements will be labeled beginning with number 1 even though the data block begins at the seventh word of the instruction.
The data block portion of the window will scroll and page down.
Note
The data block information is in hexadecimal.
9-44 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
9
DATA_INIT_ASCII
Use the Data Initialize ASCII (DATA_INIT_ASCII) function to copy a block of constant ASCII text to a reference range.
The DATA_INIT_ASCII function has one input parameter and two output parameters. When the function receives power flow, it copies the constant data to output Q. The function’s constant data length (LEN) specifies how many bytes of constant text are copied to consecutive reference addresses starting at output Q. LEN must be an even number.
Note
The output parameter is not included in coil checking.
The function passes power to the right whenever power is received.
_____
| |
(enable)
—|DATA_|—
(ok)
| |
|INIT_|
|ASCII|
| Q|— (output parameter Q)
| LEN |
|00001|
|_____|
Note
When the DATA_INIT instruction is first programmed, the constant data is initialized to blanks. The constant data may be changed by zooming into the function (see below for details).
Parameters:
Parameter
enable ok
Q
LEN
Description
When the function is enabled, the data initialization is performed.
The ok output is energized whenever the function is enabled.
When the data initialization is performed, the constant data is written to Q.
LEN specifies how many bytes of constant text are copied to consecutive reference addresses starting at output Q. LEN must be an even number.
GFK-0265J Chapter 9 Data Move Functions 9-45
9-46
9
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
• ok •
Q • • • • • • • • •
Note Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function.
• •
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, on the first scan (FST_SCN) the decimal equivalent of 100 bytes of
ASCII text is copied to %R00050 through %R00149; and %Q00002 will receive power.
| _____
|FST_SCN | | %Q00002
|——| |———|DATA_|———————————————————————————————————————————————————————————( )—
| |INIT_|
| |ASCII|
| | Q|—%R00050
| | LEN |
| |00100|
| |_____|
|
Zooming into the DATA_INIT_ASCII Function Block
In Logicmaster, press Zoom (F10) to zoom into the DATA_INIT_ASCII function block.
The DATA_INIT_ASCII window contains a mini command line, a Function Len field which indicates how many character bytes the instruction contains, an Element No. field which indicates which character byte the cursor is currently positioned on, and the block of ASCII text.
ASCII text is entered by positioning the cursor on the starting byte and typing a quotation mark ( “
) followed by the desired string on the mini command line
(e.g., “This is a test). (Refer to the example on the next page.)
You can enter as many characters as will fit on the command line at one time. Enter non-printable characters with a backslash immediately followed by the 3-digit decimal equivalent of the character
(e.g., ”\010 for line feed).
After entering the text on the command line, press the Enter key.
Press the Escape key to exit this window and return to the ladder diagram logic display.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
9
DATA_INIT_DLAN
The DATA Initialize DLAN (DATA_INIT_DLAN) function is for use with a DLAN system which is a limited availability, specialty system. If you have a DLAN system, refer to the Series 90™-70
DLAN/DLAN+ Interface Module User's Manual (GFK-0729B) for details.
Note
This module is not available as a general purchase item.
GFK-0265J Chapter 9 Data Move Functions 9-47
Chapter
10
Data Table Functions
Data tables provide automatic data move capabilities. The data table functions are used to enter values into or copy values out of a table. To use these functions properly, the program must include other logic to move data through the tables and to initialize table pointers.
Moving Values In and Out of a Table
All of the table write functions fill a table with values that are read from a specified reference location. Similarly, all of the table read functions copy values from a table to a specified reference location.
bl
reference
f
WRITE FUNCTION table table
READ FUNCTION
reference f
One value is written or read each time these functions are called. Other logic in the program must be used to place new values in the reference for a write function, or to capture values from the reference after a read function.
Initializing the Table Pointer
The read and write functions keep track of the current table location by means of a pointer.
Additional program logic must be used to initialize this value so that the function will begin reading or writing the table at the correct location. Normally, the value in this reference is initialized to zero.
GFK-0265J 10-1
10
10-2
This chapter describes the following data table functions.
Abbreviation
TBLRD
TBLWR
LIFORD
LIFOWRT
FIFORD
FIFOWRT
SORT
ARRAY_MOVE
SRCH_EQ
SRCH_NE
SRCH_GT
SRCH_GE
SRCH_LT
SRCH_LE
ARRAY_RANGE
Function Description Page
Table Read
Table Write
LIFO Read
LIFO Write
FIFO Read
Copy a value from a specified table location to an output reference.
Copy a value from an input reference to a specified table location.
Remove the entry at the pointer location, and decrement the pointer by one. LIFORD is used in conjunction with LIFOWRT (see below).
Increment the table pointer and write data to the table.
LIFOWRT is used in conjunction with
LIFORD (see above).
Remove the entry at the bottom of the table, and decrement the pointer by one. FIFORD is used in conjunction with FIFOWRT (see below).
10-3
10-5
10-7
10-9
10-11
FIFO Write
Sort
Array Move
Increment the table pointer and write data to the table.
FIFOWRT is used in conjunction with
FIFORD (see above).
Sort an array in ascending order.
Copy a specified number of data elements from a source array to a destination array.
10-13
10-15
10-17
Search Equal Search for all array values equal to a specified value.
10-21
Search Not Equal Search for all array values not equal to a specified value.
10-21
Search Greater
Than
Search Greater
Than or Equal
Array Range
Search for all array values greater than a specified value.
Search for all array values greater than or equal to a specified value.
Search Less Than Search for all array values less than a specified value.
Search Less Than or Equal
Search for all array values less than or equal to a specified value.
Determine if a value is between the range specified in two tables.
10-21
10-21
10-21
10-21
10-24
All values in the table must be the same type, which may be signed integer (INT), double precision signed integer (DINT), unsigned integer (UINT), word (WORD), or double word (DWORD). The
BYTE data type is available for SRCH_EQ, SRCH_NE, SRCH_GT, SRCH_LT, SRCH_GE,
SRCH_LE, and ARRAY_MOVE; and BIT is also available for ARRAY_MOVE.
Note
No REAL data type exists for the data table functions; however, the DWORD data type may be used to manipulate real data.
The maximum length allowed for each data table function is 32,767 elements, except for the SORT function which is restricted to 64 elements.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
TBLRD (INT, UINT, DINT, WORD, DWORD)
The Table Read (TBLRD) function is used to sequentially read values in a table which never becomes full. When the pointer reaches the end of the table, it automatically wraps around to the beginning of the table.
i bl i
table
pointer
10
1
.
The function increments the pointer by one.
2
.
The function copies data indicated by the pointer to output parameter Q. Additional program logic must then be used to capture the data from the output reference.
3
.
Steps 1 and 2 are repeated each time the instruction is executed, until the table is empty (PTR
= LEN).
4
.
When the table is full, the pointer wraps around to the beginning of the table.
Note
TBLRD and TBLWRT functions can operate on the same or different tables. By specifying a different reference for the pointer, these functions can access the same data table at different locations or at different rates.
The TBLRD function has three input parameters and three output parameters. When the function receives power flow, the pointer (PTR) increments by one. If this new pointer location is the last item in the table, the output EM is set ON. The next time the function executes, the pointer will automatically be set back to 1. After the pointer is incremented, the content at the new pointer location is copied to output Q.
The function always passes power to the right when power is received.
_____
| |
(enable)
—| TBL_|—
(ok)
| |
| RD_ |
| WORD|
(table elements) —|TB EM|— (output parameter EM)
| LEN |
|00001|
(pointer) —|PTR Q|— (output parameter Q)
|_____|
GFK-0265J Chapter 10 Data Table Functions 10-3
10
10-4
Parameters:
Parameter
enable
TB
PTR ok
EM
Q
LEN
Description
When enable is energized, the table read is performed.
TB contains the elements in the table.
PTR is incremented; it then points to the next table element to be read.
The ok output is energized whenever the function is enabled.
Output EM is energized when the last element of the table is read.
Output Q contains the element read from the table.
LEN must be between 1 and 32,767.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
•
TB
PTR ok
EM
•
• o
• o
• o
• o
∆ o
• •
•
•
•
•
•
•
•
•
•
Q • o o o o
∆ o o • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function.
Valid reference for INT, UINT, or WORD data only; not valid for DINT or DWORD.
Valid reference for WORD data only; not valid for INT, UINT, DINT, or DWORD.
•
•
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, WIDGETS is a table with 20 integer elements. When the enabling input
%M00346 is ON, the pointer increments and the contents of the next element of the table is copied into ITEM_CT. %L00001 functions as the pointer into the data table. %M01001 is used to signal when all items of the data table have been accessed.
| _____
|%M00346 | |
|——| |———| TBL_|—
| | RD_ |
| | INT | %M01001
|WIDGETS—|TB EM|———————————————————————————————————————————————————————————( )—
| | LEN |
| |00020|
|%L00001—|PTR Q|—ITEM_CT
| |_____|
|
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
TBLWRT (INT, UINT, DINT, WORD, DWORD)
The Table Write (TBLWRT) function is used to sequentially update values in a table that never becomes full. When the pointer reaches the end of the table, it automatically returns to the beginning of the table.
table
pointer
10
GFK-0265J
1
. T he function increments the pointer by one.
2
.
The function copies data from input parameter IN to the position in the table indicated by the pointer. (It will write over any value currently at that location.) Additional program logic must then be used to place the data in the input reference.
3
.
Steps 1 and 2 are repeated each time the instruction is executed, until the table is full (PTR =
LEN).
4
.
When the table is full, the pointer wraps around to the beginning of the table.
Note
TBLWRT and TBLRD functions can operate on the same or different tables. By specifying a different reference for the pointer, these functions can access the same data table at different locations or at different rates.
The TBLWRT function has four input parameters and two output parameters. When the function receives power flow, the pointer (PTR) increments by 1. If this new pointer location is the last item in the table, the output FL is set to ON. The next time the function executes, the pointer will automatically be set back to 1. After incrementing the pointer, the TBLWRT function writes the content of the input reference to the current pointer location, overwriting data already stored there.
The function always passes power to the right when power is received.
_____
| |
(enable)
—| TBL_|—
(ok)
| |
| WRT_|
| WORD|
(table elements) —|TB FL|— (output parameter FL)
| LEN |
|00001|
(pointer) —|PTR |
| |
| |
(input parameter IN) —|IN |
|_____|
Chapter 10 Data Table Functions 10-5
10
10-6
Parameters:
Parameter
enable
TB
PTR
IN ok
FL
LEN
Description
When enable is energized, the table write is performed.
TB contains the elements in the table.
PTR is incremented; it then points to the next table element to be written.
IN contains the element to be written to the table.
The ok output is energized whenever the function is enabled.
Output FL is energized when IN is written to the last element of the table.
LEN must be between 1 and 32,767.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
•
TB
PTR
IN ok
• o
• o o
• o o
• o o
•
∆
† o
• o
∆ o
•
•
•
•
•
•
•
•
•
•
•
•
FL
•
• o
∆
†
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
•
Valid reference or place where power may flow through the function.
Valid reference for INT, UINT, or WORD data only; not valid for DINT or DWORD.
Valid reference for WORD data only; not valid for INT, UINT, DINT, or DWORD.
%SA, %SB, %SC only; %S cannot be used.
•
•
•
•
•
• •
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, WIDGETS is a table with 20 integer elements. When the enabling input
%I00012 is ON, the pointer increments and the contents of %P00077 are written into the table at the pointer location. %L00001 functions as the pointer into the data table.
| _____
|%I00012 | |
|——| |———| TBL_|—
| | WRT_|
| | INT | %M01001
|WIDGETS—|TB FL|——————————————————————————————————————————————————————————( )—
| | LEN |
| |00020|
|%L00001—|PTR |
| | |
| | |
|%P00077—|IN |
| |_____|
|
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
10
LIFORD (INT, UINT, DINT, WORD, DWORD)
The Last-In-First-Out (LIFO) Read (LIFORD) function is used to move data out of tables. Values are always moved out of the top of the table. If the pointer reaches the last location and the table becomes full, the LIFORD function must be used to remove the entry at the pointer location and decrement the pointer by one. The LIFORD function is used in conjunction with the LIFOWRT function, which increments the pointer and writes entries into the table.
LIFO WRITE table
LIFO READ same table pointer
4
3
2
1 pointer
4
3
2
1
Sequence of events:
1
.
The function copies data indicated by the pointer to output parameter Q. Additional program logic must then be used to place the data in the input reference.
2
.
The function decrements the pointer by one.
3
.
Steps 1 and 2 are repeated each time the instruction is executed, until the table is empty (PTR
= LEN).
4
.
The pointer does not wrap around when the table is full.
The LIFORD function has three input parameters and three output parameters. When the function receives power flow, the data at the pointer location is copied to output Q, then the pointer is decremented. If this causes the pointer location to become 0, the output EM is set ON. Therefore,
EM indicates whether or not the table is empty. If the table is empty when the function receives power flow, no read will occur. The pointer always indicates the last item entered into the table.
The function passes power to the right if the pointer was in range for an element to be read.
_____
| |
(enable)
—|LIFO_|—
(ok)
| |
| RD_ |
| WORD|
(table elements) —|TB EM|— (output parameter EM)
| LEN |
|00001|
(pointer) —|PTR Q|— (output parameter Q)
|_____|
GFK-0265J Chapter 10 Data Table Functions 10-7
10
10-8
Parameters:
Parameter
enable
TB
PTR ok
EM
Q
LEN
Description
When enable is energized, the read operation is performed.
TB contains the elements in the table.
PTR points to the next LIFO element to be read; after the read, it is decremented.
The ok output is energized when EN is ON and 0 < PTR
≤
LEN.
Output EM is energized when the last element is read.
Output Q contains the element read from the table.
LEN must be between 1 and 32,767.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
TB
PTR ok
•
• o
• o
• o
• o
•
o
∆
•
† o
•
•
•
•
•
•
•
•
EM
Q
•
• o o o o
∆
† o
• • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function.
†
Valid reference for INT, UINT, or WORD data only; not valid for DINT or DWORD.
Valid reference for WORD data only; not valid for INT, UINT, DINT, or DWORD.
%SA, %SB, %SC only; %S cannot be used.
•
•
•
•
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, PRODUCT is a LIFO table with 100 word-sized elements. When the enabling input PACK_IT is ON, the data item at the top of the table is copied into the reference indicated by the nickname CART. The reference identified by STK_PTR contains the table pointer. Output coil EMPTY indicates when the table is empty.
| _____
|PACK_IT | |
|——| |———|LIFO_|—
| | RD_ |
| | WORD| EMPTY
|PRODUCT—|TB EM|———————————————————————————————————————————————————————————( )—
| | LEN |
| |00100|
|STK_PTR—|PTR Q|—CART
| |_____|
|
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
10
LIFOWRT (INT, UINT, DINT, WORD, DWORD)
The Last-In-First-Out (LIFO) Write (LIFOWRT) function is used to increment the table pointer by one, and then add an entry above the pointer location in a table. Values are always moved in at the top of the table. If the pointer reaches the last location and the table becomes full, no further values can be added by the LIFOWRT function. The LIFORD function must then be used to remove the entry at the pointer location and decrement the pointer by one.
LIFO WRITE table
LIFO READ same table pointer
4
3
2
1 pointer
4
3
2
1
Sequence of events:
1
.
The function increments the table pointer by one.
2
.
The function copies data from input parameter IN to the position in the table indicated by the pointer. (It will write over any value currently at that location.) Additional program logic must then be used to place the data in the input reference.
3
.
Steps 1 and 2 are repeated each time the instruction is executed, until the table is full (PTR =
LEN).
4
.
The pointer does not wrap around when the table is full.
The LIFOWRT function has four input parameters and two output parameters. When the function receives power flow, the pointer increments by 1; then the new data is written at the pointer location. If the pointer was already at the last location in the table, no data is written and the function does not pass power to the right. The pointer always indicates the last item entered into the table. If the table is full, it is not be possible to add more entries to it.
The function passes power to the right after a successful execution.
_____
| |
(enable)
—|LIFO_|—
(ok)
| |
| WRT_|
| WORD|
(table elements) —|TB FL|— (output parameter FL)
| LEN |
|00001|
(pointer) —|PTR |
| |
| |
(input parameter) —|IN |
|_____|
GFK-0265J Chapter 10 Data Table Functions 10-9
10
10-10
Parameters:
Parameter
enable
TB
PTR
IN ok
FL
LEN
Valid Memory Types:
Description
When enable is energized, the write operation is performed.
TB contains the elements in the table.
PTR is incremented; it then points to the next element to be written.
IN contains the element to be written to the table.
The ok output is energized when the function is enabled and PTR < LEN.
Output FL is energized when the last element has been written.
LEN must be between 1 and 32,767.
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
•
TB
PTR
IN ok
• o
• o o
• o o
• o o
∆
† o
• o
∆
• o
•
•
•
•
•
•
•
•
•
•
•
•
FL
•
• o
∆
†
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
•
Valid reference or place where power may flow through the function.
Valid reference for INT, UINT, or WORD data only; not valid for DINT or DWORD.
Valid reference for WORD data only; not valid for INT, UINT, DINT, or DWORD.
%SA, %SB, %SC only; %S cannot be used.
•
•
•
•
•
• •
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, PRODUCT is a LIFO table with 100 word-sized elements. When the enabling input STORE is ON, a data item from NEW_ITEM is copied to the table location pointed to by the value in STK_PTR. Output node FL will pass power when PTR = LEN, firing the FULL coil. No further data from NEW_ITEM can be added to the table without first copying data out, using the LIFORD function.
| _____
| STORE | |
|——| |———|LIFO_|—
| | WRT_|
| | WORD| FULL
|PRODUCT—|TB FL|———————————————————————————————————————————————————————————( )—
| | LEN |
| |00100|
|STK_PTR—|PTR |
| | |
| | |
|NEW_ITM—|IN |
| |_____|
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
10
FIFORD (INT, UINT, DINT, WORD, DWORD)
The First-In-First-Out (FIFO) Read (FIFORD) function is used to move data out of tables. Values are always moved out of the bottom of the table. If the pointer reaches the last location and the table becomes full, the FIFORD function must be used to remove the entry at the pointer location and decrement the pointer by one. The FIFORD function is used in conjunction with the
FIFOWRT function, which increments the pointer and writes entries into the table.
FIFO WRITE pointer table
5
4
3
2
1
FIFO READ same table pointer
5
4
3
2
Sequence of events:
1
.
The function copies the top location of the table to output parameter Q. Additional program logic must then be used to place the data in the input reference.
2
.
The remaining items in the table are copied to a lower numbered position in the table.
3
.
The function decrements the pointer by one.
4
.
Steps 1 and 2 are repeated each time the instruction is executed, until the table is empty
(PTR = LEN).
5
.
The pointer does not wrap around when the table is full.
The FIFORD function has three input parameters and three output parameters. When the function receives power flow, the data at the first location of the table is copied to output Q. Next, each item in the table is moved down to the next lower location. This begins with item 2 in the table, which is moved into position 1. Finally, the pointer is decremented. If this causes the pointer location to become 0, the output EM is set ON. Therefore, EM indicates whether or not the table is empty.
The FIFORD function passes power to the right if the pointer is greater than zero and less than the value specified for LEN.
_____
| |
(enable)
—|FIFO_|—
(ok)
| |
| RD_ |
| WORD|
(table elements) —|TB EM|— (output parameter EM)
| LEN |
|00001|
(pointer) —|PTR Q|— (output parameter Q)
|_____|
GFK-0265J Chapter 10 Data Table Functions 10-11
10
10-12
Parameters:
Parameter
enable
TB
PTR ok
EM
Q
LEN
Description
When enable is energized, the FIFO read is performed. It is always the first element of the FIFO table that is read.
TB contains the elements of the FIFO table.
PTR points to the last element of the FIFO table.
The ok output is energized when the function is enabled and 0 < PTR < LEN.
Output EM is energized when the final element is read.
Output Q contains the element read from the FIFO table.
LEN must be between 1 and 32,767.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
TB
PTR ok
•
• o
• o
• o
• o
•
∆ o
•
•
•
•
•
•
•
•
•
•
EM
Q
•
• o o o o
∆
† o • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• o
∆
†
Valid reference or place where power may flow through the function.
Valid reference for INT, UINT, or WORD data only; not valid for DINT or DWORD.
Valid reference for WORD data only; not valid for INT, UINT, DINT, or DWORD.
%SA, %SB, %SC only; %S cannot be used.
•
•
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, refer to the
“Restrictions on Formal Parameters within a Parameterized Subroutine Block” section of Chapter 2.
Example:
In the following example, PRODUCT is a FIFO table with 100 word-sized elements. When the enabling input PACK_IT is ON, the PRODUCT data item in the table location pointed to by
STK_PTR is copied to the reference location specified in CART. This table location pointed to would be the bottom, or oldest data item in the table. The number in STK_PTR will be decremented. A copy of the oldest data item in the PRODUCT table will be left behind in each table location as the current data is copied out during successive PACK_IT triggers. Output node
EM will pass power when the PTR = 0, firing the coil EMPTY. No further data from the
PRODUCT table can be read without first copying data in using the FIFOWRT function.
| _____
|PACK_IT | |
|——| |———|FIFO_|—
| | RD_ |
| | WORD| EMPTY
|PRODUCT—|TB EM|———————————————————————————————————————————————————————————( )—
| | LEN |
| |00100|
|STK_PTR—|PTR Q|—CART
| |_____|
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
10
FIFOWRT (INT, UINT, DINT, WORD, DWORD)
The First-In-First-Out (FIFO) Write (FIFOWRT) function is used to increment the table pointer by one, and then add an entry at the new pointer location in a table. Values are always moved in at the bottom of the table. If the pointer reaches the last location and the table becomes full, no further values can be added by the FIFOWRT function. The FIFORD function must then be used to remove the entry at the pointer location and decrement the pointer by one.
FIFO WRITE pointer table
5
4
3
2
1
FIFO READ same table pointer
5
4
3
2
Sequence of events:
1.
The function increments the pointer by one.
2.
The function copies data from input parameter IN to the position in the table indicated by the pointer. (It will write over any value currently at that location.) Additional program logic must then be used to place the data in the input reference.
3.
Steps 1 and 2 are repeated each time the instruction is executed, until the table is full (PTR =
LEN).
4.
The pointer does not wrap around when the table is full.
The FIFOWRT function has four input parameters and two output parameters. When the function receives power flow, the pointer is incremented by 1. Then, input data is written into the table at the pointer location. If the pointer was already at the last location in the table, no data is written and the function does not pass power to the right. The pointer always indicates the last item entered into the table. If the table becomes full, it will not be possible to add more entries to it.
The FIFOWRT function passes power to the right after a successful execution.
_____
| |
(enable)
—|FIFO_|—
(ok)
| |
| WRT_|
| WORD|
(table elements) —|TB FL|— (output parameter FL)
| LEN |
|00001|
(pointer) —|PTR |
| |
| |
(input parameter IN) —|IN |
|_____|
GFK-0265J Chapter 10 Data Table Functions 10-13
10
10-14
Parameters:
Parameter
enable
TB
PTR
IN ok
FL
LEN
Description
When enable is energized, the write operation is performed.
TB contains the elements of the FIFO table.
PTR points to the last element of the FIFO table.
IN contains the value to be written to the FIFO table.
The ok output is energized when the function is enabled and PTR < LEN.
Output FL is energized when the last element position of the FIFO table is written to.
LEN must be between 1 and 32,767.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
•
TB
PTR
IN ok
• o
• o o
• o o
• o o
∆
† o
• o
∆
• o
•
•
•
•
•
•
•
•
•
•
•
•
FL
•
• o
∆
†
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
•
Valid reference or place where power may flow through the function.
Valid reference for INT, UINT, or WORD data only; not valid for DINT or DWORD.
Valid reference for WORD data only; not valid for INT, UINT, DINT, or DWORD.
%SA, %SB, %SC only; %S cannot be used.
•
•
•
•
•
• •
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2..
Example:
In the following example, PRODUCT is a FIFO table with 100 word-sized elements. When the enabling input UNPACK is ON, a data item from P_CODE is copied to the table location pointed to by the value in STK_PTR. Output node FL will pass power when PTR = LEN, firing the FULL coil. No further data from P_CODE can be added to the table without first copying data out, using the FIFORD function.
| _____
| UNPAC | |
|——| |———|FIFO_|—
| | WRT_|
| | WORD| FULL
|PRODUCT—|TB FL|———————————————————————————————————————————————————————————( )—
| | LEN |
| |00100|
|STK_PTR—|PTR |
| | |
| | |
| P_CODE—|IN |
| |_____|
|
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
10
SORT (INT, UINT, WORD)
The SORT function is used to sort an array in ascending order. The function has two input and two output parameters. EN is a Boolean enable; IN is the array to be sorted. OK is a Boolean output providing power flow, and Q is an array of integers that gives the index that the sorted elements had in the original array or list. Q is exactly the same size as IN. It also has a specification (LEN) of the number of elements to be sorted.
The SORT function is restricted to operate on arrays with up to 64 elements. When EN is ON, all of the elements of IN are sorted into ascending order, based on their type. The array Q is also created, giving the original position that each sorted element held in the unsorted array. OK is always set ON.
Note
Do not use the SORT function in a timed or triggered input program block.
_____
| |
(enable)
—|SORT_|—
(ok)
| |
| WORD|
| |
(input parameter IN) —|IN Q|— (output parameter Q)
| LEN |
|00001|
|_____|
Parameters:
Parameter
enable
IN ok
Q
Description
When enable is energized, the sort is performed.
IN contains the array of elements to be sorted. At the conclusion of the sort, the elements of IN are in sorted order.
The ok output is energized whenever LEN is less than 65. However, the programmer does not limit the LEN parameter to 64. If LEN is greater than 64, the function block operates only on the first 64 units of LEN.
Output Q contains an array of indexes that gives the position of the sorted elements in the original array.
GFK-0265J Chapter 10 Data Table Functions 10-15
10
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
•
IN ok
Q
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function.
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, new part numbers (%I00017 - %I00032) are pushed onto a parts array
PLIST every time %Q00014 is ON. When the array is filled, it is sorted and the output %Q00025 is turned on. The array PPOSN will contain the original position that the now-sorted elements held before the sort was done on PLIST.
If PLIST was an array of five elements and contained the values 25, 67, 12, 35, 14 before the sort, then after the sort it would contain the values 12, 14, 25, 35, 67. PPOSN would contain the values
3, 5, 1, 4, 2.
| _____
|%Q00014 | |
|——| |———|LIFO_|—
| | WRT_| _____
| | UINT| | | %Q00025
| PLIST —|TB FL|———————————|SORT_|—————————————————————————————————————————( )—
| | LEN | | UINT|
| |00005| | |
|%L00041—|PTR | PLIST —|IN Q|—PPOSN
| | | | LEN |
| | | |00005|
|%I00017—|IN | |_____|
| |_____|
|
10-16 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
10
ARRAY_MOVE (INT, UINT, DINT, BIT, BYTE, WORD, DWORD)
Use the Array Move (ARRAY_MOVE) function to copy a specified number of data elements from a source array to a destination array.
The ARRAY_MOVE function has six input parameters and two output parameters. When the function receives power flow, the number of data elements in the count indicator (N) is extracted from the input array starting with the indexed location (SR + SNX – 1). The data elements are written to the output array starting with the indexed location (DS + DNX – 1). The LEN operand specifies the number of elements that make up each array.
For ARRAY_MOVE_BIT, when word-oriented memory is selected for the parameters of the source array and/or destination array starting address, the least significant bit of the specified word is the first bit of the array. The value displayed contains 16 bits, regardless of the length of the array.
The indices in an ARRAY_MOVE instruction are 1-based. In using an ARRAY_MOVE, no element outside either the source or destination arrays, as specified by their starting address and length, may be referenced.
The ok output will receive power flow, unless one of the following conditions occurs:
•
Enable is OFF.
•
(N + SNX) is greater than LEN.
•
(N + DNX) is greater than LEN.
_____
| |
(enable)
—|ARRAY|—
(ok)
| |
|MOVE_|
| BIT |
(source array address) —|SR DS|— (destination array address)
| LEN |
|00001|
(source array index) —|SNX |
| |
| |
(destination array index) —|DNX |
| |
| |
(elements to transfer ) —|N |
|_____|
GFK-0265J Chapter 10 Data Table Functions 10-17
10
Parameters:
Parameter
enable
SR
SNX
DNX
N ok
DS
LEN
Description
When the function is enabled, the operation is performed.
SR contains the starting address of the source array. For ARRAY_MOVE_BIT, any reference may be used; it does not need to be byte aligned. However, 1 bit, beginning with the reference address specified, is displayed online.
SNX contains the index of the source array.
DNX contains the index of the destination array.
N provides a count indicator.
The ok output is energized whenever the function is enabled. If NX is out of range, ok will not be energized.
DS contains the starting address of the destination array. For ARRAY_MOVE_BIT, any reference may be used; it does not need to be byte aligned. However, 1 bit, beginning with the reference address specified, is displayed online.
LEN specifies the number of elements starting at SR and DS that make up each array.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
SR
SNX
DNX
N
DS ok
•
•
•
•
•
•
• o
•
•
• o o
•
•
• o o
•
•
• o o
∆ o
•
•
• o †
•
•
• o o •
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
• o
Valid reference or place where power may flow through the function. For ARRAY_MOVE_MOVE_BIT, discrete user references %I, %Q, %M, and %T need not be aligned.
Valid reference for INT, UINT, BIT, BYTE, or WORD data only; not valid for DINT or DWORD.
%U is allowed for ARRAY_MOVE_BIT only.
∆
Valid data type for BIT, BYTE, or WORD data only; not valid for INT, UINT, DINT, or DWORD.
† %SA, %SB, %SC only; %S cannot be used.
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2..
10-18 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
10
Example 1:
In this example, %R00003 - %R00007 of the array %R00001 - %R00016 is read and then written into %R00104 - %R00109 of the array %R00100 - %R00115.
| _____
|%I00001 | |
|——| |———|ARRAY|—
| |_MOVE|
| |_WORD|
|%R00001—|SR DS|—%R00100
| | LEN |
| |00016|
| CONST —|SNX |
| 00003 | |
| | |
| CONST —|DNX |
| 00005 | |
| | |
| CONST —|N |
| 00005 |_____|
|
Example 2:
Using bit memory for SR and DS, %M00011 - %M00017 of the array %M00009 - %M00024 is read and then written to %Q00026 - %Q00032 of the array %Q00022 - %Q00037.
| _____
|%I00001 | |
|——| |———|ARRAY|—
| |_MOVE|
| |_BIT |
|%M00009—|SR DS|—%Q00022
| | LEN |
| |00016|
| CONST —|SNX |
| 00003 | |
| | |
| CONST —|DNX |
| 00005 | |
| | |
| CONST —|N |
| 00007 |_____|
|
GFK-0265J Chapter 10 Data Table Functions 10-19
10
Example 3:
Using word memory, for SR and DS, the third least significant bit of %R00001 through the second least significant bit of %R00002 of the array containing all 16 bits of %R00001 and four bits of
%R00002 is read and then written into the fifth least significant bit of %R00100 through the fourth least significant bit of %R00101 of the array containing all 16 bits of %R00100 and four bits of
%R00101.
| _____
|%I00001 | |
|——| |———|ARRAY|—
| |_MOVE|
| |_BIT |
|%R00001—|SR DS|—%R00100
| | LEN |
| |00020|
| CONST —|SNX |
| 00003 | |
| | |
| CONST —|DNX |
| 00005 | |
| | |
| CONST —|N |
| 00016 |_____|
|
10-20 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
10
SRCH_EQ and SRCH_NE (INT, UINT, DINT, BYTE, WORD,
DWORD)
SRCH_GT and SRCH_LT
SRCH_GE and SRCH_LE
Use the appropriate Search function listed below to search for all array values for that particular operation.
Abbreviation
SRCH_EQ
SRCH_NE
SRCH_GT
SRCH_GE
SRCH_LT
SRCH_LE
Function Description
Search Equal
Search Not Equal
Search for all array values equal to a specified value.
Search for all array values not equal to a specified value.
Search Greater Than Search for all array values greater than a specified value.
Search Greater Than or
Equal
Search Less Than
Search Less Than or
Equal
Search for all array values greater than or equal to a specified value.
Search for all array values less than a specified value.
Search for all array values less than or equal to a specified value.
Each function has four input parameters and two output parameters. When the function receives power, the array is searched starting at (AR + input NX). This is the starting address of the array
(AR) plus the index into this array (input NX).
The search continues until the array element of the search object (IN) is found or until the end of the array is reached. If an array element is found, output parameter (FD) is set ON and output parameter (output NX) is set to the relative position of this element within the array. If no array element is found before the end of the array is reached, then output parameter (FD) is set OFF and output parameter (output NX) is set to zero.
The valid values for input NX are 0 to LEN – 1. NX should be set to zero to begin searching at the first element. This value increments by one at the time of execution. Therefore, the values of output NX are 1 to LEN. If the value of input NX is out-of-range, (< 0 or
≥
LEN), the value of output NX is set to the default value of zero.
_____
| |
(enable)
—|SRCH_|—
(ok)
| |
| EQ_ |
| WORD|
(starting address) —|AR FD|—
| LEN |
|00001|
(input index) —|NX NX|— (output index)
| |
| |
(object of search) —|IN |
|_____|
GFK-0265J Chapter 10 Data Table Functions 10-21
10
Parameters:
Parameter Description
enable
AR
When the function is enabled, the operation is performed.
AR contains the starting address of the array to be searched.
Input NX Input NX contains the index into the array at which to begin the search.
IN IN contains the object of the search.
Output NX Output NX holds the position within the array of the search target.
FD FD indicates that an array element has been found and the function was successful.
ok The ok output is energized when the function is performed without error.
If NX is out of range, ok will not be energized.
LEN LEN specifies the number of elements starting at AR that make up the array to be searched.
It may be 1 to 32,767 bytes or words.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
AR
NX in
IN
NX out
FD ok
•
•
•
•
•
•
• o
• o
• o
• o
• o
• o
• o
• o
∆ o
•
∆ o
•
•
•
•
•
•
•
•
•
•
•
•
•
•
• o
Valid reference or place where power may flow through the function.
Valid reference for INT, UINT, BYTE, or WORD data only; not valid for DINT or DWORD.
∆
Valid reference for BYTE,or WORD data only; not valid for INT, UINT, DINT, or DWORD.
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
10-22 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
10
Example 1:
The array AR is defined as memory addresses %R00001 - %R00005. When EN is ON, the portion of the array between %R00004 and %R00005 is searched for an element whose value is equal to N.
If %R00001 = 7, %R00002 = 9, %R00003 = 6, %R00004 = 7, %R00005 = 7, and %R00100 = 7, then the search will begin at %R00004 and conclude at %R00004 when FD is set ON and a 4 is written to %R00101.
| _____
|%I00001 | |
|——| |———|SRCH_|—
| | EQ_ |
| | INT | %Q00001
|%R00001—|AR FD|————————————————————————————————————————————————————————————( )—
| | LEN |
| |00005|
| CONST —|NX NX|—%R00101
| 00003 | |
| | |
|%R00100—|IN |
| |_____|
|
Example 2:
Array AR is defined as memory addresses %AI0001 - %AI0016. The values of the array elements are 100, 20, 0, 5, 90, 200, 0, 79, 102, 80, 24, 34, 987, 8, 0, and 500. Initially, %AQ0001 is 5.
When EN is ON, each sweep will search the array looking for a match to the IN value of 0. The first sweep will start searching at %AI0006 and find a match at %AI0007, so FD is ON and
%AQ0001 is 7. The second sweep will start searching at %AI0008 and find a match at %AI0015, so FD remains ON and %AQ0001 is 15. The next sweep will start at %AI0016. Since the end of the array is reached without a match, FD is set OFF and %AQ0001 is set to zero. The next sweep will start searching at the beginning of the array.
| _____
|%I00001 | |
|——| |———|SRCH_|—
| | EQ_ |
| | WORD| %M00001
|%AI0001—|AR FD|————————————————————————————————————————————————————————————( )—
| | LEN |
| |00016|
|%AQ0001—|NX NX|—%AQ0001
| | |
| | |
| CONST —|IN |
| 0000 |_____|
|
GFK-0265J Chapter 10 Data Table Functions 10-23
10
ARRAY RANGE (INT, DINT, WORD, DWORD)
The ARRAY RANGE function is used to compare a single input value against two arrays of delimiters that specify an upper and lower bound to determine if the input value falls within the range specified by the delimiters. The output will be an array of bits that is set ON (1) when the input value is greater than or equal to the lower limit and less than or equal to the upper limit. The output is set OFF (0) when the input is outside this range or when the range is invalid, as when the lower limit exceeds the upper limit.
Note
The Array Range function is only available on a Release 5 or higher CPU.
The ARRAY RANGE function operates on these types of data:
Data Type
INT
DINT
UINT
WORD
DWORD
Description
Signed integer.
Double precision signed integer.
Unsigned integer.
Word data type.
Double word data type.
The default data type is signed integer; however, it can be changed after selecting the function. For more information on data types, please refer to “Data Types” section on page 2-16.
When the function is enabled, the ARRAY RANGE function block will compare the value in input parameter IN against each range specified by the array element values of LL and UL. Output Q sets a bit ON (1) for each corresponding array element where the value of IN is greater than or equal to the value of LL and is less than or equal to the value of UL. Output Q sets a bit OFF (0) for each corresponding array element where the value of IN is not within this range or when the range is invalid, as when the value of LL exceeds the value of UL. If the operation is successful, the ok output will receive power flow.
_____
| |
(enable) –| EQ_ | (ok)
| |
| INT |
| LEN |
| |
(lower limit) –|LL Q|– (array of bits)
| |
(upper limit) –|UL |
| |
(input value) –|IN |
|_____|
10-24 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
10
Parameters:
Parameter
enable
LL
UL
IN ok
Q
LEN
Description
When the function is enabled, the operation is performed.
LL contains the lower limit of the range.
UL contains the upper limit of the range.
IN contains the value to be compared against each range specified by L1 and L2.
The ok output is energized unless an error is encountered.
Output Q is energized when the value in IN is within the range specified by L1 and
L2, inclusive.
Note: Q is not aligned. It is displayed in bit format. It will display either a 1
(ON) or a 0 (OFF) for the first array element. For discrete references, it represents the reference displayed. For word references, it represents the low order bit of the reference displayed.
LEN is the number of elements in the arrays.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
•
LL
UL
IN ok
Q o o o o o o o o o o o o o o o o o o o o
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• o
Valid reference or place where power may flow through the function.
Valid reference for INT or WORD data only; not valid for DINT or DWORD.
† Constants are limited to integer values for double precision signed integer operations.
•
•
•
•
•†
•†
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
GFK-0265J Chapter 10 Data Table Functions 10-25
10
Example 1:
In the following example, the lower limit (LL) values of %R00001 through %R00008 are 1, 20, 30,
100, 25, 50, 10, and 200. The upper limit (UL) values of %R00100 through %R00108 are 40, 50,
150, 2, 45, 90, 250, and 47. The resulting Q values will be placed in the first 8 bits of %R00200.
The bit values low order to high are: 1, 1, 1, 0, 1, 0, 1, and 0. The bit value displayed will be set
ON (1) for the low order bit of %R00200. The ok output will be set ON (1).
| _____
|%I00001 | | %Q00001
|——| |———|ARRAY|—————————————————————————————————————————————————————————( )—
| |RANGE|
| | INT |
| | |
|%R00001—|LL Q|—%R00200
| | LEN |
| |00008|
|%R00100—|UL |
| | |
| 40—|IN |
| |_____|
|
Example 2:
In the following example, the lower limit (LL) array contains %T00001 through %T00016,
%T00017 through %T00032, and %T00033 through %T00048. The lower limit values are 100, 65, and 1. The upper limit (UL) values are 29, 165, and 2. The resulting Q values of 0, 1, and 0 will be placed in %Q00001 through %Q00003. The bit value displayed will be 0 (OFF), representing the value of %Q00001. The ok output will be set ON (1).
| _____
|%I00001 | | %M00001
|——| |———|ARRAY|—————————————————————————————————————————————————————————( )—
| |RANGE|
| | INT |
| | |
|%T00001—|LL Q|—%Q00001
| | LEN |
| |00003|
|%T00049—|UL |
| | |
| 65—|IN |
| |_____|
|
10-26 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Chapter
11
Conversion Functions
Use the conversion functions to convert a data item from one number type to another. Many programming instructions, such as math functions, must be used with data of one type. This chapter describes the following conversion functions:
Abbreviation
BCD-4
BCD-8
UINT
INT
DINT
REAL
TRUN
Function Description
Convert to BCD-4
Convert to BCD-8
Convert to Unsigned Integer Convert BCD-4, signed integer, or double precision signed integer to unsigned integer format.
Convert to Signed Integer Convert BCD-4, unsigned integer, or double precision signed integer to signed integer format.
Convert to Double Precision
Signed Integer
Convert an unsigned or signed integer to
4-digit BCD format.
Convert a double precision signed integer to 8-digit BCD format.
Convert to Real
Truncate
Convert BCD-8, unsigned integer, or signed integer to double precision signed integer format.
Convert BCD-4 BCD-8, unsigned integer, signed integer, or double precision signed integer to real value format.
Round the real number toward zero.
Page
11-2
11-4
11-6
11-8
11-10
11-12
11-14
GFK-0265J 11-1
11
BCD-4 (INT, UINT)
The Convert to BCD-4 function is used to output the 4-digit BCD equivalent of unsigned or signed integer data. The original data is not changed by this function. The output data can be used directly as input for another program function.
Data can be converted to BCD format to drive BCD-encoded LED displays or presets to external devices, such as high-speed counters.
When the function receives power flow, it performs the conversion, making the result available via output Q. The function passes power flow when power is received, unless the specified conversion would result in a value that is outside the range 0 to 9999.
_____
| |
(enable)
—| INT_|—
(ok)
| |
| TO_ |
| BCD4|
(value to be converted) —|IN Q|— (output parameter Q)
|_____|
Parameters:
Parameter
enable
IN ok
Q
Description
When the function is enabled, the conversion is performed.
IN contains a reference for the integer value to be converted to BCD-4.
The ok output is energized when the function is performed without error.
Q contains the BCD-4 form of the original value in IN.
11-2 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
11
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
IN ok
•
•
•
• • • • • • • • •
Q • • • • • • • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function..
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, refer to the
“Restrictions on Formal Parameters within a Parameterized Subroutine Block” section of Chapter 2.
Example:
In the following example, whenever input %I00002 is set and no errors exist, the integer at input location %I00017 through %I00032 is converted to four BCD digits and the result is stored in memory locations %Q00033 through %Q00048. Coil %M01432 is used to check for successful conversion.
| _____
|%I00002 | | %M01432
|——| |———| INT_|———————————————————————————————————————————————————————————( )—
| | TO_ |
| | BCD4|
|%I00017—|IN Q|—%Q00033
| |_____|
|
GFK-0265J Chapter 11 Conversion Functions 11-3
11
BCD-8 (DINT)
The Convert to BCD-8 function is used to output the 8-digit BCD equivalent of double precision signed integer data. The original data is not changed by this function. The output data can be used directly as input for another program function.
When the function receives power flow, it performs the conversion, making the result available via output Q. The function passes power flow when power is received, unless the specified conversion would result in a value that is outside the range 0 to 99999999.
_____
| |
(enable)
—|DINT_|—
(ok)
| |
| TO_ |
| BCD8|
(value to be converted) —|IN Q|— (output parameter Q)
|_____|
Parameters:
Parameter
enable
IN ok
Q
Description
When the function is enabled, the conversion is performed.
IN contains a reference for the integer value to be converted to BCD-8.
The ok output is energized when the function is performed without error.
Q contains the BCD-8 form of the original value in IN.
11-4 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
11
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
IN ok
•
•
•
• • • • •
Q • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function..
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, whenever input %I00002 is set and no errors exist, the double precision signed integer at input location %AI0003 is converted to eight BCD digits and the result is stored in memory locations %L00001 through %L00002.
| _____
|%I00002 | |
|——| |———|DINT_|—
| | TO_ |
| | BCD8|
|%AI0003—|IN Q|—%L00001
| |_____|
|
GFK-0265J Chapter 11 Conversion Functions 11-5
11
UINT (INT, DINT, BCD-4, REAL)
The Convert to Unsigned Integer function is used to output the integer equivalent of signed integer, double precision signed integer, BCD-4, or real data. The original data is not changed by this function. The output data can be used directly as input for another program function.
One use of the
³
UINT function is to convert BCD data from the I/O structure into integer data and store it in memory. This can provide an interface to BCD thumbwheels or external BCD electronics, such as high-speed counters and position encoders.
When the function receives power flow, it performs the conversion, making the result available via output Q. The function passes power flow when power is received, unless the specified conversion would result in a value that is outside the range 0 to +65,535.
_____
| |
(enable)
—| INT_|—
(ok)
| |
| TO_ |
| UINT|
(value to be converted) —|IN Q|— (output parameter Q)
|_____|
Parameters:
Parameter
enable
IN ok
Q
Description
When the function is enabled, the conversion is performed.
IN contains a reference for the value to be converted to unsigned integer.
The ok output is energized when the function is performed without error.
Q contains the unsigned integer form of the original value in IN.
11-6 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
11
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
IN ok
•
•
•
• o o
• • o o o • • • •
Q • • • • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• o
Valid reference or place where power may flow through the function.
Not valid for DINT_TO_UINT..
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, whenever input %I00002 is set and no errors exist, the double precision signed integer at input location %R00007 is converted to an unsigned integer and passed to the
SUB function, where the constant value 145 is subtracted from it. The result of the subtraction is stored in the output reference location %Q00033.
| _____ _____
|%I00002 | | | |
|——| |———|DINT_|————————| SUB_|—
| | TO_ | | UINT|
| | UINT| | |
|%R00007—|IN Q|————————|I1 Q|—%Q00033
| |_____| | |
| CONST —|I2 |
| 00145 |_____|
|
GFK-0265J Chapter 11 Conversion Functions 11-7
11
INT (UINT, DINT, BCD-4, REAL)
The Convert to Signed Integer function is used to output the integer equivalent of unsigned integer, double precision signed integer, or BCD-4 data. The original data is not changed by this function.
The output data can be used directly as input for another program function.
When the function receives power flow, it performs the conversion, making the result available via output Q. The function always passes power flow when power is received, unless the data is out of range.
_____
| |
(enable)
—|UINT_|—
(ok)
| |
| TO_ |
| INT |
(value to be converted) —|IN Q|— (output parameter Q)
|_____|
Parameters:
Parameter
enable
IN ok
Q
Description
When the function is enabled, the conversion is performed.
IN contains a reference for the value to be converted to integer.
The ok output is energized whenever enable is energized, unless the data is out of range.
Q contains the integer form of the original value in IN.
11-8 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
11
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
IN ok
•
•
•
• o o
• • o o o • • • •
Q • • • • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• o
Valid reference or place where power may flow through the function.
Not valid for DINT_TO_INT..
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, whenever input %I00002 is set, the BCD-4 value in PARTS is converted to a signed integer and passed to the ADD function, where it is added to the signed integer value represented by the reference RUNNING. The sum is output by the ADD function to the reference
TOTAL.
| _____ _____
|%I00002 | | | |
|——| |———|BCD—4|————————| ADD_|—
| | TO_ | | INT |
| | INT | | |
| PARTS —|IN Q|————————|I1 Q|—TOTAL
| |_____| | |
| RUNNING—|I2 |
| |_____|
|
GFK-0265J Chapter 11 Conversion Functions 11-9
11
DINT (INT, UINT, BCD-8, REAL)
The Convert to Double Precision Signed Integer function is used to output the double precision signed integer equivalent of unsigned integer, signed integer, or BCD-8 data. The original data is not changed by this function. The output data can be used directly as input for another program function.
When the function receives power flow, it performs the conversion, making the result available via output Q. The function always passes power flow when power is received, unless the real value is out of range.
_____
| |
(enable)
—| INT_|—
(ok)
| |
| TO_ |
| DINT|
(value to be converted) —|IN Q|— (output parameter Q)
|_____|
Parameters:
Parameter
enable
IN ok
Q
Description
When the function is enabled, the conversion is performed.
In contains a reference for the value to be converted to double precision integer.
The ok output is energized whenever enable is energized, unless the real value is out of range.
Q contains the double precision signed integer form of the original value in IN.
11-10 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
11
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
IN ok
•
•
•
• o o o o o • • • •
Q • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• o
Valid reference or place where power may flow through the function.
Not valid for BCD8_TO_DINT..
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, whenever input %I00002 is set, the integer value at input location
%I00017 is converted to a double precision signed integer and the result is placed in location
%L00001. The output %Q01001 is set whenever the function executes successfully.
| _____
|%I00002 | | %Q01001
|——| |———| INT_|———————————————————————————————————————————————————————————( )—
| | TO_ |
| | DINT|
|%I00017—|IN Q|—%L00001
| |_____|
|
GFK-0265J Chapter 11 Conversion Functions 11-11
11
REAL (INT, UINT, DINT, BCD-4, BCD-8)
The Convert to Real function is used to output the real value of the input data. The original data is not changed by this function. The output data can be used directly as input for another program function.
When the function receives power flow, it performs the conversion, making the result available via output Q. The function passes power flow when power is received, unless the specified conversion would result in a value that is out of range.
It is possible for a loss of precision to occur when converting from DINT or
BCD-8 to REAL since the number of significant bits is reduced to 24.
_____
| |
(enable)
—| INT_|—
(ok)
| |
| TO_ |
| REAL|
(value to be converted) —|IN Q|— (output parameter Q)
|_____|
Parameters:
Parameter
enable
IN ok
Q
Description
When the function is enabled, the conversion is performed.
IN contains a reference for the integer value to be converted to REAL.
The ok output is energized when the function is performed without error.
Q contains the REAL form of the original value in IN.
11-12 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
11
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
IN ok
•
•
•
• o o o o o • • • •
Q • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• o
Valid reference or place where power may flow through the function.
Not valid for DINT._TO_REAL or BCD8_TO_REAL..
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, the integer value of input IN is 678. The result value placed in %T00016 is 678.000.
| _____
| | |
|————————| INT_|—
| | TO_ |
| | REAL|
|%T00001—|IN Q|—%T00016
| |_____|
|
GFK-0265J Chapter 11 Conversion Functions 11-13
11
TRUN (INT, DINT)
The Truncate function is used to round the real number toward zero. The original data is not changed by this function. The output data can be used directly as input for another program function.
When the function receives power flow, it performs the conversion, making the result available via output Q. The function passes power flow when power is received, unless the specified conversion would result in a value that is out of range or unless IN is NaN (Not a Number).
_____
| |
(enable)
—|REAL_|—
(ok)
| |
|TRUN_|
| INT |
(value to be converted) —|IN Q|— (output parameter Q)
|_____|
Parameters:
Parameter
enable
IN ok
Q
Description
When the function is enabled, the conversion is performed.
IN contains a reference for the real value to be truncated.
The ok output is energized when the function is performed without error, unless the value is out of range or IN is NaN.
Q contains the truncated INT or DINT value of the original value in IN.
11-14 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
11
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
IN ok
•
•
•
• • • • •
Q o o o o o • • • •
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• o
Valid reference or place where power may flow through the function.
Not valid for REAL_TRUN_INT only..
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
Example:
In the following example, the displayed constant is truncated and the integer result 562 is placed in
%T00001.
| _____
| | |
|———————————|REAL_|—
| |TRUN_|
| | INT |
| CONST —|IN Q|—%T00001
|5.62987E+02|_____|
|
GFK-0265J Chapter 11 Conversion Functions 11-15
Chapter
12
Control Functions
This chapter describes the control functions, which may be used to limit program execution and change the way the CPU executes the application program. (Refer to chapter 2, section 1, “PLC
Sweep Summary,” for information on the CPU sweep.)
Function Description Page
CALL
CALL
EXTERNAL
CALL
SUBROUTINE
DOIO
SUSIO
MCR
Causes program execution to go to a specified program block.
Causes program execution to go to a specified external block.
Causes program execution to go to a specified parameterized subroutine block.
Services for one sweep a specified range of inputs or outputs immediately. (All inputs or outputs on a module are serviced if any reference locations on that module are included in the DO I/O function.
Partial I/O module updates are not performed.) Optionally, a copy of the scanned I/O can be placed in internal memory, rather than the real input points.
Suspends for one sweep all normal I/O updates, except those specified by DO I/O instructions.
Programs a Master Control Relay. An MCR causes all rungs between the MCR and its subsequent ENDMCR to be executed without power flow.
12-3
12-4
12-6
12-10
12-14
12-16
ENDMCR
JUMP
LABEL
FOR, END_
FOR, EXIT
Indicates that the subsequent logic is to be executed with normal power flow.
12-17
Causes program execution to jump to a specified location (indicated by a
LABEL, see below) in the logic.
12-18
Specifies the target location of a JUMP instruction.
COMMENT Places a comment (rung explanation) in the program. After entering the instruction, the text can be typed in by zooming into the instruction.
Repeat logic a specified number of times within a program.
12-19
12-20
12-21
GFK-0265J 12-1
12
Function
SVCREQ
PID
Description
Requests one of the following special PLC services:
Change/Read Constant Sweep Timer.
Read Window Values.
Change Programmer Communications Window Mode and Timer Value.
Change System Communications Window Mode and Timer Value.
Change Background Task Window Mode and Timer Value.
Change/Read Checksum Task State & No. of Words to Checksum.
Change/Read Time-of-Day Clock State and Values.
Reset Watchdog Timer.
Read Sweep Time from Beginning of Sweep.
Read Folder Name
Read PLC ID.
Read PLC Run State.
Stop PLC.
Clear Fault Tables.
Read Last-Logged Fault Table Entry.
Read Elapsed Time Clock.
Mask/Unmask I/O Interrupt.
Read I/O Override Status.
Set Run Enable/Disable.
Read Fault Tables.
User-Defined Fault Logging.
Mask/Unmask Timed Interrupts.
Read Master Checksum.
Disable/Enable EXE Block and Standalone C Program Checksums.
Role Switch.
Write to Reverse Transfer Area.
Read from Reverse Transfer Area.
Suspend/Resume I/O Interrupt
ESCM Port Status
Provides two PID (proportional/integral/derivative) closed-loop control algorithms: Standard ISA PID algorithm (PIDISA) and Independent term algorithm (PIDIND).
Page
12-25
12-28
12-31
12-32
12-33
12-34
12-36
12-38
12-42
12-43
12-44
12-45
12-46
12-47
12-48
12-49
12-53
12-54
12-55
12-57
12-58
12-62
12-64
12-65
12-67
12-68
12-69
12-69
12-70
12-72
12-74
12-2 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
12
CALL
Use the CALL function to cause program execution to go to a specified program block. A CALL function can be used in any _MAIN program block, program block, or parameterized subroutine block .
Note
The maximum number of program block calls that can be programmed in a program block is 64. The maximum number of declared program blocks is 255.
The maximum number of times you can call a subroutine is 255.
When the CALL function receives power flow, it causes the scan to go immediately to the designated program block and execute it. After the program block execution is complete, control returns to the point in the logic immediately following the CALL instruction.
GFK-0265J Chapter 12 Control Functions 12-3
12
CALL EXTERNAL
Use the CALL EXTERNAL function to cause program execution to go to a specified external block created outside the Logicmaster software. The eight CALL EXTERNAL functions vary in the number of parameters which convey input and output data blocks. The input and output parameters may have a length of one bit or one word. When a contact instruction adjoins one of the input or output parameters, the parameter is one bit in size. All data flow will be one bit in length. The enable and ok parameters are present for each function.
When the function is enabled, the specified external block is executed. The external logic operates on the blocks of incoming data and produces the blocks of output data. The ok parameter is controlled by logic within the external block.
After the program block execution is complete, control returns to the point in the logic immediately following the CALL instruction.
The CALL EXTERNAL function with no input and output parameters has the following form:
____________
| |
(enable)
—|CALL blkname|—
(ok)
| |
| (EXTERNAL) |
|____________|
The CALL EXTERNAL function may have up to seven pairs of parameters, as shown below:
____________
| |
(enable)
—|CALL blkname|—
(ok)
| |
| (EXTERNAL) |
| |
(input parameter I1) —|IN1 Q1|— (output parameter Q1)
| |
| |
(input parameter I2) —|IN2 Q2|— (output parameter Q2)
| |
| |
(input parameter I3) —|IN3 Q3|— (output parameter Q3)
| |
| |
(input parameter I4) —|IN4 Q4|— (output parameter Q4)
| |
| |
(input parameter I5) —|IN5 Q5|— (output parameter Q5)
| |
| |
(input parameter I6) —|IN6 Q6|— (output parameter Q6)
| |
| |
(input parameter I7) —|IN7 Q7|— (output parameter Q7)
|____________|
12-4 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
12
Parameters:
Parameter Description
enable When the function is enabled, the operation is performed.
IN1-IN7 The input parameters IN1 through IN7 indicate the starting location of data to be used within the external block.
ok
Q1-Q7
The ok output is controlled by logic within the external block.
The output parameters Q1 through Q7 indicate the starting location of data with output values.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
• enable
IN1-IN7 ok
Q1-Q7
•
•
•
• •
• •
•
•
•
•
•
•
•
•
•
Valid reference or place where power may flow through the function.
•
•
•
•
•
•
•
•
• •
•
•
•
Example:
In the following example, if %I00001 is set, the external block named C_BLK20 is executed.
Block C_BLK20 operates on the input data located at reference address %L00100 and produces values in the block of output data located at reference address %T00001. Logic within C_BLK20 controls the Q1 output.
| _____________
|%I00001 | | %Q01001
|——| |———|CALL C_BLK20 |———————————————————————————————————————————————————( )—
| | (EXTERNAL) |
| | |
|%L00100—|IN1 Q1|—%T00001
| |_____________|
|
GFK-0265J Chapter 12 Control Functions 12-5
12
CALL SUBROUTINE
Use the CALL SUBROUTINE function to cause program execution to go to a specified parameterized subroutine. Parameterized subroutine blocks (PSBs) are user-defined function blocks, configured with between zero and seven input/output parameter pairs. A program can
“call” a parameterized subroutine block as it executes; however, the parameterized subroutine block must be declared through the block declaration editor before a CALL instruction can be used for that parameterized subroutine block. For more information on declaring a parameterized subroutine block, refer to chapter 2, section 3, “Program Organization and User Data,” in this manual and the Logicmaster 90-70 Programming Software User’s Manual, GFK-0263.
When the function is enabled, the specified parameterized subroutine is executed. The logic in the subroutine operates on the blocks of incoming data and produces blocks of output data. The ok parameter may be controlled by logic within the subroutine. After the program block execution is complete, control returns to the point in the logic immediately following the CALL instruction.
The CALL SUBROUTINE function with no input or output parameters has this form:
____________
| |
(enable)
—|CALL blkname|—
(ok)
| |
|(SUBROUTINE)|
|____________|
In this case of a zero-parameter PSB call, the ok parameter is always set to ON.
The CALL SUBROUTINE function may have up to seven pairs of parameters, as shown below:
____________
| |
(enable)
—|CALL blkname|—
(ok)
| |
|(SUBROUTINE)|
| |
(input parameter X1) —|X1 Y1|— (output parameter Y1)
| |
| |
(input parameter X2) —|X2 Y2|— (output parameter Y2)
| |
| |
(input parameter X3) —|X3 Y3|— (output parameter Y3)
| |
| |
(input parameter X4) —|X4 Y4|— (output parameter Y4)
| |
| |
(input parameter X5) —|X5 Y5|— (output parameter Y5)
| |
| |
(input parameter X6) —|X6 Y6|— (output parameter Y6)
| |
| |
(input parameter X7) —|X7 Y7|— (output parameter Y7)
|____________|
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12
Parameters:
Parameter
enable
X1-X7 ok
Y1-Y7
Description
When the function is enabled, the operation is performed.
The input parameters X1 through X7 indicate the starting location of data to be used within the subroutine block.
The ok output may be controlled by logic within the subroutine block using PSB formal parameter Y0[001].
The output parameters Y1 through Y7 indicate the starting location of the output data.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
X1-X7 ok
Y1-Y7
•
•†
•
•‡ •
• •
•
•
•
•
•
• •
•
•
•
•
Valid reference or place where power may flow through the function.
†
Bit parameters only (when bit length is 1).
‡ When word length is 1.
•
•
•
•
•
•
•
•
•
•
•
•
• •
•
Note
PSB (Parameterized Subroutine Block) formal BIT parameters are not allowed as parameters to the CALL SUBROUTINE function. PSB formal WORD and
NWORD parameters are allowed as parameters to the CALL SUBROUTINE function. For restrictions within a parameterized subroutine block, refer to the
“Restrictions on Formal Parameters within a Parameterized Subroutine Block” section of Chapter 2.
Note
Indirect references may be allowed as assigned input parameters, but not as formal parameters. %S references, like ALW_ON and ALW_OFF, may be required in some applications to take the place of required but unused assigned input parameters. %S references may not be assigned to WORD type input parameters, but may be assigned to BIT type input parameters.
GFK-0265J Chapter 12 Control Functions 12-7
12
Example:
In the following example, if %I00001 is set, the parameterized subroutine block named BLK20 is executed. Block BLK20 operates on the input data located at reference addresses %L00100 –
%L00109 and produces values in the block of output data located at reference addresses %T00001
– %T00016. Logic within BLK20 controls the Y1 output.
| _____________
|%I00001 | | %Q01001
|——| |———| CALL BLK20 |———————————————————————————————————————————————————( )—
| |(SUBROUTINE) |
| | |
| |W010 B016|
|%L00100—|X1 Y1|—%T00001
| |_____________|
|
Parameterized Subroutine Block Example
Parameterized subroutine blocks are useful for building libraries of user-defined functions that can be used and moved from one application to another. For example, if you had a mathematical equation or algorithm that needed to be performed several times, you could write a parameterized subroutine block for that function and then call it as needed throughout your program.
For example, if you have a mathematical equation such as:
E = (A + B + C + D) / 4
where E is a word output, and A, B, C, and D are word inputs. A parameterized subroutine named
AVG_4 could be defined and called as follows:
| _____________
|%I00001 | |
|——| |———| CALL AVG_4 |
| |(SUBROUTINE) |
| | |
| |W001 W001|
|%R00001—| A E |—%R00005
| | |
| |W001 NONE|
|%R00002—| B Y2|—
| | |
| |W001 NONE|
|%R00003—| C Y3|—
| | |
| |W001 NONE|
|%R00004—| D Y4|—
| |_____________|
|
In this example, the average of %R00001, %R00002, %R00003, and %R00004 would be placed in
%R00005.
12-8 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
The logic within the parameterized subroutine block would then look like this:
| _____ _____ _____
| | | | | | |
|————————| ADD_|————————| ADD_|————————| DIV_|
| | UINT| | UINT| | UNIT|
| | | | | | |
| A[001]—|I1 Q|————————|I1 Q|————————|I1 Q|—E[001]
| | | | | | |
| | | | | | |
| B[001]—|I2 | +—|I2 | 0004—|I2 |
| |_____| | |_____| |_____|
| |
| |
| _____ |
| | | |
|————————| ADD_| |
| | UINT| |
¦ | | |
| C[001]—|I1 Q|——————+
| | |
| | |
| D[001]—|I2 |
| |_____|
|
12
GFK-0265J Chapter 12 Control Functions 12-9
12
DOIO
12-10
The DO I/O (DOIO) function is used to update inputs or outputs for one scan while the program is running. The DOIO function can be used in conjunction with a SUSIO function, which stops the normal I/O scan. It can also be used to update selected I/O during the program in addition to the normal I/O scan.
If input references are specified, the function allows the most recent values of inputs to be obtained for program logic. If output references are specified, DO I/O updates outputs based on the most current values stored in I/O memory. I/O points are serviced in increments of entire I/O modules; the PLC adjusts the references, if necessary, while the function executes. The DOIO function will not scan I/O modules that are not configured.
Note
The DOIO function is supported for Series 90-70 I/O modules only. It does not support Genius I/O modules and does not affect Ethernet Global Data production or Consumption. For details, refer to Chapter 4 in the TCP/IP Ethernet
Communications for the Series 90 PLC User’s Manual, GFK-1541.
The DOIO function has four input parameters and one output parameter. When the function receives power flow and input references are specified, the input points at the starting reference ST and ending at END are scanned. If a reference is specified for ALT, a copy of the new input values is placed in memory, beginning at that reference, and the real input points are not updated. ALT must be the same size as the reference type scanned. If a discrete reference is used for ST and
END, then ALT must also be discrete. If no reference is specified for ALT, the real input points are updated.
When the DOIO function receives power flow and output references are specified, the output points at the starting reference ST and ending at END are written to the output modules. If outputs should be written to the output modules from internal memory, other than %Q or %AQ, the beginning reference can be specified for ALT. The range of outputs written to the output modules is specified by the starting reference ST and the ending reference END.
Execution of the function continues until either all inputs in the selected range have reported, or all outputs have been serviced on the I/O cards. Program execution then returns to the next function following the DO I/O.
The function passes power to the right whenever power is received, unless:
•
Not all references of the type specified are present within the selected range.
•
The CPU is not able to properly handle the temporary list of I/O created by the function.
•
The range specified includes I/O modules that are associated with a “Loss of I/O Module” fault.
Note
If the DOIO function is used with timed or I/O interrupts, transitional contacts associated with scanned inputs may not operate as expected.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
12
_____
| |
(enable)
—|DO_IO|—
(ok)
| |
| |
(starting address) —|ST |
| |
| |
(ending address) —|END |
| |
| |
—|ALT |
|_____|
Parameters:
Parameter
enable
ST
END
ALT ok
Description
When the function is enabled, a limited input or output scan is performed.
ST is the starting address of the set of input or output points or words to be serviced.
END is the ending address of the set of input or output points or words to be serviced.
For the input scan, ALT specifies the address to store scanned input point/word values. For the output scan, ALT specifies the address to get output point/word values from to send to the I/O modules.
The ok output is energized when the input or output scan completes normally.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
•
ST
END
ALT ok
•
•
•
•
•
• • • • •
•
•
•
•
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function.
o Valid reference for INT, UINT, or WORD data only; not valid for DINT or DWORD.
•
•
•
•
•
• •
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
GFK-0265J Chapter 12 Control Functions 12-11
12
Input Example 1:
In the following example, when the enabling input %I00001 is ON, references %I00001 through
%I00064 are scanned and %Q00001 is turned on. A copy of the scanned inputs is placed in internal memory from reference %M00001 through %M00064. The real input points are not updated. This form of the function can be used to compare the current values of input points with the values of input points at the beginning of the scan.
| _____
|%I00001 | | %Q00001
|——| |———|DO_IO|———————————————————————————————————————————————————————————( )—
| | |
| | |
|%I00001—|ST |
| | |
| | |
|%I00064—|END |
| | |
| | |
|%M00001—|ALT |
| |_____|
|
Input Example 2:
In the following example, when the enabling input %I00001 is ON, references %I00001 through
%I00064 are scanned and %Q00001 is turned on. The scanned inputs are placed in the input status memory from reference %I00001 to %I00064. This form of the function allows input points to be scanned one or more times during the program execution portion of the CPU sweep.
| _____
|%I00001 | | %Q00001
|——| |———|DO_IO|———————————————————————————————————————————————————————————( )—
| | |
| | |
|%I00001—|ST |
| | |
| | |
|%I00064—|END |
| | |
| | |
| —|ALT |
| |_____|
|
12-12 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
12
Output Example 1:
In the following example, when the enabling input %I00001 is ON, the values at references
%R00001 through %R00004 are written to analog output channels %AQ0001 through %AQ0004 and %Q00001 is turned on. The values at %AQ0001 through %AQ0004 are not written to the analog output modules.
| _____
|%I00001 | | %Q00001
|——| |———|DO_IO|———————————————————————————————————————————————————————————( )—
| | |
| | |
|%I00001—|ST |
| | |
| | |
|%I00064—|END |
| | |
| | |
|%M00001—|ALT |
| |_____|
|
Output Example 2:
In the following example, when the enabling input %I00001 is ON, the values at references
%AQ0001 through %AQ0004 are written to analog output channels %AQ0001 through %AQ0004 and %Q00001 is turned on.
| _____
|%I00001 | | %Q00001
|——| |———|DO_IO|———————————————————————————————————————————————————————————( )—
| | |
| | |
|%I00001—|ST |
| | |
| | |
|%I00064—|END |
| | |
| | |
| —|ALT |
| |_____|
|
GFK-0265J Chapter 12 Control Functions 12-13
12
SUSIO
The Suspend I/O (SUSIO) function is used to stop normal I/O scans from occurring for one CPU sweep. During the next output scan, all outputs are held at their current states. During the next input scan, the input references are not updated with data from inputs. However, during the input scan portion of the sweep the CPU will verify that Genius bus controllers have completed their previous output updates.
Note
The SUSIO function suspends all I/O, both analog and discrete, whether integrated I/O, Genius I/O, or Ethernet Global Data. For details, refer to Chapter
4 in the TCP/IP Ethernet Communications for the Series 90 PLC User’s Manual,
GFK-1541.
The SUSIO function has one input and one output. When the function receives power flow, all I/O servicing stops except that provided by DOIO functions. If the function were placed at the left rail of the ladder, without enabling logic to regulate its execution, no regular I/O scan would ever be performed.
The SUSIO function passes power flow to the right whenever power is received.
| —————
|—|SUSIO|
—
| —————
Example:
This example shows a SUSIO function and a DOIO function used to stop I/O scans, then cause certain I/O to be scanned from the program.
Inputs %I00010 and %I00011 form a latch circuit with the contact from %M00001. This keeps the
SUSIO function active on each sweep until %I00011 goes on. If this input were not scanned by the
DO after the SUSIO went active, the SUSIO could only be disabled by powering down the PLC.
Output %Q00002 is set when both DOIO functions execute successfully. The rung is constructed so that both DOIO functions will execute even if one does not set its OK output. With normal I/O suspended, output %Q00002 is not updated until a DOIO function with %Q00002 in its range executes. This will not occur until the sweep after the setting of %Q00002. Outputs that are set after a DOIO function executes are not updated until another DOIO function executes, typically in the next sweep. Because of this delay, most programs that use SUSIO and DOIO place the SUSIO function in the first rung of the program, the DOIO function that processes inputs in the next rung, and the DOIO function that processes outputs in the last rung.
12-14 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
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The range of the DOIO function doing outputs is %Q00001 through %Q00030. If the module in this range were a 32-point module, the DOIO function would actually perform a scan of the entire module. A DOIO function will not break the scan in the middle of an I/O module.
|
| [ START OF PROGRAM ]
|
|%I00010 %I00011 ————— %M00001
|——| |——+——|/|———|SUSIO|———————————————————————————————————————————————————( )—
| | —————
|%M00001|
|——| |——+
| _____
|%M00001 | | %M00551
|——| |———|DO_IO|———————————————————————————————————————————————————————————( )—
| | |
| | |
|%I00001—|ST |
| | |
| | |
|%I00016—|END |
| | |
| | |
| |ALT |
| |_____|
|
.
.
.
| _____
|%M00001 | | %M00551 %Q00002
|——| |———|DO_IO|———| |—————————————————————————————————————————————————————( )—
| | |
| | |
|%Q00001—|ST |
| | |
| | |
|%Q00030—|END |
| | |
| | |
| |ALT |
| |_____|
|
| [ END OF PROGRAM ]
|
|
GFK-0265J Chapter 12 Control Functions 12-15
12
MCR
All rungs between an active Master Control Relay (MCR) and its corresponding End Master
Control Relay (ENDMCR) are executed with negative logic. Use the MCR function to cause a portion of the program logic to be bypassed. An ENDMCR function associated with the MCR is used to resume normal program execution. Unlike the JUMP instruction, MCRs can only occur in the forward direction. The ENDMCR instruction must appear after its corresponding MCR instruction in a program.
Note
Program block calls within the scope of an active MCR will not execute.
However, any timers in the program block will continue to accumulate time.
There can be only one MCR instruction for each ENDMCR instruction. An MCR/ENDMCR pair can be nested within other MCR/ENDMCR pairs.
The MCR function has an enable Boolean input (EN) and also a name which identifies the MCR.
This name is used again with an ENDMCR instruction. The MCR function has no outputs; there can be nothing after an MCR in a rung.
—[ MCR ]—
Example:
In the following example, whenever %I00002 allows power flow into the MCR function, program execution will continue without power flow to the coils until the associated ENDMCR is reached.
If %I00001 and %I00003 are ON, %Q00001 is turned OFF and %Q00003 remains ON.
|
|%I0002 FIRST
|——| |———[ MCR ]
||
||
||
||%I00001 %Q0001
||——| |————————————————————————————————————————————————————————————————————()—
||
||
||
||%I0003 %Q0003
||——| |———————————————————————————————————————————————————————————————————(S)—
||
||
||
| FIRST
+[ ENDMCR ]
|
12-16 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
12
ENDMCR
Use the End Master Control Relay (ENDMCR) function to resume normal program execution after an MCR function. When the MCR associated with the ENDMCR is active, the ENDMCR causes program execution to resume with normal power flow. When the MCR associated with the
ENDMCR is not active, the ENDMCR has no effect.
The ENDMCR function has a negated Boolean input (EN). The instruction enable must be provided by the power rail; execution cannot be conditional. The ENDMCR function also has a name, which identifies the ENDMCR and associates it with the corresponding MCR(s). The
ENDMCR function has no outputs; there can be nothing before or after an ENDMCR instruction in a rung.
[ END_
MCR ]-
Example:
In the following example, an ENDMCR instruction is programmed to terminate MCR range
“clear.”
|
| CLEAR
|—[ END MCR ]
|
GFK-0265J Chapter 12 Control Functions 12-17
12
JUMP
Use the JUMP instruction to cause a portion of the program logic to be bypassed. The JUMP can be either a forward or a backward JUMP. Program execution will continue at the LABEL specified.
The JUMP instruction is similar to an MCR, except that coils within the range of the JUMP are not executed with negative logic. When the JUMP is active, all coils within its scope are frozen. This includes coils associated with timers, counters, latches, and relays.
The JUMP instruction is always placed in columns 9 and 10 of the current rung line; there can be nothing after the JUMP instruction in the rung. Power flow jumps directly from the instruction to the rung with the named LABEL.
——————————————————————————————————————————
————————>> ???????
Caution
To avoid creating and endless loop with forward and backward JUMP instructions, a backward JUMP must contain a way to make it conditional.
Example:
In the following example, whenever JUMP TEST1 is active, program execution is transferred to
LABEL TEST1.
|
|%I00001
|——| |————————————————————————————————————————————————————————————————>> TEST1
|
12-18 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
12
LABEL
The LABEL instruction functions as the target destination of a JUMP. Use the LABEL instruction to resume normal program execution after a JUMP instruction.
There can be only one LABEL with a particular label name in a program. Programs without a matched JUMP/LABEL pair can be created and stored to the PLC, but cannot be executed.
The LABEL instruction has no input parameters and no output parameters; there can be nothing either before or after a LABEL in a rung.
Example:
In the following example, when JUMP TEST1 receives power, program execution is transferred to
LABEL TEST1.
|
| TEST1 :
|
GFK-0265J Chapter 12 Control Functions 12-19
12
COMMENT
Use the COMMENT function to enter a comment (rung explanation) in the program. A comment can have up to 2048 characters of text. It is represented in the ladder logic like this:
|
|(* COMMENT *)
|
The text can be read or edited by moving the cursor to
(* COMMENT *)
after accepting the rung and selecting Zoom (F10). Comment text can also be printed.
Longer text can be included in printouts using an annotation text file, as described below:
1
.
Create the comment:
A
.
Enter text to the point where the text from the other file should begin.
B
.
Move the cursor to the beginning of a new line and enter
\I
or
\i
, the drive followed by a colon, the subdirectory or folder, and the file name, as shown in this example:
\I d:\text\commnt1
If the file is located on the same drive as the program folder, the drive designation is not necessary.
C
.
Continue editing the program, or exit to MS-DOS.
2
.
After exiting the programmer, create a text file using any MS-DOS compatible software package. Give the file the file name entered in the comment, and place it on the drive specified in the comment.
12-20 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
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FOR, END_FOR, and EXIT
FOR, END_FOR, and EXIT instructions enable you to repeat rung logic a specified number of times while varying the value of the FOR INDEX_VAR in the loop. The rung logic to be repeated must be placed between the FOR and END_FOR instructions.
The FOR instruction has five input parameters; there are no out parameters. When there is power flow at enable EN of the FOR instruction, the START, END, and INCREMENT parameters are saved. These saved values are used to evaluate the number of times the rungs between the FOR and its END_FOR instructions are executed. Changing the START and END parameters while the
FOR loop is executing will not change its operation.
When there is power flow into the EXIT instruction, the FOR instruction is terminated and power flow jumps directly to the statement following the END_FOR instruction.
There can be nothing after the FOR instruction in the rung. An EXIT statement can only be placed between a FOR instruction and an END_FOR instruction in a program, and there can be nothing after the EXIT statement in the rung, as well. The END_FOR statement must be the only instruction in the rung.
____________
| FOR_LOOP |
| |
—|EN |
| |
| |
???????—|INDEX_VAR |
| |
| |
???????—|START |
| |
| |
???????—|END |
| |
| |
???????—|INCREMENT |
|____________|
————————————
—| EXIT_FOR |
|____________|
————————————
—| END_FOR |
|____________|
A FOR_LOOP can assign decreasing values to its index variable by setting the increment to a negative number. If the START value is 21, the END value is 1, and the increment value is –5, the statements of the FOR loop are executed five times, and the index variable is decremented by 5 in each pass. The values of the index variable will be 21, 16, 11, 6, and 1.
When the START and END values are set equal, the statements of the FOR loop are executed only once.
When START cannot be incremented to reach the END or START cannot be decremented to reach the END, the statements within the FOR loop are not executed. For example, the value of START is 10, the value of END is 5, and the INCREMENT is 1. Power flow will jump directly from the
FOR statement to the statement after the END_FOR statement.
GFK-0265J Chapter 12 Control Functions 12-21
12
Note
If the EN parameter for the FOR_LOOP instruction has power flow when it is first tested, the rungs between the FOR and its corresponding END_FOR statement are executed the number of times initially specified by START, END, and INCREMENT. This repeated execution will occur on a single sweep of the
PLC and may cause the watchdog timer to expire if the loop is long.
Nesting of FOR loops is allowed, but it is restricted to five FOR/END_FOR pairs. Each FOR instruction must have a matching END_FOR statement following it.
Nesting with JUMPs and MCRs is allowed, provided that they are properly nested. MCRs and
ENDMCRs must be completely within or completely outside the scope of a FOR/END_FOR pair.
JUMPs and LABEL instructions must also be completely within or completely outside the scope of a FOR/END_FOR pair. Jumping into or out of the scope of a FOR/END_FOR is not allowed.
Parameters:
Parameter Description
enable When the function is enabled, the operation is performed.
INDEX_VAR INDEX_VAR contains the index variable. When the loop has completed, this value is undefined. Changing the value of the index variable within the scope of the FOR loop is not recommended.
START
END
START contains the index start value.
END contains the index end value.
INCREMENT INCREMENT contains the increment value.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
INDEX
START
END
INCREMENT
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Valid reference or place where power may flow through the function.
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
• •
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
12-22 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
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Example 1:
In the first example, the value for %M00001 (START) is 1, and the value for %M00017 (END) is
10. The INDEX_VAR (%R00001) will increment by the INCREMENT (assumed to be 1 when omitted) starting at 1 until it reaches the ending value 10. The ADD function of the loop is executed 10 times, adding the current value of I1 (%R00001) 1 ... 10 to I2 (%R00002).
|
| _____________
| | FOR_LOOP |
|%I00001 | |
|——| |———|EN |
| | |
| | |
|%R00001—|INDEX_VAR |
| | |
| | |
|%M00001—|START |
| | |
| | |
|%M00017—|END |
| | |
| | |
| —|INCREMENT |
| |_____________|
| _____
|%I00001 | |
|——| |———| ADD_|—
| | INT |
| | |
|%R00001—|I1 Q|—%R00003
| | |
| | |
|%R00002—|I2 |
| |_____|
| —————————————
|—| END_FOR |
| —————————————
|
|
GFK-0265J Chapter 12 Control Functions 12-23
12
Example 2:
In this next example, the value for %T00001 (START) is ,100, and the value for %T00017 (END) is 100. The INDEX_VAR (%R00001) will increment by tens, starting at ,100 until it reaches it end value of +100. The EQ function of the loop will try to execute 21 times, with I1 (%R00001) equal to –100, –90, –80, –70, –60, –50, –40, –30, –20, –10, 0, 10, 20, 30, 40, 50, 60, 70, 80, 90, 100.
When I1 (%R00001) is 0, the EXIT statement will be enabled and power flow will jump directly to the statement after the END_FOR statement.
|
| _____________
| | FOR_LOOP |
|%I00001 | |
|——| |———|EN |
| | |
| | |
|%R00001—|INDEX_VAR |
| | |
| | |
|%T00001—|START |
| | |
| | |
|%T00017—|END |
| | |
| | |
| CONST —|INCREMENT |
| +00010 |_____________|
| _____
|%I00001 | |
|——| |———| EQ_ |—
| | INT |
| | | —————————————
|%R00001—|I1 Q|———————| EXIT_FOR |
| | | —————————————
| | |
| CONST —|I2 |
| +00000 |_____|
| —————————————
|—| END_FOR |
| —————————————
|
|
12-24 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
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SVCREQ
Use the Service Request (SVCREQ) function to request one of the following special PLC services:
Table 12-1. Service Request Functions
Function
16
17
18
19
12
13
14
15
8
9
10
11
6
7
4
5
1
2
3
20
21
22
23
24
25
26
27
28
29–31
32
39
44
Description
Change/Read Constant Sweep Timer.
Read Window Values.
Change Programmer Communications Window Mode and Timer Value.
Change System Communications Window Mode and Timer Value.
Change Background Task Window Mode and Timer Value.
Change/Read Checksum Task State and Number of Words to Checksum.
Change/Read Time-of-Day Clock State and Values.
Reset Watchdog Timer.
Read Sweep Time from Beginning of Sweep.
Read Folder Name.
Read PLC ID.
Read PLC Run State.
Shut Down PLC.
Clear Fault Tables.
Read Last-Logged Fault Table Entry.
Read Elapsed Time Clock.
Mask/Unmask I/O Interrupt.
Read I/O Override Status.
Set Run Enable/Disable.
Read Fault Tables.
User-Defined Fault Logging.
Mask/Unmask Timed Interrupts.
Read Master Checksum.
Reserved.
Disable/Enable EXE Block and Standalone C Program Checksums.
Role Switch
Write to Reverse Transfer Area.
Read from Reverse Transfer Area.
Reserved.
Suspend/Resume I/O Interrupt.
ESCM Port Status
Logic Driven Dynamic Ethernet Global Data
Page
12-28
12-31
12-45
12-46
12-47
12-48
12-49
12-53
12-54
12-55
12-57
12-32
12-33
12-34
12-36
12-38
12-42
12-43
12-44
12-58
12-62
12-64
12-65
–
12-67
12-68
12-69
12-69
–
12-70
12-72
12-74
The SVCREQ function has three input parameters and one output parameter. When the SVCREQ receives power flow, the PLC is requested to perform the function (FNC) indicated. Parameters for the function begin at the reference given for PARM. The SVCREQ function passes power flow
GFK-0265J Chapter 12 Control Functions 12-25
12
unless an incorrect function number, incorrect parameters, or out-of-range references are specified.
Additional causes for failure are described on the pages that follow.
The reference given for PARM is the first of a group that make up the “parameter block” for the function. Successive 16-bit locations store additional parameters. The total number of references required will depend on the type of SVCREQ function being used.
Parameter blocks may be used as both inputs for the function and the location where data may be output after the function executes. Therefore, data returned by the function is accessed at the same location specified for PARM.
_____
| |
(enable)
—| SVC_|—
(ok)
| |
| REQ |
| |
(service number) —|FNC |
| |
| |
(beginning reference) —|PARM |
|_____|
Parameters:
Parameter
enable
FNC
PARM ok
Description
When enable is energized, the requested service is performed.
FNC contains the constant or reference for the requested service.
PARM contains the beginning reference for the parameter block for the requested service.
The ok output is energized when the function is performed without error.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %U %R %P %L %AI %AQ %UR const none
enable
•
FNC
PARM ok
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Note: Indirect referencing is available for all register references (%R, %P, %L, %AI, %AQ, and %UR).
• Valid reference or place where power may flow through the function.
•
•
•
•
•
•
Note
For restrictions within a parameterized subroutine block, For restrictions within a parameterized subroutine block, refer to “Restrictions on Formal Parameters
Within a Parameterized Subroutine Block” in Section 2 of Chapter 2.
12-26 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
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Example:
In the following example, when the enabling input %I00001 is ON, SVCREQ function number 1 is called, with the parameter block located starting at %L00001. Output coil %M00001 is set ON if the operation succeeds.
| _____
|%I00001 | | %M00001
|——| |———| SVC_|———————————————————————————————————————————————————————————( )—
| | REQ |
| | |
| CONST —|FNC |
| 00001 | |
| | |
|%L00001—|PARM |
| |_____|
|
GFK-0265J Chapter 12 Control Functions 12-27
12
SVCREQ #1: Change/Read Constant Sweep Timer
Use SVCREQ function #1 to:
•
Disable
CONSTANT SWEEP
mode.
•
Enable
CONSTANT SWEEP
mode and use the old timer value.
•
Enable
CONSTANT SWEEP
mode and use a new timer value.
•
Set a new timer value only.
•
Read
CONSTANT SWEEP
mode state and timer value.
The parameter block has a length of two words.
To disable
CONSTANT SWEEP
mode, enter SVCREQ function #1 with this parameter block:
0 ignored address address + 1
To enable
CONSTANT SWEEP
mode, enter SVCREQ function #1 with this parameter block:
1
0 or timer value address address + 1
Note
If the timer should use a new value, enter it in the second word. If the timer value should not be changed, enter 0 in the second word. If the timer value does not already exist, entering 0 will cause the function to set the OK output to OFF.
To change the timer value without changing the selection for sweep mode state, enter SVCREQ function #1 with this parameter block:
2 new timer value address address + 1
To read the current timer state and value without changing either, enter SVCREQ function #1 with this parameter block:
3 ignored address address + 1
12-28 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
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Note
After using SVCREQ function #1 with the parameter block on the previous page,
Release 6 and higher CPUs will provide the return values 0 for Normal Sweep, 1 for Constant Sweep, or 2 for Microcycle. Do not confuse this with the input values shown below.
Successful execution will occur, unless:
1
.
A number other than 0, 1, 2, or 3 is entered as the requested operation:
0
1
2
3
Disable
CONSTANT SWEEP
mode.
Enable
CONSTANT SWEEP
mode.
Set a new timer value only.
Read
CONSTANT SWEEP
mode and timer value. (See Note above).
2
.
The time value is greater than 2550 ms (2.55 seconds).
3
.
Constant sweep time is enabled with no timer value programmed, or with an old value of 0 for the timer.
After the function executes, the function returns the timer state and value in the same parameter block references:
0 = disabled
1 = enabled current timer value address address + 1
If word address + 1 contains the hexadecimal value FFFF, no timer value has ever been programmed.
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Example:
This example shows logic in a program block. When enabling contact OV_SWP is set, the constant sweep timer is read, the timer is increased by two milliseconds, and the new timer value is sent back to the PLC. The parameter block is in local memory at location %L00050. Because the
MOVE and ADD functions require three horizontal contact positions, the example logic uses discrete internal coil %M00001 as a temporary location to hold the successful result of the first rung line. On any sweep in which OV_SWP is not set, %M00001 is turned off.
| _____ _____ _____
|OV_SWP | | | | | | %M00001
|——| |———|MOVE_|—————————————————| SVC_|——————————| ADD_|——————————————————( )—
| | UINT| | REQ | | INT |
| | | | | | |
| CONST —|IN Q|—%L00050 CONST —|FNC | %L00051—|I1 Q|—%L00051
| 00003 | LEN | 00001 | | | |
| |00001| | | | |
| |_____| %L00050—|PARM | CONST —|I2 |
| |_____| 00002 |_____|
| _____ _____
| M00001 | | | |
|——| |———|MOVE_|—————————————————|SVC_ |—
| |UINT | | REQ |
| | | | |
| CONST —|IN Q|—%L00050 CONST —|FNC |
| 00001 | LEN | 00001 | |
| |00001| | |
| |_____| %L00050—|PARM |
| |_____|
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SVCREQ #2: Read Window Values
Use SVCREQ function #2 to obtain the current window mode time values for the programmer communications window, the system communications window, and the background task window.
There are three modes for each window:
Mode Name
Limited Mode
Constant Mode
Run to Completion
Mode
Value
0
1
2
Description
The execution time of the window is limited to its respective default value or to a value defined using SVCREQ function #3 for the programmer communications window or SVCREQ function #4 for the systems communications window. The window will terminate when it has no more tasks to complete.
Each window will operate in a
RUN TO COMPLETION
mode, and the PLC will alternate among the three windows for a time equal to the sum of each window’s respective time value. If one window is placed in
CONSTANT
mode, the remaining two windows are automatically placed in
CONSTANT
mode. If the
PLC is operating in
CONSTANT WINDOW
mode and a particular window’s execution time is not defined using the associated
SVCREQ function, the default time for that window is used in the constant window time calculation.
Regardless of the window time associated with a particular window, whether default or defined using a service request function, the window will run until all tasks within that window are completed.
A window is disabled when the time value is zero.
The parameter block has a length of three words:
Programmer Window
System Communications Window
Background Window
High Byte
Mode
Mode
Low Byte
Value in ms
Value in ms address address + 1 address + 2
All parameters are output parameters. It is not necessary to enter values in the parameter block to program this function. Output values for all three windows are given in milliseconds.
Example:
In the following example, when enabling output %Q00102 is set, the PLC operating system places the current time values of the three windows in the parameter block starting at location %P00010.
Additional examples showing the Read Window Values function are included in the next three
SYS REQ function descriptions.
| _____
|%Q00102 | |
|——| |———| SVC_|
| | REQ |
| | |
| CONST —|FNC |
| 00002 | |
| | |
|%P00010—|PARM |
| |_____|
|
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SVCREQ #3: Change Programmer Communications Window Mode and
Timer Value
Use SVCREQ function #3 to change the programmer communications window mode and timer value. The change will occur in the CPU sweep following the sweep in which the function is called.
The SVCREQ function #3 will pass power flow to the right unless one of the following occurs:
1
.
A mode other than 0 (Limited), 1 (Constant), or 2 (Run-to-Completion) is selected.
2
.
The PLC is in Microcycle Sweep Mode and a mode other than 1 (Constant) is selected.
The parameter block has a length of one word.
To disable the programmer window, enter SVCREQ function #3 with this parameter block:
High Byte
0
Low Byte
0 address
To enable the programmer window, enter SVCREQ function #3 with this parameter block:
High Byte
Mode
Low Byte
Value from 1 to 255 ms address
Example:
In the following example, when enabling input %I00125 transitions on the programmer communications window is enabled and assigned a value of 25 ms. When the contact transitions off, the window is disabled. The parameter block is in global memory location %P00051.
| _____ _____
|%I00125 | | | |
|——|
↑
|———|MOVE_|—————————+—————————| SVC_|—
| | UINT| | | REQ |
| | | | | |
| CONST —|IN Q|—%P00051 | CONST —|FNC |
| 00025 | LEN | | 00003 | |
| |00001| | | |
| |_____| | %P00051—|PARM |
| | |_____|
| _____ |
|%I00125 | | |
|——|
↓
|———|MOVE_|—————————+
| | UINT|
| | |
| CONST —|IN Q|—%P00051
| 00000 | LEN |
| |00001|
| |_____|
|
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SVCREQ #4: Change System Communications Window Mode and Timer
Value
Use SVCREQ function #4 to change the system communications window mode and timer value.
The change will occur in the CPU sweep following the sweep in which the function is called.
The SVCREQ function #4 will pass power flow to the right unless one of the following occurs:
1
.
A mode other than 0 (Limited), 1 (Constant), or 2 (Run-to-Completion) is selected.
2
.
The PLC is in Microcycle Sweep Mode and a mode other than 1 (Constant) is selected.
The parameter block has a length of one word.
To disable the system communications window, enter SVCREQ function #4 with this parameter block:
High Byte Low Byte
0 0 address
To enable the system communications window, enter SVCREQ function #4 with this parameter block:
High Byte Low Byte
Mode Value from 1 to 255 ms address
Example:
In the following example, when enabling output %Q00125 transitions on the mode and timer value of the system communications window is read. If the timer value is greater than or equal to 25 ms, the value is not changed. If it is less than 25 ms, the value is changed to 25 ms. In either case, when the rung completes execution the window is enabled. The parameter block for all three windows is at location %P00051. Since the mode and timer for the system communications window is the second value in the parameter block returned from the Read Window Values function (function #2), the location of the existing window time for the system communications window is in the low byte of %P00052.
|
| _____ _____ _____
|%Q00125 | | | | | |
|——|
↑
|———| SVC_|——————————| AND_|——————————————————| AND_|
| | REQ | | WORD| | WORD|
| | | | | | |
| CONST —|FNC | %P00052—|I1 Q|—%P00060 %P00052—|I1 Q|—%P00061
| 00002 | | | | | |
| | | | | CONST —|I2 |
|%P00051—|PARM | CONST —|I2 | FF00 | |
| |_____| 00FF |_____| |_____|
| _____ _____ _____
|%Q00125 | | | | | |
|——|
↑
|———| LT | +————————————| OR |————————————————|SVC_ |—
| |UNIT | | |WORD | | REQ_|
| | | | | | | |
|%P00060—|I1 Q|———————+ %P00061—|I1 Q|—%P00052 CONST —|FNC |
| | | | | 00004 | |
| CONST —|I2 | CONST —|I2 | | |
| 00025 | | 00025 | | %P00052—|PARM |
| |_____| |_____| |_____|
|
Chapter 12 Control Functions 12-33
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SVCREQ #5: Change Background Task Window Mode
and Timer Value
Use the SVCREQ function # 5 to change the background task window mode and timer value. The change will occur during the same CPU sweep in which the function is called.
Use SVCREQ function #4 to enable or disable the system communications window. The change will occur in the same CPU sweep in which the function is called.
The SVCREQ function #4 will pass power flow to the right unless one of the following occurs:
1
.
A mode other than 0 (Limited), 1 (Constant), or 2 (Run-to-Completion) is selected.
2
.
The PLC is in Microcycle Sweep Mode and a mode other than 1 (Constant) is selected.
SVCREQ function #5 always passes power flow to the right. The parameter block has a length of
1 word.
To disable the background task window, enter SVCREQ function 5 with this parameter block:
High Byte Low Byte
0 0 address
To enable the background task window, enter SVCREQ function #5 with this parameter block:
High Byte Low Byte
Mode Value from 1 to 255 ms address
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Example:
In the following example, when enabling contact FST_SCN is set in the first scan, the MOVE function establishes a default value of 20 ms for the background task window, using a parameter block beginning at %P00050. Later in the program when input %I00500 transitions on, the state of the background task window toggles on and off. The parameter block for all three windows is at location %P00051. The time for the background task window is the third value in the parameter block returned from the Read Window Values function (function #2); therefore, the location of the existing window time for the system communications window is %P00053.
| _____
| FST_SCN | |
|———| |———|MOVE_|—
| | UINT|
| | |
| | |
| CONST—|IN Q|—%P00050
| 00020 | LEN |
| | 001 |
| |_____|
|
:
| _____ _____
| %I00500 | | | |
|———|
↑
|———|SVC_ |——————————| EQ_ |—
| | REQ | |UINT |
| | | | |
| | | | | %M00002
| CONST—|FNC | %P00053—|I1 Q|—————————————————————————————————————————( )—
| 00002 | | | |
| | | | |
| %P00051—|PARM | CONST—|I2 |
| |_____| 00000 |_____|
| _____ _____
| %I00500 %M00002 | | | |
|———|
↑
|———+———|/|———|MOVE_|—————————+————————|SVC_ |—
| | |UINT | | | REQ |
| | | | | | |
| | | | | | |
| | CONST—|IN Q|—%P00053 | CONST—|FNC |
| | 00000 | LEN | | 00005 | |
| | | 001 | | | |
| | |_____| |%P00053—|PARM |
| | | |_____|
| | _____ |
| | %M00002 | | |
| +———| |———|MOVE_|—————————+
| |UINT |
| | |
| | |
| %P00050—|IN Q|—%P00053
| | LEN |
| | 001 |
| |_____|
|
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SVCREQ #6: Change/Read Checksum Task State and Number of
Words to Checksum
Use SVCREQ function #6 to read the current word count or set a new word count. By default, 16 words will be checked. Successful execution will occur, unless some number other than 0 or 1 is entered as the requested operation (see below).
The parameter block has a length of two words.
To read the current word count, enter SVCREQ function #6 with this parameter block:
0 ignored address address + 1
After the function executes, the function returns the current checksum in the second word of the parameter block. No range is specified for the read function; the value returned is the number of words currently being checksummed.
0 current word count address address + 1
To set a new word count, enter SVCREQ function #6 with this parameter block:
1 new word count address address + 1
Entering 1 causes the PLC to adjust the number of words to be checksummed to the value given in the second word of the parameter block, rounded up to a multiple of 8. To disable checksumming, set the count to zero.
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Example:
In the following example, when enabling contact FST_SCN is set, the parameter blocks for the checksum task function are built. Later in the program when input %I00137 transitions on, the number of words being checksummed is read from the PLC operating system. This number is increased by 16, with the results of the ADD_UINT function being placed in the “hold new count for set” parameter. The second service request block requests the PLC to set the new word count.
| _____ _____
| FST_SCN | | | |
|———| |———| XOR_|—————————————————|MOVE_|
| | WORD| | UINT|
| | | | |
|%L00150 —|I1 Q|—%L00150 CONST —|IN Q|—%L00152
| | | 00001 | LEN |
| | | |00001|
|%L00150 —|I2 | |_____|
| |_____|
|
.
.
| _____ _____ _____
| %I00137 | | | | | |
|———|
↑
|——————| SVC_|—————————| ADD_|—————————————————| SVC_|—
| | REQ | | UINT| | REQ |
| | | | | | |
| CONST —|FNC |%L00151 —|I1 Q|—%L00153 CONST —|FNC |
| 00006 | | | | 00006 | |
| | | | | | |
| %L00150 —|PARM | CONST —|I2 | %L00152 —|PARM |
| |_____| 00016 |_____| |_____|
|
The example parameter blocks are located at address %L00150. They have the following content:
0 = read current count hold current count
1 = set current count hold new count for set
%L00150
%L00151
%L00152
%L00153
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SVCREQ #7: Change/Read Time-of-Day Clock State and Values
Use SVCREQ function #7 to read or set the time-of-day clock in the PLC.
The length of the parameter block depends on the data format. Numeric and unpacked BCD each require nine words. BCD format requires six words. Packed ASCII requires twelve words.
0 = read time and date
1 = set time and date
0 = numeric data format
1 = BCD format
2 = unpacked BCD format
3 = packed ASCII format data address (word 1) address + 1 (word 2) address + 2 to end (word 3)
In word 1, specify whether the function should read or change the values.
0 = read
1 = change (write)
In word 2, specify a data format (i.e., the format used to read or write):
0 = numeric
1 =
2 =
3 =
BCD unpacked BCD packed ASCII with embedded spaces and colons
Words 3 to the end of the parameter block contain output data returned by a read function, or new data being supplied by a change function. In both cases, format of these data words is the same.
When reading the date and time, words (address + 2) through (address + 8) of the parameter block are ignored on input.
Successful execution will occur unless:
•
Some number other than 0 or 1 is entered as the requested operation (see below).
•
An invalid data format is specified.
•
The data provided is not in the expected format.
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Example:
In the following example, when output %Q00476 is on, a parameter block for the time-of-day clock is built to first request the current date and time, and then set the clock to 12 noon using the
BCD format. The parameter block is located at global data location %P00300. Array NOON has been set up elsewhere in the program to contain the values 12, 0, and 0. (Array NOON must also contain the data at %R0300.) The BCD format requires six contiguous memory locations for the parameter block.
| _____ _____
|%Q00476 | | | |
|——|
↑
|———|MOVE_|—————————————————|MOVE_|—
| | INT | | INT |
| | | | |
| CONST —|IN Q|— NOON CONST —|IN Q|—MIN_SEC
| +04608 | LEN | +00000 | LEN |
| |00001| |00001|
| |_____| |_____|
|
| _____ _____ _____
|%T00016 | | | | | | %T00001
|——| |———|MOVE_|—————————————————|MOVE_|—————————————————|SVC_ |———————————( )—
| | INT | | INT | | REQ |
| | | | | | |
| CONST —|IN Q|—%R00300 CONST —|IN Q|—%P00301 CONST —|FNC |
| +00000 | LEN | +00001 | LEN | +00007 | |
| |00001| |00001| | |
| |_____| |_____| %P00300—|PARM |
| |_____|
|
| _____ _____
|%T00001 %I00017 | | | |
|——| |—————| |—————| AND_|———————————————————| ADD_|
| | WORD| | INT |
| | | | |
| %P00303 —|I1 Q|—%P00303 %R00303 —|IN Q|—%R00303
| | | | |
| CONST —|I2 | NOON —|I2 |
| 00FF |_____| |_____|
|
| _____ _____ _____
|%T00001 %I00017 | | | | | |
|——| |—————| |—————|MOVE_|—————————————————|MOVE_|—————————————————| SVC_|—
| | INT | | INT | | REQ |
| | | | | | |
| MIN_SEC—|IN Q|—%P00304 CONST —|IN Q|—%P00300 CONST —|FNC |
| | LEN | +00001 | LEN | +00007 | |
| |00002| |00001| | |
| |_____| |_____| %P00300—|PARM |
| |_____|
|
Parameter Block Contents
Parameter block contents for the four different data formats are shown on the following pages. For all data formats, hours are stored in a 24-hour format, and the day of the week is a numeric value.
Value Day of the Week
5
6
3
4
7
1
2
Sunday
Monday
Tuesday
Wednesday
Thursday
Friday
Saturday
Chapter 12 Control Functions 12-39
12
To Change/Read Date and Time Using Numeric Format:
In numeric format, year, month, day of month, hours, minutes, seconds and day of week each occupy one unsigned integer. To read and/or change the date and time using numeric format, enter
SVCREQ function #7 with this parameter block:
High Byte
1 = change or
0
Low Byte
0 = read year month day of month hours minutes seconds day of week address address + 1 address + 2 address + 3 address + 4 address + 5 address + 6 address + 7 address + 8
Example output parameter block:
Read Date and Time in Numeric Format
(Weds, June 15, 1988 at 12:15:30)
0
0
15
30
04
88
06
15
12
To Change/Read Date and Time Using BCD Format:
In BCD format, each of the time and date items occupies a single byte. This format requires six words. The last byte of the sixth word is not used. When setting the date and time, this byte is ignored; when reading date and time, the function returns a null character (00).
High Byte
1 = change or
1 month hours seconds
(null)
Low Byte
0 = read year day of mo.
minutes day of week address address + 1 address + 2 address + 3 address + 4 address + 5
Example output parameter block:
Read Date and Time in BCD Format
(Mon, July 3, 1988 at 2:45:30 p.m.)
07
14
30
00
0
1
88
03
45
02
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To Change/Read Date and Time Using Unpacked BCD Format:
In Unpacked BCD format, each digit of the time and date items occupies the low order four bits of a byte. The upper four bits of each byte are always zero. This format requires nine words.
High Byte
1 = change or
2
Low Byte
0 = read year month day of month hours minutes seconds day of week address address + 1 address + 2 address + 3 address + 4 address + 5 address + 6 address + 7 address + 8
Example output parameter block:
Read Date and Time in Unpacked BCD Format
(Thurs, Dec. 28, 1989 at 9:34:57)
0h
2h
08h
01h
02h
00h
09h
02h
08h
09h
03h
05h
00h
04h
07h
05h
To Change/Read Date and Time Using Packed ASCII with Embedded Colons
Format:
In Packed ASCII format, each digit of the time and date items is an ASCII formatted byte. In addition, spaces and colons are embedded into the data to permit it to be transferred unchanged to a printing or display device. This format requires 12 words.
High Byte
1 = change or
3 year month
(space) day of mo.
hours
: minutes seconds
(space) day of week
Low Byte
0 = read year
(space) month day of mo.
(space) hours
: minutes seconds day of week address address + 1 address + 2 address + 3 address + 4 address + 5 address + 6 address + 7 address + 8 address + 9 address + 10 address + 11
Example output parameter block:
Read Date and Time in Packed ASCII Format
(Tues, Oct. 2, 1989 at 23:13:00)
0h
3h
39h
31h
20h
32h
38h
20h
30h
30h
32h
3Ah
33h
30h
20h
20h
33h
31h
3Ah
30h
33h 30h
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SVCREQ #8: Reset Watchdog Timer
Use SVCREQ function #8 to reset the watchdog timer during the sweep. When the watchdog timer expires, the PLC shuts down without warning. This function allows the timer to keep going during a time-consuming task (for example, while waiting for a response from a communications line).
Caution
Be sure that restarting the watchdog timer does not adversely affect the controlled process.
This function has no associated parameter block; however, the programming software requires that an entry be made for PARM. Enter any appropriate reference here; it will not be used.
Example:
In the following example, when enabling output %Q00127 or input %I01476 or internal coil
%M00010 is set, the watchdog timer is reset.
| _____
|%Q00127 | |
|——| |———+—————————| SVC_|—
| | | REQ |
|%I01476 | | |
|——| |———| CONST —|FNC |
| | 00008 | |
|%M00010 | | |
|——| |———+ %AI0001—|PARM |
| |_____|
|
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SVCREQ #9: Read Sweep Time from Beginning of Sweep
Use SVCREQ function #9 to read the time in milliseconds since the start of the sweep. The data format is in unsigned 16-bit integer.
The parameter block is an output parameter block only; it has a length of one word.
time since start of sweep address
Example:
In the following example, the elapsed time from the start of the sweep is always read into location
%P00200. If it is greater than the value in %P00201, internal coil %M00200 is turned on.
| _____ _____
| | | | |
|————————| SVC_|——————————| GT_ |—
| | REQ | | UINT|
| | | | | %M00200
| CONST —|FNC | %P00200—|I1 Q|——————————————————————————————————————————( )—
| 00009 | | | |
| | | | |
|%P00200—|PARM | %P00201—|I2 |
| |_____| |_____|
|
Note
This SVCREQ has a different meaning with Microcycle mode. It reflects the time from the beginning of the sweep in which the program was scheduled to begin execution.
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SVCREQ #10: Read Folder Name
Use SVCREQ function #10 to read the name of the currently-executing folder.
The output parameter block has a length of four words. It returns eight ASCII characters; the last is a null character (00h). If the program name has fewer than seven characters, null characters are appended to the end.
Low Byte character 1 character 3 character 5 character 7
High Byte character 2 character 4 character 6
00 address address + 1 address + 2 address + 3
Example:
In the following example, when enabling input %I00301 transitions off, register location %R00099 is loaded with the value 10, which is the function code for the Read Folder Name function. The
Program Block READ_ID is then called to actually retrieve the folder name. The parameter block is located at address %R00100. READ_ID is also used in the next example.
| _____ __________
|%I00301 | | | |
|——|
↓
|———|MOVE_|——————————| READ_ID |
| | UINT| |__________|
| | |
| CONST —|IN Q|—%R00099
| 00010 | LEN |
| |00001|
| |_____|
|
.
.
.
Program Block READ_ID
| _____
| | |
|————————| SVC_|—
| | REQ |
| | |
|%R00099—|FNC |
| | |
| | |
|%R00100—|PARM |
| |_____|
|
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SVCREQ #11: Read PLC ID
Use SVCREQ function #11 to read the name of the Series 90 PLC executing the program.
The output parameter block has a length of four words. It returns eight ASCII characters; the last is a null character (00h). If the PLC ID has fewer than seven characters, null characters are appended to the end.
Low Byte character 1 character 3 character 5 character 7
High Byte character 2 character 4 character 6
00 address address + 1 address + 2 address + 3
Example:
In the following example, when enabling input %I00302 transitions off, register location %R00099 is loaded with the value 11, which is the function code for the Read PLC ID function. The program block READ_ID is then called to actually retrieve the ID. The parameter block is located at address %R00100. Except for the enabling contact and function number, this is the same code used in the previous example.
| _____ __________
|%I00303 | | | |
|——|
↓
|———|MOVE_|——————————| READ_ID |—
| | UINT| |__________|
| | |
| CONST —|IN Q|—%R00099
| 00011 | LEN |
| |00001|
| |_____|
|
.
.
.
Program Block READ_ID
| _____
| | |
|————————| SVC_|—
| | REQ |
| | |
|%R00099—|FNC |
| | |
| | |
|%R00100—|PARM |
| |_____|
|
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SVCREQ #12: Read PLC Run State
Use SVCREQ function #12 to read the current RUN state of the PLC CPU.
The parameter block is an output parameter block only; it has a length of one word.
1 = run/disabled
2 = run/enabled address
Example:
In the following example, the PLC run state is always read into location %L01002. If the state is
Run/Disabled, the CALL function calls program block DISPLAY.
| _____ _____
| | | | |
|————————| SVC_|——————————| EQ_ |—
| | REQ | | UINT| __________
| | | | | | |
| CONST —|FNC | DISABL—|I1 Q|————————| DISPLAY |—
| 00012 | | | | |__________|
| | | | |
|%L01002—|PARM | %L01002—|I2 |
| |_____| |_____|
|
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SVCREQ #13: Shut Down (Stop) PLC
Use SVCREQ function #13 to stop the PLC at the end of the current sweep. All outputs will go to their designated default states at the beginning of the next PLC sweep. An informational fault is placed in the PLC fault table, noting that a “SHUT DOWN PLC” function block was executed.
This function has no parameter block; however, Logicmaster 90-70 software requires an entry be made for PARM.
Example:
In the following example, when enabling input %I00001 is set and a lost rack fault occurs,
SVCREQ function #13 executes. Since no parameter block is needed, the PARM input is not used; however, the programming software requires that an entry be made for PARM.
This example uses a JUMP to the end of the program to force a shutdown if the Shutdown PLC function executes successfully. This JUMP and LABEL are needed because the transition to
STOP
mode does not occur until the end of the sweep in which the function executes.
| _____
|%I00001 LOS_RCK | |
|——| |—————|
↑
|————————————————| SVC_|———————————————————————————————>> END_PRG
| | REQ |
| | |
| CONST —|FNC |
| 00013 | |
| | |
| %R00100 —|PARM |
| |_____|
|
.
.
.
|
| END_PRG
|
|
[END OF PROGRAM]
|
GFK-0265J Chapter 12 Control Functions 12-47
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SVCREQ #14: Clear Fault Tables
Use SVCREQ function #14 to clear either the PLC or I/O fault table. The SVCREQ output is set
ON, unless some number other than 0 or 1 is entered as the requested operation (see below).
The parameter block is an input parameter block only; it has a length of one word.
0 = Clear PLC fault table.
1 = Clear I/O fault table.
address
Example:
In the following example, when input %I00346 is on and input %I00349 transitions on, the PLC fault table is cleared. When input %I00347 is on and input %I00349 transitions on, the I/O fault table is cleared. When input %I00348 is on and input %I00349 transitions on, both are cleared.
The parameter block for the PLC fault table is located at %P00500; for the I/O fault table, the parameter block is located at %P00550. Both parameter blocks are set up elsewhere in the program.
| _____ _____
|%I00349 | | | |
|——|
↑
|———|MOVE_|—————————————————|MOVE_|—
| | INT | | INT |
| | | | |
| CONST —|IN Q|—%P00500 CONST —|IN Q|—%P00550
| +00000 | LEN | +00001 | LEN |
| |00001| |00001|
| |_____| | |
| |_____|
| _____
|%I00349 %I00346 | |
|——|
↑
|——+——| |——+————————| SVC_|—
| | | | REQ |
| |%I00348| | |
| |——| |——+ CONST —|FNC |
| | 00014 | |
| | | |
| | %P00500—|PARM |
| |%I00347 |_____|
| |——| |——+
| | | _____
| |%I00348| | |
| +——| |——+————————| SVC_|
| | REQ |
| | |
| CONST —|FNC |
| 00014 | |
| | |
| %P00550—|PARM |
| |_____|
|
12-48 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
12
SVCREQ #15: Read Last-Logged Fault Table Entry
Use SVCREQ function #15 to read the last entry logged in either the PLC or I/O fault table. The
SVCREQ output is set ON, unless some number other than 0, 1, 80, or 81 (hexadecimal base) is entered as the requested operation (see below) or the fault table is empty. (For more information on fault table entries, refer to chapter 3, “Fault Explanation and Correction.”)
The parameter block has a length of 22 words. The input parameter block has this format:
0 = Read PLC fault table.
1 = Read I/O fault table.
80h = Read extended PLC fault table.
81h = Read extended I/O fault table.
address
The format for the output parameter block depends on whether the function reads data from the
PLC fault table, the I/O fault table, the extended PLC fault table (see next page), or the extended
I/O fault table (see next page).
PLC Fault Table Output Format
High Byte Low Byte
0 spare
PLC fault address
fault group and action error code fault specific data time stamp long/short address address + 1 address + 2
address + 3 address + 4 address + 5
address + 6
address + 7 address + 8
address + 9
address + 10
address + 11 address + 12
address + 13
address + 14
address + 15
address + 16
address + 17
address + 18
address + 19
address + 20
address + 21
I/O Fault Table Output Format
High Byte Low Byte
1 long/short reference
I/O fault address fault group and action fault type fault category fault description fault specific data time stamp
GFK-0265J Chapter 12 Control Functions 12-49
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In the least significant byte of word address + 1, the Long/Short indicator defines the quantity of fault specific data present in the fault entry.
As mentioned on the previous page, the format for the output parameter block depends on whether the function reads data from the PLC fault table, the I/O fault table, the extended PLC fault table, or the extended I/O fault table. The extended versions are shown below:
Extended PLC Fault Table Output
Format
High Byte Low Byte
80h long/short spare
PLC fault address
fault group and action error code fault specific data time stamp reserved address address + 1 address + 2
address + 3 address + 4 address + 5
address + 6
address + 7 address + 8
address + 9
address + 10
address + 11 address + 12
address + 13
address + 14
address + 15
address + 16
address + 17
address + 18
address + 19
address + 20
address + 21
address + 22
address + 23
Extended I/O Fault Table Output
Format
High Byte Low Byte
81h long/short reference
I/O fault address fault group and action fault type fault category fault description fault specific data time stamp reserved
Since the extended fault format is 2 words (4 bytes) longer than the standard format, the amount of reference memory needed to read the last fault has increased. The following table shows the number of bytes needed to read the last fault entry in each of the fault formats.
Fault Table
PLC fault table
Extended PLC fault table
I/O fault table
Extended I/O fault table
Number of Bytes
00 = 8 bytes (short
01 = 24 bytes (long)
02 = 5 bytes (short
03 = 21 bytes (long)
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Example 1:
In the following example, when input %I00251 is on and input %I00250 transitions on, the last entry in the PLC fault table is read into the parameter block. When input %I00251 is off and input
%I00250 transitions on, the last entry in the I/O fault table is read into the parameter block. The parameter block is located in global memory at location %P00600.
| _____
|%I00250 %I00251 | |
|——|
↑
|———+———| |———|MOVE_|—————————+
| | | UINT| |
| | | | |
| | CONST —|IN Q|—%P00600 |
| | 00000 | LEN | |
| | |00001| | _____
| | |_____| | | |
| | |—————————| SVC_|—
| | _____ | | REQ |
| |%I00251 | | | | |
| +——|/|———|MOVE_|——————————+ CONST —|FNC |
| | UINT| 00015 | |
| | | | |
| CONST —|IN Q |—%P00600 %P00600—|PARM |
| 00001 | LEN | |____ |
| |00001|
| |_____|
|
Example 2:
In the next example, the PLC is shut down when any fault occurs on an I/O module except when the fault occurs on boards in rack 0, slot 9 and in rack 1, slot 9. If faults occur on these two modules, the system remains running. The parameter for “table type” is set up on the first sweep.
The contact IO_PRES, when set, indicates that the I/O fault table contains an entry. The PLC CPU sets the up transition contact in the sweep after the fault logic places a fault in the table. If faults are placed in the table in two consecutive sweeps, the up transition contact is set for two consecutive sweeps.
The example uses a parameter block located at global memory %P00600. After the SVCREQ function executes, the fourth, fifth, and sixth words of the parameter block contain the address of the I/O module that faulted:
1 long/short reference address rack number
I/O bus no.
point address fault data slot number bus address
%P00600
%P00601
%P00602
%P00603
%P00604
%P00605
GFK-0265J Chapter 12 Control Functions 12-51
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In the program, the EQ_UINT blocks compare the rack/slot address in the table to hexadecimal constants. The internal coil %M00007 is turned on when the rack/slot where the fault occurred meets the criteria specified above. If %M00007 is on, its normally closed contact is off, preventing the shutdown. Conversely, if %M00007 is off because the fault occurred on a different module, the normally closed contact is on and the shutdown occurs.
| _____
|FST_SCN | |
|——| |———|MOVE_|—
| | UINT|
| | |
| CONST —|IN Q|—%P00600
| 00001 | LEN |
| |00001|
| |_____|
|
.
.
| _____ _____
|IO_PRES | | | |
|——|
↑
|———|SVC_ |—————————+—————————| EQ_ |—
| | REQ | | | UINT|
| | | | | | %M00007
| CONST —|FNC | | %P00603—|I1 Q|—————————+———————————————————————( )—
| 00015 | | | | | |
| | | | | | |
|%P00600—|PARM | | CONST —|I2 | |
| |_____| | 0109 |_____| |
| | _____ |
| | | | |
| +—————————| EQ_ |— |
| | UINT| |
| | | |
| %P00603—|I1 Q|—————————+
| | |
| | |
| CONST—|I2 |
| 0009 |_____|
|
| _____
|IO_PRES %M00007 | |
|——|
↑
|—————|/|———|SVC_ |—
| | REQ |
| | |
| CONST —|FNC |
| 00013 | |
| | |
| | |
| —|PARM |
| |_____|
|
12-52 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
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SVCREQ #16: Read Elapsed Time Clock
Use SVCREQ function #16 to read the value of the system’s elapsed time clock. This clock tracks elapsed time in seconds since the PLC powered on. The timer will roll over approximately once every 100 years.
The parameter block is an output parameter block only; it has a length of three words.
seconds from power on (low order) seconds from power on (high order)
100 microsecond ticks address address + 1 address + 2
The first two words are the elapsed time in seconds. The last word is the number of 100 microsecond ticks in the current second.
Example:
In the following example, when internal coil %M00233 transitions on, the value of the elapsed time clock is read and coil %M00234 is set. When it transitions off, the value is read again. After the off transition, the difference between the values is calculated and the result is stored in register memory at location %R00250.
The parameter block for the first read is at %P00127; for the second read, at %P00131. The calculation ignores the number of hundred microsecond ticks and the fact that the DINT type is actually a signed value. The calculation is correct until the time since power on reaches approximately 50 years.
| _____
|%M00233 | | %M00234
|——|
↑
|—————| SVC_|—————————————————————————————————————————————————————————(S)—
| | REQ |
| | |
| | |
| CONST —|FNC |
| 00016 | |
| | |
| %P00127—|PARM |
| |_____|
|
| _____ _____
|%M00233 | | %M00234 | | %M00234
|——|
↓
|—————| SVC_|—————————————| |———| SUB_|———————————————————————————————(R)—
| | REQ | | DINT|
| | | | |
| CONST —|FNC | %P00131—|I1 Q|—%R00249
| 00016 | | | |
| | | | |
| %P00131—|PARM | %P00127—|I2 |
| |_____| |_____|
|
GFK-0265J Chapter 12 Control Functions 12-53
12
SVCREQ #17: Mask/Unmask I/O Interrupt
Use SVCREQ function #17 to mask or unmask an interrupt from an input board. When an interrupt is masked, the PLC CPU will not execute the corresponding interrupt block when the input transitions and causes an interrupt.
The parameter block is an input parameter block only; it has a length of three words.
0 = unmask input
1 = mask input memory type reference (offset) address address + 1 address + 2
“Memory type” is a decimal number that resides in the low byte of word address + 1. It corresponds to the memory type of the input:
70 = %I memory in bit mode
10 = %AI memory
Successful execution will occur unless:
•
Some number other than 0 or 1 is entered as the requested operation.
•
The memory type of the input to be masked or unmasked is not %I or %AI memory.
•
The I/O board is not an appropriate Series 90 input module.
•
The reference address specified does not correspond to a valid interrupt trigger reference.
•
The specified channel does not have its interrupt enabled in the configuration.
Example 1:
In the following example, when %I00346 transitions on, interrupts from input %I00033 are masked. The parameter block at %P00347 is set up on the first sweep.
| _____ _____
|FST_SCN | | | |
|——| |———|MOVE_|—————————————————|MOVE_|—
| | UINT| | UINT|
| | | | |
| CONST —|IN Q|—%P00348 CONST —|IN Q|—%P00349
| 00070 | LEN | 00033 | LEN |
| |00001| |00001|
| |_____| |_____|
|
| _____ _____
|%I00346 | | | |
|——|
↑
|———|MOVE_|—————————————————| SVC_|—
| | UINT| | REQ |
| | | | |
| CONST —|IN Q|—%P00347 CONST —|FNC |
| 00001 | LEN | 00017 | |
| |00001| | |
| |_____| %P00347—|PARM |
| |_____|
|
12-54 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
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Example 2:
In the following example, when %T00001 transitions on, alarm interrupts from input %AI0006 are masked. The parameter block at %R00100 is set up on the first sweep.
| _____ _____
|FST_SCN | | | |
|——| |———|MOVE_|—————————————————|MOVE_|—
| | UINT| | UINT|
| | | | |
| CONST —|IN Q|—%R00101 CONST —|IN Q|—%R00102
| 00010 | LEN | 00006 | LEN |
| |00001| |00001|
| |_____| |_____|
|
| _____ _____
|%T00001 | | | |
|——|
↑
|———|MOVE_|—————————————————| SVC_|—
| | UINT| | REQ |
| | | | |
| CONST —|IN Q|—%R00100 CONST —|FNC |
| 00001 | LEN | 00017 | |
| |00001| | |
| |_____| %R00100—|PARM |
| |_____|
|
GFK-0265J Chapter 12 Control Functions 12-55
12
SVCREQ #18: Read I/O Override Status
Use SVCREQ function #18 in order to read the current status of %I and %Q overrides in the CPU.
The parameter block is an output parameter block only; it has a length of one word.
0 = No overrides are set.
1 = Overrides are set.
address
Example:
In the following example, the status of I/O overrides is always read into location %L01003. If any overrides are present, program block DISP_OR is called.
| _____ _____
| | | | |
|————————| SVC_|——————————| EQ_ |—
| | REQ | | UINT| _________
| | | | | | |
| CONST —|FNC | CONST —|I1 Q|—————————| DISP_OR |
| 00018 | | 00001 | | |_________|
| | | | |
|%L01003—|PARM | %L01003—|I2 |
| |_____| |_____|
|
Note
SVCREQ #18 does not detect overrides in %G or %M memory types. Use
%S0011 (OVR_PRE) to detect overrides in %I, %Q, %G, and/or %M memory types..
12-56 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
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SVCREQ #19: Set Run Enable/Disable
Use SVCREQ function #19 to permit the ladder program to control the
RUN
mode of the CPU.
The parameter passed indicates which function to perform. The OK output is turned ON if the function executes successfully. It is set OFF if the requested operation is not
SET RUN
DISABLE
mode (1) or
SET RUN ENABLE
mode (2).
The parameter block is an input parameter block only with this format:
Address
1 =
SET RUN DISABLE
mode.
2 =
SET RUN ENABLE
mode.
Example:
In the following example, when input %I00157 transitions to on, the
RUN DISABLE
mode is set. When the SVCREQ function successfully executes, coil %Q00157 is turned on. When
%Q00157 is on and register %R00099 is greater than zero, the mode is changed to
RUN ENABLE
mode. When the SVCREQ successfully executes, coil %Q00157 is turned off.
| _____ _____
|%I00157 | | | | %Q00157
|——|
↑
|———|MOVE_|——————————————————| SVC_|——————————————————————————————————(S)—
| | UINT| | REQ |
| | | | |
| CONST —|IN Q|—%R00100 CONST —|FNC |
| 00001 | LEN | 00019 | |
| |00001| | |
| |_____| %R00100—|PARM |
| |_____|
| _____
|%Q00157 | |
|——| |———| GT_|—
| | UINT| _____ _____
| | | | | | | %Q00158
|%R00099—|I1 Q|————————|MOVE_|————————————————| SVC_|—————————————————————(R)—
| | | | UINT| | REQ |
| | | | | | |
| CONST —|I2 | CONST —|IN Q|—%R00100 CONST —|FNC |
| 00000 |_____| 00002 | LEN | 00019 | |
| |00001| | |
| |_____| %R00100—|PARM |
| |_____|
|
GFK-0265J Chapter 12 Control Functions 12-57
12
12-58
SVCREQ #20: Read Fault Tables
Use SVCREQ function #20 to retrieve the entire PLC or I/O fault table and return it to the ladder program in designated registers. The first input parameter designates which table is to be read. A second input parameter (always zero for the standard Read Fault Tables) is used by the extended format to read a designated fault entry or to read a range of fault entries. The fault table data is placed in the parameter block following the input parameters.
The OK output is turned on if the function executes successfully. It is off if the requested operation is not Read PLC Fault Table (00h), Read I/O Fault Table (01h), Read Extended PLC Fault Table
(80h), or Read Extended I/O Fault Table (81h), or if there is not enough of the specified memory reference to hold the fault data. If the specified fault table is empty, the function sets the OK output on, but does returns only the fault table header information.
Input and Output Parameter Format for the Non-Extended Formats
The parameter block is an input and output parameter block. The Read PLC Fault Table (00h) and
Read I/O Fault Table (01h), the input parameter block has the following format:
Address
Address + 1
00h = Read PLC fault table.
01h = Read I/O fault table.
Always zero (0).
The output parameter block has this format:
Address 0 = PLC fault table
1 = I/O fault table
Always zero (0) Address + 1
Address + 2 through
Address + 14
Address + 15
Address + 16
Address + 17
Address + 18
Address + 19
Address + 20
Address + 21
Unused
Time since last clear
Number of faults since last clear
Number of faults in queue
Number of faults read
Start of fault data
For the non-extended formats, each fault table entry is 21 words long (42 bytes). There are a maximum of 16 PLC fault table entries and 32 I/O fault table entries. If the fault table read is empty, no data is returned.
Note
SVCREQ #20 will not work unless there are 693 registers available.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
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Input and Output Parameter Format for the Extended Formats
The parameter block is an input and output parameter block. The Read Extended PLC Fault Table
(80h) and Read Extended I/O Fault Table (81h), the input parameter block has the following format:
Address
Address + 1
Address + 2
80h = Read extended PLC fault table.
81h = Read extended I/O fault table.
Starting index of faults to be read.
Number of faults to be read.
The output parameter block has this format:
Address 80h = Extended PLC fault table
81h = Extended I/O fault table
Starting index of faults to be read.
Address + 1
Address + 2 through
Address + 14
Address + 15
Address + 16
Address + 17
Address + 18
Address + 19
Address + 20
Address + 22
Address + 23
Address + 24
Address + 25
Address + 26
Address + 27
Address + 28
Address + 29
Address + 30
Address + 31
Address + 32
Address + 33
Address + 34
Address + 35
Address + 36
Address + 37
Unused
Time since last clear
Number of faults since last clear
Number of faults in queue
Number of faults read
PLC name
Start of fault data
GFK-0265J Chapter 12 Control Functions 12-59
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12-60
For Read Extended PLC Fault Table (80h) and Read Extended I/O Fault Table (81h), each extended fault table entry is 23 words long (46 bytes). There are a maximum of 40 PLC fault table entries and 40 I/O fault table entries. The default values are 16 PLC fault table entries and 32 I/O fault table entries. If the fault table read is empty, no data is returned.
Note
For the non-extended format, SVCREQ #20 will not work unless there are 693 consecutive registers available (beginning with the starting point). For the extended format, the PLC calculates the number of entries being read and returns an error if not enough registers.
The total size of the fault table for the extended fault format is
Header Size + ((# fault entries) * (size of fault entry))
The following table shows the return format of both a PLC fault table entry and an I/O fault table entry.
Address
Address + 21
Address + 22
Address + 23
Address + 24
Address + 25
Address + 26
Address + 27
Address + 28
Address + 29
Address + 30
Address + 31
Address + 32
Address + 33
Address + 34
Address + 35
Address + 36
Address + 37
Address + 38
Address + 39
Address + 40
Address + 41
PLC Fault Table
Long/Short
Spare
PLC fault address
PLC fault address
Fault group and action
Error code
Fault extra data
Fault extra data
Fault extra data
Fault extra data
Fault extra data
Fault extra data
Fault extra data
Fault extra data
Fault extra data
Fault extra data
Fault extra data
Fault extra data
Time stamp
Time stamp
Time stamp
I/O Fault Table
Long/Short
Reference Address
I/O fault address
I/O fault address
I/O fault address
Fault group and action
Fault category and type
Fault description
Fault specific data
Fault specific data
Fault specific data
Fault specific data
Fault specific data
Fault specific data
Fault specific data
Fault specific data
Fault specific data
Fault specific data
Time stamp
Time stamp
Time stamp
The Long/Short indicator in the first byte of Address + 21 defines the quantity of fault data present in the fault entry. In the PLC fault table, a long/short value of 00 represents 8 bytes of fault extra data present in the fault entry, and 01 represents 24 bytes of fault extra data. In the I/O fault table,
02 represents 5 bytes of fault specific data, and 03 represents 21 bytes.
For an explanation of each field, refer to Appendix B, “Interpreting Fault Tables Using
Logicmaster 90-70 Software.”
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Example:
In the example below, when input %M00033 transitions on, the PLC fault table is read. When
%M00034 transitions on, the I/O fault table is read. The parameter block is located at %R00500.
When the SVCREQ function successfully executes, coil %M00035 is turned on.
| _____ _____
|%M00033 | | | | %M00035
|——|-|—————|MOVE_|——————————+——————————| SVC_|——————————————————————————(S)—
| | UINT| | | REQ |
| | | | | |
| CONST —|IN Q |—%R00500 | CONST —|FNC |
| 00000 | LEN | | 00020 | |
| |00001| | | |
| |_____| | %R00500—|PARM |
| | |_____|
| _____ |
|%M00034 | | |
|——|-|—————|MOVE_|——————————+
| | UINT|
| | |
| CONST —|IN Q|—%R00500
| 00001 | LEN |
| |00001|
| |_____|
Example Extended Format:
In the example below, when input %M00033 transitions on, the Extended PLC fault table is read.
The parameter block is located at %R00500. %R00500 contains the fault table type (PLC
Extended); %R00501 contains the starting fault to read, and %R005002 contains the number of faults to read starting with the fault number in %R00501. When the SVCREQ function successfully executes, coil %M00034 is turned on.
| _____ _____ _____
|%M00033 | | | | | |
|——|
↑
|———|MOVE_|——————————————————|MOVE_|——————————————————|MOVE_|——————————(+)———
| | WORD| | WORD| | WORD|
| | | | | | |
| CONST —|IN Q|—%R00500 CONST —|IN Q|—%R00501 CONST —|IN Q|
| 00080 | LEN | 00001 | LEN | 00010 | LEN |
| |00001| |00001| |00001|
| |_____| |_____| | |
| |_____|
| _____
|%M00033 | | %M00034
|——|-|———|SVC__| —————————————————————————————————————————————————————————————(S)—
| | REQ |
| | |
| CONST —|FNC |
| 00020 | |
| | |
|%R00500—|PARM |
| |_____|
|
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12-62
SVCREQ #21: User-Defined Fault Logging
Use SVCREQ function #21 to define a fault that can be displayed in the PLC fault table. The fault contains binary information or an ASCII message. The user-defined fault codes start at 0 hex.
The error code information for the fault must be within the range 0 to 2047 in order for an
“Application Msg:” to be displayed. If the error code is in the range 81 to 112 decimal the PLC
CPU sets a fault bit of the same number in %SA system memory. This allows up to 32 bits to be individually set.
Error Code
Error 0 - 80
Error 81 - 112
Error 113 - 2047
Error 2048 – 32,767
Status Bit
No bit set.
Sets %SA.
No bit set.
Reserved.
When EN is active, the fault data array referenced by IN is logged as a fault to the PLC fault table.
If EN is not enabled, the ok bit is cleared. If the error code is out of range, the ok bit is cleared and the fault will not be logged as requested.
The parameter block is an input parameter block only with this format:
Parameter
Address
Address + 1
Address + 2
Address + 3
Address + 4
Address + 5
Address + 6
Address + 7
Address + 8
Address + 9
Address + 10
Address + 11
Address + 12
Text 2
Text 4
Text 6
Text 8
Text 10
Text 12
Text 14
Text 16
Text 18
Text 20
Text 22
Text 24
MSB LSB
Error Code
Text 1
Text 3
Text 5
Text 7
Text 9
Text 11
Text 13
Text 15
Text 17
Text 19
Text 21
Text 23
The input parameter data allows you to select an error code in the range 0 to 2047 and text information that will be placed in the fault extra data portion of a long PLC fault. The PLC fault address, fault group, and fault action are filled in by the function block.
The fault text bytes 1 – 24 can be used to pass binary or ASCII data with the fault. If the first byte of the fault text data is non-zero, the data will be an ASCII message string. This message will then be displayed in the fault description area of the fault table. If the message is less than 24 characters, the ASCII string must be NULL byte-terminated. The programmer will display
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12
“Application Msg:” and the ASCII data will be displayed as a message immediately following
“Application Msg:”. If the error code is between 1 and 2047 the error code number will be displayed immediately after “Msg” in the “Application Msg:” string. If the error code is greater than 2047, it will be converted to error code 0.
If the first byte of text is zero, then only “Application Msg:” will display in the fault description.
The next 1-23 bytes will be considered binary data for user data logging. This data can be displayed by using the CTRL-F display of fault data in the Logicmaster 90-70 programmer PLC fault display.
For more information, refer to chapter 5, “PLC Control and Status,” in the Programming Software
User’s Manual, GFK-0263.
Example:
In the following example, the value passed to IN1 is the fault error code. The value passed in,
16x0057, represents an error code of 87 and will appear as part of the fault message. The values of the next inputs give the ASCII codes for the text of the error message. For IN2, the input is 2D45.
The low byte, 45, decodes to the letter
E
and the high byte, 2D, decodes to
_
. Continuing in this manner, the string continues with
S
T O
P O
and
N
. The final character,
00
, is the null character which terminates the string. Thus, the decoding yields the string message
E_STOP ON
.
| _______
|FST_EXE | | %Q00001
|——| |———| BLKMV |—————————————————————————————————————————————————————————( )—
| | WORD |
| | |
| CONST —|IN1 Q|—%P00001
| 0057 | |
| | |
| CONST —|IN2 |
| 2D45 | |
| | |
| CONST —|IN3 |
| 5453 | |
| | |
| CONST —|IN4 |
| 504F | |
| | |
| CONST —|IN5 |
| 4F20 | |
| | |
| CONST —|IN6 |
| 004E | |
| | |
| CONST —|IN7 |
| |_______|
|
| _______
|%I00050 | |
|——| |———| SVC_ |—
| | REQ |
| | |
| CONST —|FNC |
| 00021 | |
| | |
|%P00001—|PARM |
| |_______|
|
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SVCREQ #22: Mask/Unmask Timed Interrupts
Use SVCREQ function #22 to mask or unmask timed interrupts and to read the current mask.
When the interrupts are masked, the PLC CPU will not execute any timed interrupt block timed program that is associated with a timed interrupt. Timed interrupts are masked/unmasked as a group. They cannot be individually masked or unmasked.
Successful execution will occur unless some number other than 0 or 1 is entered as the requested operation or mask value.
The parameter block is an input and output parameter block.
To determine the current mask, use this format:
0 = Read interrupt mask.
address
The PLC returns this format:
0 = Read interrupt mask.
0 = Timed interrupts are unmasked.
1 = Timed interrupts are masked.
address address + 1
To change the current mask, use this format:
1 = Mask/unmask interrupts.
0 = Unmask timed interrupts.
1 = Mask timed interrupts.
address address + 1
Example:
In the following example, when input %I00055 transitions on, timed interrupts are masked.
| _____ _____ _____
|%I00055 | | | | | |
|——|
↑
|———|MOVE_|——————————————————|MOVE_|——————————————————| SVC_|
| | UINT| | UINT| | REQ |
| | | | | | |
| CONST —|IN Q|—%R01002 CONST —|FN Q|—%R01003 CONST —|FNC |
| 00001 | LEN | 00001 | LEN | 00022 | |
| |00001| |00001| | |
| |_____| |_____| %R01002—|PARM |
| |_____|
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SVCREQ #23: Read Master Checksum
SVCREQ function #23 returns master checksums for the set of user program(s) and the configuration. It also returns the checksum for the block from which the service request is made.
When a
RUN MODE STORE
is active, the program checksums may not be valid until the store is complete. To determine when checksums are valid, three flags (one each for Program Block
Checksum, Master Program Checksum, and Master Configuration Checksum) are provided at the beginning of the output parameter block.
There is no input parameter block for this service request. The output parameter block layout is as follows; it requires 15 words of memory.
Output Parameter Block
Program Checksum Valid (0 = not valid, 1 = valid)
Master Program Checksum Valid (0 = not valid, 1 = valid)
Master Configuration Checksum Valid (0 = not valid, 1 = valid)
Number of LD/SFC Blocks (including _MAIN)
Size of User Program in bytes
(DWORD data type)
Program Set Additive Checksum
Program CRC Checksum
(DWORD data type)
Size of Configuration Data in Bytes
Configuration Additive Checksum
Configuration CRC Checksum
(DWORD data type)
Always zero
(high byte)
Currently Executing Block’s CRC Checksum
Currently Executing Block’s
Additive Checksum
Word Address
address address + 1 address + 2 address + 3 address + 4 address + 6 address + 7 address + 9 address + 10 address + 11 address + 13 address + 14
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Example:
In the following example, when the timer using registers %P00013 through %P00015 expires, the checksum read is performed. The checksum data returns in registers %P00016 through %P00030.
The master program checksum in registers %P00022 and %P00023 (the program checksum is a
DWORD data type and occupies two adjacent registers) is compared with the last saved master program checksum. If these are different, coil %M00055 is latched on. The current master program checksum is then saved in registers %P00031 and %P00032.
| << RUNG 5 >>
|
| _____
|%M00054 | | %M00054
|——|/|———| TMR |———————————————————————————————————————————————————————————( )——
| |1.00s|
| | |
| CONST —|PV CV|
| 00060 |_____|
| %P00013
|
|
| << RUNG 6 >>
|
| _____ _____
|%M00054 | | | |
|——| |—————————| SVC_|———————————————————| NE_ |
| | REQ | | DINT|
| | | | | %M00055
| CONST —|FNC | %P00022—|I1 Q|——————————————————————————(SM)——
| 00023 | | | |
| | | %P00031—|I2 |
| |PARM | |_____|
| %P00016—|_____|
|
|
| << RUNG 7 >>
|
| _____
|%M00054 | |
|——| |—————————|MOVE_|
| |DWORD|
| | |
| %P00022—|IN Q|—%P00031
| | LEN |
| |00001|
| |_____|
|
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SVCREQ #25: Disable/Enable EXE Block and
Standalone C Program Checksums
Use SVCREQ function #25 to enable or disable the inclusion of EXE blocks and standalone C programs (i.e., C applications) in the background checksum calculation. The default is to include the checksums.
This service request uses only an input parameter block.
0 = Disable C applications inclusion in checksum calculation.
1 = Enable C application inclusion in checksum calculation.
address
The parameter block is unchanged after execution of the service request.
Example:
In the following example, when the coil TEST transitions from OFF to ON, SVCREQ #25 executes to disable the inclusion of EXE blocks in the background checksum calculation. When coil TEST transitions from ON to OFF, the SVCREQ executes to again include EXE blocks in the background checksum calculation.
| _____ _____
| TEST | | | |
|——|
↑
|—————|MOVE_|——————————+———————————————————————————————————————| SVC_|————
| | UINT| | | REQ |
| | | | | |
| CONST —|IN Q |—%R00150 | CONST —|FNC |
| 00000 | LEN | | 00025 | |
| |00001| | | |
| |_____| | %R00150—|PARM |
| | |_____|
| _____ |
| TEST | | |
|——|
↓
|—————|MOVE_|——————————+
| | UINT|
| | |
| CONST —|IN Q|—%R00150
| 00001 | LEN |
| |00001|
| |_____|
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SVCREQ #26: Role Switch
Note
SVCREQ #26 is intended for use with Hot Standby CPU Redundancy which is only available on Model 780 CPUs (IC697CPU780), and with Enhanced Hot
Standby CPU Redundancy on Models IC697CGR772 and IC697CGR935. For more information about Hot Standby CPU Redundancy, refer to the Series 90-70
Hot Standby CPU Redundancy User’s Guide, GFK-0827. For more information about Enhanced Hot Standby CPU Redundancy, refer to the Series 90-70
Enhanced Hot Standby CPU Redundancy User’s Guide, GFK-1527.
Use SVCREQ function #26 to cause the CPUs to switch roles on the next sweep (active to backup and backup to active) if the CPUs are synchronized and the timing requirements of the role switch request are met. A manual role switch cannot occur within 10 seconds of a previous manual role switch. Role switches due to failures or resynchronization are always allowed (the 10 second limitation does not apply).
Note
Power flow from SVCREQ #26 indicates that a role switch will be attempted on the next sweep. It does not indicate that a role switch has occurred or that a role switch will occur on the next sweep.
This function has no associated parameter block; however, the programming software requires that an entry be made for PARM. Enter any appropriate reference here; it will not be used.
Example:
In the following example, a switch on a control console is wired to %I00001, the input to the
SVCREQ #26 function block. When closed, the switch will activate the SVCREQ #26, causing a role switch between CPUs.
| _____
|%I00001 | | %M00001
|——|
↑
|———| SVC_| —————————————————————————————————————————————————————————( )—
| | REQ |
| | |
| CONST —|FNC |
| 00026 | |
| | |
|%R00001—|PARM |
| |_____|
|
The 10-second limitation allows this SVCREQ to be in both CPUs so that only a single switch occurs if the input is seen by both CPUs.
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SVCREQ #27 and #28: Write to/Read from Reverse Transfer Area
SVCREQ #27 and #28 are intended for use with Hot Standby CPU Redundancy available only on
IC697CPU780 and IC697CGR935 CPUs. Refer to “Programming a Data Transfer from Backup
Unit to Active Unit” in the Series 90™-70 Enhanced Hot Standby CPU Redundancy User’s Guide
(GFK-1527) for all information about using this service request.
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SVCREQ #32: Suspend/Resume I/O Interrupt
Use SVCREQ function #32 to suspend a set of I/O interrupts and cause occurrences of these interrupts to be enqueued until these interrupts are resumed. The set of I/O interrupts are those that can be generated from the 90-70 High Speed Counter. The number of I/O interrupts that can be enqueued depends on the I/O module’s capabilities. The PLC CPU informs the I/O module that its interrupts are to be suspended or resumed. The I/O module’s default is resumed. The Suspend applies to all I/O interrupts associated with the I/O module. Interrupts should be suspended and resumed within a single sweep.
This service request uses only an input parameter block. Its length is three words.
0 = resume interrupt.
1 = suspend interrupt.
memory type reference (offset) address address + 1 address + 2
Successful execution will occur unless:
•
Some number other than 0 or 1 is passed in as the first parameter.
•
The memory type parameter is not 70 (%I memory).
•
The I/O module associated with the specified address is not an appropriate module for this operation. (The module must be a 90-70 High Speed Counter.)
•
The reference address specified is not the first %I reference for the High Speed Counter.
•
Communication between the PLC CPU and this I/O module has failed. (The board is not present, or it has experienced a fatal fault.)
Example:
In the following example, interrupts from the high speed counter module whose starting point reference address is %I00065 will be suspended while the CPU solves the logic of the second rung.
Without the Suspend, an interrupt from the HSC could occur during execution of the third rung, and %T00006 could be set while %R000001 has a value other than 3400. (%AI00001 is the first nondiscrete input reference for the High Speed Counter.)
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I/O interrupts, unless suspended or masked, can interrupt the execution of a function block. The most often used application of this Service Request is to prevent the effects of the interrupts for diagnostic or other purposes.
Example
| _____ _____
| FST_SCN | | | |
|——| |————|MOVE_|—————————————————|MOVE_|—
| | INT| | INT|
| | | | |
| CONST —|IN Q|—%P00002 CONST —|IN Q|—%P00003
| +00070 | LEN | +00065 | LEN |
| |00001| |00001|
| |_____| |_____|
|
|
| _____ _____
| | | | | %T00001
|—————————|MOVE_|—————————————————| SVC_|——————————————————————————————( )——
| | INT | | REQ |
| | | | |
| CONST —|IN Q|—%P00001 CONST —|FNC |
| +00001 | LEN | 00032 | |
| |00001| | |
| |_____| %P00001—|PARM |
| |_____|
|
|
|
|
| _____
| %T00001 | |
|———| |———| EQ_ |—
| | INT | _____
| | | | | %T00006
| %AI0001—|I1 Q|———————————|MOVE_|———————————————————————————————————( )——
| | | | INT|
| | | | |
| CONST _ | | %AI0001 —|IN Q|—%R00001
| +03400 |_____| | LEN |
| |00001|
| |_____|
|
|
|
| _____ _____
| | | | |
|—————————|MOVE_|—————————————————| SVC_|—
| | INT| | REQ |
| | | | |
| CONST —|IN Q|—%P00001 CONST —|FNC |
| +00000 | LEN | 00032 | |
| |00001| | |
| |_____| %P00001—|PARM |
| |_____|
|
|
|
.
12
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SVCREQ #39: ESCM Port Status
Use Service Request #39 ESCM (Embedded Serial Comm Module) Port Status to provide status of
Ports 1 and 2 to the PLC CPU. The address specified in the parameter should be set to a value of 1 or 2 (indicating Port 1 or 2). The port status will be returned in the following value.
1 = Port 1
2 = Port 2 address
The location in which the status is returned address + 1
Successful execution will occur unless:
•
The first parameter is not 1 or 2.
•
The CPU does not support use of Ports 1 and 2.
Note
Only CPX and CGR models of CPUs support Ports 1 and 2.
Example:
In the following example, when Service Request # 39 executes, the CPU will determine the port number from the command block word (%M00001 in the example shown below), then validate the port number. It will then retrieve the current corresponding ESCM status word and place the retrieved status word into the %M00017.
If the port number is invalid, or if input power flow is off, or if the current CPU does not support the use of Ports 1 and 2, then output power will be OFF. If the port is valid and the CPU does support the use of Ports 1 and 2, then output power will be ON.
| _____ _____
|%I00055 | | | | %T00001
|——|
↑
|———|MOVE_|————————————————————————————————————| SVC_|——————————————( )——
| | WORD| | REQ |
| | | | |
| CONST —|IN Q|—%M00001 CONST —|FNC |
| 00001 | LEN | 00039 | |
| |00001| | |
| |_____| %M00001—|PARM |
| |_____|
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Return Values
The ESCM status information is delivered in the form of a word of bit-encoded data. Each bit of the first four bits (beginning with the Least Significant Bit) indicates something about the status of the ESCM as described in this table shown below:
State
PORTN_OK
PORTN_ACTIVE
PORTN_DISABLED
PORTN_FUSE_BLOWN
RESERVED
Bit Position
0
1
2
3
4–16
Description
Requested port is ready. If value is 1, the port is ready. If value is 0, the port is not usable.
There is activity on this port. If value is 1, the port is active. If value is 0, the port is inactive.
Requested port is disabled. If value is 1, the port is disabled. If value is 0, the port is enabled.
Requested port’s fuse is blown (for Port 2) or supply voltage is not within range (for Port 1).
If value is 1, the fuse is blown (or voltage not within range). If value is 0, the fuse (or supply voltage) is okay.
Set to zero (reserved).
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SVCREQ #44: Logic Driven Dynamic Ethernet Global Data
Logic Driven Dynamic Ethernet Global Data (EGD), available on release 7.91andlater CPX CPUs, allows you to dynamically establish and terminate Ethernet Global Data exchanges from within the logic program. This feature uses SVCREQ #44 to establish, terminate, and monitor the exchanges.
Hardware configuration of Ethernet Global Data is not required; however, the adapter(s) must be configured by the Configuration software.
The adapter module IC697CMM742, version 2.70 or later supports Logic Driven EGD.
A maximum number of 32 Logic Driven exchanges are allowed per PLC. A total of 255 exchanges is possible. Each Logic Driven exchange can have a maximum of 8 variables per exchange.
SVCREQ #44 must not be issued (that is, from an interrupt block) while another SVCREQ #44 is in process in the same CPU.
Note
On the sweep that an exchange is established, the CPU will require more time during the start of sweep processing. Furthermore, if you are starting multiple
LD EGD connections during a single sweep, the watchdog timeout may need to be adjusted.
Service Request Function Block
Table 12-2. General Format of SVCREQ #44 Function Block
Status
Indicates success or failure of request. Consult the set of possible responses for each command. The user should set this field to an initial value of 0.
Command
Indicates which command is to be executed:
1 Set local producer ID
2 Retrieve local producer ID
3 Establish a produced exchange
4 Establish a consumed exchange
5 Terminate produced exchange
6 Terminate consumed exchange
7 Refresh production data every sweep
Command Specific Information Block
The format of the remaining fields depends on the command selected. See the descriptions below for each command.
Address
Address + 1
Address + 2
.
.
.
Address + n
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Returned Status Values
The following general errors can be returned in the status. Other values are possible for each command.
Table 12-3. Command Status Possible for All Commands
Value
-18
-19
-23
Description
Invalid command. Not in range of 1 – 7.
Parameter Block length exceeds memory range.
Service Request #44 power flow interrupted.
That is, a new command was issued before the last one completed.
Power Flow
No
No
No
Details of the Service Request Commands
Table 12-2 lists seven commands that this service request can initiate. Each of these is described in detail in this section.
Command 1 - Set Local Producer ID
A Local Producer ID is used to identify this PLC to other exchange recipients and providers. The
Local Producer must exist and have a non-zero value before an exchange can be created. There are two ways to create the producer ID: 1) Configure the ID using Control software or 2) Use the Set
Local Producer ID command. Once set to a non-zero value, the local producer ID cannot be changed by the logic.
The Local Producer ID is specified in four words. Each word typically contains a portion of the dot separated IP Address. When this command is used to assign the Local Producer ID, it is only necessary that one of the 4 words contain a non-zero value; however, make sure that each PLC is assigned a unique value. Setting the ID is not allowed if hardware configuration has not been stored to the PLC CPU.
If the Local Producer ID is set using this command, then it will be reset to 0.0.0.0 when the CPU transitions to STOP or power is cycled on the CPU.
Table 12-4. Format of Set Local Producer ID Command
Status
See table 12-5. The user should initially set this field to 0.
Set Local Producer ID Command
Always 1.
Local Producer ID
Four words containing the four parts of the producer ID. Each word can have a value of 0 to 255. At least one word must be non-zero.
Address
Address + 1
Address + 2 to
Address + 5
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The Command Status is returned upon the completion of the Set service request as detailed in the following table.
Table 12-5. Command Status for Set Local Producer ID Command
Value
1
-2
-3
-11
-16
Description
ID is set as requested or the ID specified was the same as existing ID.
Requested ID is different from value stored in the downloaded configuration.
Requested ID is different from value set by a previous set-producer ID service request.
No hardware configuration stored.
Invalid Local Producer ID (0 or out of range)
Power Flow
Yes
No
No
No
No
Command 2 - Retrieve Local Producer ID
This command is useful when the ID has been set using Control software. If the command returns
0.0.0.0, the local producer ID either does not exist or has a 0 value and must be set to a non-zero value to use logic driven exchanges.
Table 12-6. Format of Retrieve Local Producer ID Command
Status
See Table 12-7. The user should initially set this field to 0.
Retrieve Local Producer ID Command
Always 2.
Local Producer ID
Four words containing the four parts of the current producer ID in the CPU. Each word returned will be in the range of 0 to 255.
Address
Address + 1
Address + 2 to
Address + 5
The command status is returned upon the completion of the Retrieve Local Producer ID command as detailed in the following table.
Table 12-7. Command Status for Retrieve Local Producer ID Command
Value
1
2
-1
Description Power Flow
ID configured by Set Local Producer ID.
Yes
ID was configured in the stored configuration.
Yes
Local producer ID is not set.
No
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Commands 3 and 4 - Establish a Produced Exchange/Consumed
Exchange
The creation of an exchange will require multiple sweeps of the program. However, Power Flow will be passed on the calling sweep if all of the following conditions are met:
•
The local Producer ID is not 0.0.0.0.
•
The exchange to be established (identified by Producer ID and Exchange ID) does not already exist.
•
Variable addresses are valid and the number of variables specified does not exceed the maximum number allowed (8).
•
Creation of the exchange does not exceed the maximum number of logic driven (32) or total number of exchanges allowed (255).
•
Sufficient User Memory is available to create the exchange.
If any of the above conditions fail, power flow will not be passed, and the command status will indicate the cause of failure. The exchange will not be created and the exchange status word will not be altered.
If power flow is passed, the exchange has been created, but the exchange is not yet ready for use by the user program. The command status will be set to 1 and the exchange status word will be set to a value of IPLC_CREATE_IN_PROGRESS (24). The user program must monitor the exchange status word on subsequent sweeps to determine when the Exchange Creation has completed
(changed from IPLC_CREATE_IN_PROGRESS). Up to 12 seconds may elapse before the exchange status word is set to a failure or completion status.
If the exchange status word is set to one of the values in Table 10, the exchange has not been created successfully and the local exchange definition is deleted. For a complete list of possible
Exchange Status Word values for Logic Driven exchanges, refer to Table 12-19.
Table 12-8. Exchange Status Word for Establish Exchange Commands
Exchange Status
Word
12
18
26
28
Description
Insufficient dual port memory in Adapter Module.
Adapter Module has failed.
Adapter Module did not respond to the request within 6 seconds.
Other failure.
Exchanges can be established in parallel. The user program may begin creation of all exchanges in the same sweep, if desired. Any subsequent commands related to an exchange that has not successfully completed creation will fail and must be reissued when creation has completed.
A maximum of eight variables is allowed in each exchange.
For each Logic Driven exchange, the amount of PLC user memory required will be allocated when the exchange is established. The memory used for Logic Driven exchanges counts against the total memory available for Configuration and Logic. Approximately 176 + N*16 bytes will be charged for each exchange, where N is the number of variables used in that exchange. The cumulative
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12
amount of user memory used for Logic Driven exchanges, as well as the amount of user memory remaining, will not be visible when using the current versions of Logicmaster 90-70.
Use of Logic-driven EGD requires that sufficient time be given to the System Communications window. If the System Communications window does not run, then the establishment of Logic
Driven EGD exchanges is expected to fail with the exchange status word set to 26.
The format for creating produced and consumed exchanges differs. This subject is covered in the following sections.
Format for the Establish a Produced Exchange Command
The format for the Establish a Produced Exchange command is as follows.
Table 12-9. Format of the Establish a Produced Exchange Command
Status
See Table 12-10. The user should initially set this field to 0.
Establish Produced Exchange Command
Always 3.
Reserved
Four words. Must be set to 0
Exchange ID
Allowable range: 32769 to 49151.
Reserved
Two words. Must be set to 0
Rack/Slot of Adapter Module
Upper Byte = Rack
Lower Byte = Slot
Production Period
10 through 3,600,000 in units of milliseconds (2 words)
Exchange Status Word Location
Four words. Refer to “Exchange Status Word” on page 12-84 for the format of this address. The NULL selector may not be used.
Destination Address Type
1 = IP address
2 = Name String (must end in 0)
3 = Multicast Group ID
Destination Address Value
16 words
Number of Variables
1 to 8
Configuration Data
Six words per variable. Refer to “Variables Address Definition” on page 12-86 for the format of this address.
Address
Address + 1
Address + 2 to
Address + 5
Address + 6
Address + 7 to
Address + 8
Address + 9
Address + 10 to
Address + 11
Address + 12 to
Address + 15
Address + 16
Address + 17 to
Address + 32
Address + 33
Address + 34 to
…
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Possible status values for the Establish a Produced Exchange command are shown below.
Table 12-10. Command Status for the Establish a Produced Exchange Command
Value
-7
-8
-9
1
-1
-5
-6
-10
-12
-13
-14
-16
-22
-24
Description Power Flow
Exchange information accepted.
Local producer ID is not set.
Exchange ID out of range.
Exchange already exists.
Too many exchanges.
Too many variables.
Maximum variable size exceeded.
Insufficient resources available
The rack/slot location is not properly configured, or does not support EGD.
Rack/Slot is invalid or out of range.
No
No
No
Status Word Address is unassigned or invalid.
No
Reserved Words (3—6) invalid. (Must be 0.)
Invalid Address Type. Must be in range of 1—
3.
Invalid value specified for the destination address.
Parameter at word [Value] – 101 is incorrect.
No
No
No
No
Yes
No
No
No
No
No
No
-101 to
-134
-135 to
-177
Variable assignment beginning at word
[Value] – 101 is invalid.
No
The following rules apply to produced exchanges:
•
Duplicate produced exchanges within the same PLC are not allowed. If a produced exchange with the same Exchange ID already exists, the request will be rejected.
•
Data Production begins as soon as the exchange creation is completed successfully (may take several sweeps).
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12
12-80
Format for the Establish a Consumed Exchange Command
The format for the Establish a Consumed Exchange command is as follows.
Table 12-11. Format of the Establish a Consumed Exchange Command
Status
See Table 12-12. The user should initially set this field to 0.
Establish Consumed Exchange Command
Always 4.
Producer ID
Four words. Must not be 0.0.0.0. This is the ID of the producer of the exchange. Not the
Local Producer ID of the current CPU.
Exchange ID
Allowable range: 32769 to 49151 for logic driven exchanges or 1 to 16383 for static exchanges.
Reserved
Two words. Must be set to 0
Rack/Slot of Adapter Module
Upper Byte = Rack
Lower Byte = Slot
Consumption Period
10 through 3,600,000 in units of milliseconds (2 words)
Exchange Status Word Location
Four words. Refer to “Exchange Status Word” on page 12-84 for the format of this address. The NULL selector may not be used.
Group ID
0 if production is peer-to-peer
1 – 32 if a multicast group is used.
Update Timeout Period
In units of milliseconds, must be 0 (not used) or set larger than the Consumption Period.
The range is the same as that of the Consumption Period. It is recommended that the
timeout period be set at least 20 ms larger than the consumption period to prevent false
timeouts. (2 words)
Timestamp Location
Four words. The timestamp is used to record the time when the data was produced by the
CPU. If the NULL selector is used in the location address, no timestamp information will be available. Refer to “Timestamp” on page 12-86 for the format of this address and the format of the timestamp located at that address.
Reserved
Ten words. Must be set to 0.
Number of Variables
1 to 8
Configuration Data
Six words per variable. Refer to “Variables Address Definition” on page 12-86 for the format of this address.
Address
Address + 1
Address + 2 to
Address + 5
Address + 6
Address + 7 to
Address + 8
Address + 9
Address + 10 to
Address + 11
Address + 12 to
Address + 15
Address + 16
Address + 17 to
Address + 18
Address + 19 to
Address + 22
Address + 23 to
Address + 32
Address + 33
Address + 34 to
…
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Possible status values for the Establish a Consumed Exchange command are shown below.
Table 12-12. Command Status for the Establish a Consumed Exchange Command
Value
-7
-8
-9
1
-1
-5
-6
-10
-12
-13
-14
-15
-16
-17
-20
-21
-22
Description Power Flow
Exchange information accepted.
Local producer ID is not set.
Exchange ID out of range.
Exchange already exists.
Too many exchanges.
Too many variables.
Maximum variable size exceeded.
Insufficient resources available
The rack/slot location is not properly configured, or does not support EGD.
Rack/Slot is invalid or out of range.
No
No
No
Status Word Address is unassigned or invalid.
No
Timestamp Address is invalid.
Producer ID is unassigned (zero) or out of range.
Producer ID specified matches Local Producer
ID.
Consumption Period is out of range, must be
10ms – 3,600,000ms.
The Update Timeout Period is invalid. Must be 0 (not used) or be greater than the
Consumption Period. The range is the same as that of the Consumption Period.
No
No
No
No
No
Invalid Group ID, must be 0 or in range of 1 –
32.
Parameter at word [Value] – 101 is incorrect.
No
No
Yes
No
No
No
No
No
No
-101 to
-134
-135 to
-177
Variable assignment beginning at word
[Value] – 101 is invalid.
No
The following rules apply to establishing consumed exchanges:
•
Duplicate exchanges within the same PLC are not allowed. If an exchange with the same
Producer ID and Exchange ID already exists (static or dynamic, consumed or produced), the request will be rejected.
•
Data Consumption begins as soon as the exchange is created successfully (may take several sweeps).
12
GFK-0265J Chapter 12 Control Functions 12-81
12
Commands 5 and 6 - Terminate a Produced Exchange/Consumed
Exchange
Logic Driven EGD exchanges will be terminated automatically on a given CPU when that CPU transitions to STOP or is power-cycled. You can also terminate these exchanges explicitly by using the Terminate Produced Exchange or Terminate Consumed Exchange commands. These commands cannot terminate exchanges configured using Control software for this CPU.
Termination may require several sweeps to complete. If the exchange can be completed, a 1 will be returned as the command status and, at completion, the Exchange Status Word will be set to
IPLC_EXCHANGE_DELETED (30). If the exchange cannot be deleted, an error status will be returned in the command status and the Exchange Status Word will not be affected. The format of these commands is shown below.
Table 12-13. Format of the Terminate Produced Exchange Command
Status
See Table 12-15. This field should be initially set to 0.
Terminate Produced Exchange Command
Always 5.
Reserved
Four words. Must be set to 0
Exchange ID
Allowable range: 32769 to 49151.
Reserved
Must be set to 0
Table 12-14. Format of the Terminate Consumed Exchange Command
Status
See Table 12-15. This field should be initially set to 0.
Terminate Consumed Exchange Command
Always 6.
Reserved
Four words. Must be set to 0
Producer ID
Four words. Must match the ID used to create the exchange.
Exchange ID
Allowable range: 32769 to 49151 for logic driven exchanges, or 1 to 16383 for static exchanges.
Reserved
User must set to 0.
Address
Address + 1
Address + 2 to
Address + 5
Address + 6
Address + 7
Address
Address + 1
Address + 2 to
Address + 5
Address + 6
Address + 7
Address + 7
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12
The following table shows the possible command statuses from the two terminate commands.
Table 12-15. Command Status for the Terminate Exchange Commands
Value
1
-1
-5
-16
-108
Description
Exchange deleted as requested.
Local producer ID is not set.
Exchange ID out of range.
Terminate Produced Exchange
Reserved Words (3 through 6) must be 0.
Terminate Consumed Exchange
Invalid Producer ID
Reserved word 8 must be zero.
Power Flow
Yes
No
No
No
No.
Command 7 - Refresh Production Data Every Sweep
By default, the production data is updated only once during the production period. The Refresh
Production Data Every Sweep command causes the data for every Logic Driven production exchange to be updated every sweep of the CPU, regardless of the specified production period for the exchanges. The effect of this request cannot be cancelled except by putting the CPU into STOP mode or by CPU power-cycle. Static exchanges are not affected by this command nor do Static exchanges preclude using this command for Logic Driven Exchanges.
The Exchange Status Word will be updated every CPU sweep, but data on the wire will be produced as specified by the exchange's production period.
The Local Producer ID must be set (either by configuration or by the Set Local Producer ID command) prior to issuing the Refresh Production Data Every Sweep command. The Refresh
Production Data Every Sweep command must be made prior to commands to establish logic driven exchanges (either produced or consumed).
Table 12-16. Format of the Refresh Production Data Every Sweep Command
Status
See Table 12-16. This field should be initially set to 0.
Refresh Production Data Every Sweep Command
Always 7.
Reserved
Two words. Must be set to 0
Address
Address + 1
Address + 2 to
Address + 3
The command status is returned upon the completion of the Refresh Production Data Every Sweep command as detailed in Table 12-17.
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12
12-84
Table 12-17. Command Status for Refresh Production Data Every Sweep Command
Value
1
-1
-23
-25
-103
-104
Description
Success.
Local producer ID is not set.
Service Request #44 power flow interrupted.
Command is not valid in the context. The request must be made prior to any request to establish an exchange.
Reserved word 3 of the parameter block is not
0.
Reserved word 4 of the parameter block is not
0.
Power Flow
Yes
No
No
No
No.
No
Additional Notes on Logic Driven Dynamic Ethernet Global Data
Assigning Exchange IDs
For every exchange in the local PLC, the combination of Producer ID and Exchange ID must be unique regardless of whether it is static, dynamic, consumed or produced.
For Logic Driven produced exchanges, each exchange in the local PLC must have a unique
Exchange ID. The available range for these Exchange IDs is 32769 through 49151. It is suggested that the customer use a convenient subset of the range (for example 40000 - 49151).
For Logic Driven Consumed Exchanges, the Producer ID and Exchange ID must be set to match that of the actual producer. To consume a Logic Driven dynamic exchange, the Exchange ID must be in the range of 32769 - 49151. To consume a static exchange, the Exchange ID must be in the range of 1 - 16383.
It is the user's responsibility to prevent quick reuse of a Produced Exchange ID.
Effect of Resetting/Restarting the Ethernet Module
If the Ethernet Interface is restarted via either the push-button or a station manager restart command, the PLC CPU will set the exchange status words of logic driven exchanges associated with that particular Ethernet Interface to IPLC_FAILED_ADAPTER (18) and terminate all associated logic driven exchanges. The user program should monitor the LAN Interface Status
Word and the Exchange Status Words of logic driven exchanges and re-establish exchanges when appropriate.
If there are multiple Ethernet Interface Modules in the system and only one of them is restarted, only the logic driven exchanges assigned to that Ethernet Module are terminated.
Exchange Status Word
The Exchange Status Word provides an ongoing status for the exchange. As with static exchanges, the Exchange Status Word will be updated throughout the life of the exchange. The format of the
Exchange Status Word is shown below. No length field is provided since it is always assumed to
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
12
have a length of 1 WORD. The NULL selector cannot be used for the Memory Type since the
Exchange Status Word must be present.
Table 12-18. Format of Exchange Status Word Address
1
Word
2
3
4
Description
PLC Memory Type
Refer to Table 12-19 for possible memory types.
PLC Memory Offset
Zero-based offset into memory type. Refer to Table 12-20 for offset calculations.
Reserved
Must be set to 0.
Reserved
Must be set to 0.
The following table shows the expected values that can be written to the Exchange Status Word for
Logic Driven exchanges.
Table 12-19. Exchange Status Word Values
Status Mnemonic
IPLC_NO_NEW_DATA
IPLC_NO_ERROR
IPLC_NEW_DATA
GOOD_DATA_UNSYNC_TIMESTAMP
IPLC_SPEC_MISMATCH
IPLC_REFRESH_ERR
IPLC_DATA_AND_REFRESH_ERROR
IPLC_NO-NETWORK
IPLC_LOCAL_NO_RESOURCE
IPLC_WAITING_NAME_RESOLUTION
IPLC_FAILED_ADAPTER
IPLC_MOD_NOT_CAPABLE
IPLC_CREATE_IN_PROGRESS
IPLC_CREATE_NO_RESPONSE
IPLC_CREATE_FAILED
IPLC_EXCHANGE_DELETED
Value
18
22
24
6
7
10
12
16
26
28
30
0
1
1
3
4
Production
Exchanges
√
√
√
√
√
√
√
√
√
√
√
√
√
√
Consumption
Exchanges
√
√
√
√
√
√
√
√
√
√
√
√
√
√
GFK-0265J Chapter 12 Control Functions 12-85
12
12-86
Variables Address Definition
The following format is used for each of the variables in the variable list.
Table 12-20. Format of Variables
1
Word
2
3
4
5
6
Description
PLC Memory Type
Refer to Table 12-23 for possible memory types.
PLC Memory Offset
Zero-based offset into memory type. Refer to Table 12-23 for offset calculations.
Reserved
Must be set to 0.
Reserved
Must be set to 0.
Variable Length (in bytes)
Max 1400 bytes. Refer to Table 12-23 for length calculations.
Reserved
Must be set to 0.
Timestamp
The following format is used for the Timestamp Address. The user may specify the NULL selector
(255) for the memory type field if they do not wish to have the timestamp available.
Table 12-21. Format of Timestamp Address
1
Word
2
3
4
Description
PLC Memory Type
Refer to Table 12-23 for possible memory types.
PLC Memory Offset
Zero-based offset into memory type. Refer to Table 12-23 for offset calculations.
Reserved
Must be set to 0.
Reserved
Must be set to 0.
The length of the timestamp is always 4 words as shown in the table below.
Table 12-22. POSIX Clock Timestamp Format
1
2
3
4
Word Description
POSIX Clock – Seconds value (low word)
POSIX Clock – Seconds value (high word)
POSIX Clock – Nanoseconds value (low word)
POSIX Clock – Nanoseconds value (high word)
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
12
%R memory
%AI memory
%AQ memory
%I memory
%Q memory
%T memory
%M memory
%SA memory
%SB memory
%SC memory
%S memory
%G memory
%I override table
%Q override table
%T override table
%M override table
%SA override table
%SB override table
%SC override table
S override table
%G override table
NULL (no address)
PLC Memory
Type
Memory Types for Exchange Status Word, Variables, and Timestamp
The following table should be used in constructing the addresses for exchange status words, variables, and timestamps.
Code
16
18
20
22
8
10
12
24
26
28
30
56
114
Table 12-23. PLC Memory Type Formatting
Exchange
Status
Word
√
√
√
√
√
√
√
Time stamp
√
√
√
√
√
√
√
√ √
Produced
Variable
√
√
√
√
√
√
√
√
√
√
√
√
√
116
√
118
120
122
124
126
1128
130
√
√
√
√
√
√
√
255
√
Consumed
Variable
√
√
√
√
√
√
√
√
√
Offset
Calculation
(bytes)
(Ref start
-1)*2
(Ref start
-1)/8
(Discard the remainder.)
0
Length
Calculation
(bytes)
(Ref
(end+1)
-
Ref start
)*2
(Ref
(end+8)
–
Ref start
)/8
(Discard the remainder.)
0
GFK-0265J Chapter 12 Control Functions 12-87
12
PID
12-88
The Proportional plus Integral plus Derivative (PID) control function is the best known general purpose algorithm for closed loop process control. The Series 90 PID function block compares a
Process Variable feedback with a desired process Set Point and updates a Control Variable output based on the error.
The block uses PID loop gains and other parameters stored in an array of 40 16 bit words
(discussed on page 12-90) to solve the PID algorithm at the desired time interval. All parameters are 16 bit integer words for compatibility with 16 bit analog process variables. This allows %AI memory to be used for input Process Variables and %AQ to be used for output Control Variables.
The example shown below includes typical inputs.
_____
%S00007 | |
(enable) ——| |—— —| PID |— (ok) Power flow out if OK
| |
| IND |
| |
(set point) %R00010 —|SP CV|— %AQ0001 Control Variable
+21000 | | +25000
| |
(process variable) %AI0001 —|PV |
+20950 | |
| |
%M0001 | |
——| |——— |MAN |
| |
| |
%M0002 | |
——| |——— |UP |
| |
| |
%M0002 |DN |
——| |——— | |
|_____|
%R00100 RefArray is 40 %R words
(reference array address)
As the input Set Point and Process Variable and output Control Variable terms are used so frequently, they will be abbreviated as SP, PV and CV. As scaled 16 integer numbers, many parameters must be defined in either PV counts or units or CV counts or units. For example, the SP input must be scaled over the same range as PV as the PID block calculates the error by subtracting these two inputs. The PV and CV Counts may be –32000 or 0 to 32000 matching analog scaling or from 0 to 10000 to display variables as 0.00% to 100.00%. The PV and CV Counts do not have to have the same scaling, in which case there will be scale factors included in the PID gains.
Note
The PID will not execute more often than once every 10 milliseconds. This could change your results if you set it up to execute every sweep and the sweep is under
10 milliseconds. In such a case, the PID function will not run until enough sweeps have occurred to accumulate an elapsed time of 10 milliseconds; for example, if the sweep time is 9 milliseconds, the PID function will execute every other sweep with an elapsed time of 18 milliseconds for every time it executes.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
12
Parameters:
Parameter
enable
SP
PV
MAN
UP
DN
RefArray
Address ok
CV
Description
When enabled through a contact, the PID function is performed.
SP is the control loop or process set point. Set using PV Counts, the PID adjusts the output CV so that PV matches SP (zero error).
Process Variable input from the process being controlled, often a %AI input.
When energized to 1 (through a contact), the PID block is in
MANUAL
mode. If the PID block is on manual off, the PID block is in automatic mode.
If energized along with MAN, it adjusts the CV up by 1 CV per solution.*
If energized along with MAN, it adjusts the CV down by 1 CV per solution.*
Address is the location of the PID control block information (user and internal parameters). Uses 40 %R words that cannot be shared.
The ok output is energized when the function is performed without error. It is off if error(s) exist.
CV is the control variable output to the process, often a %AQ analog output.
*Incremented (UP parameter) or decremented (DN parameter) by one (1) per access of the PID function.
Valid Memory Types:
Parameter flow %I %Q %M %T %S %G %R %AI %AQ const none
enable
SP
PV
MAN
UP
DN address ok
CV
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
• Valid reference or place where power may flow through the function.
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
GFK-0265J Chapter 12 Control Functions 12-89
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12-90
PID Parameter Block:
Besides the 2 input words and the 3 Manual control contacts, the PID block uses 13 of the parameters in the RefArray. These parameters must be set before calling the block. The other parameters are used by the PLC and are non-configurable. The %Ref shown in the table below is the same RefArray Address at the bottom of the PID block. The number after the plus sign is the offset in the array. For example, if the RefArray starts at %R100, the %R113 will contain the
Manual Command used to set the Control Variable and the integrator in Manual mode.
Table 12-4. PID Parameters Overview
Register
%Ref+0000
%Ref+0001
%Ref+0002
%Ref+0003
%Ref+0004
%Ref+0005
%Ref+0006
%Ref+0007
%Ref+0008
%Ref+0009
%Ref+0010
%Ref+0011
%Ref+0012
%Ref+0013
%Ref+0014
%Ref+0015
%Ref+0016
%Ref+0017
%Ref+0018
Parameter
Loop Number
Low Bit Units
Integer
Range of Values
0 to 255 (for user display only)
Algorithm
Sample Period
Dead Band +
N/A; set and maintained by the
PLC
Non-configurable
10 milliseconds 0 (every sweep) to 65535 (10.9 Min).
Use at least 10 for 90-30 PLCs (see Note on page 12-88).
PV Counts 0 to 32000 (never negative)
Dead Band — PV Counts –32000 to 0 (never positive)
Proportional Gain –Kp 0.01 CV%/PV% 0 to 327.67 %/%
Derivative Gain–Kd 0.01 seconds
Integral Rate–Ki Repeat/1000 Sec
0 to 327.67 sec
0 to 32.767 repeat/sec
CV Bias/Output Offset
Upper Clamp
Lower Clamp
CV Counts
CV Counts
CV Counts
–32000 to 32000 (add to integrator output)
–32000 to 32000(>%Ref+10) output limit
–32000 to 32000(<%Ref+09) output limit
Minimum Slew Time Second/Full
Travel
Config Word
Manual Command
Control Word
Internal SP
Internal CV
Internal PV
Output
0 (none) to 32000 sec to move 32000 CV
Low 5 bits used Bit 0 to 2 for Error+/–, OutPolarity,
Deriv.
CV Counts Tracks CV in Auto or Sets CV in Manual
Maintained by the
PLC, unless Bit 1 is set.
PLC maintained unless set otherwise: page 12-91)
Non-configurable
l ow bit sets Override if 1 (see description in the “PID Parameters Details” table on
N/A; set and maintained by the
PLC
Non-configurable
N/A; set and maintained by the
PLC
N/A; set and maintained by the
PLC
Non-configurable
Non-configurable
N/A; set and maintained by the
PLC
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
12
Table 12-4. PID Parameters Overview - Continued
Register
%Ref+0019
%Ref+0020
and
%Ref+0021
%Ref+0022
Parameter
Diff Term Storage
Int Term Storage
Slew Term Storage
Low Bit Units
N/A; set and maintained by the
PLC
N/A; set and maintained by the
PLC
N/A; set and maintained by the
PLC
%Ref+0023
%Ref+0024
%Ref+0025
Clock N/A; set and maintained by the PLC (time last executed)
%Ref+0026 Y Remainder Storage N/A; set and maintained by the
PLC
%Ref+0027 Lower Range for SP, PV PV Counts
Range of Values
Non-configurable
Non-configurable
Non-configurable
Non-configurable
Non-configurable
%Ref+0028 Upper Range for SP, PV PV Counts
–32000 to 32000 (>%Ref+28) for display
–32000 to 32000 (<%Ref+27) for display
%Ref+0029
•
%Ref+0034
%Ref+0035
•
%Ref+0039
Reserved for internal use N/A
Reserved for external use N/A
Non-configurable
Non-configurable
Note that every PID block call must use a different 40-word array even if all 13 user parameters are the same because other words in the array are used for internal PID data storage. Make sure the array does not extend beyond the end of memory.
To configure the user parameters, select the PID function and press
F10
to zoom in to a screen displaying User Parameters; then use arrow keys to select fields and type in desired values. You can use 0 for most default values, except the CV Upper Clamp, which must be greater than the CV
Lower Clamp for the PID block to operate. Note that the PID block does not pass power if there is an error in User Parameters, so monitor with a temporary coil while modifying data.
Once suitable PID values have been chosen, they should be defined as constants in the BLKMOV so that they can be used to reload default PID user parameters if needed.
GFK-0265J Chapter 12 Control Functions 12-91
12
Operation of the PID Instruction
Normal Automatic operation is to call the PID block every sweep with power flow to Enable and no power flow to Manual input contacts. The block compares the current PLC elapsed time clock with the last PID solution time stored in the internal RefArray. If the time difference is greater than the sample period defined in the third word (%Ref+2) of the RefArray, the PID algorithm is solved using the time difference and both the last solution time and Control Variable output are updated.
In Automatic mode, the output Control Variable is placed in the Manual Command parameter
%Ref+13.
If power flow is provided to both Enable and Manual input contacts, the PID block is placed in
Manual mode and the output Control Variable is set from the Manual Command parameter
%Ref+13. If either the UP or DN inputs have power flow, the Manual Command word is incremented or decremented by one CV count every PID solution. For faster manual changes of the output Control Variable, it is also possible to add or subtract any CV count value directly to/from the Manual Command word.
The PID block uses the CV Upper and CV Lower Clamp parameters to limit the CV output. If a positive Minimum Slew Time is defined, it is used to limit the rate of change of the CV output. If either the CV amplitude or rate limit is exceeded, the value stored in the integrator is adjusted so that CV is at the limit. This anti-reset windup feature (defined on page 12-95) means that even if the error tried to drive CV above (or below) the clamps for a long period of time, the CV output will move off the clamp as soon as the error term changes sign.
This operation, with the Manual Command tracking CV in Automatic mode and setting CV in
Manual mode, provides a bumpless transfer between Automatic and Manual modes. The CV Upper and Lower Clamps and the Minimum Slew Time still apply to the CV output in Manual mode and the internal value stored in the integrator is updated. This means that if you were to step the Manual
Command in Manual mode, the CV output will not change any faster that the Minimum Slew Time
(Inverse) rate limit and will not go above or below the CV Upper or CV Lower Clamp limits.
Note
A specific PID function should not be called more than once per sweep.
The following table provides more details about the parameters discussed briefly in Table 12-4.
The number in parentheses after each parameter name is the offset in the RefArray.
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Table 12-5. PID Parameters Details
Data Item Description
Loop Number
(00)
Sample Period
(02)
This is an optional parameter available to identify a PID block. It is an unsigned integer that provides a common identification in the PLC with the loop number defined by an operator interface device. The loop number is displayed under the block address when logic is monitored from the
Logicmaster 90-70 software.
Algorithm
(01)
An unsigned integer that is set by the PLC to identify what algorithm is being used by the function block. The ISA algorithm is defined as algorithm 1, and the independent algorithm is identified as algorithm 2.
The shortest time, in 10 millisecond increments, between solutions of the PID algorithm. For example, use a 10 for a 100 millisecond sample period. The UINT value can be up to 65535 for a sample period of 10.9 minutes. If it is 0, the algorithm is solved every time the block is called (see section below on PID block scheduling).
Dead Band
(+/—)
(03/04)
Proportional
Gain
–Kp
(05)
Derivative
Gain–
Kd
(06)
Integral Rate
Gain–
Ki
(07)
CV Bias/Output
Offset
(08)
The PID algorithm is solved only if the current PLC elapsed time clock is at or later than the last PID solution time plus this Sample Period. Remember, that the 90-70 will not use a solution time less than 10 milliseconds (see Note on page 12-88); so sweeps will be skipped for smaller sweep times. This function compensates for the actual time elapsed since the last execution, within 100 microseconds. If this value is set to 0, the function is executed each time it is enabled; however, it is restricted to a minimum of 10 milliseconds as noted above.
INT values defining the upper (+) and lower (–) Dead Band limits in PV Counts. If no Dead Band is required, these values must be 0. If the PID Error (SP – PV) or (PV – SP) is above the (–) value and below the (+) value, the PID calculations are solved with an Error of 0. If non-zero, the (+) value must be greater than 0 and the (–) value less than 0 or the PID block will not function. You should leave these at 0
until the PID loop gains are setup or tuned. After that, you may want to add Dead Band to avoid small
CV output changes due to small variations in error, perhaps to reduce mechanical wear.
This INT number, called the Controller gain, Kc, in the ISA version, determines the change in CV in CV
Counts for a 100 PV Count change in the Error term. It is displayed as 0.00 %/% with an implied decimal point of 2 . For example, a Kp entered as 450 will be displayed as 4.50 and will result in a Kp*Error/100 or 450*Error/100 contribution to the PID Output. Kp is generally the first gain set when adjusting a PID loop.
This INT number determines the change in CV in CV Counts if the Error or PV changes 1 PV Count every 10 milliseconds. Entered as a time with the low bit indicating 10 milliseconds, it is displayed as 0.00
Seconds with an implied decimal point of 2. For example, a Kd entered as 120 will be displayed as 1.20
Sec and will result in a Kd * delta Error/delta time or 120*4/3 contribution to the PID Output if Error was changing by 4 PV Counts every 30 milliseconds. Kd can be used to speed up a slow loop response, but is very sensitive to PV input noise.
This INT number determines the change in CV in CV Counts if the Error were a constant 1 PV Count. It is displayed as 0.000 Repeats/Sec with an implied decimal point of 3. For example, a Ki entered as 1400 will be displayed as 1.400 Repeats/Sec and will result in a Ki * Error *dt or 1400 * 20 * 50/1000 contribution to PID Output for an Error of 20 PV Counts and a 50 millisecond PLC sweep time (Sample
Period of 0). Ki is usually the second gain set after Kp.
An INT value in CV Counts added to the PID Output before the rate and amplitude clamps. It can be used to set non-zero CV values if only Kp Proportional gains are used, or for feed forward control of this PID loop output from another control loop.
GFK-0265J Chapter 12 Control Functions 12-93
12
Table 12-5. PID Parameters Details - Continued
Data Item Description
CV Upper and
Lower Clamps
(09/10)
Minimum Slew
Time (11)
INT values in CV Counts that define the highest and lowest value for CV. These values are required and the Upper Clamp must have a more positive value than the Lower Clamp, or the PID block will not work.
These are usually used to define limits based on physical limits for a CV output. They are also used to scale the Bar Graph display for CV for the LM90 or ADS PID display. The block has anti-reset windup to modify the integrator value when a CV clamp is reached.
A positive UINT value to define the minimum number of seconds for the CV output to move from 0 to full travel of 100% or 32000 CV Counts. It is an inverse rate limit on how fast the CV output can be changed. If positive, CV can not change more than 32000 CV Counts times Delta Time (seconds) divided by Minimum Slew Time. For example, if the Sample Period was 2.5 seconds and the Minimum Slew
Time is 500 seconds, CV can not change more than 32000*2.5/500 or 160 CV Counts per PID solution.
As with the CV Clamps, there is an anti-windup feature that adjusts the integrator value if the CV rate limit is exceeded. If Minimum Slew Time is 0, there is no CV rate limit. Make sure you set Minimum
Slew Time to 0 while you are tuning or adjusting PID loop gains.
Config Word The low 5 bits of this word are used to modify three standard PID settings. The other bits should be set to
0. Set the low bit to 1 to modify the standard PID Error Term from the normal (SP – PV) to (PV – SP), reversing the sign of the feedback term. This is for Reverse Acting controls where the CV must go down when the PV goes up. Set the second bit to a 1 to invert the Output Polarity so that CV is the negative of the PID output rather than the normal positive value. Set the fourth bit to 1 to modify the Derivative
Action from using the normal change in the Error term to the change in the PV feedback term.
The low 5 bits in the Config Word are defined in detail below:
Bit 0 =
Bit 1 =
Error Term. When this bit is set to 0, the error term is SP — PV.
When this bit is set to 1, the error term is PV — SP.
Output Polarity. When this bit is set to 0, the CV output represents the output of the
PID calculation. When it is set to 1, the CV output represents the negative of the output of the PID calculation.
Bit 2 =
Bit
3
=
Derivative action on PV. When this bit is set to 0, the derivative action is applied to the error term. When it is set to 1, the derivative action is applied to PV. All remaining bits should be zero.
Deadband action. When the Deadband action bit is set to zero, then no deadband action is chosen. If the error is within the deadband limits, then the error is forced to be zero. Otherwise the error is not affected by the deadband limits. If the
Deadband action bit is set to one, then deadband action is chosen. If the error is within the deadband limits, then the error is forced to be zero. If, however, the error is outside the deadband limits, then the error is reduced by the deadband limit (error = error – deadband limit).
Bit
4
=Anti-reset windup action. When this bit is set to zero, the anti-reset windup action uses a reset back calculation. When the output is clamped, this replaces the accumulated Y remainder value (defined on page 12-95) with whatever value is necessary to produce the clamped output exactly. When the bit is set to one, this replaces the accumulated Y term with the value of the Y term at the start of the calculation. In this way, the pre-clamp Y value is held as long as the output is clamped.
NOTE: The anti-reset windup action bit is only available on release 6.01 or later 90-70
CPUs.
Remember that the bits are set in powers of 2. For example, to set Config Word to 0 for default PID configuration, you would add 1 to change the Error Term from SP–PV to PV–SP, or add 2 to change the
Output Polarity from CV = PID Output to CV = – PID Output, or add 4 to change Derivative Action from
Error rate of change to PV rate of change, etc.
12-94 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
12
Table 12-5. PID Parameters Details - Continued
Data Item Description
Manual
Command
(13)
This is an INT value set to the current CV output while the PID block is in Automatic mode. When the block is switched to
Manual
mode, this value is used to set the CV output and the internal value of the integrator within the Upper and Lower Clamp and
Slew Time limits.
This is an internal parameter that is normally left at 0.
Control Word
(14)
SP (15)
CV (16)
If the Override low bit is set to 1, this word and other internal SP, PV and CV parameters must be used for remote operation of this PID block (see below). This allows remote operator interface devices, such as a computer, to take control away from the PLC program. Caution: if you do not want this to happen, make sure the Control
Word is set to 0. If the low bit is 0, the next 4 bits can be read to track the status of the
PID input contacts as long as the PID Enable contact has power. A discrete data structure with the first five bit positions in the following format:
Bit: Word Value: Function: Status or External Action if Override bit set to
1:
0 1 Override If 0, monitor block contacts below. If 1, set them externally.
1 2 Manual/ If 1, block is in
Manual
mode; other numbers
2 4
Auto
Enable it is in
Automatic
mode.
Should normally be 1; otherwise block is never called.
UP/Raise If 1 and Manual (Bit 1) is 1, CV is being 3 8
4 16 incremented every solution.
DN/Lower If 1 and Manual (Bit 1) is 1, CV is
being incremented every solution.
(Non-configurable–set and maintained by the PLC) Tracks SP in; must be set externally if Override = 1.
(Non-configurable–set and maintained by the PLC) Tracks CV out.
PV (17)
Output (18)
(Non-configurable–set and maintained by the PLC) Tracks PV in; must be set externally if Override bit = 1.
(Non-configurable–set and maintained by the PLC) This is a signed word value representing the output of the function block before the application of the optional inversion. If no output inversion is configured and the output polarity bit in the control word is set to 0, this value will equal the CV output. If inversion is selected and the output polarity bit is set to 1, this value will equal the negative of the CV output.
Used internally for storage of intermediate values. Do not write to this location. Diff Term
Storage (19)
Int Term
Storage (20/21)
Used internally for storage of intermediate values. Do not write to this location.
Slew Term
Storage (22)
Lower and
Upper Range
(27/28)
Reserved (29–34 and 35–39)
Used internally for storage of intermediate values. Do not write to this location.
Clock (23–25) Internal elapsed time storage (time last PID executed). Do not write to these locations.
Y Remainder (26) Holds remainder for integrator division scaling for 0 steady state error.
Optional INT values in PV Counts that define the highest and lowest display value for the SP and PV Logicmaster
Zoom
key horizontal bar graph and ADS PID faceplate display.
29–34 are reserved for internal use; 35–39 are reserved for external use. They are reserved for GE Intelligent Platforms use, and cannot be used for other purposes.
GFK-0265J Chapter 12 Control Functions 12-95
12
12-96
Internal Parameters in RefArray
As described in Table 12-6 on the previous pages, the PID block reads 13 user parameters and uses the rest of the 40 word RefArray for internal PID storage. Normally you would not need to change any of these values. If you are calling the PID block in Auto mode after a long delay, you may want to use SVC_REQ #16 to load the current PLC elapsed time clock into %Ref+23 to update the last PID solution time to avoid a step change on the integrator. If you have set the Override low bit of the Control Word (%Ref+14) to 1, the next four bits of the Control Word must be set to control the PID block input contacts (as described in Table 12-5 on the previous pages), and the Internal SP and PV must be set as you have taken control of the PID block away from the ladder logic. The internal parameter words are:
PID Algorithm Selection (PIDISA or PIDIND) and Gains
The PID block can be programmed selecting either the Independent (PID_IND) term or standard
ISA (PID_ISA) versions of the PID algorithm. The only difference in the algorithms is how the
Integral and Derivative gains are defined. To understand the difference, you need to understand the following:
Both PID types calculate the Error term as SP – PV, which can be changed to Reverse Acting mode
PV – SP if the Error Term (low bit 0 in the Config Word %Ref+12) is set to 1. Reverse Acting mode may be used if you want the CV output to move in the opposite direction from PV input changes (CV down for PV up) rather than the normal CV up for PV up.
Error = (SP – PV) or (PV – SP) if low bit of Config Word set to 1
The Derivative is normally based on the change of the Error term since the last PID solution, which may cause a large change in the output if the SP value is changed. If this is not desired, the third bit of the Config Word can be set to 1 to calculate the Derivative based on the change of the PV. The dt (or Delta Time) is determined by subtracting the last PID solution clock time for this block from the current PLC elapsed time clock.
dt = Current PLC Elapsed Time clock – PLC Elapsed Time Clock at Last PID solution
Derivative = (Error – previous Error)/dt or (PV – previous PV)/dt if 3rd bit of Config
Word set to 1
The Independent term PID (PID_IND) algorithm calculates the output as:
PID Output = Kp * Error + Ki * Error * dt + Kd * Derivative + CV Bias
The standard ISA (PID_ISA) algorithm has a different form:
PID Output = Kc * (Error + Error * dt/Ti + Td * Derivative) + CV Bias where Kc is the controller gain, and Ti is the Integral time and Td is the Derivative time. The advantage of ISA is that adjusting the Kc changes the contribution for the integral and derivative terms as well as the proportional one, which may make loop tuning easier. If you have PID gains in terms or Ti and Td, use
Kp = Kc Ki = Kc/Ti and to convert them to use as PID User Parameter inputs.
Kd = Kc/Td
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
12
The CV Bias term above is an additive term separate from the PID components. It may be required if you are using only Proportional Kp gain and you want the CV to be a non-zero value when the
PV equals the SP and the Error is 0. In this case, set the CV Bias to the desired CV when the PV is at the SP. CV Bias can also be used for feed forward control where another PID loop or control algorithm is used to adjust the CV output of this PID loop.
If an Integral Ki gain is used, the CV Bias would normally be 0 as the integrator acts as an automatic bias. Just start up in Manual mode and use the Manual Command word (%Ref+13) to set the integrator to the desired CV, then switch to Automatic mode. This also works if Ki is 0, except the integrator will not be adjusted based on the Error after going into Automatic mode.
The following diagram shows how the PID algorithms work:
PROPORTIONAL
TERM - Kp
BIAS
Error Sign
SP a43646
DEAD
BAND
INTEGRAL - Ki
TIME
SLEW
LIMIT
UPPER/LOWER
CLAMP
POLARITY
CV
PV
Deriv Action
VALUE
TIME
DERIVATIVE
TERM - Kd
Figure 12-1. Independent Term Algorithm (PIDIND)
The ISA Algorithm (PIDISA) is similar except the Kp gain is factored out of Ki and Kd so that the integral gain is Kp * Ki and derivative gain is Kp * Kd. The Error sign, DerivAction and Polarity are set by bits in the Config Word user parameter.
CV Amplitude and Rate Limits
The block does not send the calculated PID Output directly to CV. Both PID algorithms can impose amplitude and rate of change limits on the output Control Variable. The maximum rate of change is determined by dividing the maximum 100% CV value (32000) by the Minimum Slew
Time, if specified as greater than 0. For example, if the Minimum Slew Time is 100 seconds, the rate limit will be 320 CV counts per second. If the dt solution time was 50 milliseconds, the new
CV output can not change more than 320*50/1000 or 16 CV counts from the previous CV output.
The CV output is then compared to the CV Upper and CV Lower Clamp values. If either limit is exceeded, the CV output is set to the clamped value. If either rate or amplitude limits are exceeded modifying CV, the internal integrator value is adjusted to match the limited value to avoid reset windup.
Finally, the block checks the Output Polarity (2nd bit of the Config Word %Ref+12) and changes the sign of the output if the bit is 1.
CV = Clamped PID Output or – Clamped PID Output if Output Polarity bit set
If the block is in Automatic mode, the final CV is placed in the Manual Command %Ref+13. If the block is in Manual mode, the PID equation is skipped as CV is set by the Manual Command, but all the rate and amplitude limits are still checked. That means that the Manual Command can not change the output above the CV Upper Clamp or below the CV Lower Clamps and the output can not change faster than the Minimum Slew Time allowed.
GFK-0265J Chapter 12 Control Functions 12-97
12
Sample Period and PID Block Scheduling
The PID block is a digital implementation of an analog control function, so the dt sample time in the PID Output equation is not the infinitesimally small sample time available with analog controls.
The majority of processes being controlled can be approximated as a gain with a first or second order lag, possibly with a pure time delay. The PID block sets a CV output to the process and uses the process feedback PV to determine an Error to adjust the next CV output. A key process parameter is the total time constant, which is how fast does the PV respond when the CV is changed. As discussed in the Setting Loop Gains section below, the total time constant, Tp+Tc, for a first order system is the time required for PV to reach 63% of its final value when CV is stepped.
The PID block will not be able to control a process unless its Sample Period is well under half the total time constant. Larger Sample Periods will make it unstable.
The Sample Period should be no bigger than the total time constant divided by 10 (or down to 5 worst case). For example, if PV seems to reach about 2/3 of its final value in 2 seconds, the Sample
Period should be less than 0.2 seconds, or 0.4 seconds worst case. On the other hand, the Sample
Period should not be too small, such as less than the total time constant divided by 1000, or the Ki
* Error * dt term for the PID integrator will round down to 0. For example, a very slow process that takes 10 hours or 36000 seconds to reach the 63% level should have a Sample Period of 40 seconds or longer.
Unless the process is very fast, it is not usually necessary to use a Sample Period of 0 to solve the
PID algorithm every PID sweep. If many PID loops are used with a Sample Period greater than the sweep time, there may be wide variations in PLC sweep time if many loops end up solving the algorithm at the same time. The simple solution is to sequence a one or more 1 bits through an array of bits set to 0 that is being used to enable power flow to individual PID blocks.
Determining the Process Characteristics
The PID loop gains, Kp, Ki and Kd, are determined by the characteristics of the process being controlled. Two key questions when setting up a PID loop are:
1.
How big is the change in PV when we change CV by a fixed amount, or what is the open loop gain?
2.
How fast does the system respond, or how quick does PV change after the CV output is stepped?
Many processes can be approximated by a process gain, first or second order lag and a pure time delay. In the frequency domain, the transfer function for a first order lag system with a pure time delay is:
PV(s)/CV(s) = G(s) = K * e **(–Tp s)/(1 + Tc s)
12-98 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
GFK-0265J
12
Plotting a step response at time t0 in the time domain provides an open loop unit reaction curve: a45709
CV Unit Step Output to Process
PV Unit Reaction Curve Input from Process
1 K
0.632K
t0 t0
Tp Tc
The following process model parameters can be determined from the PV unit reaction curve:
K
Tp
Tc
Process open loop gain = final change in PV/change in CV at time t0
(Note no subscript on K)
Process or pipeline time delay or dead time after t0 before the process output PV starts moving
First order Process time constant, time required after Tp for PV to reach 63.2% of the final PV
Usually the quickest way to measure these parameters is by putting the PID block in Manual mode and making a small step in CV output, by changing the Manual Command %Ref+13, and plotting the PV response over time. For slow processes, this can be done manually, but for faster processes a chart recorder or computer graphic data logging package will help. The CV step size should be large enough to cause an observable change in PV, but not so large that it disrupts the process being measured. A good size may be from 2 to 10% of the difference between the CV Upper and
CV Lower Clamp values .
Setting User Parameters Including Tuning Loop Gains
As all PID parameters are totally dependent on the process being controlled, there are no predetermined values that will work, however, it is usually a simple, iterative procedure to find acceptable loop gain.
1.
Set all the User Parameters to 0, then set the CV Upper and CV Lower Clamps to the highest and lowest CV expected. Set the Sample Period to the estimated process time constant
(above)/10 to 100.
2.
Put block in Manual mode and set Manual Command (%Ref+13) at different values to check if
CV can be moved to Upper and Lower Clamp. Record PV value at some CV point and load it into SP.
3.
Set a small gain, such as 100 * Maximum CV/Maximum PV, into Kp and turn off Manual mode. Step SP by 2 to 10% of the Maximum PV range and observe PV response. Increase Kp if PV step response is too slow or reduce Kp if PV overshoots and oscillates without reaching a steady value.
4.
Once a Kp is found, start increasing Ki to get overshooting that dampens out to a steady value in 2 to 3 cycles. This may required reducing Kp. Also try different step sizes and CV operating points.
Chapter 12 Control Functions 12-99
12
12-100
5.
After suitable Kp and Ki gains are found, try adding Kd to get quicker responses to input changes providing it doesn’t cause oscillations. Kd is often not needed and will not work with noisy PV.
6.
Check gains over different SP operating points and add Dead Band and Minimum Slew Time if needed. Some Reverse Acting processes may need setting Config Word Error Sign or
Polarity bits
Setting Loop Gains — Ziegler and Nichols Tuning Approach
Once the three process model parameters, K, Tp and Tc, are determined, they can be used to estimate initial PID loop gains. The following approach, developed by Ziegler and Nichols in the
1940’s, is designed to provide good response to system disturbances with gains producing a amplitude ratio of 1/4. The amplitude ratio is the ratio of the second peak over the first peak in the closed loop response.
1.
Calculate the Reaction rate:
R = K/Tc
2.
For Proportional control only, calculate Kp as
Kp = 1/(R * Tp) = Tc/(K * Tp)
3.
For Proportional and Integral control, use
Kp = 0.9/(R * Tp) = 0.9 * Tc/(K * Tp)
Ki = 0.3 * Kp/Tp
4.
For Proportional, Integral and Derivative control, use
Kp = G/(R * Tp) where G is from 1.2 to 2.0
Ki = 0.5 * Kp/Tp
Kd = 0.5 * Kp * Tp
5.
Check that the Sample Period is in the range (Tp + Tc)/10 to (Tp + Tc)/1000
Another approach, the “Ideal Tuning” procedure, is designed to provide the best response to SP changes, delayed only by the Tp process delay or dead time.
Kp = 2 * Tc/(3 * K * Tp)
Ki = Tc
Kd = Ki/4 if Derivative term is used
Once initial gains are determined, they must be converted to integer User Parameters. To avoid scaling problems, the Process gain, K, should be calculated as a change in input PV Counts divided by the output step change in CV Counts and not in process PV or CV engineering units. All times should also be specified in seconds. Once Kp, Ki and Kd are determined, Kp and Kd can be multiplied by 100 and entered as integer while Ki can be multiplied by 1000 and entered into the
User Parameter %RefArray.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
12
Sample PID Call
The following example has a Sample Period of 100 millisecond, a Kp gain of 4.00 and a Ki gain of
1.500. The Set Point is stored in %R1 with the Control Variable output in %AQ2 and the Process
Variable returned in %AI3. CV Upper and CV Lower Clamps must be set, in this case to 20000 and 400, and an optional small Dead Band of +5 and –5 has been included. The 40 word RefArray starts in %R100. Normally User Parameters are set in the RefArray with the PID Zoom key
F10
, but %M6 can be set to reinitialize the 14 words starting at %R102 (%Ref+2) from constants stored in logic.
The block can be switched to Manual mode with %M1 so that the Manual Command, %R113, can be adjusted. Bits %M4 or %M5 can be used to increase or decrease %R113 and the PID CV and integrator by 1 every 100 millisecond solution. For faster manual operation, bits %M2 and %M3 can be used to add or subtract the value in %R2 to/from %R113 every PLC sweep. The %T1 output is on when the PID is OK.
GFK-0265J Chapter 12 Control Functions 12-101
12
| _____ _____ _____
| %M0006 | | | | | |
|——| |———| BLK_|—————————|BLKMV|—————————————————|BLKMV|–
| | | | | | |
| | CLR_| | INT | | INT |
| | WORD| | | | |
|%R00100—|IN | CONST —|IN1 Q|—%R00102 CONST —|IN1 Q|— %R00109
| | LEN | +00010 | | +20000 | |
| |00035| | | | |
| |_____| CONST —|IN2 | CONST —|IN2 |
| +00005 | | +00400 | |
| | | | |
| CONST —|IN3 | CONST —|IN3 |
| +00005 | | +00000 | |
| | | | |
| CONST —|IN4 | CONST —|IN4 |
| +00400 | | +00000 | |
| | | | |
| CONST —|IN5 | CONST —|IN5 |
| +00000 | | +00000 | |
| | | | |
| CONST —|IN6 | CONST —|IN6 |
| +01500 | | +00000 | |
| | | | |
| CONST —|IN7 | CONST —|IN7 |
| +00000 |_____| +00000 |_____|
|
| _____
|ALW_ON | | %T0001
|——| |———————————————————————————————————————————| PID_|——( )——
| | IND |
| | |
| %R0001—|SP CV|– %AQ002
| | |
| | |
| %AI0003—|PV |
| | |
|%M0001 | |
|——| |———————————————————————————————————————————|MAN |
| | | |
| | %M0004 | |
| |——| |————|UP |
| | | |
| | %M0005 | |
| ——| |————|DN |
| |_____|
|
| %R00100
| _____
|%M0002 | |
|——| |———| ADD_|————
| | INT |
| | |
|%R00113—|I1 Q|— %R00113
| | |
| | |
|%R00002—|I2 |
| | |
| |_____|
|
| _____
|%M0003 | |
|——| |———| SUB_|—
| | INT |
| | |
|%R00113—|I1 Q|— %R00113
| | |
|%R00002—|I2 |
| | |
| |_____|
12-102 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Appendix
A
CPU Performance Data
This appendix contains instruction and overhead timing for each Series 90-70 CPU module. This timing information can be used to predict CPU sweep times.
Instruction Timing
The Series 90-70 PLC supports many different functions and function blocks. Table A-1, beginning on the next page, lists the execution time in microseconds and the memory size in bytes for each function supported by these CPUs:
1.
Model CPM 924/925
2.
Model CPM 914/915
3.
Model CPU 781/782
4.
Model CPU 788/89
5.
Models CPU 731R and later, CPU 732, CPU 771P and later, and CPU 772
6.
Models CPX 935 and CGR 935
7.
Model CPX 928
8.
Models CPX 772 and CGR 772, and CPX 782
Note
All timing information for all CPUs was not available at the time this manual was printed.
Additional information will be added to a future edition.
Two execution times are shown for each function:
Execution Time
Enabled
Disabled
Description
Time required to execute the function or function block when power flows into and out of the function. Typically, best-case times are when the data used by the block is contained in user RAM (word-oriented memory).
Time required to execute the function when it is not enabled.
Note
Timers are updated each time they are encountered in the logic by the amount of time consumed by the last sweep.
GFK-0265J A-1
A-2
A
Table A-1. Instruction Timing
Function
Group Function
924/
925
914/
915
Enabled
781/782
788/789
731/732
771/772
924/
925
914/
915
Disabled
781/782
788/789
731/732
771/772
924/
925
Increment
914/
915
781/782
788/789
731/732
771/772 Size
Timers
Counters
Math
ONDTR
OFDT
TMR
UPCTR
DNCTR
ADD (INT)
ADD (DINT)
SUB (INT)
SUB (DINT)
MUL (INT)
MUL (DINT)
DIV (INT)
DIV (DINT)
MOD (INT)
MOD (DINT)
ABS (INT)
ABS (DINT)
SQRT (INT)
SQRT (DINT)
6.5
6
7.5
8.5
6
5
7
5
8
5
8
5.5
8.5
5.5
10.5
5.5
7
10
15.5
10.5
9.5
10
11
9.5
6
9.5
6.5
10
6.5
10.5
7
12
7.5
14
7.5
8.5
14
27.5
34.5
32.5
37
28.5
28.5
22
34.5
17
36
21
35.5
22.5
41
23.5
46.5
25.5
28.5
40.5
80.5
78
68
79
67
66
34.5
63.5
35
63.5
38
76.5
41
82
41
85
50
51.5
82.5
166
5.5
6
8.5
8
6
4
6
4
6
4
5.5
4.5
5.5
4
5.5
4.5
5
4
5
8
9.5
10.5
11
9.5
5.5
6.5
4.5
7.5
4.5
6.5
4.5
6.5
5
7.5
5.5
7
4
6.5
22.5
30
32
29
28
14.5
19.5
10.5
20
11.5
19.5
14.5
18
12.5
21
18
18.5
11
16.5
53
65.5
-
-
62 -
63 -
62.5
18
30.5
19
30
18.5
31
25.5
26.5
16.5
26.5
-
-
-
-
-
-
31 -
19 -
30.5
-
18.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Relational EQ (INT)
EQ (DINT)
NE (INT)
NE (DINT)
GT (INT)
GT (DINT)
GE (INT)
GE (DINT)
LT (INT)
LT (DINT)
LE (INT)
LE (DINT)
CMP (INT)
CMP (DINT)
RANGE (INT)
RANGE (DINT)
6
6.5
6
6.5
6.5
7.5
6.5
6.5
7.5
7.5
6
6.5
10.5
12
10.5
9
8
9
8
10.5
9
10.5
9
9.5
9.5
10.5
8.5
10.5
12.5
14.5
16.5
14.5
21
30
20
31
24
28.5
25
31.5
27.5
35
20
32
34.5
41
46
53.5
37
58.5
36.5
58
43.5
61
41.5
58.5
43.5
61
41.5
58.5
62
79.5
82.5
96.5
3.5
5
3.5
5
4
5
3.5
5
3.5
5
3.5
5
9
9
5.5
8
4.5
7
4.5
7
4.5
7.5
4.5
7
4.5
7
4.5
7
14
12
8
9
12.5
18.5
14
20
13.5
18
14
20
14.5
20
14
21.5
33.5
32
26
21.5
17.5
30.5
17.5
30.5
17.5
30.5
17.5
30.5
55.5
56
33
34
-
30.5
-
18.5
-
30.5
-
17.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
15
15
15
15
15
15
15
15
15
15
15
15
21
21
Note:
Bit
Operation
AND (WORD)
AND(DWORD)
9.5
9.5
13.5
15
53.5
58
116.5
123.5
5
6
7
7.5
28.5
25.5
35
36
0.7
1
1.5
2
8.2
10.1
18.1
24.4
18
18
OR (WORD)
OR (DWORD)
XOR (WORD)
XOR (DWORD)
NOT (WORD)
8.5
9.5
8.5
9.5
7
14
15
14
15
10.5
57
63
58.5
65
42.5
118
126.5
118
124.5
76.5
5.5
6.5
5
5.5
5.5
7
8.5
7
7.5
6.5
25
24.5
24.5
26.5
22
35
36
35
34.5
32.5
0.8
1.2
0.8
1.1
0.3
1.6
2.3
1.6
2.3
0.7
9
11.7
8.9
11.6
3.5
19.6
27.5
19.3
26.6
8.4
18
18
18
18
15
NOT (DWORD)
MCMP (WORD)
MCMP (DWORD)
SHL (WORD)
SHL (DWORD)
7.5
14
15.5
11
12
11
24.5
27
17.5
18.5
41
97.5
100
61
66.5
77.5
213
221
137.5
147
5.5
7
7.5
5.5
6
7
10.5
11
8.5
8.5
25.5
36.5
35
25.5
27
32
56.5
56
41.5
43
0.3
0.6
1.3
0.6
1.2
0.7
1.3
2.7
1
2.1
3.6
3.8
7.7
3.9
7.9
10.3
8.4
16.9
10.2
20.5
15
30
30
24
24
SHR (WORD)
SHR (DWORD)
ROL (WORD)
ROL (DWORD)
ROR (WORD)
10.5
12
12.5
14
8.5
16.5
18
18
20
14
60.5
68
55
57.5
51
137.5
147
117.5
127
113
5
6
5
6
5
8
8.5
7.5
7.5
7
26.5
25
24
23.5
20.5
41
43
33.5
35.5
33.5
0.6
1.2
0.6
1.3
0.6
1
2.1
1.1
2.2
1.1
3.9
7.9
4
8.2
4.1
10.1
20.3
9.4
19
9.4
24
24
18
18
18
ROR (DWORD)
BTST (WORD)
BTST (DWORD)
BSET (WORD)
BSET (DWORD)
10
7.5
7
9
7.5
16
11
11
11
10.5
55.5
46.5
43
42.5
40.5
122
92
91
89.5
88.5
6.5
5
4
4
4
7.5
7
6
5.5
5.5
21.5
22.5
21.5
23
18.5
35.5
35
34
32.5
31.5
-
-
-
-
1.3
-
-
-
-
2.3
-
-
-
-
8.2
-
-
-
-
19
18
18
18
15
15
BCLR (WORD)
BCLR (DWORD)
MOVE (BIT)
BPOS (WORD)
BPOS (DWORD)
6
6
14
10
13
10.5
10
19
15
20.5
44
42
58
53
81
89.5
88.5
117.5
108
157.5
4
4
3.5
4
4
5.5
5.5
5.5
6
6
20.5
20
21
22.5
22
33.5
32.5
31
34
35
-
-
0.8
0.2
0.4
-
-
1.2
0.4
0.8
-
-
3.2
1.8
3.1
-
-
6
4.1
6.9
15
15
15
18
18
SHFR (BIT)
11 20.5
70.5
161.5
4 5.5
12.5
27.5
0.3
0.7
3.1
6.1
24
1.
Time (in microseconds) is based on Release 5.0 of Logicmaster 90-70 software. For information not available at print time for this manual (represented by a dash: –), refer to the IPI for that CPU.
2.
For table functions, increment is in units of length specified. For bit operation functions, microseconds/bit. For data move functions, microseconds/the number of bits or words.
3.
Enabled time is for single length units of type %R.
4.
COMMREQ time has been measured between CPU and EX7 with NOWAIT option.
5.
DOIO is the time to output values to discrete output module.
15
15
15
15
15
15
15
15
15
15
12
12
12
12
18
15
15
18
18
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Table A-1. Instruction Timing - Continued
Function
Group Function
Data Move
Data Table
MOVE (WORD)
MOVE (DWORD)
BLKMOV (WORD)
BLKMOV (DWORD)
SWAP (WORD)
SWAP (DWORD)
BLKCLR
BITSEQ
SHFR (WORD)
SHFR (DWORD)
SORT
TBLRD (INT)
TBLRD (DINT)
TBLWR (INT)
TBLWR (DINT)
FIFORD (INT)
FIFORD (DINT)
FIFOWRT (INT)
FIFOWRT (DINT
LIFORD (INT)
LIFORD (DINT)
LIFOWRT (INT)
LIFOWRT (DINT)
ARRAY_MOVE (BIT)
ARRAY_MOVE
(BYTE)
ARRAY_MOVE
(WORD)
ARRAY_MOVE
(DWORD)
SRCH (BYTE)
SRCH (WORD)
SRCH (DWORD)
ARRAY_RANGE
(WORD)
ARRAY_RANGE
(DWORD)
Conversion to INT (UINT) to INT (DINT) to INT (BCD-4) to DINT (INT) to DINT (UINT) to DINT (BCD-8) to UINT (INT) to UINT (DINT) to UINT (BCD-4) to BCD-4 (INT) to BCD-4 (UINT) to BCD-8 (DINT)
924/
925
7.5
6
8.5
5.5
7
5.5
7
6
7.5
5.5
8
18.5
12
4.5
7
4.5
10
11
7.5
5.5
7
5.5
11.5
258
5.5
Enabled
914/
915
11.5
9
14
9
11
8
13
9
12
8
14
27.5
20.5
5.5
10.5
6
15
15.5
9.5
8
10
7.5
16.5
423
8.5
781/782
788/789
28.5
30
52
29
31.5
25.5
45
27.5
29.5
30
44.5
91
74
14.5
32.5
21
28.5
25
36.5
19
46.5
54
54
1403.5
27.5
731/732
771/772
58.5
60.5
104.5
58.5
61
55
85
52
57
55
85
197.5
163
29.5
56.5
36
55
45.5
65
30.5
95
113.5
117
2894
53.5
924/
925
4
3.5
6
2.5
3.5
3
5
2.5
3.5
2.5
6
5.5
6
3.5
7
4
5
3
5.5
3
6.5
3
5
5
3.5
914/
915
4
3.5
8.5
4
7.5
3
4
3.5
4
3.5
9
9
9.5
3.5
6.5
3.5
11.5
5
6.5
3.5
9
3.5
6
6
4
Disabled
781/782
788/789
12.5
11.5
19.5
9.5
12
11.5
21.5
11.5
11.5
11.5
23.5
23
23
11.5
18
7.5
28.5
12
20.5
10.5
38.5
11.5
14.5
18.5
11
12
12
9.5
9.5
10
12
11.5
4.5
5.5
5
6.5
5.5
11.5
4.5
5.5
5
7
5.5
8.5
20.5
20.5
15
15
16
16.5
16.5
6.5
6
6.5
7.5
9.5
7.5
7
7
7
13
7.5
13
76
76
56
57
60
60.5
57.5
21.5
23
20
21
23.5
44.5
16.5
19.5
20
29
25
38.5
164
165
119
122.5
132
124
127.5
32
40
38.5
33
32.5
76.5
32
39.5
38.5
44
43
77
5.5
6.5
5.5
5.5
6
5.5
7.5
3
3.5
3.5
4
5
4.5
3.5
4.5
4
5
3
5
9.5
9.5
8.5
8.5
8.5
8
8
3.5
5
5.5
3.5
3.5
5.5
3.5
5
4.5
6
3.5
6
23
25.5
25
25.5
24
22.5
20
10.5
16
9
11
11
19.5
7.5
15
7.5
16
12
18.5
731/732
771/772
18 -
17.5
-
37.5
-
17 -
18 -
17.5
-
37.5
-
17 -
18 -
17 -
37.5
-
41.5
42.5
18.5
31
16.5
-
50.5
-
17.5
31
16.5
80.5
-
28.5
30.5
28
17.5
-
924/
925
0.05
0.2
0.3
0.5
0.1
0.05
0.1
2.02
0.01
0.10
Increment
-
-
-
914/
915
0.1
0.2
0.6
0.9
0.2
0.05
0.1
3.61
-
-
-
-
-
-
-
-
-
-
-
-
0.01
0.21
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
781/782
788/789
0.4
1
1.7
2.7
0.6
0.3
0.8
14.43
0.10
0.50
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
731/732
771/772 Size
0.8
1.7
3.5
5.6
1.4
0.6
1.3
36.92
0.30
1.20
21
21
21
21
21
21
21
21
21
21
21
21
–
–
15
15
12
24
24
15
15
30
44
24
15
41.5
43
40.5
41
41
38
38
16.5
-
26 -
17 -
17.5
-
17.5
-
26.5
-
17 -
26 -
17 -
16.5
-
16.5
-
26.5
-
0.03
0.09
0.03
0.04
0.12
0.24
0.25
0.04
0.09
0.07
0.08
0.25
0.46
0.50
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.10
0.30
0.30
0.30
0.80
2
2.10
-
-
-
-
-
-
-
-
-
-
-
-
0.30
0.60
0.60
0.60
1.50
4.80
4.80
–
–
–
–
–
–
–
12
12
12
12
12
12
12
12
12
12
12
12
Note: 1.
Time (in microseconds) is based on Release 5.0 of Logicmaster 90-70 software. For information not available when this manual was being printed (represented by a dash: –), refer to the IPI for each CPU.
2.
For table functions, increment is in units of length specified. For bit operation functions, microseconds/bit. For data move functions, microseconds/the number of bits or words.
3.
Enabled time is for single length units of type %R.
4.
COMMREQ time has been measured between CPU and EX7 with NOWAIT option.
5.
DOIO is the time to output values to discrete output module.
A
GFK-0265J Appendix A CPU Performance Data A-3
A
Table A-1. Instruction Timing - Continued
Function
Group
Control
Note:
Function
JUMP
FOR/NEXT
MCR/ENDMCR
Combined
DOIO
DOIO with ALT
SUSIO
COMMREQ
CALL/RETURN
(LD)
CALL/RETURN
(SFC)
CALL/RETURN
(PSB)
#16
#17
#18
#19
#20
#21
#22
#6
#7
#8
#9
#10
#11
#12
#13
#14
#15
CALL/RETURN
(External Block)
PIDISA
PIDIND
VMERD (BYTE)
VMERD (WORD)
VMEWRT (BYTE)
VMEWRT (WORD)
VMERMW
VMETST
VME_CFG_RD
VME_CFG_WRT
SVCREQ:
#1
#2
#3
#4
924/
925
2.5
13.5
7
25.5
32.5
3.5
113
23
104.5
16.5
42.5
914/
915
2.5
19.5
11
40
47
4.5
137
31
143
Enabled
23.5
74
781/782
788/789
6.5
57
28
122
140.5
12
350
90.5
390
73.5
262.5
731/732
771/772
13
124
51
243.5
311.5
22
790
229.5
731.5
145
309.5
924/
925
2
5.5
6
3.5
4
3
9
2.5
2.5
3
2.5
914/
915
2
8.5
9.5
4.5
5
4
11
2.5
2.5
3
2.5
Disabled
781/782
788/789
2.5
22
28
11
11.5
7
22.5
5
5
3.5
3
731/732
771/772
5 -
52.5
-
46.5
-
20.5
-
20.5
-
15.5
-
38.5
-
6 -
6 -
7 -
6 -
924/
925
-
-
-
-
-
-
-
-
-
-
-
914/
915
Increment
781/782
788/789
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
731/732
771/772 Size
15
15
6
18
15
–
–
9
15
15
15
-
6.5
6
16
16
19
19
21
21
31.5
26.5
12
12
12
11
13
24
20
23
15
12
11
150
15
19
23
2939
34
26
138
11
-
11
11
27.5
27.5
30
30
33.5
28.5
50.5
43
23
21
22
21
22
41
37
36
25
22
20
203
25
31
40
2998
52
42
178
21
-
40
41.5
89.5
89.5
102.5
97.5
99.5
86
170.5
159.5
79
77
76
74
82
152
143
130
90
82
77
643
91
115
94
3199
77
128
586
77
-
75.5
76.5
173.5
171.5
192.5
188
191.5
155.5
345.5
333.5
97
86
85
85
93
288
279
202
127
117
82
963
156
148
346
1203
92
248
1558
85
-
6
6.5
4.5
4.5
5.5
4.5
4.5
6.5
5.5
5.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
-
9.5
10
7.5
7.5
8
7.5
7.5
9.5
9.5
8.5
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
-
33.5
31
20.5
19
20
19.5
20.5
25.5
26.5
28
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
-
65
66.5
35
34
36.5
34
35 -
39
45
45
26
26
-
-
-
-
-
26 -
26 -
26 -
26 -
26
26
26
26
26
-
-
-
-
-
-
26 -
26 -
26 -
26 -
26
26
26
26
26
-
-
-
-
-
-
-
0.8
0.8
0.8
0.8
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.8
0.8
0.8
0.8
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.9
0.9
0.8
0.8
-
-
-
-
-
-
1.2
1.2
0.9
0.9
1.
Time (in microseconds) is based on Release 5.0 of Logicmaster 90-70 software. For information not available when this manual was being printed (represented by a dash: –), refer to the IPI for each CPU.
2.
For table functions, increment is in units of length specified. For bit operation functions, microseconds/bit. For data move functions, microseconds/the number of bits or words.
3.
Enabled time is for single length units of type %R.
4.
COMMREQ time has been measured between CPU and EX7 with NOWAIT option.
5.
DOIO is the time to output values to discrete output module.
12
12
12
12
12
12
12
12
12
12
18
18
15
–
–
27
27
18
18
18
12
12
12
12
12
12
12
12
12
12
12
12
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
A-4 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Table A-1. Instruction Timing - Continued
Function
Group
Floating
Point
Note:
Math:
Function
924/
925
914
915
Enabled
781/782
788/789
731/732
771/772
924/
925
914/
915
Disabled
781/782
788/789
731/732
771/772
924/
925
914/
915
Increment
781/782
788/789
731/732
771/772 Size
ADD_REAL
SUB_REAL
MUL_REAL
DIV_REAL
ABS_REAL
SQRT_REAL
Trigonometric:
SIN
COS
TAN
ASIN
ACOS
ATAN
Logarithmic:
LOG
LN
EXPT
EXP
Comparison:
EQ_REAL
NE_REAL
GT_REAL
GE_REAL
LT_REAL
LE_REAL
CMP_REAL
Data Move:
MOVE_REAL
Conversion:
REAL_TO_INT
REAL_TO_UINT
REAL_TO_DINT
INT_TO_REAL
UINT_TO_REAL
DINT_TO_REAL
REAL_TRUN_INT
REAL_TRUN_DINT
DEG_TO_RAD
RAD_TO_DEG
BCD4_TO_REAL
BCD8_TO_REAL
8.5
8.5
8.5
9.5
7
8
10.5
10
9
6.5
8.5
10.5
6
7
10.5
11
7.5
7
7.5
7.5
8
7.5
17
6
7
8.5
8
6
7.5
5.5
8.5
8
9
7.5
7.5
9.5
13.5
13
13
14
11
13
20.5
20
18
13.5
17.5
19.5
13
13.5
21.5
22.5
11.5
10.5
11.5
11
11
11
20
9
12.5
13
13.5
10
10.5
9.5
13.5
13.5
14.5
14
13
15
52.5
51.5
51
54
42.5
43.5
63.5
61.5
58.5
59
69.5
54
48
47.5
92
90.5
40
41
46
46
43.5
45
51
29
43
46.5
41.5
36.5
30
28
50
51.5
43.5
46
36
39.5
108
108
108
109
85
90.5
126.5
121.5
114.5
132
165
110.5
100.5
99.5
228
194
87
85
92
92
90
90
114
55.5
96.5
112.5
94
68
70.5
65.5
126.5
121.5
101
105
92
100
5.5
5.5
5.5
5.5
5
6
3.5
2.5
3
2.5
2.5
3.5
2.5
2.5
3
2.5
5
5
5
5
5.5
5
13
3.5
4
4
5
4
4
5
5
4
5.5
4
4
4
6.5
6.5
6.5
7
6.5
7
6
5.5
5.5
5.5
5.5
5.5
5.5
5.5
6
5.5
6
6
6
6
8
6
16.5
6
6
6
7
6
6
5.5
7
6.5
7
6
5.5
6
19
22.5
21
22
17
14
16
14
14
12.5
14.5
16
13.5
15.5
17.5
14
17.5
20
15
13.5
19.5
21.5
35.5
14
17
16
14.5
14.5
11.5
14
15.5
14.5
12
12
15
13.5
31
26.5
25.5
25.5
25.5
25
30
25.5
31
31
64.5
30
26
25.5
26
26
26
26
25.5
26
-
31 -
31 -
31 -
26.5
-
-
-
-
25 -
25.5
-
25 -
25 -
-
-
-
-
-
-
31 -
30 -
31 -
31 -
-
-
-
-
25.5
-
25 -
26 -
25.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
1.
Time (in microseconds) is based on Release 5.0 of Logicmaster 90-70 software. For information not available when this manual was being printed (represented by a dash: –), refer to the IPI for each CPU.
2.
For table functions, increment is in units of length specified. For bit operation functions, microseconds/bit. For data move functions, microseconds/the number of bits or words.
3.
Enabled time is for single length units of type %R.
4.
COMMREQ time has been measured between CPU and EX7 with NOWAIT option.
5.
DOIO is the time to output values to discrete output module.
–
–
-
–
–
–
–
-
–
–
–
–
–
–
–
–
–
–
–
A
GFK-0265J Appendix A CPU Performance Data A-5
A
Table A-1. Instruction Timing - Continued
Function
Group Function
Enabled
935 928 CPX782
CPX772
Disabled
935 928 CPX782
CPX772
Increment
935 928 CPX782
CPX772 Size
Timers
Counters
ONDTR
OFDT
TMR
UPCTR
DNCTR
5.5
5.5
6
5.5
5.5
6
5.5
6.5
5.5
5.5
23.5
21
23.5
19
19
5
5.5
5.5
5
5
5
5.5
6
5
5
16.5
-
20 -
20.5
-
18 -
18 -
-
-
-
-
-
-
-
-
-
-
18
15
15
18
18
Math ADD (INT)
ADD (DINT)
SUB (INT)
SUB (DINT)
MUL (INT)
MUL (DINT)
4.5
6.5
4
6
4.5
4
5.5
4
5.5
4.5
6.5
4
6
4.5
4
6
4
6
10.5
20
10.5
20
11
21
11.5
21
12
3.5
4.5
3.5
5.5
3.5
3.5
4.5
3.5
4.5
3.5
4.5
3.5
5.5
3.5
3.5
5
3.5
4.5
7.5
-
11.5
-
7.5
-
11 -
8 -
11.5
-
8 -
11.5
-
8 -
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
15
15
15
15
15
15
Relational
DIV (INT)
DIV (DINT)
MOD (INT)
MOD (DINT)
ABS (INT)
ABS (DINT)
SQRT (INT)
SQRT (DINT)
EQ (INT)
EQ (DINT)
NE (INT)
NE (DINT)
GT (INT)
GT (DINT)
GE (INT)
GE (DINT)
LT (INT)
LT (DINT)
LE (INT)
LE (DINT)
CMP (INT)
CMP (DINT)
RANGE (INT)
RANGE (DINT)
7
4.5
5.5
6.5
9
5.5
6
5.5
6
6.5
7
5.5
6
6.5
7
5.5
6
9.5
10
7
7.5
7
5
5.5
6.5
9
5.5
6
5.5
6
6.5
7
5.5
6
6.5
7
5.5
6
9.5
10.5
7.5
7.5
25
17
17
20
37.5
14
19.5
13
19
16
20.5
15.5
19.5
17
20.5
15.5
20
22.5
27.5
28
30.5
5
3.5
4.5
3
4.5
3
4.5
3
4.5
3
4.5
3
4.5
3
4.5
3
4.5
7.5
8
4.5
4.5
5
4
4.5
3
4.5
3.5
4.5
3.5
4.5
3.5
4.5
3.5
4.5
3.5
4.5
3.5
4.5
8
8
4.5
5
12
9.5
10
6.5
10
7 -
11 -
7 -
11 -
7 -
12 -
7 -
11 -
7.5
11.5
7
11
20.5
21
13
13.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
15
15
15
15
12
12
12
12
15
15
15
15
15
15
15
15
15
15
15
15
21
21
Bit AND (WORD)
6.5
7 32 4.5
4.5
13 0.5
0.5
5.1
18
Operation AND(DWORD)
7.5
7.5
34 5 5 13.5
0.6
0.7
6
18
OR (WORD)
OR (DWORD)
6.5
7.5
7
8
32.5
35.5
4.5
5
4.5
5
13
14
0.5
0.7
0.5
0.8
5.4
7.3
18
18
XOR (WORD)
XOR (DWORD)
6.5
7.5
7
7.5
32.5
34.5
4.5
5
4.5
5
13.5
13.5
0.5
0.7
0.5
0.8
5.4
7
18
18
NOT (WORD)
5.5
5.5
23.5
4 4 12 0.2
0.2
1.9
15
NOT (DWORD)
MCMP (WORD)
6
9.5
6
10
23.5
58.5
5
6.5
5
6.5
12
18
0.2
0.4
0.2
0.4
1.6
3.3
15
30
MCMP (DWORD)
SHL (WORD)
10.5
9.5
11
9.5
62
37.5
7
4.5
7
4.5
18
13.5
0.8
0.4
0.9
0.5
6.7
2.3
30
24
SHL (DWORD)
10.5
10.5
40 5.5
5.5
14.5
0.9
1.1
4.8
24
SHR (WORD)
SHR (DWORD)
8.5
9.5
8.5
9.5
39
41
4.5
5.5
4.5
5.5
15
15.5
0.4
0.9
0.5
1.1
2.3
4.7
24
24
ROL (WORD)
ROL (DWORD)
7.5
8
7.5
8
32
34.5
4.5
5
4.5
5
12.5
13
0.4
1
0.5
1.1
2.3
4.8
18
18
ROR (WORD)
6.5
6.5
31.5
4.5
4.5
12.5
0.5
0.5
2.5
18
ROR (DWORD)
BTST (WORD)
8
6.5
8
6.5
34
26
5
4.5
4.5
4.5
14
12.5
-
1
-
1.1
-
5.1
18
18
BTST (DWORD)
BSET (WORD)
6.5
5.5
6.5
5.5
25
25
4.5
4
4.5
4
11.5
11
-
-
-
-
-
-
18
15
BSET (DWORD)
5.5
5.5
23.5
4.5
4.5
9.5
-
15
BCLR (WORD)
BCLR (DWORD)
5.5
5.5
5.5
5.5
24.5
24.5
4
4
4
4
11
11
-
-
-
-
-
-
15
15
MOVE (BIT)
BPOS (WORD)
11
6.5
11
6.5
36
30
4
4
4
4
11.5
11
0.7
0.1
0.7
0.1
1.8
1.3
15
18
BPOS (DWORD)
8.5
8.5
40.5
4 4 11 0.2
0.2
2.3
18
SHFR (BIT)
8 8 43 3.5
3.5
8.5
0.2
0.2
1.8
24
Note: 1. Time (in microseconds) is based on Release 5.0 of Logicmaster 90-70 software. For information not available at print time for this manual (represented by a dash; –),
refer to the IPI for that CPU.
2. For table functions, increment is in units of length specified. For bit operation functions, microseconds/bit. For data move functions, microsec
onds/the number of ts or rds.
3. Enabled time is for single length units of type %R.
4. COMMREQ time has been measured between CPU and EX7 with NOWAIT option.
5. DOIO is the time to output values to discrete output module.
A-6 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Table A-1. Instruction Timing - Continued
Function
Group Function
Data Move
Data Table
Array
ARRAY_MOVE
(DWORD)
SRCH (BYTE)
SRCH (WORD)
SRCH (DWORD)
ARRAY_RANGE
(WORD)
ARRAY_RANGE
(DWORD)
Conversion to INT (UINT) to INT (DINT) to INT (BCD-4) to DINT (INT) to DINT (UINT) to DINT (BCD-8) to UINT (INT) to UINT (DINT) to UINT (BCD-4) to BCD-4 (INT) to BCD-4 (UINT) to BCD-8 (DINT)
MOVE (WORD)
MOVE (DWORD)
BLKMOV (WORD)
BLKMOV (DWORD)
SWAP (WORD)
SWAP (DWORD)
BLKCLR
BITSEQ
SHFR (WORD)
SHFR (DWORD)
SORT
TBLRD (INT)
TBLRD (DINT)
TBLWR (INT)
TBLWR (DINT)
FIFORD (INT)
FIFORD (DINT)
FIFOWRT (INT)
FIFOWRT (DINT
LIFORD (INT)
LIFORD (DINT)
LIFOWRT (INT)
LIFOWRT (DINT)
ARRAY_MOVE (BIT)
ARRAY_MOVE
(BYTE)
ARRAY_MOVE
(WORD)
Enabled
935 928 CPX772
CPX782
5
4.5
6.5
4
5
4
5.5
4
5
4
5.5
9.5
8.5
215.5
4
7
8
6
4
9
4
5.5
4.5
6
4.5
5
4.5
6.5
4
5
4
5.5
4
5
4
5.5
10
9
260
4
7
8
6
4
9
4
5.5
4.5
6
4.5
17
17.5
31.5
16.5
18
15
25.5
14
17
15
26
52.5
44
20.5
10.5
28.5
32.5
34
788
15.5
9.5
18.5
13
18
14
8.5
9.5
8
7.5
8
8
7.5
4
5
4.5
5
5
6.5
4
5
4.5
4.5
4.5
7
9
9.5
8.5
7.5
8
8
7.5
4
5
4.5
5
5
6.5
4
5
4.5
4.5
4.5
7
45.5
46
36
35.5
38.5
38
37.5
11.5
13.5
12
12
11.5
19.5
10.5
13.5
12.5
12
13
18
5
5.5
5
5
5
5
5
3
4
3
3.5
3.5
4.5
3
4
3
3
3
4.5
Disabled
5
5.5
5
3
4
3
3.5
3.5
4
3
4
3
3
3
4.5
5
5
5
5
15.5
16
14.5
14.5
14.5
14
14
5.5
-
9.5
-
6 -
5.5
-
6.5
-
9.5
-
6.5
-
9 -
6.5
-
6 -
6 -
9.5
-
0.04
0.09
0.02
0.02
0.08
0.15
0.16
Increment
2
3
2
3
2
4
3
2
4
2
4.5
5
5
4.5
2.5
6
3.5
4.5
4.5
2
3
4.5
2.5
5.5
2.5
2
3
2
3
2
4
3
2
4
2
4.5
5
5
4.5
2.5
6
3.5
4.5
4
2
3
4.5
2.5
5.5
2.5
935 928 CPX772
CPX782
935 928 CPX772
CPX782 Size
7
11
5 -
19 -
6.5
11
5.5
24 -
9
10
13
4.5
-
0.1
0.2
0.2
0.3
0.1
0.1
0.2
1.38
5.5
-
5 -
12.5
-
5.5
-
5.5
-
5 -
13 -
5 -
6 -
5 -
13.5
-
14.5
15
0.01
0.07
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.2
0.2
0.3
0.2
0.1
0.2
1.53
0.01
0.07
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.3
0.8
1.3
1.5
0.3
0.3
0.7
8.8
0.07
0.40
21
21
21
21
21
21
21
21
21
21
21
21
15
15
30
44
15
15
12
24
24
24
15
–
–
-
-
-
-
-
-
-
-
-
-
-
-
0.06
0.12
0.02
0.02
0.08
0.16
0.17
-
-
-
-
-
-
-
-
-
-
-
-
0.10
0.30
0.10
0.10
0.40
1.30
1.30
–
–
–
–
–
–
–
Note: 1. Time (in microseconds) is based on Release 5.0 of Logicmaster 90-70 software. For information not available when this manual was being printed
(represented by a dash: –), refer to the IPI for each CPU.
2. For table functions, increment is in units of length specified. For bit operation functions, microseconds/bit. For data move functions, microseconds/
/the number of bits or words.
3. Enabled time is for single length units of type %R.
4. COMMREQ time has been measured between CPU and EX7 with NOWAIT option.
5. DOIO is the time to output values to discrete output module
12
12
12
12
12
12
12
12
12
12
12
12
A
GFK-0265J Appendix A CPU Performance Data A-7
A
Function
Group
Control
Table A-1. Instruction Timing - Continued
Function
JUMP
935
2.5
Enabled
928 CPX772
CPX782
2.5
3.5
Disabled Increment
935 928 CPX772
CPX782
2 2 3 -
935 928 CPX772
CPX782 Size
-
–
#4
#6
#7
#8
#9
#10
#11
#12
#13
#14
#15
#16
#17
#18
FOR/NEXT
MCR/ENDMCR
Combined
DOIO
DOIO with ALT
SUSIO
COMMREQ
CALL/RETURN
(LD)
CALL/RETURN
(SFC)
CALL/RETURN
(PSB)
CALL/RETURN
(External Block)
PIDISA
PIDIND
VMERD (BYTE)
VMERD (WORD)
VMEWRT (BYTE)
VMEWRT (WORD)
VMERMW
VMETST
VME_CFG_RD
VME_CFG_WRT
SVCREQ:
#1
#2
#3
10.5
6
13.5
14
3
84.5
23
82
15.5
27.5
6
6
13.5
13.5
14.5
14.5
15
17
26
17.5
11
6.5
15
16
3
90
24.5
88
17.5
31.5
6
6
13.5
13.5
14.5
14.5
15.5
17
26.5
18
38
18.5
81.5
95.5
7.5
240.5
57.5
251
47.5
152.5
22.5
23
53
50.5
55
54.5
56.5
49
104
93
5
5
3
3
2.5
8.5
2
2
3
2
6
6
4
4
4
4
4
6
4.5
4.5
5
5.5
3
3
2.5
8.5
2
2
3
2
6
6
4
4
4
4
4
6
4.5
4.5
16.5
17.5
7.5
7.5
6
16
2.5
2.5
3.5
2.5
-
-
-
-
-
-
-
-
-
-
20.5
-
20.5
-
13
12
13
12.5
13 -
14.5
-
16.5
-
16 -
0.8
0.8
0.8
0.8
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.8
0.8
0.8
0.8
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.9
0.9
0.8
0.8
–
9
15
15
6
18
15
15
15
15
-
128
10
16
14
2985
11
19
22
19
11
10
9
9
9
9
8
24
20
77
9
-
159
10
17
15
2986
11
21
25
19
11
10
9
9
9
9
9
24
23
91
9
-
370
55
64
91
546 (772)
3025 (782)
112
99
381
47
50
96
120
71
54
49
49
48
48
50
48
-
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
-
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
-
10.5
-
10.5
-
10.5
-
10.5
-
10.5
-
10.5
-
10.5
-
10.5
-
10.5
10.5
10.5
10.5
10.5
10.5
-
10.5
-
10.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
#19
#20
#21
#22
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
10.5
-
10.5
-
10.5
-
10.5
-
-
-
-
-
-
-
-
-
12
12
12
12
Note 1. Time (in microseconds) is based on Release 5.0 of Logicmaster 90-70 software. For information not available when this manual was being printed
(represented by a dash: –), refer to the IPI for each CPU.
2. For table functions, increment is in units of length specified. For bit operation functions, microseconds/bit. For data move functions, microseconds/
/the number of bits or words.
3. Enabled time is for single length units of type %R.
4. COMMREQ time has been measured between CPU and EX7 with NOWAIT option.
5. DOIO is the time to output values to discrete output module.
12
12
12
12
12
–
12
12
12
12
18
18
18
15
–
27
27
18
18
12
12
12
12
12
12
12
12
12
A-8 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Function
Group
Floating
Point
Table A-1. Instruction Timing - Continued
Math:
Function
Enabled
935 928 CPX772
CPX782
Disabled
935 928 CPX772
CPX782
ADD_REAL
SUB_REAL
MUL_REAL
DIV_REAL
ABS_REAL
SQRT_REAL
Trigonometric:
SIN
COS
TAN
ASIN
ACOS
ATAN
Logarithmic:
LOG
LN
EXPT
EXP
Comparison:
EQ_REAL
NE_REAL
GT_REAL
GE_REAL
LT_REAL
LE_REAL
CMP_REAL
Data Move:
MOVE_REAL
Conversion:
REAL_TO_INT
REAL_TO_UINT
REAL_TO_DINT
INT_TO_REAL
UINT_TO_REAL
DINT_TO_REAL
REAL_TRUN_INT
REAL_TRUN_DINT
DEG_TO_RAD
RAD_TO_DEG
BCD4_TO_REAL
BCD8_TO_REAL
7
7
16.5
7
7
7
7
8
8
7.5
6
7
8
5.5
5.5
8.5
9
7
6
6.5
7
7
7
4.5
5
4.5
6
6
5.5
6
6
5.5
5
6
6
6.5
7
7
16.5
7
7
7
7
8
8
7.5
6
7
8
5.5
5.5
8.5
9
7
6
6.5
7
7
7
4.5
5
4.5
6
6
5.5
6
6
5.5
5
6
6
6.5
19.5
20
19.5
17.5
19
20
21.5
21
21.5
21.5
17.5
18
19
18.5
27
20
21
19.5
20.5
20.5
19.5
19.5
32
17.5
17.5
16
20.5
20
17.5
18
20
18
17
18.5
19.5
21.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
5
5
13.5
5
5
5
5
3
3
3
3
3
3
3
3
3
3
4.5
4.5
4.5
4.5
4.5
4.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
5
5
13.5
5
5
5
5
3
3
3
3
3
3
3
3
3
3
4.5
4.5
4.5
4.5
4.5
4.5
3.5
11 -
11 -
11 -
12 -
10 -
10.5
-
9 -
9 -
9.5
-
9.5
-
9.5
-
9.5
-
9 -
9 -
10.5
-
9 -
12 -
11.5
-
11.5
-
11.5
-
11.5
-
11 -
25.5
-
10 -
9.5
-
9.5
-
9.5
-
9.5
-
9.5
-
9.5
-
10 -
9 -
9.5
-
9.5
-
9.5
-
9 -
Increment
935 928 CPX772
CPX782 Size
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
-
–
–
–
-
Note: 1. Time (in microseconds) is based on Release 5.0 of Logicmaster 90-70 software. For information not available when this manual was being
printed (represented by a dash: –), refer to the IPI for each CPU.
2. For table functions, increment is in units of length specified. For bit operation functions, microseconds/bit. For data move functions,
microseconds/the number of bits or words.
3. Enabled time is for single length units of type %R.
4. COMMREQ time has been measured between CPU and EX7 with NOWAIT option.
5. DOIO is the time to output values to discrete output module.
A
GFK-0265J Appendix A CPU Performance Data A-9
A
Overhead Sweep Impact Time
This part of the appendix contains overhead timing information for the Series 90-70 PLC CPU.
This information can be used in conjunction with the estimated logic execution time to predict sweep times for each of the Series 90-70 CPUs. The information in this section is made up of a base sweep time plus sweep impact times for each of the CPU models: 731, 732, 771, 772, 781,
782, 914, 915, 924,925, 928 and 935. The predicted sweep time is computed by adding the sweep impact time(s), the base sweep, and the estimated logic execution time.
Two examples of predicting sweep times are provided at the end of this appendix.
Sweep impact times are composed of four basic sections:
1
.
Programmer communications sweep impact
2
.
I/O Scan and fault sweep impact
3
.
Ethernet Global Data sweep impact
4
.
Intelligent Option Module (PCMs and LAN modules) sweep impact
5
.
I/O interrupt performance and sweep impact
Each of these sections describes the functions and provides tables with the corresponding times for each CPU model.
The information in these tables may be used to predict sweep time based on a given configuration.
What the Tables Contain
The following tables contain sweep impact times for overhead functions for the Series 90-70 PLC.
Base sweep time is the time for an empty _MAIN program block to execute, with no configuration stored and none of the windows active. The rest of the timing values are given as sweep impact times, that is, the time added to the sweep by the function in question. Sweep impact times are nominal.
Note
There are two categories of sweep impact numbers listed in the tables—those that impact the sweep every sweep and those that impact the sweep only when invoked. The functions that impact the sweep every sweep are listed in bold type in each table.
In some of the tables, functions are shown as asynchronously impacting the sweep. This means that there is not a set phase of the sweep in which the function takes place. For instance, the scanning of all I/O modules takes place during either the input or output scan phase of the PLC
CPU’s sweep. However, I/O interrupts are totally asynchronous to the sweep and will interrupt any function currently in progress.
A-10 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
A
The communication functions (with the exception of the high priority programmer requests) are all processed within one of the two windows in the sweep (the Programmer Communications Window and the System Communications Window). Sweep impact times for the various service requests are all minimum sweep impact times for the defined functions, where the window times have been adjusted so that no timeslicing (limiting) of the window occurs in a given PLC sweep. This means that, as much as possible, each function is completed in one occurrence of the window (between consecutive logic scans). The sweep impact of these functions can be spread out over multiple sweeps (limited) by adjusting the window times to a value lower than the documented sweep impact time. For the programmer, the default time is 10 milliseconds; therefore, some of the functions listed in that section will naturally timeslice over successive sweeps.
Base Sweep Times
The base sweep time for each CPU model is shown below. This time is for an empty _MAIN program block with no programmer attached, no configuration downloaded, and no other module present in the system other than the CPU. The following diagram shows the full sweep phases and the base sweep phases contrasted so that the optional parts of the sweep are illustrated.
Table A-2. Base Sweep vs. Full Sweep Phases
BASE SWEEP
<START OF SWEEP>
Sweep Housekeeping
↓
NULL Input Scan *
↓
Program Logic Execution
↓
NULL Output Scan *
↓
↓
↓
↓
↓
↓
↓
↓
↓
<END OF SWEEP>
FULL SWEEP
<START OF SWEEP>
Sweep Housekeeping
↓
Input Scan *
↓
EGD Consumption Scan***
↓
Program Logic Execution
↓
Output Scan *
↓
EGD Production Scans ***
↓
Poll for Missing I/O Modules **
↓
Programmer Communications Window
↓
System Communications Window
<END OF SWEEP>
* If I/O is suspended, then the input and output scans are skipped.
** Polling for missing I/O modules only occurs if a “Loss of ...” fault has been logged for a Series 90-70 I/O module.
*** If no Ethernet Global Data (EGD) exchanges are configured, then the consumption and production scans are skipped.
For the base sweep, the lack of configuration means that the input and output scan phases of the sweep are NULL (i.e., check for configuration and then end). The presence of a configuration with
GFK-0265J Appendix A CPU Performance Data A-11
A
no I/O modules or intelligent I/O modules (GBC, PSM, etc.) would have the same effect. The logic execution time is not zero in the base sweep. The time to execute the empty _MAIN program is included so that you only need to add the estimated execution times of the functions actually programmed. The base sweep also assumes no missing I/O modules. The lack of programmer attachment means that the Programmer Communications Window is never opened. The lack of intelligent option modules means that the System Communications Window is never opened.
The following table gives the base sweep times in milliseconds for each CPU model.
Table A-3. Base Sweep Times
CPU Model
CPX
935
CPX
928
924/
925
914/
915
CPX
782
781/782
788/789
Base Sweep Time .3731
.4001
.1525
.2074
1.0687
.7025
CPX
772
1.0687
731/732
771/772
2.00
Programmer Sweep Impact Times
The following table shows the programmer sweep impact times in milliseconds. The times are broken up into parallel and serial since these interfaces are significantly different. (Each item in the table is described in more detail at the end of the table.)
Table A-4. Programmer Sweep Impact Times*
Sweep Impact Item
CPX
935
CPX
928
914/
925
924/
925
CPX
782
781/782
788/789
CPX
772
731/731
771/772
Parallel Programmer
Programmer window
Reference table monitor
Editor monitor
Word-for-word change
ALT-S store
High priority request
Serial programmer
Programmer Window
Reference table monitor
Editor monitor
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
* Not all of the timing information needed for the above table was available at print time for this manual (the dashes).
0.75
4.90
4.90
28.10
14.80
9.90
0.50
5.60
6.40
Note
Functions in bold type in Table A-4 above impact the sweep continuously. All other functions impact the sweep only when invoked.
A-12 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
A
Each of the items included in the table is described below.
Sweep Impact
Item
Description
Programmer
Window
Parallel: The time to open the Programmer Window but not process any requests. The programmer is attached with a parallel connection; no reference values are being monitored.
Serial: Same as above except attached serially. Unlike the parallel programmer, the sweep impact cannot be limited to a single sweep. Serial communications, in addition to the service processing time that is performed inside the Programmer Communications
Window, has processing time associated with the receiving of data over the RS422/485 serial link. This serial communications processing time is asynchronous to the sweep in order to meet the timing requirements of the serial protocol.
Reference Table
Monitor
Editor Monitor The sweep impact to refresh the editor screen when monitoring ladder logic. The times given in the table are for a logic screen containing one contact, two coils, and eleven registers. As with the reference table sweep impact, the impact may not be continuous.
Word-for-Word
Change
The sweep impact to refresh the reference table screen. (The %R table was used as the example.) Mixed table display impacts are slightly larger. The sweep impact may not be continuous, depending on the sweep time of the PLC and the speed of the host of the programming software.
The sweep impact to change a constant input on a MOVE_UINT function from 1 to 2.
This is the smallest change that can be made. A change to a coil requires updates to the coil use and retentive maps contained in the PLC. If the %Q or %M reference address is changed on a function block, then the size of the change to the coil use and retentive maps can be quite large. A large word-for-word change will have very little sweep impact if done with the parallel programmer (worst-case of 35 ms on a 731 CPU). A large word-for-word change will have a big sweep impact if done with the serial programmer. The time is linear for the number of bytes in the request with the worst case being slightly larger than the worst case for parallel.
ALT-S Store
High Priority
Request
(Parallel only)
The sweep impact to store a 933 byte program block. The sweep impact is linear as the program block gets larger.
There are several programmer high priority requests: change PLC mode (includes ALT-
R), read constant sweep state/time, read window times, change constant sweep state/time, and change window times. Unlike the other programmer service requests, which are serviced inside the programmer communications window, high priority requests interrupt the sweep and are serviced asynchronously at the time they are issued by the programmer. The worst case high priority request is monitoring/changing the window times. This time is shown below.
GFK-0265J Appendix A CPU Performance Data A-13
A
A-14
I/O Scan and I/O Fault Sweep Impact
The I/O scan sweep impact has two parts, Series 90-70 I/O and Genius I/O. The equation for computing I/O scan sweep impact is:
I/O Scan Sweep Impact = I/O Scan Overhead +
Series 90*70 I/O Scan +
Genius I/O Scan
The following table shows the I/O scan overhead in milliseconds for each CPU:
Table A-5. I/O Scan Overhead *
CPU Model
CPX
935
CPX
928
924/
925
914/
915
CPX
782
781/782
788/789
CPX
772
731/732
771/772
I/O scan overhead
*
.0293
.0321
.1348
.1382
.0638
.1756
.0638
0.38
Times are in milliseconds. For information not available when this manual was being printed
(represented by a dash: –), refer to the IPI for each CPU.
Note
I/O scan overhead impacts the sweep continuously.
Sweep Impact of Series 90-70 I/O Modules
The I/O scan of the Series 90-70 I/O modules is impacted as much by location and reference address of a module as it is by the number of modules. The I/O scan has several basic parts.
I/O Scan Description
I/O Scan Overhead Includes the setup for input and output scan and the selection of the main rack.
Rack Setup Time Each expansion rack is selected separately because of the addressing of expansion racks on the VME bus. This results in a fixed overhead per expansion rack, regardless of the number of modules in that rack.
Per Module Setup
Time
Each Series 90-70 I/O module has a fixed setup scan time.
Byte Transfer Time The actual transfer of bytes is much faster for modules located in the main rack than for those in expansion racks. The byte transfer time differences will be accounted for by using different times for I/O modules in the main rack versus expansion racks.
In addition, analog input expander modules (the same as Genius blocks) have the ability to be grouped into a single transfer as long as consecutive reference addresses are used for modules that have consecutive slot addresses. Each sequence of consecutively addressed modules is called a scan segment. There is a time penalty for each additional scan segment.
The following form can be used for computing I/O module sweep impact. The calculation contains times for analog input expanders that are either grouped into the same scan segment as the preceding module or are grouped in a separate new scan segment. The sweep impact times can be found in table A-7.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
A
Table A-6. Worksheet A: I/O Module Sweep Time
Number of expansion racks
Sweep impact per expansion rack
Number of discrete I/O modules—main rack
Sweep impact per discrete I/O module—main rack
Number of discrete I/O modules—expansion rack
Seep impact per discrete I/O module—expansion rack
Number of analog input base and output modules—main rack
Sweep impact per analog input base and output module—main rack
Number of analog input exander modules (same segment)—main rack
Sweep impact per analog input expander module (same segment)—main rack
Number of analog input exander modules (new segment)—main rack
Sweep impact per analog input expander module (new segment)—main rack
Number of analog input base and output modules—expansion rack
Sweep impact per analog input base and output module—expansion rack
Number of analog input base and output modules (same segment)—exp. rack
Sweep impact per analog input base and output module (same seg.)—exp. rack
Number of analog input base and output modules (new segment)—exp. rack
Sweep impact per analog input base and output module (new seg.)—exp. rack
Predicted Series 90-70 I/O Module Sweep Impact
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
______
Note
If point faults are enabled, substitute the corresponding times for point faults enabled, as shown in the following table.
GFK-0265J Appendix A CPU Performance Data A-15
A
An approximate per point or per channel average is shown in the following tables. These averages are based on 1024 points (512 in and 512 out) for discrete and 128 channels (96 in and 32 out) for analog. The 96 analog input channels consist of two base modules and five expanders. Actual values will vary from the approximate average, depending on the system I/O configuration.
Note
Not all of the sweep time information was available at the time this manual was printed (the blank spaces in the table below). Refer to the IPI for the specific
CPU for this information.
Table A-7. Sweep Impact Time for Model 70 I/O Modules and Racks *
CPX
935
CPX
928
924/
925
914/
915
CPX
782
781/782
788/789
Rack Setup per expansion rack
Discrete I/O Modules
per I/O module in main rack per I/O module in main rack w/point faults enabled per I/O module in expansion rack per I/O module in expansion rack w/point faults enabled
.0010 .0010
.0010
.0010
.0010
.0010
.0074
.0086
.0209
.0084
.0119
.0135
.0125
.0144
.0184
.0136
.0226
.0398
.0105
.0144
.0156
.0110
.0183
.0220
.0154
.0273
.0090
.0283
.0102
.0149
CPX
772
.0010
.0144
.0220
.0154
.0273
.1314
.1781
.4256
.1570
.3980
.1189
.3980
per fault message **
Rough Average per Point (no point faults)
Rough Average per Point (w/ point faults)
-
-
-
-
-
-
-
-
-
-
-
-
-
-
731/732
771/772
.0500
.0800
.1200
.0900
.1300
1.700
3.1µs
4.4µs
A-16 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
A
*
**
Table A-7. Sweep Impact Time for Model 70 I/O Modules and Racks – Continued
CPX
935
CPX
928
Analog I/O Modules
per input/output module in main rack per input/output module w/point faults enabled in main rack per input or output module in expansion rack per input/output module w/point faults enabled in exp. Rack per input expander module in same segment in main rack per input expander module w/point faults enabled in same segment in main rack per input expander module in new segment in main rack per input expander module w/point faults enabled in new segment in main rack per input expander module in same segment in expansion rack per input expander module w/point faults enabled in same segment in expansion rack per input expander module in new segment in expansion rack per input expander module w/point faults enabled in new segment in expansion rack
.0203
.0230
.0259
.0313
.0451
.0166
.0249
.0189
.0272
.0537
.0796
.0557
.0851
.0281
.0359
.0499
.0183
.0271
.0199
.0308
.0534
.0822
.0566
.0861
924/
925
.0279
.0308
.0321
.0464
.0152
.0242
.0203
.0279
.0558
.0824
.0598
.0883
914/
915
CPX
782
.0160
.0501
.0223
.0579
.0318
.0472
.0523
.0688
.0169
.0187
.0259
.0279
.0227
.0267
.0324
.0395
.0567
.0277
.0836
.0558
.0653
.0356
.0934
.0675
781/782
788/789
.0149
.0207
.0480
.
.0761
0188
.0275
.0366
.0514
.0570
.0856
.0705
.1047
CPX
772
.0501
.0579
.0472
.0688
.0187
.0279
.0267
.0395
.0277
.0558
.0356
.0675
731/732
771/772
0.08
0.12
0.10
0.15
0.02
0.03
0.03
0.05
0.06
0.10
0.10
0.15
2.10
per fault message ** .1613
.2100
.2597
.3296
.5362
.9362
.5362
Rough Average per Channel (no point faults)
Rough Average per Channel (w/ point faults)
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Times are in milliseconds, except for those identified as microseconds.
Faults for discrete Series 90-70 I/O modules are always polled for by the PLC CPU. When one occurs, it is always logged during one of the I/O scan phases of the sweep. These faults are only polled when point faults are enabled.
10.8µs
14.0µs
Note
Functions in bold type in Table A-7 above impact the sweep continuously. All other functions impact the sweep only when invoked. Also, not all of the timing information needed for the above table was available at print time for this manual
(the blank spaces).
Sweep Impact of Genius I/O and GBCs
The sweep impact of Genius I/O and Genius Bus Controllers (GBC) is similar to that of Series 90-
70 I/O. There is an overhead for the I/O scan that should be counted only once between the Series
GFK-0265J Appendix A CPU Performance Data A-17
A
90-70 I/O scan and the Genius I/O scan. There is also a per Genius Bus Controller sweep impact, a per scan segment sweep impact, and a transfer time (per word) sweep impact for all I/O data.
The sweep impact per Genius Bus Controller has three parts:
1.
Sweep impact to open the System Communications Window. This is added only once when the first intelligent option module (of which the Genius Bus Controller is one) is placed in the system.
2.
Sweep impact to poll each Genius Bus Controller for background messages (datagrams). This part is an impact for every Genius Bus Controller in the system.
Note
Both the first and second parts of the Genius Bus Controller’s sweep impact may be eliminated by closing the System Communications Window (setting its time to
0). This should only be done to reduce scan time during critical phases of a process to ensure minimal scan time. Incoming messages will timeout, and
COMMREQs will stop working while the window is closed. Communications with PCM and LAN modules will also stop.
3.
Sweep impact to scan the Genius Bus Controller. This impact results from the PLC CPU notifying the Genius Bus Controller that its new output data has been transferred and commanding the Genius Bus Controller to ready its input data, as well as informing the Genius
Bus Controller that the PLC has finished another sweep and is still in RUN mode.
A scan segment for Genius I/O consists of Genius blocks on the same bus with consecutive reference addresses and consecutive bus addresses. The time to process a single scan segment is higher for an input scan segment than it is for an output scan segment. The scan segment processing is the same for analog, discrete, and global data scan segments. Discrete data is transferred a byte at a time and takes longer to complete the transfer than analog data, which is transferred a word at a time. Global data should be counted as either discrete or analog, based on the memory references used in the source or destination.
Note
Not all of the sweep time information was available at the time this manual was printed (the blank spaces in the table below). Refer to the IPI for the specific
CPU for this information.
A-18 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
A
Table A-8. Sweep Impact Time of Genius I/O and GBCs *
CPX
935
CPX
928
924/
925
914/
915
Genius Bus Controller
open system communications window per Genius Bus Controller polling for background messages per Genius Bus Controller I/O Scan
.0583
.0072
.5658
.0631
.0083
.5619
.0432
.0081
.4237
.0616
.0086
.6476
CPX
782
.1625
.0160
.5215
781/782
788/789
.1890
.0200
.8110
CPX
772
.1625
.0160
.5215
First Genius Bus Controller **
Subsequent Genius Bus Controllers
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Genius I/O Blocks
per I/O block scan segment per I/O block scan segment w/point faults enabled per byte discrete I/O data in the main rack per byte discrete I/O data in expansion racks per word analog I/O data in the main rack per word analog I/O data in expansion racks
.0070
.0259
.0451
.0468
.0634
.0102
.0266
.0460
.0471
.0643
.0270
.0540
.0015
.0020
.0011
.0300
.0600
.0017
.0025
.0011
.0314
.0584
.0475
.0442
.0604
.0444
.0725
.0031
.0045
.0042
.0314
.0584
.0475
.0442
.0604
.0654
.0651
.0040
.0057
.0623
.0131
.0623
Asynchronous Events
Fault Message -
* Times are in milliseconds, except for those identified as microseconds.
** The extra time for the first GBC is the same time as shown in the next table for the first intelligent option module.
This time should be counted only once.
-
731/732
771/772
.6000
.1000
.7000
2.4000
1.6000
.0300
.0900
.0032
.0045
.0029
.0077
2.00
Note
Functions in bold type in Table A-8 above impact the sweep continuously. All other functions impact the sweep only when invoked.
Note
Not all of the timing information needed for the above table was available at print time for this manual (the blank spaces).
GFK-0265J Appendix A CPU Performance Data A-19
A
Use the following form for predicting the sweep impact due to Genius I/O. The sweep impact times can be found in table A-8.
Table A-9. Worksheet B: Genius I/O Sweep Time
Open system communications window
GBC I/O scan
GBC poll for background messages
Number of GBCs
Input block scan segments—number of
Input block scan segments—sweep impact
Output block scan segments—number of
Output block scan segments—sweep impact
Bytes of discrete I/O data on GBCs—main rack
Sweep impact/bytes of discrete I/O data—main rack
Bytes of discrete I/O data on GBCs—expansion racks
Seep impact/bytes of discrete I/O data—expansion racks
Words of analog I/O data on GBCs—main rack
Sweep impact/word analog I/O data—main rack
Words of analog I/O data on GBCs—expansion racks
Sweep impact/word analog I/O data—exapansion racks
______ = ______
______
+ ______ x ______
= ______
= ______
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
Predicted Genius I/O Scan Impact ______
A-20 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
A
Sweep Impact of FIP I/O and FBCs
The sweep impact of FIP I/O and FIP Bus Controllers (FBC) is similar to that of Series 90-70 I/O.
There is an overhead for the I/O scan that should be counted only once between the Series 90-70
I/O scan and the FBC I/O scan. There is also a per FIP Bus Controller sweep impact, a per scan segment sweep impact; and a transfer time (per word) sweep impact for all I/O data.
The sweep impact per FIP Bus Controller has three parts:
1.
Sweep impact to open the System Communications Window. This is added only once when the first intelligent option module (of which the FIP Bus Controller is one) is placed in the system.
2.
Sweep impact to poll each FIP Bus Controller for background messages (datagrams). This part is an impact for every FIP Bus Controller in the system.
Note
Both the first and second parts of the FIP Bus Controller’s sweep impact may be eliminated by closing the System Communications Window (setting its time to
0). This should only be done to reduce scan time during critical phases of a process to ensure minimal scan time. Incoming messages will timeout, and
COMMREQs will stop working while the window is closed. Communications with PCM and LAN modules will also stop.
3.
Sweep impact to scan the FIP Bus Controller. This impact results from the PLC CPU notifying the FIP Bus Controller that its new output data has been transferred and commanding the FIP Bus Controller to ready its input data, as well as informing the FIP Bus Controller that the PLC has finished another sweep and is still in RUN mode.
A scan segment for FIP I/O consists of FIP Transfer Variables (TVAs) on the same bus with consecutive reference addresses containing up to 256 bytes. The scan segment processing is the same for analog and discrete scan segments.
GFK-0265J Appendix A CPU Performance Data A-21
A
Note
Some of the sweep time information was not available at the time this manual was printed (the blank spaces in the table below).
Table A-10. Sweep Impact Time of FIP I/O and FBCs *
CPX
935 **
CPX
928 **
924/
925**
914/
915**
CPX
782**
781/
782 **
CPX
772**
FIP Bus Controller
open system communications window per FIP Bus Controller polling for background messages per FIP Bus Controller I/O Scan
First FIP Bus Controller ***
Subsequent FIP Bus Controllers
FIP I/O Blocks
per I/O block scan segment per I/O block scan segment w/point faults enabled per byte discrete I/O data in the main rack per byte discrete I/O data in expansion racks per word analog I/O data in the main rack per word analog I/O data in expansion racks
Asynchronous Events
Fault Message
.0583
.0072
.0839
.0061
.0148
.0018
.0025
.0012
.0024
___
.0631
.0083
.1147
.0432
.0081
___
.0616
.0086
___
.1625
.0160
.0931
.0132
.0176
.0018
.0021
.0012
.0024
___
.0114
.0119
.0019
.0024
.0008
.0043
___
.0116
.0153
.0024
.0026
.0011
.0032
___
.0161
.0323
.0019
.0024
.0011
.0024
___
.1890
.0200
___
.1625
.0160
.0931
.0025
.0670
.0025
.0044
.0071
.0098
___
.0161
.0323
.0019
.0024
.0011
.0024
___
* Times are in milliseconds, except for those identified as microseconds.
** These are typical scan impacts. It is possible to incur up to an additional 2.1 milliseconds per scan segment, but this is not typical. This additional scan impact can usually be avoided when using synchronous scan sets that include only 1 FBC.
*** The extra time for the first FBC is the same time as shown in the next table for the first intelligent option module.
This time should be counted only once.
Note
Functions in bold type in Table A-8 above impact the sweep continuously. All other functions impact the sweep only when invoked.
Also please note that the blank lines represent information not available at this time.
A-22 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
A
Use the following form for predicting the sweep impact due to FIP I/O. The sweep impact times can be found in table A-10.
Table A-11. Worksheet B: FIP I/O Sweep Time
Open system communications window
FBC I/O scan
FBC poll for background messages
Number of FBCs
Input block scan segments—number of
Input block scan segments—sweep impact
Output block scan segments—number of
Output block scan segments—sweep impact
Bytes of discrete I/O data on FBCs—main rack
Sweep impact/bytes of discrete I/O data—main rack
Bytes of discrete I/O data on FBCs—expansion racks
Seep impact/bytes of discrete I/O data—expansion racks
Words of analog I/O data on FBCs—main rack
Sweep impact/word analog I/O data—main rack
Words of analog I/O data on FBCs—expansion racks
Sweep impact/word analog I/O data—exapansion racks
______ = ______
______
+ ______ x ______
= ______
= ______
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
Predicted FIP I/O Scan Impact ______
GFK-0265J Appendix A CPU Performance Data A-23
A
Ethernet Global Data Sweep Impact
Depending on the relationship between the CPU sweep time and an Ethernet Global Data (EGD) exchange’s period, the exchange data may be transferred every sweep or periodically after some number of sweeps. Therefore, the sweep impact will vary based on the number of exchanges that are scheduled to be transferred during the sweep. However, at some point during the operation of the PLC, all of the exchanges will be scheduled to transfer data during the same sweep. Therefore, all of the exchanges must be taken into account when computing the worst case sweep impact.
The Ethernet Global Data (EGD) sweep impact has two parts, Consumption Scan and Production
Scan:
EGD Sweep Impact = Consumption Scan + Production Scan
Each Ethernet Global Data exchange configured for either consumption or production can add up to 1 millisecond to the sweep time. This sweep impact should be taken into account when configuring the PLC constant sweep mode and setting the CPU watchdog timeout.
Where the Consumption and Production Scans consist of two parts, exchange overhead and byte transfer time:
Scan Time = Exchange Overhead + Byte Transfer Time
Exchange Overhead
Exchange overhead includes the setup time for each exchange that will be transferred during the sweep. When computing the sweep impact, include overhead time for each exchange.
Exchange Overhead*
Exchange Type
Consumed
Produced
924/925
61
88
* Times are in microseconds.
CPU Models
914/915
106
133
Byte Transfer Time
This is the time required to transfer the data between the PLC CPU module and the Ethernet module. The times shown in the following table represent the time to transfer one data byte.
Byte Transfer Time*
Exchange Type
Consumed
Produced
* Times are in microseconds
924/925
2.4
1.8
CPU Models
914/915
2.4
1.8
A-24 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Table A-12. Worksheet: Ethernet Global Data Sweep Time
Number of consumed exchanges
Sweep impact per exchange x
__________________
__________________ = __________________
Number of data bytes in all of the consumed exchanges
Sweep impact per consumed data byte
__________________ x __________________ = __________________
Number of produced exchanges
Sweep impact per exchange
Number of data bytes in all of the produced exchanges
Sweep impact per produced data byte
__________________ x __________________ = __________________
__________________ x __________________ = __________________
Predicted Ethernet
GlobalData Sweep
Impact
__________________
Note
If the PLC is configured for Microcycle Sweep Mode, the EGD sweep impact time is allocated to the Logic Window. Therefore, the time available to execution of the user program is reduced by the time required by Ethernet Global
Data exchanges.
A
GFK-0265J Appendix A CPU Performance Data A-25
A
Sweep Impact of Intelligent Option Modules
Intelligent option modules include Programmable Coprocessor Modules (PCM), Alphanumeric
Display Coprocessor (ADC) Modules, Graphics Display Coprocessor (GDC) Modules, MAP LAN
Modules, Ethernet LAN Modules, and Genius Bus Controllers being used for Genius LAN capabilities. The sweep impact for these intelligent option modules is highly variable. The opening of the System Communications Window and the polling of each module have relatively small impacts compared to the sweep impact of CPU memory read or write requests.
The following equations show how to calculate the fixed sweep of each module.
PCM
ADC
GDC
= Polling Sweep Impact + Clock Refresh Impact once every 1/2 sec.
= Polling Sweep Impact + Clock Refresh Impact once every 1/2 sec.
= Polling Sweep Impact + Clock Refresh Impact once every 1/2 sec.
MAP LAN = Polling Sweep Impact + LAN I/O Scan Impact
EthernetLAN = Polling Sweep Impact + LAN I/O Scan Impact
GBC
FBC
= Polling Sweep Impact + GBC I/O Scan Impact
= Polling Sweep Impact + FBC I/O Scan Impact
The table below shows the fixed sweep impact times in milliseconds for intelligent option modules.
It also contains sweep impact times for reading and writing the PLC’s system memories (includes all memories except %P and %L, which are slightly slower). The read and write service requests have two boundary conditions that change the times and are, therefore, broken up into three sets of times to reflect these boundary conditions.
Table A-13. Fixed Sweep Impact Times for Intelligent Option Modules *
Sweep Impact Item
CPX
935
CPX
928
924/
925
914/
915
CPX
782
781/782
788/789
CPX
772
731/732
771/772
Intelligent Option Modules
First module (open comm window)
Per module (polling)
LAN module I/O Scan
PCM, ADC, GDC clock refresh
-
-
-
.0751
.1630
-
-
-
.0833
.1434
-
-
-
.0471
.1386
-
-
-
.0586
.1455
-
-
-
.1960
.3651
-
-
-
.0665
.3248
-
-
-
.1960
.3651
-
0.60
0.10
0.15
0.60
PLC Memory Access from
IOMs
Read/write 1 to 3 words. *
Read/write 4 to 128 words.
Read/write each additional
128 words.
*
**
.4940
.6320
.2274
.5586
.6964
.2495
.3990
.4830
.6530
.4450
.5790
.8030
1.252
1.420
.4140
1.206
1.393
1.835
1.252
1.420
.4140
3.00
3.10
1.00
Times are in milliseconds. Not all of the timing information needed for the above table was available at print time for this manual (the blank spaces). Refer to the IPI for each CPU for this information.
Reads can only fit 3 words into the basic message.
Writes can fit 4 words before a 256 byte text buffer is needed.
A-26 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
A
Note
Functions in bold type in the previous table impact the sweep continuously. All other functions impact the sweep only when invoked.
I/O Interrupt Performance and Sweep Impact
There are several important performance numbers for I/O interrupt blocks or I/O-Triggered programs. The sweep impact of an I/O interrupt invoking an empty program or block measures the overall time of fielding the interrupt, starting up the program or block, exiting the program or block, and restarting the interrupted task. The maximum I/O interrupt rate reflects the limit of I/O interrupts invoking a minimal program or block at a sustained rate over time. The time to execute the logic contained in the interrupt program or block will affect the limit by causing the PLC to spend more time servicing I/O interrupts and thus reduce the maximum I/O interrupt rate.
The minimum, typical, and maximum interrupt response times reflect the time from when a single
I/O module sees the input pulse until the first line of ladder logic or C code is executed in the I/O interrupt program or block. Minimum response time reflects a 300 microsecond input card filter time + time from interrupt occurrence to first line of ladder logic in I/O interrupt program or block.
The minimum response time can only be achieved when no intelligent option modules are present in the system and the programmer is not attached. Typical response time is the minimum response time plus a maximum interrupt latency of 2.0 milliseconds for the model 731 CPU. This interrupt latency time is valid, except when one of the following operations occurs:
•
The programmer is attached.
•
A store of logic, RUN mode store, or word-for-word change occurs.
•
A fault condition (logging of a fault) occurs.
•
Another I/O interrupt occurs.
•
The CPU is transferring a large amount of input (or output) data from an I/O controller (such as a Genius Bus Controller or a FIP Bus Controller). Heavily loaded I/O controllers should be placed in the main rack whenever possible.
Any one of these events extends the interrupt latency (the time from when the interrupt card signals the interrupt to the CPU to when the CPU services the interrupt) beyond the typical value.
However, the latency of an interrupt occurring during the processing of a preceding I/O interrupt is unbounded. I/O interrupts are processed sequentially so that the interrupt latency of a single I/O interrupt is affected by the duration of the execution time of all preceding interrupt blocks. (Worst case is that every I/O interrupt in the system occurs at the same time so that one of them has to wait for all others to complete before it starts.)
GFK-0265J Appendix A CPU Performance Data A-27
A
The maximum response time shown below does not include the two unbound events.
Table A-14. I/O Interrupt Block Performance and Sweep Impact Times *
Sweep Impact Item
I/O interrupt sweep impact
I/O interrupt response time
Input card filter time
+ typical interrupt latency
+ interrupt to logic time
Minimum response time
Typical response time
Maximum response time
CPX
935
-
.3851
.3873
-
-
-
.5424
CPX
928
-
-
-
-
.3851
.3873
.5424
924/
925
-
-
-
-
.313
.316
.627
914/
915
-
-
-
-
CPX
782
-
-
-
-
.5402
.5421
1.0528
781/782
788/789
-
-
-
-
.675
.679
1.633
CPX
772
-
-
-
-
.5402
.5421
1.0528
731/732
771/772
0.95
0.30
1.40
0.48
0.78
2.18
3.60
A-28
I/O interrupt rate limit
I/O interrupt rate limit w/no IOMs
450 ints/sec
750 ints/sec
* Times are in milliseconds. Not all of the timing information needed for the above table was available at print time for this manual (the blank spaces).
Table A-15. I/O-Triggered Interrupt Performance and Sweep Impact Times *
Sweep Impact Item
CPX
935
CPX
928
924/
925
914/
915
CPX
782
781/782
788/789
CPX
772
I/O interrupt sweep impact
I/O interrupt response time
Input card filter time
+ typical interrupt latency
+ interrupt to logic time
Minimum response time
Typical response time
Maximum response time
.3046
.3072
.4618
.3259
.3273
.4822
.4796
.4797
.9921
I/O interrupt rate limit
I/O interrupt rate limit w/no IOMs
* Times are in milliseconds. Not all of the timing information needed for the above table was available at print time for this manual (the blank spaces).
.4796
.4797
.9921
The following form is a worksheet for the sweep impact times of programmer sweep impact, intelligent option modules, and I/O Interrupts. (Refer to tables A-4, A-10, and A-11.)
Note
Not all of the timing information needed for the above table was available at printing time for this manual (the blank spaces). Refer to the IPI for each CPU for this information.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
A
Table A-16. Worksheet C: Programmer, IOM, I/O Interrupt Sweep Time
Programmer sweep impact
IOM—first module (open comm window)
IOM—per module (polling)
LAN module I/O scan
PLC memory access from IOMs
I/O interrupt sweep impact
I/O interrupt response time
Total IOM Sweep Impact
Predicted Sweep Time (Other)
______
+ ______
+ ______
= ______
______
+ ______
= ______
= ______
= ______
______
GFK-0265J Appendix A CPU Performance Data A-29
A
Timed Interrupt Performance
The sweep impact of a timed interrupt invoking an empty program block or timed program measures the overall time of fielding the interrupt, starting up the program or block, exiting the program or block, and restarting the interrupted task. The minimum, typical, and maximum interrupt response times reflect the time from when a single timed interrupt occurs until the first line of ladder logic or C code is executed in the timed interrupt program or block. The minimum response time can only be achieved when no intelligent option modules are present in the system and the programmer is not attached. Typical response time is the minimum response time plus the
CPU’s maximum latency time. This interrupt latency time is valid, except when one of the following operations occurs:
•
The programmer is attached
•
A store of logic, ALT-S store, RUN mode store, or word-for-word change occurs
•
A fault condition (logging of a fault) occurs
•
Another timed interrupt or I/O interrupt occurs
Any one of these events extends the interrupt period beyond the typical value. However, the latency of an interrupt occurring during the processing of a preceding timed or I/O interrupt is unbounded. For interrupts, the worst case is that every timed and I/O interrupt in the system occurs at the same time so that one of them has to wait for all others to complete before it starts.
The maximum response time shown below does not include the two unbound events.
Table A-17. Timed Interrupt Performance and Sweep Impact Times *
Sweep Impact Item
CPX
935
CPX
928
924/
925
914/
915
CPX
782
781/782
788/789
CPX
772
731/732
771/772
Timed interrupt sweep impact
Timed interrupt response time
Typical interrupt latency
+ interrupt to logic time
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1.15
1.40
0.68
Minimum response time
Typical response time
Maximum response time
-
-
-
-
-
-
.108
.143
.163
.147
.185
.219
-
-
.227
.346
.464
-
-
-
0.68
2.08
3.50
* Times are in milliseconds. Not all of the timing information needed for the above table was available at print time for this manual (the blank spaces).
A-30 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
A
Table A-18. I/O-Triggered Interrupt Performance and Sweep Impact Times
Sweep Impact Item
CPX
935
CPX
928
924/
925
914/
915
CPX
782
781/782
788/789
Timed interrupt sweep impact
-
Timed interrupt response time
Typical interrupt latency
+ interrupt to logic time
Minimum response time
Typical response time
Maximum response time
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
* Times are in milliseconds. Not all of the timing information needed for the above table was available at print time for this manual (the blank spaces).
CPX
772
-
-
-
-
-
Examples of Calculating Predicted Sweep Times
The following two examples are provided to show how to calculate predicted sweep times. The first example is a small system and the second is a large system. Neither of these sweep time estimates include a time for logic execution. In both of these systems, the calculated sweep is for normal sweep time with point faults disabled, the PCM idle, and the programmer not attached. The times used in the calculation are extracted from tables A-3, A-5, A-7, A-8, and A-10. Sample forms for calculating predicted sweep times are provided after the examples.
Small System
PS
0
CPU
731
1
BTM 32PT
Input
2 3
32PT
Input
4
32PT
Output
32PT
Output
8CHN
Analog
Input
4CHN
Analog
Output
5
MAIN RACK
6 7 8
PCM
9
GFK-0265J Appendix A CPU Performance Data A-31
A
Sweep Calculations
Predicted Sweep =
Base Sweep
+
I/O Scan
I t
Base Sweep Time
I/O Scan Impact = I/O Scan Overhead + Series 90-70 I/O Scan Impact
Number of discrete I/O modules—main rack
Sweep impact time per discrete I/O module
Number of analog base and output modules—main rack
Sweep impact time per analog base and output module
I/O Scan Impact = 0.32 + 16
I/O scan overhead
PCM Impact
First module (open comm window)
Per module (polling)
+
PCM Impact
= 2.00
4 x 0.08
2 x 0.08
.48
.38
= 0.32
= 0.16
= 0.48
= 0.38
.60
+ .10
= 0.70
Predicted Sweep Time = 4.04
Note
Times are in milliseconds.
A-32 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Large System
PS
0
PS
0
PS
0
CPU
781
1
BTM
2
GBC
20Blks
3
GBC
20Blks
GBC
16Blks
4 5
MAIN RACK
GBC
16Blks
6
PCM
7
PCM
8
ENET
LAN
9
BRM
1
32PT
Input
2
32PT
Input
3
32PT
Output
4
32PT
Output
8CHN
Analog
Input
16CHN
Analog
Expndr
4CHN
Analog
Output
4CHN
Analog
Output
RACK1
5 6 7 8 9
BRM
1
32PT
Input
2
32PT
Input
3
32PT
Output
4
32PT
Output
8CHN
Analog
Input
16CHN
Analog
Expndr
4CHN
Analog
Output
4CHN
Analog
Output
RACK2
5 6 7 8 9
Note
The Genius block configuration used for this example is ala 16-point grouped
(QI) blocks with all bus addresses having contiguous reference addresses.
A
GFK-0265J Appendix A CPU Performance Data A-33
A
Predicted Sweep Calculations
Predicted Sweep = Base Sweep + IOM Impact
Base Sweep Time
I/O Scan overhead
90-70 I/O scan impact (see table ____, Worksheet A)
Genius I/O scan impact (see table _____, Worksheet B)
I/O scan overhead
PCM impact
Number of PCMs
LAN impact
IOM impact
Predicted Sweep Time
0.10
0.20
+ 0.80
+ 5.88
= 0.10
= 6.88
x .30
2
0.60
+ .08
= .68
= 8.66
Note
Times are in milliseconds.
A-34 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
A
Table A-19. Worksheet A
Number of expansion racks
Sweep impact per expansion rack
Number of discrete I/O modules—main rack
Sweep impact per discrete I/O module—main rack
Number of discrete I/O modules—expansion rack
Seep impact per discrete I/O module—expansion rack
Number of analog input base and output modules—main rack
Sweep impact per analog input base and output module—main rack
Number of analog input exander modules (same segment)—main rack
Sweep impact per analog input expander module (same segment)—main rack
Number of analog input exander modules (new segment)—main rack
Sweep impact per analog input expander module (new segment)—main rack
Number of analog input base and output modules—expansion rack
Sweep impact per analog input base and output module—expansion rack
Number of analog input base and output modules (same segment)—exp. rack
Sweep impact per analog input base and output module (same seg.)—exp. rack
Number of analog input base and output modules (new segment)—exp. rack
Sweep impact per analog input base and output module (new seg.)—exp. rack
Predicted Series 90-70 I/O Module Sweep Impact
2 x .03
= .06
______ x ______ = ______
8 x .05
= .40
6 x .04
= .24
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
2 x .05
= .10
______ x ______ = ______
.80
GFK-0265J Appendix A CPU Performance Data A-35
A
Table A-20. Worksheet B
Open system communications window
GBC I/O scan
GBC poll for background messages
Number of GBCs
Input block scan segments—number of
Input block scan segments—sweep impact
Output block scan segments—number of
Output block scan segments—sweep impact
Bytes of discrete I/O data on GBCs—main rack
Sweep impact/bytes of discrete I/O data—main rack
Bytes of discrete I/O data on GBCs—expansion racks
Seep impact/bytes of discrete I/O data—expansion racks
Words of analog I/O data on GBCs—main rack
Sweep impact/word analog I/O data—main rack
Words of analog I/O data on GBCs—expansion racks
Sweep impact/word analog I/O data—exapansion racks
Predicted Genius I/O Scan Impact
0.30
= 0.30
0.94
x 0.04
x 4
= 0.98
= 3.92
4 x 0.02
= 0.08
4 x 0.02
= 0.08
288 x .0018
= .5184
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
5.88
A-36 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
A
Table A-21. Sample Worksheet A
Number of expansion racks
Sweep impact per expansion rack
Number of discrete I/O modules—main rack
Sweep impact per discrete I/O module—main rack
Number of discrete I/O modules—expansion rack
Seep impact per discrete I/O module—expansion rack
Number of analog input base and output modules—main rack
Sweep impact per analog input base and output module—main rack
Number of analog input exander modules (same segment)—main rack
Sweep impact per analog input expander module (same segment)—main rack
Number of analog input exander modules (new segment)—main rack
Sweep impact per analog input expander module (new segment)—main rack
Number of analog input base and output modules—expansion rack
Sweep impact per analog input base and output module—expansion rack
Number of analog input base and output modules (same segment)—exp. rack
Sweep impact per analog input base and output module (same seg.)—exp. rack
Number of analog input base and output modules (new segment)—exp. rack
Sweep impact per analog input base and output module (new seg.)—exp. rack
Predicted Series 90-70 I/O Module Sweep Impact
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
______ x ______ = ______
______
Table A-22. Sample Worksheet B
Programmer sweep impact
IOM—first module (open comm window)
IOM—per module (polling)
LAN module I/O scan
PLC memory access from IOMs
I/O interrupt sweep impact
I/O interrupt response time
______
+ ______
+ ______
= ______
Total IOM Sweep Impact
Predicted Sweep Time (Other)
= ______
= ______
______
+ ______ = ______
______
GFK-0265J Appendix A CPU Performance Data A-37
A
Relative CPU Performance Comparison
This section contains a relative CPU performance comparison based on lab test results on the
Series 90-70 CPUs.
Test Program
The test program used for the performance tests consisted of a 190 Kilobyte folder run on a
CPX935 CPU. Sweep time was approximately 115 ms. In this test program, the Main block calls the same subroutine (S1) 4 times. The S1 subroutine, in turn, calls 60 other subroutines (S2 – S61) which each contain the same logic. The logic consists of :
•
140 contacts
•
50-70 coils
•
5 ADDs
•
2 DNCTRs
•
5 UPCTRs
•
10 EQ_INT
•
3 FIFO RDs
•
12 MOVEs
•
1 MUL_INT
•
1 NE_INT
•
8 ONDTRS
•
1 CALL
•
2 Bit Shifts
•
4 SUB_INTs
•
4 TMRs
•
1 DIVIDE
•
1 PI-ISA
Interpreting the Chart
The CPX935 performance time for running the test program was assigned a value of 100%, and the other CPUs were compared to that standard. The chart shows that the CPX935 had the fastest time.
The CPU782 took the longest, 446% longer than the CPX935.
Note
The figures in the following chart were measured for the test program described above. They will not be exactly the same for different programs, but should provide a basic guide to relative CPU performance.
A-38 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Relative Time Required to Run the Test Program
500%
450%
T i m e
R u n
400%
350%
300%
250%
200%
150%
100%
50%
0%
100%
CPX935
121%
163%
271%
446%
CPM925 CPM915
Series 90-70 CPUs
CPX782 with cache disabled
CPU782
Figure A-1. Chart of Relative CPU Performance
A
GFK-0265J Appendix A CPU Performance Data A-39
Appendix
B
Interpreting Faults Using Logicmaster 90-70
Software
The Series 90-70 PLC maintains two fault tables, the I/O fault table for faults generated by I/O devices (including I/O controllers) and the PLC fault table for internal PLC faults. The information in this appendix will enable you to interpret the message structure format when reading these fault tables.
Both tables contain similar information.
•
The PLC fault table contains:
Fault location.
Fault description.
Date and time of fault.
•
The I/O fault table contains:
Fault location.
Circuit number.
Reference address.
Fault category.
Fault type.
Date and time of fault.
The Series 90-70 PLC maintains additional information on each fault that is helpful when troubleshooting your system. This information is called CTRL-F data, or Fault Detail. You can access this information by highlighting the fault and pressing the CTRL and F keys together.
GFK-0265J B-1
B
PLC Fault Table
The following diagram identifies each field in the fault entry:
00 000080 00030100 0B02 0400 FF16010400000000
Fault Extra Data
Error Code
Fault Action
Fault Group
Task
Slot
Rack
Spare
Long/Short
The following paragraphs describe each field in the fault entry. Included are tables describing the range of values each field may have.
Long/Short Indicator
This byte indicates whether the fault contains 8 bytes or 24 bytes of fault extra data.
Type
Short
Long
Code
00
01
Fault Extra Data
8 bytes
24 bytes
Spare
These 3 bytes are pad bytes, used to make the PLC fault table entry exactly the same length as the
I/O fault table entry.
Rack
The rack number ranges from 0 to 7. Zero is the main rack, containing the PLC. Racks 1 through
7 are expansion racks, connected to the PLC through a Bus Transmitter Module in the main rack and Bus Receiver Modules in the expansion racks.
Slot
The slot number ranges from 0 to 9. The PLC CPU always occupies slot 1 in the main rack (rack
0).
B-2 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
B
Task
The task number ranges from 0 to +65,535. Sometimes the task number provides additional information to PLC engineers; typically, however, the task number can be ignored.
PLC Fault Group
Fault group is the highest classification of a fault. It identifies the general category of the fault.
The fault description text displayed by your programming software is based on the fault group and the error codes.
Table B-1 lists the possible fault groups in the PLC fault table. Group numbers less than 80 (Hex) are maskable faults, while group numbers greater than or equal to 80 (Hex) are non-maskable faults.
The last non-maskable fault group, Additional PLC Fault Codes, is declared for the handling of new fault conditions in the system without the PLC having to specifically know the alarm codes.
All unrecognized PLC-type alarm codes belong to this group.
GFK-0265J Appendix B Interpreting Faults Using Logicmaster 90-70 Software B-3
B
Table B-1. PLC Fault Groups
Group Number
Decimal Hexadecimal
128
129
130
131
20
21
22
–
12
13
14
16
17
18
19
1
4
5
8
11
132
134
135
136
137
80
81
82
83
14
15
16
–
C
D
E
10
11
12
13
1
4
5
8
B
84
86
87
88
89
Group Name
Loss of, or missing, rack
Loss of, or missing, option module
Addition of, or extra, rack
Addition of, or extra, option module
System configuration mismatch
System bus error
PLC CPU hardware failure *
Non-fatal module hardware failure
Option module software failure
Program block checksum failure
Low battery signal
Constant sweep time exceeded
PLC system fault table full
I/O fault table full
User Application fault
Additional PLC fault codes
System bus failure
No user’s program on power-up
Corrupted user RAM detected
Window completion failure in Constant Sweep mode
(that is, all windows failed to receive their allotted time)
Password access failure
Null system configuration for RUN mode
PLC CPU software failure
More than the allowable number of I/O bus controllers were found in the system
PLC sequence-store failure
Fault Action
Fatal
Diagnostic
Diagnostic
Diagnostic
Fatal
Diagnostic
Fatal
Diagnostic
Diagnostic
Fatal
Diagnostic
Diagnostic
Diagnostic
Diagnostic
Diagnostic
As specified
Fatal
Informational
Fatal
Informational
Informational
Informational
Fatal
Fatal
Fatal
* The PLC OK LED will flash on and off to indicate that the failure was not serious enough to prevent programmer communications from retrieving the fault table information.
B-4 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
PLC Fault Action
Each fault may have one of three actions associated with it.
Table B-2. PLC Fault Actions
Fault Action
Informational
Diagnostic
Fatal
Action Taken by CPU
Log fault in fault table.
Log fault in fault table.
Set fault references.
Log fault in fault table.
Set fault references.
Go to Stop mode.
Code
1
2
3
B
GFK-0265J Appendix B Interpreting Faults Using Logicmaster 90-70 Software B-5
B
Error Code
The error code further describes the fault. Each fault group has its own set of error codes.
The first table below shows error codes for the PLC Software Error Group (Group 87H).
Table B-3. Alarm Error Codes for PLC CPU Software Faults
Decimal Hexadecimal
20
39
82
90
123
149
14
27
52
5A
7B
95
Name
Corrupted PLC Program Memory.
Corrupted PLC Program Memory.
Backplane Communications Failed.
PLC Stopped by Service Request # 13.
Remote I/O Scanner Communications Failure.
Store from Flash on Power-Up Failed. Note: The first byte of the Fault Extra Data describes why the store from flash failed:
Fault Extra
Data Value Description Error
DEVICE_NOT_
AVAILABLE CF
BAD_DEVICE_
DATA
DEVICE_RW_
ERROR
FLASH_
INCOMPAT_
ERROR
ITEM_NOT_
FOUND_ERROR
CC
CB
8E
8D
Specific device is not available in the system.
Data stored on device has been corrupted and is no longer reliable. Or, Flash Memory has not been initialized.
Error occurred during a read/write of the
Flash Memory device.
Data in Flash Memory is incompatible with the PLC CPU firmware release due to the
CPU firmware revision numbers, the instruction groups supported, or the CPU model number.
One or more specified items were not found in Flash Memory.
All All PLC CPU Internal System Error
B-6 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
GFK-0265J
The next table shows the error codes for all the other fault groups.
Table B-4. Alarm Error Codes for PLC CPU Faults
Decimal Hexadecimal
Name
45
59
60
65
75
76
81
3
22
25
44
255
3
16
19
2C
2D
3B
3C
41
4B
4C
51
FF
PLC Error Codes for Loss of Option Module Group
Bus Transmitter Module Found in Expansion Rack
Analog Expander Located to Left of Base Converter Module
Lost Analog Expander Module
Option Module Soft Reset Failed
Option Module Soft Reset Failed
Loss of, or missing communications driver
Module in firmware update mode
Module is in Standalone mode; mail system not initialized
CFG ESCM Not Compatible—Upgrade Ports 1 and 2 to work with CPU
CFG 486 Not Compatible—Upgrade firmware to work with Ports 1 and 2
ESCM Reset Req—Port 1 or 2 requested a reset. Cycle power when Port 1 or 2 completes the update.
Option Module Communication Failed
Error Codes for Addition of, or Extra Rack Group
1 1 Addition of, or Extra Rack
2
3
2
All others
3
Error Codes for Reset of, Addition of, or Extra Option Module Group
Module Restart Complete
LAN Interface Restart Complete; Running a Utility
Reset of, Addition of, or Extra Option Module
1
416
450
1
1A0
1C2
Error Codes for Module Hardware Error Group
Non-fatal LAN Hardware error
Required 12V PS failed or missing
LAN Controller Underrun/Overrun; Resuming
451
452
453
454
13
401
402
403
404
405
5
10
11
12
1
2
3
4
1C3
1C4
1C5
1C6
1
2
3
4
5
A
B
C
D
191
192
193
194
195
LAN Interface Failure; Switched Off Network
LAN Network Problem; Performance Degraded
LAN Severe Network Problem; Attempting Recovery
LAN Transceiver Fault; Off Network Until Fixed
Error Codes for Option Module Software Failure Group
Unsupported Board Type
COMREQ _ mailbox full on outgoing message that starts the COMREQ
COMREQ _ mailbox full on response
More Than One BTM in Rack
Backplane Communications with PLC; Lost Request
Error with LAN interaction
Resource (alloc, tbl ovrflw, etc.) error
VME backplane error
User program error
Module Software Corrupted; Requesting Reload
LAN System Software Fault; Resuming
LAN System Software Fault; Aborted Assoc and Resuming
LAN System Software Fault; Restarted LAN I/F
LAN System Software Fault; Reinitializing LLC
B
Appendix B Interpreting Faults Using Logicmaster 90-70 Software B-7
B
29
30
31
32
16
17
19
23
36
37
39
9
10
11
14
15
2
4
7
8
1D
1E
1F
20
10
11
13
17
24
25
27
9
A
B
E
F
2
4
7
8
Table B-4. Alarm Error Codes for PLC CPU Faults - Continued
Decimal Hexadecimal
Name
4
All others
4
0
1
2
3
0
1
2
3
0
1
2
3
0
1
2
3
Error Codes for System Configuration Mismatch Group
Genius Block Model Number Mismatch
Genius Block I/O Type Mismatch
Daughter Board Mismatch
Analog Expansion Mismatch
Genius Block Broadcast Control Data (BCD) Length Mismatch
Unsupported Feature
Revision A BTM not in Right Slot
LAN Duplicate MAC Address
LAN Duplicate MAC Address Resolved
LAN MAC Address Mismatch
LAN Soft Switch/Modem Mismatch
Genius Block Direct Control Data (DCD) Length Mismatch
Program exceeds memory limits
Incompatible scheduling mode
Reference length mismatch
Invalid configuration parameters
New configuration requires reset
I/O specification mismatch
Controller reference out of range
Bad interrupt trigger
Error Codes for System Bus Error Group
Unrecognized VME Interrupt Error
System Bus Error
Error Codes for Program Block Checksum Group
Corruption of program block header in the Series 90-70 PLC
Corruption of stored OMF records stored in Series 90-70 PLC
Corruption of stored OMF records stored in Series 90-70 PLC
Program or program block checksum failure
Error Codes for Low Battery Signal
Failed battery on PLC CPU or other module
Low battery on PLC CPU or other module
Failed battery from VME backplane
Low battery from VME backplane
B-8 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Table B-4. Alarm Error Codes for PLC CPU Faults - Continued
Decimal Hexadecimal
Name
5
6
7
8
9
1
2
3
4
10
11
12
13
14
15
17
28
29
5
6
7
8
9
1
2
3
4
A
B
C
D
E
F
11
1C
1D
Error Codes for User Application Fault Group
Indirect Reference Address Out of Range
PLC Watchdog Timer Timed Out
GBC COMREQ
GBC Bkgnd msg – Bad Genius Bus Request
COMREQ – WAIT mode not available for this command
COMREQ – Bad Task ID
Application Stack Overflow
LAN Data Memory Exhausted – Check Parms; Resuming
Bad Remote Application Request; Discarded Request
Bad Local Application Request; Discarded Request
LAN I/F Capacity Exceeded; Discarded Request
LAN PROM/Software Mismatch; Running Soft Sw Util
LAN I/F Can’t Init – Check Parms; Running Soft Sw Util
Run-time error detected in an external block
SORT function in an interrupt did not execute
Standalone Run-Time Error
Program Exceeded Wind Down
Program Not Readied
1 1
Error Codes for System Bus Failure Group
Operating system
2169
2172
2048 to
4095
1
2
5
6
1
2
5
6
Error Codes for Corrupted User RAM on Powerup Group
Corrupted User RAM on Power-up
Illegal Boolean Opcode Detected
Partial Store failure on second pass of parsing OMF
Corrupted Remote I/O Scanner EEPROM; Config Lost
879
Error Codes for PLC CPU Hardware Faults
Remote I/O Scanner Comm Failure; Verify Bus
87C Remote I/O Scanner Serial Bus Address Conflict
Remote I/O Scanner Hardware Fault 800 to
FFF
All other codes PLC CPU Hardware Failure
B
GFK-0265J Appendix B Interpreting Faults Using Logicmaster 90-70 Software B-9
B
B-10
PLC Fault Extra Data
The Fault Extra Data field in the PLC fault table contains details of the fault entry. Some examples of what data may be present are:
System Configuration Mismatch
The following error codes in the System Configuration Mismatch group supply fault extra data:
Table B-5. PLC Fault Extra Data – System Configuration Mismatch
Fault Extra Data
Byte Number
[0]
[1]
[2]
[3]
Fault Extra Data
Byte Number
Model Number Mismatch (2 Decimal)
FF
Bus address
Installed module’s model number
Configured model number
[0]
[1]
[2]
[3]
Fault Extra Data
Byte Number
I/O Type Mismatch
(4 Decimal)
FF
Bus address
Installed module’s I/O type
Configured module’s I/O type
[0]
[1]
[2]
[3]
Fault Extra Data
Byte Number
[0]
[1]
[2]
BCD Length Mismatch
(9 Decimal)
FF
Bus address
Module’s broadcast data length
Configured module’s broadcast data length
Unsupported Feature
(10 Decimal)
0A – Unsupported ESCM Configuration
01 – Unsupported baud rate
02 – Unsupported protocol
00 - Port 1 (RS-232 port)
01 - Port 2 (RS-485 port)
Fault Extra Data
Byte Number
[0}
[1]
[2]
[3]
[4]
[5]
Unsupported Feature (10 Decimal)
45 - ASCII ‘E’ *
53 - ASCII ‘S’
43 - ASCII ‘C’
4D - ASCII ‘M’
50 - ASCII
‘P’
31 - ASCII
‘1’ Port 1 (RS-232 Port)
32 -
ASCII
‘1’ Port 2 (RS-485 Port)
Fault Extra Data
Byte Number DCD Length Mismatch
(19 Decimal)
[0]
[1]
FF
Bus address
[2] Module’s directed data length
[3] Configured module’s directed data length
*Indicates that Port 1 or Port 2 is enabled, but the CPU does not support Embedded Serial COM Module ports.
The ASCII value in the sixth byte (offset 5) of the extra data indicates which port is enabled in the stored configuration.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
The following table shows the Genius numbers used when a model number mismatch occurs.
Table B-6. Genius Block Model Numbers
Number
Decimal Hexadecimal
4
9
10
11
12
5
6
7
8
135
136
137
138
82
127
131
132
133
134
77
78
79
80
81
139
140
141
70
71
72
72
73
13
32
69
70
73
74
75
76
4
9
A
B
C
5
6
7
8
87
88
89
8A
52
7F
83
84
85
86
4D
4E
4F
50
51
8B
8C
8D
46
47
48
48
49
D
20
45
46
49
4A
4B
4C
Description
Genius Network Interface (GENI)
Phase B Hand Held Monitor
Phase B Series Six Genius Bus Controller with Diagnostics
Phase B Series Six Genius Bus Controller without Diagnostics
PLCM/Series Six
PLCM/Series 90-40
Series 90-70 Single Channel Bus Controller
Series 90-70 Dual Channel Bus Controller
Series 90-10 Genius Communications Module
Series 90-30 Genius Communications Module
High Speed Counter
Phase B 115Vac 8-point (2 amp) Grouped Block
Phase B 115Vac/125Vdc 8-point Isolated Block
Phase B 115Vac/125Vdc 8-point Isolated Block without Failed Switch
Phase B 220Vac 8-point Grouped Block
Phase B 24-48Vdc 16-point Proximity Sink Block
Phase B 24Vdc 16-point Proximity Sink Block
Phase B 24-48Vdc 16-point Source Block
Phase B 24Vdc 16-point Proximity Source Block
Phase B 12-24Vdc 32-point Sink Block
Phase B 12-24Vdc 32-point Source Block
Phase B 12-24Vdc 32-point 5V Logic Block
Phase B 115Vac 16-point Quad State Input Block
Phase B 12-24Vdc 16-point Quad State Input Block
Phase B 115/230Vac 16-point Normally Open Relay Block
Phase B 115/230Vac 16-point Normally Closed Relay Block
Phase B 115Vac 16-point AC Input Block
Phase B 115Vac 8-point Low-Leakage Grouped Block
Genius Network Adapter (GENA)
Phase B 115Vac 4-input, 2-output Analog Block
Phase B 24Vdc 4-input, 2-output Analog Block
Phase B 220Vac 4-input, 2-output Analog Block
Phase B 115Vac Thermocouple Input Block
Phase B 24Vdc Thermocouple Input Block
Phase B 115Vac RTD Input Block
Phase B 24/48Vdc RTD Input Block
Phase B 115Vac Strain Gauge/mV Analog Input Block
Phase B 24Vdc Strain Gauge/mV Analog Input Block
Phase B 115Vac 4-input, 2-output Current Source Analog Block
Phase B 24Vdc 4-input, 2-output Current Source Analog Block
B
GFK-0265J Appendix B Interpreting Faults Using Logicmaster 90-70 Software B-11
B
B-12
If the model number is 7FH (Genius Network Adapter), the block may be one of the following.
(The GENA Application ID is shown for reference.)
Table B-7. GENA Application ID Numbers
Decimal
Number
Hexadecimal
131
132
160
83
84
A0
Description
115Vac/230Vac/125Vdc Power Monitor Module
24/48Vdc Power Monitor Module
Genius Remote 90-70 Rack Controller
When the system configuration mismatch is an I/O type mismatch, the installed module I/O type is one of the following:
Table B-8. Genius Installed Module I/O Types
Value
01
02
03
Description
Input only
Output only
Combination
When the system configuration mismatch is an I/O type mismatch, the configured module I/O type is one of the following. (All values are in hexadecimal.)
Table B-9. Genius Configured Module I/O Types
Value
Decimal Hexadecimal
30
31
34
50
5
20
21
24
51
54
0
1
2
3
4
1E
1F
22
32
5
14
15
18
33
36
0
1
2
3
4
Description
Discrete input
Discrete output
Analog input
Analog output
Discrete grouped
Analog grouped
Analog in, discrete in
Analog in, discrete out
Analog in, discrete grouped
Analog out, discrete in
Analog out, discrete out
Analog out, discrete grouped
Analog grouped, discrete in
Analog grouped, discrete out
Analog grouped, discrete grouped
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
B
Program Block Checksum Failure
The name of the offending program block is contained in the first eight bytes of the Fault Specific
Data field.
PLC CPU Hardware Failure (RAM Failure)
For a RAM failure in the PLC CPU (one of the faults reported as a PLC CPU hardware failure), the address of the failure is stored in the first four bytes of the field.
Application Fault
Indirect Reference Overflow: The offset address of where the call was made is located in the first two bytes. The offending reference (segment selector and offset) is located in the next four bytes.
The name of the program block in which the function call resides is contained in the next eight bytes.
Bad COMREQ Status Pointer: The first byte contains a hex FF. The next four bytes contain the segment selector and offset of the status pointer into which the PLC CPU could not write.
Bad Genius Bus Request: Four bytes are used, unless the request is a read or write device. In these two datagrams, eight bytes are used.
Table B-10. Fault Specific Data - Bad Genius Bus Request
Fault Specific Data
[4]
[5]
[6]
[7]
[0]
[1]
[2]
[3]
Bad Genius Bus Request
FF
Bus address of requestor
Function code
Subfunction code
Segment selector, if Read/Write device
LSB of offset, if Read/Write device
MSB of offset, if Read/Write device
Length, if Read/Write device
GFK-0265J Appendix B Interpreting Faults Using Logicmaster 90-70 Software B-13
B
PLC Fault Time Stamp
The six-byte time stamp is the value of the system clock when the fault was recorded by the PLC
CPU. (Values are coded in BCD format.)
Table B-11. PLC Fault Time Stamp
Byte Number
3
4
5
6
1
2
Description
Seconds
Minutes
Hours
Day of the month
Month
Year
B-14 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
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Genius Block I/O Type Mismatch Example
The Genius Block I/O Type Mismatch fault entry is explained below. (All data is in hexadecimal.)
Field
Long/Short
Rack
Slot
Task
Fault Group
Fault Action
Error Code
Fault Extra Data
[0]
[1]
[2]
[3]
Value Description
00 This fault contains 8 bytes of fault extra data
00 Main rack (rack 0)
03 Slot 3. In this configuration, slot 3 contains a Genius Bus Controller
01 Single channel bus controller has only one task
0B System Configuration Mismatch fault
02 Diagnostic fault
FF
16
01
04
04 Error code 04 in the System Configuration Mismatch group is a Genius Block
I/O Type Mismatch
IO Type Mismatch error has four bytes of fault extra data
Flag byte
Serial bus address: 16 hex is 22 decimal
Installed module type. 01 is an inputs only module
Configured module I/O type. 04 is a combination module
The configuration file stored from the programming software shows that the device at serial bus address 22 is a combination (mixed) module. However, the “Read ID Reply” message the Genius
Bus Controller received from the device at serial bus address 22 shows that the device is configured for inputs only. The Genius Bus Controller logged this fault when it detected the mismatch.
00 000080 00030100 0B02 0400 FF16010400000000
Fault Extra Data
Error Code
Fault Action
Fault Group
Task
Slot
Rack
Spare
Long/Short
GFK-0265J Appendix B Interpreting Faults Using Logicmaster 90-70 Software B-15
B
Low Battery Signal Example
The Low Battery fault is described below. (All data is in hexadecimal.)
Field
Long/Short
Rack
Slot
Task
Fault Group
Fault Action
Error Code
Fault Extra Data
Value Description
00 This fault contains 8 bytes of fault extra data.
00 Main rack (rack 0).
01 Slot 1. In all configurations, slot 1 in rack 0 contains the PLC CPU.
00 PLC CPU.
12 Low battery signal.
02 Diagnostic fault.
01 Error code 01 in the Low Battery group is one of four low battery conditions detected by the PLC CPU.
No fault extra data for a low battery signal.
This fault occurred because the PLC CPU detected a low battery signal.
00 1F4100 00010000 1202 0100 01010B300BE069602
Fault Extra Data
Error Code
Fault Action
Fault Group
Task
Slot
Rack
Spare
Long/Short
B-16 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
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User Application Fault Example
The User Application Fault is described below. (All data is in hexadecimal.)
Field
Long/Short
Rack
Slot
Task
Fault Group
Fault Action
Error Code
Fault Extra Data
[4]
[5]
[6]
[7]
[0]
[1]
[2]
[3]
Value Description
00 This fault contains 8 bytes of fault extra data
00 Main rack (rack 0)
03 Slot 3. In this configuration, slot 3 contains a Genius Bus Controller
7F When the GBC registers a User Application fault in the PLC fault table, it places a 7F in the task byte of the fault.
16 User Application fault
01 Informational fault
08
FF
FF
03
FF
1D
20
1E
04 Error code 04 in the Application Fault group is a Bad Genius Bus Request.
This fault occurs when the Genius Bus Controller receives a Read or Write
Device datagram from another device on the Genius Bus that cannot be successfully completed.
Bad Genius Bus Request error has eight bytes of fault extra data
Flag byte
Serial bus address: 1D hex is 29 decimal
Function code in the datagram: a GE Intelligent Platforms datagram
Subfunction code in the datagram: a Read Device
Segment selector: 08 is %R memory
Least significant byte of offset
Most significant byte of offset
Length of data to read: 3 words
The Genius Bus Controller received a Read Device datagram from serial bus address 29, which requested three words of %R memory be read starting at %R65536. Since this is beyond the range of the largest value %R can have, the bus controller registered an informational user application fault in the PLC fault table.
00 F28407 00037F00 1601 0400 FF1D201E08FFFF03
Fault Extra Data
Error Code
Fault Action
Fault Group
Task
Slot
Rack
Spare
Long/Short
GFK-0265J Appendix B Interpreting Faults Using Logicmaster 90-70 Software B-17
B
I/O Fault Table
The following diagram identifies the hexadecimal information displayed in each field in the fault entry.
02 1F0100 00030101FF7F 0302 02 00 00 84000000000003
Fault Specific Data
Fault Description
Fault Type
Fault Category
Fault Action
Fault Group
Point
Block
I/O Bus
Slot
Rack
Reference Address
Long/Short
The following paragraphs describe each field in the I/O fault table. Included are tables describing the range of values each field may have.
Long/Short Indicator
This byte indicates whether the fault contains 5 bytes or 21 bytes of fault specific data.
Table B-12. I/O Fault Table Format Indicator Byte
Type
Short
Long
Code
02
03
Fault Specific Data
5 bytes
21 bytes
Reference Address
Reference address is a three-byte address containing the I/O memory type and location (or offset) in that memory which corresponds to the point experiencing the fault. Or, when a Genius block fault or integral analog module fault occurs, the reference address refers to the first point on the block where the fault occurred.
B-18 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
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Table B-13. I/O Reference Address
Byte
0
1-2
Description
Memory Type
Offset
Range
0 - FF
0 - 12K (decimal)
The memory type byte is one of the following values.
Table B-14. I/O Reference Address Memory Type
Name
Analog input
Analog output
Analog grouped
Discrete input
Discrete output
Discrete grouped
Value (Hexadecimal)
0A
0C
0D
10 or 46
12 or 48
1F
I/O Fault Address
The I/O fault address is a six-byte address containing rack, slot, bus, block, and point address of the
I/O point which generated the fault. The point address is a word; all other addresses are one byte each. All five values may not be present in a fault.
When an I/O fault address does not contain all five addresses, a 7F hex appears in the address to indicate where the significance stops. For example, if 7F appears in the bus byte, then the fault is a module fault. Only rack and slot values are significant.
Rack
The rack number ranges from 0 to 7. Zero is the main rack, that is, the one containing the PLC.
Racks 1 through 7 are expansion racks, connected to the PLC through a Bus Transmitter Module in the main rack and Bus Receiver Modules in the expansion racks.
Slot
The slot number ranges from 0 to 9. The PLC CPU always occupies slot 1 in the main rack (rack
0).
I/O Bus
The I/O bus number ranges from 0 to 15. When the module in the slot is a single-channel Genius
Bus Controller, this number is always one. When the module is an integral analog module, this designates which expansion channel generated the fault.
GFK-0265J Appendix B Interpreting Faults Using Logicmaster 90-70 Software B-19
B
Block
Block refers to the serial bus address of the Genius block which reported or has the fault.
Point
Point ranges from 1 to 1024 (decimal). It tells which point on the block has the fault when the fault is a point-type fault.
I/O Fault Group
Fault group is the highest classification of a fault. It identifies the general category of the fault.
The fault description text displayed by the software is based on the fault group and the error codes.
Table B-15 lists the possible fault groups in the I/O fault table. Group numbers less than 80 (Hex) are maskable faults.
The last non-maskable fault group, Additional I/O Fault Codes, is declared for the handling of new fault conditions in the system without the PLC having to specifically know the alarm codes. All unrecognized I/O-type alarm codes belong to this group.
Table B-15. I/O Fault Groups
Group
Number
F
–
9
A
6
7
2
3
Group Name
Loss of, or missing, IOC
Loss of, or missing, I/O module
Addition of, or extra, IOC
Addition of, or extra, I/O module
IOC or I/O bus fault
I/O module fault
IOC software failure
Additional I/O fault codes
Fault Action
Fatal
Diagnostic
Diagnostic
Diagnostic
Diagnostic
Diagnostic
Fatal
As specified
B-20 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
I/O Fault Action
The fault action specifies what action the PLC CPU should take when a fault occurs. The following table lists possible fault actions.
Table B-16. PLC Fault Actions
Fault Action Action Taken by CPU
Informational Log fault in fault table
Diagnostic Log fault in fault table
Set fault references
Fatal Log fault in fault table
Set fault references
Go to Stop mode
Code
1
2
3
B
GFK-0265J Appendix B Interpreting Faults Using Logicmaster 90-70 Software B-21
B
I/O Fault Category
The I/O fault category specifies a general classification of the fault. It is similar to the I/O fault group, discussed earlier. I/O fault categories are listed in the following table.
Table B-17. I/O Fault Categories
Decimal
Number Hex Code
8
9
6
7
10
11
12
3
4
5
1
2
17
18
19
13
14
15
16
8
9
6
7
A
B
C
3
4
5
1
2
11
12
13
D
E
F
10
20
21
22
23
14
15
16
17
Description
Circuit fault: Short circuit, open wire, etc.
Loss of block: Block no longer responding
Addition of block: New block appeared
Unused category
Unused category
Genius bus fault
Global memory fault
EEPROM fault, watchdog timeout
Addition of IOC
Loss of, or missing, IOC
IOC software fault
Forced circuit: A Genius I/O point was forced with the HHM
Unforced circuit: HHM force was removed
Loss of Series 90 integral card
Addition of Series 90 integral card
Found extra Series 90 integral card
Found extra Genius block
An IOC detected a hardware failure or a baud rate mismatch
Genius bus controller has stopped reporting faults because too many faults have occurred
Configuration mismatch fault for I/O modules
GBC software exception
Redundant Genius block switched buse
Block not active on redundant bus
B-22 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
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I/O Fault Type
The I/O fault type component creates sub-categories under the circuit fault, module fault, I/O bus fault, loss of block, excessive faults, I/O configuration mismatch, and GBC software exception categories. It is undefined for other fault categories, but is always set to zero when the fault category is something other than these seven categories. Table B-18 lists the I/O fault types.
Table B-18. I/O Fault Types
Number
2
3
4
8
9
A
0
1
5
3
4
1
2
5
0
0
1
1
3
1
Description
I/O Fault Types for the Circuit Fault Category
Circuit fault on a discrete I/O point
Circuit fault on an analog I/O channel
Fault on a GENA
Fault on a low-level analog input channel
Fault on Remote I/O Scanner
I/O Fault Types for the Module Fault Category
Block Fault (EEPROM, watchdog)
Analog to digital communications fault or calibration error
User scaling error caused out of range values
I/O Fault Types for I/O Bus Fault Category
Genius IOC disabled all outputs on the bus because communications timed out between the PLC
CPU and the Genius IOC
Genius Bus fault (No interrupt to the GBC for its turn on the bus within the time-out period)
Genius IOC detected a conflict between its SBA and another device on the bus
I/O Fault Types for the Loss of Block Category
No reason specified.
Loss of A/D communications.
I/O Fault Types for Excessive Faults Category
Genius IOC detected a high error count on the Genius I/O Bus and dropped off the bus for at least 1.5 seconds
I/O Fault Types for Configuration Mismatch Category
Model number mismatch detected by I/O scanner
Non-existent I/O module detected by I/O scanner
I/O type mismatch detected by I/O scanner
Integral analog module detected; expansion analog module mismatch
Broadcast Data Length mismatch
A configured feature is not supported
GFK-0265J Appendix B Interpreting Faults Using Logicmaster 90-70 Software B-23
B
B-24
Table B-18. I/O Fault Types - Continued
3
4
1
2
5
6
I/O Fault Types for GBC Software Exception Category
Incoming datagram queue is full
The queue for Read/Write requests in the GBC is full. The requests may be from the Genius
Bus or from COMMREQs
The low priority mail queue from the GBC to the PLC is full. The response to the PLC was lost.
Genius background message requiring PLC action was received before PLC completed initialization. Message was ignored.
Genius Report Fault message was not processed because GBC software revision is too old.
Excessive usage of internal GBC memory. User should verify COMMREQ usage.
I/O Fault Description
The I/O fault description component provides a specific fault code when the I/O fault category is a circuit fault (discrete circuit fault, analog circuit fault, low-level analog fault) or module fault. It is undefined for other faults, but is always set to zero. The next two tables list the possible fault descriptions.
Table B-19. I/O Fault Descriptions
01
02
04
08
10
20
83
08
10
20
40
80
80
01
02
04
Number
84
Description
Fault Descriptions for Discrete Circuit Faults
Loss of user side power.
Short in user wiring (for Genius, current level greater than 20 Amps).
Sustained overcurrent (for Genius, current level greater than 2 Amps).
Very low or no current flow.
Switch temperature too high.
Genius smart switch failure.
Series 90-70 I/O individual point fault (also indicated for I/O Module Fault category).
Series 90-70 output fuse blown (also indicated for I/O Module Fault category).
Fault Descriptions for Analog Circuit Faults
Input channel low alarm.
Input channel high alarm.
Input channel under range.
Input channel over range.
Open wire detected on input channel.
Output channel under range.
Output channel over range.
Expansion channel not responding.
Feedback error for Genius Current Source Analog Block.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
GFK-0265J
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Table B-19. I/O Fault Descriptions - Continued
*
Number
**
Description
20
40
80
Fault Descriptions for Low-level Analog Circuit Faults *
Improper RTD connection or thermocouple reverse junction fault.
Cold junction sensor fault on thermocouple block or internal error in RTD block.
Input channel shorted (Genius RTD and Strain Gauge Blocks only).
08
20
40
80
81
82
83
84
Fault Descriptions for Module Faults **
Genius EEPROM or NVRAM failure.
Genius calibration memory failure.
Genius shared RAM fault.
Genius internal circuit fault.
Watchdog timeout (discrete I/O modules only).
Aux fault on discrete I/O modules.
Series 90-70 I/O individual point fault (also indicated for CIRCUIT_FAULT category).
Series 90-70 output fuse blown (also indicated for CIRCUIT_FAULT category).
Fault Descriptions for GENA Faults
80
87
Fault on a GENA analog or discrete point.
Fault on Remote I/O Scanner
The following analog faults also apply when the low-level analog fault type is indicated:
AI_LOW_ALARM, AI_HI_ALARM, AI_UNDER_RANGE, AI_OVER_RANGE, and OPEN_WIRE.
These faults are reported under the HEADEND_FAULT fault type.
I/O Fault Specific Data
An I/O fault table entry may contain up to 21 bytes of I/O fault specific data. In general, this area contains additional information related to the fault. Not all entries contain I/O fault specific data.
This section describes those that do. All but one of these faults uses five bytes of I/O fault specific data; the global memory fault uses the 21-byte entry. If a fault is not listed, it does not have I/O fault specific data.
Faults originated by the Genius Bus Controller always have at least one byte of I/O fault specific data. This byte is in addition to whatever other data might be present.
Circuit Fault
Circuit fault entries use one or two bytes of the fault specific data area. When the Genius Bus
Controller reports the fault, the first byte is generated by the Genius Bus Controller. If the fault type is a GENA fault, the second byte contains the data that was reported from the GENA module in fault byte 2 of its “Report Fault” message. If the fault type is not a GENA fault, the second byte contains the circuit configuration and is encoded, as shown in table B-20.
Loss/Addition of Block
In the case of a Loss of Block or Addition of Block fault, four bytes of fault specific data are used.
The first byte is encoded, as shown in table B-20. The second byte contains the block configuration and is encoded as shown in table B-20. The third byte specifies the number of input circuits possibly used, and the fourth byte specifies the number of output circuits possibly used.
Appendix B Interpreting Faults Using Logicmaster 90-70 Software B-25
B
B-26
Global Memory Fault
The Global Memory fault uses 10 data bytes. The first byte contains the subnet group number.
The other nine bytes contain the global variable name, formatted as a null-terminated string.
Forced/Unforced Circuit
Three bytes of fault specific data are present when a circuit force is added or removed (Forced circuit or Unforced circuit). The first byte contains a code from table B-20. The second byte contains the block configuration, and byte 3 contains the discrete/analog indication.
Loss of or Missing IOC
When the PLC CPU registers a Loss of or Missing IOC fault, it includes in the I/O fault specific data one of the codes in table B-20.
Other I/O Faults
In addition to those faults listed above, when the Genius Bus Controller reports one of the following faults, it includes one of the bytes in table B-20 in the I/O fault specific data.
•
I/O Bus fault
•
Module fault
•
IOC software fault
•
Extra Genius block
•
IOC hardware fault
•
Excessive faults
•
GBC software exception
Block Switch
When the fault category is Block Switch, five bytes of fault specific data are used. The first byte is encoded, as shown in table B-20. The second byte contains the block configuration and is encoded as shown in table B-20. The third byte specifies the number of input circuits possibly used, and the fourth byte specifies the number of output circuits possibly used. The last byte (byte 5) of fault specific data contains the rack/slot address of the Genius bus controller which controlled the bus that the block switched off. It is encoded with the slot number in the low four bits and the rack number in the high four bits.
Symbolic Fault Specific Data
The following table lists data that is required for four kinds of fault specific data:
•
Block circuit configuration
•
Block usage indication
•
Discrete/analog indication
•
Loss of IOC error code
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
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GFK-0265J
Table B-20. I/O Fault Specific Data
7
8
9
5
6
10
11
1
2
3
4
15
16
17
18
19
20
12
13
14
21
22
23
24
25
26
27
28
Decimal
Number
12
13
14
15
16
D
E
F
10
11
1A
1B
1C
17
18
19
8
9
A
B
C
3
4
5
1
2
6
7
Hex
Code
1
2
3
1
2
3
1
2
Description
Circuit Configuration
Circuit is an input
Circuit is an output
Circuit is an output with feedback
Block Configuration
Block configured for inputs only
Block configured for outputs only
Block has both inputs and outputs
Discrete/Analog Indication
Discrete block
Analog block
LOSS_OF_IOC Error Code
IOC failed to respond to a CPU request
CPU and IOC lost synchronization
CPU/IOC communications failed
VME bus error
VME bus error
CPU/IOC communications failed
CPU/IOC communications failed
IOC failed to respond to a CPU request
CPU/IOC communications failed
VME bus error
BME bus error
CPU/IOC communications failed
CPU/IOC communications failed
CPU/IOC communications filed.
IOC failed to respond to a CPU request
CPU/IOC communications failed
CPU/IOC communications failed
IOC failed to respond to a CPU request
CPU/IOC communications failed
CPU/IOC communications failed
Internal I/O scanner fault detected
IOC failed to respond to a CPU request
IOC failed to respond to a CPU request
IOC failed to respond to a CPU request
IOC failed to respond to a CPU request
IOC failed to respond to a CPU request
CPU/IOC communications failed
VME bus error occurred while reading input data
Appendix B Interpreting Faults Using Logicmaster 90-70 Software B-27
B
B-28
Table B-20. I/O Fault Specific Data - Continued
Decimal
Number
36
37
38
39
40
41
42
43
44
29
30
31
32
33
34
35
Hex
Code
24
25
26
27
28
29
2A
2B
2C
1D
1E
1F
20
21
22
23
Description
VME bus error occurred while reading input diagnostics
CPU/IOC communications failed
VME bus error occurred while writing output data to IOC
CPU/IOC communications failed
CPU/IOC communications failed
CPU/IOC communications failed
VME bus error
VME bus error
Unable to read data from IOC for redundant I/O blocks
Unable to write data to IOC for redundant I/O blocks
IOC does not support configured I/O redundancy
IOC failed to respond to a CPU request
I/O scanner detected too many IOCs in the system
I/O scanner detected too many IOCs in the system
VME bus error
VME bus error
Fault Actions for Specific Faults
Forced/unforced circuit faults are reported as informational faults. All others are diagnostic or fatal.
The model number mismatch, I/O type mismatch and non-existent I/O module faults are reported in the PLC fault table under the System Configuration Mismatch group. They are not reported in the I/O fault table.
I/O Fault Time Stamp
The six-byte time stamp is the value of the system clock when the fault was recorded by the PLC
CPU. Values are coded in BCD format.
Table B-21. I/O Fault Time Stamp
Byte Number
3
4
1
2
5
6
Description
Seconds.
Minutes.
Hours.
Day of the month.
Month.
Year.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
GFK-0265J
B
Loss of I/O Block Example
The loss of I/O Block fault is described below. (All data is in hexadecimal.)
Field Value Description
Long/Short
Reference
Address
Rack
Slot
Bus
Block
Point
Fault Group
Fault Action
Fault
Category
Fault Type
Fault
Description
Fault Specific
Data
02 This fault contains up to 5 bytes of fault specific data.
FF0100 FF indicates that the reference address is not given. The fault applies to the entire block.
00 Main rack (rack 0).
04 Slot 4. In this configuration, slot 4 contains a Genius Bus Controller.
01 Bus 1 on the bus controller. When this byte is significant, the single channel bus controller always shows this field as a 1.
1E 1E is 30 decimal. This fault was logged for the Genius device at serial bus address
30.
FF7F FF in the first (low byte) indicates that the point is not meaningful for this fault entry.
03 Loss of, or missing, I/O module fault.
02 Diagnostic fault.
02 Loss of block.
00
00
84
00 fault type in the Loss of Block category indicates no specific fault was given.
No fault description information is given.
GBC reported a lost device. Only 1 byte of fault specific data is significant.
The Genius Bus Controller in slot 4 determined that the device at serial bus address 30 on bus 1 failed to send data in three consecutive bus scans. The bus controller then marked the device as lost and logged a fault in the I/O fault table. The fault type and fault description are not meaningful on this fault. The fault specific data contains a byte from the GBC echoing the fault.
02 FF0100 0004011EFF7F 0302 02 00 00 8403101000
Fault Specific Data
Fault Description
Fault Type
Fault Category
Fault Action
Fault Group
Point
Block
I/O Bus
Slot
Rack
Reference Address
Long/Short
Appendix B Interpreting Faults Using Logicmaster 90-70 Software B-29
B
B-30
Addition of I/O Block Example
The Addition of I/O Block fault is described below. (All data is in hexadecimal.)
Field
Long/Short
Reference
Address
Rack
Slot
Bus
Block
Point
Fault Group
Fault Action
Fault Category
Fault Type
Fault
Description
Fault Specific
Data
Value
02 This fault contains up to 5 bytes of fault specific data.
1F0100 1F (31 decimal) indicates that the block has a discrete grouped reference address. The software shows this by displaying a %QI in the reference address column. 0100 indicates this is address 0001 (hexadecimal data is displayed low byte first, then high byte) in the discrete grouped address space.
00
04
Main rack (rack 0).
Slot 4. In this configuration, slot 4 contains a Genius Bus Controller.
01
1E
Bus 1 on the bus controller. When this byte is significant, the single channel bus controller always shows this field as a 1.
1E is 30 decimal. This fault was logged for the Genius device at serial bus address 30.
FF7F FF in the first (low byte) indicates that the point is not meaningful for this fault entry.
07
02
Addition of, or extra, I/O module fault.
Diagnostic fault.
03
00
00
Fault category 03 is an addition of block.
No fault type data occurs for an Addition of Block fault. The 00 is meaningless.
No fault description information is given.
80
Description
GBC reported an added device. Only 1 byte of fault specific data is significant.
The bus controller in slot 4 in the main rack received data from the device at serial bus address 30, indicating that the device was again on the bus. From the configuration table stored from your programming software to the PLC CPU, the CPU determined that the first point on the device was
%QI0001. The fault type and fault description are not meaningful on this fault. The fault specific data contains a byte from the GBC echoing the fault.
02 1F0100 0004011EFF7F 0702 03 00 00 8003101000
Fault Specific Data
Fault Description
Fault Type
Fault Category
Fault Action
Fault Group
Point
Block
I/O Bus
Slot
Rack
Reference Address
Long/Short
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
B
Loss of IOC (I/O Controller)
The Loss of IOC fault is explained below. (All values are in hexadecimal.)
Field
Long/Short
Reference
Address
Rack
Slot
Bus
Block
Point
Fault Group
Fault Action
Fault Category
Fault Type
Fault Description
Fault Specific
Data
Value Description
02
03
7F
7F
This fault contains up to 5 bytes of fault specific data.
000000 All zeros in this field indicates that the reference address is not meaningful for this fault.
00 Main rack (rack 0).
Slot 3. In this configuration, slot 3 contains a Genius Bus Controller.
Since this is a single channel GBC, the bus number is not needed. 7F indicates that the bus number is not significant.
A block number of 7F hex indicates that the block is not meaningful for this fault.
FF7F FF in the first (low byte) indicates that the point is not meaningful for this fault entry.
02 Loss of, or missing, IOC fault.
03
0A
00
00
00
Fatal fault.
Fault Category 0A (10 decimal) is a Loss of, or Missing, IOC fault.
No fault type data occurs for a Loss of, or Missing, IOC fault.
No fault description information is given.
There is no entry for a zero in fault specific data, so there is no additional information available on this instance of LOSS of IOC.
The PLC CPU detected a loss of, or missing, IOC and logged this fault. The fatal action indicates that the PLC CPU will not transition to RUN mode until the fault is cleared. Fault type and fault description are not meaningful for this fault; fault specific data may be meaningful.
02 000000 00037F7FFF7F 0203 0A 00 00 0002400000
Fault Specific Data
Fault Description
Fault Type
Fault Category
Fault Action
Fault Group
Point
Block
I/O Bus
Slot
Rack
Reference Address
Long/Short
GFK-0265J Appendix B Interpreting Faults Using Logicmaster 90-70 Software B-31
B
B-32
Circuit Fault
The Circuit Fault is explained below. (All values are in hexadecimal.)
Field
Long/Short
Reference
Address
Rack
Slot
Bus
Block
Point
Fault Group
Fault Action
Fault Category
Fault Type
Fault
Description
Fault Specific
Data
Value Description
02
02
This fault contains up to 5 bytes of fault specific data.
0D0200 0D (13 decimal) indicates that the block has an analog grouped reference address. Your programming software shows this by displaying a %AQI in the reference address column. 0200 indicates this is address 0002 (hexadecimal data is displayed low byte first, then high byte) in the analog grouped address space.
00
03
Main rack (rack 0).
Slot 3. In this configuration, slot 3 contains a Genius Bus Controller.
01 Bus 1 on the bus controller. When this byte is significant, the single channel bus controller always shows this field as a 1.
This fault was logged for the Genius device at serial bus address 02.
0200
0A
02
01
02
This fault was logged for point 2 on the device at serial bus address 02.
0A hexadecimal is 10 decimal. I/O Module fault.
Diagnostic fault.
Fault Category 01 is a circuit fault.
Fault Type 02 under the Circuit Fault category is a circuit fault on an analog
I/O channel.
10 A fault description of 10 hex under the analog circuit fault description is open wire.
9B03 The GBC reported a circuit fault. Only the 9B byte is significant.
The Genius Bus Controller in slot 3 in the main rack received a circuit fault “Report Fault” message from the analog block located at serial bus address 2. The block reported an Open Wire fault on point 2. From the configuration tables stored from your programming software, the PLC
CPU determined that the analog block at serial bus address 02 was mapped to both the %AI and
%AQ user references and that point 2 corresponded to location 0002.
02 0D0200 000301020200 0A02 01 02 10 9B03000000
Fault Specific Data
Fault Description
Fault Type
Fault Category
Fault Action
Fault Group
Point
Block
I/O Bus
Slot
Rack
Reference Address
Long/Short
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Appendix
C
Instruction Mnemonics
In program display/edit mode, you can quickly enter or search for a program instruction by typing the ampersand (&) character followed by the instruction’s mnemonic. For some instructions, you can also specify a reference address or nickname, a label, or a location reference address.
This appendix lists the mnemonics of the programming instructions for Logicmaster 90-70 programming software. At any time during programming, you can display a help screen with these mnemonics by pressing the ALT and I keys.
GFK-0265J C-1
C
Instruction
Vertical
Timers
ONDTR
OFDT
TMR
Counters
UPCTR
DNCTR
Contacts
Any Contact
–| |–
–|/|–
–|
↑
|–
–|
↓
|–
–[FAULT]–
–|NOFLT]–
–[HIALR]–
–[LOALR]–
<+>–––
Coils
Any Coil
–( )–
–(/)–
–(
↑
)–
–(
↓
)–
–(S)–
–(r)–
–(SM)–
–(RM)–
–(M)–
–(/M)–
–––<+>
Links
Horizontal
All
&COI
&NOCOI
&NCCOI
&PCOI
&NCOI
&SL
&RL
&SM
&RM
&NOM
&NCM
&COILC
INT
&CON
&NOCON
&NCCON
&PCON
&NCON
&FA
&NOF
&HI
&LOA
&CONC
&CON
&NOCON
&NCCON
&PCON
&NCON
&FA
&NOF
&HI
&LOA
&CONC
&HO
&VE
&ON
&OF
&TM
&UP
&DN
&COI
&NOCOI
&NCCOI
&PCOI
&NCOI
&SL
&RL
&SM
&RM
&NOM
&NCM
&COILC
&HO
&VE
&ON
&OF
&TM
&UP
&DN
UINT
Table C-1. Contacts, Coils, Links, Timers, and Counters
DINT
Mnemonic
BIT BYTE WORD DWORD REAL MIXED
C-2 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Table C-2. Math, Relational, and Bit Operations
DINT
Mnemonic
BIT BYTE WORD DWORD Instruction
Math
ADD
SIN
COS
TAN
IASIN
ACOS
ATAN
LOG
LN
EXP
SUB
MUL
DIV
MOD
SQRT
ABS
EXPT
DEG
RAD
Relational
EQ
NE
GT
GE
LT
LE
CMP
Bit Operation
AND
ROR
BTST
BSET
BLCR
BPOS
MCMP
OR
XOR
NOT
SHL
SHR
ROL
All
&AN
&ROR
&BT
&BS
&BCL
&BP
&MCM
&OR
&XO
&NOT
&SHL
&SHR
&ROL
&EQ
&NE
>
&GE
<
&LE
&CM
INT UINT
&AD_I
&SUB_I
&MUL_I
&DIV_I
&MOD_I
&SQ_I
&ABS_I
&SIN
&COS
&TAN
&ASIN
&ACOS
&ATAN
&LOG
&LN
&EXP
&EXPT
&DEG
&RAD
&AD
&SUB
&MUL
&DIV
&MOD
&SQ
&ABS
&SIN
&COS
&TAN
&ASIN
&ACOS
&ATAN
&LOG
&LN
&EXP
&EXPT
&DEG
&RAD
&AD_UI
&SUB_UI
&MUL_UI
&DIV_UI
&MOD_UI
&AD_DI
&SUB_DI
&MUL_DI
&DIV_DI
&MOD_DI
&SQ_DI
&ABS_DI
&EQ_I
&NE_I
>_I
&GE_I
<_I
&LE_I
&CM_I
&EQ_UI
&NE_UI
>_UI
&GE_UI
<_UI
&LE_UI
&CM_UI
&EQ_DI
&NE_DI
>_DI
&GE_DI
<_DI
&LE_DI
&CM_DI
&AN_W
&OR_W
&XO_W
&NOT_W
&SHL_W
&SHR_W
&ROL_W
&ROR_W
&BT_W
&BS_W
&BCL_W
&BP_W
&MCM_W
&AN_DW
&OR_DW
&XO_DW
&NOT_DW
&SHL_DW
&SHR_DW
&ROL_DW
&ROR_DW
&BT_DW
&BS_DW
&BCL_DW
&BP_DW
&MCM_DW
REAL MIXED
&AD_R
&AD_R
&MUL_R
&DIV_R
&MUL_M
&DIV_M
&SQ_R
&ABS_R
&EQ_R
&NE_R
>_R
&GE_R
<_R
&LE_R
&CM_R
C
GFK-0265J Appendix C Instruction Mnemonics C-3
C
Table C-3. Data Move and Data Table Operations
BIT
Mnemonic
BYTE Instruction All INT UINT DINT
Data Table
TBLRD
TBLWR
LIFORD
LIFOWRT
FIFORD
FIFOWRT
SORT
ARRAY_MOVE
SRCH_EQ
SRCH_NE
SRCH_GT
SRCH_GE
SRCH_LT
SRCH_LE
Data Move
MOVE &MOV
BLKMOV
BLKCLR
SHFR
BITSEQ
SWAP
COMMREQ
&BLKM
&BLKC
&SHF
&BI
&SW
&COMMR
VMERD
VMEWRT
VMERMW
VMETST
VME_CFG_RD
&VMERD
&VMEW
&VMERM
&VMET
&CFGRD
VME_CFG_WRT &CFGWRT
DATA_INIT &DINI
DATA_INIT_COMM
DATA_INIT_ASCII
&DCO
&DA
&MOV_I
&BLKM_I
&MOV_UI
&BLKM_UI
&MOV_DI
&BLKM_DI
&TBLR &TBLR_I &TBLR_UI &TBLR_DI
&TBLW
&LIFOR
&LIFOW
&FIFOR
&FIFOW
&SORT
&TBLW_I
&LIFOR_I
&LIFOW_I
&FIFOR_I
&FIFOW_I
&SORT_I
&TBLW_UI
&LIFOR_UI
&LIFOW_UI
&FIFOR_UI
&FIFOW_UI
&SORT_UI
&TBLW_DI
&LIFOR_DI
&LIFOW_DI
&FIFOR_DI
&FIFOW_DI
&AR
&SRCHE
&AR_I
&SRCHE_I
&AR_UI
&SRCHE_UI
&AR_DI
&SRCHE_DI
&SRCHN &SRCHN_I &SRCHN_UI &SRCHN_DI
&SRCHGT &SRCHGT_I &SRCHGT_UI &SRCHGT_DI
&SRCHGE &SRCHGE_I &SRCHGE_UI &SRCHGE_DI
&SRCHLT &SRCHLT_I &SRCHLT_UI &SRCHLT_DI
&SRCHLE &SRCHLE_I &SRCHLE_UI &SRCHLE_DI
&MOV_BI
&SHF_BI
&AR_BI
WORD
&MOV_W
&BLKM_W
&SHF_W
&SW_W
&VMERD_BY
&VMEWR_BY
&VMERD_W
&VMERD_W
&VMERM_BY &VMERM_W
&VMET_BY &VMET_W
DWORD
&MOV_DW
&BLKM_DW
&SHF_DW
&SW_DW
&TBLR_W &TBLR_DW
&TBLW_W
&LIFOR_W
&LIFOW_W
&FIFOR_W
&FIFOW_W
&SORT_W
&TBLW_DW
&LIFOR_DW
&LIFOW_DW
&FIFOR_DW
&FIFOW_DW
&AR_BY
&SRCHE_BY
&AR_W
&SRCH_W
&AR_DW
&SRCH_DW
&SRCHN_BY &SRCHN_W &SRCHN_DW
&SRCHGT_BY &SRCHGT_W &SRCHGT_DW
&SRCHGE_BY &SRCHGE_W &SRCHGE_DW
&SRCHLT_BY &SRCHLT_W &SRCHLT_DW
&SRCHLE_BY &SRCHLE_W &SRCHLE_DW
REAL
&MOV_R
&BLKM_R
MIXED
C-4 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
C
Instruction
Control
CALL
DOIO
SUSIO
MCR
ENDMCR
JUMP
LABEL
COMMENT
SVCREQ
PIDISA
PIDIND
FOR
END_FOR
EXIT
Conversion
to BCD–4 to BCD–8 to UINT to INT to DINT to REAL
BCD–4 to UINT
BCD–4 to INT
BCD–8 to DINT
BCD–4 to REAL
BCD–8 to REAL
TRUN
UINT
Table C-4. Conversion and Control Operations
DINT
Mnemonic
BIT BYTE WORD DWORD REAL MIXED All INT
&CA
&DO
&SUS
&MCR
&ENDMCR
&JUMP
&LABEL
&COMME
&SV
&PIDIS
&PIDIN
&FOR
&ENDFOR
&EXIT
&BCD4 &BCD4
&UI
&I
&DIN
&R
&UI_BCD4
&I_BCD4
&DI_BCD8
&R_BCD4
&R_BCD8
&TRINT
&UI
&I
&DIN
&R
&TRINT
&BCD4_UI
&DIN_UI
&R_UI
&BCD8
&UI_DI
&I_DI
&R_DI
&TRDINT
&UI_R
&I_R
&DIN_R
GFK-0265J Appendix C Instruction Mnemonics C-5
Appendix
D
Memory Allocation
GFK-0265J
CPU Memory Size is the number of bytes of memory available to the user for PLC applications.
The CPU memory size varies based on CPU and daughterboard selected. The current options are shown below.
CPU Memory Size Bytes
32K
64K
128K
256K
512K
1M
6M
32,768
65,536
131,072
262,144
524,288
1,048,576
6,291,456
The following items count against the CPU memory size:
Register Memory Size (%R)
Bytes = %R references configured
×
2
Analog Inputs (%AI)
If point faults enabled: Bytes = %AI references configured
×
3
If point faults disabled: Bytes = %AI references configured
×
2
Analog Outputs (%AQ)
If point faults enabled: Bytes = %AQ references configured
×
3
If point faults disabled: Bytes = %AQ references configured
×
2
Discrete Point Faults
If point faults enabled:
Bytes = 128 for 73x CPUs
Bytes = 512 for 77x CPUs
Bytes = 3072 for 78x and 9xx CPUs
D-1
D-2
D
Fault Tables
Bytes = (I/O Fault Entries configured + PLC Fault entries configured – 48)
×
48
Note
The default fault table sizes (16 PLC faults, 32 I/O faults) do not require user memory
Ethernet Global Data
Bytes = 0 if no Ethernet Global Data exchanges are configured
C Debugger Connection
Bytes = 11772 when connection is made; no user memory used when no connection
I/O Scan Set File
Based on number of scan sets used.
Note
32 bytes of user memory is consumed if the user scans all I/O every sweep (the default).
Module Configuration Files
Applies to FBC module only
Name Resolution Files
Bytes = 0 if no name resolution file created by user
User Protocol Files
Bytes = 0 if no user protocol files are created by user
User Programs
See description below on user programs
There are some additional charges for Redundancy products such as the 788, 789, and CGR935
CPUs. Refer to the appropriate user manuals for details.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
D
User Program Memory Usage
The user memory remaining after subtracting the configuration items above from the CPU memory size can all be devoted to user logic. However, multiple programs may be needed to take advantage of this memory for CPUs with a 1M or higher CPU memory size.
There is a separate maximum program size for each user program created. This size varies based on program type. The maximum sizes are shown in the table below. Note that the maximum size is only possible on CPUs with 1M or more of user memory; for CPUs with less memory, the maximum size is limited to the CPU memory size.
Type of Program Stack Size
LD/SFC Program
≤
12K (default size is 12K)
544K
Maximum Program Size *
Stack size is not counted against program size or total user memory.
LD/SFC Program > 12K
Standalone C
Program
N/A
544K – Stack Size
564K – Stack Size
*Maximum program size is only possible on CPUs with 1M byte or more of user memory; otherwise, maximum program size is limited to size of CPU memory.
The following User Program items are counted against the CPU memory size but not against the
User Program size for the associated program:
C Initialization Data
The initialization data for the data areas of C Standalone programs and EXE Blocks is kept separate from the rest of the program image and is not counted against the user program limit. This memory does count against the CPU memory size. Refer to the C
Programmer’s Toolkit for Series 90-70 PLCs User’s Manual for details.
Standalone C Program Control Structures
8K (8192 bytes) is charged per Standalone C program created and stored to the CPU
The following User Program items are counted against the User Program limit for the associated program and also against the CPU memory size.
%P Program Memory
1
If highest %P used is %P00128 or less:
Bytes = 399
If highest %P used is greater than %P00128:
Bytes = Highest %P used (rounded to next multiple of 32)
×
2 + 143
GFK-0265J
1
To round to next multiple of 32 for %P and %L: Divide # of references by 32 and round up to a whole number, then multiply by 32. For example, 167 %P references yields 192 since 167 / 32 =
5.21875 which rounds up to 6 and 6 X 32 = 192.
Appendix D Memory Allocation D-3
D
%L Program Block Memory Usage
1
For each program block,
If highest %L used is %L0064 or less:
Bytes = 271
If highest %L used is greater than %L0064:
Bytes = Highest %L used (rounded to next multiple of 32)
×
2 + 143
Interrupt Block Control Structures
142 bytes per interrupt block
Program Logic and Overhead
C Data Area
The data area for standalone C programs and EXE blocks is considered part of the user program and counts against the user program size
Configured Stack Size
Shown in program limits table above.
Note
The first 12K of the LD/SFC program’s stack is not counted against the CPU’s memory size
Also, note that the program block is based on overhead for the block itself plus the logic and register data being used (that is, %L). Refer to the Call instruction in Table A-1 (Appendix A) for block size overhead.
Note
If the user has a 1M or larger CPU and needs more space for LD/SFC logic, then they may want to consider changing some of their %P or %L references to %R,
%AI, or %AQ. %R, %AI, and %AQ references only count against the CPU memory size and not against the program limit. Such changes require a recompilation of the program block and a stop mode store to the CPU.
D-4
1
To round to next multiple of 32 for %P and %L: Divide # of references by 32 and round up to a whole number, then multiply by 32. For example, 167 %P references yields 192 since 167 / 32 =
5.21875 which rounds up to 6 and 6 X 32 = 192.
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Appendix
E
Key Functions
GFK-0265J
The following table lists the keyboard functions that are active in the Logicmaster 90-70 software environment. This information may also be displayed on the programmer screen by pressing ALT-
K to access key help.
ALT-A
ALT-C
ALT-M
ALT-R
ALT-E
ALT-L
ALT-P
ALT-H
ALT-K
ALT-I
ALT-T
ALT-Q
ALT-Z
Key
Sequence
ALT-n
ALT-B
ALT-D
ALT-S
ALT-X
ALT-V
ALT-W
ALT-F2
ALT-G
ALT-N
ALT-O
ALT-U
Description
Key
Sequence Description
Keys Available throughout the Software Package
Abort.
Clear field.
Change programmer mode.
CTRL-Break
Esc
CTRL-Home
Exit package.
Zoom out.
Previous command line contents.
Change PLC
RUN/STOP
Toggle status area.
state.
Next command line contents.
Cursor left within the field.
List directory files.
Print screen.
Help.
Key help.
Instruction mnemonic help.
Start
TEACH
mode.
CTRL-End
CTRL-
←
CTRL-
→
CTRL-D
CTRL-U
Tab
Shift-Tab
Enter
Cursor right within the field.
Decrement reference address.
Increment reference address.
Change/increment field contents.
Change/decrement field contents.
Accept field contents.
Stop
TEACH
mode.
CTRL-E Display last system error.
Pause
TEACH
playback.
Playback file n (n = 0 thru 9).
F12
(or Keypad–)
F11
(or Keypad *)
Toggle discrete reference.
Override discrete reference.
Keys Available in the Program Editor Only
Toggle text editor bell.
Keypad + Accept rung.
Delete rung element./Delete rung.
Store block to PLC and disk.
Enter
CTRL-PgUp
Accept rung.
Previous rung.
Display zoom level & block state.
Variable table window.
Display PSB parameter table.
Go to operand reference table.
CTRL-PgDn
|
~
Tab
Next rung.
Horizontal link.
Vertical link.
Go to next operand field.
Special Keys
Single sweep debug. Available only in program editor, reference table editor, and status fault tables.
Toggle display options. Available only in program editor and reference table editor.
Password override. Available only on Password screen in configuration software.
Update disk.
E-1
E
The Help card on the next page contains a listing of the key help and also the instruction mnemonics help text for Logicmaster 90 software. This card is printed in triplicate and is perforated for easier removal from the manual.
E-2 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
E
This page contains side 1 of GFJ-056B.
GFK-0265J Appendix E Key Functions E-3
E
This page contains side 2 of GFJ-056B.
E-4 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
Appendix
F
Using Floating-Point Numbers
Floating-Point Numbers
Your programming software provides the ability to edit, display, store, and retrieve numbers with real values. Some functions operate on floating-point numbers. However, in order to use floatingpoint numbers, you must have a 732, 772, 782 , 914 or higher CPU. Floating-point numbers are represented in decimal scientific notation, with a display of six significant digits.
Note
Use of floating-point numbers within a parameterized subroutine block (PSB) usually necessitates the use of NWORD parameters rather than WORD parameters.
Note
In this manual, the terms “floating-point” and “REAL” are used interchangeably to describe the floating-point number display/entry feature of the software.
In the software, the following format is used. For numbers in the range 9999999999 to .0001, the display has no exponent and up to six or seven significant digits. For example:
Entered
.000123456789
–12.345e-2
1234
Displayed Description
+.0001234567
Ten digits, six or seven significant.
–.1234500
Seven digits, six or seven significant.
+1234.000
Seven digits, six or seven significant.
Outside the range listed above, only six significant digits are displayed and the display has the form:
GFK-0265J F-1
F
F-2
+1.23456E+12
||| | | |
||| | | + ——— Exponent (signed power of 10)
||| | |
||| | + ————— Exponent indicator and sign of exponent
||| |
||| +
————————
Five less significant digits
|||
||+
———————————
Decimal point
||
|+
————————————
Most significant digit
|
+
—————————————
Sign of the entire number
Internal Format of Floating-Point Numbers
Floating-point numbers are stored in single precision IEEE-standard format. This format requires
32 bits, which translates to two (adjacent) 16-bit PLC registers. The encoding of the bits is diagrammed below.
32
Bits 17*32 Bits 1-16
17 16
23-bit mantissa
8-bit exponent
1-bit sign (Bit 32)
1
Register use by a single floating-point number is diagrammed below. In this diagram, if the floating-point number occupies registers R5 and R6, for example, then R5 is the least significant register and R6 is the most significant register.
16
Least Significant Register
Bits 1-16
1 Least Significant Bit: Bit 1
Most Significant Bit: Bit 16
Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
GFK-0265J
F
32
Most Significant Register
Bits 17-32
17
Least Significant Bit: Bit 17
Most Significant Bit: Bit 32
Values of Floating-Point Numbers
Use the following table to calculate the value of a floating-point number from the binary number stored in two registers.
Exponent (e) Mantissa (f) Value of Floating Point Number
255
255
Non-zero
0
Not a valid number (NaN).
–1s *
∞
0 < e < 255 Any value
–1s
* 2e–127 * 1.f
0 Non-zero
–1s
* 2–126 * 0.f
0 0 0 f = the mantissa. The mantissa is a binary fraction.
e = the exponent. The exponent is an integer E such that E+127 is the power of 2 by which the mantissa must be multiplied to yield the floating-point value.
s = the sign bit.
* = the multiplication operator.
For example, consider the floating-point number 12.5. The IEEE floating-point binary representation of the number is:
01000001 01001000 00000000 00000000
or 41480000 hex in hexadecimal form. The most significant bit (the sign bit) is zero (s=0). The next eight most significant bits are 10000010, or 130 decimal (e=130).
The mantissa is stored as a decimal binary number with the decimal point preceding the most significant of the 23 bits. Thus, the most significant bit in the mantissa is a multiple of 2
-1
, the next most significant bit is a multiple of 2
-2
, and so on to the least significant bit, which is a multiple of 2
-23
. The final 23 bits (the mantissa) are:
1001000 00000000 00000000
The value of the mantissa, then, is .5625 (that is, 2
-1
+ 2
-4
).
Since e > 0 and e < 255, we use the third formula in the table above:
number = –1 s
* 2 e–127
* 1.f
= –1
0
* 2
130–127
* 1.5625
= 1 * 2
3
* 1.5625
= 8 * 1.5625
= 12.5
Appendix F Using Floating-Point Numbers F-3
F
Thus, you can see that the above binary representation is correct.
The range of numbers that can be stored in this format is from ± 1.401298E–45 to
± 3.402823E+38 and the number zero.
Entering and Displaying Floating-Point Numbers
In the mantissa, up to six or seven significant digits of precision may be entered and stored; however, the software will display only the first six of these digits. The mantissa may be preceded by a positive or negative sign. If no sign is entered, the floating-point number is assumed to be positive.
If an exponent is entered, it must be preceded by the letter “E” or “e” and the mantissa must contain a decimal point to avoid mistaking it for a hexadecimal number. The exponent may be preceded by a sign, but if none is provided, it is assumed to be positive. If no exponent is entered, it is assumed to be zero. No spaces are allowed in a floating-point number.
To provide ease-of-use, several formats are accepted in both command-line and field data entry.
These formats include an integer, a decimal number, or a decimal number followed by an exponent. These numbers are converted to a standard form for display once the user has entered the data and pressed the Enter key.
Examples of valid floating-point number entries and their normalized display are shown below.
Entered
250
+4
–2383019
34.
–.0036209
12.E+9
–.0004E–11
731.0388
99.20003e–29
Displayed
+250,0000
+4.000000
–2383019.
+34.00000
–.003620900
+1.20000E+10
–4.00000E–15
+731.0388
+9.92000E–28
Examples of invalid floating-point number entries are shown below.
Invalid Entry
–433E23
10e-19
1 0.e19
4.1e1 9
Explanation
Missing decimal point.
Missing decimal point.
The mantissa cannot contain spaces between digits or characters.
This is accepted as 10.e0, and an error message is displayed.
The exponent cannot contain spaces between digits or characters.
This is accepted as 4.1e0, and an error message is displayed.
F-4 Series 90™-70 PLC CPU Instruction Set Reference Manual – January 2000 GFK-0265J
F
Errors in Floating-Point Numbers and Operations
Overflow occurs when a number greater than 3.402823E+38 or less than –3.402823E+38 is generated by a REAL function. When this occurs, the Enable Out output of the function is set
Off; and the result is set to positive infinity (for a number greater than 3.402823E+38) or negative infinity (for a number less than –3.402823E+38). You can determine where this occurs by testing the sense of the Enable Out output.
POS_INF = 7F800000h – IEEE positive infinity representation in hex
NEG_INF = FF800000h – IEEE negative infinity representation in hex
If the infinities produced by overflow are used as operands to other REAL functions, they may cause an undefined result. This undefined result is referred to as an NaN (Not a Number). For example, the result of adding positive infinity to negative infinity is undefined. When the
ADD_REAL function is invoked with positive infinity and negative infinity as its operands, it produces an NaN for its result.
Each REAL function capable of producing an NaN produces a specialized NaN which identifies the function.
NaN_ADD
NaN_SUB
NaN_MUL
NaN_DIV
NaN_SQRT
NaN_LOG
NaN_POW0
NaN_SIN
NaN_COS
NaN_TAN
NaN_ASIN
NaN_ACOS
NaN_BCD
REAL_INDEF
= 7F81FFFFh
= 7F81FFFFh
= 7F82FFFFh
= 7F83FFFFh
= 7F84FFFFh
= 7F85FFFFh
= 7F86FFFFh
= 7F87FFFFh
= 7F88FFFFh
= 7F89FFFFh
= 7F8AFFFFh
= 7F8BFFFFh
= 7F8CFFFFh
= FFC00000
– Real addition error value in hex
– Real subtraction error value in hex
– Real multiplication error value in hex
– Real division error value in hex
– Real square root error value in hex
– Real logarithm error value in hex
– Real exponent error value in hex
– Real sine error value in hex
– Real cosine error value in hex
– Real tangent error value in hex
– Real inverse sine error value in hex
– Real inverse cosine error value in hex
– BCD-4 to real error
– Real indefinite, divide 0 by 0 error
When an NaN result is fed into another function, it passes through to the result. For example, if an NaN_ADD is the first operand to the SUB_REAL function, the result of the SUB_REAL is
NaN_ADD. If both operands to a function are NaNs, the first operand will pass through. Because of this feature of propagating NaNs through functions, you can identify the function where the
NaN originated.
Note
For NaN, the Enable Out output is Off (not energized).
GFK-0265J Appendix F Using Floating-Point Numbers F-5
GFK-0265J
Index
%
%G References
%G references and CPU memory, 2-15
:
:Ethernet global data
@
@ sign with indirect references, 2-11
A
Absolute value root function, 6-8
Analog I/O diagnostic data, 2-87
Analog input register references (%AI), 2-11
Analog output register references (%AQ), 2-11
Application program task execution, 2-5
housekeeping, 2-4 input scan, 2-4
B
Base 10 logarithm function, 6-12
Bit operation functions
Bus configuration, FIP I/O, 2-85
Bus configuration, Genius I/O, 2-83
C
in the programmer communications window,
C program structure
C programs, 2-42 data encapsulation, 2-42
Calculating predicted sweep times, A-31
Call subroutine function, 12-6
Clocks, 2-77 elapsed time clock, 2-77 time-of-day clock, 2-77
using SVCREQ function #16 to read the
using SVCREQ function #7 to read and
Index-1
Index
Index-2
negated coil, 4-8 negated retentive coil, 4-8
negative transition coil, 4-9 positive transition coil, 4-9
retentive RESET coil, 4-11 retentive SET coil, 4-11
Communication request function, 9-17
Configurable fault actions, 3-4 diagnostic, 3-4 fatal, 3-4 informational, 3-4
fault contact, 4-7 high alarm contact, 4-7 low alarm contact, 4-7
negative transition contact, 4-4
normally closed contact, 4-4 normally open contact, 4-4 positive transition contact, 4-4
Control functions
Convenience references. See System status references
Conversion functions
Series 90™-70 PLC CPU Instruction Set Reference Manual–January 2000
Convert to BCD-4 function, 11-2
Convert to BCD-8 function, 11-4
Convert to double precision signed integer
Convert to Real function, 11-12
Convert to signed integer function, 11-8
Convert to unsigned integer function, 11-6
Counters
CPU
CPU default memory sizes, 2-14
calculating predicted sweep times, A-31
FIP I/O sweep impact times
Genius I/O sweep impact times, A-18
I/O interrupt performance and sweep impact,
I/O module sweep impact times
I/O scan and I/O fault sweep impact, A-14
programmer sweep impact time, A-12
sweep impact of Ethernet global data, A-24
sweep impact of FIP I/O and FBCs, A-21
sweep impact of Genius I/O and GBCs, A-17
sweep impact of intelligent option modules,
sweep impact of Series 90-70 I/O modules,
D
Data coherency in communications windows,
Data initialization function, 9-40
Data initialize ASCII function, 9-46
Data initialize communications request
Data initialize DLAN function, 9-48
Data mapping, 2-83 default conditions, 2-83
GFK-0265J
GFK-0265J
Data move functions
DATA_INIT_DLAN, 9-48
Data table functions
DATA_INIT_DLAN, 9-48
Diagnostic data, analog I/O, 2-87
addition of or extra rack, 3-21
constant sweep time exceeded, 3-29
Index
Index
loss of or missing option module, 3-18
PLC system fault table full, 3-29 program microcycle time exceeded, 3-29
reset of, addition of, or extra option module,
Diagnostic information, discrete I/O, 2-87
Discrete I/O diagnostic information, 2-87
E
End master control relay function, 12-17
ESCM Port Status (SVCREQ #39), 12-72
Ethernet global data
Ethernet global data sweep impact time, A-24
Exponential functions, 6-12 power of e, 6-12 power of X, 6-12
F
communications failure during store, 3-36
corrupted user program on power-up, 3-33
option module software failure, 3-27
PLC CPU hardware failure, 3-26
PLC CPU system software failure, 3-35
program block checksum failure, 3-28
Index-3
Index
Index-4
system configuration mismatch, 3-22
too many bus controllers, 3-36
Fault action, 3-12 diagnostic, 3-12 fatal, 3-12 fault response, 3-12
Fault explanation and correction, 3-1
accessing additional fault information, 3-15
addition of or extra rack, 3-21
communications failure during store, 3-36
constant sweep time exceeded, 3-29
corrupted user program on power-up, 3-33
fault category, 3-38 fault description, 3-38
forced and unforced circuit, 3-50
I/O fault table explanations, 3-38
interpreting fault tables, B-1
loss of or missing option module, 3-18
microcycle time exceeded, 3-29
no user program on power-up, 3-32
null system configuration for RUN mode, 3-34
option module software failure, 3-27
PLC CPU hardware failure, 3-26
PLC CPU system software failure, 3-35
PLC fault table explanations, 3-16
PLC system fault table full, 3-29
program block checksum failure, 3-28
program microcycle time exceeded, 3-29
reset of, addition of, or extra option module,
system configuration mismatch, 3-22
too many bus controllers, 3-36
window completion failure, 3-34
Fault handling, 3-10 alarm processor, 3-10
user-defined fault logging, 12-62
Fault locating references, 3-7
Fault references
configurable fault actions, 3-4
fault locating references, 3-7
Fault tables
interpreting fault tables, B-1
Faults
accessing additional fault information, 3-15
addition of or extra rack, 3-21
communications failure during store, 3-36
constant sweep time exceeded, 3-29
corrupted user program on power-up, 3-33
displaying user-defined faults, 3-13
explanation and correction, 3-1
Series 90™-70 PLC CPU Instruction Set Reference Manual–January 2000 GFK-0265J
GFK-0265J
Index
forced and unforced circuit, 3-50
I/O fault table explanations, 3-38
interpreting fault tables, B-1
loss of or missing option module, 3-18
microcycle time exceeded, 3-29
no user program on power-up, 3-32
null system configuration for RUN mode, 3-34
option module software failure, 3-27
PLC CPU hardware failure, 3-26
PLC CPU system software failure, 3-35
PLC fault table explanations, 3-16
PLC system fault table full, 3-29
program block checksum failure, 3-28
reset of, addition of, or extra option module,
system configuration mismatch, 3-22
system reaction to faults, 3-11
too many bus controllers, 3-36
user-defined, 2-23, 3-13, 12-62
window completion failure, 3-34
FIP I/O bus configuration, 2-85
FIP I/O sweep impact times
entering and displaying floating-point numbers,
errors in floating-point numbers and operations,
internal format of floating-point numbers, F-2
values of floating-point numbers, F-3
G
analog grouped block, 2-84 default conditions, 2-84
diagnostic data collection, 2-86
Genius I/O bus configuration, 2-83
Genius I/O sweep impact times
Global data
Global data communications, 2-85
Global data in microcycle mode, 2-64
Global data references (%G), 2-13
Greater than or equal to function, 7-2
H
I
I/O data mapping, 2-83 default conditions, 2-83
Index Index-5
Index
Index-6
interpreting fault tables, B-1
symbolic fault specific data, B-26
I/O interrupt performance and sweep impact,
I/O module sweep impact times
I/O system initialization, 2-75
I/O system, Series 90-70 PLC analog I/O diagnostic data, 2-87 discrete I/O diagnostic information, 2-87
I/O-triggered interrupt programs, 2-68, 2-69
Indirect references
register references, 2-11 the @ sign, 2-11
Informational faults, 3-4, 3-12
forced and unforced circuit, 3-50
no user program on power-up, 3-32
Instructions, programming, 4-1
Intelligent option module self-test completion,
Intelligent option modules, A-26 sweep impact times, A-26
Internal references (%M), 2-12
interrupt handling
standalone programs–I/O-triggered interrupts,
triggered interrupt blocks, 2-66
Inverse tangent function, 6-10
J
K
L
Less than or equal to function, 7-2
Local register references (%L), 2-11
Logarithmic functions, 6-12 base 10 logarithm, 6-12 natural logarithm, 6-12
LogiC-Driven Dynamic Ethernet Global Data
M
Mapping, I/O data, 2-83 default conditions, 2-83
Master control relay function, 12-16
Math functions
Series 90™-70 PLC CPU Instruction Set Reference Manual–January 2000 GFK-0265J
GFK-0265J
Index
Memory retention of data memory across power failure,
Memory type
Microcycle
program microcycle time exceeded fault, 3-29
Microcycle wind-down period, 2-72
N
Natural logarithm function, 6-12
Negative transition contact, 4-4
Non-configurable faults, 3-5, 3-31
Normal sweep mode
application program task execution, 2-4, 2-5
programmer communications window, 2-4, 2-6
system communications window, 2-4, 2-7
O
Operation of the PLC system, 2-1
Option module dual port interface tests, 2-74
Option module self-test completion, 2-74
Overhead sweep impact time
calculating predicted sweep times, A-31
FIP I/O sweep impact times
Genius I/O sweep impact times, A-18
I/O interrupt performance and sweep impact,
I/O module sweep impact times
I/O scan and I/O fault sweep impact, A-14
programmer sweep impact time, A-12
sweep impact of FIP I/O and FBCs, A-21
sweep impact of Genius I/O and GBCs, A-17
sweep impact of intelligent option modules,
sweep impact of Series 90-70 I/O modules,
P
parameterized subroutine block, 2-35
Parameterized subroutine block how parameterized subroutine blocks are called,
referencing formal parameters, 2-37
restrictions on formal parameters, 2-38
Performance
Periodic scheduling mode, 2-56
Index Index-7
Index
Index-8
interpreting fault tables, B-1
long/short indicator, B-2 rack, B-2 slot, B-2 spare, B-2
application program task execution, 2-5
programmer communications window, 2-6
system communications window, 2-7
Positive transition contact, 4-4
Power-down sequence, 2-72, 2-73, 2-75
I/O system initialization, 2-75
option module dual port interface tests, 2-74 option module self-test completion, 2-74
PLC memory validation, 2-73 power-up self-test, 2-73
examples of using program blocks, 2-30
Program blocks
Program organiation and user data
Program organization and user data
Program register references (%P), 2-11
Program structure
how parameterized subroutine blocks are called,
I/O-triggered interrupt programs, 2-68, 2-69
parameterized subroutine block, 2-35 program blocks and local data, 2-34, 2-35
triggered interrupt blocks, 2-66
user-defined function block, 2-35
Programmer communications window, 2-6
Programmer sweep impact time, A-12
Programming scheduling modes, 2-56, 2-57
Proportional Integral Derivative (PID), 12-88
Protection level request, 2-80
R
Radian conversion function, 6-14
%G references and CPU memory, 2-15
analog input register references (%AI), 2-11 analog output register references (%AQ), 2-11
associated transitions and overrides, 2-16
global data references (%G), 2-13
input references (%I), 2-12 internal references (%M), 2-12
local register references (%L), 2-11
program register references (%P), 2-11 register references, 2-11
system register references (%R), 2-11
system status references, 2-20
system status references (%S), 2-13
system status/fault references, 2-20
temporary references (%T), 2-12
global data references (%G), 2-13
input references (%I), 2-12 internal references (%M), 2-12
local register references (%L), 2-11
program register references (%P), 2-11
system register references (%R), 2-11
system status references (%S), 2-13
Series 90™-70 PLC CPU Instruction Set Reference Manual–January 2000 GFK-0265J
GFK-0265J
Index
temporary references (%T), 2-12
Relational functions
Relay functions
continuation coils, 4-12 continuation contacts, 4-12
fault contact, 4-7 high alarm contact, 4-7
negated coil, 4-8 negated retentive coil, 4-8
negative transition contact, 4-4
normally closed contact, 4-4 normally open contact, 4-4
positive transition contact, 4-4
retentive RESET coil, 4-11 retentive SET coil, 4-11
Retention of data memory across power failure,
Retentiveness of logic and data, 2-16
RLD v. standalone C programs, 2-47
S
I/O-triggered, 2-56 ordered, 2-56 periodic, 2-56 timed, 2-56
Search array move function, 10-17
Search greater than function, 10-21
Search greater than or equal function, 10-21
Search less than function, 10-21
Search less than or equal function, 10-21
Search not equal function, 10-21
Self-test
I/O system initialization, 2-75
option module dual port interface tests, 2-74 option module self-test completion, 2-74
Series 90-70 PLC I/O system, 2-82
analog I/O diagnostic data, 2-87 discrete I/O diagnostic information, 2-87
Service request function, 12-25
Standalone C programs, 2-27, 2-42
internal data, 2-42, 2-44, 2-45, 2-47
Standalone C v. RLD programs, 2-47
change background task window state and
Index Index-9
Index
Index-10
change programmer communications window
change system communications window (#4),
change/read checksum task state and number of
change/read constant sweep timer (#1), 12-28
change/read time-of-day clock (#7), 12-38
clear fault tables (#14), 12-48
disable/enable EXE block checksum (#25),
Logic Driven Dynamic Ethernet Global Data
mask/unmask I/O interrupt (#17), 12-54
mask/unmask timed interrupts (#22), 12-64
read elapsed time clock (#16), 12-53
read fault tables (#20), 12-58
read from reverse transfer area (#28), 12-69
read I/O override status (#18), 12-56
read last-logged fault table entry (#15), 12-49
read master checksum (#23), 12-65
read PLC run state (#12), 12-46
read window values (#2), 12-31
reset watchdog timer (#8), 12-42
set run enable/disable (#19), 12-57
shut down (stop) PLC (#13), 12-47
suspend I/O Interrupt (#32), 12-70
user-defined fault logging (#21), 12-62
write to reverse transfer area (#27), 12-69
Sweep impact
application program task execution, 2-5
programmer communications window, 2-6
system communications window, 2-7
System communications window, 2-7
System fault references, 3-3 hardware faults, 3-3 other faults, 3-3 software faults, 3-3
power-down sequence, 2-73, 2-75
power-down sequence with microcycle mode,
PSection 1: Basic PLC Sweep SummaryLC sweep summary retention of data memory across power failure,
Series 90-70 PLC I/O system, 2-82
System register references (%R), 2-11
System status references, 2-20
differences when used with standalone C
System status references (%S), 2-13, 2-20
System status/fault references, 2-20
T
Table range function, 7-6, 10-24
Temporary references (%T), 2-12
Time-of-day clock, 2-77, 12-38
using SVCREQ function #16 to read the clock,
using SVCREQ function #7 to read and set the
using SVCREQ function #8 to restart the
Triggered interrupt blocks, 2-66
accessing additional fault information, 3-15
I/O fault table explanations, 3-38
interpreting fault tables, B-1
PLC fault table explanations, 3-16
TroubleshootingFault category, 3-38
Series 90™-70 PLC CPU Instruction Set Reference Manual–January 2000 GFK-0265J
Index
U
associated transitions and overrides, 2-16
global data references (%G), 2-13
input references (%I), 2-12 internal references (%M), 2-12
local register references (%L), 2-11
program register references (%P), 2-11 register references, 2-11
system register references (%R), 2-11
system status references (%S), 2-13
system status/fault references, 2-20
temporary references (%T), 2-12
User-defined fault logging, 12-62
User-defined function block, 2-35
how parameterized subroutine blocks are called,
referencing formal parameters, 2-37
restrictions on formal parameters, 2-38
V
VME read configuration function, 9-34
VME read/modify/write function, 9-29
VME test and set function, 9-31
VME write configuration function, 9-37
W
using SVCREQ function #8 to restart the timer,
X
GFK-0265J Index Index-11
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Table of contents
- 23 Introduction
- 23 Software Architecture
- 23 Terminology Used in This Manual
- 23 Fault Handling
- 23 Hardware Configuration
- 23 Using This Manual
- 24 System Operation
- 24 Section 1: Basic PLC Sweep Summary
- 24 Basic PLC Sweep
- 24 Housekeeping
- 24 Input Scan
- 24 Application Program Task Execution (Logic Window)
- 24 Output Scan
- 24 Programmer Communications Window
- 24 System Communications Window
- 24 Background Window
- 24 Window Modes
- 24 Data Coherency in Communications Windows
- 24 CPU Sweep in STOP Mode
- 24 PLC Sweep Modes
- 24 Section 2: User Reference Data
- 24 User References
- 24 Indirect References
- 24 User Reference Size and Default
- 24 %G User References and CPU Memory Locations
- 24 Genius Global Data
- 24 Transitions and Overrides
- 24 Retentiveness of Logic and Data
- 24 Data Scope
- 24 Data Types
- 24 System Status References
- 24 Other References
- 24 Section 3: Program Organization
- 24 Ladder Logic Programming
- 24 Main Block
- 24 Blocks
- 24 Examples of Using Blocks
- 24 How Blocks Are Called
- 24 Parameterized Subroutine Blocks
- 24 Parameterized Subroutine Blocks and Local Data
- 24 How Parameterized Subroutine Blocks Are Called
- 70 Referencing Formal Parameters Within a Parameterized Subroutine Block
- 70 Restrictions on Formal Parameters within a Parameterized Subroutine Block
- 70 BIT Type Parameters in PSBs
- 70 External Blocks
- 70 How External Blocks Are Called
- 70 External Blocks and Local Data
- 70 Local Data Initialization
- 70 Standalone C Programs
- 70 Data Encapsulation
- 70 Input/Output Specifications
- 70 Standalone C Programs and Local Data
- 70 Local Data Initialization
- 70 Referencing I/O Specification Data Within a Standalone C Program
- 70 Data Coherency of I/O Specifications
- 70 Using LD vs. Standalone C Programs
- 70 Differences in Operation: LD and Standalone C Programs
- 70 Retentiveness of Data
- 70 Global Data
- 70 Interrupt Execution
- 70 Queuing of Interrupts
- 70 System Status References
- 70 Section 4: PLC Sweep Modes and Program Scheduling Modes
- 70 Normal Sweep Mode
- 70 Constant Sweep Mode
- 70 Constant Window Mode
- 70 Microcycle Sweep Mode
- 70 Microcycle Sweep Mode Output Scan Estimation
- 70 Output Scan Estimation for Pre-Release 7.00 CPUs
- 70 Output Scan Estimation for Release 7.00 and Later CPUs
- 70 Choosing PLC Sweep and Program Scheduling Modes
- 70 User Program Execution
- 70 User Program Priorities
- 70 Modes
- 70 User Program Execution in Microcycle Sweep Mode
- 70 Interrupt Handling
- 70 Interrupt Handling and Scheduling with Blocks
- 70 I/O Interrupt Blocks
- 70 Timed Interrupt Blocks
- 70 Interrupt Handling and Scheduling with User Programs
- 70 I/O-Triggered Programs
- 70 Timed Programs
- 70 Interrupt Blocks vs. Interrupt Programs
- 105 Section 5: Run/Stop Operations
- 105 Modes of Operation
- 105 Mode Transitions
- 105 Stop-to-Run Transition
- 105 Run-to-Stop Transition
- 105 Wind-Down Period for Microcycle Sweep Mode
- 105 Section 6: Power-Up and Power-Down Sequences
- 105 Power-Up
- 105 Power-Up Self-Test
- 105 PLC Memory Validation
- 105 System Configuration
- 105 Intelligent Option Module Self-Test Completion
- 105 Intelligent Option Module Dual Port Interface Tests
- 105 I/O System Initialization
- 105 Power-Down Sequence
- 105 Retention of Data Memory Across Power Failure
- 105 Section 7: Clocks and Timers
- 105 Elapsed Time Clock
- 105 Time-of-Day Clock
- 105 Watchdog Timer
- 105 Software Watchdog Timer
- 105 Hardware Watchdog Timer
- 105 Section 8: System Security
- 105 Passwords and Privilege Levels
- 105 Protection Level Request from Programmer
- 105 Disabling Passwords
- 105 OEM Protection
- 105 Write Protect Keyswitch
- 105 Section 9: Series 90-70 PLC I/O System
- 105 I/O Data Mapping
- 105 Default Conditions
- 105 Genius I/O
- 105 Genius I/O Bus Configuration
- 105 Genius I/O Data Mapping
- 105 Analog Grouped Block
- 105 Low-Level Analog Blocks
- 105 Default Conditions
- 105 Genius Global Data Communications
- 105 FIP I/O
- 105 FIP I/O Bus Configuration
- 105 FIP I/O Data Mapping
- 119 Default Conditions
- 119 Diagnostic Data Collection
- 119 Discrete I/O Diagnostic Information
- 119 Analog I/O Diagnostic Data
- 120 Fault Explanation and Correction
- 120 Section 1: System Handling of Faults (General)
- 120 System Fault References
- 120 Configurable Fault Actions
- 120 Non-Configurable Faults
- 120 Fault Contacts
- 120 Fault Locating References (Rack, Slot, Bus, Module)
- 120 Format of Fault References
- 120 Behavior of Fault References
- 120 Alarm Contacts
- 120 Point Faults
- 120 Section 2: Fault Handling
- 120 Alarm Processor
- 120 Classes of Faults
- 120 System Reaction to Faults
- 120 Fault Tables
- 120 Fault Action
- 120 Fault Response
- 120 PLC Fault Table
- 120 User-Defined Faults
- 120 I/O Fault Table
- 120 Accessing Additional Fault Information
- 120 Section 3: PLC Fault Table Explanations
- 120 Configurable Faults
- 120 Loss of or Missing Rack
- 120 Loss of or Missing Option Module
- 120 Addition of or Extra Rack
- 120 Reset of, Addition of, or Extra Option Module
- 120 System Configuration Mismatch
- 120 System Bus Error
- 120 PLC CPU Hardware Failure
- 120 Module Hardware Failure
- 120 Option Module Software Failure
- 120 Program or Block Checksum Failure
- 120 Low Battery Signal
- 120 Constant Sweep or Microcycle Time Exceeded
- 514 PLC System Fault Table Full
- 514 I/O Fault Table Full
- 514 Application Fault
- 514 Non-Configurable Faults
- 514 System Bus Failure
- 514 No User Program on Power-Up
- 514 Corrupted User Program on Power-Up
- 514 Window Completion Failure
- 514 Password Access Failure
- 514 Null System Configuration for Run Mode
- 514 PLC CPU System Software Failure
- 514 Too Many Bus Controllers
- 514 Communications Failure During Store
- 514 Run Mode Store Failure
- 514 Section 4: I/O Fault Table Explanations
- 514 Circuit Fault
- 514 Discrete Fault
- 514 Analog Fault
- 514 Low-Level Analog Fault
- 514 GENA Fault
- 514 Loss of IOC (I/O Controller)
- 514 Addition of IOC (I/O Controller)
- 514 Loss of I/O Module
- 514 Addition of I/O Module
- 514 Extra I/O Module
- 514 Loss of Block
- 514 Addition of Block
- 514 Extra Block
- 514 I/O Bus Fault
- 514 Module Fault
- 514 IOC (I/O Controller) Software Fault
- 514 IOC (I/O Controller) Hardware Failure
- 514 Forced and Unforced Circuit
- 514 Block Switch
- 515 Relay Functions
- 515 Using Contacts
- 515 Using Coils
- 515 Normally Open Contact
- 515 Normally Closed Contact