DNx-AI-248-230
—
User Manual
24-Channel Analog Input Layer
for the PowerDNA Cube, PowerDNR RACKtangle, and PowerDNF FLATRACK
Release 4.7
September 2014
PN Man-DNx-AI-248-230-914
© Copyright 1998-2014 United Electronic Industries, Inc. All rights reserved.
No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form
by any means, electronic, mechanical, by photocopying, recording, or otherwise without prior written
permission.
Information furnished in this manual is believed to be accurate and reliable. However, no responsibility
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from its use.
All product names listed are trademarks or trade names of their respective companies.
See the UEI website for complete terms and conditions of sale:
http://www.ueidaq.com/cms/terms-and-conditions/
Contacting United Electronic Industries
Mailing Address:
27 Renmar Avenue
Walpole, MA 02081
U.S.A.
For a list of our distributors and partners in the US and around the world, please see
http://www.ueidaq.com/partners/
Support:
Telephone:
Fax:
(508) 921-4600
(508) 668-2350
Also see the FAQs and online “Live Help” feature on our web site.
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Support:
Web-Site:
FTP Site:
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Product Disclaimer:
WARNING!
DO NOT USE PRODUCTS SOLD BY UNITED ELECTRONIC INDUSTRIES, INC. AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
Products sold by United Electronic Industries, Inc. are not authorized for use as critical components in
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Specifications in this document are subject to change without notice. Check with UEI for
current status.
DNA/DNR-AI-248-230 Analog Input Board
Contents
Table of Contents
Chapter 1 Introduction
.................................................... 1
1.1
Organization of Manual. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2
The AI-248-230 Interface Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.4
1.4.1
Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Characteristic Graphs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.5
Device Architecture. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.6
Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.7
Layer Connectors and Wiring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Chapter 2 Programming with the High Level API . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1
Creating a Session . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Configuring the Resource String. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3
Configuring for Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4
Configuring the Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.5
Read Data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.6
Cleaning-up the Session. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Chapter 3 Programming with the Low-level API . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
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Figures
List of Figures
1-1
1-2
1-3
A-1
Block Diagram of the AI-248 Layer ............................................................................... 5
The DNA-AI-248-230 Analog-Input Layer..................................................................... 6
Pinout Diagram of the AI-248-230 Layer ...................................................................... 6
Pinout and photo of DNA-STP-62 screw terminal panel............................................. 10
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DNA/DNR-AI-248-230 Analog Input Board
Chapter 1
Introduction
Chapter 1
Introduction
This document outlines the feature set and use of the DNR- and DNA-AI-248230 layer. The AI-248-230 is a four-channel strain gauge input module for the
PowerDNA I/O Cube (DNA-AI-248-230) and the PowerDNR HalfRACK,
RACKtangle, and the FlatRACK chassis (DNR-AI-248-230).
1.1
Organization
of Manual
© Copyright 2014
United Electronic Industries, Inc.
This AI-248-230 User Manual is organized as follows:
•
Introduction
This chapter provides an overview of DNx-AI-248-230 Analog Input
Board features, device architecture, connectivity, and logic.
•
Programming with the High-Level API
This chapter provides an overview of the how to create a session,
configure the session, and interpret results with the Framework API.
•
Programming with the Low-Level API
This chapter is an overview of low-level API commands for configuring
and using the AI-248-230 series layer.
•
Appendix A - Accessories
This appendix provides a list of accessories available for use with the
DNx-AI-248-230 board.
•
Index
This is an alphabetical listing of the topics covered in this manual.
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Chapter 1
Introduction
Manual Conventions
To help you get the most out of this manual and our products, please note that
we use the following conventions:
Tips are designed to highlight quick ways to get the job done or to reveal
good ideas you might not discover on your own.
NOTE: Notes alert you to important information.
CAUTION! Caution advises you of precautions to take to avoid injury, data loss,
and damage to your boards or a system crash.
Text formatted in bold typeface generally represents text that should be entered
verbatim. For instance, it can represent a command, as in the following
example: “You can instruct users how to run setup using a command such as
setup.exe.”
Text formatted in fixed typeface generally represents source code or other text
that should be entered verbadim into the source code, initialization, or other file.
Examples of Manual Conventions
Before plugging any I/O connector into the Cube or RACKtangle, be
sure to remove power from all field wiring. Failure to do so may
cause severe damage to the equipment.
Usage of Terms
Throughout this manual, the term “Cube” refers to either a PowerDNA Cube
product or to a PowerDNR RACKtangle rack mounted system, whichever is
applicable. The term DNR is a specific reference to the RACKtangle, DNA to the
PowerDNA I/O Cube, and DNx to refer to both.
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DNA/DNR-AI-248-230 Analog Input Board
Chapter 1
Introduction
1.2
The AI-248230 Interface
Board
The DNA/DNR/DNF-AI-248-230 are 24 channel differential analog input boards
for use in UEI’s Cube/RACKtangle/FLATRACK I/O chassis respectively. The
high channel count allows a single six slot “Cube” to monitor up to 144 analog
inputs in a single 4.0” by 4.1” by 5.8” package while the 12-slot RACKtangle
chassis monitors up to 288 channels in a 3U rack.
The -2 to +30 Volt input range makes the AI-248-230 an ideal measurement
solution in a host of automotive, aerospace and power generation applications
where most DAQ product’s 10 volts maximum input range cannot be used
without external signal conditioning. Programmable gains of between 1 and
1000 combined with the board’s 18-bit A/D converter provides resolution as low
as 0.25 microvolt.
The AI-248-230 provides sample rates as high as 250 samples per second on
each channel (6 k/s aggregate). Another great feature, the oversampling engine,
allows AI-248-230 to automatically acquire as many samples as possible for the
given gain/speed and average them, thus dramatically improving noise
immunity.
One of the most powerful features of the DNx-AI-248-230 is automated offset
compensation which can remove offset fluctuations over the temperature and/or
time. This allows reduction of the temperature drift to a few microvolts over the
full specified range.
The AI-248-230 offers 350 Vrms of isolation between itself and other I/O boards
as well as between the I/O connections and the chassis. Like all UEI “Cube”
compatible I/O boards, the AI-248 offers operation in extreme environments and
has been tested to 5g vibration, 100g shock, from -40 to +85 °C temperatures
and at altitudes up to 70,000 feet.
The board is supported by a variety of cable and screw terminal options certain
to meet the needs of almost all users. For those wishing to create their own
cables, all connections are through a standard 62-pin “D” connector allowing
OEM users to build custom cabling systems with standard, readily available
components.
The AI-248-230 is supported by a complete software “suite” including support for
Windows, Linux and all popular RTOS. Windows support is provided by the
UEIDAQ Framework which includes a simple and complete software interface to
all popular Windows programming languages and DAQ applications including
LabVIEW, MATLAB and DasyLAB. An extensive factory written software suite is
also provided for all popular “non-Windows” operating systems including Linux,
VXworks, QNX, RTX, INtime and more. All software support includes extensive
example programs that make it easy to cut-and-paste the I/O software into your
applications.
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DNA/DNR-AI-248-230 Analog Input Board
Chapter 1
Introduction
1.3
1.4
Features
Specification
The AI-248-230 layer has the following features:
•
24 differential analog input channels
•
Maximum sampling rate of 250 Hz per channel
•
18-bit resolution
•
Wide input range:
• -2 V to +32 V full scale inputs at Gain=1
• -0.002V to 0.032V at Gain=1000 unipolar
• ±32V referenced differential (-4/+34V common signal mode range)
•
Dynamic autozero support
•
Embedded averaging engine
•
UEI Framework Software API may be used with all popular Windows
programming languages and most real time operating systems such as
RT Linux, RTX, or QNX and graphical applications such as LabVIEW,
MATLAB, DASYLab and any application supporting ActiveX or OPC
The technical specification for the DNx-AI-248-230 board are listed in Table 1-1.
Table 1-1. DNx-AI-248-230 Technical Specifications
Analog Inputs
Number of channels
Input configuration
ADC resolution
Sampling rate
Input Ranges
Gains
Minimum resolution
Input bias current
Input impedance
Common mode rejection
Power supply rejection
Accuracy (25 °C)
Gain = 1
Gain = 10
Gain = 100
Gain = 1000
Thermocouple (Type/Acc)
Isolation
Overvoltage protection
General Specifications
Operating temperature
Vibration IEC 60068-2-6
IEC 60068-2-64
Shock IEC 60068-2-27
Humidity
Power consumption
MTBF
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24 fully differential inputs plus
1 single-ended dedicated CJC channel
Multiplexed
18 bits
250 samples/s per channel, maximum
(6 kS/s aggregate)
-2 Volt to + 32 Volt (G=1)
1, 10, 100 or 1000
0.25 μV (Gain = 1000)
±5 nA max, ±0.5 nA typical
10MΩ
100 dB typical
> 120 dB
± 1.47 mV
± 0.293 mV
± 68 μV
± 37 μV
K / ±1.25 °C, J / ±1.9 °C, T / ±1.9 °C
(using DNA-STP-AI-U for CJC measurement)
350 Vrms
-40V to +55V
tested -40 °C to +85 °C
5 g, 10-500 Hz, sinusoidal
5 g (rms), 10-500 Hz, broad-band random
100 g, 3 ms half sine, 18 shocks @ 6 orientations
30 g, 11 ms half sine, 18 shocks @ 6 orientations
0 to 95%, non-condensing
2.0 W max
540,000 hours
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Chapter 1
Introduction
1.4.1
Characteristic The following chart shows the thermocouple accuracy statistic over the -0.002 to
0.032V range at 1000x gain which represents a range of 800°C. The Type K
Graphs
thermocouple is wired into a DNA-STP-AI-U terminal panel connected to the
DNR-AI-248-230 analog input board (see Appendix for terminal panel).
1.5
Device
Architecture
Figure 1-1 is a block diagram of the architecture of the AI-248 layer.
External Trigger
CJC In
Calibration
Isolation
Control
Logic
-
18-bit
A/D
Optical
AIn 23-
PGA
Control
Logic
AIn 23+
+
Buffers
...
MULTIPLEXER
Analog Input Connector
Internal Reference
AIn 0-
32-bit 66-MHz bus
DC/DC
Internal Ground
AIn 0+
Sync. Lines
Reference
Figure 1-1. Block Diagram of the AI-248 Layer
The analog measurement voltages from each channel, as shown in Figure 1-1,
are fed through input multiplexers to a programmable gain amplifier, buffered,
then passed to the A/D converter. The A/D converter is a successive approximation 18-bit device, which also performs signal averaging for further noise reduction. The result is then processed and buffered in the control logic and provided
across the 32-bit PowerDNx bus to the CPU layer to be transmitted over the network to the host in the normal manner.
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DNA/DNR-AI-248-230 Analog Input Board
Chapter 1
Introduction
1.6
Indicators
A photo of the DNx-AI-248-230 unit is illustrated below.
The front panel has two LED indicators:
•
RDY: indicates that the layer is receiving power and operational.
•
STS: can be set by the user using the low-level framework.
DNR bus
connector
RDY LED
STS LED
DB-62 (female)
62-pin I/O connector
Figure 1-2. The DNA-AI-248-230 Analog-Input Layer
1.7
Layer
Connectors
and Wiring
Figure 1-3 below illustrates the pinout of the AI-248-230. The pinout is pincompatible with the AI-225 and can be used with the DNA-STP-AI-U.
SHIELD
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
Signal
Rsvd
DIO 1
Rsvd
CJC In
AIN 22AIN 21+
AIN 19AIN 18+
AIN 16AIN 15+
AIN 13AIN 12+
AIN 10AIN 9+
AIN 7AIN 6+
AIN 4AIN 3+
AIN 1AIN 0+
Rsvd
Pin
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
Signal
Rsvd
Gnd
Gnd
CJC Ret
AIN 23+
AIN 21AIN 20+
AIN 18AIN 17+
AIN 15AIN 14+
AIN 12AIN 11+
AIN 9AIN 8+
AIN 6AIN 5+
AIN 3AIN 2+
AIN 0Rsvd
Pin
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
Signal
Gnd
DIO 2
Gnd
AIN 23AIN 22+
AIN 20AIN 19+
AIN 17AIN 16+
AIN 14AIN 13+
AIN 11AIN 10+
AIN 8AIN 7+
AIN 5AIN 4+
AIN 2AIN 1+
DIO 0
Figure 1-3. Pinout Diagram of the AI-248-230 Layer
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DNA/DNR-AI-248-230 Analog Input Board
Chapter 2
Programming with the High Level API
Chapter 2
Programming with the High Level API
This section describes how to control the DNx-AI-248-230 using the UeiDaq
Framework High Level API.
UeiDaq Framework is object oriented and its objects can be manipulated in the
same manner from different development environments such as Visual C++,
Visual Basic or LabVIEW.
The following section focuses on the C++ API, but the concept is the same no
matter what programming language you use.
Please refer to the “UeiDaq Framework User Manual” for more information on
use of other programming languages.
2.1
Creating a
Session
The Session object controls all operations on your PowerDNx device. Therefore,
the first task is to create a session object:
// create a session object for input
CUeiSession aiSession;
2.2
Configuring
UeiDaq Framework uses resource strings to select which device, subsystem
the Resource and channels to use within a session. The resource string syntax is similar to a
web URL:
String
<device class>://<IP address>/<Device Id>/<Subsystem><Channel list>
For PowerDNA and RACKtangle, the device class is pdna.
For example, the following resource string selects analog input lines 0,1,2,3 on
device 1 at IP address 192.168.100.2: “pdna://192.168.100.2/Dev1/Ai0:3” as a
range, or as a list “pdna://192.168.100.2/Dev1/Ai0,1,2,3”.
2.3
Configuring
for Input
The AI-248-230 can be configured for strain gauge input.
The gain to be applied on each channel is specified with low and high input limits.
For example, the AI-248 available gains are 1, 10, 100, 1000 and the maximum
input range is -2V to 30V differential span.
To select a gain of 1, you must specify input limits of [-2V, 30V]:
// Configure channels 0,1 to use gain 128 in differential mode
aiSession.CreateAIChannel(“pdna://192.168.100.2/Dev0/Ai0,1”,
-2,
30,
UeiAIChannelInputModeDifferential);
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DNA/DNR-AI-248-230 Analog Input Board
Chapter 2
Programming with the High Level API
Be mindful of your gain setting. Note that when reading any of the channels, that
saturation or clipping can occur if the gain is too high, making the value appear
stuck at the highest or lowest value. Try a lower gain value, or begin with one.
2.4
Configuring
the Timing
You can configure the AI-248-230 to run in simple mode (point by point) or highthroughput buffered mode (ACB mode), or high-responsiveness (DMAP) mode.
In simple mode, the delay between samples is determined by software on the
host computer. In DMAP mode, the delay between samples is determined by the
AI-248-230 on-board clock and data is transferred one scan at a time between
PowerDNA and the host PC. In buffered mode, the delay between samples is
determined by the AI-248-230 on-board clock and data is transferred in blocks
between PowerDNA and the host PC.
The following sample shows how to configure the simple mode. Please refer to
the “UeiDaq Framework User’s Manual” to learn how to use other timing modes.
// configure timing of input for point-by-point (simple mode)
aiSession.ConfigureTimingForSimpleIO();
2.5
Read Data
Reading data is done using reader object(s). The following sample code shows
how to create a scaled reader object and read samples.
// create a reader and link it to the analog-input session’s stream
CUeiAnalogScaledReader aiReader(aiSession.GetDataStream());
// the buffer must be big enough to contain one value per channel
double data[2];
// read one scan, where the buffer will contain one value per channel
aiReader.ReadSingleScan(data);
2.6
Cleaning-up
the Session
The session object will clean itself up when it goes out of scope or when it is
destroyed. To reuse the object with a different set of channels or parameters,
you can manually clean up the session as follows:
// clean up the session
aiSession.CleanUp();
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DNA/DNR-AI-248-230 Analog Input Board
Chapter 3
Programming with the Low-level API
Chapter 3
Programming with the Low-level API
The PowerDNA cube and PowerDNR RACKtangle and HalfRACK can be programmed using the low-level API. The low-level API offers direct access to PowerDNA DAQBios protocol and also allows you to access device registers
directly.
However, we recommend that, when possible, you use the UeiDaq Framework
High-Level API (see Chapter 2), because it is easier to use. You should need to
use the low-level API only if you are using an operating system other than Windows.
For additional information about low-level programming of the AI-248-230,
please refer to the PowerDNA API Reference Manual document under:
Start » Programs » UEI » PowerDNA » Documentation
Refer to the PowerDNA API Reference Manual on how to use the following lowlevel functions of AI-248-230, as well as others related to cube operation:
Function
Description
DqAdv248Read
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Returns continously sampled data from input channel.
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DNA/DNR-AI-248-230 Analog Input Board
Appendix A
Appendix A
A. Accessories
The following cables and STP boards are available for the AI-248-230 layer.
DNA-CBL-62
This is a 62-conductor round shielded cable with 62-pin male D-sub connectors
on both ends. It is made with round, heavy-shielded cable; 2.5 ft (75 cm) long,
weight of 9.49 ounces or 269 grams; up to 10ft (305cm) and 20ft (610cm).
DNA-STP-62
The STP-62 is a Screw Terminal Panel with three 20-position terminal blocks
(JT1, JT2, and JT3) plus one 3-position terminal block (J2). The dimensions of
the STP-62 board are 4w x 3.8d x1.2h inch or 10.2 x 9.7 x 3 cm (with standoffs).
The weight of the STP-62 board is 3.89 ounces or 110 grams.
DB-62 (female)
62-pin connector:
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
UP+
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
UP+
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
JT3 — 20-position
terminal block:
UP+
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
UP+5
44
4
47
GND
JT2 — 20-position
terminal block:
7
JT1 — 20-position
terminal block:
J2 — 5-position
terminal block:
5
4
3
2
1
4)*&-%
(/%
SHIELD
to J2
to JT1
to JT2
to JT3
Figure A-1. Pinout and photo of DNA-STP-62 screw terminal panel
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DNA/DNR-AI-248-230 Analog Input Board
Appendix A
DNA-STP-AI-U
The STP-AI-U is a Screw Terminal Panel with built-in cold-junction compensation (CJC) designed to connect to the AI-248 with the DNA-CBL-62 cable.
Unlike most conventional STP panels, the DNA-STP-AI-U uses a 4-layer PCB
design which ensures the highest quality low-level analog signals. This terminal
panel features per-channel jumper-selectable configuration including voltage
RTD (resistance temperature device) excitation, 10MΩ or 10kΩ pull-down resistors, as well as 10MΩ pull-up resistors to 1/101 of the power supply rail. In addition to that, all input signals may be filtered with the simple RC (22.1Ω / 0.1μF)
filter. The terminal also incorporates an isothermal block and calibratable CJC
(cold-junction compensation) sensor mounted directly on the panel. For the precision sensors and RTD devices, the panel offers 3ppm/°C stable 5.000V reference with calibration range ±0.2%.
62-pin connector:
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
© Copyright 2014
United Electronic Industries, Inc.
DIO0
AIN-P1
AIN-N2
AIN-P4
AIN-N5
AIN-P7
AIN-N8
AIN-P10
AIN-N11
AIN-P13
AIN-N14
AIN-P16
AIN-N17
AIN-P19
AIN-N20
AIN-P22
AIN-N23
AGND
DIO2
DIN0
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
AGND
AIN-N0
AIN-P2
AIN-N3
AIN-P5
AIN-N6
AIN-P8
AIN-N9
AIN-P11
AIN-N12
AIN-P14
AIN-N15
AIN-P17
AIN-N18
AIN-P20
AIN-N21
AIN-P23
AIN-N24
AGND
DIN2
DIN1
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
+VA9
AIN-P0
AIN-N1
AIN-P3
AIN-N4
AIN-P6
AIN-N7
AIN-P9
AIN-N10
AIN-P12
AIN-N13
AIN-P15
AIN-N16
AIN-P18
AIN-N19
AIN-P21
AIN-N22
AIN-P24
+VA9
DIO1
DIN3
Tel: 508-921-4600
Date: September 2014
www.ueidaq.com
Vers: 4.7
DNx-AI-248 AppxA.fm
11
DNA/DNR-AI-248-230 Analog Input Board
Index
B
Block Diagram
O
5
Organization
C
Cable(s) 10
Configuring the Resource String
Connectors and Wiring 6
Conventions 2
Creating a Session 7
H
High Level API
7
Screw Terminal Panels 10
Setting Operating Parameters 4
Specifications 4
Support ii
Support email
support@ueidaq.com ii
Support FTP Site
ftp
//ftp.ueidaq.com ii
Jumper Settings
Low-level API
S
7
J
L
1
Support Web Site
www.ueidaq.com
4
ii
9
© Copyright
© 2014
Copyright 2014
United Electronic
United Electronic
Industries,Industries,
Inc.
Inc.
Tel: 508-921-4600
Date: September 2014
www.ueidaq.com
Vers: 4.7
DNx-AI-248-ManualIX.fm
12