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S i 5 3 4 5 - E V B
S i 5 3 4 5 E
V A L U A T I O N
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Description EVB Features
The Si5345-EVB is used for evaluating the Si5345
Any-Frequency, Any-Output, Jitter-Attenuating Clock
Multiplier. The Si5345 combines 4th generation DSPLL and Multisynth
technologies to enable any-frequency clock generation for applications that required the highest level of jitter performance. The Si5345-EVB has
4 independent input clocks and 10 independent output clocks. The Si5345-EVB can be controlled and configured using the Clock Builder Pro
(CB Pro
) software tool.
Powered from USB port or external power supply.
Onboard 48 MHz XTAL or Reference SMA Inputs allow holdover mode of operation on the Si5345.
CBPro
GUI programmable V
DD
supply allows device to operate from 3.3, 2.5, or 1.8 V.
CBPro GUI programmable V
DDO
supplies allow each of the 10 outputs to have its own power supply voltage selectable from 3.3, 2.5, or 1.8 V.
CBPro GUI-controlled voltage, current, and power measurements of V
DD
and all V
DDO
supplies.
Status LEDs for power supplies and control/status signals of Si5345.
SMA connectors for input clocks, output clocks, and optional external timing reference clock.
Rev. 1.1 5/15
Figure 1. Si5345 Evaluation Board
Copyright © 2015 by Silicon Labs Si5345-EVB
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1. Functional Block Diagram
Below is a functional block diagram of the Si5345-EVB. This EVB can be connected to a PC via the main USB
ClockBuilderPro Applications” for more information.
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Figure 2. Si5345-EVB Functional Block Diagram
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2. Si5345-EVB Support Documentation and ClockBuilderPro
Software
All Si5345 schematics, BOMs, User’s Guides, and software can be found online at the following link: http://www.silabs.com/products/clocksoscillators/pages/si538x-4x-evb.aspx
3. Quick Start
1. Install ClockBuilderPro desktop software from http://www.silabs.com/CBPro .
2. Connect a USB cable from Si5345-EVB to the PC where the software was installed.
3. Leave the jumpers as installed from the factory, and launch the ClockBuilderPro software.
4. You can use ClockBuilderPro to create, download, and run a frequency plan on the Si5345-EVB.
5. For the Si5345 data sheet, go to http://www.silabs.com/timing .
4. Jumper Defaults
Si5345 EVB Jumper Defaults
I = Installed
Location Type Location Type
JP1 2 pin
0 = Open
O JP23 2 pin
2 pin
2 pin
2 pin
3 pin
3 pin
2 pin
2 pin
2 pin
2 pin
2 pin
2 pin
2 pin
2 pin
2 pin
2 pin
2 pin
2 pin
2 pin
2 pin
JP10
JP13
JP14
JP15
JP16
JP17
JP18
JP19
JP2
JP3
JP4
JP5
JP6
JP7
JP8
JP9
JP20
JP21
JP22
I
O
I
1 to 2
1 to 2
O
O
O
O
O
O
O
O
I
I
I
I
I
O
JP32
JP33
JP34
JP35
JP36
JP38
JP39
JP40
JP41
JP24
JP25
JP26
JP27
JP28
JP29
JP30
JP31
J36
5x2 Hdr
2 pin
2 pin
2 pin
2 pin
2 pin
3 pin
2 pin
2 pin
2 pin
2 pin
2 pin
2 pin
2 pin
2 pin
2 pin
2 pin
2 pin
I = Installed
0 = Open
O
O
O
O
O
O all open
O
O
O
O
O
O
O
O
O
O
O
All 5 installed
Refer to the Si5345 EVB schematics for the functionality associated with each jumper.
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5. Status LEDs
Si5345 EVB Status LEDs
Location Silkscreen Color Status Function Indication
D27
D22
D26
D25
D21
D24
5VUSBMAIN Blue
3P3V Blue
VDD DUT
INTR
READY
BUSY
Blue
Red
Main USB +5 V present
DUT +3.3 V is present
DUT VDD voltage present
MCU INTR (Interrupt) active
Green MCU Ready
Green MCU Busy
D27, D22, and D26 are illuminated when USB +5 V, Si5345 +3.3 V, and Si5345 V are present. D25, D21, and D24 are status LEDs showing on-board MCU activity.
DD
supply voltages, respectively,
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Figure 3. Status LEDs
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6. External Reference Input (XA/XB)
An external reference (XTAL) is used in combination with the internal oscillator to produce an ultra-low jitter reference clock for the DSPLL and for providing a stable reference for the free-run and holdover modes. The
Si5345-EVB can also accommodate an external reference clock instead of a crystal. To evaluate the device with a
be supplied to J39 and J40.
Figure 4. External Reference Input Circuit
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7. Clock Input Circuits (INx/INxB)
The Si5345-EVB has eight SMA connectors (IN0, IN0B–IN3, IN3B) for receiving external clock signals. All input
represents 4 differential input clock pairs. Single-ended clocks can be used by appropriately driving one side of the differential pair with a single-ended clock. For details on how to configure inputs as single-ended, please refer to the Si5345 data sheet.
Figure 5. Input Clock Termination Circuit
8. Clock Output Circuits (OUTx/OUTxB)
Each of the twenty output drivers (10 differential pairs) is AC coupled to its respective SMA connector. The output
required, the AC coupling capacitors can be replaced with a resistor of appropriate value. The Si5345-EVB provides pads for optional output termination resistors and/or low frequency capacitors. Note that components with schematic “NI” designation are not normally populated on the Si5345-EVB and provide locations on the PCB for optional DC/AC terminations by the end user.
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Figure 6. Output Clock Termination Circuit
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9. Installing ClockBuilderPro (CBPro) Desktop Software
To install the CBOPro software on any Windows 7 (or above) PC:
Go to http://www.silabs.com/CBPro and download ClockBuilderPro software.
Installation instructions and User’s Guide for ClockBuilderPro can be found at the download link shown above.
Please follow the instructions as indicated.
10. Using the Si5345 EVB
10.1. Connecting the EVB to Your Host PC
Once ClockBuilderPro software is installed, connect to the EVB with a USB cable as shown below.
Figure 7. EVB Connection Diagram
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10.2. Additional Power Supplies
Although additional power (besides the power supplied by the host PC’s USB port) is not needed for most configurations, two additional +5 VDC power supplies (MAIN and AUX) can be connected to J33 and J34 (located on the bottom of the board, near the USB connector). Refer to the Si5345-EVB schematic for details.
The Si5345-EB comes pre-configured with jumpers installed at JP15 and JP16 (pins 1-2 in both cases) in order to select “USB”. These jumpers, together with the components installed, configure the evaluation board to obtain all
+5 V power solely through the main USB connector at J37. This setup is the default configuration and should normally be sufficient.
Figure 8. JP15-JP16 Standard Jumper Shunt Installation
Errata Note:
Some early versions of the 64-pin Si534x-EVBs may have the silkscreen text at JP15-JP16 reversed regarding
EXT and USB, i.e., USB EXT instead of EXT USB. Regardless, the correct installation of the jumper shunts for
default or standard operation is on the right hand side as read and viewed in Figure 8.
The general guidelines for single USB power supply operation are listed below:
Use either a USB 3.0 or USB 2.0 port. These ports are specified to supply 900 mA and 500 mA respectively at +5 V.
If you are working with a USB 2.0 port and you are current limited, turn off enough DUT output voltage regulators to drop the total DUT current ≤ 470 mA. (Note: USB 2.0 ports may supply > 500 mA. Provided the nominal +5 V drops gracefully by less than 10%, the EVB will still work.)
If you are working with a USB 2.0 and you are current limited and need all output clock drivers enabled, re-configure the EVB to drive the DUT output voltage regulators from an external +5 V power supply as follows:
Connect external +5 V power supply to terminal block J33 on the back side of the PCB.
Move the jumper at JP15 from pins 1-2 USB to pins 2-3 EXT.
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10.3. Overview of ClockBuilderPro
Applications
The ClockBuilderPro installer will install two main applications:
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Figure 9. Application #1: ClockbuilderPro Wizard
Use the CBPro Wizard to:
Create a new design
Review or edit an existing design
Export: create in-system programming
Figure 10. Application #2: EVB GUI
Use the EVB GUI to:
Download configuration to EVB’s DUT (Si5345)
Control the EVB’s regulators
Monitor voltage, current, power on the EVB
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10.4. Common ClockBuilderPro Work Flow Scenarios
There are three common workflow scenarios when using CBPro and the Si5345 EVB. These workflow scenarios are:
Workflow Scenario #1: Testing a Silicon Labs-Created Default Configuration
Workflow Scenario #2: Modifying the Default Silicon Labs-Created Device Configuration
Workflow Scenario #3: Testing a User-Created Device Configuration
Each is described in more detail in the following sections.
10.5. Workflow Scenario #1: Testing a Silicon Labs-Created Default Configuration
The flow for using the EVB GUI to initialize and control a device on the EVB is as follows.
Once the PC and EVB are connected, launch ClockBuilder Pro by clicking on this icon on your PC’s desktop.
Figure 11. ClockBuilderPro Desktop Icon
If an EVB is detected, click on the “Open Default Plan” button on the Wizard’s main menu. CBPro automatically detects the EVB and device type.
Figure 12. Open Default Plan
Once you open the default plan (based on your EVB model number), a popup will appear.
Figure 13. Write Design to EVB Dialog
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Select “Yes” to write the default plan to the Si5345 device mounted on your EVB. This ensures the device is completely reconfigured per the Silicon Labs default plan for the DUT type mounted on the EVB.
Figure 14. Writing Design Status
After CBPro writes the default plan to the EVB, click on “Open EVB GUI” as shown below.
Figure 15. Open EVB GUI
The EVB GUI will appear. Note all power supplies will be set to the values defined in the device’s default CBPro project file created by Silicon Labs, as shown below.
Figure 16. EVB GUI Window
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10.5.1. Verify Free-Run Mode Operation
Assuming no external clocks have been connected to the INPUT CLOCK differential SMA connectors (labeled
“INx/INxB”) located around the perimeter of the EVB, the DUT should now be operating in free-run mode, as the
DUT will be locked to the crystal in this case.
You can run a quick check to determine if the device is powered up and generating output clocks (and consuming power) by clicking on the Read All button highlighted above and then reviewing the voltage, current and power readings for each VDDx supply.
Note: Shutting “Off” then “On” of the VDD and VDDA supplies will power-down and reset the DUT. Every time you do this, to reload the Silicon Labs-created default plan into the DUT’s register space, you must go back to the Wizard’s main menu and select “Write Design to EVB”:
Figure 17. Write Design to EVB
Failure to do the step above will cause the device to read in a pre-programmed plan from its non-volatile memory (NVM). However, the plan loaded from the NVM may not be the latest plan recommended by
Silicon Labs for evaluation.
At this point, you should verify the presence and frequencies of the output clocks (running to free-run mode from the crystal) using appropriate external instrumentation connected to the output clock SMA connectors. To verify the output clocks are toggling at the correct frequency and signal format, click on View Design Report as highlighted below.
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Figure 18. View Design Report
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Your configuration’s design report will appear in a new window, as shown below. Compare the observed output clocks to the frequencies and formats noted in your default project’s Design Report.
Figure 19. Design Report Window
10.5.2. Verify Locked Mode Operation
Assuming you connect the correct input clocks to the EVB (as noted in the Design Report shown above), the DUT on your EVB will be running in “locked” mode.
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10.6. Workflow Scenario #2: Modifying the Default Silicon Labs-Created Device
Configuration
To modify the “default” configuration using the CBPro Wizard, click on Edit Configuration with Wizard:
Figure 20. Edit Configuration with Wizard
You will now be taken to the Wizard’s step-by-step menus to allow you to change any of the default plan’s operating configurations.
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Figure 21. Design Wizard
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Note you can click on the icon on the lower left hand corner of the menu to confirm if your frequency plan is valid.
After making your desired changes, you can click on Write to EVB to update the DUT to reconfigure your device real-time. The Design Write status window will appear each time you make a change.
Figure 22. Writing Design Status
10.7. Workflow Scenario #3: Testing a User-Created Device Configuration
To test a previously created user configuration, open the CBPro Wizard by clicking on the icon on your desktop and then selecting Open Design Project File.
Figure 23. Open Design Project File
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Locate your CBPro design file (*.slabtimeproj or *.sitproj file).design file in the Windows file browser.
Figure 24. Browse to Project File
Select Yes when the WRITE DESIGN to EVB popup appears:
Figure 25. Write Design to EVB Dialog
The progress bar will be launched. Once the new design project file has been written to the device, verify the presence and frequencies of your output clocks and other operating configurations using external instrumentation.
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10.8. Exporting the Register Map File for Device Programming by a Host Processor
You can also export your configuration to a file format suitable for in-system programming by selecting Export as shown below:
Figure 26. Export Register Map File
You can now write your device’s complete configuration to file formats suitable for in-system programming.
Figure 27. Export Settings
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11. Writing a New Frequency Plan or Device Configuration to Non-Volatile
Memory (OTP)
Note:
Writing to the device non-volatile memory (OTP) is NOT the same as writing a configuration into the Si5345 using
ClockBuilderPro on the Si5345 EVB. Writing a configuration into the EVB from ClockBuilderPro is done using Si5345
RAM space and can be done virtually unlimited numbers of times. Writing to OTP is limited as described below.
Refer to the Si534x/8x Family Reference Manuals and device data sheets for information on how to write a configuration to the EVB DUT’s non-volatile memory (OTP). The OTP can be programmed a maximum of two times only. Care must be taken to ensure the configuration desired is valid when choosing to write to OTP.
12. Si5345-EVB Schematic, Layout, and Bill of Materials (BOM)
The Si5345 EVB Schematic, Layout, and Bill of Materials (BOM) can be found online at: http://www.silabs.com/products/clocksoscillators/pages/si538x-4x-evb.aspx
Note:
Please be aware that the Si5345-EVB schematic is in OrCad Capture hierarchical format and not in a typical “flat” schematic format.
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