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DNA/DNR-DIO-449 — User Manual High Voltage 48-Channel Digital Input Layer with Analog Readback and Guardian functionality for the PowerDNA Cube and PowerDNR RACKtangle Release 4.6 May 2014 PN Man-DNx-DIO-449-514 © Copyright 1998-2014 United Electronic Industries, Inc. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form by any means, electronic, mechanical, by photocopying, recording, or otherwise without prior written permission. Information furnished in this manual is believed to be accurate and reliable. However, no responsibility is assumed for its use, or for any infringement of patents or other rights of third parties that may result from its use. All product names listed are trademarks or trade names of their respective companies. See the UEI website for complete terms and conditions of sale: http://www.ueidaq.com/cms/terms-and-conditions/ Contacting United Electronic Industries Mailing Address: 27 Renmar Avenue Walpole, MA 02081 U.S.A. For a list of our distributors and partners in the US and around the world, please see http://www.ueidaq.com/partners/ Support: Telephone: Fax: (508) 921-4600 (508) 668-2350 Also see the FAQs and online “Live Help” feature on our web site. Internet Support: Support: Web-Site: FTP Site: [email protected] www.ueidaq.com ftp://ftp.ueidaq.com Product Disclaimer: WARNING! DO NOT USE PRODUCTS SOLD BY UNITED ELECTRONIC INDUSTRIES, INC. AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS. Products sold by United Electronic Industries, Inc. are not authorized for use as critical components in life support devices or systems. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Any attempt to purchase any United Electronic Industries, Inc. product for that purpose is null and void and United Electronic Industries Inc. accepts no liability whatsoever in contract, tort, or otherwise whether or not resulting from our or our employees' negligence or failure to detect an improper purchase. Specifications in this document are subject to change without notice. Check with UEI for current status. Guardian-series DNA/DNR-DIO-449 Electromechanical Relay Layer Contents Table of Contents Chapter 1 Introduction .................................................... 1 1.1 Organization of Manual. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.2 Manual Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1.3 The DIO-449 Layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.4 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.5 Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.6 Device Architecture. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.7 Gain Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.8 1.8.1 Layer Connectors and Wiring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.9 1.9.1 1.9.2 PowerDNA Explorer for the DIO-449 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Initialization Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Immediate Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Chapter 2 Programming with the High Level API . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1 Creating a Session . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2 Configuring the Resource String. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.3 Configuring for Digital I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.4 Configuring the Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.5 Reading Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.6 Cleaning-up the Session. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Chapter 3 Programming with the Low Level API . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 © Copyright 2014 United Electronic Industries, Inc. Tel: 508-921-4600 Date: May 2014 www.ueidaq.com Vers: 4.6 DNx-DIO-449-ManualTOC.fm iii Guardian-series DNA/DNR-DIO-449 Electromechanical Relay Layer Figures List of Figures 1-1 1-2 1-3 1-4 1-5 1-6 A-1 Architecture Block Diagram of DNA-DIO-449 ............................................................... 4 Abstracted single Channel Diagram for DIO-449.......................................................... 5 DB-62 I/O Connector Pinout for DIO-449 ..................................................................... 6 Photo of DIO-449 Digital Input Layer ............................................................................ 7 PowerDNA Explorer DIO-449 Immediate Pane ............................................................ 8 PowerDNA Explorer DIO-449 Immediate Pane ............................................................ 9 Pinout and photo of DNA-STP-62 screw terminal panel............................................. 15 © Copyright 2014 United Electronic Industries, Inc. Tel: 508-921-4600 Date: May 2014 www.ueidaq.com Vers: 4.6 DNx-DIO-449-ManualLOF.fm iv Guardian-series DNA/DNR-DIO-449 Layer Chapter 1 Introduction Chapter 1 Introduction This document outlines the feature-set and use of the DIO-449 layer. This layer is an high-voltage digital input interface module for the PowerDNA I/O Cube and RACKtangle. 1.1 Organization of Manual © Copyright 2014 United Electronic Industries, Inc. This DIO-449 User Manual is organized as follows: • Introduction This section provides an overview of DIO-449 high-voltage digital input board features, the various models available and what you need to get started. • The Guardian-series DNA/DNR-DIO-449 Layer This chapter provides an overview of the device architecture, connectivity, and logic of the DIO-449 layer. • Programming with the High-Level API This chapter provides an overview of the how to create a session, configure the session, and interpret results on the DIO-449 series layer. • Programming with the Low-Level API Low-level API commands for configuring and using the DIO-449 series layer. • Appendix A - Accessories This appendix provides a list of accessories available for use with the DIO-449 layer. • Index This is an alphabetical listing of the topics covered in this manual. Tel: 508-921-4600 Date: May 2014 www.ueidaq.com Vers: 4.6 DNx-DIO-449 Chap1x.fm 1 Guardian-series DNA/DNR-DIO-449 Layer Chapter 1 Introduction 1.2 Manual Conventions To help you get the most out of this manual and our products, please note that we use the following conventions: Tips are designed to highlight quick ways to get the job done or to reveal good ideas you might not discover on your own. NOTE: Notes alert you to important information. CAUTION! Caution advises you of precautions to take to avoid injury, data loss, and damage to your boards or a system crash. Text formatted in bold typeface generally represents text that should be entered verbatim. For instance, it can represent a command, as in the following example: “You can instruct users how to run setup using a command such as setup.exe.” Text formatted in fixed typeface generally represents source code or other text that should be entered verbadim into the source code, initialization, or other file. Usage of Terms Throughout this manual, the term “Cube” refers to either a PowerDNA Cube product or to a PowerDNR RACKtangle rack mounted system, whichever is applicable. The term DNR is a specific reference to the RACKtangle, DNA to the PowerDNA I/O Cube, and DNx to refer to both. © Copyright 2014 United Electronic Industries, Inc. Tel: 508-921-4600 Date: May 2014 www.ueidaq.com Vers: 4.6 DNx-DIO-449 Chap1x.fm 2 Guardian-series DNA/DNR-DIO-449 Layer Chapter 1 Introduction 1.3 The DIO-449 Layer The DNA/DNR-DIO-449 are 48 channel, high performance AC and DC digital input boards designed for use in a wide variety of digital monitoring applications. The DNA-DIO-449 and DNR-DIO-449 are compatible with UEI’s popular “Cube” and RACKtangle I/O chassis respectively. The board’s inputs are divided into two, 24-bit ports, each of which presents its data in a 24-bit read. This simplifies programming and maximizes throughput. The board reads all 48 bits at rates up to 5120 samples per second. Automatic Change Of State (COS) detection is available with 195.3125μs time stamp accuracy and 10µs default resolution, with the scan rate and timestamp resolution adjustable down to 0.5µs. The “Guardian advantage” is a highly powerful diagnostic capability. A test signal injection capability is provided that allows the entire input hardware chain to be tested for proper functionality. The signal injection capability can also be used as a psuedo pull up/down so the board can monitor switch or contacts without external circuitry. In addition, the inputs are based on A/D converters which allows a diagnostic input mode that monitors the actual analog voltage at each input. This capability combined with the board’s ability to switch a fixed reference voltage into each channel allows a complete and reliable self-test of each channel. The analog voltage measurement capability also allows a quick and accurate detection of short and open circuits as well as marginal or failing drive circuitry. The analog input capability is also a powerful installation and diagnostic tool. The board offers programmable logic thresholds and hysteresis over the full input range. Thresholds and hysteresis are independently programmable on each channel. The board supports user programmable debouncing intervals for DC inputs which may be set on each channel independently with durations up to 409.5 ms. Each board provides 350 Vrms isolation between the I/O and the cube and other installed I/O layers. All inputs are over-voltage protected from -350 to +350 VDC, and against ESD. Software included with the DNx-DIO-449 provides a comprehensive yet easy to use API that supports all popular operating systems including Windows, Linux, real-time operating systems such as QNX, RTX, VXworks and more. The UEIDAQ Framework supplies complete support for those creating applications in Windows based data acquisition software languages as well as Windows application packages such as LabVIEW, MATLAB/Simulink, DASYLab or any application which supports ActiveX or OPC servers. 1.4 Features © Copyright 2014 United Electronic Industries, Inc. The DIO-449 layer has the following features: • ±150 VDC / 0-150 VAC input range • Sample rate of 5120 samples per second • Per-channel programmable • input transition levels (hysteresis) • input voltage level range (gain) • AC or DC mode • debounce intervals • Change of state detection with 195.3125μs timestamp resolution • 350 VAC isolation • Monitors contacts without external components (open-circuit detection) • Guardian-series Diagnostics • Analog voltage measurement on each channel • Internal test signal injection for self-test Tel: 508-921-4600 Date: May 2014 www.ueidaq.com Vers: 4.6 DNx-DIO-449 Chap1x.fm 3 Guardian-series DNA/DNR-DIO-449 Layer Chapter 1 Introduction 1.5 Specification The technical specifications for the DIO-449 are listed in the table below: Table 1-1. DNx-DIO-449 Technical Specifications Number of channels Port configuration Input range Input gains Input high voltage Input OFF voltage Hysteresis (voltage input) Input impedance Input open circuit state Input FIFO Input Throughput Rate Change of state detection COS timestamp BDDVSBDZ Voltage measurement and threshold voltage accuracy Input protection Input Isolation Power dissipation Operating Temp. Range Operating Humidity Vibration IEC 60068-2-6 IEC 60068-2-64 Shock IEC 60068-2-27 .5#' © Copyright 2014 United Electronic Industries, Inc. Tel: 508-921-4600 Date: May 2014 48 digital inputs Two 24-bit ports -150 to +150VDC, 0 to 150 VAC ("$GSFR42 - 2500 Hz) x1 default. Gains of x2, x5 and x10 are provided if higher resolution is required for lower voltage input ranges Programmable from 0 to 150 VDC/VAC (default: 12 VDC, 60 VAC) Programmable from 0 to 150 VDC/VAC (default: 1.25 VDC, 15 VAC) Programmable, 0 to 150 VDC/VAC (default 10.25 VDC/45 VAC) .FH0IN Programmable high or low via signal JOKFDUJPOEJBHOPTUJDTUBHF&BDIDIBOOFMJT independently programmable. 10 samples Hz Based on the change of one or more inputs. μS DC: ± 50 mV (-150 VDC to 150 VDC), AC: ± 150 mVAC (0 VAC to 150 VAC) 7%$BOE&4% 7SNT W, max. Tested -40 to +85 °C 95%, non-condensing 5 g, 10-500 Hz, sinusoidal 5 g (rms), 10-500 Hz, broad-band random HNTIBMGTJOFTIPDLT!PSJFOUBUJPOT HNTIBMGTJOFTIPDLT!PSJFOUBUJPOT 500,000 hours www.ueidaq.com Vers: 4.6 DNx-DIO-449 Chap1x.fm 4 Guardian-series DNA/DNR-DIO-449 Layer Chapter 1 Introduction 1.6 Device Architecture The DIO-449 is similar to the DIO-448, but supports a wider range of digital (DC) as well as analog (AC) voltage inputs on a single layer with more protection, thus allowing 48 digital inputs with per-channel programmable logical “high” and “low” input voltage (hysteresis) within ±125VAC/VDC with 10-12 bit accuracy. The DIO-448 and DIO-449 are pin-compatible. An architecture board diagram is shown in Figure 1-1: Diagnostic Signal Insertion Control Logic including AC-DC conversion 32-bit 66-MHz bus DIn0 A/D Converters ... Multiplexers DIn47 Buffers Input Protection, Voltage Dividers & -NCL{AGPASGRz"CRCARGML Digital I/O Connector Isolation Vref MUX Figure 1-1. Architecture Block Diagram of DNA-DIO-449 The front-end’s female DB-62 connector provides access to 48 digital/analog inputs sharing the same isolated ground. Each input passes through the circuit depicted in Figure 1-2. The 10MΩ resistor and -15V source circuit is used for optional/programmable open-circuit detection. The input is first divided down from 0-150V to ADC levels by voltage division resistors. Next, optionally, a circuit block containing a DAC and resistors can be enabled for either pull-up/down or diagnostic signal insertion, that affects every 4 channels. The input signal is buffered by an amplifier and passed through a multiplexer to reach the 1/2/5/10x gain buffer (per-channel selectable) and 16-bit SAR ADC. Each input channel circuit is configured as shown in Figure 1-2: Self-test signal insertion -orpull-up/down circuitry block 2910kΩ Dinx 16.9kΩ -15V Next three channels 10MΩ PGA 1/2/5/10 ADC 16-bit SAR Layer Controller Figure 1-2. Abstracted single Channel Diagram for DIO-449 Three identical multiplexer blocks with 16-channels each acquire one sample in parallel and transmit it across isolation circuitry to the layer’s logic controller. This means that every 16 channels are captured sequentially at a conversion clock of 81920Hz and all 3 groups of 16 channels are complete every 5120Hz. The controller samples and processes three channels in parallel at all times. © Copyright 2014 United Electronic Industries, Inc. Tel: 508-921-4600 Date: May 2014 www.ueidaq.com Vers: 4.6 DNx-DIO-449 Chap1x.fm 5 Guardian-series DNA/DNR-DIO-449 Layer Chapter 1 Introduction Each channel’s digitized analog signal is stored in a 256-sample “snapshot” buffer and RMS (AC) and average (DC) voltage are calculated and stored along with the Min and Max which are used to define the “zero” level of data. Each incoming sample triggers re-calculation. The sampling rate is 5120Hz, so the input waveform’s frequency must be under 2500Hz to avoid being aliased and over 42Hz to fill the buffer at least once every second. True RMS is calculated for all data in the 256-sample buffer or for the last complete period. Next, debouncing is performed on every input (up to 16-bit counter running from 10KHz clock) as programmed from 0.0 to 409.5 ms. At this point the channel’s analog signal has been interpreted as a digital 0 or 1. Change-of-state detection circuitry, if enabled instead of continuous mode, will forward the new data with a timestamp to the DIO-449’s master controller and issue an interrupt, if any channel’s data changes from a 0 to 1 or 1 to 0. The master controller stores the digital data and timestamp into the “Input FIFO” until requested by the Cube or RACK’s CPU in response to a function call from the user application. The 1024-sample “Input FIFO” stores the state of all 48 channels as two 24-bit words plus a timestamp of the last change. Note that when data is 0 (zero), this indicates that no data is available yet, a situation that can occur when the AC frequency is under 42 Hz and the logic is waiting for more samples to fill the buffer in order to perform calculations. The user can request data from either of the two independent hardware buffers: a 256-sample “snapshot” buffer and a 1024 sample “input FIFO”. Requesting data from the “snapshot buffer”, which consists of 256 samples from the analog input signal collected at 5120Hz, will pause acquisition while the request is being completed. The 1024 sample input FIFO, where each sample contains up to all 48 channel 1/0 bits plus the timestamp, can be set to store data in continuous or change-of-state mode. 1.7 Gain Settings The DIO-449 is capable of operating within these voltage ranges: Gain 0 1 2 3 DC operating range ±150VDC ±107VDC ±42VDC ±21VDC AC operating range ±215VPP (0-152VRMS) ±107VPP (0-76VRMS) ±42VPP (0-30VRMS) ±21VPP (0-15VRMS) The signal must be kept within the operating range, otherwise the measured values returned by the DIO-449 will be incorrect: © Copyright 2014 United Electronic Industries, Inc. • DC: applying signals larger than the voltage range will appear as the maximum value of the +/- voltage range to be read, i.e. saturation or ‘clipping’ returns the value of the positive or negative DC/DC PS rail. Depending on the characteristics of your signal, it is possible to detect clipping in software by checking for the maximum value of the rail. For DC voltages, it is possible to apply more than 150VDC (up to 215V) without clipping, however, this will stress the components beyond the normal operating range and is not recommended. • AC: applying signals outside of the voltage range will cause erroneously low RMS values to be calculated and will stress the components. Tel: 508-921-4600 Date: May 2014 www.ueidaq.com Vers: 4.6 DNx-DIO-449 Chap1x.fm 6 Guardian-series DNA/DNR-DIO-449 Layer Chapter 1 Introduction 1.8 Layer Connectors and Wiring Figure 1-3 shows the pinout of the 62-pin female connector of the DIO-449: SHIELD Pin Signal /$ (OE (OE /$ %*O %*O %*O %*O %*O %*O %*O %*O %*O %*O %*O %*O %*O %*O %*O %*O (OE Pin Signal /$ 3TWE 3TWE 3TWE %*O %*O %*O %*O %*O %*O %*O %*O %*O %*O %*O %*O %*O %*O %*O %*O /$ Pin Signal (OE /$ (OE %*O %*O %*O %*O %*O %*O %*O %*O %*O %*O %*O %*O %*O %*O %*O %*O /$ /$/P$POOFDUJPO 3TWE3FTFSWFE Figure 1-3. DB-62 I/O Connector Pinout for DIO-449 Note that the DIO-449 inputs are numbered from DIn0 through DIn47. 1.8.1 Indicators A photo of the DNR-DIO-449 unit is illustrated below. The front panel has two LED indicators: • RDY: indicates that the layer is receiving power and operational. • STS: can be set by the user using the low-level framework. DNR bus connector RDY LED STS LED DB-62 (female) 62-pin I/O connector Figure 1-4. Photo of DIO-449 Digital Input Layer © Copyright 2014 United Electronic Industries, Inc. Tel: 508-921-4600 Date: May 2014 www.ueidaq.com Vers: 4.6 DNx-DIO-449 Chap1x.fm 7 Guardian-series DNA/DNR-DIO-449 Layer Chapter 1 Introduction 1.9 PowerDNA Explorer for the DIO-449 1.9.1 Initialization Values The PowerDNA Explorer right-hand pane of the DIO-449 contains two tabs: • Immediate: the runtime values currently in use • Initialization: the values that the DIO-449 is set to at startup The initialization tab, shown in Figure 1-5 below, contains these columns: • DInx: read-only display of the channel number. • Name: a name or note that you wish to give to the channel. • DC: when checked the voltage measurement algorithm will use direct current (DC). When unchecked it uses alternating current (ACRMS). • Gain: read-only display of the gain from “Gain Settings” on page 7. • Low Threshold: analog voltage under this value is interpreted by the DIO-449 as a binary 0. Units are VDC or VACRMS. • High Threshold: analog voltage above this value is interpreted as binary 1. Values between the low and high threshold do not change the binary state. Units are VDC or VACRMS (see DC checkbox above). • Debounce: the debounce period from 0 to 409.6 milliseconds. Figure 1-5. PowerDNA Explorer DIO-449 Immediate Pane For convenience, the following additional buttons may also be available: • Immed to Init -or- Init to Immed: copies values between panes. • Ch0 to all channels: copies channel 0 to all other channels. • Raw Values: shows raw values as retrieved from non-volatile memory The initialization values are stored in non-volatile memory on the layer and are loaded at startup. You can change any of the factory default values and save them with Store Config into the non-volatile memory on that specific DIO-449. Removing that DIO-449 and placing it within another IOM will retain the values. © Copyright 2014 United Electronic Industries, Inc. Tel: 508-921-4600 Date: May 2014 www.ueidaq.com Vers: 4.6 DNx-DIO-449 Chap1x.fm 8 Guardian-series DNA/DNR-DIO-449 Layer Chapter 1 Introduction 1.9.2 Immediate Values The immediate tab, shown in Figure 1-6 below, contains these columns: • DInx: read-only display of the channel number. • Name: the channel name from the Initialization Pane. • DIn: read-only display of the digital/binary interpretation of the voltage • AIn: read-only display of the analog voltage. Units are VDC or VACRMS. • DC: the voltage measurement algorithm as DC or AC. • Gain: read-only display of the gain from “Gain Settings” on page 7. • Low Threshold: analog voltage for binary 0. Units are VDC or VACRMS. • High Threshold: analog voltage for binary 1. Units are VDC or VACRMS. • Debounce: not displayed; value from initialization pane is used. Figure 1-6. PowerDNA Explorer DIO-449 Immediate Pane The immediate values are the values presently being used at runtime to interpret the analog voltage (shown in the AIn column) as a digital input in the DIn column. When the DIO-449 first starts up or is reset the initial state of the immediate values is loaded from the values shown in the initalization tab. You can change the immediate values and store them with the Store Config command from the menu in volatile memory where they will remain until the DIO-449 loses power. To show the present values for AIn and DIn click on Start Reading Input Data in the menu. © Copyright 2014 United Electronic Industries, Inc. Tel: 508-921-4600 Date: May 2014 www.ueidaq.com Vers: 4.6 DNx-DIO-449 Chap1x.fm 9 Guardian-series DNA/DNR-DIO-449 Electromechanical Relay Layer Chapter 2 Programming with the High Level API Chapter 2 Programming with the High Level API This section describes how to control the DNx-DIO-449 using the UeiDaq Framework High Level API. UeiDaq Framework is object oriented and its objects can be manipulated in the same manner from different development environments such as Visual C++, Visual Basic or LabVIEW. The following section focuses on the C++ API, but the concept is the same no matter what programming language you use. Please refer to the “UeiDaq Framework User Manual” for more information on use of other programming languages. 2.1 Creating a Session The Session object controls all operations on your PowerDNx device. Therefore, the first task is to create a session object: // create a session object CUeiSession session; 2.2 Configuring UeiDaq Framework uses resource strings to select which device, subsystem the Resource and channels to use within a session. The resource string syntax is similar to a web URL: String <device class>://<IP address>/<Device Id>/<Subsystem><Channel list> For PowerDNA and RACKtangle, the device class is pdna. For example, the following resource string selects digital input lines 0,1 on device 1 at IP address 192.168.100.2: “pdna://192.168.100.2/Dev1/Di0,1” 2.3 Configuring for Digital I/O The DIO-449 can be configured for digital output. NOTE: In Framework, a digital channel corresponds to a physical port on the device. You cannot configure a session only to access a subset of lines within a digital port. NOTE: Sessions are unidirectional. The DIO-449 is also unidirectional and you only need to configure one session for input. Use the method CreateDIIndustrialChannel() to program the advanced features of the DIO-449, such as the levels at which the input line states change, as well as a digital filter to eliminate glitches and spikes. © Copyright 2014 United Electronic Industries, Inc. Tel: 508-921-4600 Date: May 2014 www.ueidaq.com Vers: 4.6 DNx-DIO-449 Chap2x.fm 10 Guardian-series DNA/DNR-DIO-449 Electromechanical Relay Layer Chapter 2 Programming with the High Level API The following code configures the digital input ports of DIO-449 set as device 1: // Configure session to write to ports 0 to 1 on device 1 session.CreateDIIndustrialChannel("pdna://192.168.100.2/Dev1/Di0:1", 1.5, 5.0, 1.0); It configures the following parameters: • Low Threshold: the low hysteresis threshold. • High Threshold: the high hysteresis threshold. • Digital input filter (debouncer): the minimum pulse width in ms. Use 0.0 to disable the digital input filter. The DIO-449 advanced features below are accessible through channel object methods (or property node under LabVIEW). • AC/DC mode: in AC mode the RMS voltage measured at each input is compared with low & high thresholds to determine the state of the input • Signal injection: state of the signal injection multiplexer Tristate: set the mux to tri-state mode to disconnect voltage supply from input line Diagnostic: set mux to Diagnostic mode to connect internal voltage source to each input line in order to test that it is functional Pull-up: setting mux to pull-up mode connects a pull-up resistor between the internal voltage source and the input line to monitor switches or contacts without external circuitry. • Voltage Supply: voltage applied by the internal source. • Input Gain: the input gain used by the ADC to measure the input voltage DC or RMS level. The following code shows how to set the DIO-449 input line parameters: // The DIO-449 input data is organized in two ports of 24 lines for(int p=0; p<diSs.GetNumberOfChannels(); p++) { CUeiDIIndustrialChannel* pDIIndusChan = dynamic_cast<CUeiDIIndustrialChannel*>(diSs.GetChannel(p)); for(int l=0; l<diSs.GetDevice()->GetDIResolution(); l++) { pDIIndusChan->SetLowThreshold(l, 4.0); pDIIndusChan->SetHighThreshold(l, 5.0); pDIIndusChan->SetMinimumPulseWidth(l, 10); pDIIndusChan->SetVoltageSupply(l, 1.0); pDIIndusChan->SetMux(l. UeiDigitalInputMuxDiag); } } © Copyright 2014 United Electronic Industries, Inc. Tel: 508-921-4600 Date: May 2014 www.ueidaq.com Vers: 4.6 DNx-DIO-449 Chap2x.fm 11 Guardian-series DNA/DNR-DIO-449 Electromechanical Relay Layer Chapter 2 Programming with the High Level API To read the voltage and current flowing through each of the digital input lines, you must treat the DIO-449 like an analog input device and create a new analog input session (different from the one you are using to read the digital states of the input lines) and configure the input lines you want to read from: // Create an AI session CUeiSession aiSession // Read voltage from all 48 lines. Only the first parameter “resource” // is used with the DIO-449, the other parameters are ignored. aiSession.CreateAIChannel(“pdna://192.168.100.2/Dev1/Ai0:47”, -10, 10,UeiAIChannelInputModeDifferential); 2.4 Configuring the Timing You can configure the DIO-449 to run in simple mode (point by point), buffered mode (ACB mode), or DMAP mode. • In simple mode, the delay between samples is determined by software on the host computer. • In DMAP mode, the delay between samples is determined by the DIO-449 on-board clock, and data is transferred one scan at a time between PowerDNA and the host PC. • In buffered mode, the delay between samples is determined by the DIO-449 on-board clock, and data is transferred in blocks between PowerDNA and the host PC. The following code shows how to configure the simple mode. Please refer to the “UeiDaq Framework User’s Manual” to learn how to use other timing modes. // configure timing for point-by-point (simple mode) session.ConfigureTimingForSimpleIO(); aiSession.ConfigureTimingForSimpleIO(); 2.5 Reading Data Reading analog and digital data from the DIO-449 is done using reader objects. The following sample code shows how to create a scaled reader object and read samples: // create a reader and link it to the digital session’s stream CUeiDigitalReader diReader(session.GetDataStream()); // create a reader and link it to the analog session’s stream CUeiAnalogScaledReader aiReader(aiSession.GetDataStream()); // read one digital scan, the buffer must be // big enough to contain one value per port © Copyright 2014 United Electronic Industries, Inc. Tel: 508-921-4600 Date: May 2014 www.ueidaq.com Vers: 4.6 DNx-DIO-449 Chap2x.fm 12 Guardian-series DNA/DNR-DIO-449 Electromechanical Relay Layer Chapter 2 Programming with the High Level API // create a reader and link it to the digital session’s stream uInt32 data[2]; reader.ReadSingleScan(data); // read voltages from all input lines double volts[48]; aiReader.ReadSingleScan(volts); 2.6 Cleaning-up the Session The session object will clean itself up when it goes out of scope or when it is destroyed. To reuse the object with a different set of channels or parameters, you can manually clean up the session as follows: // clean up the session session.CleanUp(); aiSession.CleanUp(); © Copyright 2014 United Electronic Industries, Inc. Tel: 508-921-4600 Date: May 2014 www.ueidaq.com Vers: 4.6 DNx-DIO-449 Chap2x.fm 13 Guardian-series DNA/DNR-DIO-449 Electromechanical Relay Layer Chapter 3 Programming with the Low Level API Chapter 3 Programming with the Low Level API The low-level API offers direct access to PowerDNA DAQBios protocol and allows you to directly access device registers. Where possible, we recommend that you use the UeiDaq Framework (see Chapter 2), which is easier to use. You should need to use the low-level API only if you are using an operating system other than Windows. Please refer to the API Reference Manual document under: Start » Programs » UEI » PowerDNA » Documentation for pre-defined types, error codes, and functions for use with this layer. For a good starting point, please consider reviewing the examples for DIO layers that are under: Start » Programs » UEI » PowerDNA » Examples The following examples are recommended: © Copyright 2014 United Electronic Industries, Inc. • Sample449 - simplest operating mode example • SampleRTDMAP449 - DMAP example • SampleACB449 - ACB example • SampleAsync449_COS - Change-of-State detection example Tel: 508-921-4600 Date: May 2014 www.ueidaq.com Vers: 4.6 DNx-DIO-449 Chap3x.fm 14 Guardian-series DNA/DNR-DIO-449 Electromechanical Relay Layer Appendix Appendix The following cables and STP boards are available for the DIO-449 layer. A. Accessories DNA-CBL-62 This is a 62-conductor round shielded cable with 62-pin male D-sub connectors on both ends. It is made with round, heavy-shielded cable; 2.5 ft (75 cm) long, weight of 9.49 ounces or 269 grams; up to 10ft (305cm) and 20ft (610cm). DNA-STP-62 The STP-62 is a Screw Terminal Panel with three 20-position terminal blocks (JT1, JT2, and JT3) plus one 3-position terminal block (J2). The dimensions of the STP-62 board are 4w x 3.8d x1.2h inch or 10.2 x 9.7 x 3 cm (with standoffs). The weight of the STP-62 board is 3.89 ounces or 110 grams. DB-62 (female) 62-pin connector: 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 UP+ UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 JT3 — 20-position terminal block: 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 UP+ UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+ UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 UP+5 44 4 47 GND JT2 — 20-position terminal block: 7 JT1 — 20-position terminal block: J2 — 5-position terminal block: 5 4 3 2 1 4)*&-% (/% SHIELD to J2 to JT1 to JT2 to JT3 J2 5 4 3 2 1 SHIELD GND 62 42 21 JT1 62-pin Connector 20 41 61 19 40 60 18 39 59 17 38 58 16 37 57 15 36 56 14 35 JT2 55 13 34 54 12 33 53 11 32 52 10 31 51 9 30 50 8 29 49 7 47 27 6 48 28 GND JT3 22 1 43 23 2 44 24 3 45 25 4 46 26 5 Figure A-1. Pinout and photo of DNA-STP-62 screw terminal panel © Copyright 2014 United Electronic Industries, Inc. Tel: 508-921-4600 Date: May 2014 www.ueidaq.com Vers: 4.6 DNx-DIO-449 AppxX.fm 15 Guardian-series DNA/DNR-DIO-449 Electromechanical Relay Layer 16 Index A Architecture H High Level API 4 B Block Diagram 10 O Organization 4 C P Cable(s) 15 Cleaning-up the Session 13 Cleaning-up the session 13 Configuring the Resource String Conventions 2 Creating a Session 10 Pinout © Copyright © 2014 Copyright 2014 United Electronic United Electronic Industries,Industries, Inc. Inc. 1 6 S 10 Tel: 508-921-4600 Date: May 2014 Screw Terminal Panels Specifications 4 Support ii www.ueidaq.com 15 Vers: 4.6 DNx-DIO-449-ManualIX.fm
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