^1 HARDWARE REFERENCE MANUAL
^2
UMAC-CPCI
Turbo CPU Board
^3 Turbo CPU Board
^4 4Ax-603625-xUxx
^5 January 28, 2003
Copyright Information
© 2003 Delta Tau Data Systems, Inc. All rights reserved.
This document is furnished for the customers of Delta Tau Data Systems, Inc. Other uses are
unauthorized without written permission of Delta Tau Data Systems, Inc. Information contained
in this manual may be updated from time-to-time due to product improvements, etc., and may not
conform in every respect to former issues.
To report errors or inconsistencies, call or email:
Delta Tau Data Systems, Inc. Technical Support
Phone: (818) 717-5656
Fax: (818) 998-7807
Email: support@deltatau.com
Website: http://www.deltatau.com
Operating Conditions
All Delta Tau Data Systems, Inc. motion controller products, accessories, and amplifiers contain
static sensitive components that can be damaged by incorrect handling. When installing or
handling Delta Tau Data Systems, Inc. products, avoid contact with highly insulated materials.
Only qualified personnel should be allowed to handle this equipment.
In the case of industrial applications, we expect our products to be protected from hazardous or
conductive materials and/or environments that could cause harm to the controller by damaging
components or causing electrical shorts. When our products are used in an industrial
environment, install them into an industrial electrical cabinet or industrial PC to protect them
from excessive or corrosive moisture, abnormal ambient temperatures, and conductive materials.
If Delta Tau Data Systems, Inc. products are exposed to hazardous or conductive materials and/or
environments, we cannot guarantee their operation.
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
Contents
INTRODUCTION .....................................................................................................................................................................1
Associated Manuals.................................................................................................................................................................2
BOARD CONFIGURATION ...................................................................................................................................................3
Option 1: Communications Interfaces .....................................................................................................................................3
Option 2: Dual-Ported RAM ...................................................................................................................................................3
Option 5: CPU & Memory Configurations .............................................................................................................................3
Option 8: High-Accuracy Clock Crystal .................................................................................................................................4
Option 9: Serial Port Configuration.........................................................................................................................................4
Option 10: Firmware Revision Specification ..........................................................................................................................4
Option 16: Battery-Backed Parameter Memory ......................................................................................................................4
HARDWARE SETUP ...............................................................................................................................................................5
Clock-Source Jumpers.............................................................................................................................................................5
Watchdog Timer Jumper .........................................................................................................................................................5
Operation Mode Jumpers ........................................................................................................................................................5
Firmware Reload Jumper ........................................................................................................................................................5
Re-Initialization Jumper ..........................................................................................................................................................5
Serial-Port Level Select Jumpers.............................................................................................................................................5
DPRAM IC Select Jumper ......................................................................................................................................................6
Flash IC Firmware Bank Select Jumpers.................................................................................................................................6
Flash IC Power Supply Select Jumper.....................................................................................................................................6
Power-Supply Check Select Jumper........................................................................................................................................6
Reset-Lock Jumper..................................................................................................................................................................6
CONNECTIONS........................................................................................................................................................................7
Compact UBUS Connector .....................................................................................................................................................7
Rear Field Wiring Connector ..................................................................................................................................................7
Front-Panel RS-232 Connector ...............................................................................................................................................7
Stack Connectors to Bridge Board ..........................................................................................................................................7
Factory-Use Connectors ..........................................................................................................................................................7
BOARD LAYOUT.....................................................................................................................................................................9
JUMPER DESCRIPTIONS....................................................................................................................................................11
E0: Reset-Lock Enable (Factory Use Only) ..........................................................................................................................11
E1A: Servo and Phase Clock Direction Control....................................................................................................................11
E1B: Servo/Phase Clock Source Control ..............................................................................................................................11
E2: (Reserved for future use).................................................................................................................................................11
E3: Re-Initialization on Reset Control ..................................................................................................................................12
E4: (Reserved for future use).................................................................................................................................................12
E5: USB/Ethernet Communication Jumper...........................................................................................................................12
E11: Power Supply Check Control........................................................................................................................................12
E17 – E18: Serial Port Select ................................................................................................................................................12
E18A, B, C, D: Ethernet Communication Control ................................................................................................................13
E19: Watchdog Disable Jumper ............................................................................................................................................13
E20 – E22: Power-Up/Reset Load Source.............................................................................................................................13
E23: Firmware Reload Enable...............................................................................................................................................13
E25A, B, C: Flash Memory Firmware Bank Select ..............................................................................................................13
W1: Flash IC Power Supply Select Jumper...........................................................................................................................13
CONNECTOR SUMMARY ...................................................................................................................................................15
CONNECTOR PINOUTS.......................................................................................................................................................17
Compact UBUS Connector (J1) Pin-Out...............................................................................................................................17
UMAC-CPCI Turbo CPU Board J2 Connector.....................................................................................................................18
J4: RS-232 Serial Port Connector (DB-9S Connector)......................................................................................................19
ACCESSORIES .......................................................................................................................................................................21
ACC-Cx Compact UBUS Backplane Boards........................................................................................................................21
ACC-8CR Test Breakout Board ............................................................................................................................................21
Contents
i
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
ACC-11C Sinking I/O Board ................................................................................................................................................21
ACC-24C2 PWM Axis Board ...............................................................................................................................................21
ACC-24C2A Analog Axis Board ..........................................................................................................................................22
ACC-51C Analog Encoder Interpolator Board .....................................................................................................................22
SCHEMATICS
Sheet 1
Sheet 2
Sheet 3
ii
Contents
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
INTRODUCTION
Delta Tau’s UMAC-CPCI systems provide a compact and clean integration of motion and I/O control for
sophisticated automation equipment. The system consists of a modular set of 3U-size (100mm x 160mm) boards
in the “Compact PCI” format, implementing Turbo PMAC software and hardware functions, communicating with
each other over a common backplane (the “Compact UBUS”). All field wiring is available on rear connectors,
suitable for a user-designed distribution system to the machine. UMAC (Universal Motion and Automation
Controller) -CPCI systems provide integrated connectivity as well as ease of assembly, diagnostics, and repair.
UMAC-CPCI systems differ from “standard” UMAC systems in that all field wiring comes to the back of the
rack, behind the backplane, instead of direct top and bottom access.
The UMAC-CPCI Turbo CPU board (Part number 3A0-603625-10x) implements a Turbo PMAC2 CPU in the 3U
CPCI form factor. Its software operation is completely identical to other Turbo PMAC2 controllers.
Note that a Compact PCI interface does not automatically come with a UMAC-CPCI system, nor is one necessary
to communicate to the system, given the other possible communications ports: RS-232, RS-422, USB, and
Ethernet.
This picture shows the UMAC-CPCI Turbo CPU
board. The connectors on the right side plug into the
“Compact UBUS” backplane board, with the bottom
right connector being the bus connector, and the top
right connector containing the external “field wiring”
signals, which typically pass through the backplane
board. The connector at lower left is an RS-232 port
intended for setup and diagnostics; the stack
connectors top and bottom provide the link to a CPCI
“bridge board”.
This picture shows a sample configuration of a
UMAC-CPCI system, not installed in its rack. It
consists of the following components:
1. Rack power supply (not a Delta Tau product)
2. UMAC-CPCI CPU board
3. ACC-11C Sinking I/O board
4. ACC-24C2A analog axis interface board
5. ACC-C8 8-slot Compact UBUS backplane.
Note the “pass-through” connector on the
back for field-wiring distribution. In this
picture, alternate slots in the backplane have
been left open to make each board more
visible. This does not have to be done in
actual use.
Introduction
1
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
Associated Manuals
This document is the Hardware Reference Manual for the UMAC-CPCI Turbo CPU board for a UMAC-CPCI
system. It describes the hardware features and provides setup instructions.
You will need other manuals as well to use your UMAC-CPCI system. Each accessory to the UMAC-CPCI
Turbo CPU board has its own manual, describing its operation and any required software setup of the Turbo CPU.
You will also need the Software Reference Manual for the Turbo PMAC family, and the User’s Guide for the
PMAC or Turbo PMAC families.
2
Introduction
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
BOARD CONFIGURATION
The base version of the UMAC-CPCI Turbo CPU board provides a 1-slot 3U-format Eurocard board with:
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80 MHz DSP56303 CPU (120 MHz PMAC equivalent)
128k x 24 SRAM compiled/assembled program memory (Opt. 5C0)
128k x 24 SRAM user data memory (Opt. 5C0)
1M x 8 flash memory for user backup & firmware (Opt. 5C0)
Latest released firmware version
RS-232/422 serial interface, available both on front-panel DB-9 connector and on backside field-wiring
connector
Backplane Compact UBUS expansion connector for communication to servo and I/O accessory boards
Backside field-wiring connector
Option 1: Communications Interfaces
The UMAC-CPCI Turbo CPU board comes standard only with an RS-232/422 serial interface. The Option 1
family provides faster interfaces for high-speed communications – either Universal Serial Bus (USB), Ethernet, or
the link to the CPCI bus through a “bridge” daughter board.
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•
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Option 1: On-board 10-Base-T TCP/IP Ethernet interface. The key added components are U67 and U32.
Option 1A: On-board 12 Mbit/sec USB interface. The key added component is U67.
Option 1B: Solder-side stack connectors to CPCI-bridge daughter board. This option should only be ordered
when the bridge board is to be installed on the left side of the CPU board, so the CPU board is in the leftmost
slot of the Compact UBUS backplane, and the bridge board is in the rightmost slot of the Compact PCI bus
backplane.
Option 2: Dual-Ported RAM
With either the Option 1 Ethernet interface, or the Option 1A USB interface, communications throughput can be
increased through the use of dual-ported RAM, which provides a bank of memory that can be directly accessed by
both the UMAC-CPCI Turbo CPU and the communications microcontroller.
•
Option 2: 32k x 16 bank of on-board dual-ported RAM (requires Option 1 or 1A) in component U56.
Option 5: CPU & Memory Configurations
The various versions of Option 5 provide different CPU speeds and main memory sizes on the piggyback CPU
board. Only one Option 5xx may be selected for the board.
The CPU is a DSP563xx IC as component U1. It is currently available only as an 80 MHz or 100 MHz device
(with computational power equivalent to a 120 MHz or 150 MHz non-Turbo PMAC, respectively), but higher
speed versions may become available.
The compiled/assembled-program (“P”) memory SRAM ICs are located in U14, U15, and U16. These ICs form
the active memory for the firmware, compiled PLCs, and user-written phase/servo algorithms. These can be 128k
x 8 ICs (for a 128k x 24 bank), fitting in the smaller footprint, or they can be the larger 512k x 8 ICs (for a 512k x
24 bank), fitting in the full footprint.
The user-data memory (“X/Y”) SRAM ICs are located in U11, U12, and U13. These ICs form the active memory
for user motion programs, uncompiled PLC programs, and user tables and buffers. These can be 128k x 8 ICs (for
a 128k x 24 bank), fitting in the smaller footprint, or they can be the larger 512k x 8 ICs (for a 512k x 24 bank),
fitting in the full footprint.
The flash memory IC is located in U10. This IC forms the non-volatile memory for the board’s firmware, the
user setup variables, and for user programs, tables, and buffers. It can be 1M x 8, 2M x 8, or 4M x 8 in capacity.
Board Configuration
3
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
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Option 5C0 is the standard CPU and memory configuration. It is provided automatically if no Option 5xx is
specified. It provides an 80 MHz DSP56303 CPU (120 MHz PMAC equivalent) with 8k x 24 of internal
memory, an external 128k x 24 of compiled/assembled program memory, an external 128k x 24 of user data
memory; and a 1M x 8 flash memory. Setup variable I52 should be set and saved at 7 for 80 MHz operation.
Option 5C3 provides an 80 MHz DSP56303 CPU (120 MHz PMAC equivalent) with 8k x 24 of internal
memory, an expanded external 512k x 24 of compiled/assembled program memory, an expanded external
512k x 24 of user data memory, and a 4M x 8 flash memory. Setup variable I52 should be set and saved at 7
for 80 MHz operation.
Option 5D0 provides a 100 MHz DSP56309 CPU (150 MHz PMAC equivalent) with 34k x 24 of internal
memory, an external 128k x24 of compiled/assembled program memory, an external 128k x 24 of user data
memory; and a 1M x 8 flash memory. Setup variable I52 should be set and saved at 9 for 100 MHz operation.
Option 5D3 provides a 100 MHz DSP56309 CPU (150 MHz PMAC equivalent) with 34k x 24 of internal
memory, an expanded external 512k x 24 of compiled/assembled program memory, an expanded external
512k x 24 of user data memory, and a 4M x 8 flash memory. Setup variable I52 should be set and saved at 9
for 100 MHz operation.
Option 8: High-Accuracy Clock Crystal
The UMAC-CPCI Turbo CPU board has a clock crystal (component Y1) of nominal frequency 19.6608 MHz
(~20 MHz). The standard crystal’s accuracy specification is +/-100 ppm.
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Option 8A provides a nominal 19.6608 MHz crystal with a +/-15 ppm accuracy specification.
Option 9: Serial Port Configuration
The UMAC-CPCI Turbo CPU board comes standard with a single RS-232/422 serial port, a second serial port
can be added.
•
Option 9T adds an auxiliary RS-232 port on the CPU board. The key components added are ICs U28 and
U43.
Option 10: Firmware Revision Specification
Normally the UMAC-CPCI Turbo CPU board is provided with the newest released firmware revision. Some
users may wish to “freeze” their designs on an older revision. A label on the U10 flash memory IC shows the
firmware revision loaded at the factory. The VERSION command can be used to report what firmware revision is
currently installed.
•
Option 10 provides for a user-specified firmware version.
Option 16: Battery-Backed Parameter Memory
The contents of the standard memory are not retained through a power-down or reset unless they have been saved
to flash memory first. Option 16 provides supplemental battery-backed RAM for real-time parameter storage that
is ideal for holding machine state parameters in case of an unexpected power-down.
•
4
Option 16A provides a 32k x 24 bank of battery-backed parameter RAM in components U17, U18, and U19
and a “can-stack” lithium battery in component BT1. While the average expected battery life is over five
years, a yearly replacement schedule is recommended. Replacement batteries can be ordered from Delta Tau
as Acc-1LS (Part # 100-0QTC85-000).
Board Configuration
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
HARDWARE SETUP
Clock-Source Jumpers
In order to operate properly, the Turbo CPU board must receive servo and phase clock signals from a source
external to the board. These clock signals can be brought into the board from one of three possible ports: the
stack connector, the UBUS backplane connector, or the front-side main serial-port connector. Jumpers E1A and
E1B must be configured properly for the clock source you use.
(Note: If the UMAC-CPCI Turbo CPU board cannot find the clock signal from the source specified by these
jumpers, it will generate its own 2.26kHz servo clock and its own 9.04kHz phase clock so it will stay in
operation.)
To receive the clock signals over the Compact-UBUS backplane, usually from an ACC-24C2x axis-interface
board, E1A must connect pins 1 and 2, and E1B must connect pins 2 and 3. This configuration is typical for a
UMAC-CPCI system. The clock signals are output on the main serial port.
To receive the clock signals through the stack connectors, usually from the MACRO IC on the CPCI “bridge”
board, E1A must connect pins 1 and 2, and the E1B jumper must be removed. The clock signals are output on the
main serial port.
To receive the clock signals through the main serial port, usually from another UMAC system or a reference
signal generator, E1A must connect pins 2 and 3, and E1B must connect pins 1 and 2. This configuration is rarely
used, but permits complete synchronization to the system that is generating the clock signals.
Watchdog Timer Jumper
Jumper E19 should be OFF for normal operation, leaving the watchdog timer circuit active and prepared to shut
down the card in case of a severe problem. Putting jumper E19 ON disables the watchdog timer circuit. This
should only be used for test purposes, in trying to track down the source of watchdog timer trips. Normal
operation of a system with this jumper ON should never be attempted, as an important safety feature is disabled.
Operation Mode Jumpers
Jumpers E20, E21, and E22 control the operational mode of the UMAC-CPCI Turbo CPU. For normal operation,
E20 must be OFF, E21 must be ON, and E22 must be ON. Other settings of these jumpers are for factory use
only.
Firmware Reload Jumper
Jumper E23 should be OFF for normal operation. If you want to load new firmware into the flash-memory IC on
the CPU, E23 should be ON when the card is powered up. This puts the card in “bootstrap mode”, ready to
accept new firmware. If you then try to establish communications to the card with the Executive program, either
over the main serial port or the optional USB or Ethernet ports, the Executive program will automatically
recognize that the card is in bootstrap mode, and prompt you for the firmware file to download.
Re-Initialization Jumper
Jumper E3 should be OFF for normal operation, where the last saved I-variable values are loaded from flash
memory into active memory at power-up/reset. If E3 is ON during power-up/reset, the factory default I-variable
values are instead loaded into active memory at power-up/reset. The last saved values are not lost when this
happens. This jumper is typically only used when the system’s set up has a problem severe enough that
communications does not work – otherwise, a $$$*** command can be used for re-initialization.
Serial-Port Level Select Jumpers
The standard serial port can be used for either RS-232 or RS-422 serial communications. To use RS-232, jumpers
E17 and E18 should connect pins 1 and 2; to use RS-422, jumpers E17 and E18 should connect pins 2 and 3. The
front-panel DB-9 serial connector provides only the RS-232 signals, so in order to use this connector, E17 and
E18 must both connect pins 1 and 2.
Hardware Setup
5
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
DPRAM IC Select Jumper
The UMAC-CPCI Turbo CPU board can provide dual-ported RAM (DPRAM) communications using either the
on-board Option 2B DPRAM IC through the USB or Ethernet port, or using the DPRAM IC on the CPCI bridge
daughter board through that board’s CPCI port. Jumper E24 must connect pins 1 and 2 to use the on-board
Option 2B DPRAM; it must connect pins 2 and 3 to use the CPCI bridge board DPRAM.
Flash IC Firmware Bank Select Jumpers
Some makes of the U10 flash memory IC on the UMAC-CPCI Turbo CPU board can store multiple versions of
the operating firmware inside. Jumpers E25A, E25B, and E25C select which bank is loaded into active memory
on a normal power-up/reset, and which bank will be written to if the board is powered up or reset with the E23
jumper on.
The eight possible settings of these three jumpers provide eight banks for the firmware. A standard production
version of the UMAC-CPCI Turbo CPU board is shipped with firmware loaded only in the bank selected by
having all three of these jumpers OFF.
Flash IC Power Supply Select Jumper
Jumper W1 is set at the factory for the voltage level of the flash IC installed in U10. It connects pins 1 and 2 for a
3.3V flash IC; it connects pins 2 and 3 for a 5V flash IC. Even if this is a removable, not soldered, jumper, it
should not be changed by the user.
Power-Supply Check Select Jumper
The UMAC-CPCI Turbo CPU board has a circuit to evaluate the voltage levels received through the J1 Compact
UBUS backplane connector. This circuit can then notify other boards in the system (without software
intervention) of a bad supply, so the outputs of those boards are automatically shut down. Jumper E11 should be
OFF if only the 5V supply is checked for this purpose; it should be ON if the +12V and –12V backplane supplies
are to be checked for this purpose. Note that many users will provide a separate isolated +/-12V supply into the
analog axis boards, and each analog axis board has its own power-supply check circuit.
Reset-Lock Jumper
Putting jumper E0 ON locks the UMAC-CPCI Turbo CPU board in the reset state. This setting permits the
loading of logic into the programmable ICs on the board and is for factory use only. This jumper should be OFF
for all normal operation.
6
Hardware Setup
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
CONNECTIONS
In a typical installation, the UMAC-CPCI Turbo CPU board is simply slid into a slot of a 3U-Eurocard rack until
it inserts into the mating connectors on the backplane board already installed in the rack. In actual operation, all
signals to the board come into the CPU board through the backplane. (The front-panel RS-232 connector is
intended for test and debugging purposes.)
Compact UBUS Connector
The J1 “Compact UBUS” connector at the bottom of the back edge of the board provides the means for the
UMAC-CPCI Turbo CPU board to communicate with axis and I/O boards through a common backplane board,
such as a Delta Tau ACC-Cx board, or a user-designed backplane board. It also provides the 3.3V and 5V power
supply lines to the CPU board.
Because of the design of the Compact UBUS, the CPU board can operate in any slot of the bus. However, if the
CPU board has the CPCI bridge board installed on it, the CPU board must be installed in the end slot of the
Compact UBUS backplane immediately adjacent to the Compact PCI bus backplane board, so the bridge board
can be installed in the adjacent CPCI end slot.
Rear Field Wiring Connector
The J2 field-wiring connector at the top of the back edge of the board provides the path for all of the signals
between the CPU board and the outside system. In a typical configuration, this connector is mated with a “passthrough” connector on the Compact UBUS backplane board, and a system-specific distribution system is installed
behind the backplane.
The J2 connector contains the signals for the main serial port (either RS-232 or RS-422 levels), the optional
auxiliary RS-232 serial port, the optional USB port, and the optional Ethernet port. It also provides the outputs of
the relay for the CPU board’s watchdog timer.
Front-Panel RS-232 Connector
The J4 DB-9S connector on the front panel is a standard RS-232 connector for the main serial port into the CPU,
permitting a straight-across cable to a matching cable on a host computer. Jumpers E17 and E18 must each
connect pins 1 and 2 to permit use of this connector. These same signals are available on the rear J2 connector;
this front connector is intended for setup and diagnostic use more than use in the actual application.
Stack Connectors to Bridge Board
Stacking socket connectors J11 and J12 on the top and bottom edges, respectively, of the component side of the
CPU board provide connection to the optional CPCI bridge board that can form a two-board “stack” with the CPU
board. (Mating prong connectors on the solder side of the bridge board must be ordered.) In this configuration,
the UMAC-CPCI Turbo CPU board can be installed in the rightmost slot of a Compact UBUS backplane, and the
bridge board can be installed in the leftmost slot of a CPCI backplane.
If Option 2C is ordered, stacking “prong” connectors J11A and J12A are provided at the same locations on the
solder side of the board. These provide connection to mating socket connectors on the component side of the
bridge board. In this configuration, the UMAC-CPCI Turbo CPU board can be installed in the leftmost slot of a
Compact UBUS backplane, and the bridge board can be installed in the rightmost slot of a CPCI backplane.
Factory-Use Connectors
There are several connectors on the interior of the board for factory setup and diagnostic use. These are not for
customer use.
Connections
7
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
8
Connections
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
BOARD LAYOUT
This diagram of the UMAC-CPCI Turbo CPU board shows the locations of the jumpers and connectors. Detailed
information about each of the jumpers and connectors follows.
UMAC-CPCI Turbo CPU Board Layout
Board Layout
9
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
10
Board Layout
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
JUMPER DESCRIPTIONS
Note:
Pin 1 of an E-point is masked by an "X" and a bold square in white ink on the composite side, and
by a square solder pad on the solder side.
E0: Reset-Lock Enable (Factory Use Only)
E Point &
Physical Layout
Location
Description
Jump pins 1 and 2 to lock the UMAC-CPCI Turbo CPU board in
the “reset” state to permit installation of on-board logic. This
setting for factory use only.
Default
No jumper
installed
Remove jumper to permit normal operation of board.
E1A: Servo and Phase Clock Direction Control
E Point &
Physical Layout
Location
Description
Jump pins 1 and 2 or remove jumper for the UMAC-CPCI system
to use its internally generated servo and phase clock signals and to
output these signals on the field wiring connector on the CPU
board. E1B should connect pins 2 and 3 or be removed.
Default
Pins 1-2
jumpered
Jump pins 2 and 3 for the UMAC-CPCI system to expect to
receive its servo and phase clock signals on J2 field-wiring
connector on the Turbo CPU board. E1B should also connect pins
1 and 2.
E1B: Servo/Phase Clock Source Control
E Point &
Physical Layout
Location
Description
Jump pin 1 to 2 to get phase and servo clocks from J7 RS422
connector. (from an external source such as another UMAC).
Default
Pins 2 – 3
jumpered
Jump pin 2 to 3 to get phase and servo clocks from J1 backplane
connector. (from an ACC-24C2x, or equivalent board).
Remove jumper to get phase and servo clocks from J2 Stack
connector. (from an ACC-2E or equivalent board)
E2: (Reserved for future use)
E Point &
Physical Layout
Location
Description
Default
No jumper
installed
Jumper Descriptions
11
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
E3: Re-Initialization on Reset Control
E Point &
Physical Layout
Location
Description
Default
Remove jumper for normal reset mode (default).
Jump pins 1 to 2 for re-initialization on reset.
No jumper
installed
E4: (Reserved for future use)
E Point &
Physical Layout
Location
Description
Default
No jumper
installed
E5: USB/Ethernet Communication Jumper
E Point &
Physical Layout
Location
Description
Default
Jump 1-2 for Ethernet or USB communications from J7 (Ethernet
connector) or J3 (USB connector).
Jump 2-3 for Ethernet or USB communications through the back
J2 connector
Factory
installed
E11: Power Supply Check Control
E Point &
Physical Layout
E11:
Location
Description
Default
Jump E11 pin 1 to 2 to include the +12V and –12V analog
supplies from the J1 backplane connector in the power-supply
check circuit, inhibiting outputs if these supplies fail.
No jumper
installed
Remove E11 jumper so only 5V digital supply is used in powersupply check circuit.
E17 – E18: Serial Port Select
E Point &
Physical Layout
E17:
E18:
Location
Description
Default
Jump E17 pin 1 to 2 to select RS-232 serial data input for main
serial port (J4 front-panel or J2 backside connector).
Pins 1-2
jumpered
Jump E17 pin 2 to 3 to select RS-422 serial data input for main
serial port (J4 front-panel or J2 backside connector).
Jump E18 pin 1 to 2 to select RS-232 serial handshake input for
main serial port (J2 backside connector only).
Pins 1-2
jumpered
Jump E18 pin 2 to 3 to select RS-422 serial handshake input f for
main serial port (J2 backside connector only).
12
Jumper Descriptions
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
E18A, B, C, D: Ethernet Communication Control
E Point & Physical
Layout
Location
Description
Jump 1 to 2 to Ethernet Connection to J7 front connector
1
1
1
E18D
E18C
E18B
Jump 2-3 for Ethernet connection through back J2 connector
Default
Pins 1-2
jumpered
E19: Watchdog Disable Jumper
E Point &
Physical Layout
Location
Description
Jump pin 1 to 2 to disable Watchdog timer (for test purposes
only.).
Default
No jumper
installed
Remove jumper to enable Watchdog timer.
E20 – E22: Power-Up/Reset Load Source
E Point &
Physical Layout
E20:
Location
Description
To load active memory from flash IC on power-up/reset,
Remove jumper E20;
Jump E21 pin 1 to 2;
Jump E22 pin 1 to 2.
Other combinations are for factory use only; the board will not
operate in any other configuration.
Default
No E20 jumper
installed
E21 and E22
jump pin 1 to 2
E23: Firmware Reload Enable
E Point &
Physical Layout
Location
Description
Jump pin 1 to 2 to reload firmware through serial or host bus port.
Remove jumper for normal operations.
Default
No jumper
installed
E25A, B, C: Flash Memory Firmware Bank Select
E Point &
Physical Layout
Location
Description
Remove all jumpers to select standard factory-installed bank of
operational firmware.
Default
No jumpers
installed
Install one or more jumper(s) to select alternate bank of operation
firmware to install (E23 ON) or use (E23 OFF).
W1: Flash IC Power Supply Select Jumper
B-1
(Note: This jumper is set at the factory and possibly hard soldered.
Users should not change this jumper.)
Jump pin 1 to 2 to select 3.3V supply for flash memory IC in U10.
Setting
dependent on
flash IC used.
Jump pin 2 to 3 to select 5V supply for flash memory IC in U10.
Jumper Descriptions
13
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
14
Jumper Descriptions
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
CONNECTOR SUMMARY
J1:
*
Compact UBUS Backplane Connector
J2:
*
“Thru-Backplane” Field Wiring Connector
J4:
*
RS-232 Front-Panel Serial-Port Connector
J5:
JTAG/OnCE (for factory use only): 10-pin IDC connector
J6:
JISP (for factory use only): 8-pin SIP connector
J10:
JISP_B (for factory use only) 8-pin SIP connector
J11:
First component-side stack connector to CPCI bridge board
J11A:
First solder-side stack connector to CPCI bridge board
J12:
First component-side stack connector to CPCI bridge board
J12A:
First solder-side stack connector to CPCI bridge board
*
Pinouts shown in next section. Connectors not flagged with an asterisk are for internal use or factory setup.
Connector Summary
15
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
16
Connector Summary
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
CONNECTOR PINOUTS
Compact UBUS Connector (J1) Pin-Out
Row
Z
A
B
C
D
E
F
25
GND
5V
3.3V
5V
GND
24
GND
BD02
5V
V(I/O)
BD01
BD00
GND
23
GND
3.3V
BD05
BD04
5V
BD03
GND
22
GND
BD09
BD08
3.3V
BD07
BD06
GND
21
GND
3.3V
BD13
BD12
BD11
BD10
GND
20
GND
BD17
GND
BD16
BD15
BD14
GND
19
GND
3.3V
BD20
BD19
GND
BD18
GND
18
GND
BD23
GND
3.3V
BD22
BD21
GND
17
GND
3.3V
{BD26}
{BD25}
GND
{BD24}
GND
16
GND
{BD30}
GND
{BD29}
{BD28}
{BD27}
GND
15
GND
3.3V
BWRBRDGND
{BD31}
GND
14
(KEY)
(KEY)
(KEY)
(KEY)
(KEY)
(KEY)
(KEY)
13
(KEY)
(KEY)
(KEY)
(KEY)
(KEY)
(KEY)
(KEY)
12
(KEY)
(KEY)
(KEY)
(KEY)
(KEY)
(KEY)
(KEY)
11
GND
CS10CS4CS3GND
CS2GND
10
GND
CS16GND
3.3V
CS14CS12GND
9
GND
IREQ2IREQ1MEMCS1GND
MEMCS0GND
8
GND
PHASE+
GND
SERVO+
WAITIREQ3GND
7
GND
PHASEWDO
SERVOGND
GND
6
GND
BA02
GND
3.3V
BA01
BA00
GND
5
GND
BA04
BA03
RESETGND
BX/Y
GND
4
GND
BA07
GND
V(I/O)
BA06
BA05
GND
3
GND
BA11
BA10
BA09
5V
BA08
GND
2
GND
{BA15}
5V
{BA14}
BA13
BA12
GND
1
GND
5V
-12V
PWRGUD
+12V
5V
GND
Notes:
1. Row 25 is physically at the top of the connector in its “normal” orientation; Row 1 is at the bottom.
Looking from the front of the rack, Column Z is on the left; Column F is on the right.
2. Supply (Vxx & xxV) and ground pins are in the same locations as the Compact PCI bus.
3. Spaces marked (KEY) are for the mechanical key; these are not pins.
4. Pins marked with {} brackets are reserved for future use; the signals inside the brackets are proposed
for future expansion to a 32-bit data bus and 16-bit address bus.
Connector Pinouts
17
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
UMAC-CPCI Turbo CPU Board J2 Connector
Row
Z
22
21
20
19
18
17
16
15
14
13
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
12
11
10
9
8
7
6
5
4
3
2
1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
A
B
RxD/
RDCS+
DSR
SERVO-
CTS
RD+
CSDTR
SERVO+
AuxRxD/
AuxDSR
AuxCTS
AuxDTR
USBDP
(D+)
EthTxF+
C
+5V
+5V
GND
GND
GND
EthTxF-
WD_NO
D
TxD/
SDRS+/
INIT/
PHASE-
PHASE+
AuxTxD/
AuxRTS
RTS
SD+
RS-
USBDM
(D-)
EthRxF+
WD_COM
E
WD_NC
EthRxF-
F
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
18
Row 25 is physically at the top of the connector in its “normal” orientation; Row 1 is at the bottom.
Looking from the front of the rack, Column Z is on the left; Column F is on the right.
The RxD/, CTS, TxD/, and RTS lines are standard RS-232 signals. The inputs are only used if
jumpers E17 and E18 each connect their pins 1 and 2. The DSR and DTR lines are simply shorted
together.
The RD-, RD+, SD-, SD+, CS+, CS-, RS+, and RS- lines are standard RS-422 signals. The inputs are
only used if jumpers E17 and E18 each connect their pins 2 and 3.
The SERVO-, SERVO+, PHASE- and PHASE+ clock lines are at RS-422 levels. These signals are
outputs if jumper E1A connects its pins 1 and 2; they are inputs if jumper E1A connects pins 2 and 3.
The AuxRxD/, AuxCTS, AuxTxD/, and AuxRTS lines are standard RS-232 signals. These signals are
provided only if the Option 9T auxiliary serial port is ordered. The AuxDSR and AuxDTR lines are
simply shorted together.
The USBDP(D+) and USBDM(D-) signals are standard USB signals. They are only provided if the
Option 1A USB interface is ordered.
The EthTxF+, EthTxF-, EthRxF+, and EthRxF- signals are standard Ethernet signals. They are only
provided if the Option 1 Ethernet interface is ordered.
The WD_NO (normally open), WD_COM (common) and WD_NC (normally closed) lines are the
outputs of the watchdog-timer hard-contact relay. The normally open contact is only conducting to
common if the card is powered and operating correctly. The normally closed contact is only
conducting to common if the card is not powered or the watchdog timer has tripped.
Connector Pinouts
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
J4: RS-232 Serial Port Connector (DB-9S Connector)
Pin #
Symbol
Function
Description
Notes
1
N.C.
No connect
2
TXDOutput
Send Data
Low TRUE
3
RXDInput
Receive Data
Low TRUE
4
DSR
Bidirect
Data Set Ready
Shorted to DTR
5
GND
Common
UMAC CPCI Reference
6
DTR
Bidirect
Data Terminal Ready
Shorted to DSR
7
CTS
Input
Clear to Send
High TRUE
8
RTS
Output
Request to Send
High TRUE
9
N.C.
No connect
Jumpers E17 and E18 should connect pins 1 and 2 to use this port for RS-232 communications; they should connect pins 2
Connector Pinouts
19
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
20
Connector Pinouts
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
ACCESSORIES
The UMAC-CPCI Turbo CPU board is always used with accessory boards. Delta Tau provides several accessory
boards in the UMAC-CPCI family that can be used with the CPU board; other parties may produce accessory
boards as well. Each accessory board has its own hardware reference manual.
ACC-Cx Compact UBUS Backplane Boards
The ACC-Cx family of “Compact UBUS” backplane
boards provides the means for the CPU board to
communicate with other accessory boards. The “x” in
the name of the backplane board refers to the number
of backplane data slots provided.
This picture shows an ACC-C8 8-slot backplane board.
It has a P47-style power connector suitable for a
standard 1-slot CPCI-format power supply.
ACC-8CR Test Breakout Board
The ACC-8CR board provides a “behind-the-backplane” breakout scheme for the J2 field wiring connector on
any of the 3U-format UMAC-CPCI board. It is designed to plug into the rear of an ACC-Cx Compact UBUS
backplane board, and it meets the Compact PCI physical specification (100mm x 80mm) for rear distribution
boards. It has 110 screw-down terminal points, one for each signal on the J2 field wiring connector.
ACC-11C Sinking I/O Board
The ACC-11C board provides 32 isolated 12V-24V
sinking inputs and 16 isolated sinking outputs up to
24V and 100mA per output. With its Option 1
mezzanine board, an additional 32 inputs and 16
outputs are provided, for a total of 96 I/O points in a
single slot.
ACC-24C2 PWM Axis Board
The ACC-24C2 PWM axis board provides the interface circuitry for 4 axes of purely digital control in a single
slot, with direct PWM outputs, serial ADC inputs, quadrature encoder inputs, and input/output flags. Because of
pin limitations on the J2 field wiring connector, signals that are differential on other ACC-24x2 boards are singleended here. To take these signals any significant distance, differential line drivers and receivers are required on a
distribution board.
Accessories
21
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
ACC-24C2A Analog Axis Board
The ACC-24C2A analog axis board provides the
interface circuitry for 4 axes of control in a single slot,
with analog interface to the servo drives. It also has
one pulse-and-direction output per axis for stepper
drives, or stepper-replacement servo drives. One 18-bit
D/A converter comes standard for each axis; Option 1
provides a second D/A converter per axis, which can be
used as part of a “sine-wave” control scheme, or for
non-servo use. Option 2 provides eight 12-bit A/D
converters.
ACC-51C Analog Encoder Interpolator Board
The ACC-51C provides the circuitry for the high-resolution interpolation of 2 or 4 analog “sine/cosine” encoders,
yielding 4096 states per line of the encoder. The board comes standard with 2 channels of interface; Option 1
provides 2 additional channels.
22
Accessories
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
+5V
+3P3V
RP10A
2
PHASE+
.1UF
4
U28
3.3KSIP8I
OSC_OUT
GND
RP10C
5
6
R10
1K
SERVO+
C32
+3P3V
7
U7
A6
A7
A8
A9
TDO
TCK
+3P3V
RESETTMS
C23
A10
A11
.1UF
A12
A13
A14
A15
DETRST-
HEADER14_NO8
J6
C24
1
2
3
4
MODE
GND
SCLK
A19X/YP
WR-
+3P3V
(jisp)
J6
+3.3V
SDO
SDI
ispEN-
A17
A15
ISPEN-
RDBA05
.1UF
BA06
BA07
BA08
BA09
MODE
6
7
8
WRC25
BA10
BA11
.1UF
BA12
BA13
+3P3V
HSIP8NO5
C21
.01UF
BA14
BA15
GND
BA10
BA11
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
OE1
A0
A1
GND
A2
A3
VCC
A4
A5
GND
A6
A7
A8
A9
GND
A10
A11
VCC
A12
A13
GND
A14
A15
OE2
RP11B
3
BA04
BA05
3.3KSIP8I
BA06
BA07
BA08
BA09
3.3KSIP8I
PHASE-
SIRQ-
6
RP11D
7
+3P3V
4
RP11C
5
BA10
BA11
BA12
BA13
MAX3100CEE
(QSOP)
BA14
BA15
RP1E
3.3K
RP1D
3.3K
RP3D
3.3K
GND
5
RP2C
RP1A
3.3K
6
2
RX
BRDBA05_A
BA10_A
BA11_A
BA12_A
BA13_A
BA14_A
C94
MAX3232ECWE
(SOL16)
22pf
RP3A
3.3K
RP2A
ENA422
(SO14)
2
PHASE-
1
PHASE+
2
3
5
ENA_P2-
RESET
6
4
5
2
E1B
74ACT14
(SO14)
3
ENA_P1-
ENA_P1-
SERVO+
6
SERVO-
7
8
1
2
3 E1A
CARD0
CARD0
IN-A
IN-A
+5V
OUT-A
IN-B
EN-A,C
OUT-B
OUT-C
EN-B,D
15
IN-D
GND
IN-D
13
RXD
+5V
12
11
3
CTS-
1
10
3
9
1
3
C40
PHASE-
U38B
4
U9
WAIT2-
1
WAIT2-
2
.1UF
GND
5
SERVO-
4
NC7SZ00
(SOT23-5)
5
TA-
6
74ACT08
(SO14)
7
SERVO+
8
3
WAIT1-
WAIT1-
6
9
SER
SER
GND
10
N.C.
19
IN-B
OUT-B
OUT-A
EN-A,C
OUT-C
N.C.
N.C.
OUT-B
EN-B,D
OUT-D
OUT-C
OUT-D
GND
IN-D
+5V
2
TXD
.1UF
4
18
TXD
12
17
RXD
13
16
RTS-
11
15
CTS-
10
14
RXEN-
11
RTS-
GND
.1UF
.1UF
GND
24
48
6
30
12
18
36
42
VCCIO
VCCIO
VCC
VCC
GND
GND
GND
GND
IOCS_A
IOCS_B
DPRCS0
DPRCS1
VMECS0
VMECS1
N.C.
N.C.
PWRG
5
43
PWRG
CPURSTGND
PI74FCT16245ATA
(TSSOP48)
CS04CS06CS10CS12CS14CS16CS4MEMCS0MEMCS1PWRGUD
CS00CS02CS04CS06CS10CS12CS14CS16CS4MEMCS0MEMCS1PWRGUD
C1
.1UF
X/Y:$078800-$0789FF
IOCS_AIOCS_BDPRCS0VMECS0-
IOCS_AIOCS_BDPRCS0VMECS0-
U4B
2
4
5
(SO14)
74ACT14
74ACT14
(SO14)
RP20
Q4
3
SOT23
2N7002
(SOT23)
GND
X/Y:$078A00-$078AFF
X/Y:$078B00-$078BFF
X/Y:$078C00-$078CFF
X/Y:$078D00-$078DFF
C35
3.3KSIP10C
U27
2
3
4
5
6
7
8
9
BRXD
BCTSSER_A
PHA_A
BHA2
BHA1
BHA0
MODD/IRQDHACKT/RRESET
X/Y:$078E00-$078EFF
X/Y:$078F00-$078FFF
X/Y:$078400-$0787FF
X/Y:$068000-$06FFFF EXTENDED MEMORY OFF_BOARD (32K)
X/Y:$074000-$077FFF
1
19
T/R
OE
B0
B1
B2
B3
B4
B5
B6
B7
VCC
GND
18
17
16
15
14
13
12
11
RXD
CTSBSER
BPHA
BSA02
BSA01
BSA00
IRQB-
2
3
RP12B
BSA02
BSA01
BSA00
IRQB-
E19
E0
+ C34
1UF
35V
tant
R4
100K
10
RESET
6
9
74ACT08
(SO14)
J4
RESET
RT. angle through (JRS232)
J4
Front Panel
DB9F
3
SOT23
2N7002
(SOT23)
N.C.
MainDTR
MainTXDMainCTS
MainRXDMainRTS
MainDSR
N.C.
GND
1
6
2
7
3
8
4
9
5
MainTxDMainCTS
MainRxDMainRTS
NMIN.C.
VCC
N.C.
NMI
N.C.
RST
N.C.
RST
16
15
14
13
12
11
10
9
NMI-
U4D
9
8
WDO
WDO
(SO14)
74ACT14
SERVOSERVO+
PHASEPHASE+
U4E
C2
DS1231S
(SOL16)
11
10
1
1
3
5
7
RP15
2 R_SERVO4 R_SERVO+
6 R_PHASE8 R_PHASE+
R_SERVOR_SERVO+
R_PHASER_PHASE+
33SIP8I
.1UF
9
8
7
6
5
4
3
2
1
NOTE:
MMBD301LT1
GND
D2
LED
GRN
PWR
"Vbat" s/b 30mil trace
+3P3V
.1UF
PHASE
3
Vbat
2
3
4
11
R7
100
10
BSER
BT1
2
1
3
3
4
3
VOUT
BATT
VCC
RST
ON
CEO
GND
CEI
SHEET2
8
7
RESET-
6
BBRCS-
5
BBRAMCS-
8
74ACT14
(SO14)
RESET-
625-0SH2
SHEET3
BBRCS-
625-0SH3
TRST-
MMBD301LT1
3
NC7SZ08M5
(SOT23-5)
1
U33D
9
E1B EMPTY = ENABLE `PHASE & SERVO' FROM `J12/J12A'
R6
1K
U2
2
MMBD301LT1
D6
1
4
ON = ENABLE `PHASE & SERVO' FROM `P2'
OFF = DISABLE `PHASE & SERVO' FROM `P2'
ON = ENABLE `PHASE & SERVO' FROM `P1'
OFF = DISABLE `PHASE & SERVO' FROM `P1'
RESET_A
MAX795SCSE
(SO8)
RESET_A
.01FARAD
FM0H103Z
NEC
C17
C16
.1UF
1
1
CPURST-
74ACT14
(SO14)
5
U50
RESET-
E1B 2 TO 1
E1B 2 TO 1
E1B 2 TO 3
E1B 2 TO 3
D5
+
3.6V BAT
(SOT23)
74ACT14
(SO14)
+5V
R5
1K
2
MMBT3906LT1
U33E
12
3
Vout
Vout
74ACT14
(SO14)
U33F
13
E1A 2 TO 1 = ENABLE `CARD0'
E1A 2 TO 3 = DISABLE `CARD0'
BPHA
Q3
SERVO
D1
LED
RED
WD
U33B
C15
.1UF
Delta Tau Data Systems, Inc.
Q2
2N7002
(SOT23)
3
SOT23
GND
GND
Accessories
MainCTS
8
ENA422
3
N.C.
IN
N.C.
MODE
N.C.
TOL
N.C.
GND
C92
+5V
GND
Firmware (64K)
User Written Phase (1K)
User Written Servo (2K)
Plcc Standard Memory Option (64K)
Plcc Extended Memory Option (448K)
MainRTS
18
CHGND
1
2
3
4
5
6
7
8
.1UF
JUMP `E0'
TO LOAD
`isp' PART
MainRxD-
(SO14)
74ACT14
74ACT14
(SO14)
SERVO
MainCTS
U38C
U3
1
10
1
PRAM MEMORY P:
$000000-$00FFFF
$040000-$0403FF
$040400-$040BFF
$050000-$05FFFF
$050000-$0BFFFF
PHASE
9
MainTxD-
D4
U33A
RP14
3.3KSIP10C
.1UF
PI74FCT245TL
(TSSOP20)
MainRTS
2
Q1
MMBT3906LT1
(SOT23)
C111
1
C88
20
10
IRQBRXD
CTSWAIT1WAIT2-
HREQ-
TXEN
1KSIP6I
RP13
3.3KSIP10C
IPOS
BFUL
EROR
F1ER
CTS
RXEN
MainRxD-
8
10
1KSIP10C
Title
UMAC-CPCI-CPU, DSP56309 CPU SECTIO
2
VCC
GND
IPOS
BFUL
EROR
F1ER
ENA422
HREQTXD
RTS-
CTS
MainTxD-
14
MMBD301LT1
3
1
T/R
OE
18
17
16
15
14
13
12
11
RTS
15
GND
RP12C
1KSIP6I
20
10
GND
2
3
4
5
6
7
8
9
RESET
1
19
B0
B1
B2
B3
B4
B5
B6
B7
RTS
LTC1384CS
(SOL18)
(SO14)
74ACT14
Q5
U34
A0
A1
A2
A3
A4
A5
A6
A7
RXD
GND
.1UF
+5V
+5V
2
3
4
5
6
7
8
9
TXD
RXD
6
D3
+5V
BSTD1
BSRD1
BSCK1
BSC12
BSC11
BHREQBTXD
BRTS-
TXD
4
1
(32K)
10
RP12A
1KSIP6I
.01UF
A0
A1
A2
A3
A4
A5
A6
A7
74LCX245
(TSSOP20)
X/Y:$060000-$067FFF EXTENDED MEMORY ON_BOARD
X/Y:$070000-$073FFF
1
WDTC
C2-
.1UF
C104
5
U4C
3
10K
+3P3V
GND
TURBO-DECODE5
ispLSI2032E-135LT48
(TQFP48)
1
1
X/Y:$078200-$0782FF
X/Y:$078300-$0783FF
.1UF
U4A
R3
INIT-
1
INIT-
2
CS00CS02-
CS2CS3-
X/Y:$078000-$0780FF
X/Y:$078100-$0781FF
2
CS2CS3-
CS0CS1-
1
CS0CS1-
5
46
47
38
39
40
41
.1UF
6
C87
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
2
C86
T/R1
B0
B1
GND
B2
B3
VCC
B4
B5
GND
B6
B7
B8
B9
GND
B10
B11
VCC
B12
B13
GND
B14
B15
T/R2
VC2+
C1-
GND
1
+5V
RESET
44
45
OE1
A0
A1
GND
A2
A3
VCC
A4
A5
GND
A6
A7
A8
A9
GND
A10
A11
VCC
A12
A13
GND
A14
A15
OE2
2
31
CS4
CPURST-
U51
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
.1UF
20
21
22
23
25
26
27
28
33
34
35
37
C1+
C101
+5V
10
RESET-
BSCAN
TDI/A16
TDO/A17
TCK
TMS
IOCS-
2
1
7
8
19
29
32
CS0
CS1
CS2
CS3
CS00
CS02
CS04
CS06
CS10
CS12
CS14
CS16
2
3
4
5
6
7
8
9
ISPENA16
A17
WRMODE
IOCS
R2
1K
.1UF
C105
7
RP25
GND
C153
+V
12
C36
U6B
1
.1UF
+5V
C106
13
N.C.
IN-C
MC75174BDW
(SOL20)
C152
20
1
5
4
2
U29
3
.1UF
C103
VCC
OUT-A
E18
2
VSS
+3P3V
IN-A
E17
C102
C100
9
8
7
6
5
4
3
2
2
JUMP 1 TO 2 TO ENABLE "RS232" TRANSCEIVER
JUMP 2 TO 3 TO ENABLE "RS422" TRANSCEIVER
JUMP 1 TO 2 TO DIS PHASE,SERVO,INIT ON `J2'
JUMP 2 TO 3 TO ENA PHASE,SERVO,INIT ON `J2'
14
OUT-D
IB-C
E17
E18
16
U31
1
PHASE+
R15
15K
+5V
IN-B
IN-C
422_RD422_RD+
422_SD422_SD+
422_CS+
422_CS422_RS+
422_RS-
.1UF
VCC
MC3486D
(SO16)
PHA
PHA
A14
WR
RD
FLASHCS
DRAMCS
PRAMCS
A8
A9
A10
A11
A15
AuxCTS
GND
.1UF
1
3
4
9
10
11
13
14
15
16
17
AuxRTS
1
R14
15K
GND
3
74ACT08
U30
.1UF
AuxRxD-
RX
C113
U38A
1
U33C
BA14
BWRBRDFLASHCSDRAMCSPRAMCSBA08
BA09
BA10
BA11
BA15
AuxCTS
AuxTxD-
RP3E
3.3K
.1UF
+3P3V
BA14_A
1
FLASHCSDRAMCSPRAMCS-
8
+3P3V
C26
BA10_A
BA11_A
BA12_A
BA13_A
.1UF
CTS
AuxRTS
422_RD422_RD+
422_SD422_SD+
422_CS+
422_CS422_RS+
422_RS-
ENA_P2-
C150
CTS
AuxTxDAuxRxD-
7
BA06_A
BA07_A
BA08_A
BA09_A
GND
C151
RTS
13
.1UF
74LCX16245
(TSSOP48)
GND
RXD
RTS
.1UF
14
+5V
+3P3V
C27
BX/Y
BWR-
BA06_A
BA07_A
BA08_A
BA09_A
22pf
RXD
5
SOCKET REQ'D
EXTAL
BHACK-
BRDBA05_A
C93
TXD
GND
+3P3V
BA14
BA15
BX/Y
BWR-
Y2
TXD
4
8
3.3KSIP8I
+3P3V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
9
C2-
GND
GUARD BAND
T/R1
B0
B1
GND
B2
B3
VCC
B4
B5
GND
B6
B7
B8
B9
GND
B10
B11
VCC
B12
B13
GND
B14
B15
T/R2
10
ECS-36-20-5P
3.6864Mhz
SERVO-
BA12
BA13
74LCX16245
(TSSOP48)
U8
GUARD BAND
OSC_OUT
HACK-
BA06
BA07
BA08
BA09
2
3.3KSIP8I
10
(SO14)
74ACT14
RP11A
1
19.6608Mhz
C2+
C1-
10
TDI
BA04
BA05
19.6608Mhz
C1+
.1UF
C98
17
A4
A5
.1UF
+3P3V
BA02
BA03
R1
12
12
6
V-
VCC
PRDY
ISPEN-
BA02
BA03
13
11
+V
16
(JTAG/OnCE)
J5
TSI
1
GND
2
TSO
3
GND
4
TCK
5
GND
6
N.C.
7
RST9
TMS
10
+3.3V
11
N.C.
12
DE13
TRST14
BA00
BA01
1
PRDY
BA00
BA01
3
.1UF
16
15
14
13
12
11
10
9
VCC
TX
RX
RTS
N.C.
CTS
X1
X2
5
A2
A3
T/R1
B0
B1
GND
B2
B3
VCC
B4
B5
GND
B6
B7
B8
B9
GND
B10
B11
VCC
B12
B13
GND
B14
B15
T/R2
DIN
DOUT
SCLK
CS
N.C.
IRQ
SHDN
GND
1
J5
+3P3V
C22
OE1
A0
A1
GND
A2
A3
VCC
A4
A5
GND
A6
A7
A8
A9
GND
A10
A11
VCC
A12
A13
GND
A14
A15
OE2
8
3.3KSIP8I
U4F
1
2
3
4
5
6
7
8
9
A0
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
6
3.3KSIP10C
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1
.1UF
U43
STD0
SRD0
SCK0
SC02
5
RP4
10
1
3.3KSIP8I
RP10D
2
.1UF
C96
C97
16
C95
RP10B
3
VCC
10UF
16V
(TANT)
1
GND
+
1
C39
2
+3P3V
+
1
C14
10UF
16V
(TANT)
C99
TP7
SIRQ-
VSS
1
3.3KSIP8I
15
+3P3V
2
+5V
6
THIS DOCUMENT IS THE CONFIDENTIAL PROPERTY OF DELTA TAU
DATA SYSTEMS INC. AND IS LOANED SUBJECT TO RETURN UPON
DEMAND. TITLE TO THIS DOCUMENT IS NEVER SOLD OR
TRANSFERRED FOR ANY REASON. THIS DOCUMENT IS TO BE USED
ONLY PURSUANT TO WRITTEN LICENSE OR WRITTEN INSTRUCTIONS
OF DELTA TAU DATA SYSTEMS INC. ALL RIGHTS TO DESIGNS AND
INVENTIONS ARE RESERVED BY DELTA TAU DATA SYSTEMS INC.
POSSESSION OF THIS DOCUMENT INDICATES ACCEPTANCE OF THE
ABOVE AGREEMENT.
|Link
|625-0SH2.sch
|625-0SH3.sch
Size
D
Document Number
Date:
Monday, January 14, 2002
Rev
-
603625-322A
Sheet
1
of
3
23
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
THIS DOCUMENT IS THE CONFIDENTIAL PROPERTY OF DELTA TAU
DATA SYSTEMS INC. AND IS LOANED SUBJECT TO RETURN UPON
DEMAND. TITLE TO THIS DOCUMENT IS NEVER SOLD OR
TRANSFERRED FOR ANY REASON. THIS DOCUMENT IS TO BE USED
ONLY PURSUANT TO WRITTEN LICENSE OR WRITTEN INSTRUCTIONS
OF DELTA TAU DATA SYSTEMS INC. ALL RIGHTS TO DESIGNS AND
INVENTIONS ARE RESERVED BY DELTA TAU DATA SYSTEMS INC.
POSSESSION OF THIS DOCUMENT INDICATES ACCEPTANCE OF THE
ABOVE AGREEMENT.
(JEXP_A)
J11
BD00_A
BD02_A
BD04_A
BD06_A
BD08_A
BD10_A
BD12_A
BD14_A
J1
BA00_A
BA02_A
BA04_A
BA06_A
BA08_A
BA10_A
BA12_A
BX/Y_A
J1-1
+5V
{BA15}
BA11
BA07
BA04
BA02
PHASEPHASE+
IREQ2CS16CS10(KEY)
(KEY)
(KEY)
+3.3V
{BD30}
+3.3V
BD23
+3.3V
BD17
+3.3V
BD09
+3.3V
BD02
+5V
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A1
A2
A3 BA11_B
A4 BA07_B
A5 BA04_B
A6 BA02_B
A7 PHASE_BA8 PHASE_B+
A9 IREQ2A10 CS16A11 CS10A12
A13
A14
A15
A16
A17
A18 BD23_B
A19
A20 BD17_B
A21
A22 BD09_B
A23
A24 BD02_B
A25
+5V
EQU_1-
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
BA10_B
BA03_B
WDO_B
IREQ1CS4-
+5V
GND
HPBD0
HPBD2
HPBD4
HPBD6
HR/W
BSA00
CPCIDPRCS00CS04CS0BWR_A-
+3P3V
+3P3V
+3P3V
+3P3V
+5V
RESET_A
19.6608Mhz
-12V
+5V
GND
GND
IRQB-
CS4-
BD13_B
BD08_B
BD05_B
BD00_A
BD02_A
BD04_A
BD06_A
BD08_A
BD10_A
BD12_A
BD14_A
BD16_A
BD18_A
BD20_A
BD22_A
BA00_A
BA02_A
BA04_A
BA06_A
BA08_A
BA10_A
BA12_A
BX/Y_A
GND
+5V
PWRGUD
+3P3V
MEMCS1+3P3V
HPBD1
HPBD3
HPBD5
HPBD7
HDSBSA01
VMECS0CS02CS06CS1BRD_APHASE
WDO
INIT-
SDA
+5V
GND
HPBD1
HPBD3
HPBD5
HPBD7
HDSBSA01
VMECS0CS02CS06CS1BRD_A-
JEXP
Modified
WDO
INIT-
SDA
GND
-5V
-12V
BA13_B
BA01_B
WAIT2CS14-
C82
IOCS_AD0
D1
IOCS_A-
+12V
+5V
C45
D2
D3
.1UF
D4
D5
+3P3V
GND
GND
WAIT2GND
D6
D7
D8
D9
CS14-
C46
D10
D11
.1UF
D12
D13
+3P3V
GND
BD15_B
BD11_B
BD07_B
BD01_B
GND
GND
D14
D15
+5V
+3P3V
D16
D17
J1-5
E1
E2 BA12_B
E3 BA08_B
E4 BA05_B
E5 BX/Y_B
E6 BA00_B
E7
E8 IREQ3E9 MEMCS0E10 CS12E11 CS2E12
E13
E14
E15
E16
E17
E18 BD21_B
E19 BD18_B
E20 BD14_B
E21 BD10_B
E22 BD06_B
E23 BD03_B
E24 BD00_B
E25
+5V
GND
+3P3V
GND
BD22_B
BD01_A
BD03_A
BD05_A
BD07_A
BD09_A
BD11_A
BD13_A
BD15_A
BD17_A
BD19_A
BD21_A
BD23_A
BA01_A
BA03_A
BA05_A
BA07_A
BA09_A
BA11_A
BA13_A
WAIT2-
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
WAIT2-
(JEXP_B)
J12A
+5V
+3P3V
U25
BA06_B
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
HEADER 20X2(MALE)
HW2015GD450SM
SOLDER SIDE
DIRECTLY UNDER J11
HW20-09-GD-450-SM
CS3-
CONN175-CPCI
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12
E13
E14
E15
E16
E17
E18
E19
E20
E21
E22
E23
E24
E25
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
(JEXP_A)
J11A
GND
J1-4
+5V
BA12
BA08
BA05
BX/Y
BA00
N.C.
IREQ3MEMCS0CS12CS2(KEY)
(KEY)
(KEY)
{BD31}
{BD27}
{BD24}
BD21
BD18
BD14
BD10
BD06
BD03
BD00
+5V
WAIT2-
HEADER 25X2(FEM)
CLS125LDDV
GND
BD20_B
C1 PWRGUD
C2
C3 BA09_B
C4 V_I/O
C5 RESET_B
C6
C7 SERVO_BC8 SERVO_B+
C9 MEMCS1C10
C11 CS3C12
C13
C14
C15 BRD_BC16
C17
C18
C19 BD19_B
C20 BD16_B
C21 BD12_B
C22
C23 BD04_B
C24 V_I/O
C25
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
BA01_A
BA03_A
BA05_A
BA07_A
BA09_A
BA11_A
BA13_A
BWR_B-
U20
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
SCL
BSA02
SSM-125-L-DV-LC
CONN175-CPCI
+12V
BA13
+5V
BA06
GND
BA01
GND
WAITGND
CS14GND
(KEY)
(KEY)
(KEY)
GND
{BA28}
GND
DB22
GND
BD15
BD11
BD07
+5V
BD01
+3.3V
PWRG
SCL
BSA02
GND
+5V
+12V
IRQB-
GND
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
HPBD0
HPBD2
HPBD4
HPBD6
HR/W
BSA00
CPCIDPRCS00CS04CS0BWR_ASERVO
RESET_A
19.6608Mhz
PWRG
GND
J1-3
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
BD01_A
BD03_A
BD05_A
BD07_A
BD09_A
BD11_A
BD13_A
BD15_A
(JEXP_B)
J12
+3P3V
CONN175-CPCI
PWRGUD
{BA14}
BA09
V(I/O
RESET+3.3V
SERVOSERVO+
MEMCS1+3.3V
CS3(KEY)
(KEY)
(KEY)
BRD{BA29}
{BA25}
+3.3V
BD19
BD16
BD12
+3.3V
BD04
V(I/O)
N.C.
BD01_A
BD03_A
BD05_A
BD07_A
BD09_A
BD11_A
BD13_A
BD15_A
BD17_A
BD19_A
BD21_A
BD23_A
BA01_A
BA03_A
BA05_A
BA07_A
BA09_A
BA11_A
BA13_A
WAIT2-
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
HEADER 20X2(FEM)
CLS120LDDV
SSM-120-L-DV-LC
EQU_1-
J1-2
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
CS16CS10-
CONN175-CPCI
-12V
+5V
BA10
GND
BA03
GND
WDO
GND
IREQ1GND
CS4(KEY)
(KEY)
(KEY)
BWRGND
{BD26}
GND
{BD20}
GND
BD13
BD08
BD05
+5V
N.C.
BD00_A
BD02_A
BD04_A
BD06_A
BD08_A
BD10_A
BD12_A
BD14_A
BD16_A
BD18_A
BD20_A
BD22_A
BA00_A
BA02_A
BA04_A
BA06_A
BA08_A
BA10_A
BA12_A
BX/Y_A
+5V
+3P3V
C47
D20
D21
.1UF
EQU_2-
D18
D19
D22
D23
BA00
BA01
EQU_2MEMCS0CS12CS2+3P3V
C48
BA02
BA03
.1UF
BA04
BX/Y
BA12
BA13
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
OE1
A0
A1
GND
A2
A3
VCCA
A4
A5
GND
A6
A7
A8
A9
GND
A10
A11
VCCA
A12
A13
GND
A14
A15
OE2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
T/R1
B0
B1
GND
B2
B3
VCCB
B4
B5
GND
B6
B7
B8
B9
GND
B10
B11
VCCB
B12
B13
GND
B14
B15
T/R2
IDT74FCT164245TPA
(TSSOP48)
U21
48
T/R1
47 OE1
B0
A0
46
B1
45 A1
GND
44 GND
B2
43 A2
B3
42 A3
VCCB
VCCA
41
B4
40 A4
B5
39 A5
GND
38 GND
B6
37 A6
B7
36 A7
A8
B8
35
B9
34 A9
GND
33 GND
B10
32 A10
B11
31 A11
VCCB
30 VCCA
B12
29 A12
B13
28 A13
GND
27 GND
B14
26 A14
B15
25 A15
T/R2
OE2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
BRDBD00_A
BD01_A
BD02_A
BD03_A
BD04_A
BD05_A
IOCS_B-
+5V
+3P3V
C52
BD10_A
BD11_A
BD12_A
BD13_A
C51
D10
D11
.1UF
D12
D13
+5V
+3P3V
D14
D15
BRDBD16_A
BD17_A
BD20_A
BD21_A
D16
D17
+5V
+3P3V
C50
BA02_A
BA03_A
BA12_B
BA13_B
D18
D19
D20
D21
.1UF
BD22_A
BD23_A
BA00_A
BA01_A
BA04_A
BX/Y_A
D2
D3
D6
D7
D8
D9
BD14_A
BD15_A
BRD-
BD18_A
BD19_A
IOCS_BD0
D1
D4
D5
.1UF
BD06_A
BD07_A
BD08_A
BD09_A
IDT74FCT164245TPA
(TSSOP48)
GND
PHA
U22
D22
D23
BA00
BA01
C49
BA02
BA03
.1UF
BA04
BA05
+5V
+3P3V
+5V
R18
GND
GND
3.3K
BX/Y
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
OE1
A0
A1
GND
A2
A3
VCCA
A4
A5
GND
A6
A7
A8
A9
GND
A10
A11
VCCA
A12
A13
GND
A14
A15
OE2
T/R1
B0
B1
GND
B2
B3
VCCB
B4
B5
GND
B6
B7
B8
B9
GND
B10
B11
VCCB
B12
B13
GND
B14
B15
T/R2
IDT74FCT164245TPA
(TSSOP48)
U23
48
T/R1
47 OE1
B0
A0
46
B1
45 A1
GND
44 GND
B2
43 A2
B3
42 A3
VCCB
VCCA
41
B4
40 A4
B5
39 A5
GND
38 GND
B6
37 A6
B7
36 A7
A8
B8
35
B9
34 A9
GND
33 GND
B10
32 A10
B11
31 A11
VCCB
30 VCCA
B12
29 A12
B13
28 A13
GND
27 GND
B14
26 A14
B15
25 A15
T/R2
OE2
IDT74FCT164245TPA
(TSSOP48)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
BRDBD00_B
BD01_B
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
BRDBD16_B
BD17_B
1
PHA
2
3
R9 100
BD02_B
BD03_B
BD04_B
BD05_B
+5V
PHASE
C74
SERVO
PHASE
4
SERVO
.1UF
B
RE
DE
DI
A
GND
.1UF
8
7
PHASE_B-
6
PHASE_B+
5
PWRG
ADM1485JR
(SO8)
SCL
BSA02
GND
+5V
+12V
U26
SER
SER
1
2
BD12_B
BD13_B
VCC
R19 100
BD06_B
BD07_B
BD08_B
BD09_B
BD10_B
BD11_B
RO
+5V
C75
ENA_P1-
ENA_P1-
3
4
.1UF
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
HPBD0
HPBD2
HPBD4
HPBD6
HR/W
BSA00
CPCIDPRCS00CS04CS0BWR_ASERVO
RESET_A
19.6608Mhz
RO
VCC
B
RE
DE
DI
A
GND
8
7
SERVO_B-
6
SERVO_B+
HW25-09-GD-450-SM
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
HPBD1
HPBD3
HPBD5
HPBD7
HDSBSA01
VMECS0CS02CS06CS1BRD_APHASE
WDO
INIT-
+5V
GND
SDA
GND
-5V
-12V
HEADER 25X2(MALE)
HW2515GD450SM
SOLDER SIDE
DIRECTLY UNDER J12
5
ADM1485JR
(SO8)
BD14_B
BD15_B
BRD-
C83
.1UF
GND
BD18_B
BD19_B
BD20_B
BD21_B
+5V
C76
.1UF
BD22_B
BD23_B
BA00_B
BA01_B
BA02_B
BA03_B
BA04_B
BA05_B
BX/Y_B
+5V
C77
.1UF
+5V
GND
+5V
CONN175-CPCI
J1-6
GND
n.c.
GND
n.c.
GND
n.c.
GND
n.c.
GND
n.c.
GND
n.c.
GND
n.c.
GND
n.c.
GND
n.c.
GND
n.c.
GND
n.c.
GND
n.c.
GND
n.c.
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
F11
F12
F13
F14
F15
F16
F17
F18
F19
F20
F21
F22
F23
F24
F25
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
F11
F12
F13
F14
F15
F16
F17
F18
F19
F20
F21
F22
F23
F24
F25
+5V
U52
BA06
BA07
BA08
BA09
BA10
BA11
WDO
RESET_A
2
3
4
5
6
7
8
9
1
19
B0
B1
B2
B3
B4
B5
B6
B7
A0
A1
A2
A3
A4
A5
A6
A7
T/R
OE
VCC
GND
PI74FCT245TL
(TSSOP20)
18
17
16
15
14
13
12
11
BA06_B
BA07_B
BA08_B
BA09_B
BA10_B
BA11_B
WDO_B
RESET_B
20
10
C127
.1UF
Delta Tau Data Systems, Inc.
GND
Title
CONN175-CPCI
UMAC-CPCI-CPU, MEMORY & I/O SECTIO
GND
24
Accessories
Size
D
Document Number
Date:
Tuesday, January 15, 2002
Rev
-
603625-322A
Sheet
2
of
3
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
J2
J2-1
WD_COM
+5V
K1
+3P3V
ETHENA-
4
RAMENA-
1
3
USBDM
USBDP
R30
R29
1.5K
USBRST-
+3P3V
24.3
24.3
4
U62
BEAD
GND
A
C GND
GND
B
D GND
NMI-
NMI-
8
7
6
5
+5V
AuxRxD-
REMOVE `E11' FOR
DIGITAL ONLY USE
R_SERVO-
U66
U65
NC7SZ02M5
(SOT32-5)
EthExtTxF+
2N7002
1
EQU_1
2
WDO
WDO
U57
PSEN-
1
USBRD-
2
-5V
+12V
-12V
4
1
2
3
4
5
6
7
NC7SZ08M5
GND
3
USB-B
1
2
3
4
+3P3V
3
L5
.1UF
5
R31
GND
5
2.2UF
GND
1
2
3
4
5
6
C160
FBR12ND05
2
3
+
J3
Q7
3
SOT23
RAMCSRAMOE-
Avcc
VCC
DD+
GND
shell
shell
8
1
12
1
NC7SZ08M5
GND
WD_NO
10
MMBD301LT1
(SOT23)
2
2
NC7SZ00M5
0.1uF
C176
WD_NC
5
9
1
HOSTENA-
D13
1
4
C175
5
3
5
U54
U58
3
4
+3P3V
+3P3V
14
13
12
11
10
9
8
VDD
OUT1
OUT2
OUT3
OUT4
DOUT
PGND
VREF
GND
+5V
-5V
+12V
-12V
DIN
422_CS+
422_RDMainRxD1 E11
AuxRxDR_SERVO422_CS+
422_RDMainRxD-
2
WD_NO
GND
1
+3P3V
3
5
GND
+5V
2N7002
EthExtTxFRP22
3.3KSIP10C
4
IPOS
U64
AuxCTS
9
8
7
6
5
4
3
2
1
IPOS
2
XIN_1
CARD0
XIN_2
40/60
R_SERVO+
CARD0
XIN_3
E_51
E3
GND
XIN_4
TBD_0
XIN_5
ENA_P2-
XIN_6
ENA_P1-
XIN_7
PWRG
E4
5
+5V
U73
ENA_P2-
4
EQU_1-
2
PWRG
3
NC7SZ00
HREQ-
422_CS422_RD+
MainCTS
+5V
AuxCTS
R_SERVO+
422_CS422_RD+
MainCTS
SERVOMainDSR
422_CS+
422_RDMainRXD-
J10
(jisp_b)
J10
1
2
3
4
TDO_USB
TDI_USB
BSC_USBTMS_USB
6
7
8
TCK_USB
C191
WD_NO
EthExtTxFUSBDP
AuxDTR
AuxCTS
SERVO+
MainDTR
422_CS422_RD+
MainCTS
J2-3
WD_COM
GND
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
CONN154-CPCI
GND
ENA_P1-
1
EQU_1
E2
E3
E4
E2
3
NC7SZ02M5
(SOT32-5)
1
Q6
4
3
SOT23
NC7SZ00M5
2
10
U61
1
GND
2
5
GND
GND
AuxDSR
AuxRXD-
J2-2
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
INIT-
0.1uF
EthExtTxF+
CONN154-CPCI
.1UF
+5V
C20
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
E11
C190
MAX8215CSD
(SO14)
SN75240PW
CHGND
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
+5V
SDO
SDI
ispENMODE
GND
SCLK
+5V
HSIP8NO5
.01UF
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
WD_COM
GND
GND
GND
+5V
+5V
CONN154-CPCI
GND
GND
J2-4
WD_NC
+5V
U6
USBD0
USBD1
USBD2
USBD3
USBD4
USBD5
USBD6
USBD7
2
3
4
5
6
7
8
9
1
19
A0
A1
A2
A3
A4
A5
A6
A7
T/R
OE
B0
B1
B2
B3
B4
B5
B6
B7
VCC
GND
18
17
16
15
14
13
12
11
HPBD0
HPBD1
HPBD2
HPBD3
HPBD4
HPBD5
HPBD6
HPBD7
C28
HPBD0
HPBD1
HPBD2
HPBD3
HPBD4
HPBD5
HPBD6
HPBD7
EthExtRxF+
AuxTxDR_PHASEINIT422_RS+
422_SDMainTxD-
20
10
.1UF
PI74FCT245TL
(TSSOP20)
AuxTxDR_PHASEINIT422_RS+
422_SDMainTxD-
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
GND
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
WD_NC
EthExtRxF+
USBDM
AuxTXDPHASEINIT422_RS+
422_SDMainTXD-
CONN154-CPCI
J2-5
EthExtRxF-
OPTION 1
Ethernet Option
AuxRTS
3
EthExtRxF-
R_PHASE+
J7
422_RS422_SD+
MainRTS
2
1
U32
1
2
3
4
5
6
7
8
16
15
(1-3)(16-14)1:1 14
13
12
11
(6-8)(11-9)1:2.5 10
9
E18A
EthRxF-
1:1.41
EthExtRxF+
1
E18B
EthTxF-
3
EthExtTxF-
2
EthTxF+
1
E18C
ST7011
3
2
EthRxF+
3
2
10
9
8
7
6
5
4
3
2
1
AuxRTS
R_PHASE+
422_RS422_SD+
MainRTS
EthExtTxF+
RJ45
1
E18D
GND
10UF
16V
(TANT)
TP2
+3P3
C193
TP1
GND
+
10UF
16V
(TANT)
1SMC5.0AT3
TP4
+12V
TP3
+5V
+12V
HOLE
C194
CONN154-CPCI
GND
GND
-12V
+
10UF
25V
(TANT)
1SMC18AT3
TP6
-5V
(TAB IS INPUT)
(SOT223)
LT1175CST-5
D12
1SMC18AT3
1M
GND
CHGND
Accessories
VI
VR1
C195
10UF
25V
(TANT)
VO
3
-5V
Delta Tau Data Dystems, Inc.
2.0/Ethernet UMAC-CPCI Communication
1
2
-12V
HOLE
+
M4
0.1uF
R28
GND
HOLE
CE4
GND
n.c.
GND
n.c.
GND
n.c.
GND
n.c.
GND
n.c.
GND
n.c.
GND
n.c.
GND
n.c.
GND
n.c.
GND
n.c.
GND
n.c.
GND
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
F11
F12
F13
F14
F15
F16
F17
F18
F19
F20
F21
F22
+12V
D11
M3
0.1uF
422_RS422_SD+
MainRTS
TP5
-12V
M2
CE3
PHASE+
+5V
D10
HOLE
0.1uF
AuxRTS
+
1SMC5.0AT3
M1
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
F11
F12
F13
F14
F15
F16
F17
F18
F19
F20
F21
F22
+3P3V
C192
+5V
0.1uF
EthExtRxF-
J2-6
D9
CE2
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12
E13
E14
E15
E16
E17
E18
E19
E20
E21
E22
CONN154-CPCI
+3P3
CE1
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12
E13
E14
E15
E16
E17
E18
E19
E20
E21
E22
C196
.1UF
Title
GND
UMAC-CPCI-CPU, USB/2.0/Ethernet Sectio
Size
D
Document Number
Date:
Tuesday, January 15, 2002
Rev
-
603625-322A
Sheet
3
of
3
25
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
26
Accessories