clock and oscillator product selector guide

CLOCK AND OSCILLATOR
PRODUCT SELECTOR GUIDE
www.silabs.com
Frequency Flexibility
Engineered to support the widest frequency range for maximum design flexibility. Available in
industry standard RoHS compliant packages.
Ultra-Low Jitter
Based on our patented DSPLL® and MultiSynth technologies, these low jitter products improve
system performance, reduce BOM cost, minimize board space and simplify system design.
Shortest Lead Times
Silicon Labs changes the XO/VCXO manufacturing model, enabling short, predictable lead
times for any frequency oscillator.
FA L L 2 010
SELECTOR GUIDE
Clock Distribution
REQUEST SAMPLES AND DOWNLOAD DOCUMENTATION AT: www.silabs.com/clocks
DESCRIPTION :: Silicon Labs offers a wide range of low jitter, non-PLL based clock buffers. Ideal for clock distribution
and low jitter clock fanout, these products support a broad range of signal formats, including LVPECL, LVDS, HCSL,
CMOS, HSTL and SSTL. The Si5330 supports level translation in addition to clock buffering, eliminating the need for
external level translators.
FEATURES::
Si5330 BLOCK DIAGRAM
• 1:4 LVPECL, LVDS, HCSL buffers
• 1:8 CMOS, HSTL, SSTL buffers
• Low jitter: 150 fs typ (12 kHz - 20 MHz)
• Integrated level translation (e.g. differential to
single-ended or single-ended to differential)
• Best-in-class PSRR
VDD
Output Clock 0
VDDO 0
Output Clock 1
VDDO 1
In
Output Clock 2
VDDO 2
LOS
OEB
Control
Output Clock 3
VDDO 3
PART NUMBER
DESCRIPTION
CONTROL
INPUT
FREQUENCY
(MHz)
OUTPUT
FREQUENCY
(MHz)
FORMAT
ADDITIVE
JITTER
(TYP)
PACKAGE
Si5330A
1:4 differential to LVPECL clock buffer
Pin
5-710
5-710
LVPECL
150 fs rms
4 x 4 mm 24-pin QFN
Si5330B
1:4 differential to LVDS clock buffer
Pin
5-710
5-710
LVDS
150 fs rms
4 x 4 mm 24-pin QFN
Si5330C
1:4 differential to HCSL clock buffer
Pin
5-250
5-250
HCSL
150 fs rms
4 x 4 mm 24-pin QFN
Si5330F
1:8 single-ended to CMOS clock buffer
Pin
5-200
5-200
CMOS
150 fs rms
4 x 4 mm 24-pin QFN
Si5330G
1:8 differential to CMOS clock buffer
Pin
5-200
5-200
CMOS
150 fs rms
4 x 4 mm 24-pin QFN
Si5330H
1:8 differential to SSTL clock buffer
Pin
5-350
5-350
SSTL
150 fs rms
4 x 4 mm 24-pin QFN
Si5330J
1:8 differential to HSTL clock buffer
Pin
5-350
5-350
HSTL
150 fs rms
4 x 4 mm 24-pin QFN
Si5330K
1:4 single-ended to LVPECL clock buffer
Pin
5-350
5-350
LVPECL
150 fs rms
4 x 4 mm 24-pin QFN
Si5330L
1:4 single-ended to LVDS clock buffer
Pin
5-350
5-350
LVDS
150 fs rms
4 x 4 mm 24-pin QFN
Si5330M
1:4 single-ended to HCSL clock buffer
Pin
5-250
5-250
HCSL
150 fs rms
4 x 4 mm 24-pin QFN
C L O C K A N D O S C I L L AT O R S E L E C T O R / 3
Clock Generation
WEB-CONFIGURABLE CUSTOM PIN-CONTROLLED CLOCK GENERATORS AVAILABLE AT: www.silabs.com/ClockBuilder
DESCRIPTION :: Silicon Labs’ clock generators synthesize any frequency on any output. From any crystal or reference
clock input, these devices generate multiple unique, non-integer related output clocks with guaranteed 0 ppm frequency
synthesis error. Based on Silicon Labs’ breakthrough MultiSynth technology, each output clock can synthesize any
frequency, enabling a single clock generator to replace multiple discrete clock synthesizers, XOs and VCXO with a
single IC. Custom pin-controlled clock generators can be configured and ordered directly via the web, eliminating
MOQ and NRE restrictions typically associated with custom clock generators. In addition, I2C programmable clock
generators are available.
FEATURES::
Si5338 BLOCK DIAGRAM
• Any frequency, any-output clock generation
• Guaranteed 0 ppm frequency synthesis error
• Low phase jitter: <1 ps rms
• 1 to 4 inputs (crystal or clock)
• Any format, any output: LVPECL, LVDS, HCSL,
CMOS, HSTL, SSTL
• High linearity VCXO which operates from a
standard non-pullabe 25 or 27 MHz crystal
• 4 differential outputs or 8 single-ended outputs
• Independent VDDO per output eliminates
external level translators (1.8, 2.5, 3.3 V)
• Best-in-class PSRR
• Zero delay buffer mode
• Phase, frequency margining
• Mixed free run/synchronous mode
MultiSynth 0
Crystal
Osc.
÷R0
Output Clock 0
VDDO 0
Input Clock
Feedback Clock
÷P1
Phase
Frequency
Detector
÷P2
Loop
Filter
VCO
MultiSynth 1
÷R1
Output Clock 1
VDDO 1
MultiSynth
MultiSynth2
÷R2
I2 C
VDDO 2
I2C Address Select
LOL, LOS Alarms
Phase Inc/Dec
Output Clock 2
Control
MultiSynth3
NVM
÷R3
Output Clock 3
VDDO 3
Frequency Inc/Dec
VDD
Output Enable
GND
PART NUMBER
DESCRIPTION
CONTROL
INPUT
FREQUENCY (MHz)
OUTPUT
FREQUENCY (MHz)
FORMAT
JITTER
PACKAGE
Si5355
1:4 clock generator
Pin
25/27 (Xtal) or
5-200 (Clock)
1-200 MHz
CMOS
2 ps rms
4 x 4 mm 24-pin QFN
Si5356
1:4 clock generator
Pin
25/27 (Xtal) or
5-200 (Clock)
1-200 MHz
CMOS
2 ps rms
4 x 4 mm 24-pin QFN
SELECTOR GUIDE
Clock Generation (cont.)
PART NUMBER
DESCRIPTION
Si5334A
CONTROL
INPUT FREQUENCY OUTPUT FREQUENCY
(MHz)
(MHz)
Pin
Si5334B
1:4 clock generator
Si5334C
Pin
Pin
Si5334G
Pin
0.16-710 MHz
8-30 (Xtal) or
5-710 (Clock)
Pin
0.16-200 MHz
Si5334K
Pin
0.16-710 MHz
Si5334L
Pin
8-30 (Xtal) or
5-710 (Clock)
Pin
0.16-200 MHz
Si5338A
I2C
0.16-710 MHz
1:4 clock generator
I2C
8-30 (Xtal) or
5-710 (Clock)
I2C
0.16-200 MHz
Si5338D
I2C
0.16-710 MHz
1:4 clock generator + pin controlled
phase inc/dec
Si5338E
IC
2
8-30 (Xtal) or
5-710 (Clock)
I2C
0.16-200 MHz
Si5338G
I2C
0.16-710 MHz
1:4 clock generator + pin controlled
frequency inc/dec
Si5338H
I2C
8-30 (Xtal) or
5-710 (Clock)
I2C
0.16-200 MHz
Si5338K
I2C
0.16-710 MHz
1:4 clock generator + pin controlled
output enable
Si5338L
I2C
8-30 (Xtal) or
5-710 (Clock)
Si5338M
IC
0.16-200 MHz
Si5338N
I2C
0.16-710 MHz
Si5338P
4:4 clock generator
Si5338Q
I2C
8-30 (Xtal) or
5-710 (Clock)
I2C
1 ps rms
4 x 4 mm 24-pin QFN
4 x 4 mm 24-pin QFN
4 x 4 mm 24-pin QFN
CMOS, LVPECL, LVDS,
HCSL, SSTL, HSTL
1 ps rms
4 x 4 mm 24-pin QFN
4 x 4 mm 24-pin QFN
4 x 4 mm 24-pin QFN
CMOS, LVPECL, LVDS,
HCSL, SSTL, HSTL
1 ps rms
4 x 4 mm 24-pin QFN
4 x 4 mm 24-pin QFN
4 x 4 mm 24-pin QFN
CMOS, LVPECL, LVDS,
HCSL, SSTL, HSTL
1 ps rms
4 x 4 mm 24-pin QFN
4 x 4 mm 24-pin QFN
4 x 4 mm 24-pin QFN
CMOS, LVPECL, LVDS,
HCSL, SSTL, HSTL
0.16-350 MHz
2
4 x 4 mm 24-pin QFN
4 x 4 mm 24-pin QFN
CMOS, LVPECL, LVDS,
HCSL, SSTL, HSTL
0.16-350 MHz
Si5338J
1 ps rms
4 x 4 mm 24-pin QFN
0.16-350 MHz
Si5338F
4 x 4 mm 24-pin QFN
4 x 4 mm 24-pin QFN
CMOS, LVPECL, LVDS,
HCSL, SSTL, HSTL
0.16-350 MHz
Si5338C
1 ps rms
4 x 4 mm 24-pin QFN
0.16-350 MHz
Si5334M
Si5338B
4 x 4 mm 24-pin QFN
CMOS, LVPECL, LVDS,
HCSL, SSTL, HSTL
0.16-350 MHz
Si5334J
1:4 clock generator + pin controlled
spread spectrum
4 x 4 mm 24-pin QFN
0.16-350 MHz
0.16-200 MHz
Pin
4 x 4 mm 24-pin QFN
0.16-710 MHz
8-30 (Xtal) or
5-710 (Clock)
Pin
1:4 clock generator + pin controlled
frequency inc/dec
1 ps rms
4 x 4 mm 24-pin QFN
0.16-350 MHz
Si5334F
Si5334H
CMOS, LVPECL, LVDS,
HCSL, SSTL, HSTL
PACKAGE
0.16-200 MHz
Pin
1:4 clock generator + pin controlled
phase inc/dec
Si5334E
JITTER
0.16-710 MHz
8-30 (Xtal) or
5-710 (Clock)
Pin
Si5334D
FORMAT
1 ps rms
4 x 4 mm 24-pin QFN
4 x 4 mm 24-pin QFN
4 x 4 mm 24-pin QFN
CMOS, LVPECL, LVDS,
HCSL, SSTL, HSTL
1 ps rms
4 x 4 mm 24-pin QFN
0.16-200 MHz
4 x 4 mm 24-pin QFN
0.16-350 MHz
Si5350A
1:8 clock generator
Pin
25/27 (Xtal)
8 KHz-125 MHz
CMOS
100 ps pp
4 x 4 mm 20-pin QFN/
6 x 8 mm 24-pin QSOP
Si5350A
1:3 clock generator
Pin
25/27 (Xtal)
8 KHz-125 MHz
CMOS
100 ps pp
3 x 5 mm 10-pin MSOP
Si5350B
1:8 clock generator + VCXO
Pin
25/27 (Xtal)
8 KHz-125 MHz
CMOS
100 ps pp
4 x 4 mm 20-pin QFN/
6 x 8 mm 24-pin QSOP
Si5350B
1:3 clock generator + VCXO
Pin
25/27 (Xtal)
8 KHz-125 MHz
CMOS
100 ps pp
3 x 5 mm 10-pin MSOP
Si5350C
1:8 clock generator + PLL
Pin
25/27 (Xtal)
8 KHz-125 MHz
CMOS
100 ps pp
4 x 4 mm 20-pin QFN/
6 x 8 mm 24-pin QSOP
Si5350C
1:3 clock generator + PLL
Pin
25/27 (Xtal)
8 KHz-125 MHz
CMOS
100 ps pp
3 x 5 mm 10-pin MSOP
Si5351A
1:8 clock generator
I2C
25/27 (Xtal)
8 KHz-125 MHz
CMOS
100 ps pp
4 x 4 mm 20-pin QFN/
6 x 8 mm 24-pin QSOP
Si5351A
1:8 clock generator
I2C
25/27 (Xtal)
8 KHz-125 MHz
CMOS
100 ps pp
3 x 5 mm 10-pin MSOP
Si5351B
1:8 clock generator + VCXO
2
IC
25/27 (Xtal)
8 KHz-125 MHz
CMOS
100 ps pp
4 x 4 mm 20-pin QFN/
6 x 8 mm 24-pin QSOP
Si5351B
1:3 clock generator + VCXO
I2C
25/27 (Xtal)
8 KHz-125 MHz
CMOS
100 ps pp
3 x 5 mm 10-pin MSOP
Si5351C
1:8 clock generator + PLL
2
IC
25/27 (Xtal)
8 KHz-125 MHz
CMOS
100 ps pp
4 x 4 mm 20-pin QFN/
6 x 8 mm 24-pin QSOP
Si5351C
1:3 clock generator + PLL
I2C
25/27 (Xtal)
8 KHz-125 MHz
CMOS
100 ps pp
3 x 5 mm 10-pin MSOP
PART
NUMBER
CONTROL
CLOCK
INPUTS/
OUTPUTS
INPUT
FREQUENCY
(MHz)
OUTPUT
FREQUENCY
(MHz)
JITTER
(12 KHz TO 20
MHz)
Si5319
I2C or Pin
1/1
0.002 to 710
0.002 to 1417
300 fs rms typ
Si5324
I C or Pin
2/2
0.002 to 710
0.002 to 1417
290 fs rms typ
Si5326
I2C or Pin
2/2
0.002 to 710
0.002 to 1417
300 fs rms typ
Si5368
I C or Pin
4/5
0.002 to 710
0.002 to 1417
300 fs rms typ
2
2
PLL
HITLESS DIGITAL
VCO
FREERUN
BANDWIDTH SWITCHING HOLD
FREEZE
60 Hz to
8.4 kHz
4 Hz to
525 Hz
30 kHz to
1.3 MHz
60 kHz to
8.4 MHz
•
•
•
•
•
•
•
•
•
•
SIGNAL
FORMAT
•
PACKAGE
36-Pin QFN
CMOS,
LVDS,
LVPECL,
CML
36-Pin QFN
36-Pin QFN
100-Pin TQFP
C L O C K A N D O S C I L L AT O R S E L E C T O R / 5
Jitter Attenuators/Clock Cleaners
REQUEST SAMPLES AND DOWNLOAD DOCUMENTATION AT: www.silabs.com/clocks
DESCRIPTION :: Silicon Labs’ Precision Clocks provide flexible frequency synthesis, jitter attenuation and clock
distribution in high-performance timing applications requiring sub 1 ps jitter performance. The devices accept multiple
clock inputs ranging from 2 kHz to 710 MHz and generate multiple low jitter, independent, synchronous clock outputs
ranging from 2 kHz to 945 MHz and select frequencies to 1.4 GHz. The precision clocks are based on Silicon Labs’
proven third-generation DSPLL® technology, which generates any output frequency from any input frequency with 300
fs rms jitter performance in a highly integrated PLL solution that eliminates the need for external VCXO and loop filter
components.
FEATURES::
Si5324 BLOCK DIAGRAM
• Generates any output frequency from any
input frequency
• Ultra-low jitter: 290 fs RMS
• Integrated loop filter with selectable loop bandwidth
• Hitless switching with phase buildout (auto/manual)
• Holdover, freerun
• Best-in-class PSRR
• I2C/SPI or pin-controlled
• User-selectable output clock signal format
(LVPECL, LVDS, CML, CMOS)
• Single VDD for 1.8, 2.5 or 3.3 V
±10% operation
• In-system, flash-based programmable with
small form factor MCU
• Simplified set up using DSPLLsim configuration
software utility
Xtal or Refclock
CKIN1
÷N31
÷NC1
CKOUT1
÷NC2
CKOUT2
DSPLL®
CKIN2
÷N32
VDD (1.8, 2.5
or 3.3 V)
Loss of Signal/
Freq. Offset
Status/Control
GND
Loss of Lock
Clock Select/Status
Interrupt
Skew Control
Xtal/Refclock Select
I2C/SPI
PART
NUMBER
CONTROL
CLOCK
INPUTS/
OUTPUTS
INPUT
FREQUENCY
(MHz)
OUTPUT
FREQUENCY
(MHz)
JITTER
(12 KHz TO
20 MHz)
PLL
BANDWIDTH
Si5315
Pin
2/2
0.008 to 644
0.008 to 644
450 fs rms typ
60 Hz to 8 kHz
Si5317
Pin
1/2
1 to 710
1 to 710
Si5319
I2C or Pin
1/1
0.002 to 710
Si5323
Pin
2/2
Si5324
I2C or Pin
2/2
Si5326
I2C or Pin
2/2
0.002 to 710
Si5366
Pin
4/5
Si5368
I2C or Pin
4/5
HITLESS DIGITAL
FREERUN
SWITCHING HOLD
•
SIGNAL
FORMAT
•
PACKAGE
36-Pin QFN
290 fs rms typ
60 Hz to 8 kHz
0.002 to 1417 300 fs rms typ
60 Hz to 8 kHz
•
36-Pin QFN
0.008 to 707
0.008 to 1050 300 fs rms typ
60 Hz to 8 kHz
•
•
0.002 to 710
0.002 to 1417 290 fs rms typ
4 Hz to 525 Hz
•
•
•
0.002 to 1417 300 fs rms typ
60 Hz to 8 kHz
•
•
•
0.008 to 700
0.008 to 1050 300 fs rms typ
60 Hz to 8 kHz
•
•
0.002 to 710
0.002 to 1417 300 fs rms typ
60 Hz to 8 kHz
•
•
•
CMOS,
LVDS,
LVPECL,
CML
36-Pin QFN
36-Pin QFN
36-Pin QFN
36-Pin QFN
100-Pin TQFP
•
100-Pin TQFP
SELECTOR GUIDE
XOs/VCXOs
REQUEST CUSTOM PART NUMBERS AND SAMPLES AT: www.silabs.com/VCXOpartnumber
DESCRIPTION :: Silicon Labs’ oscillators and voltage controlled crystal oscillators (XO/VCXOs) leverage advanced
DSPLL® circuitry to provide a low jitter clock at any frequency from 10 MHz to 1.4 GHz. Unlike a traditional XO,
where a different crystal is required for each output frequency, Silicon Labs’ XO/VCXOs use one fixed frequency
crystal to provide a wide range of output frequencies. This IC-based approach allows the crystal resonator to provide
exceptional frequency stability and reliability, while providing best-in-class jitter performance and supply noise
rejection, simplifying the task of generating low jitter clocks in noisy environments. All devices are factory configurable
for a wide variety of user specifications including frequency, supply voltage, output format, and stability, thereby
eliminating long lead times associated with custom oscillators.
VCXO BLOCK DIAGRAM
FEATURES::
• Wide frequency range: 10 MHz to 1.4 GHz
• Samples of any XO/VCXO available within
2 weeks
• Superior jitter performance: <0.3 ps rms
• Excellent frequency stability with superior
initial accuracy
• Single, dual, quadand I2C programmable
configurations
• LVPECL, LVDS, CML and CMOS options
• 1.8, 2.5, or 3.3 V options
• Industry standard, ROHS-compliant
5 x 7 mm package and pinout
VDD
Power Supply
Filtering
Any Frequency
10-1417 MHz
DSPLL® Clock
Synthesis
Fixed
Freq.
Oscillator
CLK+
CLKOE
ADC
VC
FS/
I2 C
GND
Fixed Frequency XO/VCXOs
PART NUMBER
TYPE
FREQUENCY
CONTROL FREQUENCY RANGE
Si530/1
XO
Single
Pin
Si532/3
XO
Dual
Pin
Si534
XO
Quad
Pin
Si550
VCXO
Single
Pin
Si552
VCXO
Dual
Pin
Si554
VCXO
Quad
Pin
Si590/1
XO
Single
Pin
Si595
VCXO
Single
Pin
10 to 945 MHz
970 to 1134 MHz
1213 to 1417 MHz
10 to 945 MHz
970 to 1134 MHz
1213 to 1417 MHz
10 to 525 MHz
JITTER
STABILITY/APR
OPTIONS (PPM)
Kv OPTIONS (PPM/V)
PACKAGE
N/A
5 x 7 mm 6-pad
0.3 ps rms
0.3 ps rms
±20, ±31.5, ±61.5
0.3 ps rms
N/A
5 x 7 mm 6-pad
N/A
5 x 7 mm 8-pad
0.5 ps rms
0.5 ps rms
5 x 7 mm 6-pad
±12 to ±375
33 to 356
0.5 ps rms
5 x 7 mm 6-pad
5 x 7 mm 8-pad
0.5 ps rms
±30, ±50, ±100
N/A
5 x 7 mm 6-pad
0,7 ps rms
±10 to ±370
45 to 380
5 x 7 mm 6-pad
I2C Programmable XO/VCXOs
PART NUMBER
TYPE
Si570
XO
Si571
VCXO
Si598
XO
Si599
VCXO
FREQUENCY
RANGE
TUNING
RESOLUTION
10 to 280 MHz
10 to 810 MHz
10 to 1417 MHz
80 PPT
10 to 525 MHz
10 to 280 MHz
10 to 160 MHz
28 PPT
JITTER
TOTAL
STABILITY (PPM)
TOTAL
APR (PPM)
0.3 ps rms
±31.5, ±62.5
N/A
0.5 ps rms
N/A
±12 to ±375
0.5 ps rms
±30, ±50, ±100
N/A
0.7 ps rms
N/A
±10 to ±370
OUTPUT
FORMAT
CMOS,
LVPECL,
LVDS,
CML
SUPPLY
VOLTAGE (V)
TEMP
RANGE (C)
PACKAGE
1.8, 2.5, 3.3 V
-40 to 85 °C
5 x 7 mm 8-pad
1.8, 2.5, 3.3 V
-40 to 85 °C
5 x 7 mm 8-pad
1.8, 2.5, 3.3 V
-40 to 85 °C
5 x 7 mm 8-pad
1.8, 2.5, 3.3 V
-40 to 85 °C
5 x 7 mm 8-pad
C L O C K A N D O S C I L L AT O R S E L E C T O R / 7
Silicon Oscillators
REQUEST CUSTOM PART NUMBERS AND SAMPLES AT: www.silabs.com/siliconXOpartnumber
DESCRIPTION :: The Si500 low cost silicon oscillator provides high reliability and excellent immunity to shock and
vibration. Through the use of innovative stabilization circuitry, the need for a mechanical resonator (quartz, MEMs or
SAW) is eliminated. An all-silicon solution delivers superior aging, 20 ppm temperature stability and reliable start
up and operation. Given its CMOS-based architecture, the Si500 delivers significantly better Failure in Time (FIT)
and Mean Time Between Failure (MTBF) than traditional crystal oscillators, minimizing the cost associated with field
returns due to crystal quality issues. The Si500 leverages a standard CMOS IC manufacturing flow, eliminating the
expensive packaging and mechanically intensive processing steps required by crystal oscillators. All devices are
factory configurable for a variety of user specifications including frequency, supply voltage, and output format.
FEATURES::
SILICON XO BLOCK DIAGRAM
• Quartz-free, all silicon construction
• Generates any frequency from 0.9 to 200 MHz
• Samples of any frequency available in 2 weeks
• Low jitter: 1.5 ps RMS phase jitter, 2 ps RMS period jitter
• No internal PLL
• 3.3, 2.5 and 1.8 V options
• CMOS, LVPECL, LVDS, HCSL and SSTL options
• Driver stopped, tristate, and power down options
• Footprint compatible with 3.2 mm x 5.0 mm
VDD
Power Supply
Filtering
Compensation
CLK+
Silicon
™
Oscillator
CLK-
Configuration NVM
OE
GND
PART NUMBER
TYPE
FREQUENCY
TEMPERATURE
STABILITY
TOTAL STABILITY
(PPM)
OUTPUT FORMAT
FOOTPRINT
Si500S
XO
0.9 to 200 MHz
± 20 ppm typ
± 150 (0-70 °C)
± 250 (0-85 °C)
CMOS, SSTL
3.2 x 5 mm 4-pad
Si500D
XO
0.9 to 200 MHz
± 20 ppm typ
± 150 (0-70 °C)
± 250 (0-85 °C)
LVPECL, LVDS, HCSL, dual output CMOS, diff
CMOS, dual output SSTL, diff SSTL
3.2 x 5 mm 6-pad
PRODUCT SELECTOR
Turnkey Support
Silicon Labs offers complete tools to help designers throughout the entire development process. Both clock
and oscillator solutions offer hardware and software platforms to easily set up, configure and evaluate overall
device performance.
FULL DOCUMENTATION, SOFTWARE AND APPLICATION NOTES ARE AVAILABLE AT: www.silabs.com/timing
Available Clock and Oscillator Evaluation Boards and Kits
PART NUMBER
DESCRIPTION
Si5338/56-PROG-EVB
Si5338, Si5356 Field Programming Kit
Si5356-EVB
Si5355, Si5356 MultiSynth Software Controlled Evaluation Board
Si5338-EVB
Si5338, Si5334, Si5330 MultiSynth Software Controlled Evaluation Board
Si5315-EVB
Si5315 Pin-controlled Evaluation Board
Si5316-EVB
Si5316 Pin-controlled Evaluation Board
Si5317-EVB
Si5317 Pin-controlled Evaluation Board
Si5319-EVB
Si5319 DSPLLsim Software Controlled Evaluation Board
Si5322/23-EVB
Si5322, Si5323 DSPLLsim Software Controlled Evaluation Board
Si5324-EVB
Si5324 DSPLLsim Software Controlled Evaluation Board
Si5325/26-EVB
Si5325, Si5326 DSPLLsim Software Controlled Evaluation Board
Si5365/66-EVB
Si5365, Si5366 DSPLLsim Software Controlled Evaluation Board
Si5367/68-EVB
Si5367, Si5368 DSPLLsim Software Controlled Evaluation Board
Si5xx5x7-EVB
Si53x/55x/59x XO/VCXO Evaluation Board
Si57x-EVB
Si57x/59x I2C Programmable XO/VCXO
Si50x-32x4-EVB
Si500 Silicon Oscillator Evaluation Board
Si5338/Si5356 Field Programming Kit
The Si5338/Si5356 Field Programming Kit provides
all of the tools necessar y for writing a new default
configuration file to the one-time programmable (OTP)
non-volatile memory (NVM) in the Si5338/Si5356 clock
generator. The EVB is fully powered from a single USB
port, contains a high quality and easy-to-use socket and
provides status LEDs for pass or fail indication. The kit
consists of the Field Programmer (Si5338-PROG-EVB),
a USB cable, and clock generator software, a simple
software-based user interface .
C L O C K A N D O S C I L L AT O R S E L E C T O R / 9
Si531x/2x Evaluation Boards
The Si531x/2x Evaluation Boards (EVBs) provide platforms
for evaluating the Si5316, Si5319, Si5323, Si5324 and Si5326
clocks. Each EVB contains a C8051F340 MCU that supports
USB communications with a PC host.
For the pin controlled parts, the pin settings of the devices
are determined by the MCU and the provided PC resident
software, jumper plugs are provided for manual control.
For the MCU controlled parts, the devices are controlled and
monitored through either an SPI or I 2 C serial port. Ribbon
headers and SMA connectors are included so that external
clock in, clock out and status pins are easily accessed. Onboard termination is also included to evaluate single-ended
or differential as well as ac or dc coupled clock inputs and
outputs.
Clocks can be run at either 1.8, 2.5 or 3.3 V, using a separate
DUT (Device Under Test) power supply connector, while the
USB MCU remains at 3.3 V. LEDs are provided for convenient
monitoring of key status signals.
DSPLLsim Software
DSPLLsim PC-based software utility assists users with frequency
planning, loop bandwidth selection and overall device configuration
of Silicon Labs Jitter Attenuating Clocks. The DSPLLsim software
can be used in standalone mode or can be used directly to control
the Si531x/2x/6x in the device evaluation kit. The DSPLLsim software
provides a listing of pin/register settings based on the user-specified
configuration, significantly simplifying PLL design.
Find the Right Part!
Silicon Labs offers easy-to-use parametric searches for clock and oscillator products. Click the buttons to filter as you
search for the features you require and find the perfect part to meet your needs. You can then buy or sample parts or
export your results into a sortable Excel spreadsheet. www.silabs.com/xovcxoparametricsearch
SELECTOR GUIDE
Clock and Oscillator Design Services
QUICKLY BUY OR SAMPLE PRODUCTS ON OUR WEBSITE AT www.silabs.com/buyXO
Silicon Labs offers the industry’s broadest portfolio of clocks and oscillators for communications, computing, broadcast
and consumer applications with the shortest lead times in the industry. Our timing IC portfolio leverages patented
DSPLL, MultiSynth and silicon oscillator technologies to eliminate expensive discrete components while improving
performance, minimizing board space and simplifying system design. Below are three services we offer to help make
your next project easier.
Clock Tree Design Utility
Interested in simplifying your clock tree? Silicon Labs offers clock tree design and consulting services to
help designers simplify design and layout. Simply fill out the web form or, for more complicated timing
architectures, upload file(s) showing your existing clock tree and Silicon Labs will return a custom clock
tree proposal within 3 business days based on your design.
ClockBuilderTM Utility
Silicon Labs offers an easy-to-use web utility to build
and configure the right XO/VCXO for your application in
minutes. Need to reorder? Look up a currently existing
product by part number or top mark code. Samples will
ship in less than two weeks.
The ClockBuilder utility allows designers to tailor the
Si5355’s flexible clock architecture to build custom,
application-specific clocks, eliminating the need for
field programming hardware and software required
by programmable clocks. Select the input and output
frequency requirements below to generate a custom
part number.
Si5355
Built to Order Custom XO/VCXO Samples
Bank A
25 or
27 MHz
xtal
MultiSynth
Oscillator
PLL
Bank B
CLKIN
MultiSynth
Bank C
FS (1:0)
Reset
MultiSynth
Control
Output
Enable
Loss of
Signal
Bank D
MultiSynth
Industry’s Shortest Lead Times
Low-jitter, high-performance, custom samples are available overnight, and to help you get to market faster,
production quantities ship in less than 2–4 weeks. Silicon Labs’ complete portfolio of industry-leading
XOs, VCXOs, clock generators, jitter attenuating clocks and clock buffers set a new standard for flexibility,
performance and lead time.
•
Most frequency flexible timing solutions in the industry; ideal for multi-rate applications
•
Available in industry-standard, drop-in compatible packages
•
Based on patented DSPLL® and MultiSynth technologies, these low jitter products improve system
performance, reduce BOM, minimize board space and simplify system design
•
All custom devices are available without NRE fees and < 2-week lead times
2 WEEK
LEAD
TIMES
C L O C K A N D O S C I L L AT O R S E L E C T O R / 11
Silicon Labs’ products are designed and
manufactured to ISO 9001, ISO 14001
and ISO/TS 16949 standards.
ISO 9001
Quality Management System
Design and Manufacture of Integrated Circuits
Certificate Registration No: 951 08 4762
ISO 14001
ISO/TS 16949
Environmental Management System
Design and Manufacture of Integrated Circuits
Certificate Registration No: 951 09 4998
Quality Management System for
Manufacture of Integrated Circuits and Related
Products for Automotive Applications
Certificate Registration No.: 12 111 33114 TMS
IATF Certificate No.: 0080212
Silicon Labs audio products are CE certified; Certificate No: EN55020
XX%
© 2010, Silicon Laboratories Inc. DSPLL, ClockBuilder, Silicon Laboratories and the Silicon Labs logo are trademarks or registered trademarks of Silicon Laboratories Inc. All other product or service names are
the property of their respective owners. For the most up to date information please see your sales representative or visit our website at www.silabs.com.
WEB, October 2010, Rev D SEL-CLK-2010D
SIL IC ON L A BOR AT ORIE S INC. | 4 0 0 W. CE S A R CH AV E Z | AUS T IN, T X 7 8 7 01 | 512- 416 - 8 5 0 0 | SIL A B S.C OM