STM32 F4 series High-performance Cortex

STM32 F4 series High-performance Cortex
STM32 F4 series
High-performance Cortex-M4 MCU
STMicroelectronics
32-bit Flash MCU, 168 MHz/210 DMIPS, with DSP instructions,
floating point unit and advanced peripherals
www.st.com/stm32f4
STM32 F4 DSC 32-bit Cortex-M4
ST is widening its target applications arena with the STM32 F4 series. Based on the Cortex-M4 core, this series
opens the door to the digital signal controller (DSC) market. This extension to our STM32 product portfolio
offers devices with pin-to-pin and software compatibility with the STM32 F2 series, but with more performance,
DSP capability, a floating point unit, more SRAM, and peripheral improvements such as full duplex I²S, less than
1 µA RTC and 2.44 MSPS ADCs. The ARM Cortex-M4 core features built-in single-cycle multiply-accumulate
(MAC) instructions, optimized SIMD arithmetic and saturating arithmetic instructions. The adaptive realtime ART AcceleratorTM combined with ST’s 90 nm technology provides linear performance up to 168 MHz,
unleashing the full performance of the core. These features expand the number of addressable applications in
the industrial, consumer and healthcare segments.
The STM32 F4 series includes devices with 512 Kbytes to 1 Mbyte of on-chip Flash memory, and 192 Kbytes of
SRAM, and 15 communication interfaces.
WLCSP (< 4.5 x 4.5 mm), LQFP64, LQFP100, LQFP144, LQFP176 and UFBGA176 packages are available.
Block
Block diagram
diagram
Key figures
ART AcceleratorTM
System
Power supply
1.2 V regulator
POR/PDR/PVD
Xtal oscillators
32 kHz + 4 ~26 MHz
Internal RC oscillators
32 kHz + 16 MHz
PLL
Clock control
RTC/AWU
SysTick timer
2x watchdogs
(independent and window)
51/82/114/140 I/Os
Cyclic redundancy
check (CRC)
ARM Cortex-M4
168 MHz
QQ
Up to 192-Kbyte SRAM
FSMC/
SRAM/NOR/NAND/CF/
LCD parallel interface
80-byte + 4-Kbyte
backup SRAM
512 OTP bytes
Connectivity
Floating point unit (FPU)
Camera interface
Nested vector
interrupt
controller (NVIC)
MPU
3x SPI, 2x I²S, 3x I²C
Ethernet MAC 10/100
with IEEE 1588
2x CAN 2.0B
JTAG/SW debug/ETM
1x USB 2.0 OTG FS/HS1
1x USB 2.0 OTG FS
Multi-AHB bus matrix
16-channel DMA
Control
2x 16-bit motor control
PWM
Synchronized AC timer
10x 16-bit timers
2x 32-bit timers
Up to 1-Mbyte Flash memory
Crypto/hash processor2
3DES, AES 256
SHA-1, MD5, HMAC
True random number
generator (RNG)
SDIO
6x USART
LIN, smartcard, IrDA,
modem control
Analog
2-channel 2x 12-bit DAC
3x 12-bit ADC
24 channels / 2.44 MSPS
Temperature sensor
QQ
QQ
Performance
QQ Coremark score:
363.17 at 168 MHz,
Coremark/MHz: 2.162
QQ Dhrystone score: 210 at
168 MHz
QQ Power consumption
QQ 230 µA/MHz at
168 MHz running Coremark
benchmark from Flash
memory (peripherals off)
QQ 1.2 V voltage regulator with
power scaling capability
4
QQ 1.7 V to 3.6 V V
DD
QQ <1 µA typ RTC
High-speed data transfer
QQ 7 masters, 8 slaves on the
multi AHB bus matrix
Faster peripherals
QQ USART: 10.5 Mbit/s
QQ SPI: 37.5 Mbit/s
QQ ADC: 2.44 MSPS
Note:
4. 1.7 V available on all packages except the LQFP64
Notes:
1.
HS requires an external PHY connected to the ULPI interface
2.
Crypto/hash processor on STM32F417 and STM32F415
Development tools
As for all STM32 products, a complete development tool offering is available,
including the following dedicated kits.
QQ
QQ
QQ
STM32 F4 Discovery kit (order code: STM32F4DISCOVERY)
STM32 F4 evaluation board (order codes: STM3240G-EVAL and
STM3241G-EVAL3 for crypto support)
STM32 F4 starter kits from IAR and Keil (order codes: STM3240G-SK/IAR and
STM3240G-SK/KEI)
STM32F4DISCOVERY
Note: 3. Contact your local ST sales office.
STM3240G-EVAL
2
Features and benefits
Features
Benefits
Boosted execution of control algorithms
More features possible for your applications
Ease of use
Better code efficiency
Faster time to market
Elimination of scaling and saturation
Easier support for meta-language tools
168 MHz/210 DMIPS Cortex-M4 with single cycle DSP MAC and floating point unit
Designed for high performance and ultra fast data transfers
ART Accelerator
QQ
32-bit, 7-layer AHB bus matrix with 7 masters and 8 slaves including 2 blocks of SRAM
QQ
Multi DMA controllers: 2 general purpose, 1 for USB HS, 1 for Ethernet
QQ
One SRAM block dedicated to the core
QQ
Outstanding power efficiency
Ultra-low dynamic power
QQ
RTC <1 µA typ in VBAT mode
QQ
QQ
QQ
Performance equivalent to 0-wait execution from Flash
Concurrent execution and data transfers
Simplified resource allocation
Extra flexibility to reduce power consumption for applications
requiring both high processing and low power performance when
running at low voltage or on a rechargeable battery
3.6 V down to 1.7 V1 VDD
Voltage regulator with power scaling capability
Maximum integration
Up to 1 Mbyte of on-chip Flash memory, 192 Kbytes of SRAM, reset circuit, internal RCs,
PLLs, WLCSP package available
Superior and innovative peripherals
Connectivity: camera interface, crypto/hash HW processor, Ethernet MAC10/100 with
IEEE 1588 v2 support, 2 USB OTG (one with HS support),
QQ
Audio: dedicated audio PLL and 2 full duplex I²S
QQ
Up to 15 communication interfaces (including 6x USART, 3x SPI, 3x I²C, 2x CAN, SDIO)
QQ
Analog: 2x 12-bit DACs, 3x 12-bit ADC reaching 7.32 MSPS in interleaved mode
QQ
Up to 17 timers: 16 and 32 bits running up to 168 MHz
QQ
More features in space constrained applications
New possibilities to connect and communicate high speed data
More precision thanks to high resolution
Extensive tools and software solutions
Various IDE, starter kits, libraries, RTOS and stacks, either open source or provided by ST
or 3rd parties, including the ARM CMSIS DSP library optimized for Cortex-M4 instructions
A wide choice within the STM32 ecosystem to develop your
applications
Note: 1. 1.7 V available on all packages except the LQFP64
ART Accelerator™ performance result
Unleashing the full performance of the
core beyond the embedded Flash intrinsic
speed is an art.
Combined with ST’s 90 nm technology,
the ART Accelerator achieves a linear
performance up to 168 MHz, offering
210 DMIPS and 363 Coremark
performance executing from Flash.
DMIPS
The acceleration mechanism is made
possible using a prefetch queue, a branch
cache and a smart arbitration mechanism.
150
QQ
QQ
MCUs using less advanced accelerators
or slower embedded Flash memories
will impact exectution performance as
wait states occur.
MCUs using faster Flash but no
branch cache acceleration to achieve
performance usually show higher
power consumption as a result of more
accesses to a power hungry Flash.
225
STM32F4:
best mix, acceleration and speed
200
175
Competitor R: maximum
frequency limitation
125
100
Competitor F: Flash access bottleneck
75
50
25
0
20
40
60
STM32 F4 series
80
100
Competitor F
120
140
160
FCPU
180 (MHz)
Competitor R
3
Device summary
Part number
Timer functions
Internal
Flash
RAM
16-bit
Package
size
size
(IC/OC/
Others
(Kbytes)
(Kbytes)
PWM)
LQFP64
STM32F405RG (10x10)
WLCSP64
LQFP64
STM32F415RG² (10x10)
WLCSP64
LQFP100
STM32F405VG
(14x14)
LQFP100
STM32F415VG²
(14x14)
LQFP144
STM32F405ZG
(20x20)
LQFP144
STM32F415ZG²
(20x20)
UFBGA176
(10x10)
LQFP176
(24x24)
UFBGA176
(10x10)
STM32F417IE²
LQFP176
(24x24)
UFBGA176
(10x10)
STM32F407IG
LQFP176
(24x24)
UFBGA176
(10x10)
STM32F417IG²
LQFP176
(24x24)
LQFP100
STM32F407VE
(14x14)
LQFP100
STM32F417VE²
(14x14)
LQFP100
STM32F407VG
(14x14)
LQFP100
STM32F417VG²
(14x14)
LQFP144
STM32F407ZE
(20x20)
LQFP144
STM32F417ZE2
(20x20)
LQFP144
STM32F407ZG
(20x20)
LQFP144
STM32F417ZG²
(20x20)
STM32F407IE
ADC
DAC
I/Os
(high
current)
Serial
interface
STM32F405/415: 1x USB OTG (FS/HS1), crypto/hash processor2
1024
1024
192
192
12x16-bit
(24/24/30) 2x32-bit
timers
12x16-bit (8/8/8),
(24/24/30) 2x WDG,
RTC,
12x16-bit
24-bit
(24/24/30)
down
12x16-bit
counter,
(24/24/30)
2x16-bit
12x16-bit
basic
(24/24/30)
12x16-bit timers
16x12-bit 2x12-bit 51(51)
16x12-bit 2x12-bit 51(51)
3xSPI,
2xI²S, 2xI²C,
3xUSART
(IrDa,
ISO 7816),
3xUART,
1x USB OTG
FS/HS,
2xCAN, SDIO
Supply current
(Icc)
Supply
Lowest Run Temperature
voltage
power mode
(°C)
(Vcc) (V)
mode
(µA/
(µA)
MHz)
1.73/1.8
to 3.6
2.5
230
1.73/1.8
to 3.6
2.5
230
2.5
230
2.5
230
2.5
230
2.5
230
1.73/1.8
to 3.6
1.73/1.8
1024
192
16x12-bit 2x12-bit 82(82)
to 3.6
1.73/1.8
1024
192
24x12-bit 2x12-bit 114(114)
to 3.6
1.73/1.8
1024
192
24x12-bit 2x12-bit 114(114)
(24/24/30)
to 3.6
STM32F407/417: 2x USB OTG (FS + /HS1), camera IF, crypto/hash processor2
1024
192
16x12-bit 2x12-bit 82(82)
512
192
12x16-bit
(24/24/30)
24x12-bit 2x12-bit 140(140)
1.73/1.8
to 3.6
2.5
230
512
192
12x16-bit
(24/24/30)
24x12-bit 2x12-bit 140(140)
1.73/1.8
to 3.6
2.5
230
1024
192
1.73/1.8
to 3.6
2.5
230
1024
192
1.73/1.8
to 3.6
2.5
230
512
192
512
192
1024
192
1024
192
512
192
512
192
1024
192
1024
192
12x16-bit
(24/24/30) 2x32-bit
timers
(8/8/8),
12x16-bit 2 x WDG,
(24/24/30) RTC,
24-bit
12x16-bit
down
(24/24/30)
counter,
12x16-bit
2x16-bit
(24/24/30)
basic
12x16-bit
timers
(24/24/30)
12x16-bit
(24/24/30)
12x16-bit
(24/24/30)
12x16-bit
(24/24/30)
12x16-bit
(24/24/30)
12x16-bit
(24/24/30)
24x12-bit 2x12-bit 140(140) 3xSPI,
2xI²S, 2xI²C,
3xUSART
(IrDa,
24x12-bit 2x12-bit 140(140) ISO 7816),
3xUART,
2x USB OTG
16x12-bit 2x12-bit 82(82)
FS/HS,
2xCAN,
16x12-bit 2x12-bit 82(82)
Ethernet
MAC10/100,
16x12-bit 2x12-bit 82(82)
SDIO
16x12-bit 2x12-bit 82(82)
2x12-bit 2x12-bit 114(114)
2x12-bit 2x12-bit 114(114)
2x12-bit 2x12-bit 114(114)
2x12-bit 2x12-bit 114(114)
1.73/1.8
to 3.6
1.73/1.8
to 3.6
1.73/1.8
to 3.6
1.73/1.8
to 3.6
1.73/1.8
to 3.6
1.73/1.8
to 3.6
1.73/1.8
to 3.6
1.73/1.8
to 3.6
2.5
230
2.5
230
2.5
230
2.5
230
2.5
230
2.5
230
2.5
230
2.5
230
-40 to +85 or
-40 to +105
-40 to +85 or
-40 to +105
Notes:
1. HS requires an external PHY connected to ULPI interface
2. Crypto/hash processor on STM32F417 and STM32F415
3. Available on all packages except LQFP64. 1.7V requires external reset circuitry.
© STMicroelectronics - September 2011 - Printed in United Kingdom - All rights reserved
The STMicroelectronics corporate logo is a registered trademark of the STMicroelectronics group of companies
All other names are the property of their respective owners
Order code: BRSTM32F40911
For more information on ST products and solutions, visit www.st.com
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