IRF6722MTRPBF

IRF6722MTRPBF
PD - 96136
IRF6722MPbF
IRF6722MTRPbF
DirectFET™ Power MOSFET ‚
RoHS Compliant Containing No Lead and Bromide 
Low Profile (<0.7 mm)
l Dual Sided Cooling Compatible 
l Ultra Low Package Inductance
l Optimized for High Frequency Switching 
l Ideal for CPU Core DC-DC Converters
l Optimized for Control FET application
l Low Conduction and Switching Losses
l Compatible with existing Surface Mount Techniques 
l 100% Rg tested
l
Typical values (unless otherwise specified)
VDSS
l
VGS
RDS(on)
RDS(on)
30V max ±20V max 4.7mΩ@ 10V 8.0mΩ@ 4.5V
Qg
Qgd
Qgs2
Qrr
Qoss
Vgs(th)
4.3nC
1.2nC
26nC
11nC
1.8V
tot
11nC
DirectFET™ ISOMETRIC
MP
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ
SX
ST
MQ
MX
MT
MP
Description
The IRF6722MPbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve
the lowest on-state resistance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET package is
compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection
soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6722MPbF balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and
switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of
processors operating at higher frequencies. The IRF6722MPbF has been optimized for parameters that are critical in synchronous buck
operating from 12 volt bus converters including Rds(on) and gate charge to minimize losses.
Absolute Maximum Ratings
Parameter
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
VGS
ID @ TA = 25°C
ID @ TA = 70°C
ID @ TC = 25°C
IDM
EAS
IAS
g
Pulsed Drain Current
Single Pulse Avalanche Energy
Avalanche Current
g
h
Typical RDS(on) (mΩ)
20
ID = 13A
15
10
T J = 125°C
5
T J = 25°C
0
0
2
4
6
8
10
12
14
16
18
20
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
Notes:
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET Website.
ƒ Surface mounted on 1 in. square Cu board, steady state.
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e
e
f
VGS, Gate-to-Source Voltage (V)
VDS
Max.
Units
30
±20
13
11
56
110
82
11
V
A
mJ
A
14.0
ID= 11A
12.0
10.0
VDS= 24V
VDS= 15V
8.0
6.0
4.0
2.0
0.0
0
4
8
12
16
20
24
28
QG, Total Gate Charge (nC)
Fig 2. Typical Total Gate Charge vs. Gate-to-Source Voltage
„ TC measured with thermocouple mounted to top (Drain) of part.
… Repetitive rating; pulse width limited by max. junction temperature.
† Starting TJ = 25°C, L = 1.45mH, RG = 25Ω, IAS = 11A.
1
11/12/07
IRF6722MPbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min.
Conditions
Typ. Max. Units
BVDSS
Drain-to-Source Breakdown Voltage
30
–––
∆ΒVDSS/∆TJ
RDS(on)
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
–––
–––
23
4.7
VGS(th)
Gate Threshold Voltage
–––
1.4
8.0
1.8
–––
V VGS = 0V, ID = 250µA
––– mV/°C Reference to 25°C, ID = 1mA
7.7
mΩ VGS = 10V, ID = 13A
VGS = 4.5V, ID = 11A
10.8
2.4
V VDS = VGS, ID = 50µA
∆VGS(th)/∆TJ
IDSS
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
–––
–––
-5.9
–––
–––
1.0
Gate-to-Source Forward Leakage
–––
–––
–––
–––
150
100
Gate-to-Source Reverse Leakage
Forward Transconductance
–––
25
–––
–––
-100
–––
Total Gate Charge
Pre-Vth Gate-to-Source Charge
–––
–––
11
2.4
17
–––
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
–––
–––
1.2
4.3
–––
–––
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
–––
–––
3.5
5.5
–––
–––
Output Charge
Gate Resistance
–––
–––
11
1.4
–––
2.5
Turn-On Delay Time
Rise Time
–––
–––
11
7.8
–––
–––
Turn-Off Delay Time
Fall Time
–––
–––
9.5
6.1
–––
–––
Input Capacitance
Output Capacitance
–––
–––
1300
490
–––
–––
Reverse Transfer Capacitance
–––
150
–––
IGSS
gfs
Qg
Qgs1
Qgs2
Qgd
Qgodr
Qsw
Qoss
RG
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
i
i
mV/°C
µA VDS = 24V, VGS = 0V
VDS = 24V, VGS = 0V, TJ = 125°C
nA
VGS = 20V
VGS = -20V
S
VDS = 15V, ID = 11A
nC
VDS = 15V
VGS = 4.5V
ID = 11A
See Fig. 15
nC
VDS = 16V, VGS = 0V
Ω
i
VDD = 15V, VGS = 4.5V
ns
ID = 11A
RG = 1.8Ω
See Fig. 17
VGS = 0V
pF
VDS = 15V
ƒ = 1.0MHz
Diode Characteristics
Min.
Typ. Max. Units
IS
Continuous Source Current
Parameter
–––
–––
52
ISM
(Body Diode)
Pulsed Source Current
–––
–––
110
VSD
trr
Qrr
g
Conditions
MOSFET symbol
A
(Body Diode)
Diode Forward Voltage
–––
0.81
1.0
V
Reverse Recovery Time
Reverse Recovery Charge
–––
–––
19
26
29
39
ns
nC
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 11A, VGS = 0V
TJ = 25°C, IF = 11A
di/dt = 250A/µs
i
i
Notes:
‡ Pulse width ≤ 400µs; duty cycle ≤ 2%.
2
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IRF6722MPbF
Absolute Maximum Ratings
e
e
f
PD @TA = 25°C
PD @TA = 70°C
PD @TC = 25°C
TP
TJ
TSTG
Max.
Units
2.3
1.5
42
270
-40 to + 150
W
Parameter
Power Dissipation
Power Dissipation
Power Dissipation
Peak Soldering Temperature
Operating Junction and
Storage Temperature Range
°C
Thermal Resistance
Parameter
el
jl
kl
fl
RθJA
RθJA
RθJA
RθJC
RθJ-PCB
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Case
Junction-to-PCB Mounted
Linear Derating Factor
e
Typ.
Max.
Units
–––
12.5
20
–––
1.0
55
–––
–––
3.0
–––
°C/W
0.018
W/°C
100
Thermal Response ( Z thJA )
D = 0.50
10
0.20
0.10
0.05
1
0.02
0.01
τJ
0.1
R1
R1
τJ
τ1
R2
R2
R3
R3
τA
τ2
τ1
τ3
τ2
Ci= τi/Ri
Ci= τi/Ri
0.01
0.001
1E-006
0.0001
τA
26.688
0.9124
21.955
43.9
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
SINGLE PULSE
( THERMAL RESPONSE )
1E-005
τ3
Ri (°C/W) τi (sec)
6.3466 0.00237
0.001
0.01
0.1
1
10
100
1000
t1 , Rectangular Pulse Duration (sec)
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient ƒ
Notes:
ˆ Used double sided cooling , mounting pad with large heatsink.
‰ Mounted on minimum footprint full size board with metalized
Š Rθ is measured at TJ of approximately 90°C.
back and with small clip heatsink.
ƒ Surface mounted on 1 in. square Cu
(still air).
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‰ Mounted to a PCB with
small clip heatsink (still air)
‰ Mounted on minimum
footprint full size board with
metalized back and with small
clip heatsink (still air)
3
IRF6722MPbF
TOP
ID, Drain-to-Source Current (A)
100
BOTTOM
10
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
1
2.5V
0.1
≤60µs PULSE WIDTH
1000
TOP
ID, Drain-to-Source Current (A)
1000
100
BOTTOM
10
2.5V
0.1
1
10
Tj = 150°C
1
100
0.1
VDS, Drain-to-Source Voltage (V)
100
2.0
ID = 13A
VDS = 15V
≤60µs PULSE WIDTH
Typical RDS(on) (Normalized)
ID, Drain-to-Source Current (A)
10
Fig 5. Typical Output Characteristics
1000
100
10
TJ = 150°C
TJ = 25°C
1
TJ = -40°C
0.1
V GS = 10V
V GS = 4.5V
1.5
1.0
0.5
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
20 40 60 80 100 120 140 160
Fig 7. Normalized On-Resistance vs. Temperature
Fig 6. Typical Transfer Characteristics
10000
-60 -40 -20 0
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
30
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
Vgs = 3.5V
Vgs = 4.0V
Vgs = 4.5V
Vgs = 5.0V
Vgs = 8.0V
Vgs = 10V
25
Typical RDS(on) ( mΩ)
C oss = C ds + C gd
C, Capacitance(pF)
1
V DS, Drain-to-Source Voltage (V)
Fig 4. Typical Output Characteristics
Ciss
1000
Coss
20
T J = 25°C
15
10
5
Crss
0
100
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
4
≤60µs PULSE WIDTH
Tj = 25°C
0.01
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
0
20
40
60
80
100
120
ID, Drain Current (A)
Fig 9. Typical On-Resistance vs.
Drain Current and Gate Voltage
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IRF6722MPbF
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
100
T J = 150°C
100
OPERATION IN THIS AREA
LIMITED BY R DS(on)
T J = 25°C
T J = -40°C
10
1
VGS = 0V
100µsec
1msec
10
DC
10msec
1
TA = 25°C
TJ = 150°C
0.1
Single Pulse
0.01
0
0.01
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
Fig 10. Typical Source-Drain Diode Forward Voltage
40
30
20
10
100
125
100.00
2.5
2.0
ID = 50µA
1.5
ID = 150µA
ID = 250µA
ID = 1.0mA
1.0
ID = 1.0A
0.5
0
75
10.00
3.0
Typical VGS(th) Gate threshold Voltage (V)
ID, Drain Current (A)
50
50
1.00
Fig11. Maximum Safe Operating Area
60
25
0.10
VDS, Drain-to-Source Voltage (V)
VSD, Source-to-Drain Voltage (V)
-75 -50 -25
150
0
25
50
75 100 125 150
T J , Temperature ( °C )
T C , Case Temperature (°C)
Fig 13. Typical Threshold Voltage vs. Junction
Temperature
Fig 12. Maximum Drain Current vs. Case Temperature
EAS , Single Pulse Avalanche Energy (mJ)
350
ID
0.98A
1.23A
BOTTOM 11A
300
TOP
250
200
150
100
50
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 14. Maximum Avalanche Energy vs. Drain Current
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5
IRF6722MPbF
Id
Vds
Vgs
L
VCC
DUT
0
20K
1K
Vgs(th)
S
Qgodr
Fig 15a. Gate Charge Test Circuit
Qgd
Qgs2 Qgs1
Fig 15b. Gate Charge Waveform
V(BR)DSS
15V
D.U.T
V
RGSG
20V
DRIVER
L
VDS
tp
+
- VDD
IAS
I AS
0.01Ω
tp
Fig 16b. Unclamped Inductive Waveforms
Fig 16a. Unclamped Inductive Test Circuit
V DS
VGS
RG
VDS
RD
90%
D.U.T.
+
- VDD
V GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 17a. Switching Time Test Circuit
6
A
10%
VGS
td(on)
tr
t d(off) tf
Fig 17b. Switching Time Waveforms
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IRF6722MPbF
Driver Gate Drive
D.U.T
ƒ
+
‚
RG
*
•
•
•
•
„
D.U.T. ISD Waveform
Reverse
Recovery
Current
V DD
**
P.W.
Period
***
+
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D=
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-

P.W.
+
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
-
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
* Use P-Channel Driver for P-Channel Measurements
** Reverse Polarity for P-Channel
ISD
*** VGS = 5V for Logic Level Devices
Fig 18. Diode Reverse Recovery Test Circuit for HEXFET® Power MOSFETs
DirectFET™ Board Footprint, MP Outline
(Medium Size Can, P-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
G = GATE
D= DRAIN
S = SOURCE
D
D
G
D
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S
S
D
7
IRF6722MPbF
DirectFET™ Outline Dimension, MP Outline
(Medium Size Can, P-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes
all recommendations for stencil and substrate designs.
DIMENSIONS
METRIC
MAX
CODE MIN
A
6.25
6.35
B
4.80
5.05
C
3.85
3.95
0.45
D
0.35
E
0.62
0.58
F
0.58
0.62
G
0.75
0.79
0.57
H
0.53
0.67
J
0.63
K
1.59
1.72
L
2.87
3.04
M
0.616 0.676
R
0.020 0.080
P
0.08
0.17
IMPERIAL
MAX
0.246
1.889
0.152
0.014
0.023
0.023
0.030
0.021
0.025
0.063
0.113
0.0235
0.0008
0.003
MAX
0.250
0.199
0.156
0.018
0.032
0.032
0.031
0.022
0.026
0.068
0.119
0.0274
0.0031
0.007
DirectFET™ Part Marking
GATE MARKING
LOGO
PART NUMBER
BATCH NUMBER
DATE CODE
Line above the last character of
the date code indicates "Lead-Free"
8
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IRF6722MPbF
DirectFET™ Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF6722MTRPBF). For 1000 parts on 7"
reel, order IRF6722MTR1PBF
STANDARD OPTION
METRIC
CODE
MIN
MAX
A
330.0
N.C
B
20.2
N.C
C
12.8
13.2
D
1.5
N.C
E
100.0
N.C
F
N.C
18.4
G
12.4
14.4
H
11.9
15.4
REEL DIMENSIONS
(QTY 4800)
TR1 OPTION
IMPERIAL
METRIC
MIN
MAX
MAX
MIN
12.992
177.77 N.C
N.C
0.795
19.06
N.C
N.C
0.504
13.5
12.8
0.520
0.059
1.5
N.C
N.C
3.937
58.72
N.C
N.C
N.C
N.C
13.50
0.724
0.488
11.9
0.567
12.01
0.469
11.9
0.606
12.01
(QTY 1000)
IMPERIAL
MIN
MAX
6.9
N.C
0.75
N.C
0.53
0.50
0.059
N.C
2.31
N.C
N.C
0.53
0.47
N.C
0.47
N.C
LOADED TAPE FEED DIRECTION
NOTE: CONTROLLING
DIMENSIONS IN MM
CODE
A
B
C
D
E
F
G
H
DIMENSIONS
METRIC
IMPERIAL
MIN
MAX
MIN
MAX
0.311
0.319
8.10
7.90
0.154
0.161
4.10
3.90
0.469
0.484
11.90
12.30
0.215
0.219
5.55
5.45
0.209
0.201
5.30
5.10
0.256
0.264
6.50
6.70
0.059
N.C
N.C
1.50
0.059
0.063
1.60
1.50
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.11/2007
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9
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