CC2590

CC2590
CC2590
www.ti.com ........................................................................................................................................................................................ SWRS080 – SEPTEMBER 2008
2.4-GHz RF Front End, 14-dBm output power
FEATURES
APPLICATIONS
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Seamless Interface to 2.4-GHz Low Power RF
Devices from Texas Instruments
Up to +14-dBm (25mW) Output Power
6-dB Typical Improved Sensitivity on CC24xx
and CC2500, CC2510, and CC2511
Few External Components
– Integrated Switches
– Integrated Matching Network
– Integrated Balun
– Integrated Inductors
– Integrated PA
– Integrated LNA
Digital Control of LNA Gain by HGM Pin
100-nA in Power Down (EN = PAEN = 0)
Low Transmit Current Consumption
– 22-mA at 3-V for +12-dBm, PAE = 23%
Low Receive Current Consumption
– 3.4-mA for High Gain Mode
– 1.8-mA for Low Gain Mode
4.6-dB LNA Noise Figure, including T/R Switch
and external antenna match
RoHS Compliant 4×4-mm QFN-16 Package
2.0-V to 3.6-V Operation
All 2.4-GHz ISM Band Systems
Wireless Sensor Networks
Wireless Industrial Systems
IEEE 802.15.4 and ZigBee Systems
Wireless Consumer Systems
Wireless Audio Systems
DESCRIPTION
CC2590 is a cost-effective and high performance RF
Front End for low-power and low-voltage 2.4-GHz
wireless applications.
CC2590 is a range extender for all existing and future
2.4-GHz low-power RF transceivers, transmitters and
System-on-Chip products from Texas Instruments.
CC2590 increases the link budget by providing a
power amplifier for increased output power, and an
LNA with low noise figure for improved receiver
sensitivity.
CC2590 provides a small size, high output power RF
design with its 4x4-mm QFN-16 package.
CC2590 contains PA, LNA, switches, RF-matching,
and balun for simple design of high performance
wireless applications.
CC2590 BLOCK DIAGRAM
PA
BALUN
4
RF_P
3
RXTX
2
RF_N
5
PAEN
6
EN
11
ANT
LNA
Logic
Bias
15
7
BIAS
HGM
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008, Texas Instruments Incorporated
CC2590
SWRS080 – SEPTEMBER 2008 ........................................................................................................................................................................................ www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS
Under no circumstances must the absolute maximum ratings be violated. Stress exceeding one or more of the limiting values
may cause permanent damage to the device.
PARAMETER
Supply voltage
All supply pins must have the same voltage
Voltage on any digital pin
–0.3 to 3.6
V
V
+10
dBm
Storage temperature range
ESD
UNIT
–0.3 to VDD + 0.3, max 3.6
Input RF level
Reflow soldering temperature
VALUE
–50 to 150
°C
According to IPC/JEDEC J-STD-020
260
°C
Human Body Model, all pins except pin 10
2000
V
Human Body Model, pin 10
1900
V
Charged Device Model
1000
V
RECOMMENDED OPERATING CONDITIONS
The operating conditions for CC2590 are listed below.
MIN
MAX
Ambient temperature range
PARAMETER
–40
85
°C
Operating supply voltage
2.0
3.6
V
2400
2483.5
Operating frequency range
UNIT
MHz
ELECTRICAL CHARACTERISTICS
TC = 25°C, VDD = 3.0V , fRF= 2440MHz (unless otherwise noted). Measured on CC2590EM reference design including
external matching components.
PARAMETER
TEST CONDITIONS
Receive current, High Gain Mode
HGM = 1
Receive current, Low Gain Mode
HGM = 0
Transmit current
MIN
TYP
MAX
UNIT
3.4
4.0
mA
1.8
2.0
mA
PIN = 0.5 dBm, POUT = 12.2 dBm
22.1
mA
PIN = –3.5 dBm, POUT = 10.0 dBm
16.8
mA
Transmit current
No input signal
8.0
10.0
mA
Power down current
EN = PAEN = 0
0.1
0.3
µA
High input level (control pins)
EN, PAEN, HGM, RXTX
VDD
V
Low input level (control pins)
EN, PAEN, HGM, RXTX
0.3
V
1.3
Power down - Receive mode switching
time
1.4
µs
Power down - Transmit mode switching
time
0.8
µs
RF Receive
Gain, High Gain Mode
HGM = 1
11.4
dB
Gain, Low Gain Mode
HGM = 0
0
dB
Gain variation, 2400 – 2483.5 MHz, High
Gain Mode
HGM = 1
1.2
dB
Gain variation, 2.0V – 3.6V, High Gain
Mode
HGM = 1
1.7
dB
Noise figure, High Gain Mode
HGM = 1, including internal T/R switch and external
antenna match
4.6
dB
Input 1 dB compression, High Gain Mode
HGM = 1
–21
dBm
2
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CC2590
www.ti.com ........................................................................................................................................................................................ SWRS080 – SEPTEMBER 2008
ELECTRICAL CHARACTERISTICS (continued)
TC = 25°C, VDD = 3.0V , fRF= 2440MHz (unless otherwise noted). Measured on CC2590EM reference design including
external matching components.
PARAMETER
TEST CONDITIONS
Input IP3, High Gain Mode
HGM = 1
Input reflection coefficient, S11
HGM = 1, measured at antenna port
MIN
TYP
MAX
UNIT
–9
dBm
–19
dB
RF Transmit
Gain
Output power, POUT
Power Added Efficiency, PAE
14.1
dB
PIN = 4.5 dBm
13.8
dBm
PIN = 0.5 dBm
12.2
dBm
PIN = -3.5 dBm
10.0
dBm
PIN = 0.5 dBm
23.5
%
10.4
dBm
Output 1 dB compression
Output IP3
23
dBm
Output power variation over frequency
2400 – 2483.5 MHz, PIN = 0.5 dBm
0.3
dB
Output power variation over power supply
2.0V – 3.6V , PIN = 0.5 dBm
3.2
dB
Output power variation over temperature
-40°C – 85°C, PIN = 0.5 dBm
1.1
dB
2nd harmonic power
The 2nd harmonic can be reduced to below regulatory
limits by using an external LC filter and antenna. See
application note AN032 for regulatory requirements.
–14
dBm
3rd harmonic power
The 3rd harmonic can be reduced to below regulatory
limits by using an external LC filter and antenna. See
application note AN032 for regulatory requirements.
–28
dBm
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CC2590
SWRS080 – SEPTEMBER 2008 ........................................................................................................................................................................................ www.ti.com
DEVICE INFORMATION
The CC2590 pinout and description are shown in Figure 1 and Table 1, respectively.
PABIAS
GND
16
15
14
AVDD_LNA
AVDD_BIAS
PIN AND I/O CONFIGURATION
(TOP VIEW)
NC
1
13
12
RF_N
2
11
ANT
AVDD_PA2
GND
QFN-16 4x4mm
4
9
5
6
7
8
GND
RF_P
HGM
10
EN
3
PAEN
RXTX
GND
Figure 1.
NOTE:
The exposed die attach pad must be connected to a solid ground plane as this is the
primary ground connection for the chip. Inductance in vias to the pad should be
minimized. It is highly recommended to follow the reference layout. Changes will alter
the performance. Also see the PCB landpattern information in this data sheet.
For best performance, minimize the length of the ground vias, by using a 4-layer PCB
with ground plane as layer 2 when CC2590 is mounted onto layer 1.
4
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CC2590
www.ti.com ........................................................................................................................................................................................ SWRS080 – SEPTEMBER 2008
Table 1. PIN FUNCTIONS
PIN
TYPE
NO.
NAME
—
GND
1
NC
2
RF_N
RF
3
RXTX
Analog/Control
Ground
DESCRIPTION
The exposed die attach pad must be connected to a solid ground plane. See
CC2590EM reference design for recommended layout.
Not Connected
RF interface towards CC24xx or CC25xx device.
RXTX switching voltage when connected to CC24xx devices. See Table 3, Table 4,
and Table 5 for details.
4
RF_P
RF
5
PAEN
Digital Input
RF interface towards CC24xx or CC25xx device
Digital control pin. See Table 3, Table 4, and Table 5 for details.
6
EN
Digital Input
Digital control pin. See Table 3, Table 4, and Table 5 for details.
7
HGM
Digital Input
Digital control pin.
HGM=1 → Device in High Gain Mode
HGM=0 → Device in Low Gain Mode (RX only)
8, 9, 12, 14
GND
Ground
Secondary ground connections. Should be shorted to the die attach pad on the top
PCB layer.
10
AVDD_PA2
Power
2.0-V – 3.6-V Power. PCB trace to this pin serves as inductive load to PA. See
CC2590EM reference design for recommended layout.
11
ANT
RF
13
AVDD_LNA
Power
2.0-V – 3.6-V Power. PCB trace to this pin serves as inductive load to LNA. See
CC2590EM reference design for recommended layout.
15
BIAS
Analog
Biasing input. Resistor between this node and ground sets bias current to PAs.
16
AVDD_BIAS
Power
2.0-V – 3.6-V Power.
Antenna interface.
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CC2590
SWRS080 – SEPTEMBER 2008 ........................................................................................................................................................................................ www.ti.com
CC2590EM Evaluation Module
VDD
C101/C102
= PCB trace inductor
VDD
VDD
C131/C132
AVDD_LNA
AVDD_BIAS
AVDD_PA2
TL131
TL101
C161
LDB182G4520C-110
RF_P
RXTX
RXTX
SMA
RXTX
C112
L111
CC2590
ANT
C111
SMA
c
RF_P
Balun
C2
RF_N
RF_N
RF_N
PAEN
PAEN
EN
EN
HGM
BIAS
HGM
RXTX
R151
Figure 2. CC2590EM Evaluation Module
Table 2. List of Materials (See CC2590EM Reference Design)
DEVICE
FUNCTION
VALUE
L112
Part of antenna match.
1.5 nH: LQW15AN1N5B00 from Murata
C111
Part of antenna match.
0.5 pF, GRM1555C1HR50BZ01 from Murata
C112
DC block.
47 pF, GRM1555C1H470JZ01 from Murata
C161
Decoupling capacitor.
1 nF: GRM1555C1H102JA01 from Murata
C101/C102
Decoupling. Will affect PA resonance. See CC2590EM reference
design for placement.
27 pF || 1 nF. The smallest cap closest to CC2590.
27 pF: GRM1555C1H270JZ01 from Murata
1 nF: GRM1555C1H102JA01 from Murata
C131/C132
Decoupling. Will affect LNA resonance. See CC2590EM reference
design for placement.
18 pF || 1 nF. The smallest cap closest to CC2590.
18 pF: GRM1555C1H180JZ01 from Murata
1 nF: GRM1555C1H102JA01 from Murata
C2
Decoupling of external balun
1 nF: LWQ15AN1N5B00 from Murata
TL101 (1)
Transmission line. Will affect PA resonance. (simulated inductance:
0.87nH)
See CC2590EM reference design.
Transmission line: Length ≈ 40 mil, Width = 8 mil
TL131
Transmission line. Will affect LNA resonance. (simulated inductance: See CC2590EM reference design.
1.64nH)
Transmission line: Length ≈ 100 mil, Width = 8 mil
R151
Bias resistor
(1)
4.3 kΩ: RK73H1ETTP4301F from Koa
Transmission lines are measured from edge of pad of the CC2590 footprint to edge of pad of DC coupling capacitor. The length of the
transmission lines depend on the distance to the ground plane. If another PCB stack up is chosen the length of the transmission lines
needs to be adjusted.
PCB description: 4 layer PCB 1.6mm
Copper 1: 35 µm
Dielectric 1-2: 0.35 mm (e.g. 2x Prepreg 7628 AT05 47% Resin)
Copper 2: 18 µm
Dielectric 2-3: 0.76 mm (4 x 7628M 43% Resin)
Copper 3: 18 µm
Dielectric 3-4: 0.35 mm (e.g. 2x Prepreg 7628 AT05 47% Resin)
Copper 4: 35 µm
DE104iML or equivalent substrate (Resin contents around 45%, which gives Er=4.42 at 2.4GHz, TanD=0.016)
6
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CC2590
www.ti.com ........................................................................................................................................................................................ SWRS080 – SEPTEMBER 2008
TYPICAL CHARACTERISTICS
LNA GAIN AND NOISE FIGURE
vs
FREQUENCY
LNA GAIN
vs
TEMPERATURE
13
5.4
5.3
11
5.2
10
5.1
9
5
8
4.9
7
4.8
6
4.7
Noise Figure HGM
5
4.6
4
4.5
3
4.4
2
4.3
1
4.2
Gain LGM
0
Gain − dB
Gain HGM
Noise Figure − dB
Gain − dB
12
4.1
-1
4
-2
2400 2410
3.9
2420
2430 2440 2450
2460
2470
2480
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
-1
-2
-3
-40
f − Frequency − MHz
HGM
LGM
-20
0
20
40
60
80
T − Temperature − oC
Figure 3.
Figure 4.
LNA GAIN
vs
POWER SUPPLY
13
12
m1
freq=2.440GHz
S(1,1)=0.129 / -31.279
impedance = 61.723 - j8.383
HGM
8
7
6
5
4
3
2
S(1,1)
Gain − dB
11
10
9
1
0
-1
-2
-3
m1
LGM
2
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
Power Supply − V
freq (2.400GHz to 2.485GHz)
Figure 5.
Figure 6. Input Impedance of LNA Measured from Antenna
Port on CC2590EM
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CC2590
SWRS080 – SEPTEMBER 2008 ........................................................................................................................................................................................ www.ti.com
TYPICAL CHARACTERISTICS (continued)
PAE
Pout
I_VDD
0
2
4
25
24.5
23
24
PAE
22
21
23
20
22.5
19
22
18
21
16
20.5
15
20
19.5
14
13
18.5
12
11
2400 2410
6
18
2420 2430
2440 2450 2460
2470 2480
f − Frequency − MHz
Figure 8.
OUTPUT POWER, PAE AND
CURRENT CONSUMPTION
vs
TEMPERATURE
OUTPUT POWER, PAE AND
CURRENT CONSUMPTION
vs
POWER SUPPLY
23
26
26
22.8
24
PAE
22.6
22
22.4
20
22.2
I_VDD
18
22
16
21.8
14
21.6
Pout
12
21.4
10
21.2
8
-40 -30 -20 -10 0
10 20 30 40 50 60 70 80
21
Output Power (dBm) and PAE − %
28
Current Consumption − mA
Output Power (dBm) and PAE − %
19
Pout
Figure 7.
24
21.5
I_VDD
17
Input Power − dBm
26
PAE
25
22
24
20
23
I_VDD
18
22
21
16
14
20
POUT
12
19
10
18
8
2
2.2
o
T − Temperature − C
Figure 9.
8
23.5
2.4
2.8
2.6
3
Power Supply − V
3.2
3.4
Current Consumption − mA
-6 -4 -2
25
24
Current Consumption − mA
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
Output Power (dBm) and PAE − %
28
26
24
22
20
18
16
14
12
10
8
6
4
2
0
-2
-4
-6
-8
-20 -18 -16 -14 -12 -10 -8
OUTPUT POWER, PAE AND
CURRENT CONSUMPTION
vs
FREQUENCY
Current Consumption − mA
Output Power (dBm) and PAE − %
OUTPUT POWER, PAE AND
CURRENT CONSUMPTION
vs
INPUT POWER
17
3.6
Figure 10.
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CC2590
www.ti.com ........................................................................................................................................................................................ SWRS080 – SEPTEMBER 2008
Controlling the Output Power from CC2590
The output power of CC2590 is controlled by controlling the input power. The CC2590 PA is designed to work in
compression (class AB), and the best efficiency is reached when a strong input signal is applied.
Input Levels on Control Pins
The four digital control pins (PAEN, EN, HGM, RXTX) have built-in level-shifting functionality, meaning that if the
CC2590 is operating from a 3.6-V supply voltage, the control pins will still sense 1.6-V - 1.8-V signals as logical
‘1’.
An example of the above would be that RXTX is connected directly to the RXTX pin on CC24xx, but the global
supply voltage is 3.6-V. The RXTX pin on CC24xx will switch between 0-V (RX) and 1.8-V(TX), which is still a
high enough voltage to control the mode of CC2590.
The input voltages should however not have logical ‘1’ level that is higher than the supply.
Connecting CC2590 to a CC24xx Device
Table 3. Control Logic for Connecting CC2590 to a CC24xx Device
PAEN = EN
RXTX
HGM
MODE OF OPERATION
0
X
X
Power Down
1
0
0
RX Low Gain Mode
1
0
1
RX High Gain Mode
1
1
X
TX
VDD
VDD
VDD
= PCB trace inductor
C131/C132
TL131
TL101
C161
C101/C102
AVDD_LNA
AVDD_BIAS
AVDD_PA2
CC24xx
RF_P
RF_P
RF_P
RF_P
L21
RXTX
RXTX
L111
RXTX
C112
CC2590
ANT
L112
C113
TXRX_SWITCH
RF_N
RF_N
RF_N
RF_N
PAEN
C111
RREG_OUT (CC243x, CC2480),
VREGOUT (CC2420), GIO1 (CC2400)
BIAS
EN
P1_1 (CC243x), GPIO1 (CC2480),
GIO6 (CC2400)
HGM
R151
Alternatively to
VDD/GND/MCU
(CC2420)
Alternatively
from MCU
Figure 11. CC2590 + CC24xx Application Circuit
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CC2590
SWRS080 – SEPTEMBER 2008 ........................................................................................................................................................................................ www.ti.com
Connecting CC2590 to the CC2500, CC2510, or CC2511 Device
Table 4. Control Logic for Connecting CC2590 to a CC2500/10/11 Devices
PAEN
EN
RXTX
HGM
0
0
NC
X
MODE OF OPERATION
Power Down
0
1
NC
0
RX Low Gain Mode
0
1
NC
1
RX High Gain Mode
1
0
NC
X
TX
1
1
NC
X
Not allowed
VDD
C101/C102
= PCB trace inductor
VDD
VDD
C131/C132
AVDD_LNA
AVDD_BIAS
AVDD_PA2
TL131
TL101
C161
CC2500
CC2510
CC2511
RF_P
RF_P
RF_P
RXTX
RXTX
L111
RXTX
C112
CC2590
ANT
C113
C111
BIAS
L112
RF_P
NC
RF_N
RF_N
RF_N
RF_N
PAEN
GDO0
EN
GDO2
HGM
R151
Connected to
VDD/GND/MCU
Alternatively
from MCU
Figure 12. CC2590 + CC2500/10/11 Device Application Circuit
10
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Connecting CC2590 to a CC2520 Device
Table 5. Control Logic for Connecting CC2590 to a CC2520 Device
PAEN
EN
RXTX
HGM
0
0
NC
X
Power Down
0
1
NC
0
RX Low Gain Mode
0
1
NC
1
RX High Gain Mode
1
0
NC
X
TX
1
1
NC
X
Not allowed
VDD
C101/C102
VDD
VDD
AVDD_LNA
AVDD_PA2
AVDD_BIAS
= PCB trace inductor
C131/C132
TL131
TL101
C161
CC2520
RF_P
RF_P
RF_P
RXTX
RXTX
L111
RXTX
C112
CC2590
ANT
C113
C111
BIAS
L112
MODE OF OPERATION
RF_P
NC
C1
RF_N
RF_N
RF_N
RF_N
PAEN
GPIO5
EN
GPIO4
HGM
GPIO3
R151
Alternatively to
VDD/GND/MCU
Alternatively
from MCU
Figure 13. CC2590 + CC2520 Application Circuit
PCB Layout Guidelines
The exposed die attach pad must be connected to a solid ground plane as this is the primary ground connection
for the chip. Inductance in vias to the pad should be minimized. It is highly recommended to follow the reference
layout. Changes will alter the performance. Also see the PCB landpattern information in this data sheet. For best
performance, minimize the length of the ground vias, by using a 4-layer PCB with ground plane as layer 2 when
CC2590 is mounted onto layer 1.
PCB trace inductors are used to be able to optimize the inductance value, and they are too small to be replaced
by discrete inductors. The placement of the power supply decoupling capacitors C101/C102 and C131/C132 are
important to set the PCB trace inductance values accurately.
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PACKAGE OPTION ADDENDUM
www.ti.com
15-May-2015
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
CC2590RGVR
ACTIVE
VQFN
RGV
16
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
CC2590
CC2590RGVRG4
ACTIVE
VQFN
RGV
16
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
CC2590
CC2590RGVT
ACTIVE
VQFN
RGV
16
250
Green (RoHS
& no Sb/Br)
CU NIPDAU | Call TI
Level-2-260C-1 YEAR
-40 to 85
CC2590
CC2590RGVTG4
ACTIVE
VQFN
RGV
16
250
Green (RoHS
& no Sb/Br)
Call TI
Level-2-260C-1 YEAR
-40 to 85
CC2590
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
15-May-2015
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
21-Mar-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
CC2590RGVR
VQFN
RGV
16
2500
330.0
12.4
4.3
4.3
1.5
8.0
12.0
Q2
CC2590RGVT
VQFN
RGV
16
250
180.0
12.4
4.3
4.3
1.5
8.0
12.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
21-Mar-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
CC2590RGVR
VQFN
RGV
16
2500
338.1
338.1
20.6
CC2590RGVT
VQFN
RGV
16
250
210.0
185.0
35.0
Pack Materials-Page 2
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