Quanta_zl2

Quanta_zl2
1
2
3
4
5
6
7
5V / 3.3V / 12V
3V_ALWAYS
Page : 35
+12V
Centrino
CLOCK GEN
ICS
ICS954201
CRANE ( ZL2 )
3V_S5
INTEL Mobile_479 CPU
[email protected] SATA 要打
[email protected] 3in1
Page : 3 , 4
ATI
M24P/M26P
64M /
128M
3VSUS
5VSUS
HOST BUS 400MHz
CLK_SDRAM0~5,
CLK_SDRAM0~5#
333MHZ DDR
DDR-SODIMM1
A
[email protected] 4401
EXT_CRT
EXT_TV-OUT
SWITCH
CIRCUIT
Page:9~10
n打
[email protected] 5705M 要打
[email protected] DOCKING 要打
CRT
Page:17
LVDS
INT_LVDS
RGB
INT_CRT
TVOUT
INT_TV-OUT
LVDS
1257 BGA
Page:16
915GM/PM
MVREF_DM
n打
[email protected] NEW CARD 要打
EXT_LVDS
Page : 11 ~ 14
ALVISO
+2.5V
Page : 36
SMDDR_VTERM
[email protected] INTVGA 要打
[email protected] W/O DOCKING要打
[email protected] SWAPPABLE ODD 要打
PCIE
+1.8V
[email protected] EXT VGA 要打
[email protected] INT. VGA WITH DOCK
[email protected] FIXED ODD要打
A
2.5VSUS
[email protected] INT. VGA WITH DOCK
DORTHAN
CELEROM-M
Page : 2
+5V
2.5V / 1.25V
8
BOM MARK
5VPCU
TV-OUT
DDR-SODIMM2
Page:16
Page : 5 ~ 8
Page:9~10
1.5V_S5
1.5V / 1.05V / 1.8V
B
DVI
CH7307
+1.5V
Page : 37
B
DOCKING/DVI
AGP_VCC (+1.5V)
1.2VCCT
Page: 33
Page:15
SATA - HDD
Page:21
VTT
IDE - HDD
3 IN 1
Page:21
CPU CORE
VCC_CORE
DMI I/F
Page : 34
Page:21
ATA 66/100
+1.2V
PCMCIA
Page: 24
PCI7411
PCI BUS
Page: 23
1394
Page:21
AC97
C
PCMCIA+1394
+3 IN 1
NEW CARD
Page : 32
609 BGA
MEDIA BAY
2.5V_VGA
Page : 38
PCIE
ICH6-M
VGA_CORE
Page: 24
TI
SATA
IDE-ODD
BATTERY
CHARGER
Page: 23
USB 2.0
Page : 18 ~ 20
MINI-PCI
AUDIO CODEC
Page : 39
CONEXANT
20468-31
BATTERY
SELECT
LPC
Page:27
NS
NS
KBC(97551)
SIO (87383)
Page : 40
AMP
MAX9750
Page:28
MIC IN
LINE
IN
Page:27
Page:27
SPEKER
Page:28
MODEM
CONEXANT
20493-21
Page : 29
BROADCOM
10/100/1G LAN
Page : 31
Page:28
RJ11
DOCKING
PS2
Touchpad
Keyboard
IrDA
DOCKING
Print Port
DOCKING
COM Port
Page:27
Page:33
Page:30
Page:30
Page:31
Page:33
Page:33
PM : 紀明進 Sunyu Jih
EE Laerer : 劉鳴豹 Selmon Liu
ME Leader : 林哲敏 Mill Lin
2
PCI ROUTING TABLE
IDSEL
INTERUPT
DEVICE
REQ0# / GNT0#
REQ2# / GNT2#
REQ1# / GNT1#
AD24
AD19
AD17
INTA#
INTB# , INTD#
INTC#,INTD#,INTA#
BROADCOM LAN
MINI-PCI
TI 7411
SYSTEM 3
USB PORT
DOCKING 2
USB PORT
Page : 22
Page : 22
USB2,3,5
USB0,1
RJ45
Page:26
Page:26
Page:25
Page:27
LINE
OUT
BOTHHAND
TRANSFORMER
4401 / 5705M
D
1
C
Wireless LAN
Modem/LAN
Page : 22
MINI-USB
Page: 22
USB4
REV.E
PROJECT : ZL2
Quanta Computer Inc.
Size
Document Number
Date:
Wednesday, December 22, 2004
R ev
F
BLOCK DIAGRAM
3
4
5
6
7
Sheet
1
8
of
41
D
4
5
6
7
Place these termination
to close CK410M.
REVB: POP R203 R468 AND DEPOP R204, R470 FOR DOTHAN B
R205
C355
10U/10V_8
CG_XIN
R488
*10K_4
SMBCK
SMBDT
R482 1
<19> CLK48_USB
2 33_4
<4,6> SELPSB1_CLK
<4,6> SELPSB2_CLK
10
55
54
VTT_PWRGD#/PD
PCI/SRC_STOP#
CPU_STOP#
SELPSB0_CLK
SELPSB1_CLK
SELPSB2_CLK
VDD_CKGREF
46
47
SCLK
SDATA
12
16
53
FSA/USB_48
FSB/TEST_MODE
FSC/TEST_SEL
48
2
1
C373
10U/10V_8
.047U_4
C706
.047U_4
.047U_4
1
C372
VDD_CKG_CPU
42
21
28
34
VDD_CPU
VDD_SRC0
VDD_SRC1
VDD_SRC2
VDD_CKG_48
R465
475/F_4
1
2
11
VDD_48
39
IREF
2
1
C371
2
10U/10V_8
2
C366
2
2
R212
2.2
1
2
ACB2012L-120
1
L51
1
1
+3V
VDD_PCI_1
VDD_PCI_2
Iref=5mA,
Ioh=4*Iref
C370
IR EF
.047U_4
[email protected]
4
2
38
44
43
R_HCLK_CPU
4
R_HCLK_CPU# 2
CPU1
CPU1#
41
40
R_HCLK_MCH 4
R_HCLK_MCH# 2
CPU2_ITP/SRC5
CPU2#_ITP/SRC5#
36
35
R_MCH_3GPLL 4
R_MCH_3GPLL# 2
*PERREQ1#
*PERREQ2#
33
32
SRC4
SRC4#
31
30
R_PCIE_VGA
R_PCIE_VGA#
SATACLK
SATACLK#
26
27
R_PCIE_SATA
2
R_PCIE_SATA# 4
SRC3
SRC3#
24
25
R_PCIE_EZ1
R_PCIE_EZ1#
2
4
SRC2
SRC2#
22
23
R_PCIE_ICH
R_PCIE_ICH#
2
4
SRC1
SRC1#
19
20
R_PCIE_EZ2
R_PCIE_EZ2#
2
4
SRC0
SRC0#
17
18
R_PCIE_NEWC 2
R_PCIE_NEWC# 4
5
4
3
56
9
8
R_PCLK_591
R_PCLK_PCM
R_PCLK_LAN
R_PCLK_SIO
R_PCLK_MINI
R_PCLK_ICH
CK-410M
R_DOT96
R_DOT96#
14
15
DOT96
DOT96#
RP15
13
51
2
6
29
45
B: DEPOP COMPONENTS FOR
DIFFERENT SKUS
3
1
SMBUS ADDRESS: D2, D3
PCI4
PCI3
PCI2
PCIF1
PCIF0/ITP_EN
3 RP10
1
4P2R-S-33
3 RP11
1
4P2R-S-33
3 RP12
1
4P2R-S-33
R480
1
CLKOUT
CLKOUT#
12
11
7
8
SCLK
SDATA
IREF
14
CLK_EN#
1
R117
5
6
VSSIREF
PWRDWN
VSS
REFOUT/SELVSSA
13
10
15
2
*10K_4
4
2
OFF
CLK_PCIE_NEWC <32>
CLK_PCIE_NEWC# <32>
2
2
2
2
2
2
DREFSSCLK <6>
DREFSSCLK# <6>
R110
*49.9/F_4
R108
*475/F_4
R114
*49.9/F_4
CPU
SRC
PCI
1
DOTHAN-A 400
1
0
1
100
100
33
DOTHAN-A 533
0
0
1
133
100
33
R490
R491
1
1
2 [email protected]/F_4
2 [email protected]/F_4
CLK_PCIE_VGA
CLK_PCIE_VGA#
R193
R192
1
1
2 [email protected]/F_4
2 [email protected]/F_4
CLK_PCIE_SATA
CLK_PCIE_SATA#
R486
R487
1
1
2 [email protected]/F_4
2 [email protected]/F_4
CLK_PCIE_EZ2
CLK_PCIE_EZ2#
R492
R493
1
1
2 [email protected]/F_4
2 [email protected]/F_4
CLK_PCIE_ICH
CLK_PCIE_ICH#
R209
R208
1
1
2 49.9/F_4
2 49.9/F_4
CLK_PCIE_EZ1
CLK_PCIE_EZ1#
R207
R206
1
1
2 [email protected]/F_4
2 [email protected]/F_4
R211 1
R210 1
2 [email protected]/F_4
2 [email protected]/F_4
CLK_PCIE_NEWC
CLK_PCIE_NEWC#
C
Place these termination
to close CK410M.
0
1
1
166
100
33
0
1
0
200
100
33
0
0
0
266
100
33
1
0
0
333
100
33
SMBCK
SMBCK <9>
1
1
0
400
100
33
1
1
1
RSVD
100
33
2
3
4
5
1
D
C230
*10P_4
QUANTA
COMPUTER
2
1 2
R104
*33_4
Title
CLOCK GENERATOR
Q41
2N7002
1
NEW_CLKREQ#
DOT96
DOT96#
CLK_SSC_IN
1
3
SMBDT <9>
2
3
5,32,33> PCLK_SMB
R616
1K_4
1
2
4
FSC FSB FSA
2
SMBDT
Q40
2N7002
+3V
D
B
B: DEPOP COMPONENTS FOR DIFFERENT SKUS
4P2R-S-10K
1
EZ_CLKREQ#
*4P2R-S-33
*MK1493-05GT
3
R615
*1K_4
PCLK_591 <29>
PCLK_PCM <23>
PCLK_LAN <25>
PCLK_SIO <31>
PCLK_MINI <22>
PCLK_ICH <18>
RP9
5,32,33> PDAT_SMB
B: DEPOP COMPONENTS FOR
SKUS
+3V
C: ADD PULLUPS
D: DEPOP R615
3
1
2
SMBCK
SMBDT
OFF
CLK_PCIE_SATA <18>
DEFALT
CLK_PCIE_SATA# <18>
RP2
R_DREFSSCLK
R_DREFSSCLK#
C915
10P_4
SOLUTION
TO 10p
- SRC0, 2, SATA
- SRC1, 3, 4
CLK_PCIE_VGA <11>
CLK_PCIE_VGA# <11>DEFALT
33_4
33_4
33_4
33_4
33_4
33_4
2
16
9
14M_ICH <19>
14M_SIO
1
SSCD_VDD
VDDA
VDD
14M_SIO <31>
CLK_PCIE_EZ2 <33>
CLK_PCIE_EZ2# <33>
+3V
1
*10K_4
S3
S2
S1
12_4
2
A
CLK_PCIE_ICH <19> DIFFERENT
CLK_PCIE_ICH# <19>
C229
*10U/10V_8
2
2
R111
*10K_4
1
R109
1
1
+3V
2
2
R106
*10K_4
CLKIN
R202
1
CLK_PCIE_EZ1 <33>
CLK_PCIE_EZ1# <33>
U9
2
3
4
14M_SIO
CLK_MCH_3GPLL <6>D: ADD EMI
CLK_MCH_3GPLL# <6> E: CHANGE
1
2
2
1
C241
*.1U_4
1
12_4
2
10K_4
2
L23
*BLM21B331SB
1
2
SSCD_VDD
SSC_S3
SSC_S2
SSC_S1
CLK_SSC_IN
R200
1
HCLK_MCH <5>
HCLK_MCH# <5>
PULL HIGH TO SET PIN35,36 TO HOST CLK
CLK_SSC_IN
*24_4
2
HCLK_CPU <3>
HCLK_CPU# <3>
3 RP13
1
[email protected]
1 RP20
3
[email protected]
1 RP19
3
[email protected]
1 RP18
3
4P2R-S-33
1 RP17
3
[email protected]
1 RP16
3
[email protected]
R478
1
R477
1
R476
1
R464
1
R481
1
R479
1
4
2
ICS954217
250mA ( MAX. )
SMBUS ADDRESS: D4, D5
R201
1
NEW_CLKREQ# <32> PEREQ1#
EZ_CLKREQ# <33> PEREQ2#
B: DEPOP SSC COMPONENTS
C
2 49.9/F_4
2 49.9/F_4
REF
*Internal Pull-Down Resistor PCI5
<6> DOT96
<6> DOT96#
R195 1
R194 1
CPU0
CPU0#
VDD_REF
1
7
CLKVDD
2 49.9/F_4
2 49.9/F_4
14M_REF
VSSA
XTAL_OUT
1
B
37
XTAL_IN
49
2 49.9/F_4
2 49.9/F_4
R197 1
R196 1
52
GND_48
GND_REF
GND_PCI_1
GND_PCI_2
GND_SRC
GND_CPU
R463
CLK_EN#
50
SMbus address D2
1
1
R470
*0_4
1
R204
*0_4
CG_XOUT
<34> CLK_EN#
<19> STP_PCI#
<19,34> STP_CPU#
SELPSB0_CLK
2
SELPSB1_CLK
U35
14.318MHZ/20PF
VDDA
2
1
R489
10K_4
2
2
SELPSB2_CLK
C709
33P_4
2
1
2
Y4
R468
1K_4
1
R203
1K_4
1
+3V
2
+VCCP
2
+VCCP
R199 1
R198 1
1
.047U_4
1
A
C708
2
C718
33P_4
2
1
2
.047U_4
1
C707
2
.047U_4
B: DEPOP SSC COMPONENTS
E: R200/202 CHANGE TO 12ohm for EA pass
1
C369
2.2
2
.047U_4
1
C361
2
.047U_4
1
1
C368
2
10U/10V_8
VDDA_CKG
2
1
C722
2
ACB2012L-120
2
L50
VDD_CKG_CPU
2
1
1
+3V
8
1
3
2
2
1
1
6
Size
Document Number
ZL2
Date:
Tuesday, December 21, 2004
7
Rev
F
Sheet
of
2
8
41
1
2
3
4
5
6
7
8
+3V
HD#[0..63]
U31A
1 OF 3
REQUEST
PHASE
SIGNALS
ADSTB0#
ADSTB1#
B
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
R2
P3
T2
P1
T1
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
<5> ADS#
N2
ADS#
<5>
<5>
<5>
<5>
<5>
IERR#
A4
IERR#
<5> HBREQ0#
<5> BPRI#
<5> BNR#
<5> HLOCK#
N4
J3
L1
J2
BREQ0#
BPRI#
BNR#
LOCK#
ARBITRATION
PHASE
SIGNALS
<5> HIT#
<5> HITM#
<5> DEFER#
K3
K4
L4
HIT#
HITM#
DEFER#
SNOOP PHASE
SIGNALS
C8
B8
A9
C9
M3
H1
K1
L2
BPM0#
BPM1#
BPM2#
BPM3#
TRDY#
RS0#
RS1#
RS2#
RESPONSE
PHASE
SIGNALS
A20M#
FERR#
IGNNE#
CPUPWRGD
SMI#
C2
D3
A3
E4
B4
A20M#
FERR#
IGNNE#
PWRGOOD
SMI#
PC
COMPATIBILITY
SIGNALS
TCK
TDO
TDI
TMS
TRST#
A13
A12
C12
C11
B13
A16
A15
B10
A10
A7
TCK
TDO
TDI
TMS
TRST#
ITP_CLK0
ITP_CLK1
PREQ#
PRDY#
DBR#
DIAGNOSTIC
& TEST
SIGNALS
D1
D4
C6
A6
B7
G1
LINT0
LINT1
STPCLK#
SLP#
DPSLP#
DPRSTP#
EXECUTION
CONTROL
SIGNALS
B18
A18
THERMDA
THERMDC
C17
THERMTRIP#
BPM0#
BPM1#
BPM2#
BPM3#
<5> HTRDY#
<5> RS#0
<5> RS#1
<5> RS#2
+VCCP
<18> A20M#
<18> FERR#
<18> IGNNE#
<18> CPUPWRGD
<18> SMI#
R429
150_4
TDI
T180
T179
PREQ#
PRDY#
DBR#
<19> DBR#
G1: NC for Dothan and
DPRSTP# for Yonah
<18> INTR
<18> NMI
<18> STPCLK#
<5,18> CPUSLP#
<18> DPSLP#
<18> DPRSLP#
C: UNINSTALL
D
R441
<6,18> THERMTRIP#
+VCCP
R436
ERROR
SIGNALS
*0_4
56_4
STPCLK#
CPUSLP#
DPSLP#
THERMDA
THERMDC
THERMTRIP#_PWR
CPU_PROCHOT# B17
DATA
PHASE
SIGNALS
2
+3V
47
3V_THM
R435
C661
10K_4
.1U_4
U33
1
3
2
4
THERMDC
10 mil trace /
10 mil space
VCC
DXN
DXP
-OVT
1
7KBSMDAT
8KBSMCLK
6
5
SMDATA
SMCLK
-ALT
GND
Q37
2N7002
3
MBCLK
MBCLK <29,40>
MAX6648_AL# <29>
MAX6657
+3V
R448
10K_4
C674
2200P
R449
*10K_4
+3V
THERMDA
MAX6648_OV# <30>
+VCCP
B: DEPOP
+VCCP
D: POP
E: DEPOP
R617
330_4
R618
56_4
R449
R449
B
R449
R619
THERMTRIP#_PWR
1
330_4
3
Q53
1999_SHT# <35>
MMBT3904
C: ADD SHUTDOWN CIRCUITS
B: DEPOP R425, R426, R421, C640 WHEN NO JITP
+VCCP
R422
54.9/F_4
+VCCP
R426
*54.9/F_4
R428
39.2/F_4
JITP CONN
TDI
TMS
C23
C22
K24
L24
W25
W24
AE24
AE25
HDSTBN0#
HDSTBP0#
HDSTBN1#
HDSTBP1#
HDSTBN2#
HDSTBP2#
HDSTBN3#
HDSTBP3#
DINV0#
DINV1#
DINV2#
DINV3#
D25
J26
T24
AD20
HDBI0#
HDBI1#
HDBI2#
HDBI3#
DBSY#
DRDY#
M2
H2
DBSY# <5>
DRDY# <5>
BCLK1
BCLK0
B14
B15
HCLK_CPU# <2>
HCLK_CPU <2>
T177
T173
TDO
TRST#
<5>
<5>
<5>
<5>
<5>
<5>
<5>
<5>
B5
CPUINIT#
RESET#
B11
CPURST#
DPWR#
C19
+VCCP
C
T166
T176
R425
*22.6/F_4
R421
*22.6/F_4
CPURST#
T162
TCK
+3V_S5
T171
C640
R409
*.1U_4
150_4
T157
DBR#
T178
TCK NO STUB
T155
T156
T158
T160
T163
T161
<5>
<5>
<5>
<5>
BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
close to ITP conn
CPUINIT# <18>
TCK
TRST#
R430
R427
27.4/F_4
680_4
D
CPURST# <5>
DPWR# <5>
close to CPU
+VCCP
Title
4
MBDATA <29,40>
15 MIL
R439
PROCHOT#
3
MBDATA
A
IERR#
CPUPWRGD
2
3
+3V
+3V
Dothan Processor
1
Q38
2N7002
1
DSTBN0#
DSTBP0#
DSTBN1#
DSTBP1#
DSTBN2#
DSTBP2#
DSTBN3#
DSTBP3#
INIT#
THERMAL DIODE
R442
10K_4
2
Dothan
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
1
U3
AE5
<5> HADSTB0#
<5> HADSTB1#
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A19
A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26
2
P4
U4
V3
R3
V2
W1
T4
W2
Y4
Y1
U1
AA3
Y3
AA2
AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1
2
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
A
C
HD#[0..63] <5>
HA#[3..31]
<5> HA#[3..31]
+3V
5
R393
R402
6
56_4
200/F_4
QUANTA
COMPUTER
Dothan Processor (HOST)
Size
Document Number
ZL2
Date:
Tuesday, December 21, 2004
7
Rev
F
Sheet
of
3
8
41
1
2
3
4
5
6
7
+VCCP
8
U31C
+VCCP
U31B
COMP0
COMP1
COMP2
COMP3
R455
1K/F
A
R458
R457
27.4/F_4
R132
54.9/F_4
COMP0
COMP1
COMP2
COMP3
Place voltage
divider within
0.5" of GTLREF
pin
R124
27.4/F_4
GTLREF0 AD26
R456
TEST1
TEST2
R407
*1K_4
R459
*1K_4
Place pulldown resistors within
0.5" of COMP pins
1
2
+1.8V
C702
B2
RSVD2
RSVD3
RSVD4
RSVD5
AC26
N1
B1
F26
VCCA3
VCCA2
VCCA1
VCCA0
CPU_VCCA
*0_8
2
D6
D8
D18
D20
D22
E5
E7
E9
E17
E19
E21
F6
F8
F18
F20
F22
G5
G21
H6
H22
J5
J21
K22
U5
V6
V22
W5
W21
Y6
Y22
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC9
AC11
AC13
AC15
AC17
AC19
AD8
AD10
AD12
AD14
AD16
AD18
AE9
AE11
AE13
AE15
AE17
AE19
AF8
AF10
AF12
AF14
AF16
AF18
1
2
1
C310
10U_6.3V
2
2
10U_6.3V
1
C321
10U_6.3V
2
2
VCC_CORE
1
C329
C322
10U_6.3V
2
1
C313
10U_6.3V
2
1
1
C300
10U_6.3V
2
1
C294
10U_6.3V
2
1
C281
C656
10U_6.3V
C683
10U_6.3V
VCC_CORE
2
1
C320
10U_6.3V 10U_6.3V
2
2
1
C325
2
1
VCC_CORE
10U_6.3V
1
C649
10U_6.3V
2
1
1
C255
10U_6.3V
2
1
C298
10U_6.3V
2
1
C286
10U_6.3V
C684
10U_6.3V
VCC_CORE
10U_6.3V
10U_6.3V
2
C305
C657
10U_6.3V
1
2
2
C659
1
10U_6.3V
1
10U_6.3V
C668
1
2
2
10U_6.3V
C663
1
1
1
10U_6.3V
C653
2
10U_6.3V
C671
2
1
1
10U_6.3V
C309
2
2
10U_6.3V
C301
2
1
C
C672
2
C279
10U_6.3V
C299
10U_6.3V
1
2
C666
10U_6.3V
1
2
C292
10U_6.3V
1
1
2
C660
1
2
VCC_CORE
10U_6.3V
Total caps = 2633 uF
ESR = 15m ohm/5 // 5m ohm/25 // 5m ohm/15
D
+VCCP
C327
C652
1
1
C681
1
C304
1
1
1
+VCCP
C351
C651
C285 C307 C650 C678 C682
.1U_4
.1U_4
2
.1U_4
2
.1U_4
2
.1U_4
2
2
.1U_4
2
+
150U/4V
<Type>
CC3528
.1U_4
2
POWER,
GROUND,
RESERVED
SIGNALS
VCC00
VCC01
VCC02
VCC03
VCC04
VCC05
VCC06
VCC07
VCC08
VCC09
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VSS00
VSS01
VSS02
VSS03
VSS04
VSS05
VSS06
VSS07
VSS08
VSS09
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
A2
A5
A8
A11
A14
A17
A20
A23
A26
B3
B6
B9
B12
B16
B19
B22
B25
C1
C4
C7
C10
C13
C15
C18
C21
C24
D2
D5
D7
D9
D11
D13
D15
D17
D19
D21
D23
D26
E3
E6
E8
E10
E12
E14
E16
E18
E20
E22
E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1
M4
M5
M21
M24
N3
N6
N22
N23
N26
P2
P5
P21
P24
R1
R4
D10
D12
D14
D16
E11
E13
E15
F10
F12
F14
F16
K6
L5
L21
M6
M22
N5
N21
P6
P22
R5
R21
T6
T22
U21
P23
W4
<34>
<34>
<34>
<34>
<34>
<34>
E2
F2
F3
G3
G4
H4
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
T159
T154
<2,6> SELPSB2_CLK
<2,6> SELPSB1_CLK
SELPSB2_CLK 1
SELPSB1_CLK 1
T146
Z0501
Z0502
AE7
AF6
0_4
2 R433BSEL0 C16
BSEL1 C14
2
R432
0_4
E1
R6
R22
R25
T3
T5
T21
T23
T26
U2
U6
U22
U24
V1
V4
V5
V21
V25
W3
W6
W22
DOTHAN-A NC
DOTHAN-B POP
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
POW ER, GROUND AND NC VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VCCQ0
VSS147
VCCQ1
VSS148
VSS149
VSS150
VID0
VSS151
VID1
VSS152
VID2
VSS153
VID3
VSS154
VID4
VSS155
VID5
VSS156
VSS157
VSS158
VSS159
VSS160
VCCSENSE
VSS161
VSSSENSE
VSS162
VSS163
VSS164
VSS165
BSEL0
VSS166
BSEL1
VSS167
VSS168
VSS169
PSI
VSS170
VSS171
VSS100
VSS172
VSS101
VSS173
VSS102
VSS174
VSS103
VSS175
VSS104
VSS176
VSS105
VSS177
VSS106
VSS178
VSS107
VSS179
VSS108
VSS180
VSS109
VSS181
VSS110
VSS182
VSS111
VSS183
VSS112
VSS184
VSS113
VSS185
VSS114
VSS186
VSS115
VSS187
VSS116
VSS188
VSS117
VSS189
VSS118
VSS190
VSS119
VSS191
VCCP0
VCCP1
VCCP2
VCCP3
VCCP4
VCCP5
VCCP6
VCCP7
VCCP8
VCCP9
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCP17
VCCP18
VCCP19
VCCP20
VCCP21
VCCP22
VCCP23
VCCP24
Dothan
3 OF 3
VID
W23
W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24
A
B
C
Dothan Processor
D
Title
.1U_4
QUANTA
COMPUTER
Dothan Processor (POWER)
Dothan Processor
.1U_4
1
NC1
VCC_CORE
VCC_CORE
2
1
C328
10U_6.3V
2
1
2
1
2
10U_6.3V
2 OF 3
0_8
B
VCC_CORE
Dothan
TEST1
TEST2
C3
AF7
AC1
E26
R462
+1.5V
10U_6.3V
1
C704
.01U/16V_4
R461
C5
F23
T153
T182
T128
T151
CPU_VCCA
C250
GTLREF0
T152
T181
C262
COMP0
COMP1
COMP2
COMP3
54.9/F_4
2K/F_4
10U_6.3V
P25
P26
AB2
AB1
3
Size
Document Number
ZL2
Date:
Tuesday, December 21, 2004
.1U_4
4
5
6
7
Rev
F
Sheet
of
4
8
41
1
2
3
4
5
6
7
8
U34E
C
D
B36
AG37
Y37
V37
T37
P37
M37
K37
H37
E37
AN36
AL36
AJ36
AF36
AE36
AD36
AC36
AB36
AA36
C36
AE35
Y35
W35
V35
U35
T35
R35
P35
N35
M35
L35
K35
J35
H35
G35
F35
E35
D35
B35
AN34
AH34
AD34
AC34
AB34
AA34
C34
AL33
AF33
AD33
W33
V33
U33
T33
R33
P33
N33
M33
L33
K33
J33
H33
G33
F33
E33
D33
AN32
AJ32
AD32
AC32
AB32
AA32
Y32
C32
A32
AL31
AG31
AD31
W31
V31
U31
T31
R31
P31
N31
M31
L31
K31
J31
H31
G31
F31
E31
D31
AP30
AE30
AC30
AB30
AA30
Y30
C30
AM29
AJ29
AG29
AD29
AA29
W29
V29
U29
P29
L29
H29
G29
F29
E29
D29
A29
AC28
AB28
AA28
W28
E28
AN27
AL27
AJ27
AG27
AF27
AB27
AA27
W27
G27
E27
AJ24
AG24
J24
F24
D24
B24
U34A
24.9/F_4
+VCCP
R150
54.9/F_4
HXSCOMP
+VCCP
R438
221/F_4
2
R437
100/F_4
C665
1
HXSWING
.1U_4
HYR COMP
R454
24.9/F_4
+VCCP
R451
54.9/F_4
HYSCOMP
HXRCOMP
HXSCOMP
HXSWING
HYR COMP
HYSCOMP
HYS WING
+VCCP
R453
E4
E1
F4
H7
E2
F1
E3
D3
K7
F2
J7
J8
H6
F3
K8
H5
H1
H2
K5
K6
J4
G3
H3
J1
L5
K4
J5
P7
L7
J3
P5
L3
U7
V6
R6
R5
P3
T8
R7
R8
U8
R4
T4
T5
R1
T3
V8
U6
W6
U3
V5
W8
W7
U2
U1
Y5
Y2
V4
Y7
W1
W3
Y3
Y6
W2
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
C1
C2
D1
T1
L1
P1
HXRCOMP
HXSCOMP
HXSWING
HYRCOMP
HYSCOMP
HYSWING
221/F_4
HYS WING
R452
C690
.1U_4
@ALVISO_GM/GML
100/F_4
A
HA#[3..31]
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
H D#10
H D#11
H D#12
H D#13
H D#14
H D#15
H D#16
H D#17
H D#18
H D#19
H D#20
H D#21
H D#22
H D#23
H D#24
H D#25
H D#26
H D#27
H D#28
H D#29
H D#30
H D#31
H D#32
H D#33
H D#34
H D#35
H D#36
H D#37
H D#38
H D#39
H D#40
H D#41
H D#42
H D#43
H D#44
H D#45
H D#46
H D#47
H D#48
H D#49
H D#50
H D#51
H D#52
H D#53
H D#54
H D#55
H D#56
H D#57
H D#58
H D#59
H D#60
H D#61
H D#62
H D#63
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
G9
C9
E9
B7
A10
F9
D8
B10
E10
G10
D9
E11
F10
G11
G13
C10
C11
D11
C12
B13
A12
F12
G12
E12
C13
B11
D13
A13
F13
HADS#
HADSTB0#
HADSTB1#
HVREF
HBNR#
HBPRI#
BREQ0#
HCPURST#
F8
B9
E13
J11
A5
D5
E7
H10
HA#[3..31] <3>
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
+VCCP
R178
100/F_4
ADS# <3>
HADSTB0# <3>
HADSTB1# <3>
R173
200/F_4
HCLKINN
HCLKINP
AB1
AB2
HCLK_MCH# <2>
HCLK_MCH <2>
HDBSY#
HDEFER#
HDINV#0
HDINV#1
HDINV#2
HDINV#3
HDPWR#
HDRDY#
HDSTBN0#
HDSTBN1#
HDSTBN2#
HDSTBN3#
HDSTBP0#
HDSTBP1#
HDSTBP2#
HDSTBP3#
HEDRDY#
HHIT#
HHITM#
HLOCK#
HPCREQ#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HRS0#
HRS1#
HRS2#
HCPUSLP#
HTRDY#
C6
E6
H8
K3
T7
U5
G6
F7
G4
K1
R3
V3
G5
K2
R2
W4
F6
D4
D6
B3
A11
A7
D7
B8
C7
A8
A4
C5
B4
G8
B5
DBSY# <3>
DEFER# <3>
HDBI0# <3>
HDBI1# <3>
HDBI2# <3>
HDBI3# <3>
DPWR# <3>
DRDY# <3>
HDSTBN0# <3>
HDSTBN1# <3>
HDSTBN2# <3>
HDSTBN3# <3>
HDSTBP0# <3>
HDSTBP1# <3>
HDSTBP2# <3>
HDSTBP3# <3>
HCPUSLP#_GMCH
B
C331
.1U_4
T60
*PAD
HIT# <3>
HITM# <3>
HLOCK# <3>
T170
*PAD
HREQ#0 <3>
HREQ#1 <3>
HREQ#2 <3>
HREQ#3 <3>
HREQ#4 <3>
RS#0 <3>
RS#1 <3>
RS#2 <3>
B: POP FOR DOTHAN B
R162
1
HTRDY# <3>
2
CPUSLP# <3,18>
C
0_4
DO NOT INSTALL FOR DOTHAN-A AND INSTALL FOR DOTHAN-B
D
Title
VSSALVDS
QUANTA
COMPUTER
Alviso (Host)
@ALVISO_GM/GML
1
HV REF
BNR# <3>
BPRI# <3>
HBREQ0# <3>
CPURST# <3>
2
R434
H D#[0..63]
1
<3> HD#[0..63]
HOST
HXRCOMP
2
B
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
1
A
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS
AF23
H23
AL22
AH22
J22
E22
D22
A22
AN21
AF21
F21
C21
AK20
V20
G20
F20
E20
D20
A20
AN19
AG19
W19
T19
J19
H19
C19
AL18
U18
B18
A18
AN17
AJ17
AF17
G17
C17
AL16
K16
H16
D16
A16
K15
C15
AN14
AL14
AJ14
AG14
K14
J14
F14
B14
A14
J12
D12
B12
AN11
AL11
AJ11
AG11
AF11
AA11
Y11
H11
F11
AA10
Y10
L10
D10
AN9
AH9
AE9
AC9
AA9
V9
T9
K9
H9
A9
AL8
Y8
P8
L8
E8
C8
AN7
AK7
AG7
AA7
V7
G7
AJ6
AE6
AC6
AA6
T6
P6
L6
J6
B6
AP5
AL5
W5
E5
AN4
AF4
Y4
U4
P4
L4
H4
C4
AJ3
AC3
AB3
AA3
C3
A3
AN2
AL2
AH2
AE2
AD2
V2
T2
P2
L2
B27
J26
G26
E26
A26
AN24
AL24
J2
G2
D2
Y1
2
3
4
5
6
7
Size
C
Document Number
ZL2
Date:
Tuesday, December 21, 2004
Rev
F
Sheet
5
8
of
41
2
3
4
CFG3
R168
5
6
FOR DDR533
*1K_4
<11> GMCHEXP_TXP[0..15]
CFG[0:2]=100 FOR FSB 533
CFG[0:2]=101 FOR FSB 400
<11> GMCHEXP_TXN[0..15]
<19>
<19>
<19>
<19>
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
Y31
AA35
AB31
AC35
DMIRXP0
DMIRXP1
DMIRXP2
DMIRXP3
<19>
<19>
<19>
<19>
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
AA33
AB37
AC33
AD37
DMITXN0
DMITXN1
DMITXN2
DMITXN3
<19>
<19>
<19>
<19>
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
Y33
AA37
AB33
AC37
DMITXP0
DMITXP1
DMITXP2
DMITXP3
AN33
AK1
CLK_SDRAM2# AE10
AJ33
AF5
CLK_SDRAM5# AD10
SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
SM_CK4#
SM_CK5#
<9,10>
<9,10>
<9,10>
<9,10>
CKE0
CKE1
CKE2
CKE3
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
AP21
AM21
AH21
AK21
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
AN16
AM14
AH15
AG16
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
AF22
AF16
SM_OCDCOMP0
SM_OCDCOMP1
AP14
AL15
AM11
AN10
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3
AK10
AK11
AF37
AD1
AE27
AE28
AF9
AF10
SMRCOMPN
SMRCOMPP
SMVREF0
SMVREF1
SMXSLEWIN
SMXSLEWOUT
SMYSLEWIN
SMYSLEWOUT
E: DEPOP
R184
*40.2/F_4
Route as short
as possible.
M_RCOMPN
M_RCOMPP
+1.25VSUS
SMXSLEW
It's point to point,
55ohm trace, keep as
short as possible.
C
SMYSLEW
NC
2
2
R186
*40.2/F_4
R166
R157
T50
T70
T58
*1K_4
CFG5 Low=DMIx2
High=DMIx4
CFG6 Low=DDR2
High=DDR
*1K_4
R153
*1K_4
<16> INT_TV_COMP
<16> INT_TV_Y/G
<16> INT_TV_C/R
R161
T52
T63
T49
T72
T69
T67
T66
T59
T55
T64
T68
T71
T169
T168
T54
T51
R169
1K_4
CFG9 Low=REVERSE LANE
High=NORMAL
+2.5V
BM_BUSY#
EXT_TS0#
EXT_TS1#
THRMTRIP#
PWROK
RSTIN#
DREF_CLKN
DREF_CLKP
DREF_SSCLKN
DREF_SSCLKP
1
2
M_RCOMPN
10K_4
2
PM_EXTTS#0
R170
1
10K_4
2
PM_EXTTS#1
DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET
E25
F25
C23
C22
F23
F22
F26
C33
C31
F28
F27
LBKLT_CTRL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL
INT_TXLCLKOUTINT_TXLCLKOUT+
INT_TXUCLKOUTINT_TXUCLKOUT+
B30
B29
C25
C24
LACLKN
LACLKP
LBCLKN
LBCLKP
INT_TXLOUT0INT_TXLOUT1INT_TXLOUT2-
B34
B33
B32
LADATAN0
LADATAN1
LADATAN2
INT_TXLOUT0+
INT_TXLOUT1+
INT_TXLOUT2+
A34
A33
B31
LADATAP0
LADATAP1
LADATAP2
INT_TXUOUT0INT_TXUOUT1INT_TXUOUT2-
C29
D28
C27
LBDATAN0
LBDATAN1
LBDATAN2
INT_TXUOUT0+
INT_TXUOUT1+
INT_TXUOUT2+
C28
D27
C26
LBDATAP0
LBDATAP1
LBDATAP2
<17> INT_VGA_GRN
<17> INT_VGA_RED
<17> INT_VSYNC
<17> INT_HSYNC
REFSET
255/F_4
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
R147
1
R148
1
R151
1
T187
T183
T186
T185
T184
T188
T175
T167
T172
T165
T164
R143
1
R152
1
R159
1
T57
INT_BLON
T47
T48
J23
PM_BMBUSY# <19>
J21 PM_EXTTS#0
H22 PM_EXTTS#1
R177
0_4
F5
THERMTRIP# <3,18>
AD30
IMVP_PWRGD <19,34>
1
2
AE29
PLTRST# <11,15,18,21,29,31,32,33>
R460
100
DOT96#
A24
DOT96
A23
DREFSSCLK#_R
C37
B: POP ALWAYS
DREFSSCLK_R
D37
TP_NC1
AP37
TP_NC2
AN37
TP_NC3
AP36
TP_NC4
AP2
TP_NC5
AP1
TP_NC6
AN1
TP_NC7
B1
TP_NC8
A2
TP_NC9
B37
TP_NC10
A36
TP_NC11
A37
<11,16>
<11,16>
<11,16>
<11,16>
TXLCLKOUTTXLCLKOUT+
TXUCLKOUTTXUCLKOUT+
TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC
E24
E23
E21
D21
C20
B20
A19
B19
H21
G21
J20
<17> INT_DDCCLK
<17> INT_DDCDAT
<17> INT_VGA_BLU
<16> I_EDIDCLK
<16> I_EDIDDATA
R156
INT_DISP_ON
1.5K/F
150/F_4
INT_TV_C/R
2
150/F_4
INT_TV_COMP
2
150/F_4
INT_TV_Y/G
2
150/F_4
INT_VGA_RED
2
150/F_4
INT_VGA_GRN
2
150/F_4
INT_VGA_BLU
2
@ALVISO_GM/GML
R171
1
INT_TV_COMP A15
INT_TV_Y/G C16
INT_TV_C/R A17
TV_REFSET
J18
B15
4.99K/F
B16
B17
SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP
CFG11 FOR CPU533
+2.5VSUS
R190
80.6/F_4
H24
H25
AB29
AC29
<15> SDVO_CTRLDATA
<15> SDVO_CTRLCLK
<2> CLK_MCH_3GPLL#
<2> CLK_MCH_3GPLL
SELPSB1_CLK <2,4>
SELPSB2_CLK <2,4>
CFG[17:3] have internal pullup resistors.
CFG[19:18] have internal pulldown resistors
1
1
DMI
CKE0
CKE1
CKE2
CKE3
M_OCDCOMP0
M_OCDCOMP1
CFG0
R164
R167
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
TXLCLKOUT- [email protected]
TXLCLKOUT+
TXUCLKOUT- [email protected]
TXUCLKOUT+
2
4
2
4
T53
T62
T61
1 RN110 INT_TXLCLKOUTINT_TXLCLKOUT+
3
INT_TXUCLKOUT1 RN9
INT_TXUCLKOUT+
3
@ALVISO_GM/GML
1
M_RCOMPP
2
R188
80.6/F_4
R606
D
DREFSSCLK_R
DREFSSCLK#_R
2 *0
2
*0
1
1
DREFSSCLK <2>
DREFSSCLK# <2>
<11,16>
<11,16>
<11,16>
<11,16>
<11,16>
<11,16>
TXLOUT0TXLOUT0+
TXLOUT1TXLOUT1+
TXLOUT2TXLOUT2+
<11,16>
<11,16>
<11,16>
<11,16>
<11,16>
<11,16>
TXUOUT0TXUOUT0+
TXUOUT1TXUOUT1+
TXUOUT2TXUOUT2+
TXLOUT0TXLOUT0+
TXLOUT1TXLOUT1+
TXLOUT2TXLOUT2+
TXUOUT0TXUOUT0+
TXUOUT1TXUOUT1+
TXUOUT2TXUOUT2+
[email protected] 2
4
[email protected] 2
4
[email protected] 2
4
[email protected] 4
2
[email protected] 4
2
[email protected] 4
2
1 RN107 INT_TXLOUT0INT_TXLOUT0+
3
1 RN108 INT_TXLOUT1INT_TXLOUT1+
3
RN109
INT_TXLOUT21
INT_TXLOUT2+
3
3 RN12
1
3 RN11
1
3 RN10
1
INT_TXUOUT0INT_TXUOUT0+
INT_TXUOUT1INT_TXUOUT1+
INT_TXUOUT2INT_TXUOUT2+
LVDS
<9,10>
<9,10>
<9,10>
<9,10>
CFG/RSVD
<9> CLK_SDRAM0#
<9> CLK_SDRAM1#
T78
<9> CLK_SDRAM3#
<9> CLK_SDRAM4#
T73
G16
H13
G14
F16
F15
G15
E16
D17
J16
D15
E15
D14
E14
H12
C14
H15
J15
H14
G22
G23
D23
G25
G24
J17
A31
A30
D26
D25
R176
PM
SM_CK0
SM_CK1
SM_CK2
SM_CK3
SM_CK4
SM_CK5
LCK
AM33
AL1
CLK_SDRAM2 AE11
AJ34
AF6
CLK_SDRAM5 AC10
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
VGA
B
<9> CLK_SDRAM0
<9> CLK_SDRAM1
T79
<9> CLK_SDRAM3
<9> CLK_SDRAM4
T74
DDR MUXING
A
DMIRXN0
DMIRXN1
DMIRXN2
DMIRXN3
GMCHEXP_RXN[0..15]
TV
AA31
AB35
AC31
AD35
GMCHEXP_RXP[0..15]
MISC
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
GMCHEXP_TXN[0..15]
<11,15> GMCHEXP_RXN[0..15]
U34F
+VCCP
R174 4.7K_4
1
2
1K_4
1K_4
T56
D36
D34
EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8
EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15
E30
F34
G30
H34
J30
K34
L30
M34
N30
P34
R30
T34
U30
V34
W30
Y34
GMCHEXP_RXN0
GMCHEXP_RXN1
GMCHEXP_RXN2
GMCHEXP_RXN3
GMCHEXP_RXN4
GMCHEXP_RXN5
GMCHEXP_RXN6
GMCHEXP_RXN7
GMCHEXP_RXN8
GMCHEXP_RXN9
GMCHEXP_RXN10
GMCHEXP_RXN11
GMCHEXP_RXN12
GMCHEXP_RXN13
GMCHEXP_RXN14
GMCHEXP_RXN15
EXP_RXP0
EXP_RXP1
EXP_RXP2
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15
D30
E34
F30
G34
H30
J34
K30
L34
M30
N34
P30
R34
T30
U34
V30
W34
GMCHEXP_RXP0
GMCHEXP_RXP1
GMCHEXP_RXP2
GMCHEXP_RXP3
GMCHEXP_RXP4
GMCHEXP_RXP5
GMCHEXP_RXP6
GMCHEXP_RXP7
GMCHEXP_RXP8
GMCHEXP_RXP9
GMCHEXP_RXP10
GMCHEXP_RXP11
GMCHEXP_RXP12
GMCHEXP_RXP13
GMCHEXP_RXP14
GMCHEXP_RXP15
EXP_TXN0
EXP_TXN1
EXP_TXN2
EXP_TXN3
EXP_TXN4
EXP_TXN5
EXP_TXN6
EXP_TXN7
EXP_TXN8
EXP_TXN9
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15
E32
F36
G32
H36
J32
K36
L32
M36
N32
P36
R32
T36
U32
V36
W32
Y36
CGMCHEXP_TXN0
CGMCHEXP_TXN1
CGMCHEXP_TXN2
CGMCHEXP_TXN3
CGMCHEXP_TXN4
CGMCHEXP_TXN5
CGMCHEXP_TXN6
CGMCHEXP_TXN7
CGMCHEXP_TXN8
CGMCHEXP_TXN9
CGMCHEXP_TXN10
CGMCHEXP_TXN11
CGMCHEXP_TXN12
CGMCHEXP_TXN13
CGMCHEXP_TXN14
CGMCHEXP_TXN15
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
C626 GMCHEXP_TXN0
C667 GMCHEXP_TXN1
C619 GMCHEXP_TXN2
C673 GMCHEXP_TXN3
C613 GMCHEXP_TXN4
C685 GMCHEXP_TXN5
C605 GMCHEXP_TXN6
C689 GMCHEXP_TXN7
C599 GMCHEXP_TXN8
C692 GMCHEXP_TXN9
C594 GMCHEXP_TXN10
C695 GMCHEXP_TXN11
C592 GMCHEXP_TXN12
C698 GMCHEXP_TXN13
C590 GMCHEXP_TXN14
C587 GMCHEXP_TXN15
EXP_TXP0
EXP_TXP1
EXP_TXP2
EXP_TXP3
EXP_TXP4
EXP_TXP5
EXP_TXP6
EXP_TXP7
EXP_TXP8
EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15
D32
E36
F32
G36
H32
J36
K32
L36
M32
N36
P32
R36
T32
U36
V32
W36
CGMCHEXP_TXP0
CGMCHEXP_TXP1
CGMCHEXP_TXP2
CGMCHEXP_TXP3
CGMCHEXP_TXP4
CGMCHEXP_TXP5
CGMCHEXP_TXP6
CGMCHEXP_TXP7
CGMCHEXP_TXP8
CGMCHEXP_TXP9
CGMCHEXP_TXP10
CGMCHEXP_TXP11
CGMCHEXP_TXP12
CGMCHEXP_TXP13
CGMCHEXP_TXP14
CGMCHEXP_TXP15
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
C628 GMCHEXP_TXP0
C664 GMCHEXP_TXP1
C624 GMCHEXP_TXP2
C669 GMCHEXP_TXP3
C616 GMCHEXP_TXP4
C679 GMCHEXP_TXP5
C608 GMCHEXP_TXP6
C686 GMCHEXP_TXP7
C601 GMCHEXP_TXP8
C691 GMCHEXP_TXP9
C595 GMCHEXP_TXP10
C693 GMCHEXP_TXP11
C593 GMCHEXP_TXP12
C697 GMCHEXP_TXP13
C591 GMCHEXP_TXP14
C588 GMCHEXP_TXP15
[email protected]_4
CGMCHEXP_TXP0
2
[email protected]_4
CGMCHEXP_TXN0
2
1
[email protected]_4
CGMCHEXP_TXP1
2
[email protected]_4
CGMCHEXP_TXN1
2
1
[email protected]_4
CGMCHEXP_TXP2
2
[email protected]_4
CGMCHEXP_TXN2
2
1
[email protected]_4
CGMCHEXP_TXP3
2
[email protected]_4
CGMCHEXP_TXN3
2
1
A
B
3
1
DOT96# <2>
DOT96 <2>
<11,16> DISP_ON
<11,16> BLON
DISP_ON
[email protected]_4
R134
INT_DISP_ON
BLON
[email protected]_4
R139
INT_BLON
SDVOB_R+
SDVOB_R+ <15>
SDVOB_R-
SDVOB_R- <15>
SDVOB_G+
SDVOB_G+ <15>
SDVOB_G-
SDVOB_G- <15>
SDVOB_B+
SDVOB_B+ <15>
SDVOB_B-
SDVOB_B- <15>
C627
C308
C312
1
C625
C620
1
C318
SDVOB_CLK+
SDVOB_CLK+ <15>
SDVOB_CLK-
SDVOB_CLK- <15>
C323
1
QUANTA
COMPUTER
Title
Alviso (VGA,DMI)
Size
CustomDocument Number
ZL2
D: DEPOP RP7
Date:
2
C
C629
1
B: NO STUFF WHEN NO DOCKING
*4P2R-S-0
1
24.9/F_4
2
EXP_COMPI
EXP_ICOMPO
RP7
4
2
VCC3G_PCIE
R158
1
D
R607
DREFSSCLK#_R
DREFSSCLK_R
8
GMCHEXP_TXP[0..15]
<11,15> GMCHEXP_RXP[0..15]
U34C
<19>
<19>
<19>
<19>
7
PCI-EXPRESS GRAPHICS
1
3
4
5
6
Tuesday, December 21, 2004
7
R ev
F
Sheet
6
8
of
41
2
3
4
MD[0..63]
SM_DQS[0..7]
SDM[0..7]
5
6
7
B
RN26
4P2R-S-10
RN43
4P2R-S-10
MD31
MD26
MD30
MD27
1
3
3
1
2
4
4
2
R_MD31
R_MD26
R_MD30
R_MD27
RN25
4P2R-S-10
RN42
4P2R-S-10
MD25
MD24
MD28
MD29
1
3
1
3
2
4
2
4
R_MD25
R_MD24
R_MD28
R_MD29
RN24
4P2R-S-10
RN41
4P2R-S-10
MD19
MD18
MD22
MD23
1
3
1
3
2
4
2
4
R_MD19
R_MD18
R_MD22
R_MD23
RN40
4P2R-S-10
RN23
4P2R-S-10
MD21
MD20
MD16
MD17
3
1
3
1
4
2
4
2
R_MD21
R_MD20
R_MD16
R_MD17
RN32
4P2R-S-10
RN44
4P2R-S-10
MD35
MD34
MD39
MD38
1
3
1
3
2
4
2
4
R_MD35
R_MD34
R_MD39
R_MD38
RN35
4P2R-S-10
RN31
4P2R-S-10
MD36
MD37
MD33
MD32
3
1
1
3
4
2
2
4
R_MD36
R_MD37
R_MD33
R_MD32
RN30
4P2R-S-10
RN50
4P2R-S-10
MD59
MD58
MD62
MD63
3
1
3
1
4
2
4
2
R_MD59
R_MD58
R_MD62
R_MD63
RN29
4P2R-S-10
RN49
4P2R-S-10
MD56
MD60
MD61
MD57
3
1
1
3
4
2
2
4
R_MD56
R_MD60
R_MD61
R_MD57
RN28
4P2R-S-10
RN48
4P2R-S-10
MD51
MD50
MD55
MD54
1
3
1
3
2
4
2
4
R_MD51
R_MD50
R_MD55
R_MD54
RN27
4P2R-S-10
RN47
4P2R-S-10
MD48
MD53
MD49
MD52
3
1
3
1
4
2
4
2
R_MD48
R_MD53
R_MD49
R_MD52
RN34
4P2R-S-10
RN46
4P2R-S-10
MD47
MD46
MD42
MD43
1
3
1
3
2
4
2
4
R_MD47
R_MD46
R_MD42
R_MD43
RN45
4P2R-S-10
RN33
4P2R-S-10
MD44
MD45
MD40
MD41
3
1
3
1
4
2
4
2
R_MD44
R_MD45
R_MD40
R_MD41
RN22
4P2R-S-10
RN39
4P2R-S-10
MD10
MD11
MD15
MD14
1
3
1
3
2
4
2
4
R_MD10
R_MD11
R_MD15
R_MD14
1
3
1
3
2
4
2
4
R_MD13
R_MD8
R_MD9
R_MD12
R_MD0
R_MD1
R_MD2
R_MD3
R_MD4
R_MD5
R_MD6
R_MD7
R_MD8
R_MD9
R_MD10
R_MD11
R_MD12
R_MD13
R_MD14
R_MD15
R_MD16
R_MD17
R_MD18
R_MD19
R_MD20
R_MD21
R_MD22
R_MD23
R_MD24
R_MD25
R_MD26
R_MD27
R_MD28
R_MD29
R_MD30
R_MD31
R_MD32
R_MD33
R_MD34
R_MD35
R_MD36
R_MD37
R_MD38
R_MD39
R_MD40
R_MD41
R_MD42
R_MD43
R_MD44
R_MD45
R_MD46
R_MD47
R_MD48
R_MD49
R_MD50
R_MD51
R_MD52
R_MD53
R_MD54
R_MD55
R_MD56
R_MD57
R_MD58
R_MD59
R_MD60
R_MD61
R_MD62
R_MD63
C
RN21
4P2R-S-10
RN38
4P2R-S-10
D
RN37
4P2R-S-10
RN20
4P2R-S-10
RN19
4P2R-S-10
RN36
4P2R-S-10
MD13
MD8
MD9
MD12
MD6
MD3
MD2
MD7
MD1
MD0
MD4
MD5
3
1
1
3
1
3
1
3
4
2
2
4
2
4
2
4
AG35
AH35
AL35
AL37
AH36
AJ35
AK37
AL34
AM36
AN35
AP32
AM31
AM34
AM35
AL32
AM32
AN31
AP31
AN28
AP28
AL30
AM30
AM28
AL28
AP27
AM27
AM23
AM22
AL23
AM24
AN22
AP22
AM9
AL9
AL6
AP7
AP11
AP10
AL7
AM7
AN5
AN6
AN3
AP3
AP6
AM6
AL4
AM3
AK2
AK3
AG2
AG1
AL3
AM2
AH3
AG3
AF3
AE3
AD6
AC4
AF2
AF1
AD4
AD5
SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8
SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43
SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63
U34G
DDR SYSTEM MEMORY A
U34B
A
M_A_BA0
M_A_BA1
SA_BS0#
SA_BS1#
SA_BS2#
AK15
AK16
AL21
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
AJ37
AP35
AL29
AP24
AP9
AP4
AJ2
AD3
R_SDM0
R_SDM1
R_SDM2
R_SDM3
R_SDM4
R_SDM5
R_SDM6
R_SDM7
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
AK36
AP33
AN29
AP23
AM8
AM4
AJ1
AE5
R_SM_DQS0
R_SM_DQS1
R_SM_DQS2
R_SM_DQS3
R_SM_DQS4
R_SM_DQS5
R_SM_DQS6
R_SM_DQS7
SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#
AK35
AP34
AN30
AN23
AN8
AM5
AH1
AE4
AL17
AP17
AP18
AM17
AN18
AM18
AL19
AP20
AM19
AL20
AM16
AN20
AM20
AM15
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
M_A_MA[0..13] <9,10>
M_A_MA0
M_A_MA1
M_A_MA2
M_A_MA3
M_A_MA4
M_A_MA5
M_A_MA6
M_A_MA7
M_A_MA8
M_A_MA9
M_A_MA10
M_A_MA11
M_A_MA12
M_A_MA13
AN15 M_A_SCASA#
AP16 M_A_SRASA#
AF29 SA_RCVENIN#
AF28 SA_RCVENOUT#
AP15 M_A_BMWEA#
SA_CAS#
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#
AE31
AE32
AG32
AG36
AE34
AE33
AF31
AF30
AH33
AH32
AK31
AG30
AG34
AG33
AH31
AJ31
AK30
AJ30
AH29
AH28
AK29
AH30
AH27
AG28
AF24
AG23
AJ22
AK22
AH24
AH23
AG22
AJ21
AG10
AG9
AG8
AH8
AH11
AH10
AJ9
AK9
AJ7
AK6
AJ4
AH5
AK8
AJ8
AJ5
AK4
AG5
AG4
AD8
AD9
AH4
AG6
AE8
AD7
AC5
AB8
AB6
AA8
AC8
AC7
AA4
AA5
M_A_BA0 <9,10>
M_A_BA1 <9,10>
M_A_SCASA# <9,10>
M_A_SRASA# <9,10>
T77
T80
M_A_BMWEA# <9,10>
SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8
SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
SBDQ38
SBDQ39
SBDQ40
SBDQ41
SBDQ42
SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63
2
R_SDM1
2
1
R236
1
R241
R_SDM2
1
R242
R_SDM3
1
R237
R_SDM4
1
R235
R_SDM5
1
R238
R_SDM6
1
R239
R_SDM7
1
R240
R_MD6
R_MD3
R_MD2
R_MD7
R_MD1
R_MD0
R_MD4
R_MD5
2
2
2
2
2
2
SDM0
10_4
SDM1
10_4
SDM2
10_4
SDM3
10_4
SDM4
10_4
SDM5
10_4
SDM6
10_4
SDM7
10_4
R_SM_DQS0 1
R214
R_SM_DQS1 1
R215
R_SM_DQS2 1
R216
R_SM_DQS3 1
R217
R_SM_DQS4 1
R220
R_SM_DQS5 1
R221
R_SM_DQS6 1
R218
R_SM_DQS7 1
R219
M_B_BA0
M_B_BA1
SB_BS0#
SB_BS1#
SB_BS2#
AJ15
AG17
AG21
SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7
AF32
AK34
AK27
AK24
AJ10
AK5
AE7
AB7
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
AF34
AK32
AJ28
AK23
AM10
AH6
AF8
AB4
SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#
AF35
AK33
AK28
AJ23
AL10
AH7
AF7
AB5
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
AH17
AK17
AH18
AJ18
AK18
AJ19
AK19
AH19
AJ20
AH20
AJ16
AG18
AG20
AG15
M_B_MA0
M_B_MA1
M_B_MA2
M_B_MA3
M_B_MA4
M_B_MA5
M_B_MA6
M_B_MA7
M_B_MA8
M_B_MA9
M_B_MA10
M_B_MA11
M_B_MA12
M_B_MA13
SB_CAS#
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#
AH14
AK14
AF15
AF14
AH16
M_B_SCASA#
M_B_SRASA#
SB_RCVENIN#
SB_RCVENOUT#
M_B_BMWEA#
A
M_B_BA0 <9,10>
M_B_BA1 <9,10>
B
M_B_MA[0..13] <9,10>
M_B_SCASA# <9,10>
M_B_SRASA# <9,10>
T75
T76
M_B_BMWEA# <9,10>
C
@ALVISO_GM/GML
R_SDM0
8
MD[0..63] <9,10>
SM_DQS[0..7] <9,10>
SDM[0..7] <9,10>
DDR SYSTEM MEMORY B
1
@ALVISO_GM/GML
2
2
2
2
2
2
2
2
SM_DQS0
10_4
SM_DQS1
10_4
SM_DQS2
10_4
SM_DQS3
10_4
SM_DQS4
D
10_4
SM_DQS5
10_4
QUANTA
COMPUTER
SM_DQS6
10_4
SM_DQS7
10_4
Title
Alviso (DDR)
Size
Document Number
CustomZL2
Date:
1
2
3
4
5
6
Tuesday, December 21, 2004
7
Rev
F
Sheet
of
7
8
41
4
3
2
B: NO FILTER WHEN EXT. VGA
+3V
R133
L33
VCC_TVDACA2
VCCGFOLLOW
10
1
2
+VCCP
CH551
B
L39
+2.5V
VCCA_CRTDAC
2
1
@BLM18PG181SN1/0_6
+VCCP
1
68mA
2
C293
[email protected]_4
C287
[email protected]_4
810mA
C646 .47U/25V
VCCP_GMCH_CAP1
1
2
C658 .47U/25V
1
2
1
C341
2.2U_6.3V
2
2
1
+VCCP
C333
4.7U/10V_8
C694 .22U
VCCP_GMCH_CAP2
VCCP_GMCH_CAP3
C670 .22U
VCCP_GMCH_CAP4
VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51
1
VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2
2
1
1
2
2
2
2
1
1
1
1
2
2
2
1
1
2
+VCCP
C277
10U_6.3V
L34
VCC_TVBG
[email protected]_4
2
1
C266
[email protected]_4
2
V1.8_DDR_CAP5
C357 .1U_4
1
2
C272
2
V1.8_DDR_CAP2
C705 .1U_4
1
2
1
C356 .1U_4
1
2
1
+3V
@BLM18PG181SN1/0_6
C918
[email protected]_6.3V
E: Add bulk cap. for acer TV
.022U_4
C261
.1U_4
VCC_QTVDAC
C271
[email protected]_4
2
C360
330U/6.3V-7343
2
L30
1
@BLM18PG181SN1/0_6
+1.5V
1
+
C263
[email protected]_4
B: NO FILTER WHEN EXT. VGA
Note: All VCCSM
pins shorted
internally.
B28
A28
A27
.1U_4
2
C354 .1U_4
1
2
L49
C348 .1U_4
1
2
2
+
C359
100U/10V
+2.5V
60mA
VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3
AF20
AP19
AF19
AF18
VCC_ DDRDLL
VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
AE37
W37
U37
R37
N37
L37
J37
VCC3G_PCIE
1
BLM18PG181SN1
C349
.1U_4
VCC3G_PCIE
L71
2
C345
10U_6.3V
C703
10U_6.3V
+
C339
220U/2.5V
30mA
+1.5V
1
BLM18PG181SN1
C700
.1U_4
+1.5V
1A
L46
R182
VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2
Y29
Y28
Y27
VCCA_3GBG
VSSA_3GBG
F37
G37
VCCA_3GPLL
2VCCA_3GPLL_1 2
1
+2.5V
C315
.1U_4
AB26
AA26
Y26
AB25
AA25
Y25
AB24
AA24
Y24
AB23
AA23
Y23
AB22
AA22
Y22
AB21
AA21
Y21
R21
AB20
AA20
AB19
AA19
AB18
AA18
AB17
AA17
Y17
R17
AB16
AA16
Y16
W16
V16
U16
T16
R16
P16
N16
M16
L16
AB15
AA15
Y15
W15
V15
U15
T15
R15
P15
N15
M15
L15
AB14
AA14
Y14
W14
V14
U14
T14
R14
P14
N14
M14
L14
AA13
Y13
AA12
Y12
VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12
VSS_NCTF13
VSS_NCTF14
VSS_NCTF15
VSS_NCTF16
VSS_NCTF17
VSS_NCTF18
VSS_NCTF19
VSS_NCTF20
VSS_NCTF21
VSS_NCTF22
VSS_NCTF23
VSS_NCTF24
VSS_NCTF25
VSS_NCTF26
VSS_NCTF27
VSS_NCTF28
VSS_NCTF29
VSS_NCTF30
VSS_NCTF31
VSS_NCTF32
VSS_NCTF33
VSS_NCTF34
VSS_NCTF35
VSS_NCTF36
VSS_NCTF37
VSS_NCTF38
VSS_NCTF39
VSS_NCTF40
VSS_NCTF41
VSS_NCTF42
VSS_NCTF43
VSS_NCTF44
VSS_NCTF45
VSS_NCTF46
VSS_NCTF47
VSS_NCTF48
VSS_NCTF49
VSS_NCTF50
VSS_NCTF51
VSS_NCTF52
VSS_NCTF53
VSS_NCTF54
VSS_NCTF55
VSS_NCTF56
VSS_NCTF57
VSS_NCTF58
VSS_NCTF59
VSS_NCTF60
VSS_NCTF61
VSS_NCTF62
VSS_NCTF63
VSS_NCTF64
VSS_NCTF65
VSS_NCTF66
VSS_NCTF67
VSS_NCTF68
VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72
VCC_NCTF73
VCC_NCTF74
VCC_NCTF75
VCC_NCTF76
VCC_NCTF77
VCC_NCTF78
close to PIN D19
24mA
C346
C344
10U_6.3V 10U_6.3V
V1.8_DDR_CAP6
V1.8_DDR_CAP3
V1.8_DDR_CAP4
VTT_NCTF0
VTT_NCTF1
VTT_NCTF2
VTT_NCTF3
VTT_NCTF4
VTT_NCTF5
VTT_NCTF6
VTT_NCTF7
VTT_NCTF8
VTT_NCTF9
VTT_NCTF10
VTT_NCTF11
VTT_NCTF12
VTT_NCTF13
VTT_NCTF14
VTT_NCTF15
VTT_NCTF16
VTT_NCTF17
1
C260
+2.5VSUS
C358
1
W13
V13
U13
T13
R13
P13
N13
M13
L13
W12
V12
U12
T12
R12
P12
N12
M12
L12
+1.5V
Note: All VCCSM
pins shorted
internally.
2
V1.8_DDR_CAP1
1
D11
VCC_SYNC
K13
J13
K12
W11
V11
U11
T11
R11
P11
N11
M11
L11
K11
W10
V10
U10
T10
R10
P10
N10
M10
K10
J10
Y9
W9
U9
R9
P9
N9
M9
L9
J9
N8
M8
N7
M7
N6
M6
A6
N5
M5
N4
M4
N3
M3
N2
M2
B2
V1
N1
M1
G1
C295
.1U_4
2
B: CHANGE FROM RB751
R142
H20
60mA
C302
.01U/16V_4
1
1
2
C696
.1U_4
C291
10U_6.3V
2
1
C688
C319
+ 470U/2.5V .1U_4
2
1
1UH
60mA
1
+2.5V
L69
2
+1.5V
VCCA_CRTDAC0
VCCA_CRTDAC1
VVSSA_CRTDAC
C290
.1U_4
2
VCCA_CRTDAC F19
E19
G19
2mA
C280
10U_6.3V
1
1
C701
.1U_4
2
60mA
C699
+ 470U/2.5V
1
+3V
@BLM18PG181SN1/0_6
+2.5V
C296
.1U_4
2
1
1UH
VCCH_MPLL1
VCCH_MPLL0
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
2
+2.5V
1
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
L70
2
+1.5V
AC2
AC1
B23
C35
AA1
AA2
AM37
AH37
AP29
AD28
AD27
AC27
AP26
AN26
AM26
AL26
AK26
AJ26
AH26
AG26
AF26
AE26
AP25
AN25
AM25
AL25
AK25
AJ25
AH25
AG25
AF25
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AE17
AE16
AE15
AE14
AP13
AN13
AM13
AL13
AK13
AJ13
AH13
AG13
AF13
AE13
AP12
AN12
AM12
AL12
AK12
AJ12
AH12
AG12
AF12
AE12
AD11
AC11
AB11
AB10
AB9
AP8
AM1
AE1
VCCSM_NCTF0
VCCSM_NCTF1
VCCSM_NCTF2
VCCSM_NCTF3
VCCSM_NCTF4
VCCSM_NCTF5
VCCSM_NCTF6
VCCSM_NCTF7
VCCSM_NCTF8
VCCSM_NCTF9
VCCSM_NCTF10
VCCSM_NCTF11
VCCSM_NCTF12
VCCSM_NCTF13
VCCSM_NCTF14
VCCSM_NCTF15
VCCSM_NCTF16
VCCSM_NCTF17
VCCSM_NCTF18
VCCSM_NCTF19
VCCSM_NCTF20
VCCSM_NCTF21
VCCSM_NCTF22
VCCSM_NCTF23
VCCSM_NCTF24
VCCSM_NCTF25
VCCSM_NCTF26
VCCSM_NCTF27
VCCSM_NCTF28
VCCSM_NCTF29
VCCSM_NCTF30
VCCSM_NCTF31
C267
[email protected]_4
10mA
2
2
+1.5V
B22
B21
A21
U34D
+1.5V
1
C248
+ [email protected]/2.5V
C303
[email protected]_4
VCCHV0
VCCHV1
VCCHV2
[email protected]_4
C342
.1U_4
2
1
10UH
C
A35
VCC_TVDACB
C275
1
VCCA_DPLLB
1
VCCA_LVDS
+1.5V
L35
1
@BLM18PG181SN1/0_6
2
2
L28
2
+1.5V
B26
B25
A25
2
2
CH551
120mA
C273
[email protected]_4
1
C259
+ [email protected]/2.5V
C306
[email protected]_4
[email protected]_4
+1.5V
D19
H17 VCC_QTVDAC
VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2
VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8
VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64
C264
2
1
10UH
60mA
VCCD_TVDAC
VCCDQ_TVDAC
VCC_TVDACC
VCC_TVBG
1
10
+3V
1
VCCA_DPLLA
1
H18
G18
L32
2
L31
2
+1.5V
VCCA_TVBG
VSSA_TVBG
[email protected]_4
1
B: DEPOP C259, C248, C306, C303 WHEN NO EXT.VGA
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1
D10
V1_5VFOLLOW
1
@BLM18PG181SN1/0_6
C265
[email protected]_4
C274
2
D
VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
F17
E17
D18
C18
F18
E18
1
C336
10U_6.3V
T29
R29
N29
M29
K29
J29
V28
U28
T28
R28
P28
N28
M28
L28
K28
J28
H28
G28
V27
U27
T27
R27
P27
N27
M27
L27
K27
J27
H27
K26
H26
K25
J25
K24
K23
K22
K21
W20
U20
T20
K20
V19
U19
K19
W18
V18
T18
K18
K17
2
1
C330
10U_6.3V
2
1
C334
10U_6.3V
2
2
C332
.1U_4
2
C340
.1U_4
1
U34H
1
1
C687
.1U_4
2
2
1
3900mA
POWER
+VCCP
1
B: CHANGE FROM RB751
0.5/F
1
+1.5V
BLM18PG181SN1
C343
10U_6.3V
150mA
NCTF
5
AD26
AC26
AD25
AC25
AD24
AC24
AD23
AC23
AD22
AC22
AD21
AC21
AD20
AC20
AD19
AC19
AD18
AC18
AD17
AC17
AD16
AC16
AD15
AC15
AD14
AC14
AD13
AC13
AB13
AD12
AC12
AB12
+2.5VSUS
D
W26
V26
U26
T26
R26
P26
N26
M26
L26
W25
V25
U25
T25
R25
P25
N25
M25
L25
W24
V24
U24
T24
R24
P24
N24
M24
L24
W23
V23
U23
T23
R23
P23
N23
M23
L23
W22
V22
U22
T22
R22
P22
N22
M22
L22
W21
V21
U21
T21
P21
N21
M21
L21
Y20
R20
P20
N20
M20
L20
Y19
R19
P19
N19
M19
L19
Y18
R18
P18
N18
M18
L18
W17
V17
U17
T17
P17
N17
M17
L17
+VCCP
C
B
@ALVISO_GM/GML
@ALVISO_GM/GML
+2.5V
A
1
C289
.1U_4
2
2
1
A
C288
4.7U/10V_8
close to PIN B28,A28,A27
Title
QUANTA
COMPUTER
Alviso (Power)
5
4
3
2
Size
C
Document Number
ZL2
Date:
Tuesday, December 21, 2004
Rev
F
1
Sheet
8
of
41
1
2
3
4
5
6
7
8
+2.5VSUS
+2.5VSUS
+1.25VSUS
SM_DQS0
MD7
A
MD2
MD8
MD13
SM_DQS1
MD11
MD10
CLK_SDRAM0
CLK_SDRAM0#
<6> CLK_SDRAM0
<6> CLK_SDRAM0#
MD16
MD17
SM_DQS2
MD19
MD18
MD24
MD25
SM_DQS3
MD26
MD31
B
+2.5VSUS
R224
R228
200
200
CKE1
M_A_MA12
M_A_MA9
M_A_MA7
M_A_MA5
M_A_MA3
M_A_MA1
M_A_MA10
M_A_BA0
M_A_BMWEA#
SM_CS0#
M_A_MA13
MD33
MD32
C
SM_DQS4
MD34
MD35
MD40
MD41
SM_DQS5
MD46
MD47
MD53
MD48
SM_DQS6
MD50
MD51
MD56
MD60
SM_DQS7
MD59
MD58
SMBDT
SMBCK
D
+3V
R225
*10K_4
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
+1.25VSUS
CN27
SODIMM0
VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0
VSS
VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS
DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2
VDD
CKE1
DU
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE
S0
DU(A13)
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD(SPD)
VDD(ID)
DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET
VSS
VSS
VDD
VDD
CKE0
DU/BA2
A11
A8
VSS
A6
A4
A2
A0
VDD
BA1
RAS
CAS
S1
DU
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
DU
PC2100 DDR SDRAM SO-DIMM (200P)
MD1
MD0
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
+2.5VSUS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
+2.5VSUS
+1.25VSUS
MD5
MD4
MD1
MD0
SDM0
MD6
SM_DQS0
MD7
MD3
MD9
MD2
MD8
MD12
SDM1
MD13
SM_DQS1
MD14
MD15
MD11
MD10
<6> CLK_SDRAM3
<6> CLK_SDRAM3#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
CLK_SDRAM3
CLK_SDRAM3#
MD20
MD21
MD16
MD17
SDM2
MD23
SM_DQS2
MD19
MD22
MD28
MD18
MD24
MD29
SDM3
MD25
SM_DQS3
MD30
MD27
MD26
MD31
+2.5VSUS
R252
R263
200
200
CKE0
CKE3
M_A_MA11
M_A_MA8
M_B_MA12
M_B_MA9
M_A_MA6
M_A_MA4
M_A_MA2
M_A_MA0
M_B_MA7
M_B_MA5
M_B_MA3
M_B_MA1
M_A_BA1
M_A_SRASA#
M_A_SCASA#
SM_CS1#
M_B_MA10
M_B_BA0
M_B_BMWEA#
SM_CS2#
M_B_MA13
MD37
MD36
MD33
MD32
SDM4
MD38
SM_DQS4
MD34
MD39
MD45
MD35
MD40
MD44
SDM5
MD41
SM_DQS5
MD43
MD42
MD46
MD47
CLK_SDRAM1#
CLK_SDRAM1
CLK_SDRAM1# <6>
CLK_SDRAM1 <6>
MD49
MD52
MD53
MD48
SDM6
MD54
SM_DQS6
MD50
MD55
MD61
MD51
MD56
MD57
SDM7
MD60
SM_DQS7
MD62
MD63
MD59
MD58
<2> SMBDT
<2> SMBCK
+3V
SMbus address A0
SMBDT
SMBCK
R251
*10K_4
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
+1.25VSUS
CN29
SODIMM1
VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0
VSS
VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS
DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2
VDD
CKE1
DU
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE
S0
DU(A13)
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD(SPD)
VDD(ID)
DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET
VSS
VSS
VDD
VDD
CKE0
DU/BA2
A11
A8
VSS
A6
A4
A2
A0
VDD
BA1
RAS
CAS
S1
DU
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
DU
PC2100 DDR SDRAM SO-DIMM (200P)
+2.5VSUS
C408
QTC_DDR_SODIMM_H4.0
C499
QTC_DDR_SODIMM_H9.2
.1U_4
CLOCK 0,1,2
.1U_4
CLOCK 3,4,5
CKE 0,1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
C833
C830
C823
C822
C825
C829
C828
C826
C406
C397
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
C821
C405
C827
C407
C832
C818
C831
C433
C824
C449
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
C438
C439
C441
C432
C435
C436
C437
C444
C445
C446
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
+2.5VSUS
MD5
MD4
SDM0
MD6
MD3
MD9
MD12
SDM1
MD14
MD15
A
+2.5VSUS
+2.5VSUS
MD20
MD21
SDM2
MD23
C447
C448
C443
C404
C396
C398
C399
C400
C401
C394
MD22
MD28
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
MD29
SDM3
+2.5VSUS
C440
C442
C819
C820
C402
C412
C410
C411
C403
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
MD30
MD27
+1.25VSUS
B
+2.5VSUS
C834
C456
C395
C434
C424
C835
.1U_4
.1U_4
.1U_4
.1U_4
150U/6.3V_7
150U/6.3V_7
CKE2
M_B_MA11
M_B_MA8
M_B_MA6
M_B_MA4
M_B_MA2
M_B_MA0
M_B_BA1
M_B_SRASA#
M_B_SCASA#
SM_CS3#
MD37
MD36
M_A_MA[0..13]
M_A_BA0
M_A_BA1
M_A_SRASA#
M_A_SCASA#
M_A_BMWEA#
SDM4
MD38
MD39
MD45
M_B_MA[0..13]
M_B_BA0
M_B_BA1
M_B_SRASA#
M_B_SCASA#
M_B_BMWEA#
MD44
SDM5
MD43
MD42
CLK_SDRAM4#
CLK_SDRAM4
M_A_MA[0..13] <7,10>
M_A_BA0 <7,10>
M_A_BA1 <7,10>
M_A_SRASA# <7,10>
M_A_SCASA# <7,10>
M_A_BMWEA# <7,10>
CLK_SDRAM4# <6>
CLK_SDRAM4 <6>
M_B_MA[0..13] <7,10>
M_B_BA0 <7,10>
M_B_BA1 <7,10>
M_B_SRASA# <7,10>
M_B_SCASA# <7,10>
M_B_BMWEA# <7,10>
MD[0..63]
SM_DQS[0..7]
SDM[0..7]
MD49
MD52
MD[0..63] <7,10>
SM_DQS[0..7] <7,10>
SDM[0..7] <7,10>
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
SDM6
MD54
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
MD55
MD61
CKE0
CKE1
CKE2
CKE3
MD57
SDM7
C
CKE0
CKE1
CKE2
CKE3
MD62
MD63
<6,10>
<6,10>
<6,10>
<6,10>
<6,10>
<6,10>
<6,10>
<6,10>
+3V
D
SMbus address A1
PROJECT : ZL2
CKE 2,3
Quanta Computer Inc.
Size
Document Number
Date:
Tuesday, December 21, 2004
R ev
F
DDR SO-DIMM ( 200P )
1
2
3
4
5
6
7
Sheet
9
8
of
41
1
2
3
4
5
6
7
8
For terminal R-pack.
+1.25V
C385
C425
C486
C377
C459
C416
C468
C485
C383
C461
C467
C462
C479
C478
C415
C378
C466
C484
C463
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
19 PCS
+1.25V
A
+1.25V
C384
C487
C458
C388
C417
C490
C427
C426
C472
C492
C489
C483
C460
C457
C481
C482
C480
C477
C476
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
A
C491
C464
C465
C488
C494
.1U_4
.1U_4
.1U_4
.1U_4
150U/6.3V_7
19 PCS
B
B
+1.25V
RN78
4P2R-S-56
RN77
4P2R-S-56
C
MD58
MD59
MD60
MD56
1
3
1
3
2
4
2
4
1
3
1
3
+1.25V
2
4
2
4
MD62
MD63
MD57
MD61
RN100
4P2R-S-56
RN99
4P2R-S-56
+1.25V
SDM0
R264
1
56_4
2
R268
1
56_4
2
SDM4
SDM1
R265
1
56_4
2
R269
1
56_4
2
SDM5
56_4
2
R270
1
56_4
2
SDM6
2
4
2
4
MD54
MD55
MD51
MD50
RN98
4P2R-S-56
RN76
4P2R-S-56
SDM2
R266
1
SDM3
R267
1
56_4
2
R271
1
56_4
2
SDM7
2
4
2
4
MD33
MD32
MD45
MD44
RN71
4P2R-S-56
RN95
4P2R-S-56
R254
SM_DQS0 1
56_4
2
R258
1
56_4
2
SM_DQS4
R255
SM_DQS1 1
56_4
2
R259
1
56_4
2
SM_DQS5
1
3
1
3
2
4
2
4
MD39
MD38
MD37
MD36
RN94
4P2R-S-56
RN93
4P2R-S-56
R256
SM_DQS2 1
56_4
2
R260
1
56_4
2
SM_DQS6
R257
SM_DQS3 1
56_4
2
R261
1
56_4
2
SM_DQS7
2
4
2
4
1
3
1
3
2
4
2
4
MD29
MD28
MD23
MD22
RN85
4P2R-S-56
RN84
4P2R-S-56
1
3
1
3
2
4
2
4
1
3
1
3
2
4
2
4
MD3
MD6
MD5
MD4
RN80
4P2R-S-56
RN79
4P2R-S-56
MD9
MD12
MD8
MD13
1
3
1
3
2
4
2
4
1
3
1
3
2
4
2
4
MD20
MD21
MD14
MD15
RN83
4P2R-S-56
RN82
4P2R-S-56
MD2
MD7
MD0
MD1
1
3
1
3
2
4
2
4
1
3
1
3
2
4
2
4
MD43
MD42
MD49
MD52
RN96
4P2R-S-56
RN97
4P2R-S-56
RN75
4P2R-S-56
RN74
4P2R-S-56
MD48
MD53
MD47
MD46
RN73
4P2R-S-56
RN72
4P2R-S-56
MD40
MD41
MD35
MD34
RN64
4P2R-S-56
RN86
4P2R-S-56
MD26
MD31
MD27
MD30
1
3
1
3
2
4
2
4
RN63
4P2R-S-56
RN62
4P2R-S-56
MD25
MD24
MD19
MD18
1
3
1
3
RN61
4P2R-S-56
RN60
4P2R-S-56
MD17
MD16
MD11
MD10
RN81
4P2R-S-56
RN59
4P2R-S-56
RN58
4P2R-S-56
RN57
4P2R-S-56
1
3
1
3
1
3
1
3
2
4
2
4
2
4
2
4
1
3
1
3
1
3
1
3
MD[0..63]
SM_DQS[0..7]
SDM[0..7]
M_A_MA[0..13]
M_A_BA0
M_A_BA1
M_A_SRASA#
M_A_SCASA#
M_A_BMWEA#
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
CKE[0..3]
MD[0..63] <7,9>
RN92
4P2R-S-56
RN69
4P2R-S-56
M_B_SCASA#
M_B_BA0
M_B_BMWEA#
1
3
1
3
2
4
2
4
1
3
1
3
2
4
2
4
SM_CS3#
M_B_SRASA#
M_B_BA1
M_B_MA4
RN91
4P2R-S-56
RN90
4P2R-S-56
RN65
4P2R-S-56
RN88
4P2R-S-56
M_B_MA12
CKE3
M_B_MA8
M_B_MA6
1
3
1
3
2
4
2
4
1
3
1
3
2
4
2
4
M_B_MA2
M_B_MA0
M_B_MA5
M_B_MA7
RN89
4P2R-S-56
RN66
4P2R-S-56
RN68
4P2R-S-56
RN67
4P2R-S-56
M_B_MA10
M_B_MA3
M_B_MA1
M_B_MA9
1
3
1
3
2
4
2
4
1
3
1
3
2
4
2
4
M_A_SRASA#
SM_CS1#
M_A_MA3
M_A_MA10
RN56
4P2R-S-56
RN16
4P2R-S-56
RN55
4P2R-S-56
RN18
4P2R-S-56
M_A_MA0
M_A_SCASA#
M_A_BA0
M_A_BMWEA#
1
3
3
1
2
4
4
2
1
3
1
3
2
4
2
4
M_A_BA1
M_A_MA4
M_A_MA2
RN54
4P2R-S-56
RN53
4P2R-S-56
RN13
4P2R-S-56
RN15
4P2R-S-56
CKE1
M_A_MA12
M_A_MA1
M_A_MA5
1
3
1
3
2
4
2
4
1
3
1
3
2
4
2
4
M_A_MA8
M_A_MA6
M_A_MA9
M_A_MA7
RN52
4P2R-S-56
RN14
4P2R-S-56
RN51
4P2R-S-56
M_A_MA11
CKE0
1
3
2
4
1
3
2
4
SM_CS0#
M_A_MA13
RN17
4P2R-S-56
RN87
4P2R-S-56
CKE2
M_B_MA11
1
3
2
4
1
3
2
4
SM_CS2#
M_B_MA13
RN70
4P2R-S-56
C
SM_DQS[0..7] <7,9>
SDM[0..7] <7,9>
M_A_MA[0..13] <7,9>
M_A_BA0 <7,9>
M_A_BA1 <7,9>
M_A_SRASA# <7,9>
M_A_SCASA# <7,9>
M_A_BMWEA# <7,9>
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
M_B_MA[0..13]
M_B_BA0
M_B_BA1
M_B_SRASA#
M_B_SCASA#
M_B_BMWEA#
M_B_MA[0..13] <7,9>
M_B_BA0 <7,9>
M_B_BA1 <7,9>
M_B_SRASA# <7,9>
M_B_SCASA# <7,9>
M_B_BMWEA# <7,9>
<6,9>
<6,9>
<6,9>
<6,9>
CKE[0..3] <6,9>
D
D
PROJECT : ZL2
Quanta Computer Inc.
Size
Document Number
Date:
Tuesday, December 21, 2004
R ev
F
DDR TERMINATION
1
2
3
4
5
6
7
Sheet
10
8
of
41
5
4
3
2
1
B: POP R369
U29A
<6,15> GMCHEXP_RXN[0..15]
D
GMCHEXP_RXP0
GMCHEXP_RXN0
GMCHEXP_RXP1
GMCHEXP_RXN1
GMCHEXP_RXP2
GMCHEXP_RXN2
GMCHEXP_RXP3
GMCHEXP_RXN3
GMCHEXP_RXP4
GMCHEXP_RXN4
GMCHEXP_RXP5
GMCHEXP_RXN5
GMCHEXP_RXP6
GMCHEXP_RXN6
GMCHEXP_RXP7
GMCHEXP_RXN7
GMCHEXP_RXP8
GMCHEXP_RXN8
GMCHEXP_RXP9
GMCHEXP_RXN9
GMCHEXP_RXP10
GMCHEXP_RXN10
GMCHEXP_RXP11
GMCHEXP_RXN11
GMCHEXP_RXP12
GMCHEXP_RXN12
GMCHEXP_RXP13
GMCHEXP_RXN13
GMCHEXP_RXP14
GMCHEXP_RXN14
GMCHEXP_RXP15
GMCHEXP_RXN15
C
C231
C234
C227
C224
C211
C205
C212
C207
C194
C188
C195
C191
C178
C171
C160
C154
C159
C151
C182
C172
C140
C131
C141
C135
C116
C112
C117
C113
C96
C94
C98
C95
AF27
AE27
<2> CLK_PCIE_VGA
<2> CLK_PCIE_VGA#
PCIE_REFCLKP
PCIE_REFCLKN
AC23
AB24
AB23
PCIE_CALRP
PCIE_CALRN
PCIE_CALI
AE25
PCIE_TESTIN
B: POP R76
AD25
-VPCIE_RSTM AD24
<6,15,18,21,29,31,32,33> PLTRST#
+3V
R74
*10K_4
V_R2SET
R72
[email protected]_4
EXT_TV_Y/G
AK21
EXT_TV_C/R
AJ22
EXT_TV_COMP AK22
R127
[email protected]/F
T134
T142
F: NEW ADD 1K PULLDOWN
AH21
VTHM_CLK
VTHM_DAT
R648
PERSTb
PERSTb_MASK
R2SET
Y_G
C_R_PR
COMP_B_PB
AJ24
AK24
H2SYNC
V2SYNC
AG22
AG23
DDC3CLK
DDC3DATA
TMDS
+3V
VPCIE_CR+
VPCIE_CRVPCIE_CAL
VPCIE_TIN
DAC2
VGA1.2V
[email protected]/F_4
[email protected]/F_4
[email protected]/F
*10K_4
[email protected]_4
R121
R119
A
XT_OUT
[email protected]=27MHz
Y2
R120
*1M_4
C242
[email protected]_4
+3V
5
R122
*33_4
27M_IN AH28
*33_4
27M_O
AJ29
XTALOUT
[email protected]_4
Z_V0101 AH27
R57
[email protected]_4 Z_V0102 E8
R347
[email protected]_4 Z_V0103 B6
AF25
R126 T39
Z_V0104 AH25
[email protected]_4
R125
XTALIN
TESTEN
TEST_YCLK
TEST_MCLK
PLLTEST
STEREOSYNC
*10K_4
[email protected]/M22/M26
DAC1
XT_IN
THERM
[email protected]_4
CLK
T145
C258
SSIN
SSOUT
SS
[email protected]_4
AJ23
AH24
AE10
AH6
AJ6
AK6
AH7
AK7
AJ7
AH8
AJ8
AH9
AJ9
AK9
AH10
AE6
AG6
AF6
AE7
AF7
AE8
AG8
AF8
AE9
AF9
AG10
AF10
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPCNTL_3
AJ10
AK10
AJ11
AH11
4
+3V
T148
T143
T141
T33
T130
T136
T127
T129
T132
VGA_PWR_SW
V_MEMSSIN
C245
[email protected]_4
R102
XT_IN
R128
R374
R389
R401
R392
R116
R115
C236
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
AE13
AE14
TMDS_DDCCLK
TMDS_DDCDATA
DDC1DATA
DDC1CLK
AG25
AF24
EXT_DDCDAT
EXT_DDCCLK
AG24
DPLUS
DMINUS
R397
TXLOUT0TXLOUT0+
TXLOUT1TXLOUT1+
TXLOUT2TXLOUT2+
+3V
<6,16>
<6,16>
<6,16>
<6,16>
<6,16>
<6,16>
VTHM_CLK
R88
VTHM_DAT
R86
DVPDATA_20 R100
[email protected]/F
[email protected]/F
[email protected]_4
PLACE CLOSE TO ASIC
EXT_VGA_RED
EXT_VGA_GRN
EXT_VGA_BLU
TXLCLKOUT- <6,16>
TXLCLKOUT+ <6,16>
TXUOUT0- <6,16>
TXUOUT0+ <6,16>
TXUOUT1- <6,16>
TXUOUT1+ <6,16>
TXUOUT2- <6,16>
TXUOUT2+ <6,16>
<16> EXT_TV_Y/G
<16> EXT_TV_C/R
TXUCLKOUT- <6,16>
TXUCLKOUT+ <6,16>
<16> EXT_TV_COMP
R375
R376
R377
[email protected]/F_4
[email protected]/F_4
[email protected]/F_4
EXT_TV_Y/G
R385
[email protected]/F_4
EXT_TV_C/R
R386
[email protected]/F_4
EXT_TV_COMP R384
[email protected]/F_4
+3V
B
+3V
R423
R420
[email protected]_4
15 MIL
+3V
R440
[email protected]_4
3V_THM1
[email protected]
C662
TMDS_DDCCLK <15,33>
TMDS_DDCDATA <15,33>
[email protected]_4
TMDS_HPD <15,33>
EXT_VGA_RED
EXT_VGA_GRN
EXT_VGA_BLU
1
3
2
5
VGATHRMC638
10 mil trace /
10 mil space
EXT_HSYNC <17>
EXT_VSYNC <17>
[email protected]/F
R419
[email protected]_4
-VGA_ALERT
U32
EXT_VGA_RED <17>
EXT_VGA_GRN <17>
EXT_VGA_BLU <17>
[email protected]_4
VCC
DXN
DXP
GND
/ALERT
SDA
SCLK
/THERM
6
7
8
4
VTHM_DAT
VTHM_CLK
2
Q36
[email protected]
[email protected]
VGATHRM+
Close to pin ASIC
EXT_DDCDAT <17>
EXT_DDCCLK <17>
R381
[email protected]_4
TMDS_TX0M
TMDS_TX0P
-VGA_ALERT
R382
VGATHRM+
VGATHRM-
[email protected]/F
[email protected]/F
DDC2CLK
DDC2DATA
AH26
R379
PLACE CLOSE TO ASIC
+3V
TMDS_TX0M
TMDS_TX0P
TMDS_TX1M
TMDS_TX1P
TMDS_TX2M
TMDS_TX2P
TMDS_TXCM
TMDS_TXCP
RSET
*0_4
R398
AK13
AJ13
AJ14
AJ15
AK15
AK16
AJ12
AK12
R112
R378
VGA27M
+3V
TX0M
TX0P
TX1M
TX1P
TX2M
TX2P
TXCM
TXCP
V_RST
+3V
C
AE12
AG12
EXT_HSYNC
EXT_VSYNC
[email protected]
C270
[email protected]/10V_8
C278
[email protected]_4
C297
[email protected]_4
27M_O
DIGON
BLON
AJ25
AK25
[email protected]_4 27MOUT
[email protected]_4
EXT_TXLOUT0- [email protected] 2
1 RN101 TXLOUT0EXT_TXLOUT0+
TXLOUT0+
4
3
EXT_TXLOUT1- [email protected] 2
1 RN102 TXLOUT1EXT_TXLOUT1+
TXLOUT1+
4
3
EXT_TXLOUT2- [email protected] 2
1 RN103 TXLOUT2EXT_TXLOUT2+
TXLOUT2+
4
3
T135
[email protected] RN104
T144
EXT_TXLCLKOUTTXLCLKOUT2
1
EXT_TXLCLKOUT+
TXLCLKOUT+
4
3
EXT_TXUOUT0- [email protected] 4
TXUOUT03 RN8
EXT_TXUOUT0+
TXUOUT0+
2
1
EXT_TXUOUT1- [email protected] 4
TXUOUT13 RN7
EXT_TXUOUT1+
TXUOUT1+
2
1
EXT_TXUOUT2- [email protected] 4
RN6
TXUOUT23
EXT_TXUOUT2+
TXUOUT2+
2
1
T38
T35
EXT_TXUCLKOUTTXUCLKOUT2
1
EXT_TXUCLKOUT+
TXUCLKOUT+
4
3
[email protected]
RN5
DISP_ON
DISP_ON <6,16>
BLON
BLON <6,16>
HSYNC
VSYNC
L38
27M_IN
TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P
TXCLK_LN
TXCLK_LP
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P
TXCLK_UN
TXCLK_UP
AF12
XT_OUT
MK1726_VDD
MK_PD
MK_27M R144
8
7
6
5
XOUT
VDD
PD
REF
B: CHANGE FROM 27M_O TO 27M_IN
VREFG
AF11
AE11
XIN
VSS
SRS
SSCLK
[email protected]
MK1726-8
AH15
AH16
AJ16
AJ17
AJ18
AK18
AJ20
AJ21
AK19
AJ19
AG16
AG17
AF16
AF17
AE18
AE19
AF19
AF20
AG19
AG20
GPIO_AUXWIN
1726_S0
[email protected]_4 1726_CKO
1
2
3
4
DVPDATA_21 <13>
DVPDATA_22 <13>
DVPDATA_23 <13>
AK27
AJ27
AJ26
D
U13
[email protected]_4
DVPDATA_16 <13>
DVPDATA_17 <13>
EDIDDATA <16>
EDIDCLK <16>
R
G
B
R146
*10K_4
VGA_PWR_SW <38>
T139
T150
T147
T138
T149
T137
T140
T131
T43
T42
T45
T41
T31
T40
T44
T36
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23
M DOWN -0.6%
MK_PD
R131
*10K_4
Hi: 1.0V
Lo: 1.2V
DVOMODE
HPD1
SRS= 1 DOWN -2.5%
F: NEW ADD PWR PLAY
T37
T123
T126
DVPCNTL0
DVPCNTL1
DVPCNTL2
DVPCNTL3
R123
*10K_4
0 DOWN -1.8%
ROMIDCFG0 <13>
DVPDATA_16
DVPDATA_17
+3V
MEMORY CLOCK SPREAD
SPECTRUM
1726_S0
AG4
VREFG
B
R101
R90
R89
R77
R76
DVOMODE
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DPVDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23
[email protected]_4
*10K_4
3
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
<6,15> GMCHEXP_RXP[0..15]
R369
R367
AJ5
AH5
AJ4
AK4
AH4
AF4
AJ3
AK3
AH3
AJ2
AH2
AH1
AG3
AG1
AG2
AF3
AF2
1
[email protected]_4 V_GMCHEXP_RXP0 AF26
[email protected]_4 V_GMCHEXP_RXN0 AE26
[email protected]_4 V_GMCHEXP_RXP1 AC25
[email protected]_4 V_GMCHEXP_RXN1 AB25
[email protected]_4 V_GMCHEXP_RXP2 AC27
[email protected]_4 V_GMCHEXP_RXN2 AB27
[email protected]_4 V_GMCHEXP_RXP3 AC26
[email protected]_4 V_GMCHEXP_RXN3 AB26
[email protected]_4 V_GMCHEXP_RXP4 Y25
[email protected]_4 V_GMCHEXP_RXN4 W25
[email protected]_4 V_GMCHEXP_RXP5 Y27
[email protected]_4 V_GMCHEXP_RXN5 W27
[email protected]_4 V_GMCHEXP_RXP6 Y26
[email protected]_4 V_GMCHEXP_RXN6 W26
[email protected]_4 V_GMCHEXP_RXP7 U25
[email protected]_4 V_GMCHEXP_RXN7 T25
[email protected]_4 V_GMCHEXP_RXP8 U27
[email protected]_4 V_GMCHEXP_RXN8 T27
[email protected]_4 V_GMCHEXP_RXP9 U26
[email protected]_4 V_GMCHEXP_RXN9 T26
[email protected]_4 V_GMCHEXP_RXP10 P25
[email protected]_4 V_GMCHEXP_RXN10 N25
[email protected]_4 V_GMCHEXP_RXP11 P27
[email protected]_4 V_GMCHEXP_RXN11 N27
[email protected]_4 V_GMCHEXP_RXP12 P26
[email protected]_4 V_GMCHEXP_RXN12 N26
[email protected]_4 V_GMCHEXP_RXP13 L25
[email protected]_4 V_GMCHEXP_RXN13 K25
[email protected]_4 V_GMCHEXP_RXP14 L27
[email protected]_4 V_GMCHEXP_RXN14 K27
[email protected]_4 V_GMCHEXP_RXP15 L26
[email protected]_4 V_GMCHEXP_RXN15 K26
<6> GMCHEXP_TXN[0..15]
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO_PWRCNTL
GPIO_MEMSSIN
DVO / EXT TMDS / GPIO
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N
LVDS
AH30
AG30
AG29
AF29
AE29
AE30
AD30
AD29
AC29
AB29
AB30
AA30
AA29
Y29
W29
W30
V30
V29
U29
T29
T30
R30
R29
P29
N29
N30
M30
M29
L29
K29
K30
J30
PCI EXPRESS
GMCHEXP_TXP0
GMCHEXP_TXN0
GMCHEXP_TXP1
GMCHEXP_TXN1
GMCHEXP_TXP2
GMCHEXP_TXN2
GMCHEXP_TXP3
GMCHEXP_TXN3
GMCHEXP_TXP4
GMCHEXP_TXN4
GMCHEXP_TXP5
GMCHEXP_TXN5
GMCHEXP_TXP6
GMCHEXP_TXN6
GMCHEXP_TXP7
GMCHEXP_TXN7
GMCHEXP_TXP8
GMCHEXP_TXN8
GMCHEXP_TXP9
GMCHEXP_TXN9
GMCHEXP_TXP10
GMCHEXP_TXN10
GMCHEXP_TXP11
GMCHEXP_TXN11
GMCHEXP_TXP12
GMCHEXP_TXN12
GMCHEXP_TXP13
GMCHEXP_TXN13
GMCHEXP_TXP14
GMCHEXP_TXN14
GMCHEXP_TXP15
GMCHEXP_TXN15
<6> GMCHEXP_TXP[0..15]
R383
R380
3
2 [email protected]_4
2 [email protected]_4
TX0- <15,33>
TX0+ <15,33>
R95
R96
1
1
2 [email protected]_4
2 [email protected]_4
TX1- <15,33>
TX1+ <15,33>
R97
R98
1
1
2 [email protected]_4
2 [email protected]_4
R91
R92
1
1
2 [email protected]_4
2 [email protected]_4
[email protected]_4
TMDS_TX2M
TMDS_TX2P
TMDS_TXCM
TMDS_TXCP
1
1
[email protected]_4
TMDS_TX1M
TMDS_TX1P
R113
*10K_4
R424
R93
R94
[email protected]_4
2
MEMVMODE0 <13>A
*0_4
B: DEPOP WHEN NO DOCKING
M26
PROJECT : ZL2
Quanta Computer Inc.
TX2- <15,33>
TX2+ <15,33>
Size
Document Number
CLK- <15,33>
Custom
VGA HOST(ATI
CLK+ <15,33>
Date:
Sheet
Tuesday, December 21, 2004
1
R ev
F
M24)
11
of
41
5
4
3
2
1
U29D
C578
C589
C597
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]/10V_8
(350mA)
D
VGA_MEM_IO
C585
C164
[email protected]/10V_8
C119
C109
C110
[email protected][email protected][email protected][email protected]_4
VGA_MEM_IO
C105
C156
C177
C99
C106
[email protected][email protected][email protected][email protected][email protected]_4
L24
+2.5V
(125mA)
2
+3V
C225
C
*0_8
D9
LVDR25
1
[email protected] C202
[email protected]/10V_8
C216
[email protected]_4
[email protected]_4
C203
[email protected]/10V_8
(30mA)
L22
+1.8V
LVDDR18
[email protected]_8
C186
C217
[email protected]/10V_8
L66
+1.8V
C218
[email protected][email protected]_4
C632
C233
[email protected]/10V_8
L20
[email protected][email protected]_4
TXVDDR18
[email protected]_8
C161
C220
C219
VGA_MEM_IO
[email protected]/10V_8
[email protected][email protected]_4
L16
[email protected]_8
[email protected]_4
C100
VDDRH
C142
[email protected]_4
+2.5V
L27
2
1
[email protected]/0_6
C244
C243
[email protected]/10V_8
C214
[email protected]_4
(80mA)
A2VDD25
L25 [email protected]/0_6
2
1V_A2VDDQ
C240
[email protected]_4
+1.8V
[email protected]_4
(67mA)
+1.8V
+1.8V
(7mA)
(28mA)
+1.8V
L68
VDD15_P8
VDD15_Y8
VDD15_AC11
VDD15_AC20
VDD15_H20
VDD15_H11
VDD15_M23
VDD15_Y23
P8
Y8
AC11
AC20
H20
H11
M23
Y23
VDDR3_AD7
VDDR3_AD19
VDDR3_AD21
VDDR3_AC22
VDDR3_AC8
VDDR3_AC21
VDDR3_AC19
AD7
AD19
AD21
AC22
AC8
AC21
AC19
VDDR4_AG7
VDDR4_AD9
VDDR4_AC9
VDDR4_AC10
VDDR4_AD10
AG7
AD9
AC9
AC10
AD10
PCIE_VDDR_12_AG26
PCIE_VDDR_12_AK29
PCIE_VDDR_12_AJ30
PCIE_VDDR_12_AG28
PCIE_VDDR_12_AG27
AG26
AK29
AJ30
AG28
AG27
U29E
+1.2V
C173
C183
AE16
AE17
AF15
AE15
LVDDR_25_AE16
LVDDR_25_AE17
LVDDR_18_AF15
LVDDR_18_AE15
AH19
AH13
LPVDD
TPVDD
AF13
AF14
TXVDDR_AF13
TXVDDR_AF14
F18
N6
PVDD
[email protected]_8
[email protected]/10V_8
C641
VDDRH0
VDDRH1
AF21
AE20
A2VDD_AF21
A2VDD_AE20
AF23
A2VDDQ
C637 [email protected]_4 V_AVDD AH23
2
1 L67
[email protected]/0_6
L21
[email protected]_8 VDD1 AE23
AE22
C642
[email protected]_4
(5.8mA)
+1.8V
L13
C118
C122
[email protected]_4
[email protected]/10V_8
C107
C190
[email protected]_4
+1.5V
C111
C189
[email protected]_4
C192
[email protected]/10V_8
[email protected]_4
[email protected]_4
C215
C201
C208
(40mA)
C148
[email protected]_4
A2
A10
A16
A22
A29
C1
C3
C28
C30
D27
D24
D21
D18
D15
D12
D10
D6
D4
C123
[email protected]_4
[email protected]_4
C196
(IO.POWER)
+3V
(2.7mA)
[email protected][email protected][email protected][email protected][email protected]/10V_8
+3V
C199
C206
C198
C200
C197
(EXT.TMDS)
F27
G9
G12
G16
G18
G21
G24
H27
H23
H21
H18
H16
H14
H12
H9
H8
H4
J23
J24
(2mA)
[email protected][email protected][email protected][email protected][email protected]/10V_8
C635
C209
C634
[email protected]_4
[email protected]_4
[email protected]_4
PCIE_PVDD_12_N24
PCIE_PVDD_12_N23
PCIE_PVDD_12_P23
N24
N23
P23
VGA_PCIE12
C143
[email protected]_4
C157
[email protected]_4
C158
[email protected]_4
PCIE_PVDD_18_U23
PCIE_PVDD_18_T23
PCIE_PVDD_18_V23
PCIE_PVDD_18_W23
U23
T23
V23
W23
C168
C174
C185
NC_D9
NC_D13
NC_D19
NC_D25
NC_E4
NC_T4
NC_AB4
D9
D13
D19
D25
E4
T4
AB4
VGA1.2V(1034mA)
[email protected]/10V_8
[email protected]_4 (PCIE 1.2V)
C636
C633
L18
[email protected]_8
(85mA)
VGA1.2V
(QUIET PCIE 1.2V)
+1.8V
[email protected]_4
[email protected]_4
[email protected]_4
(350mA)
(PCIE PLL/IO 1.8V)
AD12
AG5
AG9
AG11
B: ADD 220UF
T14
T19
T16
T18
T17
T25
T29
VGA1.2V
R7
P4
M7
M8
L4
K1
K7
K8
R8
T1
+
C914
[email protected]/2.5V
AVSSQ
AD22
LVSSR_AF18
LVSSR_AH17
LVSSR_AG15
LVSSR_AG18
AF18
AH17
AG15
AG18
LPVSS
TPVSS
AH18
AH12
TXVSSR_AH14
TXVSSR_AG13
TXVSSR_AG14
AH14
AG13
AG14
AK28
A7
VSSRH0
VSSRH1
+2.5V
+1.8V
[email protected]_1206
R45
*0_1206
V_AVDD
A2VSSN_AH20
A2VSSN_AG21
AH20
AG21
A2VSSQ
AF22
AVSSN
AH22
VDD1DI
VDD2DI
VSS1DI
VSS2DI
AE24
AE21
PVDD
PVSS
MPVDD
MPVSS
+1.2V
V_A2VDDQ
C919
C920
[email protected]/10V_8
[email protected]/10V_8
E: Add bulk cap. for acer CRT
AJ28
A6
+1.2V
[email protected]/M22/M26
MPVDD
[email protected]_8
R118
C129
[email protected]/10V
C221
C146
[email protected]_4
C126
C124
[email protected]_4
C166
C162
[email protected]_4
VSS_A2
VSS_A10
VSS_A16
VSS_A22
VSS_A29
VSS_C1
VSS_C3
VSS_C28
VSS_C30
VSS_D27
VSS_D24
VSS_D21
VSS_D18
VSS_D15
VSS_D12
VSS_D10
VSS_D6
VSS_D4
VSS_F27
VSS_G9
VSS_G12
VSS_G16
VSS_G18
VSS_G21
VSS_G24
VSS_H27
VSS_H23
VSS_H21
VSS_H18
VSS_H16
VSS_H14
VSS_H12
VSS_H9
VSS_H8
VSS_H4
VSS_J23
VSS_J24
VSS_AD12
VSS_AG5
VSS_AG9
VSS_AG11
VSS_R7
VSS_P4
VSS_M7
VSS_M8
VSS_L4
VSS_K1
VSS_K7
VSS_K8
VSS_R8
VSS_T1
U4
U8
W7
W8
Y4
AB8
AB7
AB1
AC4
AC12
AC14
AD16
AC16
AC18
AD18
AK2
AJ1
PCIE_VSS_K28
PCIE_VSS_L28
PCIE_VSS_M27
PCIE_VSS_M26
PCIE_VSS_M24
PCIE_VSS_M25
PCIE_VSS_M28
PCIE_VSS_P28
PCIE_VSS_N28
PCIE_VSS_R25
PCIE_VSS_R23
PCIE_VSS_R24
PCIE_VSS_R26
PCIE_VSS_R27
PCIE_VSS_R28
PCIE_VSS_T28
PCIE_VSS_T24
PCIE_VSS_U28
PCIE_VSS_V24
PCIE_VSS_V26
PCIE_VSS_V27
PCIE_VSS_V25
PCIE_VSS_V28
PCIE_VSS_Y28
PCIE_VSS_W24
PCIE_VSS_W28
PCIE_VSS_AA26
PCIE_VSS_AA27
PCIE_VSS_A23
PCIE_VSS_AA24
PCIE_VSS_AA25
PCIE_VSS_AA28
PCIE_VSS_AB28
PCIE_VSS_AC28
PCIE_VSS_AD28
PCIE_VSS_AD26
PCIE_VSS_AD27
PCIE_VSS_AE28
PCIE_VSS_AF28
PCIE_VSS_AH29
K28
L28
M27
M26
M24
M25
M28
P28
N28
R25
R23
R24
R26
R27
R28
T28
T24
U28
V24
V26
V27
V25
V28
Y28
W24
W28
AA26
AA27
AA23
AA24
AA25
AA28
AB28
AC28
AD28
AD26
AD27
AE28
AF28
AH29
C127
C193
P17
P18
P19
U12
U13
U14
U17
U18
U19
V19
V18
V17
V14
V13
V12
N18
N17
N14
W17
W18
W12
W13
W14
N13
N19
M19
M18
M12
N12
M13
M14
P12
P13
P14
M17
W19
VDDC_P17
VDDC_P18
VDDC_P19
VDDC_U12
VDDC_U13
VDDC_U14
VDDC_U17
VDDC_U18
VDDC_U19
VDDC_V19
VDDC_V18
VDDC_V17
VDDC_V14
VDDC_V13
VDDC_V12
VDDC_N18
VDDC_N17
VDDC_N14
VDDC_W17
VDDC_W18
VDDC_W12
VDDC_W13
VDDC_W14
VDDC_N13
VDDC_N19
VDDC_M19
VDDC_M18
VDDC_M12
VDDC_N12
VDDC_M13
VDDC_M14
VDDC_P12
VDDC_P13
VDDC_P14
VDDC_M17
VDDC_W19
VSS_M16
VSS_N16
VSS_N15
VSS_P15
VSS_P16
VSS_R18
VSS_R17
VSS_R16
VSS_R15
VSS_R14
VSS_R13
VSS_R12
VSS_T13
VSS_T14
VSS_T15
VSS_W15
VSS_V16
VSS_V15
VSS_U15
VSS_U16
VSS_T19
VSS_T18
VSS_T17
VSS_T16
M16
N16
N15
P15
P16
R18
R17
R16
R15
R14
R13
R12
T13
T14
T15
W15
V16
V15
U15
U16
T19
T18
T17
T16
VDDC1_W16
VDDC1_M15
VDDC1_R19
VDDC1_T12
W16
M15
R19
T12
[email protected]/10V_8
C
B
L19
C163
C165
C145
C125
[email protected]_8
[email protected]/10V
[email protected]/10V
[email protected]/10V
[email protected]/10V
[email protected]/M22/M26
[email protected]/10V
A
VGA_VDDC
C71
[email protected]/10V
C204
D
+1.2V
VDD1
C70
C222
C213
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]/10V
+1.2V
[email protected]_4
[email protected]/10V_8
C176
C179
C175
C169
C153
C152
C139
C138
C149
PROJECT : ZL2
Quanta Computer Inc.
C155
[email protected][email protected][email protected][email protected][email protected][email protected][email protected][email protected][email protected][email protected]_4
Size
Document Number
Custom
Date:
5
VSS_U4
VSS_U8
VSS_W7
VSS_W8
VSS_Y4
VSS_AB8
VSS_AB7
VSS_AB1
VSS_ AC4
VSS_AC12
VSS_AC14
VSS_AD16
VSS_AC16
VSS_AC18
VSS_AD18
VSS_AK2
VSS_AJ1
(6.2A) (VGA CORE=1.2 OR 1.0V)
F19
M6
AVDD
[email protected]_4
VGA_MEM_IO
C121
A
C187
C228
+1.8V
B
AC13
AD13
AD15
AC15
AC17
LPVDD
[email protected]_8
(6mA)
VDDC_AC13
VDDC_AD13
VDDC_AD15
VDDC_AC15
VDDC_AC17
CORE GND
C581
VDDR1_T7
VDDR1_R4
VDDR1_R1
VDDR1_N8
VDDR1_N7
VDDR1_M4
VDDR1_L8
VDDR1_K23
VDDR1_K24
VDDR1_N4
VDDR1_J8
VDDR1_J7
VDDR1_J4
VDDR1_J1
VDDR1_H10
VDDR1_H13
VDDR1_H15
VDDR1_H17
VDDR1_T8
VDDR1_V4
VDDR1_V7
VDDR1_V8
VDDR1_AA1
VDDR1_AA4
VDDR1_AA7
VDDR1_AA8
VDDR1_A3
VDDR1_A9
VDDR1_A15
VDDR1_A21
VDDR1_A28
VDDR1_B1
VDDR1_B30
VDDR1_D26
VDDR1_D23
VDDR1_D20
VDDR1_D17
VDDR1_D14
VDDR1_D11
VDDR1_D8
VDDR1_D5
VDDR1_E27
VDDR1_F4
VDDR1_G7
VDDR1_G10
VDDR1_G13
VDDR1_G15
VDDR1_G19
VDDR1_G22
VDDR1_G27
VDDR1_H22
VDDR1_H19
VDDR1_AD4
VDDR1_L23
I/O POWER
C580
T7
R4
R1
N8
N7
M4
L8
K23
K24
N4
J8
J7
J4
J1
H10
H13
H15
H17
T8
V4
V7
V8
AA1
AA4
AA7
AA8
A3
A9
A15
A21
A28
B1
B30
D26
D23
D20
D17
D14
D11
D8
D5
E27
F4
G7
G10
G13
G15
G19
G22
G27
H22
H19
AD4
L23
CENTER ARRAY
VGA_MEM_IO
4
3
2
R ev
F
ATI M24(POWER)
Tuesday, December 21, 2004
Sheet
1
12
of
41
5
4
3
2
1
<14> MDB[0..63]
<14> MDA[0..63]
MAB[0..13] <14>
MAA[0..13] <14>
U29C
D
C
H28
H29
J28
J29
J26
H25
H26
G26
G30
D29
D28
E28
E29
G29
G28
F28
G25
F26
E26
F25
E24
F23
E23
D22
B29
C29
C25
C27
B28
B25
C26
B26
F17
E17
D16
F16
E15
F14
E14
F13
C17
B18
B17
B15
C13
B14
C14
C16
A13
A12
C12
B12
C10
C9
B9
B10
E13
E12
E10
F12
F11
E9
F9
F8
DQA0
DQA1
DQA2
DQA3
DQA4
DQA5
DQA6
DQA7
DQA8
DQA9
DQA10
DQA11
DQA12
DQA13
DQA14
DQA15
DQA16
DQA17
DQA18
DQA19
DQA20
DQA21
DQA22
DQA23
DQA24
DQA25
DQA26
DQA27
DQA28
DQA29
DQA30
DQA31
DQA32
DQA33
DQA34
DQA35
DQA36
DQA37
DQA38
DQA39
DQA40
DQA41
DQA42
DQA43
DQA44
DQA45
DQA46
DQA47
DQA48
DQA49
DQA50
DQA51
DQA52
DQA53
DQA54
DQA55
DQA56
DQA57
DQA58
DQA59
DQA60
DQA61
DQA62
DQA63
E22
B22
B23
B24
C23
C22
F22
F21
C21
A24
C24
A25
E21
B20
C19
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
MAA14
J25
F29
E25
A27
F15
C15
C11
E11
DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7
MEMORY INTERFACE A
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
-DQMA0
-DQMA1
-DQMA2
-DQMA3
-DQMA4
-DQMA5
-DQMA6
-DQMA7
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7
J27
F30
F24
B27
E16
B16
B11
F10
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7
RASA#
A19
-RASA
CASA#
E18
-CASA
WEA#
E19
-WEA
CSA0#
E20
-CSA0
CSA1#
F20
-CSA1
CKEA
B19
CLKA0
CLKA0#
CLKA1
CLKA1#
QSA[0..7] <14>
-RASA <14>
-CASA <14>
-WEA <14>
-CSA0 <14>
-CSA1 <14>
CKEA
R348
CLKA0 R346
-CLKA0 R345
[email protected]
[email protected]
C18
A18
CLKA1 R343
-CLKA1 R344
[email protected]
[email protected]
B7
MVREFS
B8
CKEA <14>
[email protected]_4
B21
C20
MVREFD
VGA_MEM_IO
VGA_MEM_IO
M_CLKA0 <14>
-M_CLKA0 <14>
M_CLKA1 <14>
-M_CLKA1 <14>
R54
[email protected]
R342
[email protected]
MVREFD
MVREFS
D30
B13
DIMA_0
DIMA_1
-DQMA[0..7] <14>
DIMA0
DIMA1
T112
T13
R51
C72
[email protected]
[email protected]_4
C570
[email protected]_4
R341
[email protected]
MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63
D7
F7
E7
G6
G5
F5
E5
C4
B5
C5
A4
B4
C2
D3
D1
D2
G4
H6
H5
J6
K5
K4
L6
L5
G2
F3
H2
E2
F2
J3
F1
H3
U6
U5
U3
V6
W5
W4
Y6
Y5
U2
V2
V1
V3
W3
Y2
Y3
AA2
AA6
AA5
AB6
AB5
AD6
AD5
AE5
AE4
AB2
AB3
AC2
AC3
AD3
AE1
AE2
AE3
DQB0
DQB1
DQB2
DQB3
DQB4
DQB5
DQB6
DQB7
DQB8
DQB9
DQB10
DQB11
DQB12
DQB13
DQB14
DQB15
DQB16
DQB17
DQB18
DQB19
DQB20
DQB21
DQB22
DQB23
DQB24
DQB25
DQB26
DQB27
DQB28
DQB29
DQB30
DQB31
DQB32
DQB33
DQB34
DQB35
DQB36
DQB37
DQB38
DQB39
DQB40
DQB41
DQB42
DQB43
DQB44
DQB45
DQB46
DQB47
DQB48
DQB49
DQB50
DQB51
DQB52
DQB53
DQB54
DQB55
DQB56
DQB57
DQB58
DQB59
DQB60
DQB61
DQB62
DQB63
N5
M1
M3
L3
L2
M2
M5
P6
N3
K2
K3
J2
P5
P3
P2
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7
E6
B2
J5
G3
W6
W2
AC6
AD2
-DQMB0
-DQMB1
-DQMB2
-DQMB3
-DQMB4
-DQMB5
-DQMB6
-DQMB7
QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7
F6
B3
K6
G1
V5
W1
AC5
AD1
QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7
RASB#
R2
-RASB
CASB#
T5
-CASB
WEB#
T6
-WEB
CSB0#
R5
-CSB0
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
MAB14
MEMORY INTERFACE B
U29B
Place close to ASIC
MEMVMODE_0
GND
2.5V
PCI-Express Current Calibration Bandgap Backup
GPIO_0
GPIO_6
GPIO_8
0: Disable PLL force calibration
1: Enable PLL force calibration
00: PCI Express 1.0 mode
A
GPIO_(3,2)
GPIO_4
GPIO_5
CKEB
CLKB0
CLKB0#
N1
N2
R355
CLKB0
R353
-CLKB0
R354
CLKB1
CLKB1#
T2
T3
CLKB1
-CLKB1
DIMB_0
DIMB_1
E3
AA3
ROMCS#
AF5
-CSB1 <14>
CKEB
R356
R357
CKEB <14>
[email protected]_4
[email protected]
[email protected]
M_CLKB0 <14>
-M_CLKB0 <14>
[email protected]
[email protected]
M_CLKB1 <14>
-M_CLKB1 <14>
DIMB0
DIMB1
T21
T27
MEMVMODE0 <11>
MEMVMODE_0
MEMVMODE_1
C6
C7
MEMTEST
C8
MBMTEST
R351
[email protected]_4
R350
R349
[email protected]_4
+1.8V
*4.7K_4
R352
*4.7K_4
R53
[email protected]
B
GND
ROMIDCFG0 <11>
DVPDATA_16
DVPDATA_17
DVPDATA_21
DVPDATA_22
DVPDATA_23
DVPDATA_16
DVPDATA_17
DVPDATA_21
DVPDATA_22
DVPDATA_23
<11>
<11>
<11>
<11>
<11>
0: Normal
Strap to set the debug muxes to bting out DEBUG signals
even if registers are inaccessible
GPIO(9,13:11)
INT P/D
R107
*10K_4
ROMIDCFG0
R105
[email protected]_4
0x0x: No ROM, CHG_ID=0
R406
*10K_4
R390
[email protected]_4
R391
*10K_4
R372
*10K_4
DVPDATA_23
DVPDATA_22
DVPDATA_21
R410
[email protected]_4
R399
*10K_4
R400
[email protected]_4
R373
*10K_4
DVPDATA_17
DVPDATA_16
1000: Parallel ROM, Chip ID'S from ROM
MEM TYPE
Bypass PCI-Express PLL
DVPDATA_21: 0=4Mx32 1=8Mx32
C: FOR HYNIX MEMORY
FOR M26P ONLY
0: 128M
1: 256M
PROJECT :ZL2
Quanta Computer Inc.
DVPDATA_22: 0=128M 1=64M
Size
Document Number
Custom
DVPDATA_23: 0=Hynix 1=Samsung
Date:
4
R388
[email protected]_4
A
Turn off PCI-Express impedance / strength calibration
DVPDATA_21~23
R387
[email protected]_4
0x1x: No Rom, CHG_ID=1
1000: Parallel ROM, Chip ID'S from ROM
5
-CSB1
R6
+3V
11: RESERVED
1: disable
-CSB0 <14>
ROMIDCFG
10: PCI Express 1.0 mode
0: enable
C
-WEB <14>
MEMVMODE0
MEMVMODE1
ROMIDCFG0
1: Inject extra current for output buffer switching
PCI-Express PLL Calibration force enable
01: RESERVED
-CASB <14>
PCI-Express transmitter current compensation
0: use reference voltage from Bandgap
1: use reference voltage from resistor divider
GPIO_1
-RASB <14>
MEMVMODE_1
+VDDC_CT
+VDDC_CT
STRAPS PIN
QSB[0..7] <14>
R3
[email protected]/M22/M26
VDDR1
1.8V
-DQMB[0..7] <14>
CSB1#
[email protected]/M22/M26
B
D
3
2
R ev
F
ATI M24 MEM/STRAPS PIN
Tuesday, December 21, 2004
Sheet
1
13
of
41
5
4
3
U25
U4
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA12
MAA13
MAA9
MAA10
MAA11
-DQMA0
-DQMA1
-DQMA2
-DQMA3
-RASA
-CASA
-WEA
-CSA0
M_CLKA0
-M_CLKA0
CKEA
D
MAVREF0_A
T111
T8
T6
T12
T109
T2
T3
T110
-CSA1
C
M4
M5
L5
M6
M7
L8
M8
M9
M10
M3
L4
L7
K5
L6
A2
G11
G2
A11
L1
K1
K2
M1
L10
L11
M11
L12
M12
M2
B3
B10
G3
G10
K11
K12
L2
L3
2
A0
A1
A2
A3
A4
A5
A6
A7
A8(AP)
BA0
BA1
A9
A10
A11
DQM0
DQM1
DQM2
DQM3
RAS
CAS
WE
CS
CLK
CLK#
CKE
MCL
VREF
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
G7
G8
H5
H6
H7
H8
G5
G6
E5
E6
E7
E8
F5
F6
F7
F8
NC/TH1
NC/TH2
NC/TH3
NC/TH4
NC/TH5
NC/TH6
NC/TH7
NC/TH8
NC/TH9
NC/TH10
NC/TH11
NC/TH12
NC/TH13
NC/TH14
NC/TH15
NC/TH16
D6
D7
D9
J5
J6
J7
J8
K4
K9
D4
C8
C9
C10
D5
D8
E4
E9
F4
F9
G4
G9
H4
H9
J4
J9
A3
C3
C4
C5
A10
VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSSQ_0
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VSSQ_10
VSSQ_11
VSSQ_12
VSSQ_13
VSSQ_14
VSSQ_15
VSSQ_16
VSSQ_17
VSSQ_18
VSSQ_19
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQS0
DQS1
DQS2
DQS3
A6
B5
A5
A4
B1
C2
C1
D1
J12
J11
H12
H11
F12
F11
E12
E11
E2
E1
F2
F1
H2
H1
J1
J2
D12
C12
C11
B12
A9
A8
B8
A7
A1
G12
G1
A12
MDA3
MDA0
MDA1
MDA2
MDA7
MDA6
MDA4
MDA5
MDA14
MDA8
MDA15
MDA13
MDA12
MDA9
MDA11
MDA10
MDA17
MDA18
MDA16
MDA19
MDA20
MDA22
MDA23
MDA21
MDA25
MDA24
MDA27
MDA28
MDA31
MDA29
MDA30
MDA26
QSA0
QSA1
QSA2
QSA3
VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
C6
C7
D3
D10
K3
K6
K7
K10
C571
C574
C573
C572
C565
C568
C567
C569
C566
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
C560
C561
[email protected]/10V_8
[email protected]/10V_8
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA12
MAA13
MAA9
MAA10
MAA11
-DQMA5
-DQMA6
-DQMA4
-DQMA7
-RASA
-CASA
-WEA
-CSA0
M_CLKA1
-M_CLKA1
CKEA
<13> -RASA
<13> -CASA
<13> -WEA
<13> -CSA0
<13> CKEA
MAVREF1_A
T10
T11
T5
T7
T4
T107
T108
T9
-CSA1
<13> -CSA1
VGA_MEM_IO
More Memory
decoupling
VDDQ_0
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15
B2
B4
B6
B7
B9
B11
D2
D11
E3
E10
F3
F10
H3
H10
J3
J10
C559
[email protected]
C579
[email protected]
C586
[email protected]_4
C577
[email protected]/10V_8
C576
[email protected]/10V_8
Memory
decoupling
VGA_MEM_IO
M4
M5
L5
M6
M7
L8
M8
M9
M10
M3
L4
L7
K5
L6
A2
G11
G2
A11
L1
K1
K2
M1
L10
L11
M11
L12
M12
M2
B3
B10
G3
G10
K11
K12
L2
L3
U28
A0
A1
A2
A3
A4
A5
A6
A7
A8(AP)
BA0
BA1
A9
A10
A11
DQM0
DQM1
DQM2
DQM3
RAS
CAS
WE
CS
CLK
CLK#
CKE
MCL
VREF
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
G7
G8
H5
H6
H7
H8
G5
G6
E5
E6
E7
E8
F5
F6
F7
F8
NC/TH1
NC/TH2
NC/TH3
NC/TH4
NC/TH5
NC/TH6
NC/TH7
NC/TH8
NC/TH9
NC/TH10
NC/TH11
NC/TH12
NC/TH13
NC/TH14
NC/TH15
NC/TH16
D6
D7
D9
J5
J6
J7
J8
K4
K9
D4
C8
C9
C10
D5
D8
E4
E9
F4
F9
G4
G9
H4
H9
J4
J9
A3
C3
C4
C5
A10
VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSSQ_0
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VSSQ_10
VSSQ_11
VSSQ_12
VSSQ_13
VSSQ_14
VSSQ_15
VSSQ_16
VSSQ_17
VSSQ_18
VSSQ_19
[email protected]_4MX32-33
PBGA144-VRAM
1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQS0
DQS1
DQS2
DQS3
A6
B5
A5
A4
B1
C2
C1
D1
J12
J11
H12
H11
F12
F11
E12
E11
E2
E1
F2
F1
H2
H1
J1
J2
D12
C12
C11
B12
A9
A8
B8
A7
A1
G12
G1
A12
MDA44
MDA43
MDA46
MDA45
MDA40
MDA47
MDA42
MDA41
MDA54
MDA53
MDA55
MDA52
MDA50
MDA49
MDA51
MDA48
MDA38
MDA39
MDA34
MDA37
MDA36
MDA33
MDA32
MDA35
MDA63
MDA61
MDA62
MDA58
MDA60
MDA59
MDA57
MDA56
QSA5
QSA6
QSA4
QSA7
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB12
MAB13
MAB9
MAB10
MAB11
-DQMB0
-DQMB3
-DQMB1
-DQMB2
-RASB
-CASB
-WEB
-CSB0
M_CLKB0
-M_CLKB0
CKEB
VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
C6
C7
D3
D10
K3
K6
K7
K10
C50
C44
C62
C60
C51
C52
C56
C55
C61
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
C54
C58
[email protected]/10V_8
[email protected]/10V_8
MBVREF0_B
A0
A1
A2
A3
A4
A5
A6
A7
A8(AP)
BA0
BA1
A9
A10
A11
DQM0
DQM1
DQM2
DQM3
RAS
CAS
WE
CS
CLK
CLK#
CKE
MCL
VREF
M2
B3
B10
G3
G10
K11
K12
L2
L3
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
T115
T20
T15
T23
T22
T113
T114
T116
-CSB1
VGA_MEM_IO
More Memory
decoupling
VDDQ_0
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15
B2
B4
B6
B7
B9
B11
D2
D11
E3
E10
F3
F10
H3
H10
J3
J10
C43
[email protected]
C49
[email protected]
C63
[email protected]_4
C53
[email protected]/10V_8
C57
[email protected]/10V_8
U8
M4
M5
L5
M6
M7
L8
M8
M9
M10
M3
L4
L7
K5
L6
A2
G11
G2
A11
L1
K1
K2
M1
L10
L11
M11
L12
M12
VGA_MEM_IO
G7
G8
H5
H6
H7
H8
G5
G6
E5
E6
E7
E8
F5
F6
F7
F8
NC/TH1
NC/TH2
NC/TH3
NC/TH4
NC/TH5
NC/TH6
NC/TH7
NC/TH8
NC/TH9
NC/TH10
NC/TH11
NC/TH12
NC/TH13
NC/TH14
NC/TH15
NC/TH16
D6
D7
D9
J5
J6
J7
J8
K4
K9
D4
C8
C9
C10
D5
D8
E4
E9
F4
F9
G4
G9
H4
H9
J4
J9
A3
C3
C4
C5
A10
VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSSQ_0
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VSSQ_10
VSSQ_11
VSSQ_12
VSSQ_13
VSSQ_14
VSSQ_15
VSSQ_16
VSSQ_17
VSSQ_18
VSSQ_19
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQS0
DQS1
DQS2
DQS3
A6
B5
A5
A4
B1
C2
C1
D1
J12
J11
H12
H11
F12
F11
E12
E11
E2
E1
F2
F1
H2
H1
J1
J2
D12
C12
C11
B12
A9
A8
B8
A7
A1
G12
G1
A12
VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
C6
C7
D3
D10
K3
K6
K7
K10
MDB3
MDB1
MDB4
MDB5
MDB6
MDB2
MDB7
MDB0
MDB31
MDB29
MDB24
MDB26
MDB28
MDB30
MDB25
MDB27
MDB15
MDB14
MDB13
MDB12
MDB11
MDB10
MDB8
MDB9
MDB21
MDB23
MDB22
MDB20
MDB16
MDB18
MDB17
MDB19
QSB0
QSB3
QSB1
QSB2
<13> -RASB
<13> -CASB
<13> -WEB
<13> -CSB0
<13> CKEB
MBVREF1_B
T26
T124
T125
T121
T122
T32
T28
T24
C86
C89
C101
C114
C90
C102
C128
C120
C81
<13> -CSB1
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
C108 [email protected]/10V_8
C92 [email protected]/10V_8
VGA_MEM_IO
More Memory
decoupling
VDDQ_0
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15
B2
B4
B6
B7
B9
B11
D2
D11
E3
E10
F3
F10
H3
H10
J3
J10
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB12
MAB13
MAB9
MAB10
MAB11
-DQMB6
-DQMB5
-DQMB7
-DQMB4
-RASB
-CASB
-WEB
-CSB0
M_CLKB1
-M_CLKB1
CKEB
C132
[email protected]
C80
[email protected]
C85
[email protected]_4
C97
[email protected]/10V_8
C88
[email protected]/10V_8
VGA_MEM_IO
Memory
decoupling
-CSB1
M4
M5
L5
M6
M7
L8
M8
M9
M10
M3
L4
L7
K5
L6
A2
G11
G2
A11
L1
K1
K2
M1
L10
L11
M11
L12
M12
A0
A1
A2
A3
A4
A5
A6
A7
A8(AP)
BA0
BA1
A9
A10
A11
DQM0
DQM1
DQM2
DQM3
RAS
CAS
WE
CS
CLK
CLK#
CKE
MCL
VREF
M2
B3
B10
G3
G10
K11
K12
L2
L3
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
G7
G8
H5
H6
H7
H8
G5
G6
E5
E6
E7
E8
F5
F6
F7
F8
NC/TH1
NC/TH2
NC/TH3
NC/TH4
NC/TH5
NC/TH6
NC/TH7
NC/TH8
NC/TH9
NC/TH10
NC/TH11
NC/TH12
NC/TH13
NC/TH14
NC/TH15
NC/TH16
D6
D7
D9
J5
J6
J7
J8
K4
K9
D4
C8
C9
C10
D5
D8
E4
E9
F4
F9
G4
G9
H4
H9
J4
J9
A3
C3
C4
C5
A10
VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSSQ_0
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VSSQ_10
VSSQ_11
VSSQ_12
VSSQ_13
VSSQ_14
VSSQ_15
VSSQ_16
VSSQ_17
VSSQ_18
VSSQ_19
[email protected]_4MX32-33
PBGA144-VRAM
[email protected]_4MX32-33
PBGA144-VRAM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQS0
DQS1
DQS2
DQS3
A6
B5
A5
A4
B1
C2
C1
D1
J12
J11
H12
H11
F12
F11
E12
E11
E2
E1
F2
F1
H2
H1
J1
J2
D12
C12
C11
B12
A9
A8
B8
A7
A1
G12
G1
A12
VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
C6
C7
D3
D10
K3
K6
K7
K10
MDB49
MDB48
MDB51
MDB50
MDB53
MDB52
MDB54
MDB55
MDB42
MDB40
MDB41
MDB43
MDB44
MDB45
MDB46
MDB47
MDB58
MDB59
MDB57
MDB56
MDB60
MDB61
MDB63
MDB62
MDB32
MDB35
MDB34
MDB33
MDB37
MDB39
MDB36
MDB38
QSB6
QSB5
QSB7
QSB4
D
C621
C604
C623
C612
C618
C622
C609
C611
C617
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
C251 [email protected]/10V_8
C252 [email protected]/10V_8
VGA_MEM_IO
C
More Memory
decoupling
VDDQ_0
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15
B2
B4
B6
B7
B9
B11
D2
D11
E3
E10
F3
F10
H3
H10
J3
J10
C600
[email protected]
C607
[email protected]
C606
[email protected]_4
C79
[email protected]/10V_8
C78
[email protected]/10V_8
VGA_MEM_IO
Memory
decoupling
[email protected]_4MX32-33
PBGA144-VRAM
B
B
VGA DDR MEMORY A
VGA_MEM_IO
VGA_MEM_IO
@64/128MBytes DDR 128Mbit 1MX32X4 uBGA
C563
[email protected]/10V
MAA[0..13] <13>
R336
[email protected]/F
MDA[0..63] <13>
MAVREF0_A
C562
[email protected]/10V
4Mx32 AKD35W-T506 K4D263238E-GC33 2.5V
R36
[email protected]/F
QSA[0..7] <13>
@64/128MBytes DDR 128Mbit 1MX32X4 uBGA
C137
[email protected]/10V
MAVREF1_A
C42
[email protected]/10V
R67
[email protected]/F
MAB[0..13] <13>
C136
[email protected]/10V
C603
[email protected]/10V
MDB[0..63] <13>
MBVREF0_B
R38
[email protected]/F
VGA_MEM_IO
VGA DDR MEMORY B
8Mx32 AKD56WCT503 K4D55323QF-GC33 1.8V
C45
[email protected]/10V
-DQMA[0..7] <13>
R337
[email protected]/F
VGA_MEM_IO
-DQMB[0..7] <13>
R66
[email protected]/F
QSB[0..7] <13>
R362
[email protected]/F
MBVREF1_B
C610
[email protected]/10V
R363
[email protected]/F
P l a ce cl ose to memory
P l a ce cl ose to memory
<13> M_CLKA0
R340
[email protected]_4
M_CLKA0-1C564
<13> -M_CLKA0
<13> M_CLKA1
R339
[email protected]_4
R43
[email protected]_4
M_CLKA1-1C47
A
<13> -M_CLKA1
5
R41
<13> M_CLKB0
R62
[email protected]_4
R59
[email protected]_4
R360
[email protected]_4
R361
[email protected]_4
M_CLKB0-1 C115
[email protected]/16V_4
<13> -M_CLKB0
<13> M_CLKB1
M_CLKB1-1 C602
[email protected]/16V_4
[email protected]_4
<13> -M_CLKB1
At least a 2.5:1 spacing between the pair
At least a 2.5:1 spacing between the pair
These resistors and caps must be placed to minimize
any stubs. These must also be placed after the
memory
These resistors and caps must be placed to minimize
any stubs. These must also be placed after the
memory
4
3
[email protected]/16V_4
[email protected]/16V_4
A
PROJECT : ZL2
Quanta Computer Inc.
2
Size
C
Document Number
Date:
Tuesday, December 21, 2004
Rev
F
VGA DDR VRAM-A CANNEL
1
Sheet
14
of
41
5
4
3
2
1
D
D
SDVOB_R+
SDVOB_R-
<6> SDVOB_R+
<6> SDVOB_R-
R60
+2.5V
1
+2.5V
1
R63
SDVOB_G+
SDVOB_GDVI_AVDD
SDVOB_B+
SDVOB_B-
<6> SDVOB_G+
<6> SDVOB_G-
B: DEPOP WHEN EXT. VGA
<6> SDVOB_B+
<6> SDVOB_B-
[email protected]_4
SDVO_CTRLCLK
2
1
SDVOB_CLK+
SDVOB_CLK-
<6> SDVOB_CLK+
<6> SDVOB_CLK-
[email protected]_4
SDVO_CTRLDATA
2
C223
INT-
2
GMCHEXP_RXN1 <6,11>
GMCHEXP_RXP1 <6,11>
[email protected]/16V_4
C226
INT+
1
DVI_AVDD
2
[email protected]/16V_4
DVODATA
DVOCLK
L17
[email protected]
1
2
1
2
C130
C147
[email protected]_4 [email protected]_4 [email protected]/10V_8
[email protected]
C103
1
L15
[email protected]
2
+2.5V
C
1
C84
1
1
C83
2
C93
[email protected]_4 [email protected]_4 [email protected]_4 [email protected]/10V_8
2
INTINT+
TMDS_HPD <11,33>
DVI_DVDD
R65
R69
TLC*
TLC
TVDD1
TDC0*
TDC0
TGND1
TDC1*
TDC1
TVDD2
TDC2*
TDC2
TGND2
1
C150
2
2
1
+2.5V
<11,33> TMDS_DDCDATA
<11,33> TMDS_DDCCLK
DVI_DVDD
AVDD1
SDVOB_STALLSDVOB_STALL+
SDVOB_INTSDVOB_INT+
AGND1
DGND2
HPDET
DVDD2
ATPG
SCEN
VSWING
2
C87
<6> SDVO_CTRLCLK
[email protected]_4 [email protected]/10V_8
<6> SDVO_CTRLDATA
AVDD_PLL
RESET*
AS
SPC
SPD
AGND_PLL
DGND1
SD_PROM
SC_PROM
SD_DDC
SC_DDC
DVDD1
DVI_AVDD
36
35
34
33
32
31
30
29
28
27
26
25
1
<6,11,18,21,29,31,32,33> PLTRST#
1
C91
1
2
3
4
5
6
7
8
9
10
11
12
2
DVI_AVDD_PLL
1 [email protected]_4
1 [email protected]_4
2
2
R71
[email protected]_4
1
2
2
13
14
15
16
17
18
19
20
21
22
23
24
L14
[email protected]
2
U5
R56
*100K_4
1
2
1
+3V
1
C
R58
[email protected]_4
2
2
1
+2.5V
AVDD3
SDVOB_CLKSDVOB_CLK+
AGND3
SDVOB_BSDVOB_B+
AVDD2
SDVOB_GSDVOB_G+
AGND2
SDVOB_RSDVOB_R+
+2.5V 250mA
+3V
190mA
48
47
46
45
44
43
42
41
40
39
38
37
PULL LOW FOR DVO NOT PRESENT(INTERNAL PULLLOW IN 915GM)
L65
[email protected]
2
+3V
1
1
C180
1
C596
[email protected]_4 [email protected]_4 [email protected]/10V_8
2
DVI_CLKDVI_CLK+
C181
2
2
1
DVI_TVDD
DVI_TX0DVI_TX0+
B
B
DVI_TX1DVI_TX1+
DVI_TX2DVI_TX2+
B: ALWAYS NOT ON, TEST ONLY
+3V
U7
DVOCLK
DVODATA
6
5
7
A0
A1
A2
1
2
3
VCC
GND
8
4
SCL
SDA
WP
+3V
C170
*.1U_4
*AT24C16
DVI_CLKDVI_CLK+
R78
R79
1
1
2 [email protected]_4
2 [email protected]_4
CLKCLK+
DVI_TX0DVI_TX0+
R80
R81
1
1
2 [email protected]_4
2 [email protected]_4
TX0TX0+
DVI_TX1DVI_TX1+
R82
R83
1
1
2 [email protected]_4
2 [email protected]_4
TX1TX1+
DVI_TX2DVI_TX2+
R84
R85
1
1
2 [email protected]_4
2 [email protected]_4
TX2TX2+
CLK- <11,33>
CLK+ <11,33>
TX0- <11,33>
TX0+ <11,33>
TX1- <11,33>
TX1+ <11,33>
TX2- <11,33>
TX2+ <11,33>
A
A
R359
*1K_4
2 DVOCLK
R358
*1K_4
2 DVODATA
1
+3V
1
+3V
Title
QUANTA
COMPUTER
CH7306/7
Size
Document Number
CustomZL2
Date:
5
4
3
2
Tuesday, December 21, 2004
Rev
F
Sheet
1
15
of
41
5
4
3
2
1
+3V
+3VSUS
R10
10K_4
PULL HIGH TO +3V_S5 AT PAGE19
TRACE
80MIL
C551
U23
D15
DISPON
R334 0_8
2
LID591#
1
.1U_4
LID591# <19,29>
D
6
BAS316
DISP_ON
<6,11> DISP_ON
IN
3
ON/OFF
LCDVCC_1
L CDVCC
OUT
1
GND
2
C552
C553
C555
C556
C554
5
.1U_4
10U/10V_8
.1U_4
.01U/16V_4
10U/10V_8
IN
4
D
GND
AAT4280_3
SW2
D16
2
1
1
2
BLON <6,11>
BAS316
3
4
MISAKI_LID
3
Lid Switch
+2.5V
TXUCLKOUTTXUCLKOUT+
<6,11> TXUCLKOUT<6,11> TXUCLKOUT+
+3V
1
<6,11> TXUOUT0<6,11> TXUOUT0+
R328
2.2K_4
C
1
<6> I_EDIDCLK
TXLOUT2TXLOUT2+
<6,11> TXLOUT2<6,11> TXLOUT2+
2
R322
2.2K_4
Q55
TXLOUT1TXLOUT1+
<6,11> TXLOUT1<6,11> TXLOUT1+
EDIDCLK
3
TXLOUT0TXLOUT0+
<6,11> TXLOUT0<6,11> TXLOUT0+
[email protected]
<11> EDIDCLK
TXLCLKOUTTXLCLKOUT+
<6,11> TXLCLKOUT<6,11> TXLCLKOUT+
+2.5V
+2.5V
1
<6> I_EDIDDATA
+3V
EDIDCLK
EDIDDATA
R331
2.2K_4
2
R332
2.2K_4
3
Q56
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
41
42
TXUOUT0TXUOUT0+
TXUOUT2TXUOUT2+
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
43
44
TXUOUT2- <6,11>
TXUOUT2+ <6,11>
TXUOUT1TXUOUT1+
I NVCC0
TXUOUT1- <6,11>
TXUOUT1+ <6,11>
R335
0_8
VIN
VADJ
DISPON
L64
C34
BK1608LL121
CONTRAST <29>
.1U_4
C
L CDVCC
+5V
VIN
+3VSUS
C558
C557
+
CN2
FOXCONN_LVDS
1000P_4
*10U/25V-T
2
+2.5V
1
EC_FPBACK# <29>
46
2
Q2
DTC144EU
45
D: FOOTPRINT CHANGED
EDIDDATA
[email protected]
C: DEPOP C558
E: ADD LEVEL SHIFT FOR EDID
<11> EDIDDATA
B: CHANGE FILTERS' VALUES
U12
4
COM
2
+5V
5
IN_B1
1
TV_Y/G_PR
IN_B0
3
TV_Y/G_SYS
TV_Y/G_PR <33>
B
GND
CN23
L26
TV_C/R_SYS
TV-CHROMA
[email protected]
PR_INSERT_5V
6
SEL
TV_C/R
4
COM
+5V
+5V
VCC
5
IN_B1
1
TV_C/R_PR
IN_B0
3
TV_C/R_SYS
S-VIDEO
TV_C/R_PR <33>
C246
C239
150/F_4
6P_4
6P_4
9
3
GND
[email protected]
C247
.1U_4
9
L36
4
4
8
8
3
TV_COMP
+5V
6
SEL
4
COM
2
GND
TV_Y/G_SYS
C268
C257
R136
6P_4
6P_4
150/F_4
1
U11
PR_INSERT_5V
TV-LUMA
FBM-10-160808-151T
R129
7
2
6
FBM-10-160808-151T
U10
C256
.1U_4
6
2
TV_Y/G
B
+5V
VCC
2
SEL
5
6
5
PR_INSERT_5V
7
<17,33> PR_INSERT_5V
L29
VCC
+5V
5
TV-COMP
IN_B1
1
TV_COMP_PR
IN_B0
3
TV_COMP_SYS
TV_COMP_SYS
FBM-10-160808-151T
TV_COMP_PR <33>
R135
C249
C253
6P_4
6P_4
150/F_4
[email protected]
C254
.1U_4
<6> INT_TV_Y/G
A
TV_Y/G
R620 [email protected]_4
TV_Y/G_SYS
1
2
TV_C/R
R621 [email protected]_4
TV_C/R_SYS
1
2
TV_COMP
R622 [email protected]_4
TV_COMP_SYS
1
2
<6> INT_TV_C/R
<6> INT_TV_COMP
<11> EXT_TV_Y/G
<11> EXT_TV_C/R
<11> EXT_TV_COMP
R416
[email protected]_4 TV_Y/G
R417
[email protected]_4 TV_C/R
R415
[email protected]_4 TV_COMP
R404
[email protected]_4 TV_Y/G
R405
[email protected]_4 TV_C/R
R403
[email protected]_4 TV_COMP
A
PROJECT : ZL2
Quanta Computer Inc.
C: ADD CIRCUITS WHEN NO DOCKING
Size
Document Number
Date:
Tuesday, December 21, 2004
R ev
F
DVO CH7011A & RJ45-11 CON
5
4
3
2
Sheet
1
16
of
41
2
3
4
5
U20
R412
R413
R414
<6> INT_VGA_RED
<6> INT_VGA_GRN
<6> INT_VGA_BLU
A
[email protected]_4
[email protected]_4
[email protected]_4
VGA_RED
VGA_GRN
VGA_BLU
<6> INT_VSYNC
<6> INT_HSYNC
RN1111
3
2 [email protected] VSYNC
HSYNC
4
<6> INT_DDCCLK
<6> INT_DDCDAT
RN1123
1
4 [email protected]
CRTDDAT
2
<16,33> PR_INSERT_5V
SEL
FUNCTION
LOW
IN_B0
HIGH
IN_B1
<11> EXT_VSYNC
<11> EXT_HSYNC
VGA_RED
VGA_GRN
VGA_BLU
6
SEL
VGA_RED
4
COM
2
GND
CRTVDD3
+5V
VCC
5
IN_B1
1
VGA_RED_PR
IN_B0
3
VGA_RED_SYS
VGA_RED_PR <33>
C31
.1U_4
RN1061
3
+3V
R316
+2.5V
R317
[email protected]_4 CRTDDCPU
[email protected]_4
R318
2.2K_4
R315
2.2K_4
[email protected]
U19
+5V
PR_INSERT_5V
6
SEL
VGA_GRN
4
COM
2
GND
VCC
5
+5V
IN_B1
1
VGA_GRN_PR
IN_B0
3
VGA_GRN_SYS
A
CRTDDAT
VGA_GRN_PR <33>
1
C30
.1U_4
DDCDAT_1
3
Q29
2N7002
DDCDAT_1 <33>
CRTVDD3
CRTDDCPU
+5V
U18
PR_INSERT_5V
6
SEL
VGA_BLU
4
COM
4 [email protected]
HSYNC
2
2
VCC
5
+5V
IN_B1
1
VGA_BLU_PR
IN_B0
3
VGA_BLU_SYS
VGA_BLU_PR <33>
C29
.1U_4
R314
2.2K_4
R319
2.2K_4
GND
[email protected]
<11> EXT_DDCCLK
<11> EXT_DDCDAT
8
2
RN1053
1
[email protected]_4
[email protected]_4
[email protected]_4
7
+5V
PR_INSERT_5V
[email protected]
R394
R395
R396
<11> EXT_VGA_RED
<11> EXT_VGA_GRN
<11> EXT_VGA_BLU
6
2
1
2 [email protected]
CRTDDAT
4
CRTDCLK
VGA_RED
R623 [email protected]_4
VGA_RED_SYS
1
2
VGA_GRN
R624 [email protected]_4
VGA_GRN_SYS
1
2
VGA_BLU
R625 [email protected]_4
VGA_BLU_SYS
1
2
1
DDCCLK_1 <33>
C: CHANGE VALUES
C: ADD CIRCUITS WHEN NO DOCKING
VGA_RED_SYS
L5
0
CRT_R_1
VGA_GRN_SYS
L6
0
CRT_G_1
VGA_BLU_SYS
L7
0
CRT_B_1
CRT_R_2
BLM18BA220SN1D
CRT_G_2
BLM18BA220SN1D
CRT_B_2
BLM18BA220SN1D
L3
L4
R3
150/F_4
C12
C11
C10
C7
C6
C5
C4
6
1
7
2
8
3
9
4
10
5
CRTVDD3
C3
C2
11
12
DDCDAT_1
13
CRT_HS_1
14
CRT_VS_1
15
DDCCLK_1
150/F_4
10P_4
10P_4
10P_4
*22P_4
*22P_4
*22P_4
10P_4
10P_4
10P_4
17
150/F_4
R4
B
CRT_CONN
L2
R5
CN15
16
B
TO CRT
DDCCLK_1
3
Q30
2N7002
+2.5V +3V
+5V
R6
[email protected]_8
AHCT1G125DCH
C534
.1U_4
5
D2
DA204U
.1U_4
1
CRTVDD2
D8
CH551
C
F2
3
VGA_RED_SYS
VSYNC
2
R8
4
1
2 0_4
CRTVSYNC
L8
0
CRT_VS_1
+5V
2
2
1
CRTVDD3
POLY_SWITCH_1.1A
2
D7
DA204U
2
3
C8
.1U_4
C33
B: CHANGE FROM BEAD
U21
1
C
CRTVSYNC <33>
1
R2
[email protected]_8
+5V
R323
1K_4
C535
.1U_4
VGA_BLU_SYS
2
CRTHSYNC <33>
1
5
3
1
1
U22
HSYNC
D3
DA204U
2
R9
4
1
2 0_4
CR THSYNC
L12
CRT_HS_1
0
C9
3
3
1
VGA_GRN_SYS
AHCT1G125DCH
CLOSE TO U41, U42
C32
*22P_4
*22P_4
2
E: CHANGE TO 0ohm for Acer LCD
D
D
PROJECT : ZL2
Quanta Computer Inc.
Size
Document Number
Date:
Tuesday, December 21, 2004
R ev
F
CRT & S-VIDEO
1
2
3
4
5
6
7
Sheet
17
8
of
41
1
2
3
C803
2
4
5
6
7
8
CLK_32KX1
PCI Pullups
2
VCCRTC
15P_4
1
R539
32.768KHZ
10M_4
Y1
Y2
CLK_32KX2
RTC_RST#
2
D30
RTC_RST#
1
RB500
SM_INTRUDER#
INTVRMEN
1
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
G2
*SHORT_ PAD1
C801
2.2U_6.3V
R561
R572
3K
1K_4
3VRTC
1
3
5VPCU
RTC_N01
Q47
MMBT3904
R569
47K
1
2
B
BT2
BATCON
2
RTC_N02
RTC
INTRUDER#
INTVRMEN
R474
2
RB500
AA3
AA5
AF25
AF23
R_FERR# AF24
56_4
AG26
AG24
AF27
RCI N#
AD23
GATEA20
AF22
<3> NMI
<3> A20M#
<3> FERR#
<3> IGNNE#
<3> INTR
<3> CPUINIT#
<29> RCIN#
<29> GATEA20
1
D29
R_3VRTC 2
1M
C795
.1U_4
3V_ALWAYS
2
R546
RTCRST#
R567
150K
<22,23,25> AD[0..31]
E2
E5
C2
F5
F3
E9
F2
D6
E6
D3
A2
D2
D5
H3
B4
J5
K2
K5
D4
L6
G3
H4
H2
H5
B3
M6
B2
K6
K3
A5
L1
K4
NMI
A20M#
FERR#
IGNNE#
INTR
INIT#
RCIN#
A20GATE
CPU
<2> PCLK_ICH
2
+3V
*33_4
R501
2 1
C
1
C450
*18P_4
PDD[0..15]
<21> PDD[0..15]
PDDREQ
PDIOW#
PDIOR#
PIORDY
PDDACK#
IRQ14
PDA1
PDA0
PDCS1#
PDA2
PDCS3#
+3V
2
R513
D
1
PIORDY
CD_BITCLKA
4.7K_4
10K_4
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDCS1# AD16
PDCS3# AE17
PDA0
AC16
PDA1
AB17
PDA2
AC17
PDIOR# AE16
PDIOW# AC14
PIORDY AF16
IRQ14
AB16
PDDREQ AB14
PDDACK# AB15
DCS1#
DCS3#
DA0
DA1
DA2
DIOR#
DIOW#
IORDY
IDEIRQ
DDREQ
DDACK#
2
PDDREQ
PDIOW#
PDIOR#
PIORDY
PDDACK#
IRQ14
PDA1
PDA0
PDCS1#
PDA2
PDCS3#
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
ICH6-M
R226
J3
A3
J2
C3
J1
E1
G5
E3
C5
PLOCK#
FRAME# <22,23,25>
IRDY# <22,23,25>
TRDY# <22,23,25>
DEVSEL# <22,23,25>
STOP# <22,23,25>
PAR <22,23,25>
SERR# <22,23,25>
PERR# <22,23,25>
PLOCK# <23>
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#/GPI40
REQ5#/GPI1
REQ6#/GPI0
L5
B5
M5
B8
F7
E8
B7
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
RBAYID1
RBAYID0
GNT0#
GNT1#
GNT2#
GNT3#
GNT4#/GPO48
GNT5#/GPO17
GNT6#/GPO16
C1
B6
F1
C8
E7
F6
D8
GNT0#
GNT1#
GNT2#
PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#/GPI2
PIRQF#/GPI3
PIRQG#/GPI4
PIRQH#/GPI5
N2
L2
M1
L3
D9
C7
C6
M3
SATALED#
SATA0_RXN
SATA0_RXP
SATA0_TXN
SATA0_TXP
AD7
AC7
AF6
AG6
SATA_CLKN
SATA_CLKP
AC2
AC1
SATARBIAS#
SATARBIAS
ACZ_BIT_CLK
ACZ_SYNC
ACZ_RST#
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2
ACZ_SDO
AG11
AF11
2
3
A
PIRQD#
REQ2#
TRDY#
STOP#
B: DEPOP R467
+3V
RP24
LPC_DRQ1#
PIRQA#
PIRQC#
PIRQB#
8
6
4
2
7
5
3
1
8P4R-10K
+3V
8P4R-10K
GATEA20
SERIRQ
1
3
5
7
IRQ14
REQ2 : MINI PCI
2
4
6
8
B
RP21
RBAYID1
RBAYID0
<21>
<21>
FERR#
1
R473
GNT0# <25>
GNT1# <23>
GNT2# <22>
DPRSLP#
RBAYON# <21>
PIRQA#
PIRQB#
PIRQC#
PIRQD#
LUSB1#
MB_ID0
MB_ID1
MB_ID2
<23,25>
<22>
<23>
<22,23>
<33>
<19>
<19>
<19>
2
LUSB1#
+VCCP
56_4
1
2
+VCCP
R471
*56_4
Depop for Dothan. Populate for Yonah
RCI N# R475 2
R645 2
1 10K_4
+3V
1 10K_4
E: LUSB1/2 NEW ADD FOR EZ4 Distance between the ICH-6 M
LEGACY USB
cap on the "P" signal should
and
be
identical distance between the
ICH-6 M and cap on the "N" signal
for same pair.
C
-HDD0_LED <30>
SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C
T194
T195
CLK_PCIE_SATA# <2>
CLK_PCIE_SATA <2>
R516
SATARBIAS
C10
B9
A10
SATA_RXN0_C
C774 [email protected]_4
1
2
SATA_RXN0 <21>
SATA_RXP0_C
C777 [email protected]_4
1
2
SATA_RXP0 <21>
SATA_TXN0_C
C779 [email protected]_4
1
2
SATA_TXN0 <21>
SATA_TXP0_C
C781 [email protected]_4
1
2
SATA_TXP0 <21>
24.9/F_4
Place within 500mils
of ICH6 ball
CD_BITCLKA <27>
R229
39_4
CD_SYNC
B: NOT STUFF WHEN NO SATA
<27>
CD_RESET# <27>
F11
F10
B10
C9
C414
CD_SDIN0 <27>
T96
T190
*10P_4
D
R231
39_4
CD_SDOUTA <27>
2 1
1
CPUSLP# <3,5>
<19,22,23,29,31> SERIRQ
<19,33> LUSB2#
REQ1 : 1394/CARDBUS
REQ0# <25>
REQ1# <23>
REQ2# <22>
LUSB1#
MB_ID0
MB_ID1
MB_ID2
5
4
3
2
1
INSTALL FOR DOTHAN-A AND NOT INSTALL FOR DOTHAN-B
<22,23,25>
<22,23,25>
<22,23,25>
<22,23,25>
AC19
AE3
AD3
AG2
AF2
SATA2_RXN
SATA2_RXP
SATA2_TXN
SATA2_TXP
*47_4
C419
2
C409
*22P_4
6
7
8
9
10
10P8R-8.2K
THERMTRIP# <3,6>
56_4
*10P_4
Title
QUANTA
COMPUTER
ICH6-M (CPU,PCI,IDE,SATA,AC97)
1
<21>
<21>
<21>
<21>
<21>
<21>
<21>
<21>
<21>
<21>
<21>
AD14
AF15
AF14
AD12
AE14
AC11
AD11
AB11
AE13
AF13
AB12
AB13
AC13
AE15
AG15
AD13
R484
75/F_4
+3V
1
2
*0_4
R467
DPSLP# <3>
1
2
DPRSLP# <3>
0_4
R469
Depop for Dothan. Populate for Yonah B: POP R469
T192
T98
T100
+3V
RP23
PERR#
SERR#
FRAME#
REQ0#
1
IDE
B: NOT INSTALL
1 0_4
2
10P8R-8.2K
SMI# <3>
STPCLK# <3>
R_CPUSLP#
REQ4#
IRDY#
DEVSEL#
PLOCK#
CPUPWRGD <3>
T84
THERMTRIP#_ICH R483
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PAR
SERR#
PERR#
PLOCK#
SATA
R249
R234
AG25
AE22
AE23
AG27
AE26
AE27
AD27
AE24
CBE0#
CBE1#
CBE2#
CBE3#
AC-97/
AZALIA
2
<22,23,24,25> PCIRST#
<6,11,15,21,29,31,32,33> PLTRST#
<22,23,25,29,31> CLKRUN#
PME#
PCICLK
PCIRST#
PLTRST#
CLKRUN#/GPIO32
<29,31>
<29,31> +VCCP
<29,31>
<29,31>
<31>
LFRAME#/FWH4 <29,31>
J6
H6
G4
G2
PCI
P6
G6
R2
R5
AF19
1
R608
LPC_DRQ0#
LPC_DRQ1#
2
10_4
C/BE0#
C/BE1#
C/BE2#
C/BE3#
PME# INTERNAL 20K PULLUP
<22,23,25> PME#
+3V
LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3
LPC_DRQ0#
B: SUPRESS AUDIO NOISE
CPUPWRGD/GPO49
INIT3_3V#
THRMTRIP#
SMI#
STPCLK#
CPUSLP#
DPSLP#/TP[2]
DPRSLP#/TP[4]
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
P2
N3
N5
N4
N6
P4
P3
5
4
3
2
1
2
VCCRTC
1
180K_4
1
A
AA2
LAD0
LAD1/FB1
LAD2/FB2
LAD3/FB3
LDRQ0#
LDRQ1#/GPI41
LFRAME#
6
7
8
9
10
1
R540
0_4
RTCX1
RTCX2
1
2
15P_4
1
RTC
C804
2
R541
LPC
VCCRTC
INTVRMEN
REQ1#
RBAYID0
RBAYID1
REQ3#
U38A
1
R543
*330K
+3V
RP22
Y7
4
5
6
Size
Document Number
ZL2
Date:
Tuesday, December 21, 2004
7
Rev
F
Sheet
of
18
8
41
1
2
3
4
5
6
7
8
U38B
RP14
CLK48_USB
R472
<22> USBP0+
<22> USBP0-
BT
D21
C21
C27
C19
D19
B26
D17
E17
C23
D15
C15
C25
OC0#
10P_4
T90
T87
OC2#
T91
T88
OC4#
T93
T92
OC6#
CLK48_USB
<2> CLK48_USB
+3V_S5
R248
R232
10K_4
10K_4
SMLINK0
SMLINK1
+3V_S5
RP25
8 BATLOW#
6 RING#
4 SCI#
2
7
5
3
1
B
+3V_S5
RP26
8
6
4
2
8P4R-10K
V25
V24
U27
U26
DMI1_RXN
DMI1_RXP
DMI1_TXN
DMI1_TXP
DMI3_RXN
DMI3_RXP
DMI3_TXN
DMI3_TXP
AD25
AC25
DMI_CLKN
DMI_CLKP
DMI_ZCOMP
DMI_IRCOMP
F24
F23
HSIN2
HSIP2
HSON2
HSOP2
M25
M24
L27
L26
HSIN3
HSIP3
HSON3
HSOP3
P24
P23
N27
N26
1
B: REMOVE RING FUNCTION
HSON0
HSOP0
C720 [email protected]_4
2
<29> ICH_PWROK
<34> DPRSLPVR
8.2K_4
R538
R250
10K_4
10K_4
ICH_PWROK
RSMRST#
RING#
THRM#
ICH_PWROK
DPRSLPVR
BATLOW#
T2
AC20
AA1
AE20
V2
U1
RSMRST#
Y3
IMVP_PWRGD AF21
AD19
W3
V6
THRM#
R496
<29> DNBSWON#
<29> RSMRST#
<6,34> IMVP_PWRGD
<6> PM_BMBUSY#
<23,31> LPC_PD#
<32> SUSCLK
2
<2> 14M_ICH
C
R262
+3V_S5
10K_4
KBSMI#
R243
33_4
10K_4
PR_STS
2 1
R545
C428
+3V
<27> PCSPK
<18,33> LUSB2#
<29> KBSMI#
<29,33> PR_STS
<29> SCI#
<30> EMAIL_LED#
<21> RST_HDD#
<21> RST_RBAY#
KBSMI#
PR_STS
SCI#
T201
1
6P_4
B: CHANGE EMAIL_LED# FROM
GPIO24
R550
R246
R244
10K_4
10K_4
10K_4
MB_ID0
MB_ID1
MB_ID2
R247
R245
*10K_4
*10K_4
*10K_4
E: C428 CHANGE TO 6P
MB_ID0 <18>
MB_ID1 <18>
MB_ID2 <18>
T103
T101
T197
T198
T97
+3V
1
R544
DMI_RXN3 <6>
DMI_RXP3 <6>
DMI_TXN3 <6>
DMI_TXP3 <6>
DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1
1
2
C721
[email protected]_4
K25
<33> PCIE_RXN1
K24
<33> PCIE_RXP1
PCLK_SMB
HSON1
1
2
J27
<33> PCIE_TXN1
SMB_LINK_ALERT#
HSOP1
1
2
J26
<33> PCIE_TXP1
LID591#
C711
[email protected]_4C710
[email protected]_4
PDAT_SMB
Y4
<2,25,32,33> PCLK_SMB
W5
<2,25,32,33> PDAT_SMB
LID591#
W6
<16,29> LID591#
PWRBTN# HAS INTERNAL PULLUP
AB24
AB23
AA27
AA26
<6>
<6>
<6>
<6>
<32> PCIE_RXN0
<32> PCIE_RXP0
<32> PCIE_TXN0
<32> PCIE_TXP0
+3V
DMI_RXN2 <6>
DMI_RXP2 <6>
DMI_TXN2 <6>
DMI_TXP2 <6>
DMI0_RXN
DMI0_RXP
DMI0_TXN
DMI0_TXP
H25
H24
G27
G26
E10
F8
AE19
R1
M2
R6
AB21
AD20
AD21
V3
HSIN0
HSIP0
HSON0
HSOP0
PCI-EXPRESS
HSIN1
HSIP1
HSON1
HSOP1
OC1#
OC3#
OC5#
OC7#
W4
U6
Y5
RI#
THRM#
PWROK
DPRSLPVR/TP1
BATLOW#/TP0
PWRBTN#
RSMRST#
VRMPWRGD
BM_BUSY#/GPIO6
SUS_STAT#/LPCPD#
SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
LAN_RST#
SYS_RESET#
WAKE#
MCH_SYNC#
T4
T5
T6
V5
U2
U5
AG21
STP_PCI#/GPO18
STP_CPU#/GPO20
SERIRQ
AC21
AD22
AB20
GPIO25
SATA0GP/GPIO26
GPIO27
GPIO28
SATA1GP/GPIO29
SATA2GP/GPIO30
SATA3GP/GPIO31
P5
AF17
R3
T3
AE18
AF18
AG18
CLK14
SPKR
GPI7
GPI8
GPI12
GPI13
GPO19
GPO21
GPO23
GPIO24
MISC&GPIO
GPIO33
GPIO34
6
7
8
9
10
+3V_S5
5
4
3
2
1
A
OC1#
OC2#
10P8R-10K
M/B USB
Place within 500mils of ICH-6
R485
22.6/F_4
2
1
24.9/F_4
1
+1.5V
1
2
1
C712
C713
[email protected]_4
T83 [email protected]_4
B: BOM CHANGE
T85
T81
T82
Place within 500mils of ICH-6
B
PCIE_RXN2 <33>
PCIE_RXP2 <33>
PCIE_TXN2 <33>
PCIE_TXP2 <33>
SMLINK0
SMLINK1
SMB_LINK_ALERT#
SMLINK0
SMLINK1
LINKALERET#
PM
2
OC6#
M/B USB
R213
DMICOMP 2
HSON2
HSOP2
OC4#
OC0#
+3V_S5
USBRBIAS
SMBCLK
SMBDATA
SMBALERT#/GPI11
SM&SMI
M/B USB
Y25
Y24
W27
W26
T25
T24
R27
R26
DMI
USBP3+ <22>
USBP3- <22>
OC3# <22>
USBP5+ <22>
USBP5- <22>
OC5# <22>
USBP7+ <22>
USBP7- <22>
OC7# <22>
DMI2_RXN
DMI2_RXP
DMI2_TXN
DMI2_TXP
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
B: BOM CHANGE
7
5
3
1
CLK48
NEWCARD
B20
A20
B27
B18
A18
C26
A16
B16
D23
B14
A14
C24
B22
A22
<6>
<6>
<6>
<6>
<2> CLK_PCIE_ICH#
<2> CLK_PCIE_ICH
8P4R-10K
A27
USB
USBP1+ <32>
USBP1- <32>
USBP1P
USBP1N
OC1#
USBP3P
USBP3N
OC3#
USBP5P
USBP5N
OC5#/GPI10
USBP7P
USBP7N
OC7#/GPI15
USBRBIAS
USBRBIAS#
RSMRST#
PCIE_WAKE#
MCH_SYNC#
SUSB# <29>
SUSC# <29>
T99
DBR# <3>
STP_PCI# <2>
STP_CPU# <2,34>
SERIRQ <18,22,23,29,31>
AF20 MPCIACT#
MB_ID3
AC18
T102
MCH_SYNC#R494
10K_4
PCIE_WAKE# R233
1K_4
+3V
+3V_S5
C
T200
T105
T189
2
1 2
C719
2
10_4
USBP0P
USBP0N
OC0#
USBP2P
USBP2N
OC2#
USBP4P
USBP4N
OC4#/GPI9
USBP6P
USBP6N
OC6#/GPI14
D12
B12
D11
F13
AC5
AD5
AF4
AG4
AC9
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
E12
E11
C13
C12
C11
E13
LAN_CLK
LAN_RSTSYNC
F12
B11
RSVD6
RSVD7
RSVD8
RSVD9
AD9
AF8
AG8
U3
LAN
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RESERVED
R503
33_4
needs to be pulled down if
programmed as SATA
1
1
A
T95
T193
T191
T104
RSVD9=TP3
ICH6-M
R227
10K_4
D
2
D
DPRSLPVR
MB_ID3
R635
R640
100K_4
*10K_4
Title
QUANTA
COMPUTER
ICH6-M (USB,DMI,LPC)
D: ADD ONE MB_ID
1
2
3
Size
Document Number
ZL2
Date:
Wednesday, December 22, 2004
E: ADD PULLLOW
4
5
6
7
Rev
F
Sheet
of
19
8
41
1
2
2
2
C740
1
+3V_S5
.1U_4
1
2
2
1
2
1
2
1
1
2
2
1
1
.1U_4
C390
.1U_4
C380
V5REF1
V5REF2
A8
AA18
.1U_4
V5REF_SUS
VCCUSBPLL
VCCSUS3_3_20
VCCLAN3_3/VCCSUS3_3_1
VCCLAN3_3/VCCSUS3_3_2
VCCRTC
VCCLAN3_3/VCCSUS3_3_3
VCCLAN3_3/VCCSUS3_3_4
VCCLAN1_5/VCCSUS1_5_1
VCCSUS3_3_1
VCCLAN1_5/VCCSUS1_5_2
VCCSUS3_3_2
VCCSUS3_3_3
V_CPU_IO1
VCCSUS3_3_4
V_CPU_IO2
VCCSUS3_3_5
V_CPU_IO3
VCCSUS3_3_6
VCCSUS3_3_13
VCCSUS3_3_7
VCCSUS3_3_14
VCCSUS3_3_8
VCCSUS3_3_15
VCCSUS3_3_9
VCCSUS3_3_16
VCCSUS3_3_10
VCCSUS3_3_17
VCCSUS3_3_11
VCCSUS3_3_18
VCCSUS3_3_12
VCCSUS3_3_19
A25
A24
AB22
AD26
AG23
C16
D16
E16
F15
F16
G15
G16
C768
.1U_4
+1.5V
+2.5V
V5REF
25mA
V5REF_SUS
+1.5V
+3V_S5
VCCRTC 5uA
AB3
G10
G11
.1U_4
+1.5V_S5
C418
C367
.1U_4
2
P7
AB18
2
VCC2_5_2
VCC2_5_4
+1.5V
1
D24
D25
D26
D27
E20
E21
E22
E23
E24
F20
G20
2
G8
VCC1_5_68
VCC1_5_69
VCC1_5_70
VCC1_5_71
VCC1_5_72
VCC1_5_73
VCC1_5_74
VCC1_5_75
VCC1_5_76
VCC1_5_77
VCC1_5_78
1
VCC1_5_67
+1.5V_S5
C430
C365
.01U/16V_4
6mA
.1U_4
+VCCP
C363
.1U_4
14mA
VCCRTC
2
23mA
C421
1U/10V
2
.1U_4
C473
.1U_4
C453
1
2
C393
1
+3V_S5
1
C470
ICH6-M
D
.1U_4
VSS087
VSS088
VSS089
VSS090
VSS091
VSS092
VSS093
VSS094
VSS095
VSS096
VSS097
VSS098
VSS099
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
GND
G1
G12
G21
G7
G9
H23
H26
H27
J23
J24
J25
J4
K1
K23
K26
K27
K7
L13
L15
L23
L24
L25
M12
M13
M14
M15
M16
M23
M26
M27
M4
N1
N11
N12
N13
N14
N15
N16
N17
N7
P12
P13
P14
P15
P16
P22
R11
R12
R13
R14
R15
R16
R17
R23
R24
R25
R4
T1
T12
T13
T14
T15
T16
T23
T26
T27
T7
U13
U15
U23
U24
U25
V23
V26
V27
V4
W1
W23
W24
W25
W7
Y23
Y26
Y27
Y6
E27
A
B
C
ICH6-M
2
A17
B17
C17
F18
G17
G18
R7
U7
VSS001
VSS002
VSS003
VSS004
VSS005
VSS006
VSS007
VSS008
VSS009
VSS010
VSS011
VSS012
VSS013
VSS014
VSS015
VSS016
VSS017
VSS018
VSS019
VSS020
VSS021
VSS022
VSS023
VSS024
VSS025
VSS026
VSS027
VSS028
VSS029
VSS030
VSS031
VSS032
VSS033
VSS034
VSS035
VSS036
VSS037
VSS038
VSS039
VSS040
VSS041
VSS042
VSS043
VSS044
VSS045
VSS046
VSS047
VSS048
VSS049
VSS050
VSS051
VSS052
VSS053
VSS054
VSS055
VSS056
VSS057
VSS058
VSS059
VSS060
VSS061
VSS062
VSS063
VSS064
VSS065
VSS066
VSS067
VSS068
VSS069
VSS070
VSS071
VSS072
VSS073
VSS074
VSS075
VSS076
VSS077
VSS078
VSS079
VSS080
VSS081
VSS082
VSS083
VSS084
VSS085
VSS086
C451
1
.1U_4
VCCSUS1_5_2
VCCSUS1_5_3
2
A11
U4
V1
V7
W2
Y7
C387
G19
F21
VCCSATAPLL
VCC3_3_22
.1U_4
170mA
VCCSUS1_5_1
1
.1U_4
VCCDMIPLL
VCC3_3_1
.1U_4
1
.1U_4
1
2
1
C391
2
A13
F14
G13
G14
.1U_4
1
1
C766
+3V_S5
39mA
AC27
E26
AE1
AG10
+3V
C792
2
.1U_4
2
2
C362
1
+1.5V
2
VCCDMIPLL
C
C381
1
+3V
.01U/16V_4
+1.5V_S5
2
.01U/16V_4
.1U_4
1
.1U_4
VCC1_5_56
VCC1_5_57
VCC1_5_58
VCC1_5_59
VCC1_5_60
VCC1_5_61
VCC1_5_62
VCC1_5_63
VCC1_5_64
VCC1_5_65
.1U_4
C761
2
C413
AA7
AA8
AA9
AB8
AC8
AD8
AE8
AE9
AF9
AG9
A1
A12
A15
A19
A21
A23
A26
A4
A7
A9
AA11
AA13
AA16
AA4
AB1
AB10
AB19
AB2
AB7
AB9
AC10
AC12
AC22
AC23
AC24
AC26
AC3
AC6
AD1
AD10
AD15
AD18
AD2
AD24
AD6
AE10
AE11
AE12
AE2
AE21
AE25
AE6
AE7
AF1
AF10
AF12
AF26
AF3
AF7
AG1
AG12
AG14
AG17
AG20
AG22
AG3
AG7
B13
B15
B19
B21
B23
B24
B25
C14
C18
C20
C22
C4
D1
D10
D13
D14
D18
D20
D22
D7
E14
E15
E18
E19
E25
F17
F19
F22
F4
+3V
C469
1
C714
2
2
1
2
1
10U_6.3V
1UH
1/F_4
+1.5V
1
1
2VDMIPLL2
1.77A
+3_3V_ICH
2
L72
R466
1
C386
204mA
1
+1.5V
VCC1_5_46
VCC1_5_47
VCC1_5_48
VCC1_5_49
VCC1_5_50
VCC1_5_51
VCC1_5_52
VCC1_5_53
VCC1_5_54
VCC1_5_55
.1U_4
2
.1U_4
AA6
AB4
AB5
AB6
AC4
AD4
AE4
AE5
AF5
AG5
AA12
AA14
AA15
AA17
AC15
AD17
AG13
AG16
AG19
AA10
.1U_4
C392
1
2
C420
1
+1.5V
USB
VCC3_3_12
VCC3_3_13
VCC3_3_14
VCC3_3_15
VCC3_3_16
VCC3_3_17
VCC3_3_18
VCC3_3_19
VCC3_3_20
VCC3_3_21
.1U_4
2
B
C715
8
1
.1U_4
.1U_4
C455
2
2
C734
C733
1U/10V
CC0603
1
RB751V
2
+3V_S5
V5REF_SUS
1
1
2
10mA
C389
+3V
C422
1
CH551
D26
C771
+3_3V_PCI
2
E: CHANGED FROM RB751V
C376
.1U_4
1
1
A6
B1
E4
H1
H7
J7
L4
L7
M7
P1
.1U_4
2
2
VCC3_3_2
VCC3_3_3
VCC3_3_4
VCC3_3_5
VCC3_3_6
VCC3_3_7
VCC3_3_8
VCC3_3_9
VCC3_3_10
VCC3_3_11
C423
1
.1U_4
VCC1_5_79
VCC1_5_80
VCC1_5_81
VCC1_5_82
VCC1_5_83
VCC1_5_84
VCC1_5_85
VCC1_5_86
VCC1_5_87
VCC1_5_88
VCC1_5_89
VCC1_5_90
VCC1_5_91
VCC1_5_92
VCC1_5_93
VCC1_5_94
VCC1_5_95
VCC1_5_96
VCC1_5_97
VCC1_5_98
AA19
AA20
AA21
L11
L12
L14
L16
L17
M11
M17
P11
P17
T11
T17
U11
U12
U14
U16
U17
F9
2
1
C382
D25
+5VSUS
7
1
2
1
2
C759
1U/10V
CC0603
1mA
CORE
V5REF
1
IDE
D27
2
PCI
+5V
VCC1_5_1
VCC1_5_2
VCC1_5_3
VCC1_5_4
VCC1_5_5
VCC1_5_6
VCC1_5_7
VCC1_5_8
VCC1_5_9
VCC1_5_10
VCC1_5_11
VCC1_5_12
VCC1_5_13
VCC1_5_14
VCC1_5_15
VCC1_5_16
VCC1_5_17
VCC1_5_18
VCC1_5_19
VCC1_5_20
VCC1_5_21
VCC1_5_22
VCC1_5_23
VCC1_5_24
VCC1_5_25
VCC1_5_26
VCC1_5_27
VCC1_5_28
VCC1_5_29
VCC1_5_30
VCC1_5_31
VCC1_5_32
VCC1_5_33
VCC1_5_34
VCC1_5_35
VCC1_5_36
VCC1_5_37
VCC1_5_38
VCC1_5_39
VCC1_5_40
VCC1_5_41
VCC1_5_42
VCC1_5_43
VCC1_5_44
VCC1_5_45
USB CORE
2
2
10
RB751V
6
U38D
PCE/IDE
REF
.1U_4
AA22
AA23
AA24
AA25
AB25
AB26
AB27
F25
F26
F27
G22
G23
G24
G25
H21
H22
J21
J22
K21
K22
L21
L22
M21
M22
N21
N22
N23
N24
N25
P21
P25
P26
P27
R21
R22
T21
T22
U21
U22
V21
V22
W21
W22
Y21
Y22
PCIE
.1U_4
C374
SATA
.1U_4
C364
1
1
R514
+3V
5
+1.5V
C375
1
+
C379
220U/2.5V
A
4
U38C
+1_5V_PCIE
2
BLM41P600SPG
2
1
+1.5V
3
578mA
L52
.1U_4
D
Title
QUANTA
COMPUTER
ICH6-M (POWER&GND)
1
2
3
4
5
6
Size
Document Number
ZL2
Date:
Tuesday, December 21, 2004
7
Rev
F
Sheet
of
20
8
41
1
2
3
4
CN31
<30> IDELED#
IRQ14
HDLED#
HDD_VDD
1
2
3
4
5
6
7
3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
RSVD
GND
12V
12V
12V
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
PSEL
R563
GND24
24
CSEL:
0 DRIVE0
1 DRIVE1
470_4
-PDIAG R571
10K_4
+5V
PDA2 <18>
PDCS3# <18>
HDD_VDD
HDD_VDD
C510
C501
C508
C872
C509
C503
.1U_4
1000P_4
.1U_4
150U/6.3V_7
.1U_4
.1U_4
+3V
U27
36
+5V
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
C
VCC_1 VCC_2
48
2
3
4
5
6
1
A0
A1
A2
A3
A4
NC_1
B0
B1
B2
B3
B4
46
45
44
43
42
7
8
9
10
11
13
A5
A6
A7
A8
A9
NC_2
B5
B6
B7
B8
B9
41
40
39
38
37
LPDD5
LPDD6
LPDD7
LPDD8
LPDD9
+5V
R70
C582
A10
A11
A12
A13
A14
BE2
B10
B11
B12
B13
B14
34
33
32
31
30
LPDD10
LPDD11
LPDD12
LPDD13
LPDD14
PDD15
19
PDCS1#
20
PDCS3#
21
PDA0
22
PDA1
23
LBAYON_HDD# 47
A15
A16
A17
A18
A19
BE1
B15
B16
B17
B18
B19
29
28
27
26
25
LPDD15
LPDCS1#
LPDCS3#
LPDA0
LPDA1
GND_1GND_2
24
LBAYRST#
LPDD7
LPDD6
LPDD5
LPDD4
10K_4
LPDD3
LPDD2
LPDD1
LPDD0
LPDIOW#
LPI ORDY
[email protected]_4
PDD10
14
PDD11
15
PDD12
16
PDD13
17
PDD14
18
LBAYON_HDD# 35
12
+5V
LPDD0
LPDD1
LPDD2
LPDD3
LPDD4
CN21
LIRQ14
LPDA1
LPDA0
LPDCS1#
LIDE_LED_1#
-RBAYINS
<29> -RBAYINS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
53
54
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
SATA_RXN0 <18>
SATA_RXP0 <18>
+3.3VSATA R273
[email protected]_8
H DD_VDD R286
0_8
+3.3VSATA
1 2
2 1
+3V
A
+5V
+3.3VSATA
C497
[email protected]/10V_8
44 43
C475
[email protected]_4
[email protected]_ATA
Media Bay Connector
S : DFHS60FR311
F : DFHS50FR156
BAY ID STATUS
+3V
LPDD8
LPDD9
LPDD10
LPDD11
<19> RST_HDD#
LPDD12
LPDD13
LPDD14
LPDD15
LPDDREQ
LPDIOR#
+3.3VSATA
43 44
C495
[email protected]/10V_8
<6,11,15,18,29,31,32,33> PLTRST#
R511
0_4
R222
*0_4
1
RBAYID0/
LBAYID0
+5V
2
B
SATA_TXP0 <18>
SATA_TXN0 <18>
GND
23
GND1
RXP
RXN
GND2
TXN
TXP
GND3
RST
GND23
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
X
R580
PIORDY
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
GND
<18> PDDREQ
<18> PDIOW#
<18> PDIOR#
<18> PIORDY
<18> PDDACK#
<18> IRQ14
<18> PDA1
<18> PDA0
<18>
0_4PDCS1#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
46
A
HDD_CON CN30
-IDERST
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0
45
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
20
<18> PDD[0..15]
0
0
1
R230
10K_4
3
RBAYID1/
LBAYID1
0
1
0
B
STATUS
FDD
HDD
CD/DVD
-IDERST
Q23
DTC144EU
LPDDACK#
LPDA2
LPDCS3#
RBA YID0
RBA YID1
RCSEL
RBAYID0 <18>
RBAYID1 <18>
RBAYVCC
RBAYVCC
-LPDIAG
R68
*470_4
R73
[email protected]_4
NC FOR SLAVE
[email protected]_50P
C65
C66
C134
C104
1000P_4
.1U_4
.1U_4
.1U_4
C67
C69
C74
C76
.1U_4
.1U_4
.1U_4
.1U_4
C
F: CHANGE TO -LPDIAG
[email protected]
+5V
ODD Connector
23
22
21
20
19
LPDA2
LPDIOR#
LPDIOW#
LPI ORDY
LIRQ14
7
8
9
10
11
A5
A6
A7
A8
A9
B5
B6
B7
B8
B9
18
17
16
15
14
LPDDREQ
LPDDACK#
/ON GND
/VBIAS
12
LBAYON_HDD# 1
-LVBIAS
13
+5V
+5V
LIDE_LED_1#
-LPDIAG
-IDERST
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0
C46
[email protected]_4
1 LBAYRST#
2
R40
*33_4
PDIOW#
PIORDY
IRQ14
PDA1
PDA0
PDCS1#
IDELED#
[email protected]
R37
[email protected]
R42
[email protected]_4
RBAYVCC
R35
[email protected]_4
3
LBAYON_HDD#
+5V
E: DEPOP R40 AND POP
R42 FOR SWAP BAY
RCSEL
2
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDDREQ
PDIOR#
+5V
R48
R46
[email protected]_8
[email protected]_8
R650
[email protected]
Q14
[email protected]
-PDIAG
PDA2
PDCS3#
8
7
6
5
RBAYVCC
R55
Z1422
+12V
[email protected]_4
Q59
1
2
3
Q15
<18> RBAYON#
[email protected]
2
RBAYON#
[email protected]
D
2
C82
C68
C64
C73
C75
C77
[email protected]/25V_8
1000P_4
150U/6.3V_7
.1U_4
.1U_4
.1U_4
PROJECT : ZL2
Quanta Computer Inc.
[email protected]
[email protected]_CONN
B: REMOVE PULLDOWN R50
1
F:ADD DISCHARGE CIRCUIT
RBAYVCC
PDDACK#
51
52
Q12
RB AYVCC
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
1
D
<19> RST_RBAY#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
3
B0
B1
B2
B3
B4
1
24
A0
A1
A2
A3
A4
4
PDDREQ
PDDACK#
-IDERST
IDELED#
-PDIAG
VCC
2
3
4
5
6
3
[email protected]_4
R39
PDA2
PDIOR#
PDIOW#
PIORDY
IRQ14
B: CHANGE FROM PDTC143TT
1
+5V
CN18
51
52
U3
D: C82 CHANGED FROM .1U/12V
2
3
Size
Document Number
Date:
Wednesday, December 22, 2004
R ev
F
HDD & CDROM & MEDIA BAY
4
Sheet
21
of
41
1
2
ID Select
: AD20
Interrupt Pin
: INTB# , INTC#
3
4
5
+5VSUS
+5VSUS
C338
.1U_4
2
+5VSUS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
2
PCLK_MINI
<18> REQ2#
<18,23,25> AD31
<18,23,25> AD29
<18,23,25> AD27
<18,23,25> AD25
<18,23,25> CBE3#
<18,23,25> AD23
<18,23,25> AD21
<18,23,25> AD19
<18,23,25> AD17
<18,23,25> CBE2#
<18,23,25> IRDY#
<18,23,25,29,31> CLKRUN#
<18,23,25> SERR#
<18,23,25> PERR#
<18,23,25> CBE1#
<18,23,25> AD14
<18,23,25> AD12
<18,23,25> AD10
<18,23,25> AD8
<18,23,25> AD7
<18,23,25> AD5
<18,23,25> AD3
+5V
<18,23,25> AD1
125
GND
+5V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
GND
D21 1
BAS316
<18,23> PIRQD#
RING
LAN2
LAN4
LAN6
LAN8
LED_YP
LED_YN
NC2
+5V
-INTA
R(IRQ4)
+3VAUX
-RST
+3V
-GNT
GND
-PME
(V)
AD30
+3V
AD28
AD26
AD24
IDSEL
GND
AD22
AD20
PAR
AD18
AD16
GND
-FRAME
-TRDY
-STOP
+3V
-DEVSEL
GND
AD15
AD13
AD11
GND
AD9
-CBE0
+3V
AD6
AD4
AD2
AD0
(V)
SERIRQ
GND
M66EN
SDOUT
SDIN1
-RESET
-MPCICACK
AGND
+SPK
-SPK
AGND
NC4
+3VAUX
126
<30> WIRELESS_LED
<29> RF_EN
TIP
LAN1
LAN3
LAN5
LAN7
LED_GP
LED_GN
NC1
-INTB
+3V
R(IRQ3)
GND
PCICLK
GND
-REQ
+3V
AD31
AD29
GND
AD27
AD25
(V)
-CBE3
AD23
GND
AD21
AD19
GND
AD17
-CBE2
-IRDY
+3V
-CLKRUN
-SERR
GND
-PERR
-CBE1
AD14
GND
AD12
AD10
GND
AD8
AD7
+3V
AD5
(V)
AD3
+5V
AD1
GND
SYNC
SDIN0
BITCLK
-AC_PRIMARY
BEEP
AGND
+MIC
-MIC
AGND
-RI
+5VA
+5V
6.34K/F
R187
6.34K/F
R582
6.34K/F
R180
R181
470K_4
560K
OC3# <19>
IN
ON#
OUT
1
GND
SET
3
USBPWR5
R189
R191
470K_4
560K
A
OC5# <19>
U47
+5VSUS
5
4
PCIRST# <18,23,24,25>
PME#
USBPWR3
R175
AAT4610AIGV-T1
+3V_S5
2
C871
.1U_4
GNT2# <18>
SET
2
+5VSUS
PIRQB# <18>
1
3
5
4
C352
.1U_4
+3V
GND
OUT
U16
CN22
+3V
IN
ON#
AAT4610AIGV-T1
+5VSUS
A
B
8
U15
5
4
: GNT1#
<2> PCLK_MINI
7
MINI-PCI
Request Indicate : REQ1#
Grant Indicate
6
IN
ON#
GND
USBPWR7
1
OUT
3
SET
R590
R588
470K_4
560K
OC7# <19>
AAT4610AIGV-T1
PME# <18,23,25>
AD30 <18,23,25>
R366
AD20
150_4
AD28 <18,23,25>
AD26 <18,23,25>
AD24 <18,23,25>
AD19
AD22 <18,23,25>
AD20 <18,23,25>
PAR <18,23,25>
AD18 <18,23,25>
AD16 <18,23,25>
FRAME# <18,23,25>
TRDY# <18,23,25>
STOP# <18,23,25>
F: CHANGE TO 100UF
L45
USBPWR3
DEVSEL# <18,23,25>
USB3POWER
B
BK2125HS330
AD15 <18,23,25>
AD13 <18,23,25>
AD11 <18,23,25>
C335
+
100U/6.3V-3528
AD9 <18,23,25>
CBE0# <18,23,25>
AD6
AD4
AD2
AD0
BOT
CN25
<18,23,25>
<18,23,25>
<18,23,25>
<18,23,25>
R165
R163
<19> USBP3<19> USBP3+
1
2
3
4
BUSBP3BUSBP3+
0
0
C311
C324
*22P_4
*22P_4
5
6
7
8
G4
+
P1
SYUIN_USB
SERIRQ <18,19,23,29,31>
4G
+
1P
L48
USBPWR5
USB5POWER
BK2125HS330
C353
+
100U/6.3V-3528
CN26
+3V_S5
R185
R183
<19> USBP5<19> USBP5+
1
2
3
4
BUSBP5BUSBP5+
0
0
C347
C350
*22P_4
*22P_4
5
6
7
8
SYUIN_USB
QTC_MINIPCI_H7.95
L80
USBPWR7
USB7POWER
BK2125HS330
C
C876
C
+
100U/6.3V-3528
CN33
PCLK_MINI R408
*22_4
C645
*10P_4
<19> USBP7<19> USBP7+
R584
R583
0
0
1
2
3
4
BUSBP7BUSBP7+
C882
C883
*22P_4
*22P_4
5
6
7
8
SYUIN_USB
+3V
+5V
C644
C615
C639
C598
C144
C655
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
.1U_4
B: REMOVE CHOKE PADS
+3VSUS
Q21
AO3403
CN6
D
<19> USBP0+
<19> USBP0-
R137
R138
0
0
BUSBP0+
BUSBP0<30> BT_LED
1
1
2
3
4
5
6
7
8
L40
BT_POWER
3
BK2125HS330
C269
10U/10V_8
D
2
BT_POWER
BT_POWERON# <29>
PTWO_MINIUSB
C283
C282
C284
*22P_4
*22P_4
.01U/16V_4
PROJECT : ZL2
Quanta Computer Inc.
Size
Document Number
Rev
F
MINI PCI,USB
Date:
1
2
3
4
5
6
7
Tuesday, December 21, 2004
22
Sheet
8
of
41
5
4
3
2
1
L77
2
+3V
U45-7
+3V
+3V
U45-1
W3
W10
VCCP
VCCP
U2
V1
V2
U3
W2
V3
U4
V4
V5
U5
R6
P6
W6
V6
U6
R7
V9
U9
R9
N9
V10
U10
R10
N10
V11
U11
R11
W12
V12
U12
N11
W13
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
CBE3#
CBE2#
CBE1#
CBE0#
W4
W7
W9
W11
C/BE3
C/BE2
C/BE1
C/BE0
<18,22,25> PAR
P9
<18,22,25> FRAME#
<18,22,25> TRDY#
<18,22,25> IRDY#
<18,22,25> STOP#
<18,22,25> DEVSEL#
V7
R8
U7
W8
N8
100/F_4 W5
C
<18,22,25>
<18,22,25>
<18,22,25>
<18,22,25>
AD17 R552
SUSPEND
N1
L6
N2
TPS_DATA
TPS_CLOCK
TPS_LATCH
SPKROUT
L7
PCMSPK
MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
N3
M5
P1
P2
P3
N5
R1
TPS_DATA <24>
TPS_CLOCK <24>
TPS_LATCH <24>
TPA0+
TPA0-
V15
W15
PCMSPK <27>
TPB0+
TPB0-
V14
W14
PHY_TEST_MA
R17
<18>
<18,22>
<18,25>
<18,19,22,29,31>
<18>
B: REMOVE RING FUNCTION
T202
M1
CLK48M
3
OUT
A
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
G7
G8
G13
H13
J9
J10
J11
K9
K10
K11
L8
L9
L10
L11
L12
M8
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
1U/10V
GND
TPBIAS0
TPA0P
TPA0N
TPB0P
TPB0N
R576
PHY_TEST_MA
CPS
M11
CPS
P15
CNA
R574
1394_AVDD
390K_4
T106
PCMSPK
VDD
4
OE
1
C864 12P_4
XO
R19 1394_XOUT
C756
R639
.01U/16V_4
Y8
24.576MHZ
100K_4
XI
E: ADD PULL-LOW
R18 1394_XIN
PC0 (TEST1)
PC1 (TEST2)
PC2 (TEST3)
R12
U13
V13
VSPLL
AGND
AGND
AGND
AGND
TPBIAS1
T17
N12
P14
U14
U16
U17
TPA1+
TPA1-
V18
W18
TPB1+
TPB1-
V16
W16
+3V
R532
C865 12P_4
C852
1U/10V
PCI7411GHK
22K
CN32
GRST#_7411
TPBIAS0
C791
L1394_TPB0L1394_TPA0L1394_TPA0+
L1394_TPB0+
C775
C839
C837
1U/10V
270P_4
.1U/50V
R570
R568
56.2/F_4
56.2/F_4
5
1
3
4
2
6
SUYIN_1394
*10P_4
B
+3V
C: DEPOP
U45-4
H8
H9
H10
H11
H12
J8
M7
J12
M9
M10
M12
K8
K12
N7
C851
.1U_4
+3V
PCI7411GHK
+3V
C845
.01U/16V_4
R1
CNA
CLKRUN# <18,22,25,29,31>
RI_OUT/PME
*22_4
C846
1000P_4
4.7K_4
FRAME
TRDY
IRDY
STOP
DEVSEL
IDSEL
PCLK
PRST
GRST
R536
C853
C
P5
R3
T1
PCLK_PCM
.1U_4
D
U19
U15
PAR
T3
C848
R0
6.34K/F
R1
TPBIAS0
TXC-48MHz-30PPM-15Pf
REQ
GNT
B
U18
LPC_PD# <19,31>
PIRQC#
PIRQD#
PIRQA#
SERIRQ
PLOCK#
2
PERR
SERR
0_4 PCM_PME#
DATA
CLOCK
LATCH
CLK_48
U1
T2
R534
R2
*BAS316
1
Y5
<18> REQ1#
<18> GNT1#
<18,22,25> PME#
D28
2
48MHz Clock
<18,22,25> PERR#
<18,22,25> SERR#
GRST#_7411
R0
R578
V8
U8
<2> PCLK_PCM
<18,22,24,25> PCIRST#
10K_4
1394_AVDD
2
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
R527
AVDD
AVDD
AVDD
AVDD
VDPLL
1
<18,22,25> AD[31..0]
D
1
BK2125HS330
R13
R14
V17
V19
T18
R600
R593
0_4
0_4
U45-6
+3V
R528
R529
*10K_4
*10K_4
U45-10
C784
C805
C806
C815
1000P_4
.01U/16V_4
.1U_4
1U/10V
A_USB_EN
E2
B_USB_EN
E1
W17
NC
TEST0
T19
VCO_LF
TPA0P
TPA0N
L1394_TPA0+
L1394_TPA0-
TPB0P
TPB0N
L1394_TPB0+
L1394_TPB0-
PCI7411GHK
+3V
PCI7411GHK
P12
M19
H1
1.5V
1.5V
H2
VR_EN
C776
C854
1U/10V
1U/10V
R518
R515
2.2K_4
2.2K_4
C849
C855
1000P_4
.01U/16V_4
.1U_4
1U/10V
U41
SCL
M3
SDA
M2
8
7
6
5
SCL_CARD
SDA_CARD
PCI7411GHK
PCI7411GHK
56.2/F_4
VCC
NC
SCL
SDA
A0
A1
A3
GND
R602
R603
0_4
0_4
B: REMOVE 1394CHOKE PADS
+3V
U45-5
C786
R565
56.2/F_4
IF EEPROM NOT USE ,
CLK & DAT PULL DOWN
+3V
C800
R566
1
2
3
4
R564
C836
5.1K/F
270P_4
C773
.1U_4
A
AT24C08AN-10SI-2.7
R526
R525
*220_4
*220_4
2ND SOURCE: AKE3L8S0A03
PROJECT : ZL2
Quanta Computer Inc.
Size
Document Number
R ev
F
PCMCIA CONTROLLER
Date:
5
4
3
2
Sheet
Tuesday, December 21, 2004
1
23
of
41
5
4
3
2
1
U45-8
MC_PWR_CTRL_0# F1
F2
A_VCC
U45-2
D19
K19
VCCB
VCCB
D
C
VCCA
VCCA
A5
A11
B_CAD31/B_D10
B_CAD30/B_D9
B_CAD29/B_D1
B_CAD28/B_D8
B_CAD27/B_D0
B_CAD26/B_A0
B_CAD25/B_A1
B_CAD24/B_A2
B_CAD23/B_A3
B_CAD22/B_A4
B_CAD21/B_A5
B_CAD20/B_A6
B_CAD19/B_A25
B_CAD18/B_A7
B_CAD17/B_A24
B_CAD16/B_A17
B_CAD15/B_IOWR
B_CAD14/B_A9
B_CAD13/B_IORD
B_CAD12/B_A11
B_CAD11/B_OE
B_CAD10/B_CE2
B_CAD9/B_A10
B_CAD8/B_D15
B_CAD7/B_D7
B_CAD6/B_D13
B_CAD5/B_D6
B_CAD4/B_D12
B_CAD3/B_D5
B_CAD2/B_D11
B_CAD1/B_D4
B_CAD0/B_D3
B15
A16
B16
A17
C16
D17
C19
D18
E17
E19
G15
F18
H14
H15
G17
K17
L13
K18
L15
L17
L18
L19
M17
M14
M15
N19
N18
N15
M13
P18
P17
P19
A_CAD31/A_D10
A_CAD30/A_D9
A_CAD29/A_D1
A_CAD28/A_D8
A_CAD27/A_D0
A_CAD26/A_A0
A_CAD25/A_A1
A_CAD24/A_A2
A_CAD23/A_A3
A_CAD22/A_A4
A_CAD21/A_A5
A_CAD20/A_A6
A_CAD19/A_A25
A_CAD18/A_A7
A_CAD17/A_A24
A_CAD16/A_A17
A_CAD15/A_IOWR
A_CAD14/A_A9
A_CAD13/A_IORD
A_CAD12/A_A11
A_CAD11/A_OE
A_CAD10/A_CE2
A_CAD9/A_A10
A_CAD8/A_D15
A_CAD7/A_D7
A_CAD6/A_D13
A_CAD5/A_D6
A_CAD4/A_D12
A_CAD3/A_D5
A_CAD2/A_D11
A_CAD1/A_D4
A_CAD0/A_D3
D1
C1
D3
C2
B1
B4
A4
E6
B5
C6
B6
G9
C7
B7
A7
A10
E11
G11
C11
B11
C12
B12
A12
E12
C13
F12
A13
C14
E13
A14
B14
E14
A_CAD31
A_CAD30
A_CAD29
A_CAD28
A_CAD27
A_CAD26
A_CAD25
A_CAD24
A_CAD23
A_CAD22
A_CAD21
A_CAD20
A_CAD19
A_CAD18
A_CAD17
A_CAD16
A_CAD15
A_CAD14
A_CAD13
A_CAD12
A_CAD11
A_CAD10
A_CAD9
A_CAD8
A_CAD7
A_CAD6
A_CAD5
A_CAD4
A_CAD3
A_CAD2
A_CAD1
A_CAD0
B_CC/BE3/B_REG
B_CC/BE2/B_A12
B_CC/BE1/B_A8
B_CC/BE0/B_CE1
F15
G18
K14
M18
A_CC/BE3/A_REG
A_CC/BE2/A_A12
A_CC/BE1/A_A8
A_CC/BE0/A_CE1
C5
F9
B10
G12
A_CC/BE3#
A_CC/BE2#
A_CC/BE1#
A_CC/BE0#
B_CPAR/B_A13
K13
A_CPAR/A_A13
G10
A_CPAR
A_CAD0
A_CAD1
A_CAD3
A_CAD5
A_CAD7
A_CC/BE0#
A_CAD9
A_CAD11
A_CAD12
A_CAD14
A_CC/BE1#
A_CPAR
A_CPERR#
A_CGNT#
A_CINT#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
GND1
SKTAAD0/D3
SKTAAD1/D4
SKTAD3/D5
SKTAD5/D6
SKTAAD7/D7
-SKTACBE0/CE1#
SKTAAD9/A10
SKTABAD11/OE#
SKTAAD12/A11
SKTAAD14/A9
-SKTACBE1/A8
SKTAPAR/A13
-SKTAPERR/A14
-SKTAGNT/WE#
-SKTAINT/RDY
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
SKTAPCLK/A16
-SKTAIRDY/A15
-SKTACBE2/A12
SKTAAD18/A7
SKTAAD20/A6
SKTAAD21/A5
SKTAAD22/A4
SKTAAD23/A3
SKTAAD24/A2
SKTAAD25/A1
SKTAAD26/A0
SKTAAD27/D0
SKTAAD29/D1
SKTARSVD/D2
-SKTACLKRUN/WP
GND2
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
GND3
-SKTACD1/CD1#
SKTAAD2/D11
SKTAD4/D12
SKTAAD6/D13
SKTARSVD/D14
SKTAAD8/D15
SKTAAD10/CE2#
-SKTAVS1/VS1#
SKTAAD13/IORD#
SKTAAD15/IOWR#
SKTAAD16/A17
-SKTRSVD/A18
-SKTALOCK/A19
-SKTASTOP/A20
-SKTADEVSEL/A21
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
-SKTATRDY/A22
-SKTAFRAME/A23
SKTAAD17/A24
SKTAAD19/A25
-SKTAVS2VS2#
-SKTARST/RESET
0SKTASERR/WAIT#
-SKTAREQ/INPACK#
-SKTACBE3/REG#
SKTAAUDIO/BVD2
-SKTASTSCHG/BVD1
SKTAAD28/D8
SKTAAD30/D9
SKTAAD31/D10
-SKTACD2/CD2#
GND4
UPPER PIN
A_CCLK1
A_CI RDY#
A_CC/BE2#
A_CAD18
A_CAD20
A_CAD21
A_CAD22
A_CAD23
A_CAD24
A_CAD25
A_CAD26
A_CAD27
A_CAD29
A_CRSVD/D2
A_CCLKRUN#
B_CFRAME/B_A23
B_CTRDY/B_A22
B_CIRDY/B_A15
B_CSTOP/B_A20
B_CDEVSL/B_A21
B_CBLOCK/B_A19
G19
H17
J13
J17
H19
J19
A_CFRAME/A_A23
A_CTRDY/A_A22
A_CIRDY/A_A15
A_CSTOP/A_A20
A_CDEVSL/A_A21
A_CBLOCK/A_A19
C8
A8
B8
A9
C9
E10
A_CFRAME#
A_CTRDY#
A_CI RDY#
A_CSTOP#
A_CDEVSEL#
A_CBLOCK#
B_CPERR/B_A14
B_CSERR/B_WAIT
J18
B18
A_CPERR/A_A14
A_CSERR/A_WAIT
F10
B3
A_CPERR#
A_CSERR#
B_CREQ/B_INPACK
B_CGNT/B_WE
E18
J15
A_CREQ/A_INPACK
A_CGNT/A_WE
E7
B9
A_CREQ#
A_CGNT#
B_CSTSCHG/B_BVD1(STSCHG/RI)
B_CCLKRUN/B_WP(IOIS16)
B_CCLK/B_A16
F14
A18
H18
A_CSTSCHG/A_BVD1(STSCHG/RI)
A_CCLKRUN/A_WP(IOIS16)
A_CCLK/A_A16
B2
C3
E9
B_CINT/B_READY(IREQ)
B19
A_CINT/A_READY(IREQ)
C4
A_CINT#
B_CRST/B_RESET
F17
A_CRST/A_RESET
A6
A_CRST#
B_CAUDIO/B_BVD2(SPKR)
C17
A_CAUDIO/A_BVD2(SPKR)
A2
A_CAUDIO
B_CCD1/B_CD1
B_CCD2/B_CD2
B_CVS1/B_VS1
B_CVS2/B_VS2
N13
B17
C18
F19
A_CCD1/A_CD1
A_CCD2/A_CD2
A_CVS1/A_VS1
A_CVS2/A_VS2
C15
E5
A3
E8
A_CCD1#
A_CCD2#
A_CVS1#
A_CVS2#
B_RSVD/B_D14
B_RSVD/B_D2
B_RSVD/B_A18
N17
A15
K15
A_RSVD/A_D14
A_RSVD/A_D2
A_RSVD/A_A18
B13
D2
C10
B
MC_PWR_CTRL_0
MC_PWR_CTRL_1
SD_CD
MS_CD
SM_CD
E3
F5
F6
MS_CLK/SD_CLK/SM_EL_WP
MS_BS/SD_CMD/SM_WE
MS_DATA3/SD_DAT3/SM_D3
MS_DATA2/SD_DAT2/SM_D2
MS_DATA1/SD_DAT1/SM_D1
MS_SDIO(DATA0)/SD_DAT0/SM_D0
G5
F3
H5
G3
G2
G1
SD_CLK/SM_RE/SC_GPIO1
SD_CMD/SM_ALE/SC_GPIO2
SD_DAT0/SM_D4/SC_GPIO6
SD_DAT1/SM_D5/SC_GPIO5
SD_DAT2/SM_D6/SC_GPIO4
SD_DAT3/SM_D7/SC_GPIO3
SD_WP/SM_CE
J5
J3
H3
J6
J1
J2
H7
SM_CLE/SC_GPIO0
SM_R/B/SC_RFU
SM_PHYS_WP/SC_FCB
J7
K1
K2
CN28
A_CCLK1
U45-3
R556
33/F_4
A_CCD1#
A_CAD2
A_CAD4
A_CAD6
A_RSVD/D14
A_CAD8
A_CAD10
A_CVS1#
A_CAD13
A_CAD15
A_CAD16
A_CRSVD/A18
A_CBLOCK#
A_CSTOP#
A_CDEVSEL#
SKTA/VCC1
SKTA/VCC2
17
51
A_VCC
SKTA/VPP1
SKTA/VPP2
18
52
AVPP
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
A_RSVD/D14
A_CRSVD/D2
A_CRSVD/A18
REVB
P/N&FT CHANGE C
MS_CLK_SD_CLK_SM_ELWPZ
[email protected]/F_4
D
SD_WP_SM_CEZ
P/N&FT CHANGE
3 IN1 CARD READER
VCC_XD
VCC_XD
NC
NC
NC
NC
85
86
87
88
CN11
MS_DATA3_SD_DAT3_SM_D3
MS_BS_SD_CMD_SM_WEZ
MS_CLK_SD_CLK_SM_ELWPZ
MS_DATA0_SD_DAT0_SM_D0
MS_DATA1_SD_DAT1_SM_D1
MS_DATA2_SD_DAT2_SM_D2
S D_CDZ
SD_WP_SM_CEZ
18
15
12
10
7
4
3
2
20
21
23
1
22
SD-1(DAT3)
SD-2(CMD)
SD-3(VSS)
SD-4(VCC)
SD-5(CLK)
SD-6(VSS)
SD-7(DAT0)
SD-8(DAT1)
SD-9(DAT2)
SD-CD1
SD-CD2(G)
SD-WP1
SD-WP-COM
24
25
26
NAIL1
NAIL2
NAIL3
(VSS)MS-1
(BS)MS-2
(DAT1)MS-3
(DAT0)MS-4
(DAT2)MS-5
(INS)MS-6
(DAT3)MS-7
(SCLK)MS-8
(VCC)MS-9
(VSS)MS-10
5
6
8
9
11
13
14
16
17
19
MS_BS_SD_CMD_SM_WEZ
MS_DATA1_SD_DAT1_SM_D1
MS_DATA0_SD_DAT0_SM_D0
MS_DATA2_SD_DAT2_SM_D2
MS_CDZ
MS_DATA3_SD_DAT3_SM_D3
MS_CLK_SD_CLK_SM_ELWPZ
C
[email protected]_DFHD23MS069
+3V
+3V
B
C922
CARDBUS SLOT
[email protected]_4
FOX_1CA4C5G2-TC
PCI7411GHK
R547
MS_CLK_SD_CLK_SM_ELWPZ_R
MS_BS_SD_CMD_SM_WEZ
MS_DATA3_SD_DAT3_SM_D3
MS_DATA2_SD_DAT2_SM_D2
MS_DATA1_SD_DAT1_SM_D1
MS_DATA0_SD_DAT0_SM_D0
PCI7411GHK
LOWER PIN
A_CTRDY#
A_CFRAME#
A_CAD17
A_CAD19
A_CVS2#
A_CRST#
A_CSERR#
A_CREQ#
A_CC/BE3#
A_CAUDIO
A_CSTSCHG
A_CAD28
A_CAD30
A_CAD31
A_CCD2#
A_CSTSCHG
A_CCLKRUN#
A_CCLK
S D_CDZ
MS_CDZ
R649
PCI7411GHK
[email protected]_4
+5V
Q45
+5V
U40
TPS_CLOCK
R523
T196
AVPP
A_VCC
*47K
5V_0
5V_2
5V_1
NC_3
DATA
NC_2
CLOCK
SHDN#
LATCH
12V_1
NC_0 BVPP/BVCORE
12V_0
BVCC1
AVPP/AVCORE BVCC0
AVCC0
NC_1
AVCC1
OC#
GND
3.3VIN0
RESET#
3.3VIN1
MC_PWR_CTRL_0#
24
23
22
21
20
19
18
17
16
15
14
13
GND
IN
IN
OUT
OUT
OUT
8
7
6
4
EN#
OUTNC
5
VCC_XD
[email protected]
+5V
U45-9
L5
C814
SC_PWR_CTRL
SC_CD
L2
SC_CLK
SC_RST
SC_VCC_5V
K5
K3
K7
SC_DATA
SC_OC
L1
L3
R542
+3V
TPS2220APWP
25
<18,22,23,25> PCIRST#
1
2
3
4
5
6
7
8
9
10
11
12
NC
TPS_DATA
TPS_CLOCK
TPS_LATCH
<23> TPS_DATA
<23> TPS_CLOCK
<23> TPS_LATCH
1
2
3
[email protected]/10V_8
0_4
F: CHANGE TO TPS2061
+5V_SCVCC
C798
CLOSE TO XD SOCKET
.1U_4
A
A
+3V
+5V
A_VCC
A_VCC
PCI7411GHK
C754
C755
C767
C760
C793
C816
C787
C817
C780
C769
C770
.1U_4
10U/10V_8
.1U_4
10U/10V_8
.01U/16V_4
.01U/16V_4
.1U_4
1000P_4
10U/10V_8
.01U/16V_4
10U/10V_8
PROJECT : ZL2
Quanta Computer Inc.
Size
Document Number
R ev
F
PCMCIA & 3 IN 1
Date:
5
4
3
2
Sheet
Tuesday, December 21, 2004
1
24
of
41
5
4
+3V_S5
FOR 10/100
R533
R535
[email protected]_8
[email protected]_8
3
2
1
+1.8V_1.2V_LAN
+3V
FOR GIGA
C807
C789
.01U/16V_4
.01U/16V_4
.01U/16V_4
D
AD[31..0]
<18,22,23> AD[31..0]
Voltage Rail
4401
5702
5705M
VDDIO_PCI
3V_S5
+3V
+3V
+3V_2.5V_LAN
3.3V
2.5V
2.5V
+1.8V_1.2V_LAN
1.8V
1.2V
1.2V
C
<18,22,23>
<18,22,23>
<18,22,23>
<18,22,23>
CBE0#
CBE1#
CBE2#
CBE3#
R504
+3V_S5
<18> REQ0#
<18> GNT0#
<18,22,23> FRAME#
<18,22,23> IRDY#
<18,22,23> DEVSEL#
<18,22,23> STOP#
<18,22,23> TRDY#
<18,22,23> PAR
<18,22,23> PERR#
<18,22,23> SERR#
<18,23> PIRQA#
<18,22,23,24> PCIRST#
<2> PCLK_LAN
AD24
4.7K_4
R530
0_4
LAN_PME#
<29> LAN_PME#
<18,22,23> PME#
R524
0_4
R554
R520
R522
R521
<18,22,23,29,31> CLKRUN#
<2,19,32,33> PCLK_SMB
<2,19,32,33> PDAT_SMB
N7
M7
P6
P5
N5
M5
P4
N4
P3
N3
N2
M1
M2
M3
L1
L2
K1
E3
D1
D2
D3
C1
B1
B2
B4
A5
B5
B6
C6
C7
A8
B8
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
VESD1
VESD2
VESD3
M4
L3
F3
C4
CBE_0#
CBE_1#
CBE_2#
CBE_3#
J12
C3
J3
F2
F1
H3
H1
G3
J1
J2
A2
H2
C2
A3
A4
A6
VAUXPRSNT
REQ#
GNT#
FRAME#
IRDY#
DEVSEL#
STOP#
TRDY#
PAR
PERR#
SERR#
INTA#
PCI_RST#
PCI_CLK
IDSEL
PME#
C8
H4
A10
C9
M11
[email protected]_4
*0_4
*0_4
[email protected]_4
BIASVDD
VDDIO
VDDIO
VDDIO
VDDIO
10mils
A14
A11
F11
K12
L12
C750
C758
.1U_4
.1U_4
.01U/16V_4
Y6
25MHZ
C778
1000P_4
P1
G2
A1
+3V_S5
CLK_LAN_X2
J14
N11
N10
L73
10mils
T199
LAN_PLLVDD2
C739
.1U_4
4.7U/6.3V-8
L8
M9
N8
C735
.1U_4
NC/TRD[3]NC/TRD[3]+
E14
E13
TX3N
TX3P
NC/TRD[2]NC/TRD[2]+
D14
D13
TX2N
TX2P
RDN/TRD[1]RDP/TRD[1]+
C14
C13
TX1N
TX1P
TX0N
TX0P
R500
RDAC
D10
LAN_RDAC
GPIO0
GPIO1
GPIO2
H12
K13
J13
EEWP#
R495
1K_4
SPROM_CLK/EECLK
SPROM_CS/EEDATA
M10
P10
EECLK
EEDATA
R512
R502
[email protected]_4
[email protected]_4
N9
P9
BCM_DI
BCM_DO
TRST#
TDI
TCK
TMS
TDO
D11
D12
C12
A12
B12
BCM_TRST#
REGIN33/REGSUP25
B11
1
NC/REGCTL25
C11
OUT33/REGSEN25
C10
15mm x 15mm
BGA196
T94
NC/REGCTL12
REGOUT18/REGSEN12
R498
R506
R497
R505
49.9/F_4
49.9/F_4
49.9/F_4
49.9/F_4
0_4
*0_4
L75
100MBPS# <26,33>
ACT# <26,33>
C753
@1.2K/F_1.27K
+3V_S5
TX0N <26>
TX0P <26>
+1.8V_1.2V_LAN
C
.1U_4
VCC
WP#
SCL
SDA
+3V_S5
U39
A0
A1
A3
GND
EEDATA
EECLK
BCM_DI
BCM_DO
1
2
3
4
1
2
3
4
CS
SK
DI
DO
8
7
6
5
VCC
NC
ORG
GND
C743
[email protected]
[email protected]
R517
TX1N <26>
TX1P <26>
BK1608HS330
U37
8
EEWP# 7
EECLK 6
EEDATA 5
C742
TX2N <26>
TX2P <26>
LAN_AVDDL
C: CHANGED FROM 1.24K OHM FOR 5788
4401 1.27K
R519
+3V_S5
TX3N <26>
TX3P <26>
[email protected]_4
1K_4
+3V_S5
Q42
[email protected]
C732
C729
10U/10V_8
.01U/16V_4
40mils
1G
B
C
4
B: CORRECT PIN B11, C11 SHORT
40mils [email protected] 0.564W
B9
Q43
[email protected]
B
+3V_2.5V_LAN
C730
C727
C728
C726
10U/10V_8
.01U/16V_4
.01U/16V_4
.01U/16V_4
E
NC/REGSUP12
R507
[email protected]/F_4
[email protected]/F_4
B: ALWAYS USE -100MBPS
[email protected]_4
SPROMDOUT/NC
SPROMDIN/NC
R499
.1U_4
10MBPS#
-100MBPS R510
1GBPS#
R509
ACT#
@BCM4401/5788
R508
[email protected]/F_4
[email protected]/F_4
LAN_AVDDL
G13
H13
G12
G14
B10
1
1G
B
A9
NC
NC
NC
NC
NC
NC
NC
VSS/NC
VSS/NC
L7
K11
K4
J11
J4
H10
M8
L14
L11
NC/CS#
EECLK_PXE/SCLK
EEDATA_PXE/SI
NC/SO
H11
E11
E10
G11
R531
0
P7
H14
.1U_4
F12
F13
NC/PLLVDD3
PLLVDD2
NC
NC
NC
B7
D4
D5
D6
D7
D8
D9
E2
E5
E6
E7
E8
E9
F5
F6
F7
F8
F9
F10
G4
G5
G6
G7
G8
G9
G10
H9
K2
L6
L9
M6
M12
M13
N1
N12
N13
C752
C736
+3V_2.5V_LAN
BK1608HS330
C757
TDN/TRD[0]TDP/TRD[0]+
XTALVDD
XTALI
XTALO
[email protected]_4
EPHY_AVDD/AVDDL
EPHY_AVDD/AVDDL
L76
LAN_AVDD
LINK_LED10#/LINKLEDB
LINK_LED100#/SPD100LEDB
COL_LED#/SPD1000LEDB
ACT_LED#/TRAFFICLEDB
M66EN
C737
+3V_2.5V_LAN
B14
B13
CSTSCHG
CLKRUN#
SMB_CLK
SMB_DATA
LOW_PWR
[email protected]_4
K14
L13
P11
A13
F14
C: CHANGED FROM 200OHM
BK1608HS330
C738
NC/VDDP
NC/VDDP
VDDP
NC/AVDD
NC/AVDD
VSS
VSS
VSS
VSS
VSS
VSS
NC/VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
ND/VSS
VSS
VSS
VSS
+1.8V_1.2V_LAN
27P_4
1
C751
27P_4
2
CLK_LAN_X1
C772
D
+3V_S5
C
+3V_2.5V_LAN
+3V_2.5V_LAN
PBY201209T-300Y-S
C749
C
4
2
F4
L74
BIASVDD
3
B
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
U42
2
B: CHANGE SIZE OF C796 FOR ME
3
C794
.01U/16V_4
E
C788
.1U_4
C
C808
.1U_4
E12
H5
H6
H7
H8
J5
J6
J7
J8
J9
J10
K5
K6
K7
K8
K9
K10
L5
L10
M14
N14
P8
P12
P13
P14
C809
.1U_4
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
C797
10U/6.3V
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
C796
A7
B3
C5
E1
E4
G1
K3
L4
N6
P2
VDDIO_LAN
40mils
[email protected] 0.803W
+1.8V_1.2V_LAN
C731
C723
C724
C725
10U/10V_8
.01U/16V_4
.01U/16V_4
.01U/16V_4
1.5" AWAY FROM CHIP
Use Philips BCP69-16, hfe=75~275
BCM4401 is for 10/100(1.8)
BCM5702 is for giga
BCM5705M is for giga cost-down(12)
A
A
R549
C799
*22_4
*10P_4
PCLK_LAN
B: CHANGE SIZE OF C741 FOR ME
5
+1.8V_1.2V_LAN
+3V_2.5V_LAN
C: DEPOP
PROJECT : ZL2
C741
C748
C763
C762
C765
C764
C747
C746
C782
C744
C785
C745
10U/6.3V
.1U_4
.1U_4
.1U_4
10U/10V_8
.1U_4
.1U_4
.1U_4
.01U/16V_4
.01U/16V_4
.01U/16V_4
.01U/16V_4
Quanta Computer Inc.
Size
Document Number
Date:
Tuesday, December 21, 2004
R ev
F
BCM4401/5705M LAN
4
3
2
Sheet
1
25
of
41
5
4
3
2
1
D
D
+3V_S5
+3V_2.5V_LAN
46
43
40
37
33
A1
2B1
3B1
42
41
<25> TX1P
8
A2
35
34
X-TX2P-PR
X-TX2N-PR
10
4B1
5B1
<25> TX1N
A3
X-TX3P-PR
X-TX3N-PR
<25> TX2P
15
6B1
7B1
29
28
<25> TX3P
21
A6
<25> TX3N
23
A7
TX0P_SYS
TX0N_SYS
2B2
3B2
39
38
TX1P_SYS
TX1N_SYS
4B2
5B2
32
31
TX2P_SYS
TX2N_SYS
6B2
7B2
26
25
TX3P_SYS
TX3N_SYS
NC
+3V_2.5V_LAN
TX2P_SYS
TX2N_SYS
7
8
9
+3V_2.5V_LAN
TX3P_SYS
TX3N_SYS
10
11
12
TCT2
TD2+
TD2-
MCT2
MX2+
MX2-
21
20
19
X-TX1P
X-TX1N
TCT3
TD3+
TD3-
MCT3
MX3+
MX3-
18
17
16
X-TX2P
X-TX2N
MCT4
MX4+
MX4-
15
14
13
TCT4
TD4+
TD4-
X-TX0P
X-TX0N
+3V_S5
R61
220_4
ACT#
<25,33> ACT#
X-TX3P
X-TX3N
10/100 DB0ZL1LAN04
R64
1G DB0ZL2LAN09
+3V_2.5V_LAN
C210
C184
C167
C133
R75
R87
12
LED1_YELP_Y
18
LED1_YELN_Y
X-TX3N
3
RX2-
X-TX3P
4
RX2+
X-TX1N
5
RX1-
NC
11
X-TX2N
6
TX2-
GND17
17
X-TX2P
7
TX2+
GND16
16
X-TX1P
8
RX1+
X-TX0N
9
TX1-
X-TX0P
10
TX1+
@24ST1285A-3B/24HST1041A-3B
14
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
SEL
3
5
7
9
11
13
16
18
20
22
27
30
[email protected]
45
44
0B2
1B2
4
5
6
.1U_4
A5
24
X-TX3P-PR <33>
X-TX3N-PR <33>
+3V_2.5V_LAN
TX1P_SYS
TX1N_SYS
24
23
22
.1U_4
17
0: A to B1
1: A to B2
X-TX2P-PR <33>
X-TX2N-PR <33>
A4
<25> TX2N
<33> DOCKIN#
X-TX1P-PR <33>
X-TX1N-PR <33>
CN20
MCT1
MX1+
MX1-
TCT1
TD1+
TD1-
[email protected]_4
A0
1
2
3
R99
[email protected]/F_4
4
+3V_2.5V_LAN
TX0P_SYS
TX0N_SYS
[email protected]/F_4
X-TX1P-PR
X-TX1N-PR
2
<25> TX0N
X-TX0P-PR <33>
X-TX0N-PR <33>
75/F_4
X-TX0P-PR
X-TX0N-PR
75/F_4
48
47
<25> TX0P
10/100
C
U6
0B1
1B1
[email protected]_4
VDD
VDD
VDD
VDD
VDD
U36
GND
GND
GND
GND
GND
1
6
12
19
36
C716
C717
[email protected]_4 [email protected]_4
2
C232
1500P/2KV
+3V_S5
<25,33> 100MBPS#
R103
220_4
100MBPS#
C
C238
.1U_4
C237
.01U/16V_4
C235
1500P/2KV
LED2_AMBER_A1
15
MGND
LED2_P_A2
1
LED2_GRNN_A3
MGND
RI NGL
13
TIPL
14
RING
TIP
B: DEPOP C210, C184, R87, R99 WHEN NO 1G LAN
FOXCONN_JM34F23-P2053
B
TX0P
R626 [email protected]_4
TX0P_SYS
1
2
TX0N
R627 [email protected]_4
TX0N_SYS
1
2
TX1P
R628 [email protected]_4
TX1P_SYS
1
2
TX1N
R629 [email protected]_4
TX1N_SYS
1
2
TX2P
R630 [email protected]_4
TX2P_SYS
1
2
TX2N
R631 [email protected]_4
TX2N_SYS
1
2
TX3P
R632 [email protected]_4
TX3P_SYS
1
2
TX3N
R633 [email protected]_4
TX3N_SYS
1
2
B
TIPL
C584
CN4
470pF/3KV_C
1
2
C583
FI-S2P-HF(JAE)
470pF/3KV_C
RI NGL
C: ADD CIRCUITS WHEN NO DOCKING
E: ADD FOR EMI REQUEST
A
A
PROJECT : ZL2
Quanta Computer Inc.
Size
Document Number
R ev
F
DVO CH7011A & RJ45-11 CON
Date:
5
4
3
2
Sheet
Tuesday, December 21, 2004
1
26
of
41
1
2
3
4
5
6
7
8
The AMC20463-004 modem is used for mother board family MBAMC20463-004.
+3VA
+3V
L78
+3VSUS
+3V
C811
R557
C841
C840
C860
C861
.1U_4
10U/10V_8
249K/F
10U/10V_8
.1U_4
1000P_4
.1U_4
RC_OSC1
B: CHANGE FROM 1K
DIB_DATAN
DIB_DATAP
R274
R275
0_4
0_4
3
4
PWRCLKP
PWRCLKN
7
8
11
12
RCOSC1
ID0#
ID1#
13
PC_BEEP
45
PC_BEEP
C910
4700P
LINE_IN_L
27
LINEINL
C512
4.7U/10V_8 LINEINL_AMP
LINE_IN_R
28
LI NEINR
C511
4.7U/10V_8 LINEINR_AMP
LINE_OUT_L
39
AOUTL
LINE_OUT_R
40
AOUTR
HP_OUT_L
42
HP_OUT_R
43
R573
R558
XTLO
CK28
33/F_4
CK26
24
R579
*1M_4
CK27
25
XTLI
2
C844
C856
22P_4
22P_4
6
1
GND
Y9
24.576MHZ
3K
B: CHANGE FROM 1U
29
MIC_1
C863
10U/10V_8
CD_L
C857
1000P_4
CN9
CD_IN_R
32
CD_R
C859
1000P_4
CD_IN_GND
31
CD_GND
C858
1000P_4
SPDIF
46
10
8
6
4
2
REF_FLT
VC_SCA
VREF_SCA
38
37
36
MBIAS/AVDD
34
SDATA_IN1
GPIO_4
GPIO_5
R577
R581
AOUTR <28>
30
SDATA_IN0
47
48
C: CHANGED FROM 10U
AOUTL <28>
MIC_IN
BITCLK
10K_4
<28> HPS_IN
B
MBIAS
MIC1
SPDIF_OUT <28,33>
DIB_DATAN
DIB_DATAP
9
7
5
3
1
PWRCLKP
PWRCLKN
MODEM_B2B
B
MBIAS
PWRCLKP
AGND
AGND
CD_SDIN0
<18> CD_SDIN0
BEEP
CD_IN_L
SmartAMC
AVSS_CLK
R575
AC_RESET#
SYNC
SDATA_OUT
35
41
BITCLK_C 22
33/F_4
SDIN0_A 21
33/F_4
20
PRIMARY_DN
26
<18> CD_BITCLKA
17
16
15
0_4
A
3
DSPKOUT
PWRCLKP
PWRCLKN
GNDC
GNDC
GNDC
R272
BEEP
4
2
B: ADD A 4700P FOR NOISE
DIB_DATAN
DIB_DATAP
2
9
19
<18> CD_RESET#
<18> CD_SYNC
<18> CD_SDOUTA
74AHCT1G86GW
1
<23> PCMSPK
<19> PCSPK
AUDGND
CHANGED FROM 33OHM
14
U43
C783
.1U_4
AVDD
AVDD
VDD_CLK
VDD
A
VDDC
VDDC
5
U46
+3V
BK2125HS330
5
C813
.01U/16V_4
33
44
C812
.1U_4
23
C838
.1U_4
18
10
C843
C862
C850
C842
C847
.1U_4
.1U_4
.1U_4
1U/10V
PWRCLKN
C908
150P_4
20468-31
AUDGND
AUDGND
C909
150P_4
AUDGND
MIC
LINE IN
CN34
R297
SYS_MIC
C
SYS_MIC_2 L57
BK1608LL121
1
2
6
3
4
5
SYS_MIC_1
INT_MIC
0_4
C524
R301
*.1U_4
*1K_4
CN36
7
LINEINR_SYS
8
FOXCONN_JACK_MIC
AUDGND
1
2
6
3
4
5
LINEINL_SYS
7
C
8
FOXCONN_JACK_LINEIN
AUDGND
AUDGND
CN12
AUDGND
AUDGND
R284
INT_MIC1
1
2
INT_MIC
R288
0_4
LINEINL_AMP
R285
L58
LINEINL_AMP1
INT_MIC
0_4
AUDGND
LINEINL_SYS
C515
*1K_4
BK1608LL121
C525
R293
[email protected]_4
R295
[email protected]_4
LINEINL_PR
LINEINL_PR <33>
R294
22P_4
*.1U_4
*0_4
AUDGND
AUDGND
B: CHANGE TO HIGH ACTIVE
AUDGND
AUDGND
R289
AVDD
LINEINR_AMP
SYS_MIC
C885
R634 [email protected]_4
1
2
0_4
.1U_4
LINEINR_SYS
BK1608LL121
C526
LINEINR_PR
LINEINR_PR <33>
MIC1
R296
C: ADD CIRCUITS WHEN NO DOCKING
D
L59
LINEINR_AMP1
*.1U_4
*0_4
D
U49
AUDGND
<33> PR_MIC
5
VCC
PR_MIC
1
IN_B1
SYS_MIC
3
IN_B0
SEL
6
PR_MIC_IN
COM
4
MIC1
GND
2
PR_MIC_IN <33>
R592
100K_4
[email protected]
AUDGND
1
2
AUDGND
AUDGND
3
AUDGND
C: CHANGE FROM 4.7K
PROJECT : ZL2
SEL
FUNCTION
LOW
IN_B0
HIGH
IN_B1
4
Quanta Computer Inc.
Size
Document Number
Date:
Tuesday, December 21, 2004
R ev
F
AUDIO
5
6
7
Sheet
27
8
of
41
5
4
3
2
AVDD
AVDD
HP
AUDGND
MODE MODE
C875
C866
R587
C874
.1U_4
5
SPKL
SPKR
27
NC
GAIN1
24
GAIN_SEL
OUTL+
OUTLOUTROUTR+
4
5
17
18
INSPKL+
INSPKLINSPKRINSPKR+
AUDGND
23
GND
22
/SHDN
6
3
16
19
21
PVDDL
PGNDL
PVDDR
PGNDR
VBIAS
8
5
6
7
8
*BAS316
+
2
-
C505
C517
.1U/16V_4
10U/10V_8
HPSENCE_PR
*10 4
3
C888
C504
R292
R302
0_8
0_8
U50
SN74AHC1G32DCKR
HPSENCE_PR <33>
100K
AVDD
AUDGNDAUDGND
AVDD
AUDGND
C890
.1U_4
C886
C884
C868
C869
.1U_4
10U/10V_8
.1U_4
10U/10V_8
MAX9755AETI
AUDGND
AUDGND
1U/10V
AUDGND
3
2
1
*1U/10V
R278
AUDGND
B: CHANGE EZ4'S HEADPHONE SOURCE
TO AUDIO
*100K
SPEAKER CON.
AVDD
AUDGND
C
5
+
6
-
D
R594
1U/10V
AUDGND
Q27
*AO4414
*100P_4
*3.3M
Q28
*2N7002
2
BAS316
C877
R277
1
U17A
*LM358ADR
4
3
C513
1
2
D14
*100K
MUTE
2
BAS316
+12V
1
R276
1
<29> AMP_MUTE#
+5V
26
+5V
10
7
14
13
R591
10K_4
C1N
CPVDD
HPL
HPR
AUDGND
SPKPLG
2
HPS_PLUGIN 4
1
1
NC
AVDD
D32
2
INR
100K
AMP POWER
100K
D33
HPS
20
HPS
1
R280
AUDGND
AUDGND
28
R281 1K_4
VSS
1U/10V
INL
12
C873
<27> AOUTR
1K_4
2
CPVSS
D
1U/10V
11
C867
<27> AOUTL
R589
R279
U48
15
8
AUDGND
100K
R283 1K_4
25
0
VDD
9
R601
.1U_4
1U/10V
R282
HPVDD
C1P
1
*1K_4
GAIN1
CPGND
3
GND
10.5
9
0
3
GAIN1 SPKR
1
AVDD
INSPKR+ L56
INSPKR- L55
C514
C518
C516
.1U/16V_4
10U/10V_8
10U/10V_8
7
U17B
*LM358ADR
AUDGND
R312
0
R313
0
R311
0
INSPKR+N
INSPKR-N
BK1608LL121
BK1608LL121
C878
C879
*.1U_4
*.1U_4
CN13
4
3
2
1
INSPKL+
INSPKL-
AUDGND
L54
L53
C881
C880
*.1U_4
*.1U_4
AUDGND
AUDGND
INSPKL+N
INSPKL-N
BK1608LL121
BK1608LL121
C
REV:B MODIFY FOR EMI
R586
R585
C887
C870
6
5
0
0
.1U_4
1000P_4
R_L_SPEAKERS
AUDGND
D: CHANGE TO SPDIF CONN
SPKL
C519
C529
C520
C528
C530
C527
B
.01U/16V_4
1000P_4
.01U/16V_4
1000P_4
100P_4
100P_4
R290
R303
SPKL1
L61
BK1608LL121
SPKL_SYS
0
CN35
SPKP LG-
470_4
R291
0
R299
C522
R287
0
1K_4
470P_4
AUDGND
AUDGND
LINE OUT&SPDIF
SPKL_SYS <33>
AUDGND
SPKR1 L60
SPKR R300
470_4
BK1608LL121
AUDGND
AUDGND
SPKR_SYS
+5V
SPKL_SYS
SPKR_SYS
5
4
2
3
1
SPDIF
8
7
9
C916
SPKR_SYS <33>
C523
6
11
B
10
Drive
IC
LED
.1U_4
FOX=2F11381-TJ1-TR
R298
AUDGND
470P_4
1K_4
+3V
AUDGND
+5V
AUDGND
R646
B: CHANGE EZ4'S HEADPHONE SOURCE
R647
10K_4
AVDD
2
1K_4
SPKPLG
1
<27,33> SPDIF_OUT
R637
Q54
2N7002
2
3
SPKP LG-
2
SPKP LG-
Q58
DTC144EU
1
B: ADD SPRING FOR MODEM CABLE
*.1U_4
MMBT3904
100K
3
E: REMOVE PAD26, AND PAD35 CHANGE LOCATION
C917
3
Q57
F: RESTORE PAD26 FOR EMI REQUEST
A
3
1
PAD34
1
PAD35
1
PAD36
1
PAD37
1
AUDGND
1
1
*EMIPAD142X91
2
PAD26
D34
DA204U
EMIPAD142X91 EMIPAD142X91 *EMIPAD142X91 EMIPAD142X91
+3V
F:TURN OFF LED WHEN NO PLUG
R555
F: NEW ADD FOR ESD
100K
CLOSE TO CN35
<27> HPS_IN
HPS_IN
4
PROJECT : ZL2
D31
2
1
Quanta Computer Inc.
HPS_PLUGIN
Size
Document Number
Date:
Tuesday, December 21, 2004
BAS316
+5V
5
A
3
2
R ev
F
AUDIO AMP
Sheet
1
28
of
41
5
4
3
2
REF3V
CN7
TX_551
3V_ALWAYS
+3V
470K_4
PCLK_591
LFRAME#/FWH4
LA D0/FWH0
LA D1/FWH1
LA D2/FWH2
LA D3/FWH3
PCLK_591
KBSMI#
<19> KBSMI#
R411
*22_4
S CI#
<19> SCI#
C: DEPOP
C
1
3VH_591
Q16
*PDTA124EU
H OLD#
1
3VH_591
Q17
*PDTA124EU
+5V
2
2
D23
2
D22
1
BAS316
1
BAS316
1
BAS316
1
BAS316
3
H OLD#
31
IOPD3/ECSCI
5
6
M Y0
M Y1
M Y2
M Y3
M Y4
M Y5
M Y6
M Y7
M Y8
M Y9
MY10
MY11
MY12
MY13
MY14
MY15
49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15
Host interface
AD Input
DA0
DA1
DA2
DA3
DA output
TINT
TCK
TDO
TDI
TMS
110
111
114
115
116
117
118
119
PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7
IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7
PWM
or PORTA
1
Q18
*PDTA124EU
3
2
H OLD#
<33> MSCLK
<33> MSDATA
<33> KPCLK
<33> KPDATA
<30> TBCLK
<30> TBDATA
<30> CAPSLED#
<30> NUMLED#
TBCLK
TBDATA
CAPSLED#
NUMLED#
R172
20M
1
2
158
32KX1/32KCLKOUT
IOPE4/SWIN
IOPE5/EXWINT40
IOPE6/LPCPD/EXWIN45
IOPE7/CLKRUN/EXWINT46
2
44
24
25
N BSWON#
SUSB#
LPCPD#
CLK RUN#
IOPH0/A0/ENV0
IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPH6/A6
IOPH7/A7
124
125
126
127
128
131
132
133
ENV0
ENV1
B ADDR0
B ADDR1
TRIS
SHBM
A6
A7
IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7
138
139
140
141
144
145
146
147
D0
D1
D2
D3
D4
D5
D6
D7
591_32KX2
160
32KX2
IOPJ0/RD
IOPJ1/WR0
150
151
RD#
W R#
SELIO
152
PORTI
PORTJ-1
1
2
H OLD#
121K/F
Y3
C337
10P_4
62
63
69
70
75
76
T65
148
149
155
156
3
4
27
28
IOPM0/D8
IOPM1/D9
IOPM2/D10
IOPM3/D11
IOPM4/D12
IOPM5/D13
IOPM6/D14
IOPM7/D15
173
174
47
SEL0
SEL1
CLK
<30> BATLED0#
<30> BATLED1#
<22> RF_EN
<22> BT_POWERON#
<19> RSMRST#
BT_POWERON#
VR ON
MAINON
SUSON
S5_ON
<34> VRON
<33,35,36,37,38> MAINON
<33,35,36> SUSON
<35,37> S5_ON
PORTK
PORTM
PORTL
17
35
46
122
159
167
137
PC97551
IOPD4
IOPD5
IOPD6
IOPD7
PORTD-2
PORTJ-2
GND1
GND2
GND3
GND4
GND5
GND6
GND7
C S#
IOPJ2/BST0
IOPJ3/BST1
IOPJ4/BST2
IOPJ5/PFS
IOPJ6/PLI
IOPJ7/BRKL_RSTO
41
42
54
55
*10K_4
LPCPD# R140
10K_4
SHBM
10K_4
R446
SHBM=1: Enable shared memory with host BIOS
+3V
CC-SET <39>
CV-SET <39>
CONTRAST <16>
VFAN <30>
BADDR1-0
0 0
0 1
1 0
1 1
R160
AMP_MUTE# <28>
BT1# <30>
BT2# <30>
BT3# <30>
BT4# <30>
I/O Address
Index
Data
2F
2E
4E
4F
(HCFGBAH, HCFGBAL)(HCFGBAH, HCFGBAL)+1
Reserved
A8
A9
A10
A11
A12
A13
A14
A15
IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19
IOPL4/WR1
113
112
104
103
48
A16
A17
A18
4.7K_4
MBDATA
R149
4.7K_4
WIRELESS_SW#
R365
4.7K_4
BLUETOOTH_SW#
R364
+3V
REFON <39>
LID591# <16,19>
FANSIG
EC_FPBACK#
MAX6648_AL
PWROK_1 R431
143
142
135
134
130
129
121
120
R145
MAX6648_AL# <3>
2N7002
SUSLED# <30>
MBCLK <3,40>
MBDATA <3,40>
PLTRST# <6,11,15,18,21,31,32,33>
MBCLK
MBDATA
PLTRST#
IOPK0/A8
IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12
IOPK5/A13/BE0
IOPK6/A14/BE1
IOPK7/A15/CBRD
2
PWRLED# <30>
TX_551
M/A#
CELL-SET
D/ C#
BL/C#
3V_ALWAYS
MBCLK
Q22
1
FANSIG <30>
EC_FPBACK# <16>
0_4
C
4.7K_4
D24
2
3V_ALWAYS
DNBSWON# <19>
BAS316
R141
ICH_PWROK <19>
1K_4
REV:C MODIFY
NBSWON# <30>
If Pin 24 is not pull-high,
System will not able to boot.
CLKRUN# <18,22,23,25,31>
N BSWON#
2
Q20
PDTA124EU
D20
SUSB#
<19> SUSB#
2
1 BAS316
2
1 BAS316
D19
A CIN
<39> ACIN
H OLD#
B
R130
100K_4
U24
M/A# <40>
CELL-SET <39,40>
D/C# <39,40>
BL/C# <40>
C S#
RD#
W R#
12
11
10
9
8
7
6
5
27
26
23
25
4
28
29
3
2
30
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
22
24
31
CE#
OE#
WE#
13
14
15
17
18
19
20
21
D0
D1
D2
D3
D4
D5
D6
D7
VPP
1
A18
VCC
32
GND
16
D0
D1
D2
D3
D4
D5
D6
D7
3V_ALWAYS
C48
.1U_4
PLCC32
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
C326
10P_4
T119
T117
AGND
C: CHANGED FROM IOPL3,4
*10K_4
B ADDR1R445
BIU configuration should match flash speed used
11
12
20
21
85
86
91
92
97
98
4
3
CHANGED FROM PR_INSERT# <21> -RBAYINS
<19,33> PR_STS
-R BAYINS
PR_STS
96
32.768KHZ
WIRELESS_SW# <30>
BLUETOOTH_SW# <30>
SUSC# <19>
BT1#
BT2#
BT3#
BT4#
IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21
IOPD2/EXWINT24
PS2 interface
10K_4
10K_4
10K_4
H OLD#
A CIN
591_PME#
PORTH
R443
B ADDR0R444
MAX6648_AL
26
29
30
PORTD-1
591_32KX1
32
33
36
37
38
39
40
43
REF ON
LID591#
R179
3
BT4#
Q19
*PDTA124EU
CC-SET
CV-SET
CONTRAST
V FAN
168
169
170
171
172
175
176
1
3VH_591
B
99
100
101
102
R370
TEMP_MBAT <40>
TEMP_ABAT <40>
HWPG <34,35,36,37,38>
IOPC0
IOPC1/SCL2
IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT
PORTC
PORTE
TEMP_MBAT
TEMP_ABAT
T120
T118
WIRELESS_SW#
BLUETOOTH_SW#
SUSC#
153
154
162
163
164
165
PORTB
JTAG debug port
81
82
83
84
87
88
89
90
93
94
IOPB0/URXD
IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1
IOPB4/SDA1
IOPB7/RING/PFAIL
Key matrix scan
7
5
3
1
105
106
107
108
109
ENV1
+3V
AD0
AD1
AD2
AD3
IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7
DP/AD8
DN/AD9
GA20/IOPB5
KBRST/IOPB6
KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7
8P4R-4.7K
BT3#
SERIRQ
LDRQ
LFRAME
LAD0
LAD1
LAD2
LAD3
LCLK
LREST
SMI
PWUREQ
71
72
73
74
77
78
79
80
RN113
3VH_591
7
8
9
15
14
13
10
18
19
22
23
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
8
6
4
2
BT2#
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
<30> MY0
<30> MY1
<30> MY2
<30> MY3
<30> MY4
<30> MY5
<30> MY6
<30> MY7
<30> MY8
<30> MY9
<30> MY10
<30> MY11
<30> MY12
<30> MY13
<30> MY14
<30> MY15
2
3
BT1#
RC IN#
<18> RCIN#
<30>
<30>
<30>
<30>
<30>
<30>
<30>
<30>
2
D13
GATEA20
<18> GATEA20
C647
*10P_4
2
D12
D
3VH_591
VDD
SERIRQ
<18,31> LFRAME#/FWH4
<18,31> LAD0/FWH0
<18,31> LAD1/FWH1
<18,31> LAD2/FWH2
<18,31> LAD3/FWH3
<2> PCLK_591
C677
*.1U_4
1
U30
R418
C630
.1U_4
3
C648
.1U_4
<18,19,22,23,31> SERIRQ
.1U_4
3V_ALWAYS
AT24C08AN
3V_ALWAYS
C614
.1U_4
3
8
4
C631
.1U_4
Should have a 0.1uF capacitor close to every
GND-VCC pair + one larger cap on the supply.
591_AVCC
C276
.1U_4
C654
.1U_4
161
VCC
GND
0_4
C675
.1U_4
VBAT
WP
1
2
3
95
7
A0
A1
A2
AVCC
SCL
SDA
34
45
123
136
157
166
6
5
C676
10U/10V_8
Q39
R450
3V_ALWAYS
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
MBCLK
MBDATA
C680
*2N7002
16
D
R447
*0_4
2
<39,40> REFP
*551_DEBUG
3V_ALWAYS
3V_ALWAYS
1
1
52
63
4
VCCRTC
3
3V_ALWAYS
U14
1
no use
1
LDRQ#(pin 8) internal is
A
A
C643
1U/10V
FOR 97551 ONLY
+3V_S5
+3V_S5
3V_ALWAYS
PROJECT : ZL2
R371
2
R368
*4.7K_4
INTERNAL PULLUP IN SB
<25> LAN_PME#
Quanta Computer Inc.
*4.7K_4
1
Q35
PDTC143TT
3
Size
591_PME#
5
4
3
2
Document Number
Rev
F
97551 & FLASH
Date:
Tuesday, December 21, 2004
1
Sheet
29
of
41
5
4
CA5
RP4
1
2
3
4
5
MY3
MY2
MY1
MY0
MY1
MY2
MX4
MY3
1
3
5
7
220PX4
2
4
6
8
CA6
220PX4
MY7
2
MY6
4
MY5
6
MY4
8
1
3
5
7
+12V
MY12
MY13
MY14
MY15
RP6
3V_ALWAYS
MY11
MY10
MY9
MY8
1
3
5
7
CA8
10KX8
MX1
MY10
MY11
MX0
RP5
MX4
MX5
MX6
MX7
10
9
8
7
6
1
2
3
4
5
7
+5V
D: CHANGED FROM 10K
R338
220PX4
2
4
6
8
CA7
220PX4
MX2
2
MY9
4
MX3
6
MY8
8
1
3
5
7
3
<29> VFAN
2
R47
+
MX3
MX2
MX1
MX0
1
3
5
7
220PX4
2
4
6
8
CA4
220PX4
MY0
2
MX5
4
MX6
6
MX7
8
1
3
5
7
+5VFAN
1
-
Q33
*AO6402
Q13
AO6402
3
+3V
MAX6648_OV# <3>
3
10
R44
U26A
LM358ADR
2
+12V
R49
C575
.1U/25V_8
<29> FANSIG
30 MIL
CN19
FAN_PWR
3.9K/F
D
10K_4
Q34
*2N7002
1
MY12
MY13
MY14
MY15
-
E: DEPOP R338, Q33, Q34
CA9
1
2
3
4
5
+
6
*100K_4
10KX8
10
9
8
7
6
5
3
10
9
8
7
6
6
5
2
1
MY4
MY5
MY6
MY7
1
2
5
6
MX7
MX6
MX5
MY0
MY1
MY2
MX4
MY3
MY4
MY5
MY6
MY7
MY8
MX3
MY9
MX2
MX1
MY10
MY11
MX0
MY12
MY13
MY14
MY15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
1
+12V
U26B
LM358ADR
4
D
MY15
MY14
MY13
MY12
MY11
MY10
MY9
MY8
MY7
MY6
MY5
MY4
MY3
MX7
MX6
MY2
MX5
MX4
MX3
MX2
MY1
MY0
MX1
MX0
MY15
MY14
MY13
MY12
MY11
MY10
MY9
MY8
MY7
MY6
MY5
MY4
MY3
MX7
MX6
MY2
MX5
MX4
MX3
MX2
MY1
MY0
MX1
MX0
2
FAN CONTROL
4
CN5
<29>
<29>
<29>
<29>
<29>
<29>
<29>
<29>
<29>
<29>
<29>
<29>
<29>
<29>
<29>
<29>
<29>
<29>
<29>
<29>
<29>
<29>
<29>
<29>
3
3V_ALWAYS
P/N&FT CHANGE
8
REVB
4
INT K/B
1
2
3
R52
C59
4
5
FAN
3K
10U/10V_8
10KX8
PTWO_KB
TOUCH PAD
20 MIL
B MODIFY
C314
.1U_4
BK2125HS330
C
R155
10K_4
10K_4
LED3
REVB
R609
330_4
-PWRLED
R610
330_4
-SUSLED
LED_G/Y_LTST-C155GYKT
TP_DATA
TP_CLK
LZA10-2ACB104MT
C316
C317
*.1U_4
*.1U_4
<29> NBSWON#
1
2
3
4
5
6
EMAIL_LED
IDE_LED
CAPSLED
NUMLED
NBSWON#
14
12
10
8
6
4
2
C40
PTWO_TOUCHPAD
R611
330_4
-BATLED0
R612
330_4
-BATLED1
PWRLED2 R17
BT1#
BT2#
BT3#
BT4#
13
11
9
7
5
3
1
200
BT1#
BT2#
BT3#
BT4#
C
<29>
<29>
<29>
<29>
CA2
QTC_LED_14P
*.1U_4
LED2
CN3
*220PX4
8
6
4
2
LZA10-2ACB104MT
L41
L42
+3V
*220PX4
SUSLED# <29>
P/N&FT CHANGE
CN8
<29> TBDATA
<29> TBCLK
CA3
PWRLED# <29>
8
6
4
2
R154
B: CHANGE FROM +3VSUS
3V_ALWAYS
7
5
3
1
+5V_TP
7
5
3
1
L43
+5V
BATLED0# <29>
BATLED1# <29>
LED_G/Y_LTST-C155GYKT
WIRELESS_SW#
<29> WIRELESS_SW#
SW3
2
1
3
4
MISAKI_SWITCH_WL
+5V
+3V
SW4
BLUETOOTH_SW#
2
<29> BLUETOOTH_SW#
R23
+3V
1
3
4
MISAKI_SWITCH_BT
R31
B CHANGE LED RESISTORS FROM 200 TO 680 OHM
330_4
IDE_LED
3
10K_4
R32
B
330_4
<21> IDELED#
IDELED#
2N7002
Q8
2
B
<29> NUMLED#
NUMLED#
1
3
NUMLED
+3V
2N7002
Q9
2
<22> WIRELESS_LED
R223
R309
3
1
[email protected]_4
LED4
330_4
1
<18> -HDD0_LED
Q7
[email protected]
2
1
+3V
2
LED_Y_LTST-C190KFKT
<22> BT_LED
+3V
R310
LED5
330_4
1
R33
2
R34
330_4
A
LED_B_LTST-C190TBKT
330_4
EMAIL_LED
3
3
CAPSLED
2N7002
Q11
EMAIL_LED# 2
<29> CAPSLED#
PROJECT : ZL2
2N7002
Q10
CAPSLED# 2
Quanta Computer Inc.
1
1
<19> EMAIL_LED#
Size
Document Number
Date:
Tuesday, December 21, 2004
R ev
F
T/P,FAN,SWITCH,LED,K/B
5
4
3
2
Sheet
1
30
of
41
A
5
4
3
2
1
<18,29> LAD0/FWH0
*22_4
<18,29> LAD1/FWH1
<18,29> LAD2/FWH2
<18,29> LAD3/FWH3
<2> PCLK_SIO
+3V
10K_4
<6,11,15,18,21,29,32,33> PLTRST#
<18,19,22,23,29> SERIRQ
D18
LPC_PD#
<18> LPC_DRQ0#
<18,29> LFRAME#/FWH4
R333
<19,23> LPC_PD#
1
2
*BAS316
<18,22,23,25,29> CLKRUN#
LAD0/FWH0
C37
C39
.1U_4
10U/10V_8
45
32
11
C38
.1U_4
VDD
VDD
1
NC
2
17
R19
PCLK_SIO
*10P_4
VDD
C35
NC
D
NC
NC
U2
18
+3V
STRAP PINS
42
LAD0
GPIO00
15
LAD1/FWH1
46
LAD1
GPIO01
16
LAD2/FWH2
51
LAD2
GPIO02
19
LAD3/FWH3
53
LAD3
GPIO20
23
PCLK_SIO
33
LCLK
GPIO03
20
LPC_DRQ0#
22
LDRQ/XOR_OUT
GPIO04
21
LFRAME#/FWH4
38
LFRAME
GPIO05
40
PLTRST#
35
LRESET
GPIO06
7
SERIRQ
36
SERIRQ
GPIO07
41
SUS_STAT_3V#
29
LPCPD/GPIO21
CLKRUN#
27
CLKRUN/GPO22
CLKIN
58
INIT#
56
INIT
ERROR#
54
ERR
NS PC87383
+5V
14M_SIO
D
MDTR1#
R22
*10K_4
MRTS1#
R29
*10K_4
MTXD1
R30
*10K_4
14M_SIO <2>
RN4
ACK#
28
ACK/GPO24
STRB#
14
STB_WRITE/TEST
SLIN#
55
SLIN_ASTRB
CTS1/GPIO11
3
MCTS1# <33>
B: INSTALL
SLCT
24
SLCT
DCD1/GPIO16
59
MDCD1# <33>
D: ADD EMI SOLUTION
E: C41 CHANGE TO 6p (CH00606TB04)
SLIN#
R15
4.7K_4
PE
R26
4.7K_4
INIT#
R27
4.7K_4
AFD#
R18
4.7K_4
STRB#
R13
4.7K_4
ACK#
R14
4.7K_4
B USY
C41
6P_4
PE
25
PE
DSR1/GPIO15
60
MDSR1# <33>
30
PD7/PGIO23
RTS1/GPIO13
62
MRTS1# <33>
PD6
34
PD6
SIN1/GPIO14
61
MRXD1 <33>
PD5
37
PD5
SOUT1/GPIO12
63
MTXD1 <33>
PD4
39
PD4
RI1/GPIO10
5
MRI1 <33>
PD3
6
PD3
DTR1_BOUT1/BADDR
4
MDTR1# <33>
PD2
43
PD2
PD1
50
PD1
PD0
52
ERROR#
4.7K_4
IRRX2_IRSL0/GPIO17
PD7
SLCT
R25
TXD
RXD
SD
GND
PD0
<33> PD[0..7]
PC87383
T = 20mil
6
7
LED_C
LED_A
2
1
C531
C532
C533
.1U_4
10U/10V_8
10U/10V_8
C
VISHAY_TFDU6102_8P
+5V
T = 20mil
R306
5.6_1206_5%
R307
5.6_1206_5%
C521
10U/10V_8
B: REMOVE C889
NC
PE
3
4
5
8
VCC
MODE
B
64
B
4.7K_4
<33>
IRMODE
IRTXOUT
IRRX
IRMODE
AFD_DSTRB/TRIS
NC
R24
4.7K_4
<33> SLCT
PD3
PD7
10
U51
R28
18nH_4
BUSY_WAIT
49
R16
4.7K_4
4.7K_4
+3V
+3V
10K_4
57
NC
<33> SLIN#
4P2R_4.7K
R21
R12
9
IRTXOUT
26
48
<33> ACK#
<33> STRB#
IRRX
AFD#
NC
4P2R_4.7K
RN2
3
1
8
B USY
47
PD5
PD6
<33> AFD#
VCORF
4
2
<33> BUSY
13
PD2
PD4
VSS
4
2
VSS
3
1
IRTX
VSS
C
IRRX1
44
<33> INIT#
<33> ERROR#
4P2R_4.7K
RN3
R20
31
PD0
PD1
4
2
12
3
1
C36
C891
C892
C893
C894
C895
C896
C897
C898
C899
C900
C901
C902
C903
C904
C905
C906
C907
*180P_4
*180P_4
*180P_4
*180P_4
*180P_4
*180P_4
*180P_4
*180P_4
*180P_4
*180P_4
*180P_4
*180P_4
*180P_4
*180P_4
*180P_4
*180P_4
*180P_4
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
ERROR#
SLIN#
PE
INIT#
AFD#
STRB#
ACK#
B USY
.1U_4
A
A
PROJECT : ZL2
Quanta Computer Inc.
Size
Document Number
Date:
Tuesday, December 21, 2004
R ev
F
EZ PORT & SIO (87383)
5
4
3
2
Sheet
1
31
of
41
5
4
3
2
1
+3V_S5
CN10
E: REVERSE RX AND TX
U44
[email protected]
1.5VIN1
1.5VIN2
1.5VOUT1
1.5VOUT2
10
12
+NEW_1.5V
4
6
3.3V1
3.3V2
3.3VOUT1
3.3VOUT2
5
7
+NEW_3V
1
AUX_IN
AUX_OUT
16
+NEW_3VAUX
CPUSB#
CPPE#
CPERST#
14
15
3
CPUSB#
CPPE#
PERST#
+1.5V
11
13
+3V
D
+3V_S5
2
<6,11,15,18,21,29,31,33> PLTRST#
+12V
RST#
<19> PCIE_TXP0
<19> PCIE_TXN0
R548
[email protected]_4
R537
[email protected]_4
CLK32K
GND1
[email protected]_4
[email protected]_4
C431
C429
<19> PCIE_RXP0
<19> PCIE_RXN0
<2> CLK_PCIE_NEWC
<2> CLK_PCIE_NEWC#
PERP0
PERN0
CPPE#
<2> NEW_CLKREQ#
+NEW_3V
PERST#
+NEW_3VAUX
+3V
8
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
+NEW_1.5V
9
NEW_SMDATA
NEW_SMCLK
2
R560
*150K
CPUSB#
<19> USBP1+
<19> USBP1-
+NEW_3V
3
<19> SUSCLK
OZ_SCLK
1
29
30
D
[email protected]
4
2
Q46
[email protected]
C
GND1
GND29
PETp0 GND30
PETn0
GND2
PERp0
PERn0
GND3
REFCLK+
REFCLKCPPE#
CLKREQ#
+3.3V1
+3.3V2
PERST#
+3.3VAUX
WAKE#
+1.5V1
+1.5V2
SMB_DATA
SMB_CLK
RESERVED1
RESERVED2
CPUSB#
USB_D+
USB_DGND4
RP3
+NEW_3VAUX
USBP1-
C
USBP1+
[email protected]
3
1
2
C474
3
<2,19,25,33> PDAT_SMB
+3V_S5
+3V
1
[email protected]_4
C506
C502
[email protected]_4
[email protected]_4
NEW_SMDATA
+1.5V
Q25
[email protected]
+NEW_3V
+NEW_1.5V
+NEW_3V
C810
[email protected]_4
C802
[email protected]_4
C500
[email protected]_4
C498
[email protected]_4
C471
[email protected]/10V_8
2
C790
[email protected]_4
3
<2,19,25,33> PCLK_SMB
1
Q26
C454
C452
[email protected]_4
[email protected]_4
C493
C496
[email protected]/10V_8
[email protected]_4
NEW_SMCLK
[email protected]
B
B
PAD16
PAD6
PAD18
PAD19
PAD20
PAD22
*EMIPAD
*EMIPAD
*EMIPAD
*EMIPAD
*EMIPAD
*EMIPAD
*EMIPAD
*EMIPAD
*EMIPAD
*EMIPAD
*EMIPAD
*EMIPAD
1
PAD21
PAD17
PAD23
PAD25
PAD24
PAD5
*EMIPAD
*EMIPAD
*EMIPAD
*EMIPAD
*EMIPAD
*EMIPAD
*EMIPAD
1
1
PAD12
*EMIPAD
1
PAD15
*EMIPAD
1
PAD14
*EMIPAD
1
PAD13
*EMIPAD
1
PAD11
*EMIPAD
1
PAD10
1
B: DEL HOLE23
1
HOLE7
*H-C197D118P2
1
1
1
1
HOLE22
*H-C276D118P2
1
HOLE24
*H-C276D118P2
1
1
HOLE25
*H-C276D118P2
1
1
1
1
HOLE26
*H-C276D118P2
1
1
1
HOLE20
*H-C276D118P2
1
PAD9
1
PAD8
1
PAD7
1
PAD4
1
PAD2
1
PAD3
1
HOLE19
*H-C276D118P2
1
HOLE18
*H-C276D118P2
1
HOLE14
*H-C276D118P2
1
HOLE11
*H-C276D118P2
1
HOLE8
*H-C276D118P2
1
HOLE6
*H-C276D118P2
1
HOLE3
*H-C276D118P2
1
HOLE4
*H-C276D118P2
1
HOLE2
*H-C276D118P2
AUDGND AUDGND
HOLE9
HOLE15
[email protected] [email protected]
A
HOLE17
HOLE13
HOLE16
HOLE10
H-C335D157P2-BOT H-C335D157P2-BOT H-C335D157P2-BOT *H-C177D59P2-BOT
HOLE21
H-C276D157P2-TOP
HOLE5
H-C177D59I99P2-TOP
PROJECT : ZL2
Quanta Computer Inc.
VGA
5
CPU
HEATSINK
4
MODEM BD
3
1
1
1
1
1
1
1
1
HOLE12
*H-C236D138P2
1
A
Size
Document Number
Rev
F
EZ PORT & SIO (87383)
SW BD
Date:
2
Tuesday, December 21, 2004
Sheet
1
32
of
41
5
4
CN16-4
100MBPS#
ACT#
<25,26> 100MBPS#
<25,26> ACT#
D
<29>
<29>
<29>
<29>
KPCLK
KPDATA
MSCLK
MSDATA
<31> MDSR1#
<31> MRTS1#
<31> MCTS1#
<31> MRI1
<31> MDCD1#
<31> MRXD1
<31> MTXD1
<31> MDTR1#
<27,28> SPDIF_OUT
AUDGND1
<28> SPKR_SYS
<28> SPKL_SYS
<27> LINEINR_PR
<27> LINEINL_PR
<27> PR_MIC
AUDGND1
<27> PR_MIC_IN
<28> HPSENCE_PR
LANLED_LINK
LANLED_ACT
GND33
SUSON_PR
MAINON_PR
DOCKPRG
55
56
85
SUSON
MAINON
BRG_PWROK
KPCLK
KPDATA
MSCLK
MSDATA
52
51
54
53
PS2KBCK
PS2KBDT
PS2MSCK
PS2MSDT
MDSR1#
MRTS1#
MCTS1#
MRI1
MDCD1#
MRXD1
MTXD1
MDTR1#
48
46
44
42
49
47
45
43
50
DSR#
RTS#
CTS#
RI
DCD#
RXD#
TXD#
DTR#
GND50
41
72
74
75
70
71
73
76
69
40
SPDIF_OUT
AGND72
LINEOUT_R
LINEOUT_L
LINEIN_R
LINEIN_L
MICIN
AGND76
PRMIC_DET
HPSENSE_PR
124
B: DOCKING CIRCUITS MODIFIED
2
L62
L63
[email protected] [email protected]
CRT HSYNC
PR_CRTHSYNC
CRTVSYNC
PR_CRTVSYNC
DDCCLK_1
DDCDAT_1
CN16-3
8
31
33
SPKR_SYS
SPKL_SYS
LINEINR_PR
LINEINL_PR
PR_MIC
3
100
101
102
103
104
TV_COMP_PR
TV_Y/G_PR
TV_C/R_PR
STRB#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PE
AFD#
ERROR#
INIT#
SLIN#
ACK#
BUSY
SLCT
9
11
13
15
17
18
19
20
21
24
10
12
14
16
22
23
25
STRB#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PE
AFD#
ERROR#
INIT#
SLIN#
ACK#
BUSY
SLCT
GND58
GND77
GND110
58
77
110
GND100
TV_COMPS
TV_LUMA
TV_CRMA
GND104
<17> CRTHSYNC
<17> CRTVSYNC
TV_COMP_PR <16>
<17> DDCCLK_1
TV_Y/G_PR <16> <17> DDCDAT_1
TV_C/R_PR <16>
<17> VGA_RED_PR
<17> VGA_GRN_PR
STRB# <31> <17> VGA_BLU_PR
PD[0..7] <31>
<19> PCIE_TXP1
<19> PCIE_TXN1
PE <31>
AFD# <31>
ERROR# <31>
INIT# <31>
SLIN# <31>
ACK# <31>
BUSY <31>
SLCT <31>
[email protected]_Acer_define
<19> PCIE_RXP1
<19> PCIE_RXN1
<2> CLK_PCIE_EZ2
<2> CLK_PCIE_EZ2#
<19> PCIE_TXP2
<19> PCIE_TXN2
<6,11,15,18,21,29,31,32> PLTRST#
LUSB1# <18>
+5V
[email protected]_4
123
126
G1
GND126
PR_RED
PR_GRN
PR_BLU
<2> CLK_PCIE_EZ1
<2> CLK_PCIE_EZ1#
C921
G2
L11
L10
L9
E: CHANGE FOR EMI
32
82
RESERVE32
RESERVE82
[email protected]
[email protected]
[email protected]
<19> PCIE_RXP2
<19> PCIE_RXN2
D4
1
2 [email protected]
<18,19> LUSB2#
<2,19,25,32> PDAT_SMB
<2,19,25,32> PCLK_SMB
<2> EZ_CLKREQ#
CN16-2
78
79
81
80
105
106
107
108
109
117
119
120
118
115
116
114
111
112
113
29
30
27
59
60
28
89
90
88
57
26
86
83
87
CN16-1
CRT_HS
CRT_VS
CRT_DDCK
CRT_DDCDT
GND105
VGA_R
VGA_G
VGA_B
GND109
GND117
PCIE1_CLK+
PCIE1_CLKGND118
PCIE1_TP
PCIE1_TN
GND114
PCIE1_RP
PCIE1_RN
GND113
PCIE2_CLK+
PCIE2_CLKGND27
PCIE2_TP
PCIE2_TN
GND28
PCIE2_RP
PCIE2_RN
GND88
PCIERST
PCIEWAKE
PCIESMBDT
PCIESMBCK
PCIEREQ#
E: ADD FOR EZ4
122
125
VA
+3V
[email protected]_Acer_define
R7
1
+5V
64
98
97
99
94
95
96
91
92
93
61
62
63
DVI_DDCCK
DVI_DDCDT
GND66
67
65
66
TX3P
TX3N
GND39
TX2P
TX2N
GND36
TX1P
TX1N
GND6
TX0P
TX0N
GND3
GND7
DOCK_IN#
DOCKED#
37
38
39
34
35
36
4
5
6
1
2
3
7
68
84
P2
GND125
P1
[email protected]_Acer_define
[email protected]_4
DVI_HPD
DVI_CLKDVI_CLK+
GND99
DVI_D0DVI_D0+
GND96
DVI_D1DVI_D1+
GND93
DVI_D2DVI_D2+
GND63
TMDS_HPD <11,15>
CLKCLK+
CLK- <11,15>
CLK+ <11,15>
TX0TX0+
TX0- <11,15>
TX0+ <11,15>
TX1TX1+
R326
100K_4
TX1- <11,15>
TX1+ <11,15>
TX2TX2+
D
TX2- <11,15>
TX2+ <11,15>
TMDS_DDCCLK_5V
TMDS_DDCDATA_5V
X-TX3P-PR
X-TX3N-PR
X-TX3P-PR <26>
X-TX3N-PR <26>
X-TX2P-PR
X-TX2N-PR
X-TX2P-PR <26>
X-TX2N-PR <26>
X-TX1P-PR
X-TX1N-PR
X-TX1P-PR <26>
X-TX1N-PR <26>
X-TX0P-PR
X-TX0N-PR
DOCKIN#
R321
X-TX0P-PR <26>
X-TX0N-PR <26>
[email protected]_4
121
VA
[email protected]_Acer_define
C
C
VA
B: DOCKING CIRCUITS MODIFIED
AUDGND1
+3V_S5
+3V_S5
R330
2.2K_4
R325
[email protected]_4
2
C911
C548
[email protected]/50V
[email protected]/50V
7
R613
DOCKIN#
C536
[email protected]_4
1
5
<11,15> TMDS_DDCDATA
DOCKPRG
[email protected]_4
4
DOCKIN
3
3
2
TMDS_DDCDATA_5V
3
Q3
[email protected]
1
PR_STS <19,29>
SUSON_PR
3
+3V
U53
[email protected]
5
+5V
R614
DOCKIN#
[email protected]
2
+3V_S5
R324
[email protected]_4
<11,15> TMDS_DDCCLK
D: ADD EMI SOLUTION
C543
C542
C27
C28
C13
C23
C14
C17
C20
C22
C21
MAINON_PR
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
C544
C545
C24
C25
C26
C549
C550
DDCCLK_1
DDCDAT_1
X-TX1P-PR
X-TX1N-PR
X-TX0P-PR
X-TX0N-PR
X-TX3P-PR
X-TX3N-PR
X-TX2P-PR
X-TX2N-PR
C547
C546
C16
C15
C18
C19
C539
C540
C537
C538
*10P_4
*10P_4
[email protected]_4
[email protected]_4
[email protected]_4
*10P_4
*10P_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
[email protected]_4
U52A
[email protected]
*330_4
CLKCLK+
R642
MAINON <29,35,36,37,38>
<26> DOCKIN#
+3V_S5
R11
B: CHANGED FROM 10K
[email protected]_4
PR_INSERT_5V <16,17>
R320
[email protected]_4
DOCKIN#
2
Q6
[email protected]
*330_4
TX0TX0+
R644
A
*330_4
TX1TX1+
PROJECT : ZL2
E: RESERVE FOR EMI REQUEST
Quanta Computer Inc.
Size
Document Number
Date:
Tuesday, December 21, 2004
Rev
F
EZ PORT & SIO (87383)
5
B
E: POP C24,25,26 FOR EMI
[email protected]_4
R641
2
+5V
C541
A
6
Q4
[email protected]
PR_CRTHSYNC
PR_CRTVSYNC
PR_BLU
PR_GRN
PR_RED
CRT HSYNC
CRTVSYNC
[email protected]_4
TMDS_DDCCLK_5V
3
3
SPKL_SYS
SPKR_SYS
LINEINL_PR
LINEINR_PR
PR_MIC_IN
PR_MIC
100MBPS#
ACT#
TV_COMP_PR
TV_C/R_PR
TV_Y/G_PR
1
1
B
1
C912
2
1
R329
2.2K_4
8
Q52
[email protected]
4
DOCKIN#
SUSON <29,35,36>
U52B
[email protected]
4
3
2
Sheet
1
33
of
41
5
4
3
2
1
D
D
1907VCC
+3V
1907B0
1907B1
1907B2
PR34
2
<19> DPRSLPVR
0
PR139
1
0
PR125
1
0
2
2
1907BST
33
MAX1907DH
1
2
3
B0
B1
B2
LX
MAX1907LX
32
DL
29
GND
PGND
11
28
PR140
0.001-2512
TON
40
0.6UH
PQ58
FDD6688
+
PD24
SKS30-04A
DPSLP
*10K
7
SHDN
OPEN:300KHz
PR30
2
1
1
15
CC
CSN
1907REF
8
REF
9
ILIM
27
DD
CSP
2
MAX1907A
18
PR137
1
VCC_CORE
PR133
1.5K/F
200
PC134
1000P_4 PR135
2
1
2
PC64
220P
1
PR36
2
1K/F
PC58
100P
CM+
NEG
1907FB
14
1
POS
200
13
PR124
301K/F
OCP = 28A
2
2
1
.22U
1
2
PC51
1907FB
19
2
FB
PR35
750/F
1
17
16
2
TIME
OA+
OA-
1
12
D5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
PR33
1.24K/F
2
1
B
D: CHANGE SETTING
1907VCC
1907REF
1907VCC
1907REF
1907VCC
1907REF
1
1
1
1
1
PC132
100P
1
1
1
PR131
100K/F
2
2
2
PR123
49.9K/F
PC61
.1U/50V
2
39
+ PC82
*470U/2.5V
1907VCC
SUS
2
270P
+
PC60
.1U/50V
C
20
1
25A
VCC_CORE
PC142 PC76
470U/2V 470U/2V
1
1
PC133
10U/25V-T
PC136
10U/25V-T
CM+
PQ59
FDD66881
1
35
62K/F
10U/25V-T
PL20
PR132
2
PC176
PC137
10U/25V-T
1
S2
S1
S0
1
PC172
2
6
5
4
PC62
.1U/50V
PQ57
FDD6035AL
4
D0
D1
D2
D3
D4
D5
1
.1U/50V
DH
26
25
24
23
22
21
N20122PS800
PC67
2
4
30
34
31
1
CLK_EN
VDD
10
38
V+
BST
1
<29> VRON
1
2
IMVP_OK
3
1907VCC
SYSPOK
37
VIN
PL19
3
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
36
VIN_1907A
PD10
BAS316
VIN_1907A
3
<2> CLK_EN#
<2,19> STP_CPU#
10U/6.3V
VCC
PU13
<6,19> IMVP_PWRGD
C
1
PR134
10K
<29,35,36,37,38> HWPG
<4>
<4>
<4>
<4>
<4>
<4>
PR37
PC135
1
2
10
10U/6.3V
2
PR136
2.2K_4
2
2
PR138
*10K
2
5VPCU
4
1
1
1
PC52
1
2
2
PR130
*NC
2
PR127
*NC
2
PR32
*NC
1
1907B0
PR28
*0
2
PR129
0
2
2
PR29
*0
1
1907B1
2
PR128
0
1
1907B2
PR126
0
2
2
PR31
*0
REV:B MODIFY
D: CHANGE SETTING
A
D4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Output
1.196V
1.180V
1.164V
1.148V
1.132V
1.116V
1.100V
1.084V
1.068V
1.052V
1.036V
1.020V
1.004V
0.988V
0.972V
0.956V
0.940V
0.924V
0.908V
0.892V
0.876V
0.860V
0.844V
0.828V
0.812V
0.796V
0.780V
0.764V
0.748V
0.732V
0.716V
0.700V
D5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
D4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Output
1.708V
1.692V
1.676V
1.660V
1.644V
1.628V
1.612V
1.596V
1.580V
1.564V
1.548V
1.532V
1.516V
1.500V
1.484V
1.468V
1.452V
1.436V
1.420V
1.404V
1.388V
1.372V
1.356V
1.340V
1.324V
1.308V
1.292V
1.276V
1.260V
1.244V
1.228V
1.212V
VCC_BOOT
B2
GND
REF
OPEN
VCC
REF
SUSPEND MODE (SUS=HIGH)
S2
S1
OPEN VCC
S0
Output
GND
0.748V
B1
GND
REF
OPEN
VCC
VCC
B0
GND
REF
OPEN
VCC
VCC
Output
1.708V
1.372V
1.036V
0.700V
1.212V
PROJECT : ZL2
Quanta Computer Inc.
Size
Document Number
R ev
F
CPU CORE (MAX1907)
Date:
5
4
3
2
Tuesday, December 21, 2004
Sheet
1
34
of
41
B
A
B
VIN1999
E
VIN
VIN1999-3
PR38
PC30
PC31
1000P
.1U/50V
PC29
10U/25V-T
2
3V_ALWAYS
.1U/50V
8
G2
5
2
2
2
N20122PS800
+ PC42
*10U/25V-X6S
D1
D
D1
PR249
3.3K
.1U/50V
S2
0
PC43
+ PC49
1U/25V-X6S
6
4.7
PC69
PR56
1
1
ZD5.6V
PL7
2
1
1
1
1
7
PD25
2
D: CHANGE FROM 12K/F
2
*6.81K/F
3
PR55
*100P
D
4
PC77
C
1
A
4
4
PL18
8
7
6
5
1999LX3
+
2
17
VCC
OUT3
22
8
REF
DH3
26
5
ILIM3
LX3
27
11
ILIM5
ON5
LDO5
18
GND
PRO
10
25
LDO3
13
TON
0
1999LX5
DH5
16
1999DH5
OUT5
21
2
1
2
3
1
1
4
1
1
2
4
PQ54
AO4912
EP05FA20
+ PC55
10U/25V-T
PL15
STQ125A-7322A
1999DL5
PQ11
AO4812
+
MAIND
S USD
PC36
PC40
10U/10V .1U/50V
330U/6.3V-7343
MAX1999
3
3
5VPCU
PC28
SKIP_SEL
C913
1U/10V
2
2
15
8
LX5
7
1999BST5
5VPCU
1
N.C.
19
14
3
1
DL5
BST5
6
1
PGOOD
G1
PR148
1999VCC
SKIP
2
S1/D2
12
100K
0
G2
PR143
<29,34,36,37,38> HWPG
1000P_4
D1
1999VCC
PR147
3
1999LX15
PC138
.1U/50V
PC44
.1U/50V
15V
PD8
1
PC68
10U/25V-T
PC46
5
4
23
5VON
0
S2
D
PD9
DAP202U
3
VIN1999
D1
PR145
PR142
*100K
6
10U/25V-T
4
20
.1U/50V
N20122PS800
+ PC56
6
V+
10U/25V-T
3
SHDN
ON3
+ PC57
.1U/50V
7
FB5
3
3VON
0
PC53
2
8
9
PR144
1999BST3
VL
2
24
1
28
DL3
PC65
2
BST3
VL
+3V
PL8
FB3
7
VIN
VIN1999-5
4
ILIM5
+3VSUS
.1U/50V
1
PR46
200K/F
MAIND
S USD
PC66
5
1
2 REF2V
PC141 1U/10V
ILIM3
3V_ALWAYS
1
PU14
ILIM5
PR47
100K/F
.1U/50V
2
47
1999VCC
ILIM3
10U/10V
PC70
.1U/50V
2
PR49
3.16K/F
PC130
330U/4V
2
1
PC171 .22U
2
PR50
10K/F
100K/F
PC72
1U/10V
1
PR40
PC139
1999DL3
D
REF2V
PC131
3
3R8UH
2
PR42
PQ19
AO4812
3V_ALWAYS
1999DH3
1
1999_SHT#
G1
VL
S1/D2
PQ20
AO4912
<3> 1999_SHT#
MAX6648_OV#
<3,30> MAX6648_OV#
+5VSUS
PR60
PR146
2
5VPCU
1
MAIND
PC25
.1U/50V
*0
3
100K
PQ22
2N7002
2
1
+5V
PQ23
2N7002
PC24
.1U/50V
VGA1.2V
2
+1.5V_S5
+3V_S5
PR149
PR72
PR150
PR141
1M
22-0805
22-0805
1M
VIN
3V_ALWAYS
12VOUT
PR162
[email protected]
PC80
3
VIN
+2.5VSUS
PR86
+3VSUS
PR82
1M
+5VSUS
PR79
22-0805
12VOUT
PR78
22-0805
PR80
22-0805
1M
2
.1U/50V
2200P
PQ67
[email protected]
2
3
3
2
1M PQ36
2N7002
2
PQ38
2N7002
2
PQ37
2N7002
PC98
2200P
PQ39
2N7002
1
PC81
1
PQ60
2N7002
+5V
+3V
12VOUT
.1U/50V
1
PQ61
2N7002
1
PQ32
2N7002
1
1
PR81
2
<29,33,36> SUSON
+3V_S5
PC78
1
2
1
2
1
2
1
2
1
PR151
1M
3
3
3
3
3
PQ24
SI2304
2
<29,37> S5_ON
3
3
PQ40
PDTC143TT
2
PQ62
PDTC143TT
3
S USD
VIN
+VCCP
+1.2V
VCC_CORE
+1.8V
+1.5V
+2.5V
15V
PR73
.1U/50V PR20
PR87
1K/F
PR14
22-0805
1M
PR13
[email protected]
PR18
22-0805
PR94
[email protected]
PR91
22-0805
PR92
22-0805
PR93
22-0805
PR84
22-0805
1M
1
8
PC34
7
-
3
3
3
3
3
3
3
3
2
2
+ PC38
10U/25V-T
2
PC48
2
2
PQ12
[email protected]
2
PQ42
2N7002
2
PQ43
2N7002
2
PQ44
2N7002
PC101
2200P
2
PQ45
2N7002
1
PQ9
2N7002
1
+12V
PQ10
[email protected]
1
3
1
1
PR25
PQ33
2N7002
1
1
100K/F
1000P_4
20K/F
PU4B
LM358ADR
PR88
1M
2
PC47
2
PQ46
2N7002
1
PQ17
IRLML5103
C: DEPOP WHEN INT. VGA
.1U/50V
220K
<29,33,36,37,38> MAINON
PQ18
PDTC143TT
PROJECT : ZL2
2
Quanta Computer Inc.
1
6
PR26
1
PR24
1
+
3
MAINON 2
12VOUT
1000P_4
5
MAIND <36,37>
1
PU4A
LM358ADR
0
1
PR21
1
4
PC39
1K/F
PQ48
PDTC143TT
3
15K
PR22
-
PQ15
MMBT3906
2
1
2
1
3
REF2V
+
3
3
PR23
Size
Document Number
Rev
F
5V/3.3V(MAX1999)
Date:
A
B
C
D
Tuesday, December 21, 2004
E
Sheet
35
of
41
1
2
3
4
5
VIN2V5
PL23
1
VIN
PC165
10U/25V-T
4
2
.1U/50V
5VPCU
N20122PS800
PC164
A
A
PC107
PR101
4.7U/6.3V-8
.1U/50V
22
PD14
3
PC105
BAS316
PU10
1
2
1
2
PQ65
SUD50N03-09P
1
VDD
V+
VCC
BST
<29,34,35,37,38> HWPG
PR97
0
LX
20
LX-2V5
DL
13
DL-2V5
SKIP
DH
PGOOD
SHDN
2.2 PC106
DH-2V5
10
3
19 PR100
1
18
.1U/50V-8
PL24
4
<29,33,35> SUSON
17
34K/F
*0
PC103
ILIM
PGND
12
2
N/C
N/C_1
9
7
REF
N/C_2
16
TON
OUT
5
FB
4
8
100K/F
1U/10V
AGND
MAX1714A
B
+2.5VSUS
PQ66
SUD50N03-09P
1
PC166
+
+ PC167
.1U/50V
PC169
560U/4V
10U/10V
+
PC173
560U/4V
PD28
SKS30-04A
11
2
1714REF-2V5
VCCA-2V5 PR160
PR95
6
3
PR98
3R6UH
1
14
VCCA-2V5 15
2
1
4.7U/6.3V-8
1
2
PC168
PR99
PC104
15K/F
.1U/50V
B
PR96
10K/F
+1.25VSUS
5
6
7
8
+2.5VSUS
3
2
1
VDDQ
6
AVIN
7
PVIN
G2996
+
PC94
10U/6.3V
+2.5V
GND
+2.5V
SD
5
VREF
4
VSENSE
3
8
+
PC174 PC160
10U/10V .1U/50V
C
VTT
+1.25V
9
+2.5VSUS
2
1
C
<35,37> MAIND
0
TGND
PU16
PR159
<29,33,35,37,38> MAINON
PQ41
AO4414
4
+
PC96
.1U/50V
PC163
.1U/50V
+
PC162
10U/10V
PC159
*100U/2V-7343
PC92
.1U/50V
D
D
PROJECT : ZL2
Quanta Computer Inc.
Size
Document Number
R ev
F
2.5VSUS / +1.25TERM
Date:
1
2
3
4
Tuesday, December 21, 2004
Sheet
5
36
of
41
5
4
3
2
1
VIN1845
1
1
PD13
DAP202U
CS1
28
3
15
PD27
SKS30-04A
1845FB2 14
OUT2
1
FB1
2
S5_ON
11
ON1
12
ON2
MAINON
MAX1845 TON
5
C
ILIM2
1845ILIM1 3
ILIM1
1845VCC
1845REF
REF
10
SKIP
6
GND
23
5
6
7
8
3
2
1
PC153
.1U/50V
PC151
10U/10V
PC178
+
PD31
SSM14-LOW VF
470U/2V
470U/2V
PC145 +
10U/10V
SUD50N03-09P PD26
SKS30-04A
1845FB1
1
9
UVP
PR157
100K/F
1845ILIM213
OVP
PC102
*100P
*470U/2V
PGOOD
+
PC97
*100P
PR154
5.1K/F
<35,36> MAIND
PC100
1U/10V
PR155
10K/F
C
1845REF
8
2
PR158
5.23K/F
7
PC146
+
1
OUT1
FB2
HWPG
PL21
*3R6UH
PQ35
1
1845DL1
1
2
3
2
1845LX1
24
+1.5V
8
7
6
5
4
27
DL1
1
LX1
CS2
1
PD32 PC179
*SSM14-LOW VF
DH2
16
AO4414
2
2
PC156 PC157
10U/10V .1U/50V
.1U/50V-8
18
1
2
470U/2V
26
+1.5V_S5
PQ64
1R5UH
1845DH1
1
4
1
+
DH1
PL25
PC95
25 1845BST1
2
+
1845DH2
SUD50N03-09P
2
1
+
1
3R6UH
PC155
BST1
LX2
10U/25V-T
2
PQ47
17
DL2
PC158
4.7U/6.3V-8
21
4
.1U/50V-8
1845LX2
D
10
VDD
3
PL22
20
BST2
N20122PS800
+ PC91
PC90
.1U/50V
4
2
+VCCP
19
22
PU9
1845BST2
VCC
3
PC161
4
1
PQ31
SI4392DY
5VPCU
PR156
1845VCC
VIN1845
SUD50N03-09P
1.05V
3
4.7U/6.3V-8
PQ34
V+
10U/25V-T
4
2
+ PC93
2
PC99
D
VIN
PL11
1
1
2
VIN1845
PR83
60.4K/F
PR89
15K/F
HWPG
<29,34,35,36,38> HWPG
1845ILIM1
1845ILIM2
S5_ON
<29,35> S5_ON
PR85
100K/F
PR90
14K/F
B
B
PU8
1
2
1
2
3
4
5
6
7
EN
IN
IN
IN
IN
POK
NC
PC150
[email protected]/6.3V
[email protected]
NC
OUT
OUT
OUT
OUT
FB
GND
GND
+1.5V
<29,34,35,36,38> HWPG
VGA1.2V
10/20 Modify
2A
14
13
12
11
10
9
8
PR74
[email protected]/F-0603
PC147
[email protected]/4V
15
<29,33,35,36,38> MAINON
PR77
[email protected]/F-0603
A
A
PROJECT : ZL2
Quanta Computer Inc.
Size
Document Number
R ev
F
+1.5 / CPUIO
Date:
5
4
3
2
Tuesday, December 21, 2004
Sheet
1
37
of
41
1
2
3
4
5
VIN-VGACORE
PL17
[email protected]/50V
[email protected]
PC63
[email protected]/25V-T
4
5VPCU
2
1
VIN
PC59
PQ55
2
PR45
[email protected]/25V-T
[email protected]/50V
[email protected]
1
PD11
[email protected]
A
[email protected]
PU5
1
PC73
3
1
2
A
PC75
V+
VCC
BST
SKIP
DH
1
DH-VGA
PGOOD
LX
20
LX-VGA
3
SHDN
DL
13
DL-VGA
6
ILIM
PGND
12
2
PR57
1714REF-VGA
[email protected]
PR58
VCC-VGA PR59
*0
PC79
[email protected]/10V
N/C_1
7
REF
N/C_2
16
TON
OUT
5
FB
4
AGND
PL16
PQ56
1
11
PR54
PC50
+
[email protected]/2.5V
PC129
[email protected]/2.5V
+ PC45
[email protected]/50V
2
PC54
+
1
+1.2V
[email protected]
9
N/C
8
[email protected]/F
[email protected]/50V-8
1
<29,33,35,36,37> MAINON
PC71
PC175
[email protected]/10V
[email protected]_4
[email protected]
PD29
[email protected]
D: ADD PC175
2
10
[email protected]
19 PR44
4
HWPG
<29,34,35,36,37> HWPG
VDD
VCC-VGA 15
1
[email protected]/6.3V-8
18
2
PC140
17
3
14
[email protected]/F_4
PC74
[email protected]
[email protected]
PR51
[email protected]/F
+5V
PR250
B
PR251
*3.24K/F
3
*12.7K/F
B
F: RESERVE PWR PLAY
PR48
[email protected]/F
PR51=2.2K; PR48=47K
2
PR252
*100
HI=1.05V
LO=1.2V
3
2
1
1
PQ68
*2N7002E
2
PC177
*2.2U
VGA_PWR_SW <11>
1
PQ69
*DTC144EUA
5VPCU
PL4
PR120
PD6
[email protected]/25V-T
[email protected]/50V
[email protected]
[email protected]
BST
18
SKIP
DH
1
DH-1.8
10
PGOOD
LX
20
LX-1.8
3
SHDN
DL
13
DL-1.8
6
ILIM
PGND
12
2
N/C
N/C_1
9
7
REF
N/C_2
16
TON
OUT
5
FB
4
4
V+
VCC
[email protected]
19 PR16
PC20 [email protected]/50V-8
[email protected]
PL14
+1.8V
[email protected]
1714REF-1.8
VCC-1.8
PR17
PC33
[email protected]/F
[email protected]/10V
PR119
*0
[email protected]/2.5V
PR121
1
8
AGND
[email protected]
PC37
+ PC35
[email protected]/50V
[email protected]/10V
1
PQ6
11
PC27
+
[email protected]
PD30
[email protected]
2
[email protected]/F
3
PR19
C
[email protected]/25V-T
PQ5
1
4
MAINON
VDD
15
[email protected]/50V
[email protected]
1
HWPG
17
3
VCC-1.8
1
[email protected]/6.3V-8
2
PC26
14
1
VIN
PC18
2
PU3
PC22
1
2
C
PC32
2
1
2
VIN-VGACORE
PC41
[email protected]/F_4
PC128
[email protected]
PR118
[email protected]/F
D
D
C: DEPOP WHEN INT. VGA
PROJECT : ZL2
PR116
Quanta Computer Inc.
[email protected]/F
Size
Document Number
Rev
F
+1.2V/+1.8V
Date:
1
2
3
4
Tuesday, December 21, 2004
Sheet
5
38
of
41
8
7
6
5
4
3
2
1
D
D
REFP
PQ63
VIN
1
6
2
5
3
REFP <29,40>
4
VL
REF3V
PU15
1
Vin
2
GND
10U/10V
VA
PF3
1
2
3
4
1
PL13
2
PR3
3
2
PD4
N20122PS800
PL12
TR/3216FF-6.5A
1
2
18
PC11
3
<29> REFON
.1U/50V
BP
4
SD
REF3V <29,40>
PC143
G914D
SBM1040
.1U/50V
PC144
1U/10V
N20122PS800
PF2
*TR/3216FF-6.5A
6
5
1
5
2
CN14
Vout
1
PC154
IMD2
PR7
0.02-3720
PC108 PC109 PC110
.1U/50V .1U/50V .1U/50V
PR4
18
PC12
.1U/50V
2DC-S726I201-V
POWER_JACK
VA2 <40>
VAD
PD15
BAS316
2
CSSP
C SSN
1
PR111
10K
PR109
10K
PC17
PC116
.1U/50V
VCTL
14
ICTL
24
13
REFIN
LX
23
12
ACOK
DLO
21
10
ICHG
PGND
20
28
IINP
19
18
3
7
CSIP
CSIN
CCV
2
- PU12A
LM393
6
CCI
5
CCS
PR11
47K
47K
PC120
1000P
8
+
PC121
1000P
3
4
1
DHI
PD5
B
1772DH
1772LX
D1
1
7 S1/D2
D1
2
6
G2
3
5
S2
4
PR8
0.05-3720
PL2
PC7
10U/25V-T
10UH-SIL104
BAT-V <40>
+
+
AO4912
+
PC9
.01U/50V
1772DL
C SIP
C SIN
17
BAT-V
4
1772REF
CLS
3
PR103
PR107
PR108
PC15
.1U/50V
18
18
PC8
10U/25V-T
PC6
10U/25V-T
PC13
.1U/50V
B
PR112
10K
D/ C# 2
PR106
10K
PR105
0
PR104
10K
2
PQ50
*2N7002
1
OSC
200KHz
PC123
220P
24.3K/F
GND
GND
<29,40> D/C#
9
8
PR9
22K
PC117
.1U/50V
REF
BATT
BAS316
8 G1
1
<29> CV-SET
<29> CC-SET
BST
25 1772BST
PC118 PC115 PC114
.1U/50V .01U/50V .01U/50V
PR102
12K/F
PC113
1U/25V-X6S
1
RB500
15
PQ7
22
2
REFP
DLOV
ACIN
1
11
PC14
1U/25V-X6S
21772LDO
2
PC119
.1U/50V
RB500
PC122
1U/25V-X6S
16
1
LDO
PD16
PR113
CELLS
1
DCIN
2
27
26
1
CSSP
CSSN
3
2
1
REF3V
PD2
.1U/50V
33.2/F
2
PR110
PU11
MAX1772EEI
2
VH
PC2
.1U/50V
PQ49
IMZ2
C
10U/25V-T
PD3
DA204U
1
3
1
1
.01U/50V
4
5
6
PC4
2
+
PR2
10K
PL3
N20122PS800
PC19
1772CELLS
PC112
1U/25V-X6S
2
C
FOR 120W 6.2A
12VOUT
1772LDO
10K/F
PR10
3
PR64
<29> ACIN
1M
FOR 4S3P CELL-SET HIGH
PQ4
2
1
PD12
AC
2
ZD12V
2N7002
FOR 3S3P CELL-SET LOW
1
VAD
3
PR66
6.8K/F
3V_ALWAYS
A
2
A
1
PR65
10K/F
PQ3
DTC144EU 1772CELLS
<29,40> CELL-SET
PROJECT : ZL2
Quanta Computer Inc.
Size
Document Number
Rev
F
BATTERY CHARGER
Date:
8
7
6
5
4
3
2
Tuesday, December 21, 2004
Sheet
39
1
of
41
1
2
3
4
5
1ST_BATT_CONN
CN17
1
1
PL6
N20122PS800
MBAT+
8
7
6
5
8
7
6
5
1
2
3
4
PR27
10K
AO4411
AO4411
A
PQ53
3
1
1
VH
+
PR61
1M
PU6A
LM358ADR
MCHG
3
-
2
6
5
4
2
PC83
.1U/50V
ACHG
PR122
10K
PR53
CLOSE TO BATTERY CON
1
1
4
470K
REF3V
PD7
ZD15V
2
+
-
6
PQ14 AO4812
PC111
10U/25V-T
PQ2
PR63
10K
B
AO4414
PR52
100K
PD20
ZD15V
PC126
.01U/50V
PC5
.01U/50V
+
PC3
4
1
2
2
3
1
1
TEMP_MBAT
7
470K
1
1
2
2
8
3
2
1
3
7
PU6B
LM358ADR
ACHG
5
1
6
PR62
PC10
.01U/50V
VIN
VH
2
4
PQ25
2
.01U/50V
5
6
7
8
PR117
10K/F
5
2
1
<39> BAT-V
2
VH
1
1
PQ51
PDTC143TT
8
2
3
3
PQ52
IMD2
ADISCHG 2
PD19
ZD5.6V
B
MDISCHG
2
MBDATA_MBAT
PD18
ZD5.6V
1
2
3
4
2
PC127
47P
PC23
10U/25V-T
MBCLK <3,29>
1
N20122PS800
PDTC143TT
PR114
330
2
PL5
+
2
1
PC21
PC125
1
ZD5.6V PD17
2
.1U/50V
PR115
330
2
1
2
PC124
47P
2
SUYIN_BATTERY
47P
A
PQ16
PQ13
MBAT
TEMP_MBAT
1
8
9
TEMP_MBAT <29>
1
2
3
4
5
6
7
VA2
PU2
VA2 <39>
1
PDTC143TT
REFP
VL
PL9
[email protected]
+ PC84
GL
A
B
C
G1
G2
GND
6
5
8
4
7
PQ30
PDTC143TT
+
5
-
6
REF3V
LM393
PC16
.1U/50V
C
PR12
100K
74HCT237
PQ26
IMD2
<29,39> CELL-SET
<29,39> D/C#
2
PQ8
2N7002
6
5
4
1
<29> BL/C#
PR6
120K/F
1
1
1
MBDATA_ABAT
PU12B
2
AO4411
MDISCHG 2
PQ28
PDTC143TT
1
2
3
4
1
3
[email protected]
MBCLK
8
7
6
5
3
8
7
6
5
1
[email protected]/25V-T
2
[email protected] [email protected]
1
2
3
4
AO4411
3
PC88
2
[email protected]/50V
1
PD23
2
[email protected]
PC89
2
[email protected]
1
1
2
[email protected]
PC85
PC86
2
PR152
2
[email protected]_BATTERY
1
PR153
[email protected]+
PR5
160K/F
PR15
10K
3
1
PL10
1
2
3
PQ29
PQ27
ABAT
TEMP_ABAT
1
8
9
C
PR71
10K
TEMP_ABAT <29>
1
2
3
4
5
6
7
VDD
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
ADISCHG
2ND_BATT_CONN
CN24
REFP <29,39>
VL
16
15
14
13
12
11
10
9
7
200mil
PD22
[email protected]
MCHG
PR67
10K
2
2
PD21
[email protected]
CLOSE TO BATTERY CON
REF3V
3V_ALWAYS
REF3V <29,39>
SEL
PR161
D
PR69
PR70
10K/F
2
1
TEMP_ABAT
PC87
.01U/50V
PR68
*0
10K/F
10K/F
5
VCC
MBDATA_MBAT
1
IN_B1
2ND_BATT
IN_B0
HIGH
IN_B1
D
PU7
1ST_BATT
MBDATA_ABAT
FUNCTION
LOW
3
SEL
6
COM
4
GND
2
IN_B0
M/A#
PROJECT : ZL2
M/A# <29>
MBDATA <3,29>
Quanta Computer Inc.
Size
1
2
Document Number
R ev
F
BATTERY SELECT
SN74LVC1G3157DCKR
Date:
3
4
Sheet
Tuesday, December 21, 2004
5
40
of
41
5
MODEL:
REV:
3
2
1
PAGE
FROM
1
PAGE2 1. CHANGE FREQ. SETTINGS FOR DOTHANB 2. UNSTUFF SSC COMPONENTS 3. UNSTUFF COMPONENTS FOR DIFFERENT SKUS
PAGE3 1. REMOVE R449, PULL HIGH AT POWER SIDE 2. UNSTUFF ITP COMPONENTS 3. STUFF R441 FOR THEMTRIP#
2
PAGE4 1. STUFF R432, R433 FOR AUTO-SELECT
PAGE5 1. STUFF R162 FOR DOTHAN-B
3
PAGE6 1. STUFF R147, R148, R151, R143, R152, R159 ALWAYS 2. NOT STUFF DVO COMPONENTS WHEN NO DOCKING
PAGE8 1. NOT STUFF FILTER COMPONENTS WHEN EXT. VGA 2. CHANGE D10, D11 TO CH551
4
PAGE9 1. STUFF R76, PCIE_TESTIN PULL LOW 2. STUFF R369, GPIO0 PULL HIGH 3. CHANGE CLK OUTPUT TO XTALIN 4. NOT STUFF DVI COMPONENTS WHEN NO DOCKING
PAGE12 1. ADD 220UF IN VGA1.2V
5
PAGE15 1. NOT STUFF R60, R63 WHEN NO DVO DEVICE 2. NOT STUFF DVO COMPONENTS WHEN NO DOCKING
PAGE16 1. CHANGE TV-OUT LC VALUES
6
PAGE18 1. ADD DAMPING ON LFRAME# FOR AUDIO NOISE 2. STUFF R469 AND UNSTUFF R467 FOR DOTHAN-B 3. NOT STUFF COMPONENTS FOR SATA WHEN NO SATA 4. NOT STUFF AC TERMINATION FOR PCLK_ICH
PAGE19 1. NOT STUFF PCIE COMPONENTS WHEN NO PCIE DEVICES 2. CHANGE EMAIL LED GPIO 3. CHANGE MB_ID SETTING
7
PAGE21 1. REMOVE R50 2. CHANGE Q15 FROM BJT TO 2N7002
PAGE23 1. REMOVE RING FUNCTION 1. REMOVE 1394 CHOKE PADS
8
PAGE24 1. CHANGE 3IN1 CONNECTOR
PAGE25 1. CHANGE LED CONNECTION FOR 1G LAN 2. CORRECT U42 PIN.B11 PIN.C11 SHORT 3. CHANGE C741 AND C792'S SIZE FOR ME
9
PAGE26 1. UNINSTALL C210, C184, R87, R99 WHEN 10-100
PAGE27 1. INSERT 4700P IN BEEP SIGNALS 2. REMOVE SPK_PR FROM CODEC 3. CHANGE C863 TO 10U 4. REVERSE MIC-SELECT 5. CHANGE R272 TO 0 OHM
10
PAGE28 1. CHANGE CONNECTION FOR SPKL-R TO EZ4 2. ADD SPRINGS FOR MODEM CABLE
PAGE29 1. CHANGE PR_INSERT# TO PR_STS
11
PAGE30 1. CHANGE KB AND TP'S CONNECTOR 2. CHANGE LED CIRCUITS
PAGE31 1. REMOVE C889 2. STUFF AC TERMINATIONS FOR 14M_SIO
12
PAGE33 1. MODIFY EZ4 INTERFACE
PAGE 35 1. INCREASE CAPACITOR PC171 NEAR PR422. CHANGE COMPONENT PR38 SERIAL NUMBER FROM 0603 TO 1206 3. TAKE OFF PR39 PR43 PQ21 AND CHANGE NET NAME TO MAX6648_OV#
13
PAGE 35 3. INCREASE CAPACITOR C913 4. ADD DISCHARGE FOR VGA1.2V
PAGE 40 1. INCREASE RESISTOR PR161 NEAR PU7
14
PAGE 22 1. REMOVE CHOKE PADS
PAGE 39 1. TAKE OFF PQ50
15
PAGE 37 1. CHANGE PU8 NET NAME TO +2.5V
PAGE 17 1. CHANGE HSYNC& VSYNC'S BEADS TO 0 OHM
B
D
4
CHANGE LIST:
ZL2
MotherBoard
C
PAGE2 1. ADD PULLUPS ON CLKREQ PINS
PAGE3 1. ADD THEMAL SHUTDOWN CIURCUITS
PAGE13 1. CHANGE OPTIONS TO HYNIX MEMORY
PAGE16 1. DEPOP C558
PAGE17 1. CHANGE LC VALUES FOR RGB
PAGE16, 17, 26 ADD 0 OHM RESISTORS TO SUBSTITUE SWITCHES WHEN NO DOCKING
PAGE25 1. CHANGE R531 TO 0 OHM 1. CHANGE R519 TO 1.2K/F
PAGE27 1. CHANGE C512, C511 TO .7UF 1. CHANGE R592 TO 100K
PAGE28 1. DEPOP Q28
PAGE29 1. CHANGE BATLED0,1# PINS TO IOPJ6,7
PAGE24 1. CHANGE 3-IN-1 CONNECTOR
17
B
E
19
20
21
22
23
24
25
26
PAGE 23,25,29,31 1. DEPOP RC FILTERS ON PCI CLOCKS
27
PAGE2 1. DEPOP R615 2. ADD 47P ON 14M_SIO
PAGE3 1. POP R449
PAGE6 1. DEPOP RP7
PAGE16 1. LID SW FOOTPRINT CHANGED
PAGE19 1. ADD MB_ID3
PAGE21 1. CHANGE C82'S RATING TO 25V
PAGE28 1. PHONE JACK CHANGED TO SPDIF
PAGE30 1. CHANGE R338 TO 100K
PAGE31 1. CHANGE R28 AND C41'S VALUE
PAGE33 1. ADD EMI CAPS
PAGE34 1. ADD CAP PC176
PAGE35 1. CHANGE CAP PC69 COMPONENT 2. CHANGE CAP PC72
28
PAGE2
PAGE3,30
PAGE6
PAGE8
PAGE12
PAGE16
PAGE16
PAGE19
PAGE21
PAGE23
PAGE24
PAGE32
A
29
31
32
33
CONNECT POINT
PAGE18
Change R200, R202, C915 value to pass EA
PAGE20
DEPOP COMPONENTS FOR MAX6648_OV#
PAGE31
1. DEPOP R186, R184
PAGE33
Add C918 to solve TV issue
Add C919,920, change L25,27,67
1. ADD LEVEL SHIFT FOR EDID
Change R8, R9, remove C9, C32 for pass Acer LCD
ADD 100K PULLLOW ON DPRSLPVR, change C428
1. CHANGE SWAP-ODD RESET
PAGE 35
1. ADD PULL-LOW ON PCMSPK
1.
PAGE 36
1. ADD 33OHM CURRENT LIMIT ON VCC_XD
1.
PAGE 37
1. REVERSE RX AND TX
1.
PAGE 38
1.
PAGE 39
1.
Quanta Computer Inc.
Document Number
Rev
F
CHANGE LIST
Date:
Tuesday, December 21, 2004
5
Sheet
41
of
3. CHANGE RESISTOR PR147
COMPONENT
34
35
Change GPIO pin define, add R645
D25 change to CH551
Change C41 to 6pF
Modify EZ4 pin define, add R641, 642, 644 for EMI
CHANGE
CHANGE
CHANGE
CHANGE
CHANGE
PC68 COMPONENT.
PR99 PD28 COMPONENT.
PD26 PD27 COMPONENT. 2.
PR51 COMPONENT.
2.
PQ7 COMPONENT.
CHANGE PR74 PR77 PU8 PC147 PC150 COMPONENT.
CHANGE PD29 PD30 COMPONENT.
PROJECT : ZL2
APPROVE BY: SELMON LIU
DRAWING BY:JOE LIN
REV
MB ASSY'S P/N : 31ZL1MB0004
PROJECT LEADER: SELMON LIU
DOCUMENT NO:
DATE :2004/06/01
A
COVER SHEET 1 OF 1
41
4
B
30
PROJECT : ZL2
Size
C
18
PAGE 34 1. INCREASE CAPACITOR PC172 10U/25V IN VIN_1907A 2. INCREASE SCHOTTKY DIODE PD24 SKS30-04A IN MAX1907LX .
PAGE 35 1. INCREASE ZENER DIODE PD25 ZD5.6V SERIES WITH VIN1999 AND PR249 2. CHANGE NET NAME TO 1999_CHT#
PAGE 36 1. CHANGE MOSFET SUD50N03-09P TO PQ65 PQ66 2. INCREASE CAPACITOR PC173 560U/4V IN +2.5VSUS 3. INCREASE CAPACITOR PC174
10U/10V IN +1.25VSUS 4. INSERT PR250 BETWEEN PU16 PIN2 AND PIN 5 .
PAGE 37 1. CHANGE MOSFET SUD50N03-09P TO PQ34 PQ47 AND PQ35 2. TAKE OFF JUMP 3.CHANGE CAPACITOR PC155 PC146 TO 560U/4V
PAGE 38 1. CHANGE MOSFET SUD50N03-09P TO PQ5 PQ6 PQ55 AND PQ56 2. TAKE OFF JUMP 3. CHANGE CHOKE PL16 TO 3R3UH 4.CHANGE CAPACITOR PC27 TO [email protected]/2.5V
PAGE 39 1. EXCHANGE NET NAME 3V_ALWAYS AND CELL-SET
D
D
16
DA0ZL2MB8C3
C
TO
3
2
1
Was this manual useful for you? yes no
Thank you for your participation!

* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project

Download PDF

advertisement