HI7750/4 RTOS Configuration Guide

HI7750/4 RTOS Configuration Guide
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User’s Manual
HI7750/4 Renesas Industrial
Realtime Operating System
Configuration Guide
Renesas Microcomputer
Development Environment
System
Rev.1.0 2003.03
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particularly for maximum rating, operating supply voltage range, heat radiation characteristics,
installation conditions and other characteristics. Hitachi bears no responsibility for failure or
damage when used beyond the guaranteed ranges. Even within the guaranteed ranges,
consider normally foreseeable failure rates or failure modes in semiconductor devices and
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Rev. 1.0, 03/03, page ii of vi
Preface
This guide describes how to configure systems using HI7750/4.
To execute application programs registered as tasks on HI7750/4, the Solution Engine, the
product of Hitachi ULSI Systems Co., Ltd., shall be used as a target board and the HDI of the
E10A emulator as a debugger in the initial debug stage. For details about HI7750/4, see the
HI7000/4 Series (HI7000/4, HI7700/4, HI7750/4) User’s Manual (hereinafter referred to as the
HI7000/4 Series User’s Manual). To create application programs and link them with HI7750/4,
you should use the SuperH RISC engine C/C++ compiler package (hereinafter referred to as the
SHC/C++ compiler) and the Hitachi Embedded Workshop (HEW), which is an integrated
development tool, supplied with the SuperH RISC engine C/C++ compiler package.
This guide describes how to change, add and configure programs before executing the start task on
multitasking operating system using the above target board, emulator, and compiler.
Related manuals
• HI7000/4 Series (HI7000/4, HI7700/4, HI7750/4) Hitachi Industrial Realtime Operating
System User’s Manual
• SuperH RISC engine C/C++ Compiler SH-1, SH-2, SH-2E, SH-3, SH3E, SH-4 User’s Manual
• SuperH RISC engine C/C++ Compiler Assembler Optimizing Linkage Editor User’s Manual
• H Series Linkage Editor, Librarian, and Object Converter User’s Manual
• Hitachi Embedded Workshop 2 HEW Debugger User’s Manual
• SH7750 Solution Engine (MS7750SE01) Overview
• The hardware manual and programming manual of the SuperH microcomputer used
Pentium is a trademark or registered trademark of Intel Corporation or its subsidiaries in the
United States and other countries.
Microsoft Windows 95 operating system, Microsoft Windows NT operating system and
the Windows logo are either registered trademarks or trademarks of Microsoft Corporation in the
United States and/or other countries.
The abbreviation µITRON stands for "Micro Industrial TRON". TRON, in turn, stands for "The
Real-time Operating system Nucleus."
Solution Engine is a registered trademark of Hitachi ULSI Systems Co., Ltd. in Japan.
Other mentioned company and product names are trademarks or registered trademarks of their
respective companies.
Rev. 1.0, 03/03, page iii of vi
Rev. 1.0, 03/03, page iv of vi
Contents
Section 1 Introduction....................................................................................... 1
1.1
1.2
1.3
Overview...........................................................................................................................1
System Configuration .......................................................................................................1
Prerequisites ......................................................................................................................2
Section 2 Creating Application Programs......................................................... 5
2.1
2.2
2.3
Creating CPU Initialization Routine .................................................................................6
Creating Tasks...................................................................................................................11
2.2.1 Main Task ............................................................................................................12
2.2.2 LED Task .............................................................................................................14
Creating an Interrupt Handler ...........................................................................................14
2.3.1 Creating Initialization Module .............................................................................17
2.3.2 Creating Interrupt Handler ...................................................................................19
Section 3 Configuration .................................................................................... 21
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
Starting Configurator ........................................................................................................22
Interrupt Mask Level.........................................................................................................22
Registering Task ...............................................................................................................23
Registering Interrupt Handler ...........................................................................................25
Registering Initialization Routine .....................................................................................28
Registering Event Flag Information..................................................................................31
Creating Configuration Files.............................................................................................33
Building the Executable File by HEW..............................................................................33
3.8.1 Starting HEW.......................................................................................................34
3.8.2 Defining Configuration File.................................................................................35
3.8.3 Changing a Linkage Address ...............................................................................37
3.8.4 Build..................................................................................................................... 41
Disabling Parameter Check Function................................................................................42
Section 4 Downloading and Executing Application Programs......................... 43
4.1
4.2
4.3
Initializing Solution Engine ..............................................................................................43
Downloading Application Program ..................................................................................45
Executing Application Program ........................................................................................46
Rev. 1.0, 03/03, page v of vi
Rev. 1.0, 03/03, page vi of vi
Section 1 Introduction
1.1
Overview
Follow the procedure below to run application programs on HI7750/4:
1.
Create application programs.
2.
Use the configurator to register the application programs to HI7750/4.
3.
Build the executable file using HEW.
4.
Install the application programs to the target board, and download and execute them.
This guide describes the above procedure to run the programs on the target board by using a
sample program.
1.2
System Configuration
This guide describes how to create sample programs of tasks and an interrupt handler and how to
run the programs on the target board.
Figure 1.1 shows an example of a hardware configuration.
E10A
To the PCMCIA slot
Windows PC
SuperHTM Solution Engine
(MS7750SE01)
Figure 1.1 Hardware Configuration Example
Table 1.1 lists software configuration.
Rev. 1.0, 03/03, page 1 of 48
Table 1.1
Software Configuration
Program
Description
Type
CPU initialization routine Sets the bus controller.
Remarks
Non-task
Initializes the hardware.
Main task
Initializes the environment.
Task
Waits for an event after initialization by setting
the wai_flg flag.
Cancels the wait status by setting the event flag
of the timer interrupt handler and starts the LED
task (sta_tsk).
LED task
Started by the main task to turn the LED on
Task
when it is off or turn it off when it is on, and then
terminates.
Timer interrupt handler
Started by the timer interrupt every one second Non-task
and sets the main task event flag (set_flg).
1.3
Prerequisites
Table 1.2 lists hardware and software required to run the application programs on HI7750/4.
Table 1.2
Required Hardware and Software
Product Name
Product Type
Manufacturer
Windows personal computer

Any manufacturer*
SuperH Solution Engine
MS7750SE01
Hitachi ULSI Systems Co., Ltd.
E10A emulator
HS7750KCM01H
Hitachi, Ltd.
SuperH RISC engine C/C++ compiler
P0700CAS6-MWR
Hitachi, Ltd. *
2
HI7750/4
HS0700ITI41SRE
Hitachi, Ltd. *
3
1
Notes: 1. Hardware environment: PC/AT compatible machine with 486DX2/66 MHz or more
(Pentium or later recommended)
Operating system: Windows2000, WindowNT4.0, Windows98, Windows95
CD-ROM drive
PCMCIA card slot
Memory: 32 Mbytes or more (For Windows2000 and WindowNT4.0, memory with 64
Mbytes or more is recommended.)
Free space required on the hard disk: 8 Mbytes or more
2. Version. 6.0 AR2 of the compiler shall be used. You may also use the compilers from
Hitachi ULSI Systems Co., Ltd. or Hitachi Software Engineering Co., Ltd.
HI7750/4 with evaluation license (object) shall be used. You may also use HI7750/4
with mass-production license.
Rev. 1.0, 03/03, page 2 of 48
The HDI of the E10A emulator, SuperH RISC engine C/C++ compiler package, and HI7750/4
(for SHCV6) must have been installed in the Windows personal computer beforehand. The
SH7750 is a target CPU assumed in this manual.
Figure 1.2 shows the folder structure of HI7750/4 that you have just installed.
Figure 1.2 Folder Structure of HI7750/4
The install drive is “D” in this guide, but you may use a desired drive for installing HI7750/4. An
install folder is represented as the install folder “folder name” in this manual.
Rev. 1.0, 03/03, page 3 of 48
Rev. 1.0, 03/03, page 4 of 48
Section 2 Creating Application Programs
This section describes how to create application programs that run on HI7750/4. Figure 2.1 shows
the relationship among application programs. (The programs in the heavy-outline boxes are
created in this guide.)
CPU initialization routine
Reset start
HI7750/4 kernel
CPU initialization
Kernel
initialization routine
Timer
initialization routine
Initialization
routine call
TMU1 initialization
Task execution
return
Started by an interrupt
Main task
LED task
Interrupt handler
Event flag creation
LED task creation
iset_flg
wai_flg
LED control
(turning the LED on
when it is off or
turning it off when
it is on)
sta_tsk
ext_tsk
return
Figure 2.1 Relationship among Application Programs
Figure 2.2 shows the programs to be created in this guide.
Create a CPU initialization routine
Create tasks
Create an interrupt initialization module
Create an interrupt handler
Figure 2.2 Programs to be Created
Rev. 1.0, 03/03, page 5 of 48
2.1
Creating CPU Initialization Routine
After the CPU reset, the CPU initialization routine is executed for setting a bus state controller and
initializing the hardware.
The ROM monitor supplied with the Solution Engine has already set the bus state controller and
initialized the hardware. Thus, this guide omits the description of them.
Figure 2.3 shows the procedure to create the CPU initialization routine.
Set BSC
Set stack pointer
Set cache
Set BSC by _hi_cpuasm (7750_cpuasm.src).
Use the assembler language to write a
program before the stack area is reserved by
setting BSC.
Start a kernel by _hi_cpuini (7750_cpuini.c).
The stack pointer has been set. Use the C
language to write a program.
Start a kernel
Figure 2.3 Creating a CPU Initialization Routine
In the CPU initialization routine, the stack pointer must be reserved completely before you attempt
to execute any program written in the C language. Because the program created by the compiler
may locate the stack frame or work area in a stack, you cannot execute it until the stack area is
completely reserved.
Figures 2.4 to 2.6 show the parts to be changed in of _hi_cpuasm (7750_cpuasm.src).
Rev. 1.0, 03/03, page 6 of 48
;****************************************************************************;
;*
HI7000/4 CPU initialize routine
;*;
;*
Copyright (c) Hitachi, Ltd. 2000.
;*;
;*
Licensed Material of Hitachi, Ltd.
;*;
;*
HI7000/4(HS0700ITI41SR) V1.0
;*;
;****************************************************************************;
;****************************************************************************;
;* FILE
= 7612_cpuasm.src ;
;*;
;* CPU type = SH7612
;*;
;****************************************************************************;
.program
_hi_cpuasm
.heading
"hi_cpuasm : CPU initialize routine"
.export
_hi_cpuasm
.import
_hi_cpuini
.section
P_hicpuasm,code,align=4
;
;****************************************************************************;
;* BSC address
;*;
;****************************************************************************;
BSC_BASE
.assign h'ffffffc0
; BSC
base address (WCR2)
BCR1
.assign h'ffffffe0-BSC_BASE ; BCR1 address offset
CR2
.assign h'ffffffe4-BSC_BASE ; BCR2 address offset
BCR3
.assign h'fffffffc-BSC_BASE ; BCR3 address offset
WCR1
.assign h'ffffffe8-BSC_BASE ; WCR1 address offset
WCR2
.assign h'ffffffc0-BSC_BASE ; WCR2 address offset
WCR3
.assign h'ffffffc4-BSC_BASE ; WCR3 address offset
MCR
.assign h'ffffffec-BSC_BASE ; MCR
address offset
RTCSR
.assign h'fffffff0-BSC_BASE ; RTCSR address offset
RTCNT
.assign h'fffffff4-BSC_BASE ; RTCNT address offset
RTCOR
.assign h'fffffff8-BSC_BASE ; RTCOR address offset
;
MD_REG_BASE
.assign h'ffff8000
; mode register base address of SDRAM
;
CMF_BIT
.assign h'0080
; CMF bit in RTCSR
;
Figure 2.4 Parts to be Changed in _hi_cpuasm (7750_cpuasm.src)
Rev. 1.0, 03/03, page 7 of 48
;****************************************************************************;
;* BSC address
;*;
;****************************************************************************;
BSC_BASE
.assign h'ff800000
; BSC
base address
BCR1
.assign h'ff800000-BSC_BASE ; BCR1
address offset
BCR2
.assign h'ff800004-BSC_BASE ; BCR2
address offset
WCR1
.assign h'ff800008-BSC_BASE ; WCR1
address offset
WCR2
.assign h'ff80000c-BSC_BASE ; WCR2
address offset
WCR3
.assign h'ff800010-BSC_BASE ; WCR3
address offset
MCR
.assign h'ff800014-BSC_BASE ; MCR
address offset
PCR
.assign h'ff800018-BSC_BASE ; PCR
address offset
RTCSR
.assign h'ff80001c-BSC_BASE ; RTCSR
address offset
RTCNT
.assign h'ff800020-BSC_BASE ; RTCNT
address offset
RTCOR
.assign h'ff800024-BSC_BASE ; RTCOR
address offset
RFCR
.assign h'ff800028-BSC_BASE ; RFCR
address offset
;
SDMR2
.assign h'ff900000
; SDMR2 address
SDMR3
.assign h'ff940000
; SDMR3 address
;
CMF_BIT
.assign h'0080
; CMF bit in RTCSR
;
;****************************************************************************;
;* BSC initial data
;*;
;* After reset, you must initialize BSC for memory(stack) access at first.;*;
;* Please modify these definition in order to your hardware.
;*;
;****************************************************************************;
BCR1_DATA
.assign h'00000000
; BCR1
initial data
BCR2_DATA
.assign h'3ffc
; BCR2
initial data
WCR1_DATA
.assign h'77777777
; WCR1
initial data
WCR2_DATA
.assign h'fffeefff
; WCR2
initial data
WCR3_DATA
.assign h'07777777
; WCR3
initial data
MCR_DATA
.assign h'00000000
; MCR
initial data
PCR_DATA
.assign h'0000
; PCR
initial data
RTCSR_DATA
.assign h'a500 + h'00
; RTCSR
initial data
RTCNT_DATA
.assign h'a500 + h'00
; RTCNT
initial data
RTCOR_DATA
.assign h'a500 + h'00
; RTCOR
initial data
RFCR_DATA
.assign h'a400 + h'000
; RFCR
initial data
;
STP_REFRESH .assign h'a500
; RTCSR initial data(stop count-up)
;
SDMR2_DATA
.assign h'0230
; SDMR2
initial data
SDMR3_DATA
.assign h'0230
; SDMR3
initial data
;
IDLE_TIME
.assign h'1000
; loop counter for idle-time
REFRESH_CNT .assign h'8
; counter for dummy refresh
;
;****************************************************************************;
;*NAME
= _hi_cpuasm
;*;
;*FUNCTION = CPU initialize routine ;
;*;
;****************************************************************************;
_hi_cpuasm:
;***** Initialize BSC
;
mov.l
#BSC_BASE,r0
; set BSC base address to gbr
;
ldc
r0,gbr
;
;
mov.l
#BCR1_DATA,r0
; Initialize BCR1
;
mov.l
r0,@(BCR1,gbr)
;
;
mov.w
#BCR2_DATA,r0
; Initialize BCR2
;
mov.w
r0,@(BCR2,gbr)
;
;
mov.l
#WCR1_DATA,r0
; Initialize WCR1
;
mov.l
r0,@(WCR1,gbr)
;
;
mov.l
#WCR2_DATA,r0
; Initialize WCR2
;
mov.l
r0,@(WCR2,gbr)
;
;
mov.l
#WCR3_DATA,r0
; Initialize WCR3
;
mov.l
r0,@(WCR3,gbr)
;
Change the BSC
value according to
the hardware
Omit the comment to
set BSC
Figure 2.5 Parts to be Changed in _hi_cpuasm (7750_cpuasm.src)
Rev. 1.0, 03/03, page 8 of 48
;
mov.l
#MCR_DATA,r0
; Initialize MCR
;
mov.l
r0,@(MCR,gbr)
;
;
mov.w
#PCR_DATA,r0
; Initialize PCR
;
mov.w
r0,@(PCR,gbr)
;
;
mov.w
#STP_REFRESH,r0
; stop refresh
;
mov.w
r0,@(RTCSR,gbr)
;
;
mov.w
#RTCNT_DATA,r0
; Initialize RTCNT
;
mov.w
r0,@(RTCNT,gbr)
;
;
mov.w
#RTCOR_DATA,r0
; Initialize RTCOR
;
mov.w
r0,@(RTCOR,gbr)
;
;
mov.w
#RFCR_DATA,r0
; Initialize RFCR
;
mov.w
r0,@(RFCR,gbr)
;
;*** Initialize SDRAM
;
;
mov.l
#IDLE_TIME,r0
; loop for idle-time
;hicpuasm010:
;
add
#-1,r0
;
cmp/eq #0,r0
;
bf
hicpuasm010
;
;
mov.l
#SDMR2,r0
; Initialize SDMR(CS2)
;
mov.l
#SDMR2_DATA*4,r2
;
mov.b
r1,@(r0,r2)
; write dummy data(r1)
;
;
mov.l
#SDMR3,r0
; Initialize SDMR(CS3)
;
mov.l
#SDMR3_DATA*4,r2
;
mov.b
r1,@(r0,r2)
; write dummy data(r1)
;
;
mov.w
#RTCSR_DATA,r0
; Initialize RTCSR
;
mov.w
r0,@(RTCSR,gbr)
;
;
mov.w
#REFRESH_CNT,r2
;hi_cpuasm020:
;
mov.w
@(RFCR,gbr),r0
; read RFCR
;
cmp/ge r2,r0
; if end dummy refresh
;
bf
hi_cpuasm020
; else goto hi_cpuasm020
;
;hi_cpuasm030:
;
;***** Initialize sp and jump to hi_cpuini() written by C-language
mov.l
#CCN_BASE,r2
; get CCN base address
mov.l
#PON_CODE,r3
; get exception code to power-on
mov.l
@(EXPEVT,r2),r0
; get exception code
cmp/eq r3,r0
; if exception != power-on
bf
hi_cpuasm050
; then hi_cpuasm050
;
mov.l
#__kernel_pon_sp,r2
; get stack address
;
hi_cpuasm040:
mov
r2,r15
; set SP
;
mov.l
#_hi_cpuini,r0
; get hi_cpuini address
jmp
@r0
; jump to hi_cpuini()
nop
; never return to this point
;
hi_cpuasm050:
mov.l
#__kernel_man_sp,r2
; get stack address
bra
hi_cpuasm040
nop
;
.pool
;
.end
Omit the comment
to set BSC.
Set stack pointer
Jump to hi_cpuini
Set stack pointer
Figure 2.6 Parts to be Changed in _hi_cpuasm (7750_cpuasm.src)
Rev. 1.0, 03/03, page 9 of 48
Figure 2.7 shows the part to be changed in _hi_cpuini (7750_cpuini.c).
/****************************************************************************/
/*
HI7750/4 CPU initialize routine
*/
/*
Copyright (c) Hitachi, Ltd. 2001.
*/
/*
Licensed Material of Hitachi, Ltd.
*/
/*
HI7750/4(HS0775ITI41SR) V1.0A
*/
/****************************************************************************/
/****************************************************************************/
/* FILE
= 7750_cpuini.c ;
*/
/* CPU type = SH7750
*/
/****************************************************************************/
#include
<machine.h>
#include
"itron.h"
#include
"kernel.h"
#define CCR_DATA 0x0000090d
/* CACHE enable data
*/
/* extern
/* section-initialize routine
*/
void
_INITSCT(void); */
#pragma section _hicpuini
#pragma noregsave(hi_cpuini)
void
{
Change from cache
enable to cache
disable
hi_cpuini(void)
/*** Initialize Hardware Environment ***/
/* vini_cac((UW)CCR_DATA); */
/* vini_cac((UW)CCR_DATA);
CACHE enable
*/
Start a kernel
/*** Initialize Software Environment ***/
/*
_INITSCT();
*/
vsta_knl();
/* Call section-initialize routine
*/
/* Start kernel
*/
}
Figure 2.7 Part to be Changed in _hi_cpuini (7750_cpuini.c)
Set a bus state controller and create a hardware initialization routine for the specific hardware.
Rev. 1.0, 03/03, page 10 of 48
2.2
Creating Tasks
A task is the main processing of an application program.
Figure 2.8 shows the procedure to create and register a task.
Create a task
Do you want to use
a configurator to register
the task?
No
Yes
Start the configurator and
register the task*2
Register the task with the
cre_tsk service call*1
Notes: 1. The cre_tsk service call must be enabled to register the task.
For details, see the HI7000/4 Series User's Manual.
2. This procedure is described in section 3, Configurator.
Figure 2.8 Creating and Registering Task
Create a task by changing the sample (task.c) supplied with HI7750/4. The sample is in the install
folder “tutorial”.
In this guide, the main task (MainTask) is registered by the configurator and the LED task by the
cre_tsk service call.
Rev. 1.0, 03/03, page 11 of 48
2.2.1
Main Task
This section describes how to change MainTask contained in the sample program (task.c) supplied
with HI7750/4. Figure 2.9 shows the overview of changes made in MainTask. Starting task7
periodically turns the LED on and off.
Before change
After change
Create an event flag
Create an event flag
Create and start task7
Create and start task7
Wait for an event
Wait for an event
Delete event flag 6
Change stacd
Terminate and delete MainTask
Start task7
Delete event flag 6
Terminate and delete task7
Figure 2.9 Overview of Changes Made in MainTask
Figure 2.10 shows the parts to be changed in MainTask.
Rev. 1.0, 03/03, page 12 of 48
Define the include file supplied with the C compiler.
#include <machine.h>
#include "itron.h"
#include "kernel.h"
#include "kernel_id.h"
Required when using the HI7750/4 service call.
#define LED_ADR (UH *)0xb0c00000
void MainTask(VP_INT exinf);
void task7(VP_INT exinf);
Define the LED output port address. For details, see the
Solution Engine Overview Manual.
MainTask and task7 are the main functions for each task.
Another function never calls them. #pragma noregsave is
valid to suppress the stack area.
#pragma noregsave(MainTask, task7)
/***************************************************************************
* MainTask()
* This task is created and activated by Configurator.
* tskid : "ID_MainTask" (defined in kernel_id.h as this task's ID.)
* itskpri : 6
***************************************************************************/
void MainTask(VP_INT exinf)
{
union CrePacket{
T_CTSK t_ctsk; /* Creation info. for task */
T_CFLG t_cflg; /* Creation info. for event flag */
} packet;
ER ercd;
FLGPTN waiptn, flgptn;
/*** Create eventflag-6 ***/
packet.t_cflg.flgatr = TA_TFIFO|TA_WSGL|TA_CLR;
packet.t_cflg.iflgptn = 0;
ercd = cre_flg(6, (T_CFLG *)&packet);
/*** Create task-7 ***/
packet.t_ctsk.tskatr = TA_HLNG|TA_ACT;
packet.t_ctsk.exinf = 0;
packet.t_ctsk.task = (FP)task7;
packet.t_ctsk.itskpri = 7;
packet.t_ctsk.stksz = 0x200;
packet.t_ctsk.stk = (VP)NULL;
Define the task attribute.
If task7 uses the DSP, use the OR operator to define
TA_COP0.
(packet.t_ctsk.tskatr = TA_HLNG  TA_ACT  TA_COP0)
This allows the DSP register to be saved (to guarantee
a kernel) when changing a task.
Register the task and start it.
ercd = cre_tsk(7, (T_CTSK *)&packet);
/*** Wait for eventflag-6 ***/
waiptn = 0x11111111;
ercd = wai_flg(6, waiptn, TWF_ANDW, &flgptn);
/*** Delete eventflag-6 ***/
ercd = del_flg(6);
ext_tsk();
}
Wait for the event flag to set by the interrupt
handler. Change the exinf value and start
task7. At this time, exinf is passed to task7
as a start code.
for(;;) {
/*** Wait for eventflag-6 ***/
waiptn = 0x11111111;
ercd = wai_flg(6, waiptn, TWF_ANDW, &flgptn);
if(exinf == 0x00000000L) {
exinf = 0x0000ff00L;
} else {
exinf = 0x00000000L;
}
ercd = sta_tsk(7,exinf);
}
Figure 2.10 Changing MainTask
Rev. 1.0, 03/03, page 13 of 48
2.2.2
LED Task
This section describes how to change task7 of the sample program (task.c) supplied with
HI7750/4. Figure 2.11 shows the part to be changed in task7.
/***************************************************************************
* task7()
* This task is created and activated by MainTask.
* tskid : 7
* itskpri : 7
***************************************************************************/
void task7(VP_INT exinf)
{
ER ercd;
ercd = set_flg(6, 0xffffffff);
*LED_ADR = (UH)exinf;
ext_tsk();
while(1);
Turn the LED on or off according
to the exinf value, and then
terminate itself (task7)
}
Figure 2.11 Changing task7
2.3
Creating an Interrupt Handler
The interrupt handler is started by an external interrupt that suspends another processing.
Figure 2.12 shows the procedure to create and register the initialization module and the interrupt
handler.
Rev. 1.0, 03/03, page 14 of 48
Do you need an
initialization module?
No
Yes
Create the initialization module
Do you want to
use a configurator to register
the initialization
module?
No
Yes
Start the configurator and
register the initialization module*2
Call the subroutine
(initialization module)*1
Create an interrupt handler
Do you want to
use the configurator to register
the interrupt
handler?
No
Yes
Start the configurator and
register the interrupt handler*2
Register the interrupt handler
by the def_inf service call*1
Notes: 1. The def_inf service call must be enabled to register the interrupt handler.
For details, see the HI7000/4 Series User's Manual.
2. This procedure is described in section 3, Configurator.
Figure 2.12 Creating and Registering Initialization Module and Interrupt Handler
This guide describes how to use the on-chip TMU1 in the SH7750 to create the interrupt handler
and how to use a configurator to register it.
Create the tmu1.c file for the initialization module and the interrupt handler and store the file in
the install folder “tutorial”.
Table 2.1 lists the interrupt conditions.
Rev. 1.0, 03/03, page 15 of 48
Table 2.1
Interrupt Conditions
Item
Description
Function
File Name
Initialization module
Required. Use the configurator to register the
module.
TMU1_ini
tmu1.c
Interrupt handler
Use the configurator to register the handler.
TMU1_int
tmu1.c
Interrupt cycle
An interrupt occurs every one second.


Interrupt level
1


Rev. 1.0, 03/03, page 16 of 48
2.3.1
Creating Initialization Module
This section describes how to create an initialization module for the on-chip TMU1 in the
SH7750. The initialization module initializes the TMU1 and sets the interrupt cycle and level.
Figure 2.13 shows the procedure to create the initialization module.
Start
Save GBR
Set the TPU base address in GBR
Stop TCNT of the TMU1
Set the INTC base address in GBR
Set the TMU base address in GBR
Read IPRA
Set TCR
Clear the IPRA-TMU1 level
Dummy-read TCR
Set the IPRA-TMU1 level to 1
Set TCOR
Set the BL bit to mask the interrupt
Set TCNT
Set IPRA
Start TCNT of the TMU1
Dummy-read IPRA
Clear the BL bit to enable the interrupt
Restore GBR to the original state
End
Figure 2.13 Creating Initialization Module
Figures 2.14 and 2.15 show the contents of TMU1_ini (tmu1.c).
Rev. 1.0, 03/03, page 17 of 48
#include <machine.h>
#include "itron.h"
#include "kernel.h"
#define BL_BIT 0x10000000
/* BL bit pattern
/* Peripheral Clock (FRQCR set value = H'0E13 (CPU:Bus:P = 200:33:33 MHz))
#define PCLK
33333400
*/
*/
/* TSTR set value */
#define TCNT1_STA
#define TCNT1_STP
0x02
0xfd
/* Start TCNT of the TMU1
/* Stop TCNT of the TMU1
/* TCR set value */
#define DIV
#define DIV64
#define UNIE
4
0x0000
0x0020
/* Division ratio = 4
*/
/* Division ratio = 1/4
*/
/* Interrupt generated by an underflow of the TCR1 */
*/
*/
/* TCNT set value */
#define INTERVAL
1000000
/* 1 second: 1000ms: 1000000us
*/
#define TCNT1_DAT (UW) (((double)INTERVAL/(((double)1000000/(double)PCLK)*(double)DIV))-(double)1)
/* (1 second/ ( (1second/33.3334 MHz)*4))-1 */
/* IPRA set value */
#define IPRA_CLR_TPU1
#define TMU1_LVL
0xf0ff
1
/* TMU,IPRA I/O address */
#define TMU_BASE 0xffd80000
#define TSTR
(0xffd80004
#define TCOR1
(0xffd80014
#define TCNT1
(0xffd80018
#define TCR1
(0xffd8001C
#define INTC_BASE 0xffd00000
#define IPRA
(0xffd00004
/* IPR bit8-11 clear data
/* TMU1 interrupt level = 1
/*
/*
/*
/*
/*
/*
- INTC_BASE) /*
-
TMU_BASE)
TMU_BASE)
TMU_BASE)
TMU_BASE)
TMU base address
TMU TSTR
TMU TCOR(ch1)
TMU TCNT(ch1)
TMU TCR (ch1)
INTC base address
INTC IPR(IPRA:TMU-ch0)
*/
*/
*/
*/
*/
*/
*/
*/
*/
/****************************************************************************/
/* NAME
= TMU1_ini
*/
/* FUNCTION = initialize the TMU1
*/
/****************************************************************************/
void TMU1_ini (void)
{
VP
gbrsave;
/* GBR save area
UH
ipra;
/* IPRA retention area
*/
*/
gbrsave = get_gbr ();
set_gbr((VP)TMU_BASE);
/* Save GBR
/* Set the TPU base address in GBR
*/
*/
gbr_and_byte(TSTR,TCNT1_STP);
/* Stop the TCNT of the TMU1
*/
set_gbr((VP)INTC_BASE);
ipra = gbr_read_word (IPRA);
ipra &= IPRA_CLR_TPU1;
ipra |= TMU1_LVL << 8;
/*
/*
/*
/*
Set the INTC base address in GBR
Read IPRA
Clear the IPRA-TMU1 level
IPRA-TMU1 level = 1
*/
*/
*/
*/
set_cr (BL_BIT | get_cr ());
gbr_write_word (IPRA,ipra);
gbr_read_word (IPRA);
/* Set the BL bit to mask an interrupt
/* Set IPRA
/* Dummy-read IPRA
*/
*/
*/
set_gbr((VP)TMU_BASE);
gbr_write_word(TCR1,UNIE|DIV4);
gbr_read_word(TCR1);
/* Set the TPU base address in GBR
/* Set TCR
/* Dummy-read TCR
*/
*/
*/
gbr_write_long(TCOR1,TCNT1_DAT);
gbr_write_long(TCNT1,TCNT1_DAT);
gbr_or_byte(TSTR, TCNT1_STA);
/* Set TCOR
/* Set TCNT
/* Start the TCNT of the TMU1
*/
*/
*/
set_cr(~BL_BIT & get_cr());
set_gbr(gbrsave);
/* Clear the BL bit to enable an interrupt */
/* Restore GBR to the original state
*/
}
Figure 2.14 Contents of TMU1_ini (tmu1.c)
Rev. 1.0, 03/03, page 18 of 48
2.3.2
Creating Interrupt Handler
This section describes how to create an interrupt handler for the on-chip TMU1 in the SH7750.
The interrupt handler clears an interrupt source of the TMU1 and issues an event flag to task7.
Figure 2.15 shows the procedure to create the interrupt handler.
Save GBR
Set the TPU base address in GBR
Set the BL bit to mask an interrupt
Clear TCR (Clear an interrupt source)
Dummy-read TCR
Issue iset_flg
Clear the BL bit to enable an interrupt
Restore GBR to the original state
Figure 2.15 Creating Interrupt Handler
Figure 2.17 shows the contents of TMU1_int (tmu1.c).
/****************************************************************************/
/* NAME
= TMU1_int
*/
/* FUNCTION = TMU1 interrupt handler
*/
/****************************************************************************/
void
TMU1_int(void)
{
VP
gbrsave;
/* GBR save area
}
*/
gbrsave = get_gbr();
set_gbr((VP)TMU_BASE);
set_cr(BL_BIT | get_cr());
/* Save GBR
/* Set the TPU base address in GBR
/* Set the BL bit to mask an interrupt
*/
*/
*/
gbr_write_word(TCR1,UNIE|DIV4);
gbr_read_word(TCR1);
/* Clear UNF
/* Dummy-read TCR
*/
*/
iset_flg(6, 0xffffffff);
/* Set an event flag for task7
*/
set_cr(~BL_BIT & get_cr());
set_gbr(gbrsave);
/* Clear the BL bit to enable an interrupt */
/* Restore GBR to the original state
*/
/* ret_int
*/
Figure 2.17 Contents of TMU1_int (tmu1.c)
Rev. 1.0, 03/03, page 19 of 48
Rev. 1.0, 03/03, page 20 of 48
Section 3 Configuration
Configuration means to register the programs created in section 2 to HI7750/4. HI7750/4 provides
a tool that allows easy configuration using GUI and a configurator.
This section describes how to use the configurator to register the application programs.
Figure 3.1 shows the programs to be registered in this guide.
Register the task
Register the interrupt initialization routine
Register the interrupt handler
Figure 3.1 Programs to be Registered
The defaults are used for programs other than those above.
For details of each program set by the configurator, see the Configurator Help.
Rev. 1.0, 03/03, page 21 of 48
3.1
Starting Configurator
Double-click the configurator set file (7750.hcf) to start the configurator. The 7750.hcf file is in
the install folder “sh7750”.
Figure 3.2 shows the Configurator Startup screen.
Figure 3.2 Configurator Startup Screen
3.2
Interrupt Mask Level
Table 3.1 lists the interrupt mask levels for the application programs in this guide.
Table 3.1
Interrupt Mask Levels
Type
Mask Level
Task
0
Interrupt handler
1
Kernel
14
Rev. 1.0, 03/03, page 22 of 48
Remarks
Default
Click kernel operational conditions in the HI7750/4 Configuration Information area on the
Configuration Startup screen to view the screen in figure 3.2. In this screen, the mask level for a
kernel interrupt can be set. Since the default value (14) is used for the mask level of a kernel
interrupt in this guide, you do not need to change the interrupt level.
3.3
Registering Task
Click Task in the HI7750/4 Configuration Information area on the Configuration Startup screen to
view the Task Information screen in figure 3.3.
Figure 3.3 Task Information Screen
Click the Change button in the Task Information area in figure 3.3 to view the Modification of
Task Information screen in figure 3.4.
Rev. 1.0, 03/03, page 23 of 48
Figure 3.4 Modification of Task Information Screen
On this screen, you can change the maximum task ID, the maximum task ID using static stacks,
maximum task priority, and the total size of the dynamic stack area. For details about differences
between static stacks and dynamic stacks, see section 2.6.6, Task Stack, in the HI7000/4 Series
User’s Manual.
For details about how to calculate the task stack size, see Appendix C, Calculation of Work Area
Size, in the HI7000/4 Series User’s Manual.
In this guide, the defaults are used for registering the task. You do not need to change the task
information.
Rev. 1.0, 03/03, page 24 of 48
3.4
Registering Interrupt Handler
Click Interrupt and CPU Exception Handler in the HI7750/4 Configuration Information area on
the Configuration Startup screen to view the List of Interrupt/CPU/Trap Exception Handlers
screen in figure 3.5.
Figure 3.5 List of Interrupt/CPU/Trap Exception Handlers Screen
Register the timer interrupt handler in this guide. Use the mouse on the scroll bar on the right of
the List of Interrupt/CPU/Trap Exception Handlers to view the exception code around 0x0420.
Double click exception code 0x0420 to view the Definition of Interrupt/CPU/Trap Exception
Handler screen in figure 3.6.
The exception code, 0x0420, is used for the TMU1 interrupt exception code in this guide. For
details of the exception code, see the SH7750 Hardware Manual.
Double click exception code 0x0420 to view the screen shown in figure 3.6.
Rev. 1.0, 03/03, page 25 of 48
Figure 3.6 List of Interrupt/CPU/Trap Exception Handlers Screen
Set TMU1_int in the Address box. The mask level of the interrupt handler in this guide is 1. So
change the SR register setting to 0x4000010.
This SR register setting is used as a SR register setting when control is passed to the TMU1_init
interrupt handler. The level should be set to higher than hardware interrupt levels. However, if a
service call is issued from the interrupt handler, the level must be set to less than the level of a
kernel.
Figures 3.7 and 3.8 show the Definition of Interrupt/CPU/Trap Exception Handler screens after
you made definitions.
Rev. 1.0, 03/03, page 26 of 48
Figure 3.7 Definition of Interrupt/CPU/Trap Exception Handler Screen
Figure 3.8 Definition of Interrupt/CPU/Trap Exception Handler Screen
(after Making Definitions)
Rev. 1.0, 03/03, page 27 of 48
3.5
Registering Initialization Routine
Click Initialization Routine in the HI7750/4 Configuration Information area on the Configurator
Startup screen to view the Initialization Routine List screen in figure 3.9.
The initialization routine that is registered on this screen is called immediately after the kernel
startup (setup) completes and executed with the kernel mask level (the value set for the kernel
operational conditions in the configuration information). This routine differs from the CPU
initialization routine that is executed immediately after a reset.
In the initialization routine, the service call of a kernel can be issued.
The issuable service call is the one that can be called from non-task context (system state: N)
described in section 3, Service Calls, in the HI7000/4 Series User’s Manual.
The initialization routine is used for the following purposes:
1.
Interrupt initialization
2.
Initialization routine for task setup
3.
Event flag, mailbox, or memory pool of which initial setting is to be completed before passing
the control to a task or an interrupt handler
Figure 3.9 List of Initialization Routines Screen
Rev. 1.0, 03/03, page 28 of 48
Right click on the blank area of the List of Initialization Routines to view the menu. Then, select
Register to view the Registration Initial Routine screen in figure 3.10.
The following explains how to register the initial routine.
Figure 3.10 Registration of Initialization Routine Screen
Rev. 1.0, 03/03, page 29 of 48
Set TMU1_ini in the Address box and click the Register button, and then the Close button. Use the
expression below to obtain the stack size.
• TMU1_ini stack frame size:
8 bytes
• Required size for the initialization routine:
192 + 24 bytes
Total:
224 bytes
For details about how to calculate the stack size, see Appendix C, Calculation of Work Area Size,
in the HI7000/4 Series User’s Manual. Use the default since the calculated stack size is smaller
than it.
Figure 3.11 shows the Registration of Initialization Routine screen after registration. Figure 3.12
shows the List of Initialization Routines screen after registration.
Figure 3.11 Registration of Initialization Routine Screen (after Registration)
Rev. 1.0, 03/03, page 30 of 48
Figure 3.12 List of Initialization Routines Screen (after Registration)
3.6
Registering Event Flag Information
Click Event Flag in the HI7750/4 Configuration Information area on the Configuration Startup
screen to view the Event Flag Information screen in figure 3.13.
Click the Change button in the Event Flag Information area to change the maximum event flag ID.
Right click on the blank area of the Event Flag List and select Create to view the Creation of
Event Flag screen in figure 3.14. For initial creation of an event flag, set the information about the
event flag on this screen.
The application implemented in this guide dynamically creates one event flag in the task. Use the
default event flag information.
Rev. 1.0, 03/03, page 31 of 48
Figure 3.13 Event Flag Information Screen
Figure 3.14 Creation of Event Flag Screen
Rev. 1.0, 03/03, page 32 of 48
3.7
Creating Configuration Files
Click the Create button on the Configurator Startup screen to create the configuration files
required for configuring HI7750/4. For details about the configuration files, see section 5.1.2,
Configurator Output File, in the HI7000/4 Series User’s manual.
Now, the definition and registration by the configurator are complete. To close 7750.hcf, choose
Overwrite or Save As from the File menu to save all the information.
3.8
Building the Executable File by HEW
Compile and link the files created by the configurator using HEW supplied with SHC/C++
compiler to create the executable file to be downloaded. This section describes how to build the
executable file by HEW.
There are two methods to configure HI7750/4. Table 3.2 lists the type of links.
Table 3.2
Type of Links
Type
Description
Whole linkage
Links the kernel and all configuration files into a single load module (called a
whole load module).
Separate linkage
Links the kernel code portion (called a kernel load module) and the kernel
data portion (called a kernel environment load module) into separate load
modules.
Application files can be included in a kernel load module, a kernel
environment load module, or in an independent application load module.
For details, see section 5, Configuration, in the HI7000/4 Series User’s Manual.
This guide describes how to use the whole link method to configure the program in big endian
format.
Rev. 1.0, 03/03, page 33 of 48
3.8.1
Starting HEW
Double click hios.hws in the install folder “hios” to start HEW to build HI7750/4. Figure 3.15
shows the HEW Startup screen.
Figure 3.15 HEW Startup Screen
The standard project file hios.hws contains three sub-projects to configure the program for the
target CPU. Table 3.3 lists the type of project files.
Table 3.3
Project Files
7750_mix
Project file for creating the whole load module for the whole link method
7750_cfg
Project file for creating the kernel load module for the separate link method
7750_def
Project file for creating the kernel environment load module for the separate
link method
Select the project file 7750_mix for creating the whole load module.
Rev. 1.0, 03/03, page 34 of 48
3.8.2
Defining Configuration File
Define each application program created in section 2 as a project file. Use the default project file
configuration and define only the timer driver to implement the sample program operation in this
guide.
On the Current Project Set screen, select Add Files... from the Project menu to add tmu1.c as a
project file. Figures 3.16 and 3.17 show the screen for adding a file.
Figure 3.16 Adding a File
Rev. 1.0, 03/03, page 35 of 48
Figure 3.17 Adding a File
Now, defining the configuration files completes.
Rev. 1.0, 03/03, page 36 of 48
3.8.3
Changing a Linkage Address
Change the linkage addresses to run the programs on the Solution Engine address map.
The Solution Engine is supplied with 32-Mbyte SDRAM from 0x0C00000 to 0x0FFFFFFF. In
this guide, 16 Mbytes from 0x0C00000 to 0x0CFFFFFF are used.
Select OptLinker from the Options menu to view the OptLinker Options screen (figure 3.18).
Figure 3.18 Selecting OptLinker
Rev. 1.0, 03/03, page 37 of 48
• Changing a kernel stack pointer
Double click _kernel_pon_sp and _kernel_man_sp in the Input tab and set the value so that the
values point to the end address of the RAM mounted on each hardware + 1 (0xAD000000 in P2
space) as shown in figures 3.19 to 3.21.
Figure 3.19 OptLinker options Screen
Figure 3.20 OptLinker options Screen (_kernel_pon_sp)
Rev. 1.0, 03/03, page 38 of 48
Figure 3.21 OptLinker options Screen (_kernel_man_sp)
• Changing a section address
Click the Section tab to view the Define Section screen (figure 3.22).
Figure 3.22 Define Section Screen
Click Address for each section to enable the Modify... button. Change the section addresses as
listed in table 3.4.
Rev. 1.0, 03/03, page 39 of 48
Table 3.4
Section Addresses
Section
Name
Before
Change
After
Change
Section
Name
Before
Change
After
Change
P_hiexpent
80000100
8C000100
B_hiwrk
8C000000
8C010000
C_hibase
80001000
8C001000
B_himpl
A0000000
AC000000
P_hireset
B_hidystk
C_hivct
B_histstk
C_hitrp
B_hiirqstk
P_hiknl
B_hitrcbuf
C_hidef
B_hitrceml
C_hisysmt
B
C_hicfg
R
P_hisysdwn
P_hicpuasm
P_hiintdwn
P_hicpuini
P_hitmrdrv
P
C
D
Rev. 1.0, 03/03, page 40 of 48
3.8.4
Build
Execute HEW to build an executable file that can be downloaded to the Solution Engine by the
E10A emulator. Select Build from the Build menu. Figure 3.23 shows the screen for selecting
Build.
Figure 3.23 Selecting Build
The executable file is created by selecting Build. The result of compilation and linkage is shown at
the bottom of the window. If a compile error occurs, correct the applicable source and build the
file again. The executable file (with the file extension .abs) is created in the install folder
“obj_big”.
Now you can download the file to the Solution Engine by the E10A emulator and execute it. For
details about how to download and execute the file, see section 4, Downloading and Executing
Application Programs.
Rev. 1.0, 03/03, page 41 of 48
3.9
Disabling Parameter Check Function
When debugging the application programs completes and they are ready to be installed into the
product, you can disable the parameter check function. This check function is an unnecessary
routine performed in the beginning of the service call, in the HI series operating system.
You can use the configurator to disable the parameter check function. Figure 3.24 shows the
screen for disabling the parameter check function.
Figure 3.24 Disabling Parameter Check Function
Click Kernel Extended Function on the Configurator Startup screen to view the screen in figure
3.24. Uncheck the Install the Parameter Check Function checkbox and create and build the
configuration files. The executable file with the parameter check function disabled is created.
Rev. 1.0, 03/03, page 42 of 48
Section 4 Downloading and Executing
Application Programs
This section describes how to use the E10A to download the executable file created in section 3,
Configuration, and run it on the Solution Engine.
4.1
Initializing Solution Engine
The ROM monitor supplied with the Solution Engine initializes the CPU. In this guide, this
monitor is used for the CPU initialization. (When using another board, you must use a specific
CPU initialization routine. For details of CPU initialization, see section 2.1, Creating CPU
Initialization Routine.)
Configure the system as shown in figure1.1 in section 1, Overview. Start the host computer, turn
the Solution Engine on, select HDI for E10A SH7750 from the Windows Start menu to start the
HDI. Figure 4.1 shows the HDI Startup screen.
Figure 4.1 HDI Startup Screen
Then, choose Go from the Run menu (figure 4.2).
Rev. 1.0, 03/03, page 43 of 48
Figure 4.2 Go menu
After one or two seconds, click the STOP button (red) on the menu bar. Now, initializing the
Solution Engine completes and this allows reading from or writing to the SDRAM supplied with
the Solution Engine.
Rev. 1.0, 03/03, page 44 of 48
4.2
Downloading Application Program
Download the executable file created in section 3, Configuration, to the E10A.
Figure 4.3 shows the screen for downloading the executable file.
Figure 4.3 Downloading Executable File
Select Load Program... from the File menu on the HDI Startup screen. On the Load Program
screen in figure 4.3, enter the name of the executable file to download in the File Name box and
click the Open button to download it. The executable file is 7750_mix.abs in the install folder
“obj_big”.
After downloading succeeds, the Complete Download screen in figure 4.4 appears.
Rev. 1.0, 03/03, page 45 of 48
Figure 4.4 Complete Download Screen
Click the OK button on the Complete Download screen.
4.3
Executing Application Program
To execute the program, choose Registers from the View menu on the HDI Startup screen to view
the register information (figure 4.5).
Figure 4.5 Register Information
Then, change the PC value. Double click the PC value on the Register Information screen to view
the Change PC Value screen (figure 4.6).
Rev. 1.0, 03/03, page 46 of 48
Figure 4.6 Change PC Value Screen
Change the PC value to AC000000 as shown in figure 4.6 and click the OK button. This value is
the start address of the CPU initialization routine.
Now, you can execute the program. Select Go from the Run menu to execute the program (figure
4.7).
Figure 4.7 Execute Program Screen
Rev. 1.0, 03/03, page 47 of 48
Rev. 1.0, 03/03, page 48 of 48
HI7750/4 Hitachi Industrial Realtime Operating System
Configuration Guide
Publication Date: 1st Edition, March 2003
Published by:
Business Operation Division
Semiconductor & Integrated Circuits
Hitachi, Ltd.
Edited by:
Technical Documentation Group
Hitachi Kodaira Semiconductor Co., Ltd.
Copyright © Hitachi, Ltd., 2003. All rights reserved. Printed in Japan.
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