Schematic for conga-LDVI
5
D
4
3
2
1
LVDV
P1
P2
PLVDVLB0
011112 conga-LDVI
BM1
BM2
BM3
D
BM4
Fiducial Kreuz Fiducial Kreuz Fiducial Punkt Fiducial Punkt
Panel connector to DVI Adapter
M1
Rev. B.0
MESDBAG127x203
M2
M3
MESDLABEL51x25
ML0002
PACKAGING / LABEL
C
C
Content
M5
Mounting Hole 7.0x4.0mm
M6
Mounting Hole 7.0x4.0mm
M7
1
M4
1
MAIN
connector 2 digital
digital to DVI
POWER
Revision History
1
1
2
3
4
5
1
Page
Page
Page
Page
Page
Mounting Hole 7.0x4.0mm
Mounting Hole 7.0x4.0mm
B
B
Variants
Base
Components used on all options
C1
DGND
nu
C15nS06V630X
Congatec AG
Auwiesenstrasse 5
D-94469 Deggendorf
Germany
A
A
Title
LVDV - LVDS to DVI Adapter Card
Size
B
Date:
5
4
3
2
Document Number
LVDVSB0
Monday, October 13, 2008
Rev
B.0
Sheet
1
1
of
5
5
4
3
2
1
X1
GND
GND
GND
GND
GND
4
3
NC1
NC0
LCD_I2CLK
LCD_I2DAT
2
1
LVDS Option
LCD_I2CLK
LCD_I2DAT
DVO_D[0..23]
DETECT#
LTGIO
BIASON
32
14
17
BLON#
DIGON
11
8
LCDDO19
LCDDO18
33
34
LCDDO17
LCDDO16
30
31
LCDDO15
LCDDO14
28
27
LCDDO13
LCDDO12
25
24
LCDDO11
LCDDO10
22
21
LCDDO9
LCDDO8
18
19
LCDDO9
LCDDO8
LCDDO7
LCDDO6
16
15
LCDDO7
LCDDO6
LCDDO5
LCDDO4
12
13
LCDDO5
LCDDO4
LCDDO3
LCDDO2
10
9
LCDDO3
LCDDO2
7
6
LCDDO1
LCDDO0
R5%100RS03
R1
R2
VCC3
R3
R4
C
LCDDO1
LCDDO0
R5
R5%10kS03
R6
1
2
D
29
26
23
20
5
PD_LVDS
VCC3
FB1
DVO_D[0..23]
U1
LCDDO1
LCDDO0
LCDDO3
LCDDO2
LCDDO5
LCDDO4
LCDDO9
LCDDO8
10
9
12
11
16
15
20
19
RXIN0+
RXIN0RXIN1+
RXIN1RXIN2+
RXIN2RXIN3+
RXIN3-
LCDDO7
LCDDO6
18
17
RXCLKIN+
RXCLKIN-
25
PDN
31
40
48
56
13
23
22
24
8
14
21
4
28
36
44
52
VCC
VCC
VCC
VCC
LVDSVCC
PLLVCC
PLLGND
PLLGND
LVDSGND
LVDSGND
LVDSGND
GND
GND
GND
GND
GND
FB2
FB3
FB120R0A5S03
C2
C10uS05V16X
C3 C4 C5 C6
C10nS03V10X
(3)
R0
R1
R2
R3
R4
R7
R5
G0
G1
G2
G6
G7
G3
G4
G5
B0
B6
B7
B1
B2
B3
B4
B5
RXOUT0
RXOUT1
RXOUT2
RXOUT3
RXOUT4
RXOUT5
RXOUT6
RXOUT7
RXOUT8
RXOUT9
RXOUT10
RXOUT11
RXOUT12
RXOUT13
RXOUT14
RXOUT15
RXOUT16
RXOUT17
RXOUT18
RXOUT19
RXOUT20
RXOUT21
RXOUT22
RXOUT23
RXOUT24
RXOUT25
RXOUT26
RXOUT27
27
29
30
32
33
34
35
37
38
39
41
42
43
45
46
47
49
50
51
53
54
55
1
2
3
5
6
7
DVO_D16
DVO_D17
DVO_D18
DVO_D19
DVO_D20
DVO_D23
DVO_D21
DVO_D8
DVO_D9
DVO_D10
DVO_D14
DVO_D15
DVO_D11
DVO_D12
DVO_D13
DVO_D0
DVO_D6
DVO_D7
DVO_D1
DVO_D2
DVO_D3
DVO_D4
DVO_D5
DVO_HSYNC
DVO_VSYNC
DVO_BLANK
DVO_D22 R6
DVO_HSYNC (3)
DVO_VSYNC (3)
DVO_BLANK (3)
RXCLKOUT
26
DVO_CLK
DVO_CLK (3)
D
C
UDS90C386
XST2MMTH2x17
B
B
U2
(3) LCD_I2DAT
(3) LCD_I2CLK
LCD_I2DAT
LCD_I2CLK
R7
R8
R9
5
6
SDA
SCL
7
WP
1
2
3
A0
A1
A2
VCC3
VCC
8
C7
C10nS03V10X
GND
4
R5%100RS03 AT24C02
Congatec AG
Auwiesenstrasse 5
D-94469 Deggendorf
Germany
A
A
Title
Panelcon & LVDS
Size
B
Date:
5
4
3
2
Document Number
LVDVSB0
Thursday, October 09, 2008
Rev
B.0
Sheet
1
2
of
5
5
4
3
2
AVCC33
C8
C100nS03V10X
1
FB4
VCC3
C14
C100nS03V10X
D
C13
C100nS03V10X
C12
C100nS03V10X
C9
C100nS03V10X FB120R0A5S03
FB5
C11
C100nS03V10X FB120R0A5S03
VCC3
C10
C10uS05V16X
FB6
D
C15
C100nS03V10X FB120R0A5S03
12
1
33
23
29
18
49
DVO_D[0..23]
DVO_CLK
(2) DVO_CLK
AVCC33
R21
R23
2
2
nu
1 R5%0R0S03
1 R5%0R0S03
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
57
56
IDCK+
IDCK-
34
RESERVED
AGP_VREF
3
C16
C100nS03V10X
11
MSEN
TXCTXC+
TX2TX2+
TX1TX1+
TX0TX0+
EXT_SWING
21
22
30
31
27
28
24
25
19
DVI_TXCDVI_TXC+
DVI_TX2DVI_TX2+
DVI_TX1DVI_TX1+
DVI_TX0DVI_TX0+
EXT_SWING R11 1
DKEN
EDGE/HTPLG
35
9
DSEL/SDA
BSEL/SCL
14
15
R12 1
R13 1
R14 1
R15 1
R16 1
R17 1
ISEL/RST#
DE
13
2
ISEL
R18 1
DVO_BLANK
HSYNC
VSYNC
4
5
DVO_HSYNC
DVO_VSYNC
CTL1/A1/DK1
CTL2/A2/DK2
CTL3/A3/DK3
8
7
6
A1
A2
A3
PD#
VREF
UTFP410
output high if receiver detected
R10 1
2 R5%5k6S03
MSEN
GND1
GND2
GND3
AGND1
AGND2
AGND3
PGND
M1
M2
M3
M4
C
63
62
61
60
59
58
55
54
53
52
51
50
47
46
45
44
43
42
41
40
39
38
37
36
VCC1
VCC2
VCC3
AVCC1
AVCC2
PVCC1
PVCC2
U3
DVO_D0
DVO_D1
DVO_D2
DVO_D3
DVO_D4
DVO_D5
DVO_D6
DVO_D7
DVO_D8
DVO_D9
DVO_D10
DVO_D11
DVO_D12
DVO_D13
DVO_D14
DVO_D15
DVO_D16
DVO_D17
DVO_D18
DVO_D19
DVO_D20
DVO_D21
DVO_D22
DVO_D23
10
DKEN
EDGE
R24 1
R19
R20
R22
nu
nu
VCC3
2 R5%510RS03
2
2
2
2
2
2
R5%5k6S03
R5%5k6S03
R5%5k6S03
R5%5k6S03
R5%5k6S03
R5%5k6S03
AVCC33
DKEN high = enable
data skew
VCC3
VCC3
EDGE high = rising edge
DSEL is don't care
BSEL high = 24bit single edge
VCC3
ISEL low = disable I2C
2 R5%5k6S03
DVO_BLANK (2)
DVO_HSYNC
DVO_VSYNC
1
1
1
nu
nu
nu
(2)
(2)
2 R5%2k2S03
2 R5%2k2S03
2 R5%2k2S03
2 R5%5k6S03
C
For SIL164 the resistor
R16 is not used!
DSEL is inverted to TFP410!
VCC3
data skew switch
VCC3
PD high = normal operation
PD_DVI (2)
16
48
64
20
26
32
17
M1
M2
M3
M4
(2) DVO_D[0..23]
B
B
FB7
VCCA
FB120R0A5S03
X2
DVI_TX2DVI_TX2+
(2) LCD_I2CLK
(2) LCD_I2DAT
LCD_I2CLK
LCD_I2DAT
R25
R26
2
2
nu
nu
1 R5%0R0S03
1 R5%0R0S03
DDCCLK
DDCDAT
DVI_TX1DVI_TX1+
A
1
2
3
4
5
6
7
8
9
10
11
12
DATA2#
DATA2
SHIE_D2/4
DATA4#
DATA4
DDCCLK
DDCDATA
NC/VS
DATA1#
DATA1
SHIE_D1/3
DATA3#
DATA3
VCC5
GND5
HPDET
DATA0#
DATA0
SHIE_D0/5
DATA5#
DATA5
SHIELD_CLK
CLK
CLK#
13
14
15
16
17
18
19
20
21
22
23
24
25
26
HOLDER1
HOLDER2
HOLDER3
HOLDER4
H1
H2
C17
C10uS05V16X
DVI_TX0DVI_TX0+
DVI_TXC+
DVI_TXC-
Congatec AG
Auwiesenstrasse 5
D-94469 Deggendorf
Germany
XDVI_D_24
A
Title
DVI
Size
B
Date:
5
4
3
2
Document Number
LVDVSB0
Thursday, October 09, 2008
Rev
B.0
Sheet
1
3
of
5
5
4
3
2
VCCA
1
VCC3
VCCIN
D
X3
D
U4
ULT1117CST3V3
D1
1
2
3
4
3
VIN
VOUT
VOUTPAD
ADJ
VCCIN
2
4
1
DMBR130LSFT1
D2
VCC
XTHFLPYPWR
DMBR130LSFT1
C18
C10uS05V16X
C19
C10uS05V16X
+
C20
CLE330UD6E10
C
C
VCC
D3
nu
R27
D5
nu
SW_VDD
SW_BACK
X4
R5%510RS03
DLED1206GRN
R29
LVDS_VDD_EN
DLED1206GRN
VCC
D7
R5%150RS03
R31
1
3
5
7
9
1
3
5
7
9
R28
nu
R5%510RS03
2
4
6
8
10
2
4
6
8
10
LCD_12V
BKLT_EN
POTI_W
R30
D4
nu
DLED1206GRN
D6
R5%510RS03
R32
DLED1206GRN
D8
VCC
DLED1206RED
nu
D9
VCC
XSHEAD10
DLED1206RED
R5%150RS03
R5%510RS03
nu
R34
R33
R5%0R0S03
B
nu
R5%510RS03
B
DLED1206GRN
Congatec AG
Auwiesenstrasse 5
D-94469 Deggendorf
Germany
A
A
Title
POWER
Size
B
Date:
5
4
3
2
Document Number
LVDVSB0
Thursday, October 09, 2008
Rev
B.0
Sheet
1
4
of
5
5
4
3
2
1
Revision History
D
Rev. X.0
WKA
design created;
Rev. A.0
WKA
removed digital feature;
Rev. B.0
WKA
changed all FB to 0603, add LEDs;
D
C
C
B
B
Congatec AG
Auwiesenstrasse 5
D-94469 Deggendorf
Germany
A
A
Title
Revision History
Size
B
Date:
5
4
3
2
Document Number
LVDVSB0
Thursday, October 09, 2008
Rev
B.0
Sheet
1
5
of
5
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