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Atmel LED Drivers
MSL2021
2-String LED Driver with Built-In Color Temperature
Compensation and Adaptive Headroom Control for High
CRI LED Luminaires
Features
Dual-string LED driver for 2-color or unequal VF LEDs
PWM dimming with 180° phase shift of LED strings
Programmable look-up table for color temperature compensation
Main LED string driven by linear current controller
Drives external N-channel MOSFET
± 3% current accuracy, no ripple current
Adaptively controls headroom of both AC/DC and DC/DC, isolated or non-isolated topology
Wide PWM dimming range with 12-bit precision
8-bit DAC for peak current control
Color-adjust LED string uses floating buck controller
Drives external N-channel MOSFET
Temperature color compensation using programmable look-up table
Over 100:1 dimming range with 8-bit precision
8-bit DAC allows changing current sense threshold
Open and short LED protection
Over-temperature fault detection
Operates stand-alone or with a microcontroller
Open-drain fault indicator output
-40°C To +105°C operating temperature range
Typical Applications
General and Architectural Lamps
High CRI LED Fixtures
Down Lights and Recessed Lights
PAR Lamps
42062A–LED–02/2013
1.
Introduction
The MSL2021 LED driver for two-color systems includes a linear current controller for the main string, typically for white
LEDs, and a second floating buck controller for a color-adjust LED string. Both the switching and linear controllers drive external MOSFETs to provide flexibility over a wide range of power levels (LED currents and voltages).
The MSL2021 adaptively manages the voltage powering the main LED string. A proprietary and patent pending efficiency optimizer (EO) algorithm controls the voltage output of both AC/DC and DC/DC, isolated or non-isolated topology, including ultra-low bandwidth single-stage PFC flyback controller.
The MSL2021 features peak current control and individual string PWM dimming, with the two strings driven at a 180 out of phase. The main LED string’s current is ripple-free and has very high accuracy. The PWM dimming frequency for both
LEDs strings is 400Hz to give a predictable and wide dimming range. A thermistor connection allows automatic compensation of luminous efficacy in a two-color LED fixture to maintain consistent color balance across temperature.
The MSL2021 operates from 9.5V to 15V input. The color-adjust string voltage regulation loop uses a constant off-time control algorithm to achieve stable control with good transient behavior. For flexibility of design, off-time is set with an external resistor. LED current in both the strings can be adjusted using internal 8-bit DACs.
The internal registers are I 2 C accessible. Integrated non-volatile EEPROM memory, also accessed through the I 2 C serial interface, allows configuration at final test in case that the factory default settings need to be modified.
The MSL2021 is available in the space-saving 24-pin 4x4mm QFN package and operate over the extended -40°C to
105°C operating range.
2.
Ordering Information
Note:
Ordering code
MSL2021IN
Description
Two String LED Driver
1.
Lead-Free, Halogen-Free, RoHS Compliant Package
4 x 4mm 24-pin QFN
3.
Application Circuit
BRIDGE
RECTIFIER
&
EMI
FILTER
AC MAINS
SINGLE
STAGE
PFC
FLYBACK
CONTROLLER
WHITE LED STRING
LINEAR
LED
DRIVER
COLOR LED STRING
NTC
THM
FBO
D
G
S
MSL2021
LED
DRIVER
VDD
PWM1
DRV
CS
V
IN
MCU
FLOATING
BUCK LED
DRIVER
MSL2021 [DATASHEET]
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4.
Absolute Maximum Ratings
Voltage with respect to AGND
AVIN, PVIN, EN
VCC, PWM, FLTB, SDA, SCL, TOFF, REXT, FBO
VDD
THM
CS, S
D
G, DRV
PGND, AGND
Current (into pin)
AVIN, PVIN, DRV, G (average)
PVIN (peak, =1% duty)
DRV, G (peak, =1% duty)
PGND (peak, =1% duty)
AGND, PGND (average)
All other pins
Continuous Power Dissipation at 70°C
24-Pin 4mm x 4mm VQFN (derate 21.8mW/°C above TA = +70°C)
Ambient Operating Temperature Range
Junction Temperature
Storage Temperature Range
Lead Soldering Temperature, 10s
-0.3V to +16.5V
-0.3V to +5.5V
-0.3V to +2.75V
-0.3V to VCC+0.3V
-0.3V to VDD+0.3V
-0.3V to +22V
-0.3V to VIN+0.3V
-0.3V to +0.3V
100mA
1A
±1A
-1A
-100mA
±10mA
1200mW
-40°C to +105°C
+125°C
-65°C to +125°C
+300°C
MSL2021 [DATASHEET]
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5.
Electrical Characteristics
AVIN = PVIN = 12V, -40°C ≤T
A
Typical values at T
A
= +25°C.
≤ 105°C, Typical Operating Circuit, unless otherwise noted.
Table 5-1.
DC electrical characteristics
Parameter
AVIN, PVIN Operating Supply Voltage
AVIN Operating Supply Current
AVIN Idle Supply Current
PVIN Idle Supply Current
AVIN Disable Supply Current
VCC Regulation Voltage
VDD Regulation Voltage
PWM, PWM1, PWM2, SCL, SDA Input
High Voltage
PWM, PWM1, PWM2, SCL, SDA Input
Low Voltage
EN Input High Voltage
EN Input Low Voltage
EN Input Hysteresis
SDA, FLTB Output Low Voltage
SCL, SDA, PWM, PWM1, PWM2, FLTB leakage current
S Current Sense Regulation Voltage
S Current Sense Regulation Voltage
Accuracy
Conditions
LEDs on at PWM = 100%, serial interface idle
EN = SLEEP = 1, all digital inputs = 0
EN = SLEEP = 1, all digital inputs = 0
V
EN
= 0, all digital inputs = 0
I
VCC
= 10mA peak
I
VDD
= 10mA peak
Sinking 6mA
T
A
= 25 C, MREF = 0x64
Main string at 100% duty cycle,
T
A
= 25 C, MREF = 0x64
S Current Sense Regulation Voltage
Temperature Coefficient
G Maximum Output Voltage
D Regulation Threshold
CS Current Sense Regulation Voltage
DRV Impedance
EOCTRL = 0xE5
CAREF = 0x64
V
DRV
= 12V, I
DRV
= 20mA
V
DRV
= 0V, I
DRV
= -20mA
FBO Full Scale Current
Min.
9.5
4.5
2.25
0.7
V
VDD
2
-5
194
-3
AVIN – 3.5
0.9
170
Typ.
12
10
7
0
5
2.5
100
200
-220
9.5
1
200
5.6
5.6
255
Max.
15
10
5
5.5
2.75
0.3
V
VDD
0.5
0.3
5
206
+3
AVIN – 2.0
1.1
9
9
340 ppm/ºC
V
V mV
Ω
Ω
µA
Unit
V mA mA
μA
μA
V
V
V
V
V
V mV
V
A mV
%
MSL2021 [DATASHEET]
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Parameter
FBO LSB Current
THM Source Current
THM Voltage Range
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
Table 5-2.
AC electrical characteristics
Parameter
DRV t
OFF
timing
PWM Input Frequency
PWM Duty Cycle
PWM Duty Cycle Resolution
Conditions
Temperature rising
Conditions
R
TOFF
= 45.3k
MSL2021
Min.
0
Min.
60
1
Typ.
1.0
100
133
15
Typ.
0.5
0.4
Max.
1.5
Max.
10,000
100
Table 5-3.
I 2 C switching characteristics
Parameter Symbol Conditions
SCL Clock Frequency
STOP to START Condition Bus Free
Time t
BUF
Repeated START condition Hold Time t
HD:STA
Repeated START condition Setup Time t
SU:STA
STOP Condition Setup Time t
SU:STOP
SDA Data Hold Time t
HD:DAT
SDA Data Valid Acknowledge Time
SDA Data Valid Time
SDA Data Set-Up Time
SCL Clock Low Period
SCL Clock High Period
SDA, SCL Fall Time
SDA, SCL Rise Time
SDA, SCL Input Suppression Filter
Period
Bus Timeout t
SU:DAT t
F t
R t
LOW t
HIGH t
TIMEOUT
Min.
0.05
0.5
0.05
0.05
100
0.5
0.26
0.26
0.26
0.26
5
Typ.
50
25
Max.
1,000
0.55
0.55
120
120
Notes: 1.
Minimum SCL clock frequency is limited by the bus timeout feature, which resets the serial bus interface when either SDA or SCL is held low for t
TIMEOUT
.
2.
SDA Data Valid Acknowledge Time is SCL LOW to SDA (out) LOW acknowledge time.
3.
SDA Data Valid Time is minimum SDA output data-valid time following SCL LOW transition.
4.
A master device must internally provide an SDA hold time of at least 300ns to ensure an SCL low state.
Unit kHz
µs
µs
µs
µs ns
µs
µs ns
µs
µs ns ns ns ms
Unit
A
A
V
°C
°C
Unit
s
Hz
%
%
MSL2021 [DATASHEET]
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5.
The maximum SDA and SCL rise times is 300ns. The maximum SDA fall time is 250ns. This allows series protection resistors to be connected between SDA and SCL inputs and the SDA/SCL bus lines without exceeding the maximum allowable rise time.
6.
Includes input filters on SDA and SCL that suppress noise less than 50ns.
7.
Additional decoupling may be required when pulling current from VCC and/or VDD in noisy environments.
8.
2µs minimum on time for main LED string PWM dimming.
Typical Operating Characteristics
Figure 5-1.
Start-up behavior, PWM = 10% duty cycle (Test conditions).
V
LED
FBO
I in
I main
Figure 5-2.
Start-up behavior, PWM = 90% duty cycle (Test conditions).
V
LED
FBO
I in
I main
MSL2021 [DATASHEET]
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Figure 5-3.
Normal operation, PWM = 10% duty cycle (Test conditions).
PWM in
I main
I ca
Figure 5-4.
Normal operation, PWM = 90% duty cycle (Test conditions).
PWM in
I main
I ca
MSL2021 [DATASHEET]
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Figure 5-5.
Fault response, string open circuit (Test conditions).
PWM in
FLTB
I main
I ca
Figure 5-6.
Fault response, LED short circuit (Test conditions).
PWM in
FLTB
I main
I ca
MSL2021 [DATASHEET]
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Figure 5-7.
Input current vs. input voltage
100
I
IN
10
1
I
SLEEP
0.1
0.01
0.001
0.0001
10
I
SHDN
11 12
V
IN
(V)
13 f
IN
= 400Hz
PWM = 50%
14 15
Figure 5-8.
Average LED current vs. input PWM duty cycle
100
80 f
IN
= 400Hz
MAIN STRING
60
40
20
0
0 50
DUTY CYCLE (%)
100
MSL2021 [DATASHEET]
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Figure 5-9.
V
CC
and V
DD
regulation
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0 f
IN
= 400Hz
PWM = 50%
20 40 60
I
OUT
(mA)
VCC
VDD
80 100
MSL2021 [DATASHEET]
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6.
Block Diagram
Figure 6-1.
MSL2021 block diagram
AVIN
VDD
VCC
FBO
REGULATORS
EN
VREF
FLTB
CONTROL LOGIC
FAULT
DETECT
PWM PWM DIGITIZER
EFFICIENCY OPTIMIZER
OSCILLATOR
SDCR REGISTER
LOOK-UP TABLE EEPROM
THM ADC
TOFF
CURRENT
GENERATOR
CURRENT
GENERATOR
1.2V
C
OFF
REXT
AGND
VREF
S
R
Q
QB
START
CLOCK
400HZ PWM
GENERATOR
AND
DUTY CYCLE
ENGINE
DAC
DAC
MUX
PGND
VREF
D
G
S
PVIN
DRV
CS
MSL2021 [DATASHEET]
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11
7.
Pinout and Pin Description
7.1
Pinout MSL2021
FBO
1
EN
2
PWM
SCL
3
4
SDA
5
FLTB
6
24 23 22 21 20 19
MSL2021
(TOP VIEW)
18
S
17
NC
16
PVIN
15
DRV
14
PGND
13
CS
7 8 9 10 11 12
7.2
Pin Descriptions
Name
FBO
Pin
1
EN
PWM
SCL
SDA
FLTB
2
3
4
5
6
Description
Feedback Output
Feedback output from Efficiency Optimizer. Connect FBO to the LED power supply regulation feedback node to control V
LED
. When unused connect FBO to VCC.
Enable Input (Active High)
Drive EN high to turn on the MSL2021, drive EN low to turn it off. For automatic start-up connect EN to
AVIN.
PWM Dimming Input
Drive PWM with a pulse-width modulated signal to control LED brightness. See “PWM and LED
Brightness” on page 20 for details.
Serial Clock Input
SCL is the I²C serial interface clock input. See “I²C Serial Interface ” on page 31 details.
Serial Data Input/Output
SDA is the I²C serial interface data I/O. See
“I²C Serial Interface ” on page 31
details.
Fault Output (Open Drain, Active Low)
FLTB sinks current to AGND when a fault condition exists. Toggle EN low then high to clear FLTB, or clear faults through the serial interface (see
MSL2021 [DATASHEET]
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S
G
D
AVIN
Name
NC
THM
REXT
TOFF
DNC
CGND
CS
PGND
DRV
PVIN
VCC
AGND
VDD
EP
Pin
7, 17
8
9
10
22
23
24
11
12
13
14
15
16
18
19
20
21
EP
Description
No Internal Connection
NTC Thermistor Sensing Input
Connect a negative temperature coefficient thermistor (ERT-J0EG103FA or equivalent) from THM to
AGND, in series with a 1.5kΩ resistor. Locate the thermistor close to the Color-Adjust LEDs to monitor their temperature. This allows the MSL2021 to automatically temperature compensate the Color-
Adjust string brightness.
External Resistor
Connect a 46.4k
, 1% resistor from REXT to AGND.
Off-Time Set Input
A resistor from TOFF to AGND controls the constant off time for the Color-Adjust string floating buck converter, where R
TOFF
= t
OFF
(90.9 x 10 9 ), with t
OFF
in seconds and R
TOFF
in Ohms. For example, an off time of 0.5
s results in a resistor value of 45.3k (to the nearest 1% value).
Do Not Connect
Do not make external connection to DNC.
Connect to Ground
Connect CGND to AGND.
Current Sense Input for the Color-Adjust String
Connect CS to the external current sense resistor of the Color-Adjust string. The current sense threshold is 200mV.
Power Ground
PGND is the ground connection for the FET gate drivers. Connect PGND to AGND close to the
MSL2021.
Gate Drive for Color-Adjust (Floating Buck Regulator) MOSFET
Connect DRV to the gate of the external power MOSFET.
Power Voltage Input
PVIN powers DRV, the floating buck FET gate driver. Bypass PVIN to PGND with a 1.0µF or greater capacitor.
Source Sense Input for Main LED String MOSFET
Connect S to the source of the external MOSFET, and to the current sense resistor for the Main LED string. The current sense threshold is 200mV.
Gate Output for Main String MOSFET
Connect G to the gate of the Main string external MOSFET.
Drain Output for Main String MOSFET
Connect D to the drain of the Main string external MOSFET.
Analog Voltage Input
AVIN is the power input to the MSL2021. Bypass AVIN to AGND with a 1.0µF or greater capacitor placed close to AVIN.
5V Internal Voltage
Connect 10uF bypass capacitor from VCC to AGND.
Analog Ground
Connect AGND to system ground.
2.5V Internal Voltage
Connect 10uF bypass capacitor from VDD to AGND.
Exposed Pad
EP is the Main thermal path for heat to escape the die. Connect EP to a large copper plane connected to PGND and AGND.
MSL2021 [DATASHEET]
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8.
Typical Application Circuit
MSL2021 controlling the output of an isolated PFC controller; a linear current sink regulates the white LED string current and a floating buck converter regulates the color LED string current.
Figure 8-1.
Typical application circuit
VAC
R
TOP
+
12V
-
AC-DC
ISOLATED
With PFC
EN
PWM
FAULT
1μF
1μF
46.4k
Ω
10μF
R
BOTTOM
COLOR
LEDS
EN
FBO
D
PWM
FLTB
G
S
PVIN
AVIN
MSL2021
LED DRIVER
THM
REXT
TOFF
VCC
VDD
DRV
CS
PGND
WHITE
LEDS
100kΩ
ERT-
J0EG103FA
0.56Ω
1.50kΩ
Q1
0.56Ω
1μF
820μH
Q2
D1
45.3kΩ 10uF
AGND SDA SCL
CONFIGURATION INTERFACE
(OPTIONAL)
9.
Detailed Description
The MSL2021 drives two LED strings, the main string and the color-adjust string. The main string LEDs are typically white and used to provide accurate light intensity control.The color-adjust string LEDs are used to control the color temperature. The combined light output is a blended high CRI light, for example, than what white LEDs can alone produce. The main string is directly controlled by a Pulse Width Modulated (PWM) constant current controller (current sink to ground). An Efficiency Optimizer (EO) output controls the main string voltage, via feed-back to the LED string power supply, to minimize the voltage across the LED current controller, minimizing power loss.
The color-adjust string is regulated by a floating buck controller. The buck controller converts the voltage of the main string’s supply to a voltage appropriate for the color-adjust LEDs. Additionally, the MSL2021 has a programmable 8-bit
).
MSL2021 [DATASHEET]
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10.
Fault Conditions
The MSL2021 detects fault conditions, and takes corrective action when faults are verified.
String open circuit and LED short circuit conditions of the color-adjust string are monitored. When one of these faults occurs, FLTB pulls low to indicate a fault condition and the color-adjust LEDs turn off. Read Fault Status register 0x23 to determine the fault type. Clear these faults by toggling EN low then high. Faults that persist re-establish the fault response. Mask string faults using Fault Disable register 0x22.
For the main LED string, when an open LED occurs, the voltage of the AC/DC or DC/DC input power supply reaches the maximum allowed.
Over-temperature protection puts the device to sleep when the die temperature is above 133
C. The device turns back on when the die temperature falls below 118 C, and normal operation resumes. While asleep, the I 2 C interface remains active; see
“Fault Disable register (FAULT, 0x22)”
and
“Fault Status register (FAULTSTAT, 0x23), Read Only” on page
29 for more information about thermal shutdown.
Table 10-1. Fault Conditions, Response and Recovery
Fault
Die Temperature > 133
Color-adjust string has shorted LEDs
C
Color-adjust string is open circuit
Response
Asleep (I 2 C still active)
Recovery action
When die temperature falls below 118
C operation resumes as if EN is pulled high
Color-adjust string turns off, FLTB pulls low, and bit 0 of the Fault Status register
0x23 sets high
Color-adjust string turns off, FLTB pulls low, and bit 1 of the Fault Status register
0x23 sets high
Correct the short condition in LED string. Toggle EN low to high to resume operation
Correct the open condition in LED string. Toggle EN low to high resume operation
11.
Applications Information
11.1
Turn-On Sequence
The MSL2021 waits for 250ms after power is applied to allow the AC/DC or DC/DC input supply to establish the default voltage. Then the MSL2021 starts to optimize the LED string voltage (V
LED
), and then starts to drive the LED strings. It is critical that the AC/DC or DC/DC converter that powers the LED strings reaches its nominal output voltage in less than
250ms after power is applied. When the 250ms start-up delay is complete, the efficiency optimizer adjusts the LED voltage to the proper level to drive the main string. After the voltage is set, normal PWM operation begins for both the main and color-adjust strings. This turn-on sequence allows the light to come up at the proper color and intensity without flashing or flicker.
11.2
Setting the Main String Current with R
S
The Main string LED on-current regulates by monitoring the voltage at the S pin, the main string MOSFET source resistor connection. The default feedback voltage at the S pin is 200mV. Choose the string current sense resistor R
S
using:
R
S
=
0.2
I
LED where I
LED
is the main string regulation current. The main string reference voltage (MREF) register 0x20 sets the feedback voltage, to 200mV, at 2mV per LSB. The regulation voltage, V
S(FB)
, is:
MSL2021 [DATASHEET]
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V
S FB
=
V where MREF is the decimal equivalent of the value in register 0x20. The default value for MREF is 0x64, for a feedback voltage of 0.2V. Change the feedback voltage by changing the value in register 0x20 using the serial interface. LED average current is within ±3% of the targeted value when a 1% resistor is used for R
S
.
11.3
Setting AC/DC Output Voltage
The efficiency optimizer output, FBO, connects to the AC/DC or DC/DC converter’s output voltage feedback node, and pulls current from the node to force the converter’s output voltage up. The MSL2021 works with any input power converter topology that uses a resistor divider to set its output voltage. Operation with a AC/DC PFC converter is described below.
Select the two resistors that set the nominal AC/DC LED power supply’s output voltage by first determining the minimum output voltage using:
V
V fMIN where V fMIN
is the minimum LED forward voltage for the Main string LEDs at the expected LED current, N is the number of LEDs in the string, and 0.2V is the minimum overhead required for the current sense resistor and the FET. Then determine the maximum output voltage using:
V
=
V fMAX where V fMAX
is the maximum LED forward voltage for the Main string LEDs at the operating LED current, N is the number of LEDs in the string, and 1.2V is the maximum overhead required for the current sense resistor and the FET. Determine the value for the upper voltage setting resistor using:
R
TOP
V
-----------------------------------------------------------------
– V
– 6
where 170 A is the minimum FBO full scale current. Determine the lower resistor using:
R
BOTTOM
= R
TOP
V
-------------------------------------------
V
– V
FB where V
FB
is the feedback regulation voltage of the switch mode converter.
11.4
Selecting the Main String MOSFET
The Main string MOSFET sinks the string current to ground through current sense resistor R
S
. Output of pin G drives the gate of the MOSFET at up to VIN - 2V. Select a MOSFET with a maximum drain-source voltage of at least 20% above:
V fb
R
-----------------------1
R
BOTTOM
+
+ 340
A R
TOP where 340µA is the maximum FBO full scale current.
11.5
Selecting the Drain Resistor – R
D
The drain resistor, R
D
, connects the MSL2021 to the drain of the main string external MOSFET. Use a 100k for R
D
.
MSL2021 [DATASHEET]
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11.6
Selecting the Color-Adjust String Floating Buck Components
Figure 11-1. Floating buck LED driver
V
LED
WHITE LEDS
(MAIN STRING)
C i
COLOR LEDS
(COLOR-ADJUST STRING)
+
I
AVE
V
BUCK
-
C o
L o
D
1
R
TOFF
TOFF
MSL2021
LED Driver
DRV
CS
PGND
Q
R
CS
The MSL2021 includes a driver for a constant off-time floating buck topology, shown in Figure 11-1
, to convert the main string voltage to a value appropriate for the color-adjust LED string. The buck is operated in continuous conduction mode.
Continuous conduction operation is assured when the peak-to-peak ripple current in the inductor, ∆i
L
, is less than twice the average LED current. A peak-to-peak ripple current magnitude of 15% of the average LED on-current is suggested, i.e.
i
L
0.15I
AVE
A where I
AVE
is the average color-adjust LED string on-current. Choose I
AVE
appropriate for the color-adjust LEDs (
) and calculate the peak string on-current using
I
PEAK
= I
AVE
+
i
--------
2
A
MSL2021 [DATASHEET]
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Figure 11-2. Color-adjust string LED on-current details.
I
I
PEAK
I
AVE
INDUCTOR CURRENT
?i
L t
OFF
LED CURRENT
(WHEN USING C
O
)
t
The color-adjust string LED on-current regulates by monitoring the voltage at CS, the color-adjust string FET source resistor connection. The reference voltage V
CSFB
for CS is 200mV (V
R
CS
=
V
----------------
I
PEAK
CSFB
is 200mV by default, and is adjustable through the serial interface; see the register definitions for details about changing V
CSFB using
). Choose the current sense resistor R
CS
Determine V
BUCK
, the voltage across the color-adjust LEDs, using
V
BUCK
= NV f
V where N is the number of LEDs in the string and V
F
is the forward voltage drop of the LEDs at I
PEAK
.
The duty ratio of MOSFET Q is
D =
V
-----------------
V
LED where V
LED
is the main string voltage,
. The constant off-time of the MOSFET is t in seconds using off and calculated t off
=
1 f
– s
D s where f
S
is the selected switching frequency in Hz. Use 100kHz to 1MHz for f
), whose value is
S
. Set t off
with resistor R
TOFF
from TOFF to
R t off
= t off
9
Choose the inductor value using
L
O
=
V
BUCK
i
L
t
------------------------------
H
Use a ferrite inductor with a saturation current at least 50% higher than the peak current flowing in it:
I
L
SAT
PEAK
A
Note here a particular advantage of constant off-time operation of the buck converter is that ripple current is independent of the input voltage. The circuit provides a constant average LED current, I
AVE
, but the buck converter actually regulates the peak inductor current, I
PEAK value L
0
(
above, we see that because t constant, so that I
AVE off
is constant, and V
). From the equation for the inductor
BUCK
is relatively constant, the ripple current ∆i
L
is also
is a constant, as desired. If the main string voltage changes, the switching frequency changes to keep the on-time constant, thus the ripple current is independent of the input voltage.
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This topology does not require an output capacitor, C o
. When used, C o
steers the inductor’s ripple current away from the LEDs but reduces the accuracy of PWM dimming because the voltage across it cannot change quickly. When using C o than V
BUCK
.
, a ceramic capacitor of between 1.0µF and 10µF is adequate, with a voltage rating higher
The output capacitor of the AC/DC converter that produces the main string voltage, C i
in
, doubles as the buck’s input capacitor. The capacitor’s function is to provide a smooth voltage to the buck converter. It should be able to handle the R.M.S. ripple current of the buck converter, which is approximately equal to
I
C i
= I
AVE
– D
A
This ripple current peaks at a duty ratio of D = 0.5.
Select an N-channel MOSFET for Q with a maximum drain-source voltage at least 25% above V
LED in the MOSFET is approximately equal to
. The R.M.S. current
I
Q
= I
AVE
D A
The MOSFET conduction power loss due to this current is
P
CON
I
Q
2
R
DS
2
I
AVE
R
DS
D
W where R
DS
is the hot on-resistance of the MOSFET, which can be found in the MOSFET datasheet, and is typically 1.5 to
1.8 times greater than the cold resistance. The MOSFET will also incur switching losses, which can be difficult to calculate exactly. A good rule-of-thumb is to choose a MOSFET in a package that dissipates at least four times P
CON
.
The average current in the output rectifier D
1
is
I
D i
= I
AVE
1 – D
A and the power dissipated in the rectifier due to conduction is
P
CON
D
1
= I
D
1
V on
W where V on
is the voltage drop across the rectifier at the forward current of I
D1
. Pick a rectifier with an average current rating at least 50% higher than I
D1
. Use a Schottky rectifier if the LED voltage is less than 50V. The Schottky rectifier’s voltage rating should be at least 25% higher than V
LED
. Schottky rectifiers have very low on-state voltage and very fast switching speed, but at high voltage and high temperatures their leakage current becomes significant. The power dissipated in the Schottky rectifier due to the leakage current at any temperature and duty ratio is
P lkg
= V
LED
I r
D W where I r
is the reverse leakage current, found in the diode’s datasheet. This power must be added to the conduction power loss.
P
D
1
= P
CON
D
+ P lkg
W
Make sure that the rectifier’s total power dissipation is within the rectifier’s specifications.
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11.7
PWM and LED Brightness
The
main string equals the duty cycle of the input signal at PWM. The PWM input accepts an input signal frequency of 60Hz to 10kHz, while the LED dimming frequency, of both the main and color-adjust strings, is 400Hz. The duty cycle of the color-adjust string is based on the duty cycle of the signal at the PWM input, but compensated for temperature based on a programmable look-up table, whose defaults are presented in
. See “Light Color and the THM
Input” on page 20 for temperature adjustment information.
Figure 11-3. LED current and duty cycle control.
PWM
THM
MSL2021
DAC
0x20
400Hz CLOCK
THERMAL
MONITOR
PWM ENGINE
DAC
0x21
+
-
EN
+
-
EN
D
G
S
R
D
R
S
DRV
CS
R
CS
11.8
Light Color and the THM Input
The overall color of the light generated by the two LED strings is a blend of the main string’s white LEDs and the coloradjust string’s color LEDs. Brightness is primarily controlled by the duty cycles of the PWM signals driving the LEDs. The brightness of white LEDs is relatively constant over temperature, but the brightness of color LEDs may drop significantly as temperature increases. The main string’s PWM duty cycle is fixed at the duty cycle of the input PWM signal, but the duty cycle of the color-adjust string is changed as the LED temperature changes, to keep the blended light color constant.
The thermistor input, THM, monitors the temperature of an external thermistor connected from THM to ground. A fixed current is forced out THM to generate a voltage that is proportional to the thermistor’s temperature. The THM voltage is measured by a 8-bit ADC internal to the MSL2021. When used with the suggested thermistor ( ERT-J0EG103FA or equivalent ) in series with a 1.5kΩ resistor, THM measures temperatures from 18 o C to 80 o C with 2 o C resolution, for 32 different temperature values. When the temperature is below 18 o C, 18 o C is returned by the temperature monitor circuit.
When the temperature is above 80 o C, 80 o C is returned by the temperature monitor circuit. The temperature information is fed to the color-adjust string’s duty cycle circuit.
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color-adjust duty cycle ratio (SDCR). The SDCR, a number from 0 to 255, is divided by 255, and multiplied by the duty cycle of the incoming PWM signal. The result is the duty cycle of the color-adjust string. The table is programmable through the serial interface when values different from the defaults are desired.
Table 11-1.
Temperature based duty cycle modification of the color-adjust string
Part
COLOR-ADJUST DUTY CYCL
TEMPERATURE ADJUSTMENT
MSL2021 DC
CA
=
255
PWM
Limits
SDCRxx = VALUE IN LOOK-UP TABLE 0x00 THRU 0x1F
SDCRxx = 0xFF RETURNS 100% OF THE PWM DUTY CYCLE
SDCRxx = 0x00 RETURNS 0% OF THE PWM DUTY CYCLE
Table 11-2.
Temperature Look-Up Table Defaults
Register Multiplication factor
Temperature (°C)
42
44
46
48
34
36
38
40
50
52
54
56
58
26
28
30
32
≤18
20
22
24
SDCR30
SDCR32
SDCR34
SDCR36
SDCR38
SDCR40
SDCR42
SDCR44
Name
SDCR18
SDCR20
SDCR22
SDCR24
SDCR26
SDCR28
SDCR46
SDCR48
SDCR50
SDCR52
SDCR54
SDCR56
SDCR58
0x0A
0x0B
0x0C
0x0D
0x06
0x07
0x08
0x09
Address
0x00
0x01
0x02
0x03
0x04
0x05
0x0E
0x0F
0x10
0x11
0x12
0x13
0x14
Default Value
0x4C
0x4D
0x4E
0x4F
0x50
0x51
0x56
0x58
0x59
0x5A
0x52
0x53
0x54
0x55
0x5C
0x5D
0x5E
0x60
0x62
0x63
0x65
255
0.331
0.336
0.340
0.345
0.350
0.355
0.361
0.367
0.373
0.379
0.385
0.392
0.399
0.300
0.303
0.307
0.311
0.314
0.318
0.322
0.327
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Register
Note:
Temperature (°C)
70
72
74
76
78
≥80
60
62
64
66
68
Address
0x15
0x16
0x17
0x18
0x19
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
1.
Change SDCRxx values through the serial interface
Name
SDCR60
SDCR62
SDCR24
SDCR66
SDCR68
SDCR70
SDCR72
SDCR74
SDCR76
SDCR78
SDCR70
Figure 11-4. MSL2021 default look-up Table color correction vs. temperature.
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0 20 40 60
TEMPERATURE (ºC)
80
Default Value
0x67
0x69
0x6B
0x6D
0x70
0x72
0x72
0x72
0x72
0x72
0x72
Multiplication factor
255
0.450
0.460
0.460
0.460
0.460
0.460
0.406
0.414
0.422
0.431
0.440
100
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11.9
MSL2021 Look-Up Table Lockout Procedure
The MSL2021 features a lock for the look-up table. When locked, the table’s registers (0x00 through 0x1F) become readonly. A locked table cannot be unlocked; changing the table’s registers is no longer possible. Reads of a locked table’s registers return 0x00, unless the password (chosen when locking the table) is first entered to make the registers visible.
Locking the table requires use of the I 2 C interface to enter data, read data and program the EEPROM. For information about using the I 2
C interface, see “I²C Serial Interface ” on page 31 . For information about programming the EEPROM
see
“EEPROM Address and Control/Status Registers” on page 26
.
Lock the table by performing the following sequence; an example is presented below:
1.
Fill the look-up table with data.
2.
Commit the look-up table to EEPROM.
3.
Cycle power, then verify the contents of the look-up table.
4.
Choose a 16-bit password.
5.
Enter the password into Password Registers 0x68 and 0x69.
6.
Enter the password into Password Verification Registers 0x38 and 0x39.
7.
Commit the password to EEPROM.
8.
Set the lock bit.
9.
Commit the lock bit to EEPROM.
10. Cycle power to the MSL2021.
11.9.1 Example:
The Look-Up Table is four pages long (each page is 8-bytes). When the look-up table is filled with the proper data, commit the data to the EEPROM, one page at a time, by sending the following commands to the MSL2021 through its
I 2 C interface:
0x60 0x00 {to register 0x60 write 0x00: sets the EEPROM write pointer to 0x00}
0x61 0x04 {to register 0x61 write 0x04: writes the first page (8 bytes) of data to the EEPROM}
Wait 5ms.
0x61 0x00 {to register 0x61 write 0x00 : disables EEPROM writing}
0x60 0x08 {sets the EEPROM write pointer to 0x08}
0x61 0x04 {writes the second page of data to the EEPROM}
Wait 5ms.
0x61 0x00 {disables EEPROM writing}
0x60 0x10 {sets the EEPROM write pointer to 0x10}
0x61 0x04 {writes the third page of data to the EEPROM}
Wait 5ms.
0x61 0x00 {disables EEPROM writing}
0x60 0x18 {sets the EEPROM write pointer to 0x18}
0x61 0x04 {writes the final page of data to the EEPROM}
Wait 5ms.
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0x61 0x00 {disables EEPROM writing}
The EEPROM is now programmed with the data that are in registers 0x00 through 0x1F (the look-up table). Although not required, now is a good time to cycle power to the MSL2021, then read registers 0x00 through 0x1F to verify that the
EEPROM was properly programmed (at power-up the EEPROM automatically programs registers 0x00 through 0x40).
Next, choose a 16-bit password and write it into the Password Registers, and into the Password Verification Registers.
For this example the password is 0xAA55:
0x68 0xAA
0x69 0x55 {writes the password into the password registers 0x68 and 0x69}
0x38 0xAA
0x38 0x55 {writes the same password into the password verification registers 0x38 and 0x39}
Now commit the password to EEPROM.
0x60 0x68 {sets the EEPROM write pointer to 0x68}
0x61 0x03 {writes the first byte of the password to the EEPROM}
Wait 5ms.
0x61 0x00 {disables EEPROM writing}
0x60 0x69 {sets the EEPROM write pointer to 0x69}
0x61 0x03 {writes the second byte of the password to the EEPROM}
Wait 5ms.
0x61 0x00 {disables EEPROM writing}
Next, set the lock bit and commit it to EEPROM.
0x3A 0x02 {sets the lock bit (bit D1) in register 0x3A}
0x60 0x3A {sets the EEPROM write pointer to 0x3A}
0x61 0x03 {writes the contents of register 0x3A to the EEPROM}
Wait 5ms.
0x61 0x00 {disables EEPROM writing}
Now cycle power to the MSL2021. All reads of the Look-Up Table now return 0x00.
To read the Table, enter the password into the password verification registers:
0x38 0xAA
0x39 0x55 {writes the password into registers 0x38 and 0x39}
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Reads of the Look-Up Table now return its true contents, until the password register is changed, power is cycled or enable input EN is toggled.
12.
Control Registers
Address and
Register name
0x00
0x01
0x1E
0x1F
0x20
0x21
0x22
Function
SDCR18
SDCR20
SDCR78
SDCR80
MREF
CAREF
FAULT
DISABLE
Look up for 18 C
Look up for 20 C
…thru…
Look up for 78 C
Look up for 80 C
Main String
Feedback
Reference
Voltage
Color-Adjust
String Reference
Feedback Voltage
Color-Adjust Fault
Disable
Default value
0x4C
0x4D
0x72
0x72
0x64
0x64
0x00
0x23
0x24
0x31
FAULTSTAT
SLEEP
TEMP
Fault Status
Configuration
Read
Only
0x00
Read
Only
0x38
0x39
0x3A
0x40
0x60
0x61
0x68
0x69
PWV(HIGH)
PWV(LOW)
LUT LOCK
EOCTRL
E2ADDR
E2CTRL
PW(HIGH)
PW(LOW)
Temperature
Look-Up Table
Password
Verification High
Byte
Look-Up Table
Password
Verification Low
Byte
Look-Up Table
Lock
Efficiency
Optimizer
EEPROM
Address
EEPROM Control
Look-Up Table
Password High
Byte
Look-Up Table
Password Low
Byte
0xFF
0xFF
0x83
0xE5
0x00
0x00
0xFF
0xFF
Notes:
D7
-
-
-
-
-
-
-
D6
-
-
-
-
-
-
D5
-
-
-
-
-
-
D4
MS
REF
= 2mV per LSB
V
CAREF
= 2mV per LSB
-
Bit functions
D3
Look up table
Look up table
…thru…
Look up table
Look up table
-
-
-
Thermistor temperature
-
EEPROM Address Pointer
-
Look-Up Table Password [15:8]
D2
TSDMASK
TSD
-
Look-Up Table Password Verification [15:8]
Look-Up Table Password Verification [7:0]
-
-
-
-
Look-Up Table Password [7:0]
1.
Do not change the contents of undefined bits or unlisted registers.
2.
Unless changed through the EEPROM, these default values load at power-up, and when EN is taken from low to high.
-
D1
OCDIS
OCFLT
-
DThresh[3:0]
RWCTRL[2:0]
D0
SCDIS
SCFLT
SLEEP
LOCK[1:0]
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12.1
EEPROM and Power-Up Defaults
An on-chip EEPROM holds all the default register values. At power-up the data in the EEPROM is transferred directly to control registers 0x00 thru 0x51, setting up the device for operation.
Any changes made to registers 0x00 thru 0x69 after power-up are not reflected in the EEPROM and are lost when power is removed from the device, or when the enable input EN is forced low. If a different power-up condition is desired program the values into the EEPROM via the serial interface as explained in the next section, or contact the factory to inquire about ordering a customized power-up setting.
12.2
EEPROM Address and Control/Status Registers
The EEPROM can be visualized as an image of the control registers from 0x00 thru 0x69. Change an EEPROM register value by writing the new value into the associated control register, and then instructing the device to program that value into the EEPROM. Two control registers facilitate this process, the EEPROM address register E2ADDR (0x60), and the
EEPROM control register E2CTRL (0x61). Into E2ADDR write the location of the data that is to be programmed into the
EEPROM, and write 0x03 to E2CTRL to command the device to program that data into the EEPROM. Programming the
EEPROM takes a finite amount of time; after sending a command to E2CTRL wait 5ms, then end the write cycle by writing 0x00 to E2CTRL.
Example: Change the string current feedback voltage MREF to 100mV.
Commands:
To register 0x20 (MREF) write 0x32 (the new value for MREF). To register 0x60 (E2ADDR) write 0x20 (the address of the MREF register). To register 0x61 (E2CTRL) write 0x03 (the command to copy the value to EEPROM).
Wait 5ms. To register 0x61 (E2CTRL) write 0x00, to turn off EEPROM access.
Result: The value 0x32, located in the MREF register, is programmed into the EEPROM and becomes the new powerup default value for MREF.
Summary:
0x20 32
0x60 20
0x61 03
Wait 5ms
0x61 00
E2CTRL provides additional functions beyond simply programming a register’s value into the EEPROM. Data may be transferred in either direction, from the registers to the EEPROM, or from the EEPROM to the registers. Register data may be transferred into or out of the EEPROM in groups of eight, a page at a time. The page address boundaries are predefined, and E2ADDR must be loaded with the address of the first byte of the page that is to be copied. Page addresses begin at 0x00 and increment by eight, with the second page beginning at 0x08, the third at 0x10, etc. To program a full page of data into the EEPROM, write the address of the page’s first byte to E2ADDR, and write 0x04 to
E2CTRL. Wait 5ms, and then end the write cycle by writing 0x00 to E2CTRL. When finished accessing the EEPROM
available through E2CTRL.
Table 12-2. EEPROM Address Register (E2ADDR, 0x60), defaults highlighted .
Register Address
E2ADDR 0x60
DEFAULT
EEPROM Minimum Address 0x00
EEPROM Maximum Address 0x51
D7
-
0
-
-
D6
0
0
1
D5
0
0
0
0
0
1
Register data
D4 D3
E2ADDR[6:0]
D2
0
0
0
0
0
0
D1
0
0
0
D0
0
0
1
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Table 12-3. EEPROM Status Register (E2CTRL, 0x61), defaults highlighted .
Register Address
E2CTRL
DEFAULT
EEPROM Read / Write Disabled
Read 1 Byte from EEPROM
Read 8 Bytes from EEPROM
Write 1 Byte to EEPROM
Write 8 Bytes to EEPROM
0x61
Unused
D7
x x x x x
0 x x
D6
x x x x x
0 x x
D5
x x x x x
0 x x x x x x x
0 x x
Register data
D4
-
D3
x x x x x
0 x x
D2 D1
RWCTRL[2:0]
D0
0
0
0
0
0
1
1
1
0
0
0
1
1
0
0
1
0
0
1
0
1
0
1 x
13.
Detailed Register Descriptions
The MSL2021 registers are summarized in
“Control Registers” on page 25 . Detailed register information follows.
13.1
String Duty Cycle Control Registers (SDCR18 through SDCR80, 0x00 through 0x1F)
for information. Put the device to sleep using SLEEP register 0x24 before modifying the SDCR values to avoid undesired changes in the light output of the LEDs.
Table 13-1. String Duty Cycle Control Registers (SDCR18 through SDCR80, 0x00 through 0x1F), defaults highlighted
Register name
SDCR18 through SDCR80
DEFAULT
(See
Correction factor = 0
Correction factor = 1
Address
0x00 – 0x1F
D7
X
0
1
D6
X
0
1
D5
X
0
1
X
0
1
Register data
D4 D3
SDCR[7:0]
X
0
1
D2
X
0
1
D1
X
0
1
D0
X
0
1
13.2
Main String Reference Voltage register (MREF, 0x20)
Holds the DAC value that controls the reference voltage for the main string FET source feedback voltage. The reference voltage equals decimal value of this register times 2mV. The default value for MSREF is 0x64, which equates to MS
REF
200mV.
=
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Table 13-2. Main String Reference register (MREF, 0x20), defaults highlighted
Register name Address
MREF 0x20
DEFAULT: M
REF
= 100 * 2mV = 200mV
M
REF
= 0 2mV = 0V
M
REF
= 255 * 2mV = 510mV
D7
0
0
1
D6
1
0
1
1
0
1
D5
0
0
1
Register data
D4 D3
MREF[7:0]
0
0
1
D2
1
0
1
D1
0
0
1
D0
0
0
1
13.3
Color-Adjust String Reference Voltage register (CAREF, 0x21)
Holds the DAC value that controls the reference voltage for the color-adjust string FET source feedback voltage. The reference voltage equals decimal value of this register times 2mV. The default value for CASREF is 0x64, which equates to CA
REF
= 200mV.
Table 13-3. Color-Adjust String Reference register (CAREF, 0x21), defaults highlighted
Register name Address
CAREF 0x21
DEFAULT: V
CAREF
= 100 * 2mV = 200mV
V
CAREF
= 0 2mV = 0mV
V
CAREF
= 255 2mV = 510mV
D7
0
0
1
D6
1
0
1
D5
1
0
1
0
0
1
Register data
D4 D3
CAREF[7:0]
0
0
1
D2
1
0
1
D1
0
0
1
D0
0
0
1
13.4
Fault Disable register (FAULT, 0x22)
. Bit D2 prevents the thermal shutdown fault from pulling FLTB low. Write 0x03 to this register to clear faults; write 0x00 to re-enable fault response.
Table 13-4. Fault Disable register (FAULT, 0x22), defaults highlighted
Register name Address
FAULT 0x22
DEFAULT
Act on faults
Disable LED Short Circuit Fault
Disable String Open Circuit Fault
Do Not Allow Thermal Shutdown Fault to
Pull FLTB Low
0 x x x
D7
x
D6
-
0 x x x x
D5
-
0 x x x x
0 x x x
D4
-
Register data
D3
-
D2
TSDMASK
0 x x x
0
0 x x x x 1
D1 D0
OCDIS SCDIS
1
0 x
1
1
0
1 x x x
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13.5
Fault Status register (FAULTSTAT, 0x23), Read Only
Reports the fault status for the color-adjust string. When a fault is reported in this register, the fault output FLTB pulls low.
Toggle EN low, then high to clear the faults. Faults recur if the fault persists.
Table 13-5. Fault Status register (FAULTSTAT, 0x23), defaults highlighted
Register name Address
FAULTSTAT
No Faults Detected
0x23
LED Short Circuit Fault Detected
String Open Circuit Fault Detected
The MSL2021 is in Thermal Shutdown
D7
x x x x
D6
x x x x
D5
x x x x
Register data
D4
x x x x
D3
x x x x
D2
TSD x x x
1
D1
OCFLT
0 x
1 x
D0
SSFLT
0
1 x x
13.6
Sleep register (SLEEP, 0x24)
Puts the device to sleep (the serial interface remains awake). When asleep, device supply current reduces to 7mA
(typical), the gate drive outputs stop switching, and the LEDs turn off.
Table 13-6. Sleep register (SLEEP, 0x24), defaults highlighted
Register name
SLEEP
DEFAULT
Device is Awake
Device is Asleep
Address
0x24
D7
-
0 x x
D6
-
0 x x
D5
-
0 x x
0 x x
D4
-
Register data
D3
-
0 x x
D2
-
0 x x
D1
-
0 x x
D0
SLEEP
0
0
1
13.7
Thermistor Temperature register (TEMP, 0x31), Read Only
Reports the thermistor temperature at 2C per LSB. When the thermistor temperature is equal to or below 18 C, this register returns 0x12, or 18 C. When the thermistor temperature is equal to or above 80C, this register returns 0x50, or
80 C.
Table 13-7. Thermistor Temperature register (TEMP, 0x31), defaults highlighted
Register name
TEMP
Address
0x31
Minimum Value: 0x12 = 18 C
Maximum Value: 0x50 = 80 C
D7
0
0
D6
0
1
D5
0
0
Register name
D4 D3
TEMP[7:0]
1 0
1 0
D2
0
0
D1
1
0
D0
0
0
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13.8
Password Verification registers
(PWV(HIGH) and PWV(LOW), 0x38 and 0x39)
Use these registers when locking the look-up table of the MSL2021. Also, enter the password (chosen when the Look-Up
Table was locked) into these registers to allow reading the contents of a locked look-up table. See section
Look-Up Table Lockout Procedure” on page 23 for details about locking the look-up table.
Table 13-8. Password Verification registers
(PWV(HIGH and PWV(LOW), 0x38 and 0x39), defaults highlighted
Register name
PWV(HIGH)
PWV(LOW)
DEFAULT
Address
0x38
0x39
D7
1
Register name
D6 D5 D4 D3 D2
Password Verification High Byte [15:8]
Password Verification Low Byte [7:0]
D1
1 1 1 1 1 1
D0
1
13.9
Look-Up Table Lock register (LUT LOCK, 0x3A)
for details about locking the look-up table. At power-up, this register returns 0x02 when the look-up table is locked, and returns 0x83 when the table is unlocked.
Table 13-9. Look-Up Table Lock register (LUT LOCK, 0x3A), defaults highlighted
Register name
LUT LOCK
DEFAULT
Address
0x3A
Locks the Look-Up Table when committed to
EEPROM
D7
-
1
0
D6
-
0
0
D5
-
0
0
Register data
D4
-
0
D3
-
0
0 0
D2
-
0
0
D1
LOCK
D0
1 1
1 0
13.10 Efficiency Optimizer Control Register (EOCTRL, 0x40)
Configures voltage feedback threshold for D. It is recommended that SLEEP = 1 (bit D0 in the configuration register
0x24) while changing this register to avoid perturbations of the string power supply. The MSL2021 always performs a power supply voltage calibration when power is applied, EN is taken high, or SLEEP is reset to 0. Do not change bits D4 through D7.
DThresh sets the voltage feedback threshold for D, The Main string FET drain connection.
D Threshold = (DThresh 150mV) + 250mV.
Table 13-10. Efficiency Optimizer Control Register (FBOCTRL, 0x40), default highlighted
Register name
Address /
Default
FBOCTRL 0x40
DEFAULT = 0xE5
D Threshold = (0 150mV) + 250mV = 0.25V
D7
-
1
1
D6
-
1
1
D5
-
1
1
Register data
D3 D4
-
0
0
0
0
D2 D1
DThresh[3:0]
1
0
0
0
D0
1
0
MSL2021 [DATASHEET]
42062A–LED–02/2013
30
Register name
Address /
Default
•••
D Threshold = (5
150mV) + 250mV = 1V
•••
D Threshold = (15 150mV) + 250mV = 2.5V
D7
1 x
D6
1
1
D5
1
1
Register data
D4 D3
•••
0 0
•••
0 1
D2
1
0
D1
0
1
D0
1
1
13.11 Registers 0x60 and 0x61, EEPROM Access
These registers control access to the EEPROM. See
“EEPROM and Power-Up Defaults” and “EEPROM Address and
Control/Status Registers” on page 26
for information.
13.12 Password registers (PW(HIGH) and PW(LOW), 0x68 and 0x69)
Use these registers to enter the password when locking the look-up table of the MSL2021. See section
Up Table Lockout Procedure” on page 23
for details about locking the look-up table.
Table 13-11. Password registers
(PW(HIGH) and PW(LOW), 0x68 and 0x69), defaults highlighted
Register name
PWV(HIGH)
PWV(LOW)
DEFAULT
Address
0x68
0x69
D7
1
D6
1
Register data
D5 D4 D3 D2
Password High Byte [15:8]
Password Low Byte [7:0]
1 1 1 1
D1
1
D0
1
14.
I²C Serial Interface
The MSL2021 operates as a slave that sends and receives data through an I²C/SMBus compatible 2-wire serial interface. The interface is not needed for operation, but is provided to allow control and monitoring of device functions.
These functions include changing the Look-Up Table and equation parameters, changing the string current reference feedback voltages, reading and adjusting the fault response behavior and status, putting the device to sleep without losing the register settings, and programming the EEPROM. The I²C/SMBus compatible interface is suitable for 100kHz,
400kHz and 1MHz communication. The interface uses data I/O SDA and clock input SCL to achieve bidirectional communication between master and slaves. Fault output FLTB optionally alerts the host system to faults detected by the
MSL2021 (
and “Fault Conditions” on page 15 ). During over temperature shutdown (TSD) the
serial interface remains active.
The master, typically a microcontroller, initiates all data transfers, and generates the clock that synchronizes the transfers. SDA operates as both an input and an open-drain output. SCL operates only as an input, and does not perform clock-stretching. Pull-up resistors are required on SDA, SCL and FLTB.
MSL2021 [DATASHEET]
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31
Figure 14-1. I
2
C Interface Connections
2 x 2.2k
TYPICAL
V
I2C
MASTER
(µC)
SDA
SCL
INT
100k
SDA
SCL
FLTB MSL2021
A transmission consists of a START condition sent by a master, a 7-bit slave address plus one R/W bit, an acknowledge bit, none or many data bytes each separated by an acknowledge bit, and a STOP condition (
and
Figure 14-2. I
2
C Serial Interface Timing Details
SDA t
BUF t
SU:DAT t
SU:STA t
HD:DAT t
HD :STA t
SU:STO t
LOW
SCL t
HD:STA t
R t
HIGH t
F
START
CONDITION
REPEATED START
CONDITION
STOP
CONDITION
START
CONDITION
14.1
I
2
C Bus Timeout
The bus timeout feature allows the MSL2021 to reset the serial bus interface if a communication ceases before a STOP condition is sent. If SCL or SDA is low for more than 25ms (typical), then the MSL2021 terminates the transaction, releases SDA and waits for another START condition.
14.2
I
2
C Bit Transfer
One data bit is transferred during each clock pulse. SDA must remain stable while SCL is high.
Figure 14-3. I 2 C Bit Transfer
SDA
SCL
SDA LEVEL STABLE
SDA DATA VALID
SDA ALLOWED TO
CHANGE LEVEL
MSL2021 [DATASHEET]
42062A–LED–02/2013
32
14.3
I
2
C START and STOP Conditions
Both SCL and SDA remain high when the interface is free. The master signals a transmission with a START condition (S) by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, it issues a STOP condition (P) by transitioning SDA from low to high while SCL is high. The bus is then free.
Figure 14-4. I 2 C START and STOP Conditions
SDA
S
P
SCL
START
CONDITION
STOP
CONDITION
14.4
I
2
C Acknowledge Bit
The acknowledge bit is a clocked 9th bit which the recipient uses to handshake receipt of each byte of data. The master generates the 9th clock pulse, and the recipient holds SDA low during the high period of the clock pulse. When the master is transmitting to the MSL2021, the MSL2021 pulls SDA low because the MSL2021 is the recipient. When the
MSL2021 is transmitting to the master, the master pulls SDA low because the master is the recipient.
Figure 14-5. I 2 C Acknowledge
SCL 1 2 8 9 1
SDA
TRANSMITTER
S
SDA
RECEIVER
START
CONDITION
A
ACKNOWLEDGE
BY RECEIVER
14.5
I
2
C Slave Address
The MSL2021 has a 7-bit long slave address, 0b0100000, followed by an eighth bit, the R/W bit. The R/W bit is low for a write to the MSL2021, high for a read from the MSL2021. All MSL2021 devices have the same slave address; when using multiple devices and communicating with them through their serial interfaces, make external provision to route the serial interface to the appropriate device. Note that development systems that use I 2 C often left-shift the address one position before they insert the R/W bit, and so expect a default address of 0x20 (not 0x40).
MSL2021 [DATASHEET]
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33
Figure 14-6. I
2
C Slave Address
SDA A7 = 0
MSB
A6 = 1
SCL 1 2
A5 = 0
3
A4 = 0
4
A3 =0 A2 = 0 A1 = 0 R / W
5 6 7 8
A
9
14.6
I
2
C Message Format for Writing to the MSL2021
A write to the MSL2021 contains the MSL2021’s slave address, the R/W bit cleared to 0, and at least 1 byte of information (
is stored as a register pointer, and determines which register the following byte is written into. If a STOP condition is detected after the register address byte is received, then the MSL2021 takes no further action beyond setting the register pointer.
Figure 14-7. I
2
C Writing a Register Pointer
START
ACKNOW LEDGE
FROM M SL202x
ACKNOW LEDGE
FROM M SL202x
STOP
SDA 0 1 0 0 0 0 0 0 A D7 .
.
.
.
.
.
D 0 A
SLAVE ADDRESS ,
W RITE ACCESS
SET REGISTER
POINTER TO X
THE REGISTER POINTER NOW POINTS TO X ; A SUBSEQUENT READ
ACCESS READS FROM REGISTER ADDRESS X
When no STOP condition is detected, the byte transmitted after the register address byte is a data byte, and is placed into the register pointed to by the register address byte (
). To simplify writing to multiple consecutive registers, the register pointer auto-increments during each following acknowledge period. Further data bytes transmitted before a
STOP condition fill subsequent registers.
Figure 14-8. I
2
C Writing Two Data Bytes
START
ACKNOWLEDGE
FROM MSL202x
ACKNOWLEDGE
FROM MSL202x
ACKNOWLEDGE
FROM MSL202x
ACKNOWLEDGE
FROM MSL202x
STOP
SDA 0 1 0 0 0 0 0 0 A D7 .
SLAVE ADDRESS,
WRITE ACCESS
.
.
.
.
.
D0 A D7 .
.
.
.
.
.
D0 A D7 .
.
.
.
.
.
D0 A
SET REGISTER
POINTER TO X
DATA WRITES TO
REGISTER X
DATA WRITES TO
REGISTER X + 1
THE REGISTER POINTER NOW POINTS TO X + 2; A SUBSEQUENT READ
ACCESS BEGINS READING FROM REGISTER ADDRESS X + 2
14.7
I
2
C Message Format for Reading from the MSL2021
Read the MSL2021 registers using one of two techniques.
The first technique begins the same way as a write, by setting the register address pointer as shown in
including the STOP condition (note that even though the final objective is to read data, the R/W bit is first sent as a write because the address pointer byte is being written into the device). Follow the
transaction by what shown in
Then, after the slave initiated acknowledge bit, clock out as many bytes as desired, separated by master initiated
MSL2021 [DATASHEET]
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34
acknowledges. The pointer auto-increments during each master initiated acknowledge period. End the transmission with a not-acknowledge followed by a stop condition.
Figure 14-9. I
2
C Reading Register Data with Preset Register Pointer
START
ACKNOWLEDGE
FROM MSL202x
ACKNOWLEDGE
FROM MASTER
NOT ACKNOWLEDGE
FROM MASTER
STOP
SDA 0 1 0 0 0 0 0 1 A D7 .
.
.
.
.
.
D0 A D7 .
.
.
.
.
.
D0 A
SLAVE ADDRESS,
READ ACCESS
READ REGISTER
ADDRESS X
READ REGISTER
ADDRESS X + 1
THE REGISTER POINTER NOW POINTS TO X + 2; A SUBSEQUENT
READ ACCESS READS FROM REGISTER ADDRESS X + 2
The second read technique is illustrated in
. Write to the MSL2021 to set the register pointer, send a repeated START condition after the second acknowledge bit, then send the slave address again with the R/W bit set to 1 to indicate a read. Then clock out the data bytes separated by master initiated acknowledge bits. The register pointer auto-increments during each master initiated acknowledge period. End the transmission with a not-acknowledge followed by a stop condition. This technique is recommended for buses with multiple masters, because the read sequence is performed in one uninterruptible transaction.
Figure 14-10. I
2
C Reading Register Data Using a Repeated START
START
ACKNOWLEDGE
FROM MSL202x
ACKNOWLEDGE
FROM MSL202x
REPEATED
START
ACKNOWLEDGE
FROM MSL202x
NOT ACKNOWLEDGE
FROM MASTER
STOP
SDA 0 1 0 0 0 0 0 0 A D7 .
.
.
.
.
.
D0 A
SLAVE ADDRESS
WRITE ACCESS
SET REGISTER
POINTER
1 0 1 0 0 0 0 1 A D7 .
.
.
.
.
.
D0 A
SLAVE ADDRESS
READ ACCESS
READ REGISTERS
14.8
I
2
C Message Format for Broadcast Writing to Multiple devices
With a broadcast write to MSL2021, a master broadcasts the same register data to all MSL2021s on the bus. First send the broadcast write slave address of 0x00, followed by the MSL2021 broadcast device ID of 0x42. These two bytes are followed by the register address in the MSL2021s that the following data are to be written into, and finally the data byte(s) to be written into all devices.
A broadcast write example is shown in
. Here, the same register address in every MSL2021 is written to with identical data. If further data bytes are transmitted before the STOP condition, they are stored in subsequent internal registers of each MSL2021.
MSL2021 [DATASHEET]
42062A–LED–02/2013
35
Figure 14-11. I
2
C Broadcast Writing a Data Byte
START
ACKNOWLEDGE
FROM MSL202x
ACKNOWLEDGE
FROM MSL202x
ACKNOWLEDGE
FROM MSL202x
ACKNOWLEDGE
FROM MSL202x
STOP
SDA 0 0 0 0 0 0 0 0 A 0 1 0 0 0 0 1 0 A D7 .
.
.
.
.
.
D0 A D7 .
.
.
.
.
.
D0 A
BROADCAST WRITE
SLAVE ADDRESS
MSL202x BROADCAST ID
SETS ALL REGISTER
POINTERS TO X
DATA WRITES TO ALL
REGISTER Xs
ALL REGISTER POINTERS NOW POINT TO X + 1; THE FIRST SUBSEQUENT READ
ACCESS OF EACH MSL202x READS FROM REGISTER ADDRESS X + 1
There is no broadcast read. However, a broadcast write may be used to set up the internal register pointers of all the
MSL2021s in a system to speed up the subsequent individual reading of, for example, all the status registers.
12 illustrates a broadcast write that sets all the register pointers, and issues a STOP.
Figure 14-12. I
2
C Broadcast Writing a Register Pointer
START
ACKNOWLEDGE
FROM MSL202x
ACKNOWLEDGE
FROM MSL202x
ACKNOWLEDGE
FROM MSL202x
STOP
SDA 0 0 0 0 0 0 0 0 A 0 1 0 0 0 0 1 0 A D7
.
.
.
.
.
.
D0 A
BROADCAST WRITE
SLAVE ADDRESS
MSL202x BROADCAST ID
SETS ALL REGISTER
POINTERS TO X
ALL REGISTER POINTERS NOW POINT TO X; THE FIRST SUBSEQUENT READ ACCESS
OF EACH MSL202x BEGINS READING FROM REGISTER ADDRESS X
MSL2021 [DATASHEET]
42062A–LED–02/2013
36
15.
Packaging Information
(TOP VIEW)
D
1
2
24
PIN 1 ID d 0.1 C
(SIDE VIEW) d 0.08
SEATING PLANE
E
A
A1
(A3)
D2 e/2
E2 e
COMMON DIMENSIONS
(UNIT OF MEASURE=MM)
MAX
NOTES:
24X L 24X b
(BOTTOM VIEW)
1. Refer to JEDEC Drawing MO-220 (SAW SINGULATION)
2. Dimension "b" applies to metalized terminal and is measured between
0.15mm and 0.30mm from the terminal tip. If the terminal has the optional radius on the other end of the terminal, the dimension should not be measured in that radius area.
D
D2
E
E2
A
A1
A3 b e
L
K
SYMBOL MIN NOM
-
0.00
0.20
0.85
-
0.203 REF
0.25
2.35
2.35
4.00 BSC
2.45
4.00 BSC
2.45
0.35
0.20
0.50 BSC
0.40
-
0.90
0.05
0.30
2.55
2.55
0.45
-
NOTE
2
Package Drawing Contact: [email protected]
TITLE
24M1, 24-lead, 4.0x4.0x0.9mm Body, 0.50mm
Pitch, 2.45mm sq exposed pad, Very Thin Fine
Pitch, Quad Flat No Lead Package (VQFN)
GPC
ZUH
1/10/13
DRAWING NO.
REV.
24M1 B
No representation or warranties are made concerning third-party patents with regard to the use of Atmel ® products. The mixing of red LEDs with phosphor-converted LEDs may be protected by certain third-party patents, such as U.S. Patent
No. 7,213,940 and related patents of Cree, Inc.
MSL2021 [DATASHEET]
42062A–LED–02/2013
37
16.
Datasheet Revision History
16.1
42062A – 02/2013
1.
Initial revision.
MSL2021 [DATASHEET]
42062A–LED–02/2013
38
Table of Contents
Features 1
Typical Applications 1
1. Introduction 2
2. Ordering Information 2
3. Application Circuit 2
4. Absolute Maximum Ratings 3
5. Electrical Characteristics 4
6. Block Diagram 11
7. Pinout and Pin Description 12
8. Typical Application Circuit 14
9. Detailed Description 14
10. Fault Conditions 15
11. Applications Information 15
11.2 Setting the Main String Current with RS 15
11.3 Setting AC/DC Output Voltage 16
11.4 Selecting the Main String MOSFET 16
11.5 Selecting the Drain Resistor – RD 16
11.6 Selecting the Color-Adjust String Floating Buck Components 17
11.7 PWM and LED Brightness 20
11.8 Light Color and the THM Input 20
11.9 MSL2021 Look-Up Table Lockout Procedure 23
12. Control Registers 25
12.1 EEPROM and Power-Up Defaults 26
12.2 EEPROM Address and Control/Status Registers 26
13. Detailed Register Descriptions 27
13.1 String Duty Cycle Control Registers (SDCR18 through SDCR80, 0x00 through 0x1F) 27
13.2 Main String Reference Voltage register (MREF, 0x20) 27
13.3 Color-Adjust String Reference Voltage register (CAREF, 0x21) 28
13.4 Fault Disable register (FAULT, 0x22) 28
13.5 Fault Status register (FAULTSTAT, 0x23), Read Only 29
13.6 Sleep register (SLEEP, 0x24) 29
13.7 Thermistor Temperature register (TEMP, 0x31), Read Only 29
13.8 Password Verification registers
(PWV(HIGH) and PWV(LOW), 0x38 and 0x39) 30
13.9 Look-Up Table Lock register (LUT LOCK, 0x3A) 30
MSL2021 [DATASHEET]
42062A–LED–02/2013 i
13.10 Efficiency Optimizer Control Register (EOCTRL, 0x40) 30
13.11 Registers 0x60 and 0x61, EEPROM Access 31
13.12 Password registers (PW(HIGH) and PW(LOW), 0x68 and 0x69) 31
14. I²C Serial Interface 31
14.3 I2C START and STOP Conditions 33
14.6 I2C Message Format for Writing to the MSL2021 34
14.7 I2C Message Format for Reading from the MSL2021 34
14.8 I2C Message Format for Broadcast Writing to Multiple devices 35
15. Packaging Information 37
16. Datasheet Revision History 38
Table of Contents i
MSL2021 [DATASHEET]
42062A–LED–02/2013 ii
Atmel Corporation
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USA
Tel: (+1) (408) 441-0311
Fax: (+1) (408) 487-2600 www.atmel.com
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Fax: (+81) (3) 6417-0370
© 2013 Atmel Corporation. All rights reserved. / Rev.: 42062A–LED–02/2013
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