Application Note TO

Application Note TO
Application Note AN 2013-05
V1.0 May. 2013
TO-Leadless: A new Package for High
Current High Reliability Applications
IFAT PMM APS SE DC
Ralf Walter
TO-Leadless: A new Package for
High Current High Reliability Applications
Application Note AN 2013-05
V1.0 May 2013
Edition 2011-02-02
Published by
Infineon Technologies Austria AG
9500 Villach, Austria
© Infineon Technologies Austria AG 2011.
All Rights Reserved.
Attention please!
THE INFORMATION GIVEN IN THIS APPLICATION NOTE IS GIVEN AS A HINT FOR THE IMPLEMENTATION OF THE INFINEON TECHNOLOGIES COMPONENT ONLY AND SHALL NOT BE REGARDED
AS ANY DESCRIPTION OR WARRANTY OF A CERTAIN FUNCTIONALITY, CONDITION OR QUALITY
OF THE INFINEON TECHNOLOGIES COMPONENT. THE RECIPIENT OF THIS APPLICATION NOTE
MUST VERIFY ANY FUNCTION DESCRIBED HEREIN IN THE REAL APPLICATION. INFINEON
TECHNOLOGIES HEREBY DISCLAIMS ANY AND ALL WARRANTIES AND LIABILITIES OF ANY KIND
(INCLUDING WITHOUT LIMITATION WARRANTIES OF NON-INFRINGEMENT OF INTELLECTUAL
PROPERTY RIGHTS OF ANY THIRD PARTY) WITH RESPECT TO ANY AND ALL INFORMATION
GIVEN IN THIS APPLICATION NOTE.
Information
For further information on technology, delivery terms and conditions and prices please contact your
nearest Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the
types in question please contact your nearest Infineon Technologies Office. Infineon Technologies
Components may only be used in life-support devices or systems with the express written approval of
Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of
that life-support device or system, or to affect the safety or effectiveness of that device or system. Life
support devices or systems are intended to be implanted in the human body, or to support and/or maintain
and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or
other persons may be endangered.
AN 2013-05
Revision History: 13-05-10, V1.0
Subjects: TO-Leadless: A new Package for High Current High Reliability Application
Authors: Ralf Walter
We Listen to Your Comments
Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will
help us to continuously improve the quality of this document. Please send your proposal (including a
reference to this document) to: [email protected]
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TO-Leadless: A new Package for
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Application Note AN 2013-05
V1.0 May 2013
Table of contents
1 Introduction .................................................................................................................................................. 5
2 Mechanical dimensions .............................................................................................................................. 5
2.1
Space reduction ................................................................................................................................. 5
2.2
High Continuous Current ................................................................................................................... 6
2.3
Automatic Optical Inspection (AOI) .................................................................................................... 7
3 Package Handling ........................................................................................................................................ 9
3.1
ESD-Protective Measurement ........................................................................................................... 9
3.1.1 ESD-Protective Measure in the Workplace .................................................................................... 9
3.1.2 Equipment for Personnel ................................................................................................................ 9
3.1.3 Production Installations and Processing Tools .............................................................................. 9
3.2
Packing of Components ...................................................................................................................10
3.3
Moisture Sensitivity Level ................................................................................................................10
3.4
Storage and Transportation Conditions ...........................................................................................11
3.5
Handling Damage and Contamination .............................................................................................11
3.6
Component Solderability ..................................................................................................................11
4 Printed Circuit Board ................................................................................................................................12
4.1
Routing .............................................................................................................................................12
4.2
PCB Pad Design ..............................................................................................................................12
4.3
Pad Surfaces....................................................................................................................................13
5 PCB Assembly ...........................................................................................................................................14
5.1
Solder Stencil ...................................................................................................................................14
5.2
Solder Paste.....................................................................................................................................15
5.3
Component Placement ....................................................................................................................15
5.4
Soldering ..........................................................................................................................................16
5.5
Cleaning ...........................................................................................................................................18
5.6
Inspection .........................................................................................................................................18
6 Rework ........................................................................................................................................................19
6.1
Tooling .............................................................................................................................................19
6.2
Device Removal ...............................................................................................................................19
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TO-Leadless: A new Package for
High Current High Reliability Applications
Application Note AN 2013-05
V1.0 May 2013
6.3
Site Redressing ................................................................................................................................19
6.4
Reassembly and Reflow ..................................................................................................................20
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TO-Leadless: A new Package for
High Current High Reliability Applications
1
Application Note AN 2013-05
V1.0 May 2013
Introduction
The TO-Leadless (P/PG-HSOF) is a molded package optimized for high power high reliability applications.
It´s small mechanical dimensions allow really compact designs and the high current capability combined with
the low Thermal Resistance (RthJC), resulting in lower chip temperatures enables the designer to go for
higher power density and higher reliability.
All mechanical details shown in the following chapters and additionally a general recommendation how to
handle Infineon´s SMD devices could be found at www.infineon.com/packages.
2
Mechanics
2.1
Outlines
Figure 2.1: Outlines of TO-Leadless
2.2
Space reduction
Compared to the commonly used D2PAK or D2PAK 7Pin the TO-Leadless has a smaller footprint. It´s only
11.7mm*9.9mm*2.3mm compared to the 15.0mm*10.0mm*4.4mm of the D2PAK (7Pin). This leads to a 30%
smaller footprint and a 60% smaller space.
Figure 2.2: Space reduction of TO-Leadless compared to D2PAK 7Pin
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TO-Leadless: A new Package for
High Current High Reliability Applications
2.3
Application Note AN 2013-05
V1.0 May 2013
High Continuous Current
The maximum continuous current of a device could be limited by different reasons:

Silicon losses are too high with given thermal resistance RthJC

Bond wire losses due to too high current density

Current density of solder joints
Because of the thin leadframe the thermal resistance RthJC is also reduced compared to the D2PAK 7Pin.
2
As a result the resistance RthJC now is less than 0.4K/W (max.) for a 30mm chip (D2PAK: 0.5K/W max.).
The maximum continuous current capability is only in 150V limited by the silicon losses, in all other voltage
classes the solder joints are the limiting factor. Fig. 2.3 shows additionally the calculated ZthJC for both
D2PAK and the new TO-Leadless
Figure 2.3: ZthJC (calculated) of D2PAK 7Pin and TO-Leadless
Fig. 2.4 shows a picture of the bond wires. Up to 5 bond wires with a diameter of 500µm each are used. Big
solder connections to the chip also reduce the current density. Resulting in a lower temperature stress of the
bond wires and the chip connections.
Figure 2.4: Five Bond wires, diameter 500µm each and massive solder connections
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TO-Leadless: A new Package for
High Current High Reliability Applications
Application Note AN 2013-05
V1.0 May 2013
Depending on the package another possible bottleneck limits the maximum possible continuous current.
Especially at higher current density combined with an increased temperature an effect called
“electromigration” could weaken the solder connections. As a result the reliability of the complete device
2
could be influenced negatively. The TO-Leadless offers a solderable area of more than 12mm (D2PAK
2
7Pin: 8mm ), reducing the current density by one third, reducing the temperature stress and the risk of
electromigration. Fig. 2.5 shows the comparison between these power packages.
Figure 2.5: Increased solderable area reduces current density
2.4
Automatic Optical Inspection (AOI)
Leadless packages like CanPAK™ or SuperSO8 don´t allow an AOI because the solder joints are (partly)
hidden under the package. On the bottom side of the gate and source contacts trapezoidal grooves lead to a
visible solder joint, avoiding the necessity of an expensive X-Ray inspection.
These grooves are the result of the trim-and-form process before plating and cutting.
Figure 2.6 shows on the left side the view from the front side. On the right side (flipped view) the grooves are
shown.
Figure 2.6: Tinned trapezoidal grooves on the tips of gate and source contacts
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TO-Leadless: A new Package for
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Application Note AN 2013-05
V1.0 May 2013
After soldering it´s easy to identify a good solder joint using standard AOI. In Figure 2.7 a typical result of a
solder process is highlighted. A cut through a source connection shows the solder (light yellow). The groove
is filled completely and additionally a solder meniscus is visible on the left side outside the part, allowing an
assessment of the solder connection.
Figure 2.7: Visible solder meniscus allows a simple and unexpensive AOI
Shape and amount of the visible solder meniscus can be checked by AOI, avoiding reliability problems due
to bad solder joints.
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TO-Leadless: A new Package for
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3
Package Handling
3.1
ESD-Protective Measurement
Application Note AN 2013-05
V1.0 May 2013
Semiconductors are normally Electro-Static Discharge Sensitive (ESDS) devices requiring specific
precautionary measures regarding handling and processing. Discharging of electrostatically charged objects
over an Integrated Circuit (IC) can be caused by human touch or by processing tools, resulting in highcurrent and/or high-voltage pulses that can damage or even destroy sensitive semiconductor structures. On
the other hand, ICs may also be charged during processing. If discharging takes place too quickly (“hard”
discharge), it may cause load pulses and damage, too. ESD protective measures must therefore prevent
contact with charged parts as well as electrostatic charging of the ICs. Protective measures against ESD
must be taken during handling, processing, and the packing of ESDSs. A few hints are provided below on
handling and processing.
3.1.1 ESD-Protective Measure in the Workplace










Standard marking of ESD protected areas
Access controls, with wrist strap and footwear testers
Air conditioning
Dissipative and grounded floor
Dissipative and grounded working and storage areas
Dissipative chairs
Earth (“ground”) bonding points for wrist straps
Trolleys or carts with dissipative surfaces and wheels
Suitable shipping and storage containers
No sources of electrostatic fields
3.1.2 Equipment for Personnel




Dissipative/conductive footwear or heel straps
Suitable smocks
Wrist straps with safety resistors
Gloves or finger coats that are ESD-proven (with specified volume resistivity)
Regular training of staff to avoid ESD failures using this equipment is recommended.
3.1.3 Production Installations and Processing Tools





Machine and tool parts made of dissipative or metallic materials
No materials having thin insulating layers or sliding tracks
All parts reliably connected to ground potential
No potential difference between individual machine and tool parts
No sources of electrostatic fields
Detailed information on ESD-protective measures may be obtained from the ESD Specialist through Area
Sales Offices. Our recommendations are based on the internationally applicable standards IEC 61340-5-1
and ANSI/ESD S2020.
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TO-Leadless: A new Package for
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3.2
Application Note AN 2013-05
V1.0 May 2013
Packing of Components
Different packings such as fixtures for feeding components in an automatic pick&place machine (tape&reel,
trays,…) and surrounding bags and boxes to prevent damage during transportation or strorage are available
depending on component and customer needs. Please refer to product and package specifications (on the
IFX homepage) and our sales department to get information about what packing is available for a given
product.
Generally the following list of standards dealing with packing should be considered if applicable for a given
device and packing:
IFX packings according to the IEC 60286-* series
 IEC 60286-3 Packaging of components for automatic handling – Part 3: Packaging of surface
mount components on continuous tapes.
 IEC 60286-4 Packaging of components for automatic handling – Part 4: Stick magazines for dualin-line packages.)
 IEC 60286-5 Packaging of components for automatic handling – Part 5: Matrix trays
Moisture-sensitive Surface Mount Devices (SMDs) are packed according to IPC/JEDEC J-STD-033*:
Handling, Packing, Shipping and Use of Moisture/Reflow Sensitive Surface Mount Devices
Detailed Packing Drawings www.infineon.com/packages

Other References:
 ANSI/EIA-481-Standards Proposal No. 5048, Proposed Revision of ANSI/EIA-481-B “8mm through
200mm Embossed Carrier Taping and 8mm & 12mm Punched Carrier Taping of Surface Mount
Components for Automatic Handling (if approved, to be published as ANSI/EIA-481-C).
 EIA-783 Guideline Orientation Standard for Multi-Connection Package (Design Rules for Tape and
Reel Orientation)
3.3
Moisture Sensitivity Level
For moisture-sensitive packages, it is necessary to control the moisture content of the components.
Penetration of moisture into the package molding compound is generally caused by exposure to ambient air.
In many cases, moisture absorption leads to moisture concentrations in the component that are high enough
to damage the package during the reflow process. Thus it is necessary to dry moisture-sensitive
components, seal them in a moisture-resistant bag, and only remove them immediately prior to assembly to
the Printed Circuit Board (PCB). The permissible time (from opening the moisture barrier bag until the final
soldering process) that a component can remain outside the moisture barrier bag is a measure of the
sensitivity of the component to ambient humidity (Moisture Sensitivity Level, MSL). The most commonly
applied standard IPC/JEDEC J-STD-033* defines eight different MSLs (see Figure 3.1). Please refer to the
“Moisture Sensitivity Caution Label” on the packing material, which contains information about the moisture
sensitivity level of our products. IPC/JEDEC-J-STD-20 specifies the maximum reflow temperature that shall
not be exceeded during board assembly at the customer’s facility.
Figure 3.1: Moisture Sensitivity Levels (acc. to IPC/JEDEC J-STD-033, RH=Relative Humidity)
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TO-Leadless: A new Package for
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Application Note AN 2013-05
V1.0 May 2013
If moisture-sensitive components have been exposed to ambient air for longer than the specified time
according to their MSLs, or the humidity indicator card indicates too much moisture after opening a Moisture
Barrier Bag (MBB), the components have to be baked prior to the assembly process. Please refer to
IPC/JEDEC J-STD-033* for details. Baking a package too often can cause solderability problems due to
oxidation and/or intermetallic growth. In addition, packing material (e.g. trays, tubes, reels, tapes,…) may not
withstand higher baking temperatures. Please refer to imprints/labels on the respective packing to determine
allowable maximum temperature.
For Pb-free components, two MSLs can be given: One for a lower reflow peak temperature (Pb-containing
process) and one for a higher reflow peak temperature (Pb-free). Each one is valid for the respective
application.
3.4
Storage and Transportation Conditions
Improper transportation and unsuitable storage of components can lead to a number of problems during
subsequent processing, such as poor solderability, delamination, and package cracking effects.
These standards should be taken into account:
 IEC 60721-3-0 Classification of environmental conditions: Part 3: Classification of groups of
environmental parameters and their severities; introduction.
 IEC 60721-3-1 Classification of environmental conditions: Part 3: Classification of groups of
environmental parameters and their severities; Section 1: Storage
 IEC 60721-3-2 Classification of environmental conditions: Part 3: Classification of groups of
environmental parameters and their severities; Section 2: Transportation
 IEC 61760-2 Surface mounting technology – Part 2: Transportation and storage conditions of
surface mounting devices (SMD) – Application guide.
 IEC 62258-3 Semiconductor Die Products – Part 3: Recommendations for good practise in handling,
packing and storage
 ISO 14644-1 Clean rooms and associated controlled environments Part 1: Classification of airborne
particulates
Figure 3.2: General Storage Conditions – Overview (MBB=Moisture Barrier Bag)
Maximum storage time:
The conditions to be complied with in order to ensure problem-free processing of active and passive
components are described in standard IEC 61760-2.
3.5
Handling Damage and Contamination
Automatic or manual handling of components in or out of the component packing may cause mechanical
damage to package leads and/or body.
TO-Leadless components in the packing are ready to use.
Any contamination applied to component or packing may cause or induce processes that (together with other
factors) may lead to a damaged device. The most critical issues are:
 Solderability problems
 Corrosion
 Electrical shorts (due to conductive particles)
3.6
Component Solderability
The sufficiently thick and wettable metal surfaces (final plating) or solder depots/balls of most semiconductor
packages assure good solderability, even after a long storage time.
Suitable methods for the assessment of solderability can be derived from JESD22B 102 or IEC60068-2-58.
TO-Leadless components are compatible with Pb-containing and Pb-free soldering.
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TO-Leadless: A new Package for
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4
Printed Circuit Board
4.1
Routing
Application Note AN 2013-05
V1.0 May 2013
The PCB design and construction are key factors for achieving highly reliable solder joints. For example, TOLeadless packages should not be placed at the same opposite locations on either side of the PCB (if doublesided mounting is used), because this results in a stiffening of the assembly with earlier solder joint fatigue
compared to a design in which the component locations are offset. Furthermore, it is known that the board
stiffness itself has a significant influence on the reliability (temperature cycling) of the solder joint
interconnect, if the system is used in critical temperature cycling conditions.
4.2
PCB Pad Design
The solder pads have to be designed to assure optimum manufacturability and reliability. Two basic types of
solder pads are commonly used:
 „Solder-Mask Defined“ (SMD) pad: The copper pad is larger than the solder-mask opening above
this pad. Thus the wettable area is defined by the opening in the solder mask.
Figure 4.1: Solder-Mask Defined (SMD) Pad

„Non-Solder-Mask Defined“ (NSMD) pad: Around each copper pad there is solder-mask clearance. It
is necessary to specify the dimensions and tolerances of the solder mask clearance so that no
overlapping of the solder pad by solder mask occurs (depending on PCB manufacturers’ tolerances,
75 μm is a widely used value).
Figure 4.2: Non-Solder-Mask Defined (NSMD) Pad
In high-current applications or those having high thermal dissipation, source pads require the largest
possible contact area to the PCB.
SMD pads are the preferred solution to get the largest possible contact areas for drain and source. To
increase the conductivity, the copper areas should be maximized (depending on application, PCB
manufacturer capability, etc.).
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TO-Leadless: A new Package for
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Application Note AN 2013-05
V1.0 May 2013
The following fig. 4.3 show the recommended PCB pad designs including appropriate dimensions for TOLeadless.
Please note that the recommendations can only give dimensions for the solder-mask openings. Generally
the copper dimensions depend on the capability of the board manufacturer. For high current applications, the
copper dimensions for drain and source pads should be as big as possible to enlarge the conductor crosssections.
Figure 4.3: Recommended Footprint (Solder-Mask Derived)
To connect drain and source pads thermally and electrically directly to inner and/or bottom copper planes of
the board, plated through-hole vias are used. They help to distribute the heat into the board area, which
spreads from the chip directly through source contacts or by the metal-can, in case of drain. Locating vias
too near to or in the area of open solder mask leads to solder wicking and could finally result in soldering
problems and/or reduced reliability.
Thermal and electrical analysis and/or testing are recommended to determine the minimum number of vias
needed for a specific application.
4.3
Pad Surfaces
The solder pads have to be easy for the solder paste to wet. In general, all finishes are well-proven for
Surface Mount Technology Assembly (SMTA). Using a Hot Air Solder Leveling (HASL) finish (Pb-free or Pbcontaining HASL), a certain unevenness has to be taken into account. Other platings are completely “flat” (e.
(e.g. Cu-Organic Solderability Preservative, electroless Sn or NiAu) and therefore are preferred when finepitch components are used on the PCB (please refer to Figure 4.4).
From a package point of view, it is difficult to recommend a certain PCB pad finish that will always meet all
requirements. The choice of finish also depends strongly on board design, pad geometry, all components on
the board, and process conditions, and must meet the specific needs of the customer.
Infineon’s internal tests have shown that Cu-OSP and NiAu are quite effective platings. Due to the higher
cost of NiAu, Cu-OSP is recommended for mass production.
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TO-Leadless: A new Package for
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Application Note AN 2013-05
V1.0 May 2013
Figure 4.4: Typical PCB pad finishes
5
PCB Assembly
5.1
Solder Stencil
The solder paste is applied onto the PCB metal pads by stencil printing. The volume of the printed solder
paste is determined by the stencil aperture and the stencil thickness. Too much solder paste will cause
solder bridging, whereas too little solder paste can lead to insufficient solder wetting between all contact
surfaces. In most cases the thickness of a stencil has to be matched to the needs of all components on the
PCB. To ensure a uniform and high solder paste transfer to the PCB, laser-cut stencils are suitable and costeffective.
The stencil thickness directly affects the amount of solder that is available to form the solder joints for source
and gate contacts and the solder volume of source/gate pads has to be within a certain range to avoid
electrical opens or shorts. This implies that the stencil apertures for source/gate pads have to be adjusted to
the stencil thickness. A thick stencil results in a reduced aperture, a thin stencil in an enlarged aperture.
Internal investigation showed good results with 150-μm stencil thickness, and the following figure shows the
given aperture sizes.
When using stencils thinner than 100 μm, it is only possible to bridge the gap by overprinting of source/gate
pads, which may result in an increased failure rate due to electrical shorts. Apertures for especially small
gate pads for stencils thicker than 175 μm will barely release the solder paste.
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TO-Leadless: A new Package for
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Application Note AN 2013-05
V1.0 May 2013
Figure 5.1: Recommended Stencil Design
5.2
Solder Paste
Solder paste consists of solder alloy and a flux system. Normally the volume is split into about 50% alloy and
50% flux and solvents. In term of mass, this means approximately 90 wt% alloy and 10 wt% flux system and
solvents. The flux system has to remove oxides and contamination from the solder joints during the soldering
process. The capacity for removing oxides and contamination is given by the respective activation level.
The contained solvent adjusts the viscosity needed for the solder paste application process. The solvent has
to evaporate during reflow soldering.
The paste must be suitable for printing the solder stencil aperture dimensions; Type 3 paste is
recommended.
Solder paste is sensitive to age, temperature, and humidity. Please follow the handling recommendations of
the paste manufacturer.
5.3
Component Placement
For the placement of TO-Leadless the following important machine specifications have to be considered:
 Placement accuracies of +/-50 μm are recommended. Tests have shown that greater inaccuracies
are tolerable but not necessarily desirable.
 Placement forces of 1.5 to 2.5N or over-travel during placing of 50 to 100μm are recommended.
Further details about the placement of TO-Leadless are described in the following paragraph.
Although the self-alignment effect due to the surface tension of the liquid solder will support the formation of
reliable solder joints, the components have to be placed accurately. Positioning the packages manually is not
recommended but is possible, especially for packages with big terminals and pitch. An automatic pick&place
machine is recommended to get reliable solder joints, .
Component placement accuracies of +/-50 μm are obtained with modern automatic component placement
machines using vision systems. With these systems, both the PCB and the components are optically
measured and the components are placed on the PCB at their programmed positions. The fiducials on the
PCB are only located on the edge of the PCB for the entire PCB or additionally on individual mounting
positions (local fiducials). These fiducials are detected by a vision system immediately before the mounting
process and help to avoid displacement due to deviations in PCB geometry.
Recognition of the packages is performed by a special vision system, enabling the complete package to be
centered correctly.
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TO-Leadless: A new Package for
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Application Note AN 2013-05
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The following factors are important:


Especially on large boards, local fiducials close to the device can compensate for PCB tolerances.
The lead recognition capabilities of the placement system should be used rather than the outline
centering. Outline centering can only be used for packages where the tolerances between pad and
outline are small compared to the placement accuracy needed.
 To ensure the identification of the packages by the vision system, adequate lighting as well as the
correct choice of measuring modes is necessary. The correct settings can be taken from the
equipment manuals.
 Too much placement force can squeeze out solder paste and cause solder-joint shorts. On the other
hand, not enough placement force can lead to insufficient contact between package and solder
paste and may result in insufficient sticking of the component on the solder paste, which may then
lead to shifted or dropped devices. Placement forces of 1.5 to 2.5 N or over-travel (= going further
down with the component after the machine has registered the first touch down onto solder paste)
during placing of 50 to 100 μm are good starting points.
A pick-up nozzle suitable for the package body size should be used. The nozzle should be slightly smaller
than the package body. A bigger nozzle may lead to an irregular force distribution, thereby increasing forces
at the edges of the package body in particular. On the other hand, a nozzle that is too small may lead to
increased forces in the package center. Package bodies that are divided into different areas that have
different heights require special care when choosing the nozzle. Nozzle shape and size are probably more
critical in these cases.
5.4
Soldering
Soldering determines the yield and quality of assembly fabrication to a very large extent. Generally all
standard reflow soldering processes have these features:



Forced convection (max. qualified profile given by the JEDEC MSL classification)
Vapor phase
Infrared (with restrictions)
Typical temperature profiles are suitable for board assembly of the TO-Leadless. Wave soldering of TOLeadless package is not possible.
During the reflow process, each solder joint has to be exposed to temperatures above the solder melting
point or “liquidus” for a sufficient time to get the optimum solder joint quality, whereas overheating the PCB
with its components has to be avoided. Please refer to the bar code label on the packing for the peak
package body temperature. When using infrared ovens without convection, special care may be necessary
to assure a sufficiently homogeneous temperature profile for all solder joints on the PCB, especially on large,
complex boards with different thermal masses of the components. The recommended type of process is
forced convection reflow. Using a nitrogen atmosphere can generally improve solder joint quality, but is
normally not necessary for soldering tin-lead metal alloys.
The temperature profile of a reflow process is one of the most important factors of the soldering process. It is
divided into several phases, each with a special function. Fig. 5.2 shows a general forced convection reflow
profile for soldering TO-Leadless. Fig. 5.3 shows an example of the key data of such a solder profile that has
been used for the Sn-Pb and for the Pb-free alloy listed above. Individual parameters are influenced by
various facts, not only by the package. It is essential to follow the solder paste manufacturer’s application
notes, too. Additionally, most PCBs contain more than one package type and therefore the reflow profile has
to be matched to all components’ and materials’ demands. We recommend measuring the solder joints’
temperatures by thermocouples beneath the respective packages. Consider that components with large
thermal masses do not heat up at the same speed as lightweight components, the position and the
surrounding of the package on the PCB as well as the PCB thickness can also influence the solder-joint
temperature significantly. Therefore, these reflow profiles should serve as guidelines, but have to be further
adjusted to each actual application.
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TO-Leadless: A new Package for
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Application Note AN 2013-05
V1.0 May 2013
Because the thermal impact of reflow is critical for Pb-free solder pastes, linear temperature profiles can be
applied to achieve a shorter reflow time in total. When reducing the soaking time, it is very important to
ensure a homogeneous temperature distribution on the PCB; in this case, a convection oven is
recommended.
Figure 5.2: General forced-convection reflow solder profile
Parameter
Tin-lead alloy
Pb-free
Main influences come from
(SnPb or SnPbAg)
(SnAgCu)
Preheating rate
2.5K/s
2.5K/s
Flux system (solder paste)
Soaking temperature
140-170°C
140-170°C
Flux system (solder paste)
Soaking time
80s
80s
Flux system (solder paste)
Peak temperature
225°C
245°C
Alloy (solder paste)
Reflow time above
60s
60s
Alloy (solder paste)
2.5K/s
2.5K/s
melting point (liquidus)
Cool-down rate
Figure 5.3: Example of the key data of a forced-convection reflow solder profile
Double-Sided Assembly
TO-Leadless generally suitable for mounting on double-sided PCBs. First, the board assembly is done on
one side of the PCB (including soldering). Afterwards, the second side of the PCB is assembled.
If the solder-joint thickness is a critical dimension, please be aware that solder joints of components on the
first side will be reflowed again in the second reflow step. In the reflow zone of the oven (i.e. where the
solder is liquid), the components are only held by wetting forces from the molten solder. Gravity acting in the
opposite direction will elongate the solder joints, unlike joints on the top side, where gravity forces the
components nearer to the PCB surface). This shape will be frozen at temperatures below the melting point of
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TO-Leadless: A new Package for
High Current High Reliability Applications
Application Note AN 2013-05
V1.0 May 2013
solder and therefore result in a higher stand-off on the bottom side after the reflow process. Heavy vibrations
in a reflow oven may cause devices to drop off the PCB.
Underfill application
The board-level reliability of TO-Leadless is robust enough to do without underfill. Nonetheless if underfill
should be applied, we recommend assessing the electrical and (thermo-)mechanical behaviour of assembled
and underfilled components over the lifetime of the electronic device.
5.5
Cleaning
After the reflow soldering process, some flux residues can be found around the solder joints. If a “no-clean”
solder paste has been used for solder paste printing, the flux residues usually do not have to be removed
after the soldering process.
Generally processes and materials which are used to avoid corrosion and following migration (e.g. coating)
may have to be adjusted very thoroughly when using TO-Leadless.
If solder joints have to be cleaned, the cleaning method (e.g. ultrasonic, spray or vapour cleaning) and
solution will depend on the packages to be cleaned, the flux used in the solder paste (rosin-based, watersoluble, etc.), and environmental and safety aspects. Even small residues of the cleaning solution should be
removed/dried very thoroughly. It is recommended to contact the solder paste manufacturer for
recommended cleaning solutions and to measure the residues after cleaning. Please also take into account
that the amount of residues may depend on PCBs surface conditions, line output, cleaning solution life time,
etc.
Infineon Technologies has tested TO-Leadless under harsh conditions like 85°C and 85% r.h. while applying
voltage between gate and source pads (so-called H3TRB test acc. JESD22-A101C). After 1000 hours the
leakage currents are still within the data sheet specification and after desoldering the components no hints
for silver migration can be found
5.6
Inspection
A visual inspection of the solder joints with conventional Automatic Optical Inspection (AOI) systems is
possible due to the grooves at the source and gate pads solder joints. Fig. 5.4 shows a cut through a source
connection, showing the solder joint at a source connection.
For the acceptance of electronic assemblies inspected optically, please refer also to the IPC-A-610 standard.
Automatic X-ray Inspection (AXI) systems are appropriate for efficient inline control. AXI systems are
available as 2D and 3D solutions. They usually consist of an X-ray camera and the hardware and software
needed for inspection, controlling, analysing, and data transfer routines. These reliable systems enable the
user to detect soldering defects such as poor soldering, bridging, voiding and missing parts. However, other
defects such as broken solder joints are not easily detectable by X-ray.
Figure 5.4: Visible solder meniscus allows a simple and unexpensive AOI
Pb-free solder joints look different from tin-lead (SnPb) solder joints. SnPb solder joints typically have a
bright and shiny surface. Lead-free (SnAgCu) solder joints typically do not have this bright surface. Pb-free
solder joints are often dull and grainy. These surface properties are caused by the irregular solidification of
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TO-Leadless: A new Package for
High Current High Reliability Applications
Application Note AN 2013-05
V1.0 May 2013
the solder, as the solder alloys are not exactly eutectic (like the 63Sn37Pb solder alloy). This means that
SnAgCu-solders do not have a melting point but a melting range of several degrees. Although Pb-free solder
joints have this dull surface, this does not mean that Pb-free joints are of lower quality or weaker than the
SnPb joints. It is therefore necessary to teach the inspection staff what these Pb-free joints look like, and/or
to adjust optical inspection systems to handle Pb-free solder joints.
6
Rework
If a defective component is observed after board assembly, the device can be removed and replaced by a
new one. Repair of components’ individual solder joints is not possible. Repair of underfilled components is
not recommended. Damage caused by mechanically removing underfill from PCB and components may
result in reduced reliability. Reusing components (especially underfilled components) is not recommended.
Please take care that during rework no corrosive acting substances are applied on, underneath, or near to
TO-Leadless which may lead to silver migration.
6.1
Tooling
The rework process is commonly done on special rework equipment. There are a lot of systems available on
the market, and the equipment should fulfill the following requirements for processing these packages:
Heating: Hot air heat transfer to the package and PCB is strongly recommended. Temperature and air flow
for heating the device should be controlled. With freely-programmable temperature profiles (e.g. by PC
controller) it is possible to adapt the profiles to different package sizes and masses. PCB preheating from the
underside is recommended. Infrared heating can be applied, especially for preheating the PCB from the
underside, but it should be only augmenting the hot air flow from the upper side. Nitrogen can be used
instead of air.
Vision system: The bottom side of the package as well as the site on the PCB should be observable. A split
optic should be used for precise alignment of package to PCB. Microscope magnification and resolution
should be appropriate for the pitch of the device.
Moving and additional tools: The device should be relocatable on the whole PCB area. Placement accuracy
is recommended to be better than +/-100 μm. The system should have the capability of removing solder
residues from PCB pads (special vacuum tools).
6.2
Device Removal
If a component is suspected to be defective and will be sent back to the supplier, please do not remove this
component from the PCB, but send the PCB to Infineon Technologies. This guarantees that no further
defects are introduced to the device, because this may hinder the failure analysis at the supplier’s facility.
This procedure is mandatory for underfilled devices. For non-underfilled components, it is possible to remove
the device gently from the PCB prior to sending it back. Please follow these precautions:



6.3
Moisture: Depending on the component’s MSL, the package may have to be dried before removal.
If the maximum storage time out of the dry pack (see label on packing material) is exceeded after
board assembly, the PCB has to be dried according to the recommendations (see Section 2.3).
Otherwise, too much moisture may have been accumulated and damage may occur (popcorn
effect).
Temperature profile: During the soldering process, it should be assured that the package peak
temperature is not higher and temperature ramps are not steeper than for the standard assembly
reflow process.
Mechanics: Be careful not to apply high mechanical forces for removal. Otherwise failure analysis of
the package can be impossible or the PCB can be damaged. Pipettes (implemented on most rework
systems) can be used for large packages; tweezers may be more practical for small packages.
Site Redressing
After removing the defective component, the pads on the PCB have to be cleaned of solder residues. This
may be done by vacuum desoldering or wick.
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TO-Leadless: A new Package for
High Current High Reliability Applications
Application Note AN 2013-05
V1.0 May 2013
If the component was underfilled, the remaining underfill on the PCB also has to be removed. Some solvents
may be necessary to clean the PCB of flux residues (and underfill residues if applicable).
Don’t use steel brushes because steel residues can lead to bad solder joints. In all cases, harsh mechanical
treatment may damage PCB pads and conductors.
Before placing a new component on the PCB, solder paste should be applied to each PCB pad by printing
(special micro stencil) or dispensing. Another method that may lead to a decreased solder stand-off
compared to non-repaired components is to apply flux only by dispensing or with a brush (often so-called
“sticky” flux is used for this purpose). No-clean flux and solder paste is mandatory.
6.4
Reassembly and Reflow
After preparing the site, the new package can be placed onto the PCB. Placement accuracy and placement
force should be comparable to the automatic pick-and-place process. During soldering, it should be assured
that the package peak temperature is not higher and temperature ramps are not steeper than for the
standard assembly reflow process.
20
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