A1304 Datasheet

A1304

Linear Hall-Effect Sensor IC with Analog Output,

Available in a Miniature, Low Profile Surface Mount Package

FEATURES AND BENEFITS

• 3.3 V supply operation

• Allegro factory programmed offset and sensitivity

• Miniature package

• High bandwidth, low noise analog output

• High speed chopping scheme minimizes QVO drift across operating temperature range

• Temperature-stable quiescent voltage output and sensitivity

• Precise recoverability after temperature cycling

• Wide ambient temperature range: –40°C to 85°C

• Immune to mechanical stress

Package: 3-Pin Surface Mount SOT23-W

(suffix LH)

DESCRIPTION

New applications for linear output Hall effect sensors require medium accuracy and smaller package size. The Allegro A1304 linear Hall effect sensor IC has been designed specifically to achieve both goals. This temperature-stable device is available in a miniature surface mount package (SOT23-W).

This ratiometric Hall effect sensor provides a voltage output that is proportional to the applied magnetic field and features a quiescent voltage output of 50% of the supply voltage.

Each BiCMOS monolithic circuit integrates a Hall element, offset and sensitivity trim circuitry to correct for the variation in the Hall element, a small-signal high-gain amplifier, and a proprietary dynamic offset cancellation technique.

The A1304 sensor IC is available in a 3-pin surface mount

SOT-23W style package (LH suffix). The package is lead (Pb) free, with 100% matte tin leadframe plating.

Approximate footprint

V+

VCC

VOUT

C

BYPASS

Dynamic Offset Cancellation

Sensitivity

Trim Control

GND

Functional Block Diagram

Offset

A1304-DS, Rev. 1

A1304



Selection Guide

Part Number

A1304ELHLX-T

Sensitivity

(typ)(mV/G)

4.0

A1304ELHLX-05-T 0.5

*Contact Allegro ™ for additional packing options

Packing*

10,000 pieces per reel

10,000 pieces per reel

Package

3-pin SOT-23W surface mount

3-pin SOT-23W surface mount

Allegro MicroSystems, LLC

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

2

A1304



SPECIFICATIONS

Absolute Maximum Ratings

Characteristic

Forward Supply Voltage

Reverse Supply Voltage

Forward Output Voltage

Reverse Output Voltage

Output Source Current

Output Sink Current

Operating Ambient Temperature

Maximum Junction Temperature

Storage Temperature

Symbol

V

CC

V

RCC

V

OUT

V

ROUT

I

OUT(SOURCE)

I

OUT(SINK)

T

A

T

J

(max)

T stg

V

OUT

to GND

V

CC

to V

OUT

Range E

Notes Rating

5.5

–0.1

7

–0.1

1

5

–40 to 85

165

–65 to 170 mA

ºC

ºC

ºC

Unit

V

V

V

V mA

Thermal Characteristics may require derating at maximum conditions, see application information

Characteristic Symbol Test Conditions*

Package Thermal Resistance R

θJA

Package LH, 1-layer PCB with copper limited to solder pads

Package LH, 2-layer PCB with 0.463 in.

2 of copper area each side connected by thermal vias

*Additional thermal information available on the Allegro website

Value

228

110

Units

ºC/W

ºC/W

Pin-out Drawing and Terminal List

3

1 2

LH Package, 3-Pin SOT23-W Pin-out Diagram

Terminal List Table

Name Number

VCC 1

VOUT

GND

2

3

Description

Input power supply; tie to GND with bypass capacitor

Output signal

Ground





3

A1304



OPERATING CHARACTERISTICS : valid across T

A

, C

BYPASS

= 0.1 µF, V

CC

= 3.3 V unless otherwise noted

Characteristic

Electrical Characteristics

Supply Voltage

Supply Current

Power-On Time 2,3

V

CC

Ramp Time 2,3

V

CC

Off Level 2,3

Internal Bandwidth 3

Output Characteristics

Symbol t

V

I t

CC

CC

PO

VCC

V

CCOFF

BW i

Test Conditions

No load on VOUT

T

A

= 25°C, C

L

= 10 nF

T

A

= 25°C

T

A

= 25°C

Small signal –3 dB

Min.

3

–

–

0.005

0

–

Typ.

Output Referred Noise 3 V

N

A1304ELHLX-T

A1304ELHLX-05-T

T

A

= 25ºC; C

BYPASS

= open; no load on VOUT

–

–

13

13

Input Referred RMS Noise Density 3 V

NRMS

A1304ELHLX-T

A1304ELHLX-05-T

T

A

= 25ºC; C f << BW i

BYPASS

= open; no load on VOUT;

–

–

2.3

4.6

DC Output Resistance

Saturation Voltage 3

3

Output Load Resistance 3

Output Load Capacitance 3

R

OUT

R

L

C

L

V

SAT(HIGH)

V

SAT(LOW)

VOUT to GND

VOUT to GND

T

A

= 25°C, R

L

= 10 kΩ, (VOUT to GND)

T

A

= 25°C, R

L

= 10 kΩ, (VOUT to GND)

–

4.7

–

2.87

–

Magnetic Characteristics

Sensitivity 4

Sensitivity Temperature Coefficient

Quiescent Voltage Output (QVO)

Delta QVO

Error

Ratiometry Sensitivity Error

3

Ratiometry Quiescent Voltage Output

TC

V

∆V

Rat

Sens

Rat

Sens

OUT(Q)

OUT(Q)

VOUT(Q)

Sens

A1304ELHLX-T

A1304ELHLX-05-T

T

A

= 25ºC

T

A

= 85°C, relative to Sens at 25°C

T

A

= 25°C, B = 0 G

A1304ELHLX-T

A1304ELHLX-05-T

T

A

= 85ºC, relative to

QVO at 25ºC

Across specified supply voltage range (relative to V

CC

= 3.3 V)

Across specified supply voltage range (relative to V

CC

= 3.3 V)

A1304ELHLX-T Typ. Sensitivity, ±300 G

A1304ELHLX-05-T Typ. Sensitivity, ±2250 G

3.76

0.2

0.04

1.625

–

–

–

–

±1.5

±1.5

Linearity Sensitivity Error Lin

ERR

–

–

±1.5

±1.5

Sensitivity Drift Due to

Package Hysteresis

∆ Sens

PKG

T

A

= 25°C, after temperature cycling – ±2

Magnetic Field Range B

A1304ELHLX-T

A1304ELHLX-05-T

Range of Input Field

–

–

1 1 gauss (G) is exactly equal to 0.1 millitesla (mT).

2 See Characteristic Definitions section.

3 Based on design simulations and/or characterization data. Not tested at Allegro end-of-line.

4 Sensitivity drift through the life of the part, ΔSens

LIFE

, can have a typical error value ±3% in addition to package hysteresis effects.

±375

±3000

4.0

0.5

0.12

1.65

±40

±40

< 1

–

–

–

–

–

7.7

50

–

–

20

Max.

4.24

0.8

0.2

1.675

–

–

–

–

–

–

–

–

–

3.6

9

70

100

0.33

–

–

–

–

–

–

–

10

–

0.38

mV(p–p) mG / √Hz

V

V

Ω kΩ nF mV/G

% / °C

V mV mV

%

%

%

%

G

Unit 1

V mA

µs ms

V kHz





4

A1304



CHARACTERISTIC DEFINITIONS

Power On Time When the supply is ramped to its operating voltage, the device output requires a finite time to react to an input magnetic field. Power On Time, t

PO

, is defined as the time it takes for the output voltage to begin responding to an applied magnetic field after the power supply has reached its minimum specified operating voltage, V

CC

(min), as shown in Figure 1.

Quiescent Voltage Output In the quiescent state (no significant magnetic field: B = 0 G), the output, V

OUT(Q)

, is at a constant ratio to the supply voltage, V

CC ranges of V

CC

, across the entire operating

and Operating Ambient Temperature, T

A

.

Quiescent Voltage Output Drift Across Temperature

Range Due to internal component tolerances and thermal considerations, the Quiescent Voltage Output, V drift due to temperature changes within the Operating Ambient

Temperature, T

A

OUT(Q)

, may

OUT(Q)

(mV), is defined as:

. For purposes of specification, the Quiescent

Voltage Output Drift Across Temperature Range, ∆V

Sens =

V

OUT(B+)

– V

OUT(B–)

(B+) – (B–)

(2) where B+ is the magnetic flux density in a positive field (south polarity) and B– is the magnetic flux density in a negative field

(north polarity).

Sensitivity Temperature Coefficient The device sensitivity changes as temperature changes, with respect to its Sensitivity

Temperature Coefficient, TC

SENS

. TC

SENS

is defined as:

TC

Sens

=





Sens

T2

– Sens

Sens

T1

T1

×

100









1

T2–T1





(%/°C

) (3) where T1 is the baseline Sens programming temperature of 25°C, and T2 is the sensitivity at another temperature.

The ideal value of Sens across the full ambient temperature range, Sens

IDEAL(TA)

, is defined as:

∆V

OUT(Q)

= V

OUT(Q)(TA)

–V

OUT(Q)(25°C)

(1)

Sensitivity The amount of the output voltage change is proportional to the magnitude and polarity of the magnetic field applied.

This proportionality is specified as the magnetic sensitivity,

Sens (mV/G), of the device and is defined as:

V

CC

(typ)

90% V

OUT

V

V

CC

(min)

V

CC

V

OUT t

1 t

PO t

2 t

1

= time at which power supply reaches

minimum specified operating voltage t

2

= time at which output voltage settles

within ±10% of its steady state value

under an applied magnetic field

Sens

IDEAL(TA)

= Sens

T1

× [100 (%) + TC

SENS

(T

A

–T1)] (4)

Linearity Sensitivity Error The A1304 is designed to provide linear output in response to a ramping applied magnetic field.

Consider two magnetic fields, B1 and B2. Ideally, the sensitivity of a device is the same for both fields, for a given supply voltage and temperature. Linearity error is present when there is a difference between the sensitivities measured at B1 and B2.

Linearity Sensitivity Error, LIN

ERR positive (Lin

ERR+ fields. LIN

ERR

, is calculated separately for

) and negative (Lin

ERR–

) applied magnetic

(%) is measured and defined as:

Lin

ERR+

=





1–

Sens

(B+)(2)

Sens

(B+)(1)





×

100 (%) (5)

Lin

ERR–

=





1–

Sens

(B–)(2)

Sens



(B–)(1) 

×

100 (%) where:

Sens

Bx

=

|V

OUT(Bx)

–

B x

V

OUT(Q)

|

(6)

0

+t

Figure 1: Def inition of Power On Time, t

PO





5

A1304


Available in a Miniature, Low Profile Surface Mount Package and Bx are positive and negative magnetic fields, with respect to the quiescent voltage output, such that

|B

(+)(2)

| > |B

(+)(1)

| and |B

(–)(2)

| > |B

(–)(1)

|

The effective linearity error is:

Lin

ERR

= max(|Lin

ERR+

|

,

|Lin

ERR–

|) (7)

The saturation of the output at V

SAT(HIGH)

and V

SAT(LOW) the device provides a linear output. The maximum positive and negative applied magnetic fields in the operating range can be calculated:

will limit the operating magnetic range of the applied field in which

 B

MAX(+)

 =

V

SAT(HIGH)

– V

Sens

OUT(Q)

 B

MAX(–)

 =

V

OUT(Q)

– V

Sens

SAT(LOW)

(8)

Ratiometry Error The A1304 provides ratiometric output.

This means that the Quiescent Voltage Output, V

OUT(Q)

, and the magnetic sensitivity, Sens, are proportional to the supply voltage, V

CC

. In other words, when the supply voltage increases or decreases by a certain percentage, each characteristic also increases or decreases by the same percentage. Error is the difference between the measured change in the supply voltage relative to 3.3 V, and the measured change in each characteristic.

The ratiometric error in quiescent voltage output, Rat

VOUT(Q) for a given supply voltage, V

CC

, is defined as:

(%),

Rat

VOUT(Q)

=





1–

V

OUT(Q)(VCC)

/ V

OUT(Q)(3.3V)

V

CC

/ 3.3 (V)





× 100 (%) (9)

The ratiometric error in magnetic sensitivity, Rat

Sens given supply voltage, V

CC

, is defined as:

(%), for a

Rat

Sens

=





1–

Sens

(VCC)

/ Sens

V

CC

(3.3V)

/ 3.3 (V)





× 100 (%) (10)

V

CC

V

CC

Ramp Time The time taken for V

(typ), 3.3 V (see figure 3).

CC

to ramp from 0 V to

V

CC

Off Level For applications in which the VCC pin of the

A1304 is being power-cycled (for example using a multiplexer to toggle the part on and off), the specification of V

CC

V

CCOFF

, determines how high a V

CC

Off Level,

off voltage can be tolerated while still ensuring proper operation and startup of the device

(see Figure 3).

V

SAT(High)

Output Voltage, V

OUT

(V)

V

OUT(Q)

V

SAT(Low)

V

CC

(typ) t

VCC

V

CCOFF

0 time

–B 0

Appied Magnetic Field Intensity, B (G)

+B

Figure 2: Effect of Saturation Figure 3: Def inition of V

CC

Ramp Time, t

VCC





6

A1304



Undervoltage Lockout The A1304 provides an undervoltage lockout feature which ensures that the device outputs a VOUT signal only when V

CC

is above certain thresholds indeterminate output states.

. The undervoltage lockout feature provides a hysteresis of operation to eliminate

The output of the A1304 is held low (GND) until V

CC the V

CC

exceeds

rising UVLO reset threshold. After that , the device

VOUT output is enabled, providing a ratiometric output voltage that is proportional to the input magnetic signal and V

CC

. If

V

CC

should drop back down below the V threshold after the device is powered up, the output would be pulled low (see Figure 4) until V

CC

CC

falling UVLO trip

rising UVLO reset threshold is reached again and VOUT would be reenabled.

V

CC

(V)

3.0

V

CC

(min)

2.8

2.6

V

CC rising UVLO Reset

Reduced perfomance

Undervoltage

Lockout

V

OUT

(V)

V

CC

/ 2

V

OUT is near ground potential when A1304 is in UVLO state

Reduced perfomance

V

CC falling UVLO trip

Undervoltage

Lockout t

2.6

V

CC falling UVLO trip

2.8

V

CC

(V)

V

CC rising UVLO Reset

Figure 4: UVLO Operation





7

A1304

3.3 V



APPLICATION INFORMATION

0.1

µF

VCC

A1304

VOUT

GND

R

L

4.7 nF

Figure 5: Typical Application Circuit

Chopper Stabilization Technique

When using Hall-effect technology, a limiting factor for switchpoint accuracy is the small signal voltage developed across the Hall element. This voltage is disproportionally small relative to the offset that can be produced at the output of the Hall sensor

IC. This makes it difficult to process the signal while maintaining an accurate, reliable output over the specified operating temperature and voltage ranges. Chopper stabilization is a unique approach used to minimize Hall offset on the chip. Allegro employs a patented technique to remove key sources of the output drift induced by thermal and mechanical stresses. This offset reduction technique is based on a signal modulation-demodulation process. The undesired offset signal is separated from the magnetic field-induced signal in the frequency domain, through modulation. The subsequent demodulation acts as a modulation process for the offset, causing the magnetic field-induced signal to recover its original spectrum at base band, while the DC offset becomes a high-frequency signal. The magnetic-sourced signal then can pass through a low-pass filter, while the modulated DC offset is suppressed. In addition to the removal of the thermal and mechanical stress related offset, this novel technique also reduces the amount of thermal noise in the Hall sensor IC while completely removing the modulated residue resulting from the chopper operation. The chopper stabilization technique uses a high frequency sampling clock. For demodulation process, a sample and hold technique is used. This high-frequency operation allows a greater sampling rate, which results in higher accuracy and faster signal-processing capability. This approach desensitizes the chip to the effects of thermal and mechanical stresses, and produces devices that have extremely stable quiescent Hall output voltages and precise recoverability after temperature cycling.

This technique is made possible through the use of a BiCMOS process, which allows the use of low-offset, low-noise amplifiers in combination with high-density logic integration and sampleand-hold circuits.

Regulator

Clock/Logic

Hall Element

Amp

Anti-aliasing

LP Filter

Tuned

Filter

Figure 6: Chopper Stabilization Technique





8

A1304



Package Outline Diagram

3

D

1.49

For Reference Only – Not for Tooling Use

(Reference DWG-2840)

Dimensions in millimeters – NOT TO SCALE

Dimensions exclusive of mold flash, gate burrs, and dambar protrusions

Exact case and lead configuration at supplier discretion within limits shown

4°±4°

A

0.96

D

2.40

0.70

D

0.25 MIN

1.00

1

0.55 REF

2

0.25 BSC

Seating Plane

Gauge Plane

B

0.95

PCB Layout Reference View

Branded Face

8X 10° REF

1.00 ±0.13

NNN

0.95 BSC 0.40 ±0.10

A

B

C

D

Active Area Depth, 0.28 mm

Reference land pattern layout

All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances

Branding scale and appearance at supplier discretion

Hall elements, not to scale

Figure 7: Package LH, 3-Pin (SOT-23W)

C

Standard Branding Reference View

N = Last three digits of device part number





9

A1304



Revision History

Revision

–

1

Revision Date

June 16, 2014

July 13, 2015

Description of Revision

Initial Release

Corrected LH package Active Area Depth value

Copyright ©2013-15, Allegro MicroSystems, LLC

Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current.

Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of

Allegro’s product can reasonably be expected to cause bodily harm.

The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use.

For the latest version of this document, visit our website:

www.allegromicro.com





10

A1304 Datasheet

Linear Hall-Effect Sensor IC with Analog Output,

Available in a Miniature, Low Profile Surface Mount Package

FEATURES AND BENEFITS

Package: 3-Pin Surface Mount SOT23-W

(suffix LH)

DESCRIPTION

SPECIFICATIONS

Pin-out Drawing and Terminal List

CHARACTERISTIC DEFINITIONS

×

(%/°C

×

×

–

,

APPLICATION INFORMATION

Chopper Stabilization Technique

Package Outline Diagram

For Reference Only – Not for Tooling Use

PCB Layout Reference View

Standard Branding Reference View

www.allegromicro.com

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