Texas Instruments TLV320AIC32x4 Power Supply Sequencing (Rev. A) Application Note

Texas Instruments TLV320AIC32x4 Power Supply Sequencing (Rev. A) Application Note

Below you will find brief information for Audio Codec TLV320AIC32x4. The TLV320AIC32x4 is capable of multiple power supply configurations. Power can be applied externally to support multiple voltage levels as well as internal generation of the analog and digital supply. The document discusses proper supply sequencing for these configurations. This document is divided into two parts: external supply configurations and internal supply configurations.

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TLV320AIC32x4 Audio Codec Application Report | Manualzz

Application Report

SLAA492A – April 2011 – Revised April 2011

TLV320AIC32x4 Power Supply Sequencing

Jorge Arbona, Peter Pai, Sunil Rafeeque, Shridhar More, and Nitesh Kekre .............................

Portable Audio

ABSTRACT

The TLV320AIC32x4 is capable of multiple power supply configurations. Power can be applied externally to support multiple voltage levels as well as internal generation of the analog and digital supply. This document discusses proper supply sequencing for these configurations.

1

2

3

4

1

2

3

3

4

1

2

5

Contents

Introduction

External DV

DD

..................................................................................................................

2

and AV

DD

Power Supply Sequence

.....................................................................

2

Internal DLDO and ALDO Power Supply Sequence

...................................................................

5

References

...................................................................................................................

6

List of Figures

TLV320AIC32x4 Power Management Architecture

DV

DD and AV

DD

....................................................................

2

Externally Provided

.......................................................................................

3

DV

DD and AV

DD

DV

DD and AV

DD

Externally Provided, AV

DD

Together With DV

DD

.......................................................

4

Recommended Circuit to Avoid Headphone Pop

.......................................................................

5

Generated by Internal LDO

.............................................................................

6

List of Tables

Power Supply Timing Parameters

........................................................................................

3

Power Supply Timing Parameters

........................................................................................

4

Power Supply Timing Parameters

........................................................................................

6

SLAA492A – April 2011 – Revised April 2011

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© 2011, Texas Instruments Incorporated

TLV320AIC32x4 Power Supply Sequencing 1

Introduction

1 Introduction

www.ti.com

This document is divided into two parts: external supply configurations and internal supply configurations.

The application report SLAA404 and the relevant product data sheet provide detailed information on power supply configurations. The TLV320AIC32x4 power management architecture is shown in

Figure 1

as a reference.

LDOin / HPV

DD

LDO_SELECT

DV

AV

DD

DD

IOV

DD

To I /O

Blocks

Digital

EN

LDO p1_r2_b7-6

Analog

LDO

EN p1_r2_b5-4 p1_r2_b0 p1_r1_b3

To Digital

Blocks

Analog Blocks p1_r2_b3 p1_r123_b2-0

Digital, I/O, etc.

p1_r10_b1-0 p1_r10_b3

To Analog

Blocks

HP / Line Output

Amps p1_r51_b3

MICBIAS

Generation p1_r51_b6 p1_r51_b5-4

AV

SS

MICBIAS

Figure 1. TLV320AIC32x4 Power Management Architecture

2 External DV

DD

and AV

DD

Power Supply Sequence

The recommended power sequence for this configuration is to provide all supplies simultaneously. A typical configuration in such a case is to use a single 1.8-V supply for IOV

DD

, DV

DD

, LDOin, and AV

DD

.

Another alternative is to separate analog and digital supplies. This is useful to improve the efficiency of the digital rails by using a dc/dc converter, while keeping the AV regulator (LDO). This LDO can be external or internal.

DD supply clean by using a low-dropout

The LDOin supply can be sourced by an external supply of 1.9 V to 3.6 V to allow a higher signal swing at the headphone and line-out amplifiers, as well as to provide a wider range of MICBIAS supply options and output common-mode voltage. In the case where a 1.8-V rail is sufficient for output swing, LDOin must be tied to AV

DD

.

2 TLV320AIC32x4 Power Supply Sequencing

© 2011, Texas Instruments Incorporated

SLAA492A – April 2011 – Revised April 2011

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www.ti.com

External DV

DD and AV

DD

Power Supply Sequence

Figure 2

shows a timing diagram for the case where all supplies are provided separately. In such a case, the depicted sequence must be used. The dashed lines marked in blue color represent an internally supplied voltage.

IOVDD t

I-D

DVDD t

D-L

LDOin t

L-A

AVDD t

D-R

RESET

Figure 2. DV

DD and AV

DD

Externally Provided

IOV

DD

AV

DD must be provided first. Because, by default, DV ramps up to the DV

DD voltage once DV

DD

DD is weakly connected to AV

DD is provided at approximately 5 × 10 k Ω by a 10-k

× C

AVDD

Ω resistor,

, where

C

AVDD is the A

VDD

Parameter t

D-L decoupling capacitor. For C allows AV

DD

AVDD

= 1 µF, the charging time is approximately 50 ms.

to be stable before HPVDD is provided, which prevents power-on pop on the headphone amplifiers. Immediately after DV

DD is provided, the LDOin supply ramps to ~1.5 V. To prevent high currents from DVDD to LDOin, the LDOin supply cannot be externally driven low by the external power source. This means that the external power source must be either high impedance or have a weak pulldown before being enabled. After RESET is released (or a software reset is performed), no register writes must be performed within 1 ms.

PARAMETER t

I-D t

D-L

MIN

0

5×10k×C

AVDD t

L-A t

D-R

0

10 ns

Table 1. Power Supply Timing Parameters

MAX TYP

0

5×10k×C

AVDD

0

10 ns

COMMENTS

Time between IOVDD is provided and DV

DD is provided.

Time between DV

DD is provided and LDOin is provided. AV

DD must be internally present before LDOin to prevent pop at headphone outputs.

Time between LDOin is provided and AV

DD is externally provided.

Time between DV

DD

(and IOVDD) is provided and reset can be released.

SLAA492A – April 2011 – Revised April 2011

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TLV320AIC32x4 Power Supply Sequencing 3

External DV

DD and AV

DD

Power Supply Sequence www.ti.com

AV

DD can also be externally supplied at the same time as DV

DD

. This is shown in

Figure 3 . The dashed

line marked in blue color represents an internally supplied voltage.

IOVDD t

I-D

DVDD t

D-L

LDOin

AVDD t

D-R

RESET

Figure 3. DV

DD and AV

DD

Externally Provided, AV

DD

Together With DV

DD

To prevent high currents from DV

DD to LDOin, the LDOin supply cannot be externally driven low by the external power source. This means that the external power source must be either high impedance or have a weak pulldown before being enabled.

After RESET is released (or a software reset is performed), no register writes must be performed within 1 ms.

PARAMETER t

I-D t

D-L t

D-R

MIN

0

0

10 ns

Table 2. Power Supply Timing Parameters

MAX TYP

0

0

10 ns

COMMENTS

Time between IOVDD is provided and DV

DD

(and AV

DD

) is provided.

Time between DV

DD

(and AV

DD

) is provided and LDOin is provided.

Time between DV

DD

(and IOVDD) is provided and reset can be released.

4 TLV320AIC32x4 Power Supply Sequencing

© 2011, Texas Instruments Incorporated

SLAA492A – April 2011 – Revised April 2011

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3 Internal DLDO and ALDO Power Supply Sequence

Internal DLDO and ALDO Power Supply Sequence

Generating DV

DD and AV

DD internally is a common configuration for systems where a single 3.3-V supply is used. The DLDO is enabled by tying the LDO_SELECT pin to the IOVDD supply. As soon as IOVDD and LDOin are provided, DV

DD ramps to a nominal 1.72 V. At the same time, the AV

DD pin ramps up slower (5 × 10 k Ω × C

AVDD

) which might result in a pop in the headphone output amplifiers if C

AVDD is initially discharged. This pop can be avoided by adding a Schottky diode between DV shown in

Figure 4

DD and AV

DD

. Note that, in this configuration, ALDO mode must be chosen such that AV

DD pins as voltage is higher than or equal to DV

DD voltage. For example, ALDO can be configured as 1.77 V and DLDO as 1.77

V, or ALDO as 1.77 V and DLDO as 1.72 V.

DLDO p1_r1_b3

ALDO

DVDD

C DVDD

AVDD

C AVDD

Figure 4. Recommended Circuit to Avoid Headphone Pop

If the internal headphone amplifiers are connected to an external amplifier with mute or shutdown capabilities, it is unnecessary to add a diode. The purpose of this diode is to force the AV close to the DV

DD voltage at the same time and rate as LDOin is provided.

DD pin to ramp

SLAA492A – April 2011 – Revised April 2011

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TLV320AIC32x4 Power Supply Sequencing 5

References www.ti.com

Figure 5

shows the timing diagram for the case where DV

DD and an external Schottky diode is placed between DV

DD and AV and AV

DD

DD are supplied by the internal LDOs

. The dashed line marked in blue color illustrates the voltage supplied through the external diode. The lines marked in red color illustrate a voltage generated by the internal LDOs.

IOVDD

DVDD

4

t

I-L

LDOin t

R-A

AVDD t

D-R

RESET

Figure 5. DV

DD and AV

DD

Generated by Internal LDO

As previously mentioned, if the internal headphone amplifiers are connected to an external amplifier with mute or shutdown capabilities, an external diode is not required. For such a case, AV approximately 5 × 10 k Ω × C

AVDD

.

DD ramps to DV

DD in

PARAMETER t

I-D t

D-R t

R-A

MIN

0

10 ns

1 ms

Table 3. Power Supply Timing Parameters

MAX TYP

0

10 ns

1 ms

COMMENTS

Time between IOVDD is provided and LDOin is provided.

Time between DVDD (and IOVDD) is provided and reset can be released.

Time between RESET is released and ALDO is powered. No registers must be written for 1 ms after a reset is performed (hardware or software).

References

1. Design and Configuration Guide for the TLV320AI3204 and TLV320AIC3254 Audio Codecs application report ( SLAA404 )

2. TLV320AIC3254, Ultra Low Power Stereo Audio Codec With Embedded miniDSP data sheet

( SLAS549 )

3. TLV320AIC3204, Ultra Low Power. Stereo Audio Codec data sheet ( SLOS602 )

6 TLV320AIC32x4 Power Supply Sequencing

© 2011, Texas Instruments Incorporated

SLAA492A – April 2011 – Revised April 2011

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Key Features

  • Multiple power supply configurations
  • External power supply
  • Internal power supply generation
  • Analog and digital supply
  • Supply sequencing for various configurations
  • External supply configurations
  • Internal supply configurations

Frequently Answers and Questions

How many power supply configurations does the TLV320AIC32x4 support?
The TLV320AIC32x4 supports multiple power supply configurations, including both external and internal power generation for analog and digital supplies.
What is the primary purpose of this application report?
This application report is a guide for proper power supply sequencing in various configurations of the TLV320AIC32x4 audio codec.
What are the two main sections of this document?
The document is divided into two sections: one covering external power supply configurations and another covering internal power supply configurations.

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