INA250 36-V, Low- or High-Side, Bidirectional, Zero-Drift

INA250 36-V, Low- or High-Side, Bidirectional, Zero-Drift
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INA250A1, INA250A2, INA250A3, INA250A4
SBOS511A – APRIL 2015 – REVISED MAY 2015
INA250 36-V, Low- or High-Side, Bidirectional, Zero-Drift
Current-Shunt Monitor with Precision Integrated Shunt Resistor
1 Features
3 Description
•
The INA250 is a voltage-output, current-sensing
amplifier family that integrates an internal shunt
resistor
to
enable
high-accuracy
current
measurements at common-mode voltages that can
vary from 0 V to 36 V, independent of the supply
voltage. The device is a bidirectional, low- or highside current-shunt monitor that allows an external
reference to be used to measure current flowing in
both directions through the internal current-sensing
resistor sensor. The integration of the precision
current-sensing
resistor
provides
calibration
equivalent measurement accuracy with ultra-low
temperature drift performance and ensures an
optimized Kelvin layout for the sensing resistor is
always obtained.
1
•
•
•
•
Precision Integrated Shunt Resistor:
– Shunt Resistor: 2 mΩ
– Shunt Resistor Tolerance: 0.1% (Max)
– 15 A Continuous from –40°C to 85°C
– 0°C to 125°C Temperature Coefficient:
10 ppm/°C
High Accuracy:
– Gain Error (Shunt and Amplifier): 0.3% (Max)
– Offset Current: 50 mA (Max, INA250A2)
Four Available Gains:
– INA250A1: 200 mV/A
– INA250A2: 500 mV/A
– INA250A3: 800 mV/A
– INA250A4: 2 V/A
Wide Common-Mode Range: –0.1 V to 36 V
Specified Operating Temperature: –40°C to 125°C
The INA250 family is available in four output voltage
scales: 200 mV/A, 500 mV/A, 800 mV/A, and 2 V/A.
This device is fully tested and specified for
continuous currents up to 10 amps at the maximum
temperature of 125°C. The INA250 operates from a
single 2.7-V to 36-V supply and draws a maximum of
300 µA of supply current. All INA250 gain versions
are specified over the extended operating
temperature range (–40°C to 125°C), and are
available in a TSSOP-16 package.
2 Applications
•
•
•
•
•
•
•
Test Equipment
Power Supplies
Servers
Telecom Equipment
Automotive
Solar Inverters
Power Management
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
INA250A1(2)
INA250A2
INA250A3
TSSOP (16)
5.00 mm × 4.40 mm
INA250A4
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
(2) Shaded cells indicate a product-preview device.
Simplified Schematic
Device Supply
(2.7 V to 36 V)
Power Rail
(0 V to 36 V)
IN+
SH+
CBYPASS
0.1 PF
VIN+
VS
REF
Microcontroller
OUT
+
ADC
ADC
IN
SH
VIN
GND
Load
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION
DATA.
INA250A1, INA250A2, INA250A3, INA250A4
SBOS511A – APRIL 2015 – REVISED MAY 2015
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
7
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description ............................................ 11
7.1 Overview ................................................................. 11
7.2 Functional Block Diagram ....................................... 11
7.3 Feature Description................................................. 11
7.4 Device Functional Modes........................................ 14
8
Applications and Implementation ...................... 18
8.1 Application Information............................................ 18
8.2 Typical Applications ................................................ 18
9 Power Supply Recommendations...................... 22
10 Layout................................................................... 23
10.1 Layout Guidelines ................................................. 23
10.2 Layout Examples................................................... 23
11 Device and Documentation Support ................. 25
11.1
11.2
11.3
11.4
11.5
Documentation Support .......................................
Related Links ........................................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
25
25
25
25
25
12 Mechanical, Packaging, and Orderable
Information ........................................................... 25
4 Revision History
Changes from Original (April 2015) to Revision A
•
2
Page
INA250A2 released to production........................................................................................................................................... 1
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5 Pin Configuration and Functions
PW Package
TSSOP-16
Top View
IN-
1
16
IN+
IN-
2
15
IN+
IN-
3
14
IN+
SH-
4
13
SH+
VIN-
5
12
VIN+
GND
6
11
GND
REF
7
10
VS
GND
8
9
OUT
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
GND
6, 8, 11
Analog
IN–
1, 2, 3
Analog input
Ground
Connect to load
IN+
14, 15, 16
Analog input
Connect to supply
OUT
9
REF
7
Analog input
SH-
4
Analog output
Kelvin connection to internal shunt. Connect to VIN– if no filtering is needed.
See Figure 27 for filter recommendations.
SH+
13
Analog output
Kelvin connection to internal shunt. Connect to VIN+ if no filtering is needed.
See Figure 27 for filter recommendations.
VIN–
5
Analog input
Voltage input from load side of shunt resistor.
VIN+
12
Analog input
Voltage input from supply side of shunt resistor.
VS
10
Analog
Analog output Output voltage
Reference voltage, 0 V to VS (up to 18 V)
Device power supply, 2.7 V to 36 V.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
Supply voltage (VS)
MAX
UNIT
40
V
Analog input current
Continuous current
±15
A
Analog inputs (IN+, IN–)
Common-mode
GND – 0.3
40
V
Common-mode
GND – 0.3
40
V
Analog inputs (VIN+, VIN–)
Differential (VIN+) – (VIN–)
Analog inputs (REF)
Analog outputs (SH+, SH–)
Common-mode
Analog outputs (OUT)
–40
40
V
GND – 0.3
VS + 0.3
V
GND – 0.3
40
V
GND – 0.3
(VS + 0.3) up to 18
V
–55
150
°C
150
°C
150
°C
Operating, TA
Temperature
Junction, TJ
Storage, Tstg
(1)
–65
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
MIN
NOM
MAX
0
36
UNIT
VCM
Common-mode input voltage
V
VS
Operating supply voltage
2.7
36
V
TA
Operating free-air temperature
–40
125
°C
6.4 Thermal Information
INA250
THERMAL METRIC (1)
PW (TSSOP)
UNIT
16 PINS
RθJA
Junction-to-ambient thermal resistance
104.4
RθJC(top)
Junction-to-case (top) thermal resistance
42.3
RθJB
Junction-to-board thermal resistance
48.5
ψJT
Junction-to-top characterization parameter
4.5
ψJB
Junction-to-board characterization parameter
48
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
(1)
4
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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6.5 Electrical Characteristics
At TA = 25°C, VS = 5 V, VIN+ = 12 V, VREF = 2.5 V, ISENSE = IN+ = 0 A, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
INPUT
VCM
Common-mode input range
CMR
Common-mode rejection
VIN+ = 0 V to 36 V, TA = –40°C to 125°C
IOS
Offset current, RTI (1)
INA250A2, ISENSE = 0 A
dIOS/dT
RTI versus temperature
TA = –40°C to 125°C
PSR
IB
97
VS = 2.7 V to 36 V, TA = –40°C to 125°C
Input bias current
VREF
–0.1
IB+, IB-, ISENSE = 0 A
Reference input range
(2)
36
V
110
dB
±12.5
±50
mA
25
250
μA/°C
±0.03
±1
mA/V
±28
±35
μA
(VS) up to 18
V
0
SHUNT RESISTOR (3)
RSHUNT
Equivalent resistance when used with
onboard amplifier
Shunt resistance
(SH+ to SH–)
Used as stand-alone resistor (4)
Package resistance
Resistor temperature
coefficient
ISENSE
1.998
1.9
2
2.002
mΩ
2
2.1
mΩ
IN+ to IN–
4.5
mΩ
TA = –40°C to 125°C
15
ppm/°C
TA = –40°C to 0°C
50
ppm/°C
TA = 0°C to 125°C
10
ppm/°C
Maximum continuous
current (5)
TA = –40°C to 85°C
Shunt short time overload
ISENSE = 30 A for 5 seconds
0.05%
Shunt thermal shock
–65°C to 150°C, 500 cycles
0.1%
Shunt resistance to solder
heat
260°C solder, 10 s
0.1%
Shunt high temperature
exposure
1000 hours, TA = 150°C
Shunt cold temperature
storage
24 hours, TA = –65°C
±15
A
0.15%
0.025%
OUTPUT
G
Gain
INA250A1
200
mV/A
INA250A2
500
mV/A
INA250A3
800
mV/A
INA250A4
2
ISENSE = –10 A to 10 A, TA = 25°C
System gain error
(6)
±0.05%
ISENSE = –10 A to 10 A,
TA = –40°C to 125°C
Nonlinearity error
(1)
(2)
(3)
(4)
(5)
(6)
45
ISENSE = 0.5 A to 10 A
ppm/°C
±0.03%
Output impedance
Maximum capacitive load
±0.3%
±0.75%
TA = –40°C to 125°C
RO
V/A
No sustained oscillation
1.5
Ω
1
nF
RTI = referred-to-input.
The supply voltage range maximum is 36 V, but the reference voltage cannot be higher than 18 V.
See the Integrated Shunt Resistor section for additional information regarding the integrated current-sensing resistor.
The internal shunt resistor is intended to be used with the internal amplifier and is not intended to be used as a stand-alone resistor. See
Integrated Shunt Resistor for more information.
See Figure 24 and the Layout section for additional information on the current derating and layout recommendations to improve the
current handling capability of the device at higher temperatures.
System gain error includes amplifier gain error and the integrated sense resistor tolerance. System gain error does not include the stress
related characteristics of the integrated sense resistor. These characteristics are described in the Shunt Resistor section of the Electrical
Characteristics table.
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Electrical Characteristics (continued)
At TA = 25°C, VS = 5 V, VIN+ = 12 V, VREF = 2.5 V, ISENSE = IN+ = 0 A, unless otherwise noted.
PARAMETER
VOLTAGE OUTPUT
CONDITIONS
MIN
TYP
MAX
UNIT
(7)
Swing to VS power-supply
rail
RL = 10 kΩ to GND
(VS) – 0.1
(VS) – 0.2
Swing to GND
RL = 10 kΩ to GND
(VGND) + 25
(VGND) + 50
V
mV
FREQUENCY RESPONSE
BW
Bandwidth
INA250A2, CL = 10 pF
50
kHz
SR
Slew rate
CL = 10 pF
0.2
V/μs
35
nV/√Hz
NOISE, RTI (1)
Voltage noise density
POWER SUPPLY
VS
Operating voltage range
IQ
Quiescent current
2.7
TA = –40°C to 125°C
200
36
V
300
μA
125
°C
TEMPERATURE RANGE
Specified range
(7)
6
–40
See Typical Characteristic curve, Output Voltage Swing vs Output Current (Figure 13).
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6.6 Typical Characteristics
At TA = 25°C, VS = 5 V, VIN+ = 12 V, VREF = 2.5 V, INA250A2, ISENSE = IN+ = 0 A, unless otherwise noted.
50
Population
Input Offset Current (mA)
40
30
20
10
0
±10
±20
±30
45
40
35
30
25
20
15
5
10
0
-5
-10
-15
-20
-25
±40
±50
±50
Offset Current (mA)
±25
0
25
50
75
100
125
Temperature (ƒC)
C001
150
C002
Figure 2. Input Offset vs Temperature
Figure 1. Input Offset Distribution
4
Population
CMRR (mA/V)
3
2
5
4.5
4
3.5
3
2
2.5
1.5
1
0.5
0
-0.5
-1
-1.5
-2
1
0
±50
Common-Mode Rejection Ratio (mA/V)
±25
0
25
50
75
100
125
Temperature (ƒC)
C003
150
C004
Figure 4. Common-Mode Rejection Ratio vs Temperature
Figure 3. Common-Mode Rejection Ratio Distribution
0
Population
PSRR (µA/V)
-20
-40
-60
150
125
100
75
50
25
0
-25
-50
-75
-100
-125
-150
-80
-100
±50
Power Supply Rejection Ratio (µA/V)
±25
0
25
50
75
100
125
Temperature (ƒC)
C005
150
C006
Figure 6. Power-Supply Rejection Ratio vs Temperature
Figure 5. Power-Supply Rejection Ratio Distribution
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Typical Characteristics (continued)
At TA = 25°C, VS = 5 V, VIN+ = 12 V, VREF = 2.5 V, INA250A2, ISENSE = IN+ = 0 A, unless otherwise noted.
0.5
0.4
0.2
Population
Gain Error (%)
0.3
0.1
0
-0.1
-0.2
-0.3
75
100
125
150
0.2
0.1
0
0.25
50
0.15
25
Temperature (ƒC)
0.05
0
-0.05
±25
-0.1
±50
-0.15
-0.5
-0.2
-0.25
-0.4
System Gain Error (%)
C033
C007
System gain error = RSHUNT error + amplifier gain error,
load current = 10 A
Figure 8. System Gain Error Distribution
Figure 7. System Gain Error vs Temperature
0.5
50
0.4
45
40
0.2
0.1
Gain (dB)
Gain Error (%)
0.3
0
-0.1
-0.2
35
30
25
-0.3
20
-0.4
-0.5
15
±50
±25
0
25
50
75
100
125
Temperature (ƒC)
150
1
10
100
1k
10k
Frequency (Hz)
100k
C008
1M
C009
VCM = 12 V, ISENSE = 500 mAPP
Figure 9. Amplifier Gain Error vs Temperature
Figure 10. Amplifier Gain vs Frequency
120
160
140
100
100
CMR (dB)
PSR (dB)
120
80
60
40
80
60
40
20
0
1
20
10
100
1k
10k
Frequency (Hz)
100k
1M
C010
1
10
100
1k
Frequency (Hz)
10k
100k
C011
VS = 5 V, VREF = 2.5 V, ISENSE = 0 A, VCM = 1-V sine wave
VCM = 12 V, VREF = 2.5 V, ISENSE = 0 A,
VS = 5 V + 250-mV sine disturbance
Figure 11. Power-Supply Rejection vs Frequency
8
0.1
Figure 12. Common-Mode Rejection vs Frequency
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Typical Characteristics (continued)
At TA = 25°C, VS = 5 V, VIN+ = 12 V, VREF = 2.5 V, INA250A2, ISENSE = IN+ = 0 A, unless otherwise noted.
60
VS
-40°C
50
25°C
Input Bias Current (µA)
Output Voltage Swing (V)
VS - 1
125°C
VS - 2
VS - 3
GND + 3
GND + 2
IB+, IB-, VREF = 0 V
40
30
20
IB+, IB-, VREF = 2.5 V
10
0
GND + 1
GND
0
2
4
6
8
10
12
14
±10
0
16
5
10
15
20
25
30
35
40
Common-Mode Voltage (V)
Current (mA)
C013
ISENSE = 0 A, VS = 5 V
Figure 13. Output Voltage Swing vs Output Current
Figure 14. Input Bias Current vs Common-Mode Voltage
(VS = 5 V)
40
40
35
Input Bias Current (µA)
Input Bias Current (µA)
35
30
IB+
25
20
IB15
10
IB+, IB30
25
20
15
5
0
0
10
5
10
15
20
25
30
35
Common-Mode Voltage (V)
±50
40
±25
0
25
50
75
100
125
150
Temperature (ƒC)
C014
ISENSE = 0 A, VS = 0 V, VREF = 0 V
C015
ISENSE = 0 A, VS = 5 V
Figure 15. Input Bias Current vs Common-Mode Voltage
(VS = 0 V)
Figure 16. Input Bias Current vs Temperature
400
250
350
VS = 5 V
300
VS = 2.7 V
Quiescent Current (µA)
Quiescent Current (µA)
VS = 36 V
250
200
150
225
200
175
100
50
±50
±25
0
25
50
75
100
125
Temperature (ƒC)
150
C016
VREF = VS / 2
150
0
5
10
15
20
25
30
35
Supply Voltage (V)
40
C017
VREF = 2.5 V
Figure 17. Quiescent Current vs Temperature
Figure 18. Quiescent Current vs Supply Voltage
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Typical Characteristics (continued)
At TA = 25°C, VS = 5 V, VIN+ = 12 V, VREF = 2.5 V, INA250A2, ISENSE = IN+ = 0 A, unless otherwise noted.
Input-Referred
Voltage Noise (nV/¥Hz)
Referred-to-Input
Voltage Noise (200 nV/div)
100
10
1
10
100
10k
1k
Frequency (Hz)
100k
Time (1 s/div)
C018
C019
VS = 5 V, VREF = 2.5 V, ISENSE = 0 A
VS = 5 V, VCM = 0 V, ISENSE = 0 A
Figure 20. 0.1-Hz to 10-Hz Voltage Noise (Referred-to-Input)
Output
(0.5 V/div)
Output
(0.5 V/div)
Figure 19. Input-Referred Voltage Noise vs Frequency
2.5 V
Input
(5 V/div)
Input
(5 mV/div)
0V
0V
0V
Time (25 µs/div)
Time (40 µs/div)
C020
C021
Input = (VIN+) - (VIN-)
Input = VIN+, VREF = 2.5 V
Figure 22. Common-Mode Transient Response
Output
(1 V/div)
Figure 21. Step Response
Supply
(2 V/div)
0V
0V
Time (20 µs/div)
C024
Figure 23. Start-Up Response
10
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7 Detailed Description
7.1 Overview
The INA250 features a 2-mΩ, precision, current-sensing resistor and a 36-V common-mode, zero-drift topology,
precision, current-sensing amplifier integrated into a single package. High precision measurements are enabled
through the matching of the shunt resistor value and the current-sensing amplifier gain providing a highlyaccurate, system-calibrated solution. Multiple gain versions are available to allow for the optimization of the
desired full-scale output voltage based on the target current range expected in the application.
7.2 Functional Block Diagram
IN+
SH+
VS
VIN+
REF
+
OUT
-
IN-
SH-
VIN-
GND
7.3 Feature Description
7.3.1 Integrated Shunt Resistor
The INA250 features a precise, low-drift, current-sensing resistor to allow for precision measurements over the
entire specified temperature range of –40°C to 125°C. The integrated current-sensing resistor ensures
measurement stability over temperature as well as improving layout and board constraint difficulties common in
high precision measurements.
The onboard current-sensing resistor is designed as a 4-wire (or Kelvin) connected resistor that enables accurate
measurements through a force-sense connection. Connecting the amplifier inputs pins (VIN– and VIN+) to the
sense pins of the shunt resistor (SH– and SH+) eliminates many of the parasitic impedances commonly found in
typical very-low sensing-resistor level measurements. Although the sense connection of the current-sensing
resistor can be accessed via the SH+ and SH– pins, this resistor is not intended to be used as a stand-alone
component. The INA250 is system-calibrated to ensure that the current-sensing resistor and current-sensing
amplifier are both precisely matched to one another. Use of the shunt resistor without the onboard amplifier
results in a current-sensing resistor tolerance of approximately 5%. To achieve the optimized system gain
specification, the onboard sensing resistor must be used with the internal current-sensing amplifier.
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Feature Description (continued)
The INA250 has approximately 4.5 mΩ of package resistance. 2 mΩ of this total package resistance is a
precisely-controlled resistance from the Kelvin-connected current-sensing resistor used by the amplifier. The
power dissipation requirements of the system and package are based on the total 4.5-mΩ package resistance
between the IN+ and IN– pins. The heat dissipated across the package when current flows through the device
ultimately determines the maximum current that can be safely handled by the package. The current consumption
of the silicon is relatively low, leaving the total package resistance carrying the high load current as the primary
contributor to the total power dissipation of the package. The maximum safe-operating current level is set to
ensure that the heat dissipated across the package is limited so that no damage to the resistor or the package
itself occurs or that the internal junction temperature of the silicon does not exceed a 150°C limit.
External factors (such as ambient temperature, external air flow, and PCB layout) can contribute to how
effectively the heat developed as a result of the current flowing through the total package resistance can be
removed from within the device. Under the conditions of no air flow, a maximum ambient temperature of 85°C,
and 1-oz. copper input power planes, the INA250 can accommodate continuous current levels up to 15 A. As
shown in Figure 24, the current handling capability is derated at temperatures above the 85°C level with safe
operation up to 10 A at a 125°C ambient temperature. With air flow and larger 2-oz. copper input power planes,
the INA250 can safely accommodate continuous current levels up to 15 A over the entire –40°C to 125°C
temperature range.
20
Maximum Continuous
Current (A)
17.5
15
12.5
10
7.5
5
±50
±25
0
25
50
75
100
125
Temperature (ƒC)
150
C026
Figure 24. Maximum Current vs Temperature
7.3.2 Short-Circuit Duration
The INA250 features a physical shunt resistance that is able to withstand current levels higher than the
continuous handling limit of 15 A without sustaining damage to the current-sensing resistor or the current-sensing
amplifier if the excursions are very brief. Figure 25 shows the short-circuit duration curve for the INA250.
100
Current (A)
80
60
40
20
0
0.1
1
10
Time (s)
100
C027
Figure 25. Short-Circuit Duration
12
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Feature Description (continued)
7.3.3 Temperature Stability
System calibration is common for many industrial applications to eliminate initial component and system-level
errors that can be present. A system-level calibration can reduce the initial accuracy requirement for many of the
individual components because the errors associated with these components are effectively eliminated through
the calibration procedure. Performing this calibration can enable precision measurements at the temperature in
which the system is calibrated, but as the system temperature changes as a result of external ambient changes
or due to self heating, measurement errors are reintroduced. Without accurate temperature compensation used
in addition to the initial adjustment, the calibration procedure is not effective in accounting for these temperatureinduced changes. One of the primary benefits of the very low temperature coefficient of the INA250 (including
both the integrated current-sensing resistor and current-sensing amplifier) is ensuring that the device
measurement remains highly accurate, even when the temperature changes throughout the specified
temperature range of the device.
For the integrated current-sensing resistor, the drift performance is shown in Figure 26. Although several
temperature ranges are specified in the Electrical Characteristics table, applications operating in ranges other
than those described can use Figure 26 to determine how much variance in the shunt resistor value can be
expected. As with any resistive element, the tolerance of the component varies when exposed to different
temperature conditions. For the current-sensing resistor integrated in the INA250, the resistor does vary slightly
more when operated in temperatures ranging from –40°C to 0°C than when operated from 0°C to 125°C.
However, even in the –40°C to 0°C temperature range, the drift is still quite low at 25 ppm/°C.
Shunt Resistance (m)
2.005
2
1.995
1.99
±50
±25
0
25
50
75
Temperature (ƒC)
100
125
150
C030
Figure 26. Sensing Resistor vs Temperature
An additional aspect to consider is that when current flows through the current-sensing resistor, power is
dissipated across this component. This dissipated power results in an increase in the internal temperature of the
package, including the integrated sensing resistor. This resistor self-heating effect results in an increase of the
resistor temperature helping to move the component out of the colder, wider drift temperature region.
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7.4 Device Functional Modes
7.4.1 Input Filtering
An obvious and straightforward location for filtering is at the device output; however, this location negates the
advantage of the low output impedance of the output stage buffer. The input then represents the best location for
implementing external filtering. Figure 27 shows the typical implementation of the input filter for the device.
CF
RS
VIN-
SH-
¦-3dB =
1
RINT
2ŒRSCF
¦-3dB
Bias
OUT
+
RINT
SH+
REF
VIN+
RS
CF
Figure 27. Input Filter
The addition of external series resistance at the input pins to the amplifier, however, creates an additional error in
the measurement. Keep the value of these series resistors to 10 Ω or less, if possible, to reduce the affect to
accuracy. The internal bias network shown in Figure 27 present at the input pins creates a mismatch in input bias
currents when a differential voltage is applied between the input pins, as shown in Figure 28.
80
Input Bias Current (µA)
70
IB+
60
50
40
30
20
IB-
10
0
±10
±20
0
20
40
60
Differential Input Voltage (mV)
80
100
C029
Figure 28. Input Bias Current vs Differential Input Voltage
14
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Device Functional Modes (continued)
7.4.1.1 Calculating Gain Error Resulting from External Filter Resistance
If additional external series filter resistors are added to the circuit, the mismatch in bias currents results in a
mismatch of voltage drops across the filter resistors. This mismatch creates a differential error voltage that
subtracts from the voltage developed across the Kelvin connection of the shunt resistor, thus reducing the
voltage that reaches the amplifier input terminals. Without the additional series resistance, the mismatch in input
bias currents has little effect on device operation as a result of the low input bias current of the amplifier and the
typically low impedance of the traces between the shunt and amplifier input pins. The amount of error these
external filter resistors add to the measurement can be calculated using Equation 2, where the gain error factor is
calculated using Equation 1.
The amount of variance between the differential voltage present at the device input relative to the voltage
developed at the shunt resistor is based both on the external series resistance value as well as the internal input
resistors, RINT; see Figure 27. The reduction of the shunt voltage reaching the device input pins appears as a
gain error when comparing the output voltage relative to the voltage across the shunt resistor. A factor can be
calculated to determine the amount of gain error that is introduced by the addition of external series resistance.
Equation 1 calculates the expected deviation from the shunt voltage compared to the expected voltage at the
device input pins.
(1250 ´ RINT)
Gain Error Factor =
(1250 ´ RS) + (1250 ´ RINT) + (RS ´ RINT)
where:
•
•
RINT is the internal input resistor and
RS is the external series resistance
(1)
Gain Error (%) = 100 - (100 ´ Gain Error Factor)
(2)
With the adjustment factor equation including the device internal input resistance, this factor varies with each
gain version, as shown in Table 1. Each individual device gain error factor is shown in Table 2.
The gain error that can be expected from the addition of the external series resistors can then be calculated
based on Equation 2.
Table 1. Input Resistance
DEVICE
GAIN
RINT
INA250A1
200 mV/A
50 kΩ
INA250A2
500 mV/A
20 kΩ
INA250A3
800 mV/A
12.5 kΩ
INA250A4
2 V/A
5 kΩ
Table 2. Device Gain Error Factor
DEVICE
SIMPLIFIED GAIN ERROR FACTOR
50,000
INA250A1
(41 · RS) + 50,000
20,000
INA250A2
(17 · RS) + 20,000
12,500
INA250A3
(11 · RS) + 12,500
1,000
INA250A4
RS + 1,000
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For example, using an INA250A2 and the corresponding gain error equation from Table 2, a series resistance of
10 Ω results in a gain error factor of 0.991. The corresponding gain error is then calculated using Equation 2,
resulting in a gain error of approximately 0.84% because of the external 10-Ω series resistors.
7.4.2 Shutting Down the Device
Although the device does not have a shutdown pin, the low power consumption allows for the device to be
powered from the output of a logic gate or transistor switch that can turn on and turn off the voltage connected to
the device power-supply pin. However, in current-shunt monitoring applications, there is also a concern for how
much current is drained from the shunt circuit in shutdown conditions. Evaluating this current drain involves
considering the device simplified schematic in shutdown mode, as shown in Figure 29.
Shutdown
Control
CBYPASS
0.1 µF
Supply
Voltage
Supply
IN+
VS
REF
+
OUT
-
IN-
GND
Load
Figure 29. Shutting Down the Device
Note that there is typically an approximate 1-MΩ impedance (from the combination of the feedback and input
resistors) from each device input to the REF pin. The amount of current flowing through these pins depends on
the respective configuration. For example, if the REF pin is grounded, calculating the effect of the 1-MΩ
impedance from the shunt to ground is straightforward. However, if the reference or op amp is powered when the
device is shut down, the calculation is direct. Instead of assuming 1 MΩ to ground, assume 1 MΩ to the
reference voltage. If the reference or op amp is also shut down, some knowledge of the reference or op amp
output impedance under shutdown conditions is required. For instance, if the reference source functions similar
to an open circuit when un-powered, little or no current flows through the 1-MΩ path.
16
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7.4.3 Using the Device with Common-Mode Transients Above 36 V
With a small amount of additional circuitry, the device can be used in circuits subject to transients higher than
36 V (such as in automotive applications). Use only zener diodes or zener-type transient absorbers (sometimes
referred to as transzorbs); any other type of transient absorber has an unacceptable time delay. Start by adding
a pair of resistors, as shown in Figure 30, as a working impedance for the zener. Keeping these resistors as
small as possible is preferable, most often approximately 10 Ω. This value limits the affect on accuracy with the
addition of these external components, as described in the Input Filtering section. Device interconnections
between the shunt resistor and amplifier have a current handling limit of 1 A. Using a 10-Ω resistor limits the
allowable transient range to 10 V above the zener clamp in order to not damage the device. Larger resistor
values can be used in this protection circuit to accommodate a larger transient voltage range, resulting in a larger
affect on gain error. Because this circuit limits only short-term transients, many applications are satisfied with a
10-Ω resistor along with conventional zener diodes of the lowest power rating available.
2.7-V to 36-V
Supply
CBYPASS
0.1 µF
VS
Supply
IN-
SH+
SH-
VIN+
VIN-
Load
RZ
”10
+
RZ
”10
IN+
REF
OUT
GND
Figure 30. Device Transient Protection
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8 Applications and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The INA250 measures the voltage developed across the internal current-sensing resistor when current passes
through it. The ability to drive the reference pin to adjust the functionality of the output signal offers multiple
configurations, as discussed in this section.
8.2 Typical Applications
8.2.1 Current Summing
Supply
2.7-V to 36-V
Supply
CBYPASS
0.1 µF
VS
IN+
REF
+
OUT
2.7-V to 36-V
Supply
CBYPASS
0.1 µF
IN-
GND
Load
Supply
Supply
VS
IN+
GND
IN-
REF
2.7-V to 36-V
Supply
IN+
OUT
CBYPASS
0.1 µF
-
VS
REF
+
-
IN-
+
OUT
Summed
Output
Load
GND
Load
Figure 31. Daisy-Chain Configuration
18
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Typical Applications (continued)
8.2.1.1 Design Requirements
Three daisy-chained devices are illustrated in Figure 31. The reference input of the first INA250 sets the
quiescent level on the output of all the INA250 devices in the string.
8.2.1.2 Detailed Design Procedure
The outputs of multiple INA250 devices are easily summed by connecting the output signal of one INA250 to the
reference input of a second INA250. Summing beyond two devices is possible by repeating this configuration,
connecting the output signal of the next INA250 to the reference pin of a subsequent INA250 in the chain. The
output signal of the final INA250 in this chain includes the current level information for all channels in the chain.
Output Voltage
(1 V/diV)
8.2.1.3 Application Curve
0V
Output
Input Current
(1 A/div)
Input B
0A
0A
Input A
Time (0.5 ms/div)
C034
VS = 5 V, VREF = 2.5 V
Figure 32. Daisy-Chain Configuration Output Response
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Typical Applications (continued)
8.2.2 Parallel Multiple INA250 Devices for Higher Current
2.7-V to 36-V
Supply
CBYPASS
0.1 µF
VS
2.7-V to 36-V
Supply
Supply
IN+
IN+
CBYPASS
0.1 µF
VS
REF
OUT
REF
+
+
-
OUT
From Out of
First Channel
Paralleled
Output
-
To REF of Second
Channel
GND
IN-
IN-
GND
Load
Figure 33. Parallel Summing Configuration
8.2.2.1 Design Requirements
The parallel connection for multiple INA250 devices can be used to reduce the equivalent overall sense
resistance, enabling monitoring of higher current levels than a single device is able to accommodate alone. This
configuration also uses a summing arrangement, as described in the Current Summing section. A parallel
summing configuration is shown in Figure 33.
8.2.2.2 Detailed Design Procedure
With a summing configuration the output of the first channel is fed into the reference input of the second, adding
the distributed measurements back together into a single measured value.
Output Voltage
(5 V/div)
8.2.2.3 Application Curve
Output B
12 V
Input Current
(10 A/div)
Outut A
0A
Input
Time (0.5 ms/div)
C036
VS = 24 V, VREF = 12 V
Figure 34. Parallel Configuration Output Response
20
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Typical Applications (continued)
8.2.3 Current Differencing
Supply
IN+
2.7-V to 36-V
Supply
CBYPASS
0.1 µF
Supply, Reference
Voltage
VS
+
+
REF
OUT
-
To REF of
Second Channel
IN-
GND
Q1
D1
Mosfet
Drive
Circuits
D2
2.7-V to 36-V
Supply
CBYPASS
0.1 µF
Q2
IN-
VS
+
OUT
REF
IN+
Differenced
Output
From Out of First
Channel
GND
Figure 35. Current Differencing Configuration
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Typical Applications (continued)
8.2.3.1 Design Requirements
Occasionally, the need may arise to confirm that the current into a load is identical to the current coming out of a
load, such as when performing diagnostic testing or fault detection. This procedure requires precision current
differencing. This method is the same as current summing, except that the two amplifiers have the respective
inputs connected opposite of each other. Under normal operating conditions, the final output is very close to the
reference value and proportional to any current difference. Figure 35 is an example of two INA250 devices
connected for current differencing.
8.2.3.2 Detailed Design Procedure
The load current can also be measured directly at the output of the first channel. Although technically this
configuration is current differencing, this connection (see Figure 35) is really intended to allow the upper
(positive) sense channel to report any positive-going excursions in the overall output and the lower (negative)
sense channel to report any negative-going excursions.
Output Voltage
(250 mV/div)
8.2.3.3 Application Curve
2.5 V
Input B
Input Current
(2.5 A/div)
Input A
0A
Time (25 ms/div)
C035
VS = 5 V, VREF = 2.5 V
Figure 36. Current Differencing Configuration Output Response
9 Power Supply Recommendations
The input circuitry of the device can accurately measure signals on common-mode voltages beyond the powersupply voltage, VS. For example, the voltage applied to the VS power-supply pin can be 5 V, whereas the load
power-supply voltage being monitored (the common-mode voltage) can be as high as 36 V. Note also that the
device can withstand the full 0-V to 36-V range at the input pins, regardless of whether the device has power
applied or not. Power-supply bypass capacitors are required for stability and must be placed as closely as
possible to the supply and ground pins of the device. A typical value for this supply bypass capacitor is 0.1 μF.
Applications with noisy or high-impedance power supplies can require additional decoupling capacitors to reject
power-supply noise.
22
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10 Layout
10.1 Layout Guidelines
•
•
•
•
The INA250 is specified for current handling of up to 10 A over the entire –40°C to 125°C temperature range
using a 1-oz. copper pour for the input power plane as well as no external airflow passing over the device.
The primary current-handling limitation for the INA250 is how much heat is dissipated inside the package.
Efforts to improve heat transfer out of the package and into the surrounding environment improve the ability of
the device to handle currents of up to 15 A over the entire –40°C to 125°C temperature range.
Heat transfer improvements primarily involve larger copper power traces and planes with increased copper
thickness (2 oz.) as well as providing airflow to pass over the device. The INA250EVM features a 2-oz.
copper pour for the planes and is capable of supporting 15 A at temperatures up to 125°C.
Place the power-supply bypass capacitor as close as possible to the supply and ground pins. The
recommended value of this bypass capacitor is 0.1 µF. Additional decoupling capacitance can be added to
compensate for noisy or high-impedance power supplies.
10.2 Layout Examples
Figure 37. Recommended Layout
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Layout Examples (continued)
J1
J2
108-0740-001
108-0740-001
C4
DNP
U1
16
15
14
IN+
SH+
SH-
VIN+
12
VIN+
C3
DNP
0
R2
VIN+
VINREF
VS
OUT
VIN+
VINREF
VS
OUT
GND
0
R1
GND
IN+
IN-
GND
IN+
IN-
13
SH+
VIN-
REF
VS
C5
DNP
7
10
IN+
IN+
IN+
1
2
3
INININ-
VIN+
5
VIN-
SH+
SH-
REF
OUT
VS
GND
GND
GND
4
9
6
8
11
T1
INVS
GND
REF
OUT
VINSH-
1
2
3
4
ED555/4DS
OUT
GND
INA250A2PW
TPGnd3 TPGnd2
GND
VS
GND
C2
0.1µF
C1
1µF
Figure 38. Recommended Layout Schematic
24
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11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Documentation
• INA250EVM User Guide, SBOU153
11.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 3. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
INA250A1
Click here
Click here
Click here
Click here
Click here
INA250A2
Click here
Click here
Click here
Click here
Click here
INA250A3
Click here
Click here
Click here
Click here
Click here
INA250A4
Click here
Click here
Click here
Click here
Click here
11.3 Trademarks
All trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
INA250A1PW
PREVIEW
TSSOP
PW
16
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
I250A1
INA250A1PWR
PREVIEW
TSSOP
PW
16
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
I250A1
INA250A2PW
ACTIVE
TSSOP
PW
16
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
I250A2
INA250A2PWR
ACTIVE
TSSOP
PW
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
I250A2
INA250A3PW
PREVIEW
TSSOP
PW
16
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
I250A3
INA250A3PWR
PREVIEW
TSSOP
PW
16
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
I250A3
INA250A4PW
PREVIEW
TSSOP
PW
16
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
I250A4
INA250A4PWR
PREVIEW
TSSOP
PW
16
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
I250A4
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
(4)
16-Sep-2015
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
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Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
13-May-2015
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
INA250A2PWR
Package Package Pins
Type Drawing
TSSOP
PW
16
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2000
330.0
12.4
Pack Materials-Page 1
6.9
B0
(mm)
K0
(mm)
P1
(mm)
5.6
1.6
8.0
W
Pin1
(mm) Quadrant
12.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
13-May-2015
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
INA250A2PWR
TSSOP
PW
16
2000
367.0
367.0
35.0
Pack Materials-Page 2
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