Advantech PCI-1240 User manual
PCI-1240
4-Axis PCI Stepping/Pulse-type
Servo Motor Control Card
PCI-1240U
4-Axis Universal PCI Stepping/
Pulse-type Servo Motor Control
Card
User Manual
Copyright
This documentation and the software included with this product are
copyrighted 2005 by Advantech Co., Ltd. All rights are reserved.
Advantech Co., Ltd. reserves the right to make improvements in the
products described in this manual at any time without notice.
No part of this manual may be reproduced, copied, translated or
transmitted in any form or by any means without the prior written
permission of Advantech Co., Ltd. Information provided in this manual is
intended to be accurate and reliable. However, Advantech Co., Ltd.
assumes no responsibility for its use, nor for any infringements of the
rights of third parties which may result from its use.
Acknowledgments
PC-LabCard is a trademark of Advantech Co., Ltd. IBM and PC are
trademarks of International Business Machines Corporation. MS-DOS,
Windows®, Microsoft® Visual C++ and Visual BASIC are trademarks of
Microsoft® Corporation. Intel® and Pentium® are trademarks of Intel
Corporation. Delphi and C++Builder are trademarks of Inprise
Corporation.
CE notification
The PCI-1240/PCI-1240U, developed by ADVANTECH CO., LTD., has
passed the CE test for environmental specifications when shielded cables
are used for external wiring. We recommend the use of shielded cables.
This kind of cable is available from Advantech. Please contact your local
supplier for ordering information.
Part No. 2003124001 2nd Edition
Printed in Taiwan
PCI-1240/PCI-1240U User Manual
ii
March 2005
Product Warranty (2 years)
Advantech warrants to you, the original purchaser, that each of its products will be free from defects in materials and workmanship for two years
from the date of purchase.
This warranty does not apply to any products which have been repaired or
altered by persons other than repair personnel authorized by Advantech,
or which have been subject to misuse, abuse, accident or improper installation. Advantech assumes no liability under the terms of this warranty as
a consequence of such events.
Because of Advantech’s high quality-control standards and rigorous testing, most of our customers never need to use our repair service. If an
Advantech product is defective, it will be repaired or replaced at no
charge during the warranty period. For out-of-warranty repairs, you will
be billed according to the cost of replacement materials, service time and
freight. Please consult your dealer for more details.
If you think you have a defective product, follow these steps:
1.
Collect all the information about the problem encountered. (For
example, CPU speed, Advantech products used, other hardware
and software used, etc.) Note anything abnormal and list any
onscreen messages you get when the problem occurs.
2.
Call your dealer and describe the problem. Please have your manual, product, and any helpful information readily available.
3.
If your product is diagnosed as defective, obtain an RMA (return
merchandize authorization) number from your dealer. This allows
us to process your return more quickly.
4.
Carefully pack the defective product, a fully-completed Repair and
Replacement Order Card and a photocopy proof of purchase date
(such as your sales receipt) in a shippable container. A product
returned without proof of the purchase date is not eligible for warranty service.
5.
Write the RMA number visibly on the outside of the package and
ship it prepaid to your dealer.
iii
Technical Support and Assistance
Step 1. Visit the Advantech web site at www.advantech.com/support
where you can find the latest information about the product.
Step 2. Contact your distributor, sales representative, or Advantech's customer service center for technical support if you need additional
assistance. Please have the following information ready before
you call:
- Product name and serial number
- Description of your peripheral attachments
- Description of your software (operating system, version, application software, etc.)
- A complete description of the problem
- The exact wording of any error messages
Packing List
Before setting up the system, check that the items listed below are
included and in good condition. If any item does not accord with the
table, please contact your dealer immediately.
• PCI-1240 or PCI-1240U card
• Companion CD-ROM (DLL driver included)
• User Manual
Safety Precaution - Static Electricity
Follow these simple precautions to protect yourself from harm and the
products from damage.
1.
To avoid electrical shock, always disconnect the power from your
PC chassis before you work on it. Don't touch any components on
the CPU card or other cards while the PC is on.
2.
Disconnect power before making any configuration changes. The
sudden rush of power as you connect a jumper or install a card may
damage sensitive electronic components.
PCI-1240/PCI-1240U User Manual
iv
Contents
Chapter
1 Introduction ..................................................... 2
1.1
1.2
1.3
1.4
Chapter
Chapter
Features ............................................................................. 2
Applications ...................................................................... 5
Installation Guide .............................................................. 6
Accessories........................................................................ 6
2 Installation ....................................................... 8
2.1
2.2
Unpacking ......................................................................... 8
Driver Installation ............................................................. 9
2.3
Hardware Installation ..................................................... 12
Figure 2.1:The Setup Screen of Advantech Automation
Software ........................................................... 10
Figure 2.2:Different options for Driver Setup ............. 11
3 Signal Connections ........................................ 14
3.1
3.2
I/O Connector Pin Assignments...................................... 14
Location of Jumpers and DIP switch .............................. 14
3.3
Output Pulse Definition (nP+P, nP+N, nP-P, nP-N)....... 20
3.4
General Purposed Output (nOUT7 ~ nOUT4) ................ 22
3.5
Over Traveling Limit Switch Input (nLMT+, nLMT-)... 22
3.6
Deceleration/Instant. Stop Switch Input (nIN1 ~ 3) ....... 23
3.7
General Purp. Inp. for S. Drives (nINPOS, nALARM) .. 24
Figure 3.1:I/O Connector Pin Assignments for PCI-1240
& PCI-1240U ................................................... 15
Table 3.1:PCI-1240/PCI-1240U I/O Connector Signal
Description (part 1) .......................................... 16
Table 3.1:PCI-1240/PCI-1240U I/O Connector Signal
Description (part 2) .......................................... 17
Table 3.1:PCI-1240/PCI-1240U I/O Connector Signal
Description (part 3) .......................................... 18
Figure 3.2:Location of Jumpers and DIP switch on PCI1240/PCI-1240U .............................................. 19
Table 3.2:BoardID register .......................................... 19
Table 3.3:BoardID setting ............................................ 19
Figure 3.3:Output Signal Loop for Drive Pulses ......... 20
Table 3.4:Jumper table of JP1~8 ................................. 20
Figure 3.4:Photo Coupler Input Interface .................... 21
Figure 3.5:Line Driver Input Interface ........................ 21
Figure 3.6:Circuit Diag. for General Purpose Output .. 22
Figure 3.7:Circuit Diagram for Movement Limit Input
Signals .............................................................. 22
Figure 3.8:Example of photo sensor used in the limit input
signal ................................................................ 23
Figure 3.9:Circuit Diagram of Deceleration/Instantaneous Stop Input Signal ................................... 23
Figure 3.10:Input Signal for Servo Motor ................... 24
v
Table of Contents
3.8 Encoder Input (nECAP, nECAN, nECBP, nECBN, nINOP,
nION) ......................................................................................... 25
Figure 3.11:Circuit Diagram of Encoder Feedback ..... 25
Figure 3.12:Example of Connection Diagram for Differential-output Line Driver ................................. 26
Figure 3.13:Example of Connection for Open Collector
Output Encoder ................................................ 26
3.9
External Pulse Control Input (nEXOP+, nEXOP-)......... 27
3.10
Emergency Stop Input (EMG) ........................................ 28
3.11
3.12
External Power Input (VEX)........................................... 28
Interrupt Setting............................................................... 29
3.13
Connection Examples for Motor Drivers ........................ 30
3.14
3.15
Figure 3.14:Circuit Diagram of the External Drive Operation Signals ..................................................... 27
Figure 3.15:Example of Connecting to Jog ................. 27
Figure 3.16:Circuit Diagram of Emergency Stop Input
Signal ............................................................... 28
Table 3.5:Jumper Settings of JP9 ................................ 28
Figure 3.17:Circuit diagram of interrupt setting .......... 29
3.13.1 Connection to Step Motor Drivers ............................... 30
Figure 3.18:Example of Conn. to KR515M Drive ...... 30
Figure 3.19:Example of Conn. to UPK Step Drive ..... 31
3.13.2 Connection to Servo Motor Drivers ............................. 32
Figure 3.20:Ex. of MINAS X series AC S. Motor Drv 32
Field Wiring Considerations ........................................... 33
I/O Signal Timing............................................................ 34
3.15.1 Power On RESET ........................................................ 34
Figure 3.21:Timing Diagram of Power On RESET .... 34
3.15.2 Individual Axis Driving ............................................... 34
Figure 3.22:Timing Diag. of Individual Axis Driving . 34
3.15.3 Interpolation Driving ................................................... 35
Figure 3.23:Timing diagram of Interpolation Driving . 35
3.15.4 Input Pulse Timing ....................................................... 35
Figure 3.24:Timing diagram of Quadrature Pulse of Encoder Input ....................................................... 35
Figure 3.25:Timing diag. of UP/DOWN Pulse Input .. 35
3.15.5 Instantaneous Stop Timing .......................................... 36
Figure 3.26:Timing diagram of External Instantaneous
Stop Signal ....................................................... 36
Figure 3.27:Timing diagram of Instantaneous Stop Instruction ........................................................... 36
3.15.6 Deceleration Stop Timing ............................................ 36
Figure 3.28:Timing diagram of External Deceleration/
Stop Signal ....................................................... 36
Figure 3.29:Timing diagram of Deceleration/Stop Instruction ........................................................... 36
PCI-1240/PCI-1240U User Manual
vi
3.16 TTL Level Position Compare Output
(PCI-1240U only) ...................................................................... 37
Table 3.6:Jumper Settings of JP10 .............................. 37
Appendix A Specifications ................................................. 40
A.1
A.2
A.3
A.4
A.5
A.6
Axes................................................................................. 40
Digital Input/Output ........................................................ 41
Input Pulse for Encoder Interface.................................... 42
External Signals Driving ................................................. 42
Other Functions ............................................................... 43
General ............................................................................ 43
Appendix B Block Diagram ............................................... 46
Appendix C Register Structure and Format.................... 48
C.1
C.2
Overview ......................................................................... 48
I/O Port Address Map ..................................................... 48
C.3
C.4
MCX314/MCX314AS WRITE Registers: WR0 ~ WR7 53
Clear Interrupt Register: CLRINT .................................. 53
C.5
Pulse Generator Mode/Status Register: PGM/PGSTA ... 53
C.6
C.7
MCX314/MCX314AS READ Registers: RR0 ~ RR7.... 55
Interrupt Status Register: INTSTA ................................. 56
C.8
Board ID Register: BDID................................................ 56
Table C.1:PCI-1240/PCI-1240U WRITE reg. func. .... 49
Table C.2:PCI-1240/PCI-1240U WRITE reg. format . 50
Table C.3:PCI-1240/PCI-1240U READ reg. function 51
Table C.4:PCI-1240/PCI-1240U READ reg. format ... 52
Table C.5:Clear Interrupt Register: CLRINT - Write
BASE +10 ........................................................ 53
Table C.6:Pulse Generator Mode/Status Register: PGM/
PGMSTA - Write/Read BASE +14 ................. 54
Table C.7:Pulse Generator Mode - PGMn3 ................. 54
Table C.8:Pulse Generator Signal Connection Mode .. 55
Table C.9:Driving Axis for SW Programmable Mode 55
Table C.10:Interrupt Status Register: INTSTA - Read
BASE +10 ........................................................ 56
Table C.11:BoardID Reg.: BDID - Read BASE +12 .. 56
Appendix D Cable Pin Assignments ................................. 58
Appendix E Wiring with Third-Party Motor Drivers .... 60
Figure E.1:Wiring Diagram with Mitsubishi MR-J2S Series Motor Driver ............................................. 60
Figure E.2:Wiring Diagram with Oriental LIMO EZMC
Series Motor Driver ......................................... 61
Figure E.3:Wiring Diagram with Panasonic MINAS-A
Series Motor Driver ......................................... 62
Figure E.4:Wiring Diagram with Yaskawa SGDM Series
Motor Driver .................................................... 63
vii
Table of Contents
PCI-1240/PCI-1240U User Manual
viii
CHAPTER
1
2
Introduction
This chapter introduces PCI-1240 and
PCI-1240U and lists their features and
detailed specifications.
Chapter 1 Introduction
PCI-1240 and PCI-1240U 4-Axis Stepping/Pulse-type Servo Motor Control Cards are designed for general-purpose extreme motion applications.
The cards are high-speed 4-Axis motion control cards for the PCI (1240)/
Universal PCI (1240U) bus that simplifies stepping and pulse-type servo
motor control, giving you added performance from your motors.
The cards’ intelligent NOVA MCX314/MCX314AS motion ASIC builds
in a variety of motion control functions, such as 2/3-axis linear interpolation, 2-axis circular interpolation, T/S-curve acceleration/deceleration
rate and more. In addition, the next generation chip, MCX314AS is leadfree and not only increases the 2/3-axis linear interpolation range and the
number of output pulses, but also provides the “Go Home” function.
PCI-1240 and PCI-1240U performs these motion control functions without processor load during driving. For advanced applications, we supply
Windows DLL drivers and user-friendly examples to decrease your programming load. Moreover, through a free bundled PCI-1240 motion utility, you can complete configuration and diagnosis easily.
1.1 Features
PCI-1240/PCI-1240U provides users with the most requested motor control functions as seen below:
• Independent 4-axis motion control
• Support hand wheel and jog function
• 2/3-axis linear interpolation function
• 2-axis circular interpolation function
• Continuous interpolation function
• Programmable T/S-curve acceleration and deceleration
• Up to 4MPPS pulse output for each axis
• Two pulse output types: Up/Down or Pulse/Direction
• Up to 1 MHz encoder input for each axis
• Two encoder pulse input types: A/B phase or Up/Down
• Position management and software limit switch function
• BoardID Switch
• Free Motion Utility bundled for configuration and diagnosis
PCI-1240/PCI-1240U User Manual
2
• "Go home” functions (PCI-1240U only)
• Universal PCI Bus for both 3.3 and 5 V PCI slots (PCI-1240U only)
The Advantech PCI-1240/PCI-1240U offers the following main features:
Individual Control for 4 Axes
Each of the four axes has identical function capabilities, and is controlled
by the same method of operation with constant speed, trapezoidal or
S-curve driving.
Programmable T/S-curve Acceleration and Deceleration
Each of four axes can be preset individually with S-curve or trapezoidal
acceleration/deceleration rates. When using S-curve acceleration to control driving speed, output pulse is generated in parabolic-shaped acceleration or deceleration curves, and the triangular curve phenomenon will not
occur through the NOVA MCX314/MCX314AS-motion ASIC design
concept.
Linear and Circular Interpolation
Any two or three axes can be selected to execute linear interpolation driving and any two axes can be selected to execute circular arc interpolation
control. The interpolation speed range is from 1 PPS to 4 MPPS.
Powerful position management function
Each axis is equipped with a 32-bit logical position counter and a 32-bit
real position counter. The logical position counter counts the axis’ pulse
output number and the real position counter is recorded with the feedback
pulse from the outside encoder or linear scale.
Speed Control
The speed range of the pulse output is from 1PPS to 4MPPS for constant
speed, trapezoidal or S-curve acceleration/deceleration driving. The
accuracy of the frequency of the pulse output is less than +/- 0.1% (at
CLK=16 MHz). The speed of driving pulse output can be freely changed
during the driving.
3
Chapter 1
Bit Pattern Interpolation
Any 2 or 3 axes can be selected to perform the bit pattern interpolation,
and the interpolation data is calculated by CPU; CPU writes the bit data
into MCX314/MCX314AS. Then, MCX314/MCX314AS outputs pulses
continuously at the preset driving speed. So, the user can process any
interpolation curve by this mode.
Continuous Interpolation
Different interpolation methods can be used continuously, for example:
Linear interpolation!Circular interpolation!Linear interpolation.
The maximum driving speed of performing continuous interpolation is 2
MPPS.
Constant Vector Speed Control
This function performs a constant vector speed. During the interpolation
driving, MCX314/MCX314AS can set a 1.414 times pulse cycle for 2axis simultaneous pulse output, and a 1.732-time pulse cycle for 3-axis
simultaneous pulse output that keep the constant speed during driving.
Position Control
Each axis has a 32-bit logic position counter and a 32-bits real position
counter. The logic position counter counts the output pulse numbers, and
the real position counter counts the feedback pulse numbers from the
external encoder or linear scale.
Compare Register and Software Limit
Each axis has two 32-bit compare registers for logical position counter
and real position counter. The comparison result can be read from the status registers. The comparison result can be notified by an interrupt signal.
These registers can be also functioned as software limits.
PCI-1240/PCI-1240U User Manual
4
Driving by External Signal
It is possible to control each axis by external signals. The +/- direction
fixed pulse driving and continuous driving can be also performed through
the external signals. This function is used for JOG or teaching modes, and
will share the CPU load.
Input/ Output Signal
Each axis has 4 points of input signals to perform deceleration and stop in
driving. These input signals are for high-speed near-by home search,
home search and z-phase search during the home returning. Each axis is
with 8 output points for general output.
Servo Motor Feedback Signals
Each axis includes input pins for servo feedback signals such as in-positioning, close loop positioning control and servo alarm.
Interrupt Signals
Interrupt signals can be generated when: (1). The start / finish of a constant speed drive during the trapezoidal driving, (2). The end of driving,
and (3). The compare result once higher / lower the border-lines of the
position counter range. An interrupt signal can be also generated during
the interpolation driving.
Real Time Monitoring
During the driving, the present status such as logical position, real
position, drive speed, acceleration / deceleration, status of accelerating /
decelerating and constant driving can be read.
1.2 Applications
• Precise X-Y-Z position control
• Precise rotation control
• Packaging and assembly equipment
• Machine control with up to 4 axes
• Semiconductor pick and place and testing equipment
• Other stepping/pulse-type servo motor applications
5
Chapter 1
1.3 Installation Guide
Before you install your PCI-1240/PCI-1240U card, please make sure you
have the following necessary components:
• PCI-1240 or PCI-1240U DAS card
• PCI-1240/PCI-1240U’s User Manual
• Driver Software
Advantech PCI-1240/PCI-1240U DLL drivers (Included in the companion CD-ROM)
• Motion Utility
Advantech PCI-1240/PCI-1240U Motion Utility (Included in the companion CD-ROM)
• PCL-10251 Wiring cable
• 2pcs ADAM-3952 Wiring board
• Personal computer or workstation with a PCI-bus slot
After you have got the necessary components and maybe some accessories for enhanced operation of your Motion card, you can then begin the
installation procedure.
1.4 Accessories
Advantech offers a complete set of accessory products to support the
PCI-1240/PCI-1240U card. These accessories include:
Wiring Cable
• PCL-10251
The PCL-10251 shielded cable is specially designed for
PCI-1240/PCI-1240U card to provide higher resistance
to noise. To achieve a better signal quality, the signal
wires are twisted in such away as to form a “twisted-pair
cable”, reducing cross talk and noise from other signal
sources.
Wiring Boards
• ADAM-3952 The ADAM-3952 is a 50-pin SCSI wiring terminal
module for DIN-rail mounting. This terminal module
can allow easy yet reliable access to individual pin
connections for the PCI-1240/PCI-1240U card.
PCI-1240/PCI-1240U User Manual
6
CHAPTER
2
2
Installation
This chapter gives users a package item
checklist, proper instructions about
unpacking and step-by-step procedures
for both driver and card installation.
Chapter 2 Installation
2.1 Unpacking
After receiving your PCI-1240/PCI-1240U package, please inspect its
contents first. The package should contain the following items:
" PCI-1240/PCI-1240U card
" Companion CD-ROM (DLL driver included)
" User’s Manual
The PCI-1240/PCI-1240U card harbors certain electronic components
vulnerable to electrostatic discharge (ESD). ESD could easily damage the
integrated circuits and certain components if preventive measures are not
carefully paid attention to. Before removing the card from the antistatic plastic bag, you should take following precautions to ward off
possible ESD damage:
• Touch the metal part of your computer chassis with your hand to
discharge static electricity accumulated on your body. Or one can also
use a grounding strap.
• Touch the antistatic bag to a metal part of your computer chassis before
opening the bag.
• Take hold of the card only by the metal bracket when removing it out of
the bag.
After taking out the card, first you should:
• Inspect the card for any possible signs of external damage (loose or
damaged components, etc.). If the card is visibly damaged, please
notify our service department or our local sales representative immediately. Avoid installing a damaged card into your system.
Also pay extra caution to the following aspects to ensure proper
installation:
Avoid physical contact with materials that could
hold static electricity such as plastic, vinyl and
Styrofoam.
PCI-1240/PCI-1240U User Manual
8
Whenever you handle the card, grasp it only by
its edges. DO NOT TOUCH the exposed metal
pins of the connector or the electronic components.
Note
Keep the antistatic bag for future use. You might
need the original bag to store the card if you
have to remove the card from PC or transport it
elsewhere.
2.2 Driver Installation
We recommend you to install the driver before you install the
PCI-1240/PCI-1240U card into your system, since this will guarantee
a smooth installation process.
The 32-bit DLL driver Setup program for the card is included on the
companion CD-ROM that is shipped with your DAS card package. Please
follow the steps below to install the driver software:
Step 1: Insert the companion CD-ROM into your CD-ROM drive.
Step 2: The Setup program will be launched automatically if you have
the autoplay function enabled on your system. When the Setup
Program is launched, you’ll see the following Setup Screen.
Note
If the autoplay function is not enabled on your
computer, use Windows Explorer or Windows
Run command to execute SETUP.EXE on the
companion CD-ROM.
9
Chapter 2
Figure 2.1: The Setup Screen of Advantech Automation Software
Step 3: Select the PCI-1240/PCI-1240U DLL Drivers option.
Step 4: Select the proper Windows OS option according to your operating
system. Just follow the installation instructions step by step to
complete your DLL driver setup.
PCI-1240/PCI-1240U User Manual
10
Figure 2.2: Different options for Driver Setup
Step 5: Then setup the PCI-1240/PCI-1240U Motion Utility automatically.
For further information on driver-related issues, an online version of
Software Manual is available by accessing the following path:
Start\Advantech Automation\Motion\PCI-1240\
The example source codes could be found under the corresponding installation folder such as the default installation path:
\Program Files\Advantech\Motion\PCI-1240\Examples\
11
Chapter 2
2.3 Hardware Installation
Note
Make sure you have installed the driver first
before you install the card (please refer to 2.2
Driver Installation)
After the DLL driver installation is completed, you can now go on to
install the PCI-1240/PCI-1240U card in any PCI slot on your computer.
But it is s
uggested that you should refer to the computer user manual or related
documentations if you have any doubt. Please follow the steps below to
install the card on your system.
Step 1: Turn off your computer and unplug the power cord and cables.
TURN OFF your computer before installing or
removing any components on the computer.
Step 2: Remove the cover of your computer.
Step 3: Remove the slot cover on the back panel of your computer.
Step 4: Touch the metal part on the surface of your computer to neutralize
the static electricity that might be on your body.
Step 5: Insert the PCI-1240/PCI-1240U card into a PCI slot. Hold the
card only by its edges and carefully align it with the slot. Insert
the card firmly into place. Use of excessive force must be
avoided, otherwise the card might be damaged.
Step 6: Fasten the bracket of the PCI card on the back panel rail of the
computer with screws.
Step 7: Connect appropriate accessories (100-pin cable, wiring terminals,
etc. if necessary) to the PCI card.
Step 8: Replace the cover of your computer chassis. Re-connect the
cables you removed in step 2.
Step 9: Plug in the power cord and turn on the computer.
PCI-1240/PCI-1240U User Manual
12
3
CHAPTER
2
Signal Connections
Maintaining signal connections is one
of the most important factors in ensuring that your application system is
sending and receiving data
correctly. A good signal connection can
avoid unnecessary and costly damage
to your PC and other hardware devices.
This chapter provides useful information about how to connect input and
output signals to the PCI-1240/PCI1240U via the I/O connector.
Chapter 3 Signal Connections
3.1 I/O Connector Pin Assignments
The I/O connector on the PCI-1240/PCI-1240U is a 100-pin connector
that enables you to connect to accessories with the PCL-10251 shielded
cable.
Figure 3.1 shows the pin assignments for the 100-pin I/O connector on
the PCI-1240/PCI-1240U, and Table 3-1 shows its I/O connector signal
description.
Note
The PCL-10251 shielded cable is especially
designed for the PCI-1240/PCI-1240U to reduce
noise in the analog signal lines. Please refer to
Section 1.4 Accessories.
3.2 Location of Jumpers and DIP switch
Figure 3.2 shows the names and locations of jumpers and DIP switch on
the PCI-1240/PCI-1240U. There are nine jumpers, JP1 to JP9 on the PCI1240/PCI-1240U. Please refer to Section 3.4 Output Pulse Definition and
Section 3.11 Emergency Stop Input for more information about JP1~8
and JP9 configurations.
BoardID Switch
PCI-1240 and PCI-1240U have a built-in DIP switch (SW1), which is
used to define each card’s unique identifier for the PCI-1240/PCI-1240U
Motion Utility. You can determine the BoardID identifier on the register
as shown in Table 3-2. When there are multiple cards on the same chassis, this BoardID setting is useful for identifying each card’s unique
device number.
We set the BoardID switch of PCI-1240/PCI-1240U to 0 at the factory. If
you need to adjust it to another number, set SW1 by referring to Table
3.3.
PCI-1240/PCI-1240U User Manual
14
Figure 3.1: I/O Connector Pin Assignments for PCI-1240 & PCI-1240U
15
Chapter 3
Table 3.1: PCI-1240/PCI-1240U I/O Connector Signal Description
(part 1)
Signal Name
VEX
EMG
XLMT+
XLMTXIN1
XIN2
XIN3
YLMT+
YLMTYIN1
YIN2
YIN3
XINPOS
XALARM
XECAP
XECAN
XECBP
XECBN
XINOP
XINON
YINPOS
YALARM
YECAP
YECAN
YECBP
YECBN
YINOP
YINON
XEXOP+
XEXOPYEXOP+
YEXOPGND
XOUT4
XOUT5
Reference
GND
GND
PCI-1240/PCI-1240U User Manual
Direction
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Output
Output
16
Description
External Power (12~24VDC)
Emergency Stop (for all axes)
+ Direction Limit at X axis
- Direction Limit at X axis
Deceleration/Instant Stop at X axis
Deceleration/Instant Stop at X axis
Deceleration/Instant Stop at X axis
+ Direction Limit at Y axis
- Direction Limit at Y axis
Deceleration/Instant Stop at Y axis
Deceleration/Instant Stop at Y axis
Deceleration/Instant Stop at Y axis
In-Position input at X axis
Servo Error at X axis
Encoder Phase A at X axis
Encoder Phase A at X axis
Encoder Phase B at X axis
Encoder Phase B at X axis
Encoder Phase Z at X axis
Encoder Phase Z at X axis
In-Position input at Y axis
Servo Error at Y axis
Encoder Phase A at Y axis
Encoder Phase A at Y axis
Encoder Phase B at Y axis
Encoder Phase B at Y axis
Encoder Phase Z at Y axis
Encoder Phase Z at Y axis
Jog at the + Direction of X axis
Jog at the - Direction of X axis
Jog at the + Direction of Y axis
Jog at the - Direction of Y axis
Ground
General Output at X axis (CMP)
General Output at X axi
Table 3.1: PCI-1240/PCI-1240U I/O Connector Signal Description
(part 2)
Signal Name
XOUT6
XOUT7
XP+P
XP+N
XP-P
XP-N
GND
YOUT4
YOUT5
YOUT6
Reference
GND
GND
GND
GND
GND
GND
GND
GND
GND
Direction
Output
Output
Output
Output
Output
Output
Output
Output
Output
YOUT7
YP+P
YP+N
YP-P
YP-N
VEX
ZLMT+
ZLMTZIN1
ZIN2
ZIN3
ULMT+
ULMTUIN1
UIN2
UIN3
ZINPOS
ZALARM
ZECAP
ZECAN
ZECBP
ZECBN
ZINOP
ZINON
UINPOS
GND
GND
GND
GND
GND
-
Output
Output
Output
Output
Output
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
17
Description
General Output at X axis (Server on)
General Output at X axis (Reset)
Output pulse CW/Pulse+ of X-axis
Output pulse CW/ Pulse- of X-axis
Output pulse CCW/DIR+ of X-axis
Output pulse CCW/DIR- of X-axis
Ground
Common Output at Y axis (CMP)
Common Output at Y axis
Common Output at Y axis (Server
on)
Common Output at Y axis (Reset)
Output pulse CW/Pulse+ of Y-axis
Output pulse CW/Pulse- of Y-axis
Output pulse CCW/DIR+ of Y-axis
Output pulse CCW/DIR- of Y-axis
External Power (DC12~24V)
+ Direction Limit at Z axis
- Direction Limit at Z axis
Deceleration/Instant Stop at Z axis
Deceleration/Instant Stop at Z axis
Deceleration/Instant Stop at Z axis
+ Direction Limit at U axis
- Direction Limit at U axis
Deceleration/Instant Stop at U axis
Deceleration/Instant Stop at U axis
Deceleration/Instant Stop at U axis
Positioning Complete at Z axis
Servo Error at Z axis
Encoder Phase A at Z axis
Encoder Phase A at Z axis
Encoder Phase B at Z axis
Encoder Phase B at Z axis
Encoder Phase Z at Z axis
Encoder Phase Z at Z axis
Positioning Complete at U axi
Chapter 3
Table 3.1: PCI-1240/PCI-1240U I/O Connector Signal Description
(part 3)
Signal Name
UALARM
UECAP
UECAN
UECBP
UECBN
UINOP
UINON
ZEXOP+
ZEXOPUEXOP+
UEXOPGND
ZOUT4
ZOUT5
ZOUT6
Reference
GND
GND
GND
Direction
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Output
Output
Output
ZOUT7
ZP+P
ZP+N
ZP-P
ZP-N
GND
UOUT4
UOUT5
UOUT6
GND
GND
GND
GND
GND
GND
GND
GND
Output
Output
Output
Output
Output
Output
Output
Output
UOUT7
UP+P
UP+N
UP-P
UP-N
GND
GND
GND
GND
GND
Output
Output
Output
Output
Output
PCI-1240/PCI-1240U User Manual
18
Description
Servo Error at U axis
Encoder Phase A at U axis
Encoder Phase A at U axis
Encoder Phase B at U axis
Encoder Phase B at U axis
Encoder Phase Z at U axis
Encoder Phase Z at U axis
Jog at the + Direction of Z axis
Jog at the - Direction of Z axis
Jog at the + Direction of U axis
Jog at the - Direction of U axis
Ground
Common Output at Z axis (CMP)
Common Output at Z axis
Common Output at Z axis (Server
on)
Common Output at Z axis (Reset)
Output pulse CW/Pulse+ of Z-axis
Output pulse CW/Pulse- of Z-axis
Output pulse CCW/DIR+ of Z-axis
Output pulse CCW/DIR- of Z-axis
Ground
Common Output at U axis (CMP)
Common Output at U axis
Common Output at U axis (Server
on)
Common Output at U axis (Reset)
Output pulse CW/Pulse+ of U-axis
Output pulse CW/Pulse- of U-axis
Output pulse CCW/DIR+ of U-axis
Output pulse CCW/DIR- of U-axi
Figure 3.2: Location of Jumpers and DIP switch on PCI-1240/PCI-1240U
Table 3.2: BoardID register
SW1
Board ID register
Base Add.+12h
3
2
1
0
Abbreviation
BDID3
BDID2
BDID1
BDID
ID0: the least significant bit (LSB) of Board ID
ID3: the most significant bit (MSB) of Board ID
Table 3.3: BoardID setting
Board ID setting (SW1)
Board ID (Dec.)
Switch Position
ID3
ID2
ID1
ID0
*0
#
#
#
#
1
#
#
#
$
14
$
$
$
$
15
$
$
$
$
$= Off
#= On
* = default
:
19
Chapter 3
3.3 Output Pulse Definition (nP+P, nP+N, nP-P, nP-N)
The output pulse command of PCI-1240/PCI-1240U is from MCX314/
MCX314AS chip. The pulse command has two types. One is in Up/Down
mode and another is in Pulse/Direction mode. While nP+P is differential
from nP+N and
nP-P is differential from nP-N. After system reset, the nP+P and nP-P is
low level, and this invert output (nP+N, nP-N) is high level, and the
de-fault setting of pulse output mode is Up/Down. User can change the
output mode into Pulse/Direction mode by writing specified command
system register.
Figure 3.3: Output Signal Loop for Drive Pulses
From the circuit shown above (Figure 3-3), the default output mode is differential output. For single ended output use, user can change jumpers
JP1~8 to +5V. Note that you should prevent from the noise interference
when using jumpers JP1~8 to output internal +5V to external device.
Table 3.4: Jumper table of JP1~8
Jumper
JP1
JP2
JP3
JP4
JP5
JP6
JP7
JP8
Output Signal
XP+P
XP-P
YP+P
YP-P
ZP+P
ZP-P
UP+P
UP-P
IC Output
(Line Driver
Output)
+5V
Output
PCI-1240/PCI-1240U User Manual
Pin2 and Pin 3 short (Default)
Pin1 and Pin 2 shor
20
The following figure 3-4 and 3-5 show the examples of input circuitry
connection for both photo coupler and motor driver respectively.
Figure 3.4: Photo Coupler Input Interface
Figure 3.5: Line Driver Input Interface
21
Chapter 3
3.4 General Purposed Output (nOUT7 ~ nOUT4)
The general purposed output nOUT7/DSND, nOUT6/ASND, nOUT5/
CMPM, and nOUT4/CMPP are from MCX314/MCX314AS, and each
output signal is OFF status after system reset.
Figure 3.6: Circuit Diagram for General Purposed Output
General purposed output signals used in motor drives can clear error
counter, alarm reset, stimulus off, etc., or select acceleration/deceleration
for driving, position counter, and the status of comparison register as your
output during driving.
3.5 Over Traveling Limit Switch Input (nLMT+, nLMT-)
Over traveling limit switches are used for system protection. This input
signal is connected to the limit input of MCX314/MCX314AS through
the connection of photo coupler and RC filter. When the limit switch is
applied, the external power VEX DC12~24V will source the photo coupler, and then the nLMTP in MCX314/MCX314AS will be low level.
This enables the over traveling function if the desired level of nLMTP is
set to low.
Figure 3.7: Circuit Diagram for Movement Limit Input Signals
PCI-1240/PCI-1240U User Manual
22
The response time of this circuit should take about 0.2 ~ 0.4 msec
because of the delay of photo coupled and RC filter. The following figure
3-8 is an example of photo sensor used in the case of over traveling limit
switch input. When writing D3 bit of register2 (XWR2) into 0 to set the
limit switch is low active in X-axis, the following figure can work
normally.
Figure 3.8: Example of photo sensor used in the limit input signal
3.6 Deceleration/Instantaneous Stop Switch Input
(nIN1 ~ 3)
There are three input signals (nIN1, nIN2, nIN3) can make the motor
drives deceleration or stop. Each axis has four inputs IN3 ~ IN0, wherein
IN0 is used in phase Z interface of encoder feedback, and nIN1, nIN2,
and nIN3 are use as input signals near the original point. If run mode is
active, the output of driving pulse is terminated after those signals are
enabled; The deceleration occurs during acceleration/deceleration, and it
will be stopped immediately during constant drive. All the signals
become invalid after reset. For example, when setting the D7 and D6 of
XWR1 register to 1 and 0 (IN3 is low active), the drive will be terminated
in the case of the limit switch is on and xIN3 is low. Furthermore, these
input signals can be used as general purposed input because user can get
the level by reading the input register status (RR4, RR5)
Figure 3.9: Circuit Diagram of Deceleration/Instantaneous Stop Input
Signal
The response time of this circuit should take about 0.25 msec because of
the delay of photo coupled and RC filter.
23
Chapter 3
3.7 General Purposed Input for Servo Drives (nINPOS,
nALARM)
nINPOS is an input signal from servo drives for in-position check, it is
active after the servo drives finish a position command. Users can enable/
disable this pin. When enable this function, the n-DRV bit in RR0 will
change to 0 after servo drives finish the in-position check and nINPOS
pin active.
nALARM is an input signal from servo drives for drives alarm output.
When servo drives have an abnormal condition, they active this signal to
note PCI-1240/PCI-1240U to stop output pulses. When enable the
nALARM function of PCI-1240/PCI-1240U, the D14 bit of RR2 will set
to 1 after nALARM active. If PCI-1240/PCI-1240U is driving pulses output, the output pulses will stop immediately when nALARM active.
Figure 3.10: Input Signal for Servo Motor
This signal must be supplied from the external source DC12 ~ 24V, and
the response time of this circuit should take about 0.25 msec because of
the delay of photo coupled and RC filter.
Furthermore, this two signals can be used as general purposed input while
user could read the input register 1 and 2 (RR4, RR5) to get the status of
this two signal.
PCI-1240/PCI-1240U User Manual
24
3.8 Encoder Input (nECAP, nECAN, nECBP, nECBN,
nINOP, nINON)
When feedback the encoder signals, connect nECAP to phase A of
encoder output. And nECAN to phase A, nECBP to phase B, nECBN to
phase B. nIN0P to phase Z and nIN0N to phase Z. The default setting of
position feedback of PCI-1240/PCI-1240U is quadrature input. Up/Down
pulses feedback is available after setting the input pule mode.
nIN0P/N is used for encoder phase Z signal feedback and also can be
used as general purposed input or instantaneous stop input.
Figure 3.11: Circuit Diagram of Encoder Feedback
From the circuit diagram above, PCI-1240/PCI-1240U use high speed
photo coupler for isolation. The encoder output can be differential mode
or open-collector mode. When n***P is high and n***N is low, the real
feedback signal (n***) to MCX314/MCX314AS is low. The maximum
possible A/B phase feedback frequency is about 1 MHz.
25
Chapter 3
The following diagram is an example of the connection for encoder with
differential-output linear driver.
Figure 3.12: Example of Connection Diagram for Differential-output Line
Driver
The following figure is an example of connection for the encoder with
open-collector output.
Figure 3.13: Example of Connection for Open Collector Output Encoder
PCI-1240/PCI-1240U User Manual
26
3.9 External Pulse Control Input (nEXOP+, nEXOP-)
The pulses output function of MCX314/MCX314AS chip is controlled by
register setting or by external pulse command input (nEXOP+, nEXOP-).
There are two output pulse mode for the external control pin. One is fixed
pulse output mode, and the other is continuous output mode. In PCI1240/PCI-1240U, it provides Jog and Hand wheel functions that allow
you driving motors through external Hand wheel or Jog equipment. In
Jog mode, it is corresponding to the “Continuous Output Mode,” and in
Hand wheel mode, it is corresponding to the “Fixed Pulse Output Mode.”
These functions are progressed without CPU involved on host PC. When
the input signal is enabled during fixed pulse drive, the pulse specified
will be output. When continuous output drive is enabled, the drive pulse
will be continually output at the period of signal Low. This signal should
be used in combination with external power DC12 ~ 24V. The response
time of circuitry should take about 10 msec because of the delay of photo
coupled and RC filter.
+5V
MCX314
VEX(12~24V)
10K
nEXPP
74HC14
3.3K
100K
0.01µ
nEXOP+
TLP121 or eq.
+5V
Control
Logic
10K
nEXPM
3.3K
100K
0.01µ
nEXOP-
Figure 3.14: Circuit Diagram of the External Drive Operation Signals
Figure 3.15: Example of Connecting to Jog
27
Chapter 3
3.10 Emergency Stop Input (EMG)
When emergency stop input signal is enabled, the output of the drive
pulse for all axes will be stopped, and error bit of main status register will
be set to 1. The operation of emergency stop input is positive or negative
triggered can be determined by JP9 on the board.
Figure 3.16: Circuit Diagram of Emergency Stop Input Signal
This signal should be used in combination with external power
DC12 ~ 24V. The response time of circuitry should take about 0.25 msec
because of the delay of photo coupled and RC filter.
Table 3.5: Jumper Settings of JP9
Jumper
JP9
Emergency stop function enabled when emerPin 1 and Pin 2 short
gency stop signal (EMG) and external GND short (Default)
Emergency stop function enabled when emerPin 2 and Pin 3 short
gency stop signal (EMG) and external GND open
Note
Please check if EMG and GND are short or not
when the card could not work properly.
3.11 External Power Input (VEX)
External power is necessary for all input signals of each axis. Please
apply DC12~24V voltage as your need. Current consumption of each
point for input signal is DC12V = 3.3 mA, DC24V = 7 mA.
PCI-1240/PCI-1240U User Manual
28
3.12 Interrupt Setting
When the interrupt occurs from MCX314/MCX314AS, the interrupt signal of MCX314/MCX314AS will be changed from high to low. Because
the PCI bus interrupt is high level sensitive, the PCI-1240/PCI-1240U
inverse the signal and latch the signal to adapt the PCI bus INTA. The
Fig- 3.17 shows the interrupt structure of the PCI-1240/PCI-1240U. We
suggest users who want to program their own interrupt service routine
(ISR) should follow the procedures:
Step 1: When interrupt occurs. (Hardware)
Step 2: Program will jump to ISR. (Software)
Step 3: In ISR program the first thing have to do is clear interrupt for preventing hanging up the PCI bus.
Step 4: In ISR program the last thing have to do is read nRR3 of
MCX314/MCX314AS for accepting next interrupt occurs.
Figure 3.17: Circuit diagram of interrupt setting
29
Chapter 3
3.13 Connection Examples for Motor Drivers
3.13.1 Connection to Step Motor Drivers
The following figure is an example of PCI-1240/PCI-1240U connected to
5-phase micro-step motor drives, KR515M manufactured by TECHNO
company.
Figure 3.18: Example of Connecting to KR515M Drive
Note
JP1~8 of PCI-1240/PCI-1240U are set to +5V
output side, +5V output for output terminals
XP+P and XP-P. Setting JP1~8 as single-ended
output will output +5V of PCI-1240/PCI-1240U to
external devices, this will induce noise back to
PCI-1240/PCI-1240U. So, be careful when connection.
Connect XOUT4 to H. O. (Hold off) can control
the drive to hold.
Connect XOUT5 to D.S. can control the resolution of micro-step drive. Which will be controlled
by setting D8, D9 of WR3 in MCX314/
MCX314AS. And, read the RR4,5 to know the
status of XIN0P/N.
PCI-1240/PCI-1240U User Manual
30
The following figure is an example of PCI-1240/PCI-1240U connected to
UPK step drive manufactured by ORIENTAL company.
Figure 3.19: Example of Connecting to UPK Step Drive
Note
The differential pulse output of PCI-1240/PCI1240U is connected to CW/CCW input of UPK
drive. XOUT4 can control UPK drive to hold by
setting D8 of WR3. TIMING and Over HEAT signals can be read back by reading RR4,5.
It is better to use a twisted pair cable for long
connections.
31
Chapter 3
3.13.2 Connection to Servo Motor Drivers
The figure shown below is an example of PCI-1240/PCI-1240U connected to MINAS X series AC servo motor drive.
Figure 3.20: Example of MINAS X series AC servo Motor Drive
Note
The servo drive must be set in pulse-control drive
mode and the type of pulse input is CW/CCW
mode. This connection is not well for pulse/
direction mode because the timing is not match.
PCI-1240/PCI-1240U User Manual
32
It is optional to connect encoder A/B phase
feedback signal. If connect to encoder signal,
user can read the real position from PCI-1240/
PCI-1240U.
If the environment has high noise or the
connection is long, we recommend you to use
twist pair cable for servo drives.
3.14 Field Wiring Considerations
When you use the PCI-1240/PCI-1240U to acquire data from outside,
noises in the environment might significantly affect the accuracy of your
measurements if due cautions are not taken. The following measures will
be
helpful to reduce possible interference running signal wires between signal sources and the PCI-1240/PCI-1240U.
• The signal cables must be kept away from strong electromagnetic
sources such as power lines, large electric motors, circuit breakers or
welding machines, since they may cause strong electromagnetic interference. Keep the analog signal cables away from any video monitor,
since it can significantly affect a data acquisition system.
• If the cable travels through an area with significant electromagnetic
interference, you should adopt individually shielded, twisted-pair wires
as the analog input cable. This type of cable has its signal wires twisted
together and shielded with a metal mesh. The metal mesh should only
be connected to one point at the signal source ground.
• Avoid running the signal cables through any conduit that might have
power lines in it.
• If you have to place your signal cable parallel to a power line that has a
high voltage or high current running through it, try to keep a safe distance between them. Or you should place the signal cable at a right
angle to the power line to minimize the undesirable effect.
• The signals transmitted on the cable will be directly affected by the
quality of the cable. In order to ensure better signal quality, we recommend that you use the PCL-10251 shielded cable.
33
Chapter 3
3.15 I/O Signal Timing
3.15.1 Power On RESET
Figure 3.21: Timing Diagram of Power On RESET
• Output pulses (nP ± P, nP ± N) for drive control and general purpose
output signals (nOUT4 ~ 7) for I/O control will be determined after 250
nsec from power on reset.
• User can access PCI-1240/PCI-1240U only after 500 nsec from poweron reset.
3.15.2 Individual Axis Driving
Figure 3.22: Timing diagram of Individual Axis Driving
• The maximum time to output command pulse after first pulse command
is about 650nsec.
• When pulse/direction mode, the direction signal will valid after 275
nsec and pulse output will vaild after 375 nsec after direction signal.
PCI-1240/PCI-1240U User Manual
34
3.15.3 Interpolation Driving
Figure 3.23: Timing diagram of Interpolation Driving
• After interpolation command is enable, the first pulse will be outputted
in 775 nsec.
• If using pulse/direction mode, direction signal (nP-P) is valid in ± 125
nsec of high-level pulse signal.
3.15.4 Input Pulse Timing
Quadrature Pulse of Encoder Input
Figure 3.24: Timing diagram of Quadrature Pulse of Encoder Input
• The minimum difference time between A/B phases is 200 nsec.
UP/DOWN Pulse Input
Figure 3.25: Timing diagram of UP/DOWN Pulse Input
• Minimum UP/DOWN pulse width: 130 nsec.
• Minimum Increased/Decreased Pulse Interval: 130 nsec .
• Minimum UP/DOWN pulse period: 260 nsec.
35
Chapter 3
3.15.5 Instantaneous Stop Timing
External Instantaneous Stop Signal
Figure 3.26: Timing diagram of External Instantaneous Stop Signal
• When external stop signal is enabled during driving, up to 400 µ SEC +
1 pulse will be output, and then stopped.
Instantaneous Stop Instruction
Figure 3.27: Timing diagram of Instantaneous Stop Instruction
• When the Stop instruction is issued during driving, at most one pulse
will be output, and then stopped.
3.15.6 Deceleration Stop Timing
External Deceleration/Stop Signal
Figure 3.28: Timing diagram of External Deceleration/Stop Signal
• When external deceleration signal is enabled during driving, up to 400
µ SEC + 2 pulses will be output, and then stopped.
Deceleration/Stop Instruction
Figure 3.29: Timing diagram of Deceleration/Stop Instruction
• When the Deceleration/Stop instruction is issued during driving, at
most two pulses will be output, and then stopped.
PCI-1240/PCI-1240U User Manual
36
3.16 TTL Level Position Compare Output
(PCI-1240U only)
This is a special design for the customers who can use the position compare output to synchronize with other vision devices. For PCI-1240, the
position compare output channels are nOUT4 and nOUT5, and it is opencollector type output. In which the nOUT4 and nOUT5 represent the
different direction of position compare separately. For PCI-1240U, we
provide an integrated option for the position compare output. By selecting
with JP10, you can choose the XOUT4 pin as original design as PCI1240, or TTL level output. While the JP10 is in “CMP” position, the
output of XOUT4 is (XOUT4 XOUT5). With this special design you can
get the compared result in both increment and decrement direction
through one unified pin.
Table 3.6: Jumper Settings of JP10
Jumper
JP10
The XOUT4 is defined as the pulse out- XOUT4, Pin 1 and Pin 2
put channel for the incremental position short (Default)
compare mechanism. And it’s open-collector type output.
It’s a design only for PCI-1240U. The
position compare signal for both
directions will output from XOUT4, and
the output level of XOUT4 is TTL level.
37
CMP, Pin 2 and Pin 3 short
Chapter 3
PCI-1240/PCI-1240U User Manual
38
APPENDIX
A
2
Specifications
Appendix A Specifications
A.1 Axes
Axes
4
2/3-Axis Linear Interpolation
Range
For each axis:
PCI-1240:
(-8,388,608 ~ +8,388,607)
PCI-1240U:
(-2,147,483,648 ~ +2,147,483,648)
Speed
1 PPS ~ 4 MPPS
Precision
± 0.5 LSB
Range
PCI-1240:
(-8,388,608 ~ +8,388,607)
PCI-1240U:
(-2,147,483,648 ~ +2,147,483,648)
Speed
1 PPS ~ 4 MPPS
Precision
± 1 LSB
Speed
1 PPS ~ 2 MPPS
Output Signal
nP+P/N, nP-P/N
Range
1 PPS ~ 4 MPPS
Precision
± 0.1%
2-Axis Circular
Interpolation
Continous
Interpolation
Change of Acceler- 954 ~ 31.25 x 109
ation for S Curve
PPS/sec²
Acceleration/
Deceleration
125 ~ 500 x 106 PPS/sec
Initial Velocity
1 PPS ~ 4 MPPS
Drive Speed
1 PPS ~ 4 MPPS (Can be changed
during driving)
Number of Output
Pulses
Fixed pulse driving
PCI-1240: 0 ~ 268,435,455
PCI-1240U: 0 ~ 4,294,067,295
Pulse Output Type
Pulse/Direction (1-pulse, 1-direction
type) or Up/Down (2-pulse type)
Output Signal
Modes
Differential line driving output / Singleended output
Speed Curve
T/S curve acceleration/deceleration
PCI-1240/PCI-1240U User Manual
40
A.2 Digital Input/Output
Input Signals
Over Traveling Limit
Switch Input*
nLMT+ and nLMT-
External
Deceleration/
Instantaneous
Stop Signal
nIN1 ~ 3
Input Signal for
Servo Motor
Drives*
nALARM (servo alarm); nINPOS (position
command completed)
Emergency
Stop
EMG - one emergency stop input
Max. Input Fre- 4 kHz
quency
Input Voltage
Low
3 V DC max.
High
10 V DC min.
50 V DC max.
Input Current
General Purpose Output
Signals
Note
10 V DC
1.70 mA (typical)
12 V DC
2.10 mA (typical)
24 V DC
4.40 mA (typical)
48 V DC
9.00 mA (typical)
50 V DC
9.40 mA (typical)
Protection
2,500 V DC photo coupler isolation and
RC filtering
Output Signal
nOUT4 ~ 7
Output Voltage
Open Collector 5 ~ 40 V DC
Sink Current
200 mA max./channel
Protection
2,500 V DC photo coupler isolation
*: “n” represents the axis (X, Y, Z or U) that is
concerned
41
Appendix A
A.3 Input Pulse for Encoder Interface
Input Signal*
nECAP/N, nECBP/N, nIN0P/N
Encoder Pulse Input
Type
Quadrature (A/B phase) or Up/Down x1, x2, x4
(A/B phase only)
Counts per Encoder
Cycle
x1, x2, x4 (A/B phase only)
Max. Input Frequency
1 MHz
Input Voltage
Low
2 V DC max.
High
Min.:
PCI-1240: 10 V DC
PCI-1240U: 5 V DC
Max. 30 V DC
Protection
2,500 V DC Isolation Protection
A.4 External Signals Driving
Input Signal
nEXOP+, nEXPO-
Max. Input Frequency
100 Hz
Input Voltage
Low
3 V DC max.
High
10 V DC min.
30 V DC max.
Driving Mode
Fixed pulse driving or continuos driving. Supports Hand
wheel and Jog.
Protection
2,500 V DC photo coupler isolation
PCI-1240/PCI-1240U User Manual
42
A.5 Other Functions
Position
Counter
Comparison
Register
Range of Command
Position Counter (for
output pulse)
-2,147,438,648 ~
+2,147,438,647
Range of Actual Position Counter (for input
pulse)
-2,147,438,648 ~
+2,147,438,647
COMP+ Register Range -2,147,438,648 ~
+2,147,438,647
COMP- Register Range
-2,147,438,648 ~
+2,147,438,647
Can be used for software over traveling limit
Interrupt Functions (Excluding
Interpolation)
Interrupt Condition (All
conditions could be
enabled/disabled individually)
Position Counter => COMPPosition Counter < COMPPosition Counter < COMP+
Position Counter => COMP+
Constant speed begins or ends
during acceleration/deceleration driving pulse finishing
BoardID
4-bit DIP switch, ID: 0~15
A.6 General
I/O Connector Type
100-pin SCSI-II female
Dimensions
175 x 100 mm (6.9” x 3.9”)
Power Consumption
Typical.
+5 V @ 850 mA
+12 V @ 600 mA
Max.
+5 V @ 1 A
+12 V @ 700 mA
External Power
Voltage
DC +12 ~ 24 V
Temperature
Operating
0 ~ 60° C (32 ~ 140° F)
(refer to IEC 68-2-1,2)
Storage
-20 ~ 85° C (-4 ~ 185° F)
Relative Humidity
5~95% RH non-condensing (refer to IEC 68-2-3)
Certifications
CE certified
43
Appendix A
PCI-1240/PCI-1240U User Manual
44
APPENDIX
B
2
Block Diagram
Appendix B Block Diagram
PCI9052
RESET#
LA4
C50
Oscillator
16 MHz
Address
Decoder
CLK
RESETN
CSN
XP+P/N
XP-P/N
Output Buffer ULN2803A
Line driver 26LS31
Photo coupler & RC filter
XP+P/N
XP-P/N
Pulse output
+Dir. Jog
-Dir. Jog
Encoder signal output
XOUT7~4
General output
VEX
External power (DC12~24V)
+Limit input
XLMT+
-Limit input
XLMTXIN3~1 Deceleration input
XINPOS Servo motor signal
XALARM Servo alarm
XECAP/N
XECBP/N
XINPO/N
XEXOP+
XEXOP-
EMG Emergency stop
U Axis Interface (Identical to the Input/Output interface of X-AXIS)
Z Axis Interface (Identical to the Input/Output interface of X-AXIS)
Y Axis Interface (Identical to the Input/Output interface of X-AXIS)
Photo coupler & RC filter
High-speed photo coupler
Photo coupler & RC filter
XOUT7~4
XLMTP
XLMTM
XIN3~1
XINPOS
XALARM
XECA
XECB
XINPO
EMGN
XEXOP+
XEXOP-
MCX314
A2~0
INTN
D15~0
WRN
LINTI1
LD15~0
WR#
LA3~0
+5V
RDN
D
CLK<
RD#
Q
AR
CLR_INT
46
PCI-1240/PCI-1240U User Manual
C
APPENDIX
2
Register Structure and
Format
Appendix C Register Structure and
Format
C.1 Overview
The PCI-1240/PCI-1240U is delivered with an easy-to-use 32-bit DLL
driver for user programming under Windows operating system. We
advise users to
program the PCI-1240/PCI-1240U using 32-bit DLL driver provided by
Advantech to avoid the complexity of low-level programming by register.
The most important consideration in programming the PCI-1240/PCI1240U at the register level is to understand the function of the card’s registers. The information in the following sections is provided for users who
would like to do their own register-level programming.
C.2 I/O Port Address Map
The PCI-1240/PCI-1240U requires 20 consecutive addresses in the PC’s
I/O space. The address of each register is specified as an offset from the
card’s base address. For example, BASE+0 is the card’s base address and
BASE+8 is the base address plus eight bytes. The following sections give
the detailed information about register layout, and also the detailed information about each register or driver and its address relative to the card’s
base address.
Table C-1 and C-2 show the function and format of each WRITE register
or driver and its address relative to the card’s base address; Table C-3 and
C-4 show the function and format of each READ register or driver and its
address relative to the card’s base address
Note
All base address is in hexadecimal in Appendix C.
Users have to use a 16-bit (word) I/O command to
read/write each
PCI-1240/PCI-1240U User Manual
48
Table C.1: PCI-1240/PCI-1240U WRITE register function
Write
Address
(Hex.)
Symbol
0
WR0
2
4
6
8
Register Name
Command Register
XWR1 X Axis Mode Register 1
Enable/disable deceleration and set
YWR1 Y Axis Mode Register 1
deceleration level.
ZWR1 Z Axis Mode Register 1
Enable/disable interrupt for each axis.
UWR2 U Axis Mode Register 1
XWR2 X Axis Mode Register 2
YWR2 Y Axis Mode Register 2
ZWR2 Z Axis Mode Register 2
UWR2 U Axis Mode Register 2
Set the external limit signal of each axis.
Set the type of output pulse
Set the type of encoder input
Enable/disable the signal from servo drives
BP1P
Setting for the + direction bit data of the
first axis for bit pattern interpolation.
BP1P Register
Settings for manual deceleration,
XWR3 X Axis Mode Register 3
individually decelerating, and S-curve
YWR3 Y Axis Mode Register 3
acceleration/ deceleration mode of each
ZWR3 Z Axis Mode Register 3
axis.Setting for external operation mode.
UWR3 U Axis Mode Register 3
Setting for general output OUT7 ~ 4.
Setting for the - direction bit data of the
first axis for bit pattern interpolation.
BP1M
BP1M Register
WR4
Output Register
Setting for general output OUT3 ~ 0.
BP2P
BP2P Register
Setting for the + direction bit data of th
second axis for bit pattern interpolation.
WR5
Interpolation Mode
Register
Axis assignment. Settings of constant linear
speed, step output mode, and interrupt.
BP2M
BP2M Register
Setting for the - direction bit data of the
second axis for bit pattern interpolation.
WR6
Data Writing Register 1
Setting of the least significant 16-bi
(D15-D0) for data writing.
BP3P
BP3P Register
Setting for the + direction bit data of the
third axis for bit pattern interpolation.
WR7
Data Writing Register 2
Setting of the most significant 16-bit
(D31-D16) for data writing.
BP3M
BP3M Register
Setting for the - direction bit data of the
third axis for bit pattern interpolation.
A
C
E
10
Content
Settings for axis assignment and command
CLRINT Clear Interrupt Register
12
N/A
N/A
14
PGM
Pulse Generator Mode
Register
49
Clearing the interrupt register
Setting for Jog/Hand wheel mode funtion
Chapter C
Table C.2: PCI-1240/PCI-1240U WRITE register format
Base Add. D15 D14 D13 D12 D11 D10 D9
0
D8
D7
D6
D5
D4
U
Z
Y
D1
D0
X
Axis Assignments
Command Code
Mode Register 1: WR1
W
D-END C-STA C-ENDP
C+ P < C+ P < C- P
C- PULSE IN3-E IN3-L IN2-E IN2-L IN1-E IN1-L IN0-E IN0-L
Interrupt Enable/Disable
4
D2
Command Register: WR0
W
RESET
2
D3
Driving Stop Input Signal Enable/Disable
Mode Register 2: WR2
W
INP-E INP-L ALM-EALM-L PIND1 PIND0 PINMD DIR-L PLS-L PLSMDCMPSLHLMT- HLMT+ LMTMD SLMT- SLMT+
6
Mode Register 3: WR3
W
OUT7 OUT6 OUT5 OUT4 OUTSL
8
EXOP1EXOP0 SACC DSNDE MANLD
Output Register: WR4
W
UOUT3UOUT2UOUT1UOUT0 ZOUT3 ZOUT2 ZOUT1 ZOUT0 YOUT3YOUT2YOUT1YOUT0XOUT3XOUT2XOUT1XOUT0
A
C
Interpolation Mode Register: WR5
W
BPINT CINT
CMPLS EXPLS
LSPD1 LSPD0
Interrupt
Step Output
Constant Vector Speed
ax3
ax2
ax1
Data Writing Register 1: WR6
W
WD15 WD14 WD13 WD12 WD11 WD10 WD9
E
AX31 AX30 AX21 AX20 AX11 AX10
WD8
WD7
WD6
WD5
WD4
WD3
WD2
WD1 WD0
Data Writing Register 2: WR7
W
WD31 WD30 WD29 WD28 WD27 WD26 WD25 WD24 WD23 WD22 WD21 WD20 WD19 WD18 WD17 WD16
10
Clear Interrupt Register: CLRINT
W
Clear Interrupt Register
14
Pulse Generator Mode Register: PGM
W
PGMU3PGMU2PGMU1PGMU0PGMZ3 PGMZ2 PGMZ1 PGMZ0PGMY3PGMY2PGMY1PGMY0PGMX3PGMX2PGMX1PCMX0
PCI-1240/PCI-1240U User Manual
50
Table C.3: PCI-1240/PCI-1240U READ register function
Read
Address
(Hex.)
Symbol
0
RR0
2
XRR1
YRR1
ZRR1
URR1
X Axis Status Register 1
Y Axis Status Register 1 The result of compare, status of
Z Axis Status Register 1 acceleration, and ending status.
U Axis Status Register 1
4
XRR2
YRR2
ZRR2
URR2
X Axis Status Register 2
Y Axis Status Register 2
Error message
Z Axis Status Register 2
U Axis Status Register 2
6
XRR3
YRR3
ZRR3
URR3
X Axis Status Register 3
Y Axis Status Register 3
Interrupt message
Z Axis Status Register 3
U Axis Status Register 3
8
RR4
Input Register 1
I/O input for X- and Y-axis
A
RR5
Input Register 2
I/O input for Z- and U-axis
C
RR6
Data Reading Register 1 Low word of Data Register (D15 ~ D0)
E
RR7
Data Reading Register 2 High word of Data Register (D31 ~ D16)
10
Register Name
Main status register
INTSTA Interrupt Status Register
12
BDID
14
PGSTA
Content
Limit switch status, driving status, ready
for interpolation, quadrant for circle
interpolation, and the stack of BP
The Status of Interrupt Register
Board ID Register
The card's Board ID
Pulse Generator Status
Register
Jog/Hand wheel mode function status
51
Chapter C
Table C.4: PCI-1240/PCI-1240U READ register format
Base Add.
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Main Status Register: RR0
R
BPSC1 BPSC0 ZONE2 ZONE1ZONE0CNEXT I-DRV U-ERR Z-ERR Y-ERR X-ERR U-DRV Z-DRV Y-DRV Z-DRV
Error Status of Each Axis
2
Driving Status of Each Axis
Status Register 1: RR1
R
EMG ALARM LMT- LMT+
IN3
IN2
IN1
IN0 ADSNDACNSTAASND DSND CNST ASND CMP- CMP+
Stop Status
4
Status Register 2: RR2
R
EMG ALARM HLMT- HLMT+ SLMT- SLMT+
6
Status Register 3: RR3
R
D-END C-STA C-ENDP
8
C+ P < C+ P < C- P
C- PULSE
Input Register 1: RR4
R
Y-ALM Y-INP Y-EX- Y-EX+ Y-IN3 Y-IN2 Y-IN1 Y-IN0 X-ALM X-INP X-EX- X-EX+ X-IN3 X-IN2 X-IN1 X-IN0
A
Input Register 2: RR5
R
U-ALM U-INP U-EX- U-EX+ U-IN3 U-IN2 U-IN1 U-IN0 Z-ALM Z-INP Z-EX- Z-EX+ Z-IN3 Z-IN2 Z-IN1 Z-IN0
C
Data Reading Register 1: RR6
R
RD15 RD14 RD13 RD12 RD11 RD10
E
RD9
RD8
RD7
RD6
RD5
RD4
RD3
RD2
RD1
RD0
Data Reading Register 2: RR7
R
RD31 RD30 RD29 RD28 RD27 RD26 RD25 RD24 RD23 RD22 RD21 RD20 RD19 RD18 RD17 RD16
10
Interrupt Status Register: INTSTA
R
INTF
12
Board ID Register: BDID
R
BDID3 BDID2 BDID1 BDID0
14
R
Pulse Generator Status Register: PGSTA
PGMU3PGMU2PGMU1PGMU0PGMZ3 PGMZ2 PGMZ1 PGMZ0PGMY3PGMY2PGMY1PGMY0PGMX3PGMX2PGMX1PCMX0
PCI-1240/PCI-1240U User Manual
52
C.3 MCX314/MCX314AS WRITE Registers: WR0 ~ WR7
The PCI-1240/PCI-1240U registers from WR0 (Base Add. + 0) to WR7
(Base Add. + E) are the same as mapping registers on MCX314/
MCX314AS chip, and please refer to MCX314/MCX314AS user’s manual Section 4.3 ~ Section 4.9 for detailed information.
C.4 Clear Interrupt Register: CLRINT
Write any value to this address to clear the interrupt register.
Table C.5: Clear Interrupt Register: CLRINT - Write BASE +10
Base Add. D15 D14 D13 D12 D11 D10 D9
10
W
D8
D7
D6
D5
D4
D3
D2
D1
D0
Clear Interrupt Register: CLRINT
Clear Interrupt Register
C.5 Pulse Generator Mode/Status Register: PGM/
PGSTA
The pulse generator function is powerful for users to drive specific axis
by Jog or Hand wheel. There are two operation modes - Jog mode and
Hand wheel mode.
In Jog mode, it is corresponding to the “Continuous Pulse Driving
Mode”, and in Hand wheel mode, it is corresponding to the “Fixed Pulse
Driving Mode”.
Please refer to MCX314/MCX314AS user’s manual Section 2.6.1 for
detailed information.
53
Chapter C
Table C.6: Pulse Generator Mode/Status Register: PGM/PGMSTA Write/Read BASE +14
Base Add. D15 D14 D13 D12 D11 D10 D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Pulse Generator Mode Register: PGM
W
PGMU3 PGMU2 PGMU1 PGMU0 PGMZ3 PGMZ2 PGMZ1 PGMZ0 PGMY3 PGMY2 PGMY1 PGMY0 PGMX3 PGMX2 PGMX1 PCMX0
14
Pulse Generator Status Register: PGSTA
R
PGMU3 PGMU2 PGMU1 PGMU0 PGMZ3 PGMZ2 PGMZ1 PGMZ0 PGMY3 PGMY2 PGMY1 PGMY0 PGMX3 PGMX2 PGMX1 PCMX0
D3 ~ 0
X-axis Pules Generator Mode Control
D7 ~ 4
Y-axis Pules Generator Mode Control
D11 ~ 8
Z-axis Pules Generator Mode Control
D15 ~ 12
U-axis Pules Generator Mode Control
Table C.7: Pulse Generator Mode - PGMn3
PGMn3, n=X, Y, Z or U
Meaning
Signal Type
0
Jog mode
Isolated digital input
1
Hand wheel mode
A/B phase pulse input
The following table indicates the external signal routing path. The
external signals generate the pulses to drive the motor are connected to
the pins nEXOP+ and nEXOP- (Please refer to the pin assignment).
PCI-1240/PCI-1240U User Manual
54
Table C.8: Pulse Generator Signal Connection Mode
PGMn2
PGMn1
PGMn0
Meaning
0
0
0
Function disabled
0
0
1
Signal from pins nEXOP+/- for driving n-axis
0
1
0
Software programmable mode - Signal from
pins XEXOP+/- for driving Axis selected by
pins U_IN2 and U_IN1
0
1
1
Software programmable mode - Signal from
pins YEXOP+/- for driving Axis selected by
pins U_IN2 and U_IN1
1
0
0
Signal from pins XEXOP+/- for driving n-axis
1
0
1
Signal from pins YEXOP+/- for driving n-axis
1
1
0
Signal from pins ZEXOP+/- for driving n-axis
1
1
1
Signal from pins UEXOP+/- for driving n-axis
Note: n= X, Y, Z or U
Table C.9: Driving Axis for Software Programmable Mode
U_IN2
U_IN1
Driving Axis
0
0
X-axis
0
1
Y-axis
1
0
Z-axis
1
1
U-axis
C.6 MCX314/MCX314AS READ Registers: RR0 ~ RR7
The PCI-1240/PCI-1240U registers from RR0 (Base Add. + 0) to RR7
(Base Add. + E) are the same as mapping registers on MCX314/
MCX314AS chip, and please refer to MCX314/MCX314AS user’s manual Section 4.10 ~ Section 4.15 for detailed information.
55
Chapter C
C.7 Interrupt Status Register: INTSTA
Table C.10: Interrupt Status Register: INTSTA - Read BASE +10
Base Add.
10
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Interrupt Status Register: INTSTA
R
INTF
D0
Interrupt flag
This bit indicates whether interrupt occurred or not.
1 means that an interrupt has occurred.
C.8 Board ID Register: BDID
BDID shows the Board ID of the PCI-1240/PCI-1240U.
Table C.11: Board ID Register: BDID - Read BASE +12
Base Add.
12
15
14
13
12
11
R
10
9
8
7
6
5
4
3
2
1
0
Board ID Register: BDID
BDID3 BDID2 BDID1 BDID0
PCI-1240/PCI-1240U User Manual
56
D
APPENDIX
2
Cable Pin Assignments
Appendix D Cable Pin Assignments
PCI-1240/PCI-1240U User Manual
58
APPENDIX
2
E
Wiring with Third-Party
Motor Drivers
Appendix E Wiring with Third-Party
Motor Drivers
Figure E.1: Wiring Diagram with Mitsubishi MR-J2S Series Motor Driver
PCI-1240/PCI-1240U User Manual
60
Figure E.2: Wiring Diagram with Oriental LIMO EZMC Series Motor
Driver
61
Chapter E
Figure E.3: Wiring Diagram with Panasonic MINAS-A Series Motor
Driver
PCI-1240/PCI-1240U User Manual
62
Figure E.4: Wiring Diagram with Yaskawa SGDM Series Motor Driver
63
Chapter E
PCI-1240/PCI-1240U User Manual
64
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