REVISION STATUS OF SHEETS A DWN DATE

REVISION STATUS OF SHEETS A DWN DATE
5
4
3
2
REV
1
DESCRIPTION
A
DATE
Initial schematic ready for layout - Alpha Release
APPROVED
03/04/08
RRP
SCHEMATIC CONTENTS
D
C
B
REVISION STATUS OF SHEETS
REV
A
A
A
A
A
A
A
A
A
A
SHEET
41
42
43
44
45
46
47
48
49
50
REV
A
A
A
A
A
A
A
A
A
A
SHEET
31
32
33
34
35
36
37
38
39
40
DWN
R.R.P.
CHK
A
REV
A
A
A
A
A
A
A
A
A
A
SHEET
21
22
23
24
25
26
27
28
29
30
REV
A
A
A
A
A
A
A
A
A
A
T.W.K.
ENGR
R.R.P.
ENGR-MGR
R.R.P.
QA
SHEET
11
12
13
14
15
16
17
18
19
20
REV
A
A
A
A
A
A
A
A
A
A
SHEET
1
2
3
4
5
6
7
8
9
10
C.M.D.
MFG
NEXT ASSY
USED ON
R.R.P.
RLSE
5
APPLICATION
R.R.P.
4
DATE
04/01/2007
DATE
04/01/2007
DATE
04/01/2007
DATE
04/01/2007
DATE
04/01/2007
DATE
04/01/2007
DATE
04/01/2007
SHEET01
SHEET02
SHEET03
SHEET04
SHEET05
SHEET06
SHEET07
SHEET08
SHEET09
SHEET10
-
TITLE
DM360
DM360
DM360
DM360
DM360
DM360
DM360
DM360
DM360
SHEET11
SHEET12
SHEET13
SHEET14
SHEET15
SHEET16
SHEET17
SHEET18
SHEET19
SHEET20
-
DM360 ADC
DM360 MIC/SPEAKER
DM360 POWER PINS
DM360 POWER CONTROL
DM360 GROUND PINS
DM360 DECOUPLING CAPS
DDR2 MEMORY
USB INTERFACE CONNECTOR
JTAG CONNECTORS
CPLD BANK A
SHEET21
SHEET22
SHEET23
SHEET24
SHEET25
SHEET26
SHEET27
SHEET28
SHEET29
SHEET30
-
CPLD BANK B
CPLD BANK C
CPLD BANK D
CLPD POWER
HOST/EMIF DC INTERFACE
NAND FLASH
ONE NAND
I2C/SPI EEPROM
RS232 INTERFACE
SD/MMC/MS IF
SHEET31
SHEET32
SHEET33
SHEET34
SHEET35
SHEET36
SHEET37
SHEET38
SHEET39
-
SD.MMC IF 2
VIDEO COMPONENT OUT
VIDEO INPUT MULTIPLEXER
VIDEO INPUT DC CONNECTORS
TVP7002
HD VIDEO IN CONNECTORS
TVP5146 DECODER
McBSP MUX
AIC3101
SHEET40 SHEET41 SHEET42 SHEET43 SHEET44 SHEET45 SHEET46 SHEET47SHEET48 SHEET49 SHEET50 -
DDR2 INTERFACE
EMIF/BOOT MODES/CFG MODES
USB
VIDEO PORT IN
VIDEO PORT OUT
ANALOG VIDEO OUT
SD/MMC/MS IF
I/O
JTAG,CLKS,RESET
D
C
B
VIDEO OUTPUT DC CONNECTOR
DILC HOST CONNECTOR
ETHERNET MUX
ETHERNET PHY
MSP IR CONTROLLER
SWITCHES
LEDS
POWER SUPPLY TPS65510
POWER SUPPLY TPS65530
POWER SUPPLY
POWER IN
SPECTRUM DIGITAL INCORPORATED
Title:
Page Contents:
TITLE SHEET
Size:B
DWG NO
Date:
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
1
of
50
5
4
3
2
1
T_DDR_A9
T_DDR_A4
T_DDR_A13
T_DDR_A7
4
3
2
1
DDR_A9
DDR_A4
DDR_A13
DDR_A7
5
6
7
8
RN9
DDR_A9
DDR_A4
DDR_A13
DDR_A7
17
17
17
17
DDR_A12
DDR_A11
DDR_A8
DDR_A10
DDR_A6
DDR_A5
DDR_A2
DDR_A1
17
17
17
17
17
17
17
17
DDR_A0
DDR_WE
DDR_BA2
DDR_CAS
DDR_A3
DDR_RAS
DDR_CS
DDR_BA1
17
17
17
17
17
17
17
17
RPACK4-33
U18-4
D
D
DDR_DQ15
17 DDR_DQ15
17 DDR_DQ14
17 DDR_DQ13
17 DDR_DQ12
17 DDR_DQ11
17 DDR_DQ10
17 DDR_DQ9
17 DDR_DQ8
17 DDR_DQ7
17 DDR_DQ6
17 DDR_DQ5
17 DDR_DQ4
C
17 DDR_DQ3
17 DDR_DQ2
17 DDR_DQ1
17 DDR_DQ0
17 DDR_DQM1
17 DDR_DQM0
U16
W17
T15
W16
V15
U15
T14
W15
T_DDR_A9
T_DDR_A8
T_DDR_A7
T_DDR_A6
T_DDR_A5
T_DDR_A4
T_DDR_A3
T_DDR_A2
DDR_A1
DDR_A0
V14
U14
T_DDR_A1
T_DDR_A0
DDR_DQ5
DDR_BA2
DDR_BA1
DDR_BA0
DDR_CS
V13
T13
W14
T12
T_DDR_BA2
T_DDR_BA1
T_DDR_BA0
T_DDR_CS
DDR_DQ4
DDR_RAS
U12
T_DDR_RAS
DDR_DQ3
DDR_CAS
V12
T_DDR_CAS
T_DDR_BA0
R302
22
DDR_WE
W13
T_DDR_WE
T_DDR_CKE
R299
22
DDR_CKE
R13
T_DDR_CKE
DDR_DQ14
R7
DDR_DQ13
DDR_DQ12
W7
DDR_DQ12
DDR_DQ11
V8
DDR_DQ11
DDR_DQ10
R8
DDR_DQ10
DDR_DQ9
U8
DDR_DQ9
DDR_DQ8
W8
DDR_DQ8
DDR_DQ7
R9
DDR_DQ7
DDR_DQ6
W9
DDR_DQ6
DDR_DQ5
V9
DDR_DQ4
W10
DDR_DQ3
V10
DDR_DQ2
R10
DDR_DQ2
DDR_DQ1
V11
DDR_DQ1
DDR_DQ0
U11
DDR_DQ0
22
R284
22
T_DDR_DQM1
T_DDR_DQM0
T_DDR_DQS1
differential pair
T_DDR_DQSN1
T_DDR_DQS0
T_DDR_DQSN0
17 T_DDR_DQSN0
DDR_A9
DDR_A8
DDR_A7
DDR_A6
DDR_A5
DDR_A4
DDR_A3
DDR_A2
V7
DDR_DQ13
R280
17 T_DDR_DQS0
T_DDR_A13
T_DDR_A12
T_DDR_A11
T_DDR_A10
DDR_DQ14
DDR_DQM0
17 T_DDR_DQSN1
T16
V17
W18
V16
DDR_DQ15
DDR_DQM1
17 T_DDR_DQS1
DDR_A13
DDR_A12
DDR_A11
DDR_A10
V6
W6
DDR_DQM1
T11
DDR_DQM0
DDR_CLKP
W11
T_DDR_CLKP
T7
DDR_DQS1
DDR_CLKN
W12
T_DDR_CLKN
U6
DDR_DQSN1
DDR_PADREFP
R11
VREFSSTL
P11
T10
differential pair
U9
R277
10 T_DDR_STRBEN
DDR_STRBEN_DEL
RN8
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
RPACK8-33
DDR_A12
DDR_A11
DDR_A8
DDR_A10
DDR_A6
DDR_A5
DDR_A2
DDR_A1
T_DDR_A0
T_DDR_WE
T_DDR_BA2
T_DDR_CAS
T_DDR_A3
T_DDR_RAS
T_DDR_CS
T_DDR_BA1
RN7
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
RPACK8-33
DDR_A0
DDR_WE
DDR_BA2
DDR_CAS
DDR_A3
DDR_RAS
DDR_CS
DDR_BA1
C
R82
DDR_CLKP
22
R84
22
DDR_BA0
DDR_BA0 17
DDR_CKE
DDR_CKE 17
DDR_CLKP 17
DDR_CLKN
DDR_CLKN 17
differential pair
DDR_DQS0
DDR_DQSN0
B
DDR_STRBEN
T_DDR_A12
T_DDR_A11
T_DDR_A8
T_DDR_A10
T_DDR_A6
T_DDR_A5
T_DDR_A2
T_DDR_A1
T8
DDR_STRBEN
T9
DDR_STRBEN_DEL
50 OHM 0.5%
R50
B
VREF_STL
dm360_bga_46
VREF_STL
17
C260
0.1uF
DDR_STRBEN is trace to DDR memory
for delay compensation
This net is equal to the DDR_CLKP ( or DDR_CLKN )
plus
the length of DDR_DQXX Average Trace length
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
DM365 DDR INTERFACE
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
2
of
50
5
4
3
2
EM_A13
EM_A12
EM_A11
EM_A10
EM_A9
EM_A8
VCC_3V3
1
EM_A13
EM_A12
EM_A11
EM_A10
EM_A9
EM_A8
R326
10K
C339
U18-5
20,25,27
20,25,27
20,25,27
20,25,27
20,25,27
20,25,27
VCC_3V3
0.1uF
U26
D
R327
25,26,27 EM_WAIT
25,27
25,27
25,27
25,27
EM_D15
EM_D14
EM_D13
EM_D12
25,27 EM_D11
25,27 EM_D10
25,27 EM_D9
25,27 EM_D8
EM_D15
EM_D14
EM_D13
EM_D12
EM_D11
EM_D10
EM_D9
EM_D8
33
RPACK4-33
1
2
3
4
RPACK4-33
1
2
3
4
RPACK4-33
20,25,26,27
20,25,26,27
20,25,26,27
20,25,26,27
C
20,25,26,27
20,25,26,27
20,25,26,27
20,25,26,27
EM_D7
EM_D6
EM_D5
EM_D4
EM_D3
EM_D2
EM_D1
EM_D0
EM_D7
EM_D6
EM_D5
EM_D4
EM_D3
EM_D2
EM_D1
EM_D0
1
2
3
4
RPACK4-33
1
2
3
4
T_EM_WAIT
RN14
8
7
6
5
T_EM_D15
T_EM_D14
T_EM_D13
T_EM_D12
RN20
8
7
6
5
T_EM_D11
T_EM_D10
T_EM_D9
T_EM_D8
RN15
8
7
6
5
T_EM_D7
T_EM_D6
T_EM_D5
T_EM_D4
RN16
8
7
6
5
T_EM_D3
T_EM_D2
T_EM_D1
T_EM_D0
16
J18
EM_WAIT/GIO52/HRDYN
P18
P16
P19
P15
EM_D15/GIO64/HD15
EM_D14/GIO63/HD14
EM_D13/GIO62/HD13
EM_D12/GIO61/HD12
N16
N18
N19
N15
EM_A13/GIO78
EM_A12/GIO77
EM_A11/GIO76
EM_A10/GIO75
EM_D11/GIO60/HD11
EM_D10/GIO59/HD10
EM_D9/GIO58/HD9
EM_D8/GIO57/HD8
L16
L18
L19
L15
EM_A9/GIO74
EM_A8/GIO73
EM_A7/GIO72/KEYA3
EM_A6/GIO71/KEYA2
EM_D7/HD7
EM_D6/HD6
EM_D5//HD5
EM_D4/HD4
K15
K19
K16
K18
EM_A5/GIO70/KEYA1
EM_A4/GIO69/KEYA0
EM_A3/GIO68/KEYB3
EM_A2/HCNTLA
EM_D3/HD3
EM_D2/HD2
EM_D1/HD1
EM_D0/HD0
EM_A1/HHWIL
EM_A0/GIO67/KEYB2/HCNTLB
EM_BA1/GIO66/KEYB1/HINTN
EM_BA0/EM_A14/GIO65/KEYB0
RPACK4-33
5
6
7
8
RN12
4
3
2
1
V18
U18
V19
U19
T_EM_A13
T_EM_A12
T_EM_A11
T_EM_A10
T18
T19
T17
R18
RPACK4-33
T_EM_A9
5
T_EM_A8
6
T_EM_A7
7
T_EM_A6
8
RN18
4
3
2
1
R16
R19
R15
M18
RPACK4-33
T_EM_A5
5
T_EM_A4
6
T_EM_A3
7
T_EM_A2
8
RN19
4
3
2
1
M19
L17
R17
P17
EM_CLK/GIO50
M15
EM_ADV/GIO51/HRWN
M16
EM_WE/GIO54/HDS2N
J15
EM_OE/GIO53/HDS1N
J19
EM_CE1/GIO55/HASN
J17
EM_CE0/GIO56/HCSN
M17
RPACK4-33
T_EM_A1
5
T_EM_A0
6
T_EM_BA1
7
T_EM_BA0
8
RN13
4
3
2
1
D
VCC
4
1A
7
2A
9
3A
12
4A
8
GND
1B1
1B2
2B1
2B2
3B1
3B2
4B1
4B2
2
3
5
6
11
10
14
13
EM_A7
S
OE
1
15
KEYPAD_EMIF
EMIF_SEL
EM_A7
KEY_A3
EM_A6
KEY_A2
EM_A5
KEY_A1
EM_A4
KEY_A0
EM_A6
EM_A5
EM_A4
25,27
45
25,27
45
25,27
45
25,27
45
SN74CBTLV3257PW
C340
VCC_3V3
0.1uF
U25
EM_A2
EM_A1
EM_A2
16
20,25,26,27
EM_A1
20,25,26,27
VCC
4
1A
7
2A
9
3A
12
4A
8
GND
1B1
1B2
2B1
2B2
3B1
3B2
4B1
4B2
2
3
5
6
11
10
14
13
S
OE
1
15
EM_A3
EM_A3
KEY_B3
EM_A0
KEY_B2
EM_BA1
KEY_B1
EM_BA0
KEY_B0
EM_A0
EM_BA1
EM_BA0
25,27
45
25,27
45
25,27
45
25,27
45
C
KEYPAD_EMIF
SN74CBTLV3257PW
20,25 EMIF_SEL
23 EMIF_KEYPAD
EMIF_SEL
VCC_3V3
dm360_bga_46
R117
10K
B
RPACK4-33
8
7
6
5
T_EM_CLK
T_EM_ADV
T_EM_WE
T_EM_OE
RN21
1
2
3
4
R115
10K
EM_CLK
EM_ADV
EM_WE
EM_OE
B
EM_CLK
EM_ADV
EM_WE
EM_OE
25,27
25,27
20,25,26,27
20,25,26,27
VCC_3V3
R131
10K
R363
20K
R362
20K
R361
20K
R360
20K
R359
20K
R358
20K
T_EM_CE1
R330
33
T_EM_CE0
R332
33
R130
10K
EM_CE1
EM_CE0
EM_CE1
20,25
EM_CE0
20,25
VCC_3.3V
A
SPECTRUM DIGITAL INCORPORATED
SW4
EM_A13
EM_A12
EM_A11
EM_A10
EM_A9
EM_A8
1
2
3
4
5
6
12
11
10
9
8
7
BOOT_M2
BOOT_M1
BOOT_M0
CFG_M2
CFG_M1
CFG_M0
R351
R350
R349
R348
R347
R346
2.2K
2.2K
2.2K
2.2K
2.2K
2.2K
Title:
SW DIP-6/SM
INTERNAL PULL DOWNS ON BOOT AND CONFIG PINS
Page Contents:
DM365 EMIF/BOOT MODES/CFG MODES
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
3
of
50
5
4
3
2
1
D
D
Differential Pair 90 ohm differential impedance
TP12
VCC_3V3
1
2
C33
0.02
C168
0.01uF
1.0uF
U18-7
E2
NFM21PC474R1C3D
1
3
2
R42
C200
0.01uF
C210
0.001uF
P4
VDDA3P3V_USB
P3
VSSA3P3V_USB
N5
VDDA1P8V_USB
C47
0.1uF
USB_VBUS
N2
USB_VBUS
USB_DM
P1
USB_DM
USB_DM
18
USB_DP
N1
USB_DP
USB_DP
18
USB_ID
M1
USB_ID
18
USB_VBUS 18
VCC_1V8
C34
1.0uF
0.02
TP13
C167
0.01uF
C
1
C209
0.01uF
2
R43
E3
NFM21PC474R1C3D
1
3
2
C199
0.01uF
C51
1uF
P2
C219
C
VSSAUSB_USB
M5
VDDA1P2LDO_USB
M4
VSSA
USB_ID
.22uF
dm360_bga_46
B
B
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
DM365 USB
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
4
of
50
5
4
3
2
1
U18-1
D
33
33
33
33
33
33
33
33
VDIN_Y7
VDIN_Y6
VDIN_Y5
VDIN_Y4
VDIN_Y3
VDIN_Y2
VDIN_Y1
VDIN_Y0
VDI N_Y7
VDI N_Y6
VDI N_Y5
VDI N_Y4
VDI N_Y3
VDI N_Y2
VDI N_Y1
VDI N_Y0
C12
A13
B13
D12
A14
B15
D14
D15
YIN7
YIN6
YIN5
YIN4
YIN3
YIN2
YIN1
YIN0
33
33
33
33
33
33
33
33
VDIN_C7
VDIN_C6
VDIN_C5
VDIN_C4
VDIN_C3
VDIN_C2
VDIN_C1
VDIN_C0
VDIN_C7
VDIN_C6
VDIN_C5
VDIN_C4
VDIN_C3
VDIN_C2
VDIN_C1
VDIN_C0
A15
C15
B16
A16
A17
C16
A18
B17
CIN7
CIN6
CIN5
CIN4
CIN3
CIN2
CIN1
CIN0
33
VDIN_HD
VDIN_HD
C14
CAM_HD
VDIN_VD
VDIN_VD
B14
CAM_VD
33
21 VDIN_WEN
VDIN_WEN
R337
0
E13
CAM_WEN_FIELD
33 VDIN_PCLK
VDIN_PCLK
R291
0
D13
PCLK
D
C
C
dm360_bga_46
B
B
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
DM365 VIDEO IN
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
5
of
50
5
4
3
D
2
1
D
VDOUT_VCLK 40
VDOUT_EXTCLK 20,40
OSC MODE SELECT
VCC_3V3
U18-2
C
VCLK
B18
R136
33
EXTCLK
B19
R318
0
FIELD
VVALID
VSYNC
HSYNC
C18
C19
G18
G15
CPU_FIELD
CPU_LCD_OE
CPU_VSYNC
CPU_ HSYNC
CPU_FIELD
CPU_LCD_OE
CPU_VSYNC
CPU_ HSYNC
COUT7
COUT6
COUT5
COUT4
COUT3
COUT2
COUT1
COUT0
E18
E19
E15
E17
D16
D19
D18
D17
CPU_COUT7
CPU_COUT6
CPU_COUT5
CPU_COUT4
CPU_COUT3
CPU_COUT2
CPU_COUT1
CPU_COUT0
CPU_COUT7
CPU_COUT6
CPU_COUT5
CPU_COUT4
CPU_COUT3
CPU_COUT2
CPU_COUT1
CPU_COUT0
YOUT7
YOUT6
YOUT5
YOUT4
YOUT3
YOUT2
YOUT1
YOUT0
G16
G19
F15
F18
F16
F19
F17
E16
CPU_YOUT7
CPU_YOUT6
CPU_YOUT5
CPU_YOUT4
CPU_YOUT3
CPU_YOUT2
CPU_YOUT1
CPU_YOUT0
CPU_YOUT7
CPU_YOUT6
CPU_YOUT5
CPU_YOUT4
CPU_YOUT3
CPU_YOUT2
CPU_YOUT1
CPU_YOUT0
R341
2.2K
RN22
1
2
3
4
1
2
3
4
5
6
7
8
RN17
1
2
3
4
5
6
7
8
RN23
RPACK4-33
8
7
6
5
16
15
14
13
12
11
10
9
RPACK8-33
16
15
14
13
12
11
10
9
VDOUT_FIELD 20,40
VDOUT_LCD_OE 40
VDOUT_VSYNC 40
VDOUT_HSYNC 40
VDOUT_C7
VDOUT_C6
VDOUT_C5
VDOUT_C4
VDOUT_C3
VDOUT_C2
VDOUT_C1
VDOUT_C0
22,40
22,40
22,40
22,40
22,40
22,40
22,40
22,40
VDOUT_Y7
VDOUT_Y6
VDOUT_Y5
VDOUT_Y4
VDOUT_Y3
VDOUT_Y2
VDOUT_Y1
VDOUT_Y0
40
40
40
40
40
40
40
40
R102
NO-POP
C
RPACK8-33
dm360_bga_46
B
B
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
DM365 VIDEO PORT OUT
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
6
of
50
5
4
3
2
1
D
D
R120
0
TV_OUT
41
U18-3
J16
RCA JACK(YELLOW)
2
C
L31
3
1
4
2.7uH
R125
C102
270pF
2150 1%
C101
270pF
R126
2100 1%
A10
TVOUT
B10
VFB
B11
IDACOUT
A11
IREF
D10
VDDA1P8V_DAC
E11
VSSA1P8V_DAC
E12
VDDA1P2V_DAC
F11
VSSA1P2V_DAC
D11
VREF
C
C11
DAC_3_R/PR 32
COMPY
B12
DAC_1_G/Y 32
COMPPB
A12
DAC_2_B/PB 32
COMPPR
DSP_GND
DSP_GND
DSP_GND
TP43
VCC_1V8
1
R290
2
R95
0.02
2
C314
2.2uF
E9
NFM21PC474R1C3D
1
3
IBIAS
2400 1%
DSP_GND
VDDA1P8V_DAC
C83
10uF
C77
0.01uF
C76
.1uF
L22
VDDA1P2V_DAC
BLM21B050S
DSP_GND
TP44
B
VCC_1V2
1
2
R103
0.02
2
C334
2.2uF
E10
NFM21PC474R1C3D
1
3
B
DSP_GND
C95
0.01uF
C93
.1uF
TP39
TEST POINT
1
VREF
L27
dm360_bga_46
BLM21B050S
C298
0.1uF
DSP_GND
DSP_GND
VCC_3V3
DAC_3V3
L36
INDUCTOR
L37
A
SPECTRUM DIGITAL INCORPORATED
INDUCTOR
A
DM365 Evaluation Module
Title:
Page Contents:
DM365 ANALOG VIDEO OUT
Size:B
DWG NO
DSP_GND
Date:
5
4
3
2
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
7
of
50
5
4
3
2
1
U18-8
30 SD0_CLK
D
30 SD0_CMD
VCC_3V3
C166
U38
31 CONN_SD1_CLK
20 CPU_GPIO43
31 CONN_SD1_CMD
20 CPU_GPIO42
CPU_GPIO43
CPU_GPIO42
SEL_SD1n_GPIO
C
1B1
1B2
2B1
2B2
3B1
3B2
4B1
4B2
1
15
S
OE
SD0_DATA3
SD0_DATA2
SD0_DATA1
SD0_DATA0
R91
33
J16
SD0_CLK
SD0_CMD
R93
33
H15
SD0_CMD
H16
SD0_DATA3
H17
SD0_DATA2
H19
SD0_DATA1
H18
SD0_DATA0
SD0_DATA3
SD0_DATA2
SD0_DATA1
SD0_DATA0
RN11
1
2
3
4
RPACK4-33
8
7
6
5
0.1uF
VCC
2
3
5
6
11
10
14
13
30
30
30
30
SD0_CLK
D
16
1A
4
SD1_CLK
R70
33
T6
GIO43/SD1_CLK/EM_A20
2A
7
SD1_CMD
R62
33
R6
GIO42/SD1_CMD/EM_A19
3A
9
W5
GIO41/SD1_DATA3/EM_A18
4A
12
U5
GIO40/SD1_DATA2/EM_A17
R5
GIO39/SD1_DATA1/EM_A16
V5
GIO38/SD1_DATA0/EM_A15
GND
RN5
SD1_DATA3
SD1_DATA2
SD1_DATA1
SD1_DATA0
R228
360
8
1
2
3
4
RPACK4-33
8
7
6
5
SN74CBTLV3257PW
C
dm360_bga_46
VCC_3V3
C201
U40
31 CONN_SD1_DATA3
20 CPU_GPIO41
31 CONN_SD1_DATA2
20 CPU_GPIO40
31 CONN_SD1_DATA1
20 CPU_GPIO39
31 CONN_SD1_DATA0
20 CPU_GPIO38
20 SEL_SD1n_GPIO
CPU_GPIO41
CPU_GPIO40
CPU_GPIO39
CPU_GPIO38
SEL_SD1n_GPIO
B
0.1uF
VCC
2
3
5
6
11
10
14
13
1B1
1B2
2B1
2B2
3B1
3B2
4B1
4B2
1
15
S
OE
16
1A
4
2A
7
3A
9
4A
12
GND
8
B
SN74CBTLV3257PW
R265
2K
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
DM365 SD/MMC/MS INTERFACE
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
8
of
50
5
4
3
2
1
VCC_3V3
D
D
R270
2.2K
R269
2.2K
U18-6
38 McBSP_DX
38 McBSP_CLKX
38 McBSP_FSX
38 McBSP_DR
38 McBSP_CLKR
38 McBSP_FSR
20
GPIO37
McBSP_DX
McBSP_CLKX
McBSP_FSX
McBSP_DR
McBSP_CLKR
McBSP_FSR
GPIO37
RN4
16
15
14
13
12
11
10
9
R275
RPACK8-33
1
2
3
4
5
6
7
8
33
D5
A5
C6
E6
B6
E7
T5
GIO49/MCBSP_DX
GIO48/MCBSP_CLKX
GIO47/MCBSP_FSX
GIO46/MCBSP_DR
GIO45/MCBSP_CLKR
GIO44/MCBSP_FSR
GIO37/SPI4_SDENA[0]
C
RPACK4-33
8
7
6
5
RPACK4-33
GIO33_CPU
8
GIO32_CPU
7
GIO31_CPU
6
GIO30_CPU
5
20 SPI4_SDI_GPIO_MD2
20 SPI4_SCLK
20 SPI4_SDO
20
20
20
20
GIO33_CPU
GIO32_CPU
GIO31_CPU
GIO30_CPU
RPACK4-33
8
7
6
5
40 SPI1_SDENA0
40 SPI1_SCLK
40 SPI1_SDI
40 SPI1_SDO
B
RPACK4-33
8
7
6
5
28 SPI0_SDENA0
28 SPI0_SCLK
28 SPI0_SDI
28 SPI0_SDO
20 GPIO0
GPIO0
R73
RN3
1
2
3
4
RN6
1
2
3
4
RN1
1
2
3
4
RN2
1
2
3
4
33
GIO21/UART1_RTS/I2C_SDA
F3
I2C_DATA 20,28,32,34,35,36,37,39,40,44
GIO20/UART1_CTS/I2C_SCL
F1
I2C_SCLK 20,28,32,34,35,36,37,39,40,44
UART0_TXD
GIO19/UART0_RXD
UART0_RXD
UART0_TXD 29
UART0_RXD 29
GIO17/TX_EN/UART1_RXD
E4
R279
33
E1
R276
33
GIO14/TXD3
GIO13/TXD2
GIO12/TXD1
GIO11/TXD0
D1
D3
C1
B1
4
3
2
1
GIO10/RXD3
GIO9/RXD2/CLKOUT0
GIO8/RXD1/EM_A14
GIO7/RXD0/CLKOUT1
B2
C2
A2
A3
CPU.RXD3
CPU.RXD2
CPU.RXD1
CPU.RXD0
GIO6/RX_CLK/UART1_RXD
B3
CPU.RX_CLK 42
GIO15/COL
D2
CPU.COL
CPU.RX_ER 42
GIO35/SPI4_SDI/SPI4_SDENA[1]
GIO36/SPI4_SCLK/EM_A21
GIO34/SPI4_SDO/SPI4_SDI
V3
W2
U4
T4
GIO33/SPI2_SDENA[0]/USBDRVVBUS
GIO32/SPI2_SCLK
GIO31/SPI2_SDI/SPI2_SDENA[1]
GIO30/SPI2_SDO
U2
V1
T2
U1
GIO29/SPI1_SDENA[0]
GIO28/SPI1_SCLK
GIO27/SPI1_SDI/SPI1_SDENA[1]
GIO26/SPI1_SDO
B5
E2
E3
GIO16/TX_CLK/UART1_TXD
W3
W4
V4
T1
T3
V2
R2
GIO18/UART0_TXD
RN10
CPU.TX_EN 42
5
6
7
8
RPACK4-33
CPU.TXD3
CPU.TXD2
CPU.TXD1
CPU.TXD0
42
42
42
42
42
42
42
42
42
GIO4/RX_ER/R0
A4
GIO3/CRS/CLKOUT2
C5
CPU.CRS
GIO5/RX_DV/R1
B4
CPU.RX_DV 42
GIO2/MDIO/G1
C4
GIO1/MDCLK/G0
D6
GIO25/SPI0_SDENA[0]/PWM1
GIO24/SPI0_SCLK
GIO23/SPI0_SDI/SPI0_SDENA[1]
GIO22/SPI0_SDO
C
CPU.TXCLK 42
42
B
CPU.MDIO 42
CPU.MDC 42
GIO0/B1
dm360_bga_46
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
DM365 I/O
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
9
of
50
5
4
3
VCC_3V3
2
1
TP26
VCC_1V8
D
D
TP23
1
2
E7
NFM21PC474R1C3D
3
1
TEST POINT_0
C227
0.1uF
C225
0.01uF
0.02
R57
C212
2.2uF
2
R258
NO-POP
1
U18-13
21 CPU_RESETn
R262
360
DM360_RESETn
R257
NO-POP
H3
RESET
19 CPU_TCK
F4
TCK
19 CPU_RTCK
F2
RTCK
19 CPU_TDI
F5
TDI
G4
TDO
19 CPU_TMS
G2
TMS
19 CPU_TRSTn
H5
TRST
19 CPU_EMU0
G5
EMU0
19 CPU_EMU1
H4
EMU1
19
CPU_TDO
C
VDDS4
L6
MXI1
L1
C52
1
R271
NO-POP
Y1
24MHz
1
MXO1
K1
VSS_27M
L2
27 pF
TP20
TP21
C53
R272
C
27 pF
0
dm360_bga_46
B
B
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
DM365 JTAG,RESET,CLOCKS
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
10 o f
50
5
4
3
2
1
CCD_PSMON
R89
1K
D
D
R315
1K
VCC_3V3
AGND_DM360
1K
R287
1K
VCC_1V8
U18-10
TP16
AGND_DM360
R80
1K
C
R292
1K
E8
ADC_CH0
B7
ADC_CH1
A7
ADC_CH2
D8
ADC_CH3
D7
ADC_CH4
A6
ADC_CH5
VDDA18V_ADC
2
E5
NFM21PC474R1C3D
3
1
G9
C54
1uF
C198
0.01uF
0.02
R46
C170
1.0uF
L58
VSSA_ADC
VCC_1V8
1
2
R78
C
BLM18AG121SN1D
F8
AGND_DM360
AGND_DM360
VCC_1V2
dm360_bga_46
R87
AGND_DM360
1K
R311
1K
AGND_DM360
TP37
1
R83
1K
TEST POINT
R300
1K
B
AGND_DM360
TP36
1
B
R77
1K
TEST POINT
R283
1K
AGND_DM360
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
DM365 ADC
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
11 o f
50
5
4
3
2
1
D
D
VCC_3V3
VDA_MIC
L43
BLM21B050S
VDA_MIC
C134
0.1uF
AGND_DM360
TP29
1
VCC_3V3
C343
1.0uF
C224
0.01uF
L73
E6
NFM21PC474R1C3D
1
3
2
R183
0.02
C215
0.01uF
MICR_P
C216
0.01uF
U18-9
Right MIC
VDDA3P3V_VC
MICIP
R182
B8
R53
C203
0.01uF
AGND_DM360
2
0.02
C207
0.01uF
C55
0.1uF
E9
VDDA1P8V_VC
F9
VSSA1P8V_VC
AGND_DM360
BLM21B050S
C8
LINEO
C9
VCOM
A8
SPP
B9
SPN
A9
MICR_M
AGND_DM360
10uF
LINEOUT
41
AGND_DM360
R435
dm360_bga_46
1uF
TP35
Test Point_1
C279
R181
2.2K
2
2
E1
NFM21PC474R1C3D
1
3
1
MICIN
0
B
SPK1
8 OHM
R433
0
1
VSSA3P3V_VC
+
D9
TP22
VCC_1V8
B
MIC_MINUS
NO-POP
C132
AGND_DM360
C193
0.01uF
L59
M1
+
1
2
1uF
C60
0.1uF
BLM21B050S
C169
1.0uF
C
C133
R61
E10
VCC_1V8
MIC_PLUS
NO-POP
+
VCC_3V3
2
C
R184
2.2k
AGND_DM360
R434
NO-POP
AGND_DM360
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
DM365 MIC/SPEAKER
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
12 o f
50
5
4
TP15
VCC_1V2
2
VCC_1V3
C31
4.7uF
CPU_VDD
2
1
U18-14
0.02
CPU_VDD
C171
1.0uF
C194
2.2uF
D
J14
M13
L13
M12
K12
J12
H12
M10
K8
J8
H8
G8
H7
M6
G6
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDSHV
VDDSHV
VDDSHV
VDDSHV
VDDSHV
VDDSHV
VDDSHV
VDDSHV
VDDSHV
CPU_VDDSHV
P5
F6
H6
N6
P6
F7
L12
H13
F10
1
TP9
CPU_VDDSHV
1
R45
C164
2.2uF
3
0.02
VCC_3V3
2
R31
C160
1.0uF
C156
2.2uF
C28
4.7uF
D
TP14
VCC_1V8
TP45
1
C
2
CPU_VDDS
R104
C96
4.7uF
0.02
C348
2.2uF
M14
H14
G14
H11
P7
J7
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
VDDA18V(PLL)
3
N4
C44
C197
0.001uF 0.1uF
2
CPU_VDDS
E4
NFM21PC474R1C3D
1
2
VCC_1V8
1
0.02
R44
C40
0.1uF
C333
1.0uF
TP11
2
VPP
0.02
R3
VCC_1V2
1
R41
C188
0.01uF
C189
0.1uF
C
C172
1.0uF
C36
0.01uF
C173
1.0uF
VCC_1V8
TP17
1
R242
0.02
C192
2.2uF
B
VDDRAM
CPU_VDD_DDR
T1
1
R92
C315
2.2uF
2
CPU_VDD_DDR
0.02
TP42
2
R94
C324
2.2uF
VDDS5
R12
P12
N11
P10
P9
N9
VDDS9
VDDS9
VDDS9
VDDS9
VDDS9
VDDS9
C231
1uF
RSV0
A1
1
TP30
TEST POINT
RSV1
R1
1
TP24
TEST POINT
RSV2
R4
1
TP27
TEST POINT
B
C309
1.0uF
VCC_3V3
C87
4.7uF
E5
C206
0.1uF
VCC_1V8
C86
4.7uF
D4
2
R14
P14
L14
K14
F13
F12
CPU_VDDSHV10
1
0.02
C318
1.0uF
VDDSHV10
VDDSHV10
VDDSHV11
VDDSHV11
VDDSHV13
VDDSHV13
dm360_bga_46
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
DM365 POWER
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
13 o f
50
5
4
3
2
1
TP19
1
U18-11
0.02
C204
0.001uF
C190
1.0uF
K7
J6
C211
0.1uF
VDD2
VDD2
1V8_BB_UP
1
2
R241
RTCXI
G1
C221
CPU_1V8_BB_UP
CPU_1V8_BB_UP
10pF
3
C220
VCC_3V3
10pF
D
1V8_BB_UP
K6
VDDS3
VSS_32K
R268
H2
0
R259
NO-POP
C205
0.1uF
C195
0.1uF
R243
10K
5
C191
2.2uF
0.02
H1
32.768KHz
Y2
TP18
D
RTCXO
2
2
R240
1
1V2_BB_UP
R273
0
M3
PWRST
2
1
TP25
PWCTRO1
L5
PWCTRO2
L4
PWCTRO3
L3
PWCTRIO0
J3
PWCTRIO1
J2
PWCTR_IO1
PWCTRIO2
J1
PWCTR_IO2
PWCTRIO3
J5
PWCTR_IO3
PWCTRIO4
J4
PWCTR_IO4
PWCTRIO5
K5
PWCTRIO6
K4
PWRCNTON
M2
1
4
TP28
PWCTR_OUT0 21
U39
3
K2
C
47 TPS65510_XRESET
1
PWCTRO0
SN74LVC1G07
PWCTR_OUT2
PWCTR_OUT1 44,48
PWCTR_OUT3
R198
0
C
PWCTR_IO5
PWCTR_IO6
dm360_bga_46
R244
10K
47 TPS65510_CS
R274
R245
10K
R246
10K
R247
10K
R248
10K
0
B
B
SW2
A
A1
B
B1
CPU_1V8_BB_UP
PUSHBUTTON SW
VCC_3V3
CPU_1V8_BB_UP
U13
C196
0.1uF
A
R250
1
24
23
21
20
19
18
17
16
15
14
PWCTR_OUT2
PWCTR_OUT3
PWCTR_IO1
PWCTR_IO2
PWCTR_IO3
PWCTR_IO4
PWCTR_IO5
PWCTR_IO6
3
4
5
6
7
8
9
10
A1
A2
A3
A4
A5
A6
A7
A8
10K
2
22
DIR
OE
11
12
GND1
GND2
R235
CPU_1V8_BB_UP
VCCA VCCB1
VCCB2
0
B1
B2
B3
B4
B5
B6
B7
B8
C185
0.1uF
C184
0.1uF
3V3_PWCTR_OUT2 21
3V3_PWCTR_OUT3 21
3V3_PWCTR_IO1 21
3V3_PWCTR_IO2 21
3V3_PWCTR_IO3 21
3V3_PWCTR_IO4 21
3V3_PWCTR_IO5 21
3V3_PWCTR_IO6 21
SPECTRUM DIGITAL INCORPORATED
Title:
GND3
Page Contents:
DM365 POWER
Size:B
DWG NO
13
U-74AVC8T245
Date:
5
4
3
A
DM365 Evaluation Module
2
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
14 o f
50
5
4
3
2
1
D
D
U18-12
W19
A19
N14
F14
E14
P13
J13
N12
G12
M11
L11
K11
J11
G11
L10
K10
J10
H10
M9
L9
K9
J9
H9
P8
N8
M8
L8
M7
L7
U18-15
C
C3
C7
C10
C13
C17
NC.C3
NC.C7
NC.C10
NC.C13
NC.C17
G3
G7
G10
G13
G17
NC.G3
NC.G7
NC.G10
NC.G13
NC.G17
K3
K13
K17
NC.K3
NC.K13
NC.K17
N3
N7
N10
N13
N17
NC.N3
NC.N7
NC.N10
NC.N13
NC.N17
U3
U7
U10
U13
U17
NC.U3
NC.U7
NC.U10
NC.U13
NC.U17
VSS
W1
VSS.1
VSS.2
VSS.3
VSS.4
VSS.5
VSS.6
VSS.7
VSS.8
VSS.9
VSS.10
VSS.11
VSS.12
VSS.13
VSS.14
VSS.15
VSS.16
VSS.17
VSS.18
VSS.19
VSS.20
VSS.21
VSS.22
VSS.23
VSS.24
VSS.25
VSS.26
VSS.27
VSS.28
VSS.29
C
dm360_bga_46
B
B
dm360_bga_46
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
DM365 POWER
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
15 o f
50
5
4
3
2
1
CPU_VDD
C305
0.01uF
C302
0.01uF
C304
0.01uF
C296
0.01uF
C229
0.01uF
C252
0.01uF
C228
0.01uF
C253
0.01uF
C237
0.01uF
C289
0.01uF
C292
0.01uF
C262
0.01uF
C288
0.01uF
C295
0.01uF
C232
0.01uF
D
D
CPU_VDD
15
C68
10uF
C80
10uF
C81
10uF
CPU_VDD_DDR
C284
0.01uF
C276
0.01uF
C282
0.01uF
C270
0.01uF
C256
0.01uF
C263
0.01uF
C
C
6
CPU_VDD_DDR
C78
10uF
C79
10uF
CPU_VDDS
B
B
CPU_VDDSHV10
C281
0.01uF
C226
0.01uF
C285
0.01uF
C267
0.01uF
C248
0.01uF
C255
0.01uF
C303
0.01uF
C293
0.01uF
C272
0.01uF
C290
0.01uF
C291
0.01uF
C294
0.01uF
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
DM365 DECOUPLING CAPACITORS
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
16 o f
50
5
4
3
2
1
VCC_1V8
C61
2.2uF
E8
NFM21PC474R1C3D
1
2
3
DDR_VDD
DDR_VDD
C230
4.7uF
C236
0.01uF
C233
0.01uF
C234
0.01uF
C268
0.01uF
C283
0.01uF
C235
0.01uF
C286
0.01uF
C269
0.01uF
C258
0.01uF
D
D
U19
DDR_VDD
C266
0.1uF
C
R293
1K 1%
VREF_STL
2 VREF_STL
C274
0.1uF
R304
1K 1%
R303
B
0
D1
H1
V1
M9
R9
F3
K3
F9
D9
K7
F7
K1
F1
H9
K9
VDD.1
VDD.2
VDD.3
VDD.4
VDD.5
VDDQ.1
VDDQ.2
VDDQ.3
VDDQ.4
VDDQ.5
VDDQ.6
VDDQ.7
VDDQ.8
VDDQ.9
VDDQ.10
M1
VDDL
M2
VREF
V3
V7
N9
RFU1
RFU2
ODT
H2
D2
A1
A2
A8
A9
AA1
AA2
AA8
AA9
N.C.1
N.C.2
N.C.3
N.C.4
N.C.5
N.C.6
N.C.7
N.C.8
N.C.9
N.C.10
M7
VSSDL
E2
G2
J2
L2
D7
E8
G8
H7
J8
L8
U9
M3
H3
D3
T1
VSSQ.1
VSSQ.2
VSSQ.3
VSSQ.4
VSSQ.5
VSSQ.6
VSSQ.7
VSSQ.8
VSSQ.9
VSSQ.10
VSS.1
VSS.2
VSS.3
VSS.4
VSS.5
CS
WE
CAS
RAS
CK
CK
P8
N3
P7
N7
N8
M8
DDR_CS
DDR_WE
DDR_CAS
DDR_RAS
DDR_CLKN
DDR_CLKP
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
NC/A13
BA0
BA1
BA2
R8
R3
R7
T2
T8
T3
T7
U2
U8
U3
R2
U7
V2
V8
P2
P3
P1
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_BA0
DDR_BA1
DDR_BA2
CKE
N2
DDR_CKE
LDM
UDM
J3
E3
DDR_DQM0
DDR_DQM1
LDQS
LDQS
J7
H8
DDR_DQS0
DDR_DQSN0
UDQS
UDQS
E7
D8
DDR_DQS1 R74
DDR_DQSN1R76
DDR_CS
DDR_WE
DDR_CAS
DDR_RAS
DDR_CLKN
DDR_CLKP
2
2
2
2
2
2
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_BA0
DDR_BA1
DDR_BA2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
DDR_CKE
2
C
DDR_DQM0 2
DDR_DQM1 2
R81
R79
33
33
T_DDR_DQS0 2
T_DDR_DQSN0 2
33
33
T_DDR_DQS1 2
T_DDR_DQSN1 2
RPACK4-33
DQ0
DQ1
DQ2
DQ3
K8
K2
L7
L3
T_DDR_DQ0
T_DDR_DQ1
T_DDR_DQ2
T_DDR_DQ3
T_DDR_DQ15
T_DDR_DQ8
T_DDR_DQ10
T_DDR_DQ13
8
7
6
5
RN27
1
2
3
4
DDR_DQ15
DDR_DQ8
DDR_DQ10
DDR_DQ13
DQ4
DQ5
DQ6
DQ7
L1
L9
J1
J9
T_DDR_DQ4
T_DDR_DQ5
T_DDR_DQ6
T_DDR_DQ7
T_DDR_DQ14
T_DDR_DQ9
T_DDR_DQ12
T_DDR_DQ11
RPACK4-33
8
7
6
5
RN28
1
2
3
4
DDR_DQ14
DDR_DQ9
DDR_DQ12
DDR_DQ11
DQ8
DQ9
DQ10
DQ11
F8
F2
G7
G3
T_DDR_DQ8
T_DDR_DQ9
T_DDR_DQ10
T_DDR_DQ11
T_DDR_DQ7
T_DDR_DQ0
T_DDR_DQ2
T_DDR_DQ5
RPACK4-33
8
7
6
5
RN30
1
2
3
4
DDR_DQ7
DDR_DQ0
DDR_DQ2
DDR_DQ5
DQ12
DQ13
DQ14
DQ15
G1
G9
E1
E9
T_DDR_DQ12
T_DDR_DQ13
T_DDR_DQ14
T_DDR_DQ15
RPACK4-33
RN31
T_DDR_DQ6
T_DDR_DQ1
T_DDR_DQ4
T_DDR_DQ3
8
7
6
5
DDR_DQ15 2
DDR_DQ8 2
DDR_DQ10 2
DDR_DQ13 2
DDR_DQ14 2
DDR_DQ9 2
DDR_DQ12 2
DDR_DQ11 2
DDR_DQ6
DDR_DQ1
DDR_DQ4
DDR_DQ3
1
2
3
4
B
DDR_DQ7
DDR_DQ0
DDR_DQ2
DDR_DQ5
2
2
2
2
DDR_DQ6
DDR_DQ1
DDR_DQ4
DDR_DQ3
2
2
2
2
MT47H64M16HR-3:E
SPECTRUM DIGITAL INCORPORATED
Layout for the 92-ball DDR Package but
populate the 84-ball MT47H64M16HR-3:E.
84 Ball memories resisde in the center
section of the 92 Ball Package
A
Title:
Page Contents:
DDR2 MEMORY
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
17 o f
50
5
4
2
1
USB_VBUS
VCC_5V
U4
+C136
10uF
IN1
IN2
1
GND
TPS2065D
OUT1
OUT2
OUT3
8
7
6
D
OCn
D
2
3
EN
C135
NO-POP
L1
USB_VBUS
5
USB_VBUS
4
4
3
VCC_3V3
BLM21PG221SN1
R162
100K
J6
+
DRV_VBUS
R8
1
2
HEADER 2
TP8
R6
NO-POP
23 DRV_VBUS
C5
6.8uF
R188
10K
VCC_3V3
+
C2
100uF
VBUS_OCn2
0
R7
10K
USB_OVER_CURRENT
USB_OVER_CURRENT 23
C
C
J1
USB_DM
USB_DP
4
USB_ID
USB_ID
miniAB
VBUS
DD+
ID
GND
S1
S2
S3
S4
USB_DM
USB_DP
1
2
3
4
5
6
7
8
9
4
4
USB_VBUS_CONN
USB_DM
USB_DP
USB_ID
B
L38
BLM21PG221SN1
DIFFERENTIAL PAIR
90 OHM DIFFERENTIAL
IMPEDANCE
SHORT AND STRAIGHT AS
POSSIBLE,
MINIMUM NUMBER OF VIAS
B
J4
2
4
6
A
1
3
5
SPECTRUM DIGITAL INCORPORATED
HEADER 3X2
Title:
SPARE JUMPERS
Page Contents:
DM365 USB
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
18 o f
50
5
4
3
2
1
D
D
R159
2.2K
VCC_3V3
TI_TRSTn
R165
33
R167
R166
33
33
R170
R169
R168
33
33
33
CPU_TRSTn 10
J2
2
4
6
8
10
12
14
KEY
TI_EMU1
TRST
TMS
GND
TDI
nc
PD
GND
TDO
GND TCKRET
GND
TCK
EMU1
EMU0
TI_TMS
TI_TDI
TI_PWR_DECT
TI_TDO
TI_TCK_RET
TI_TCK
TI_EMU0
1
3
5
7
9
11
13
CPU_TMS 10
CPU_TDI 10
CPU_TDO 10
CPU_RTCK 10
CPU_TCK 10
TSW-107-14-G-D-006
14 PIN TI JTAG INTERFACE
C
C
R148
33
R160
CPU_EMU0 10
33
CPU_EMU1 10
VCC_3V3
SWITCH CONTROLS JTAG TAP:
R149
10K
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
17
19
ARM_TRSTn
ARM_TDI
ARM_TMS
ARM_TCK
ARM_TCKRET
ARM_TDO
ARM_RSTn
ARM_TDI
4
5
6
EMU0
FUNCTION
0
0
ARM MODE
0
1
RESERVED
1
0
RESERVED
1
1
ICE PICK MODE *
* DEFAULT
CASD20TB
ARM_TCK
J5
1
2
3
B_ARM_TCKRET
B
R157
10K
SW1
ARM_TDO
R164
0
ARM_TMS
R177
0
ARM_TRSTn
VCC_3V3
EMU1
R150
2.2K
B
VCC_3V3
R158
2.2K
R171
10k
ARM_RSTn 21
ARM_DEBUG_REQ
ARM_DEBUG_ACK
SAMTEC-TSM-110-DV
20 PIN ARM JTAG INTERFACE
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
JTAG INTERFACE
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
19 o f
50
5
4
3
2
VCC_3V3
U33A
D
TP46
TEST POINT
1
C
TP49
TEST POINT
1
TP50
TEST POINT
1
D3
C2
C3
E3
D2
E4
D1
E5
E2
F3
E1
F4
F2
F5
F1
F6
G2
G3
G1
G4
H2
G5
H1
H3
J1
H4
J2
J4
K1
J3
K2
K5
L1
K4
L2
K3
M1
L5
M2
L4
L3
N1
M4
N2
M3
N3
P2
3,25 EMIF_SEL
3,25 EM_CE0
3,25 EM_CE1
3,25,26,27 EM_A1
3,25,26,27 EM_A2
3,25,27 EM_A8
3,25,27 EM_A9
3,25,27 EM_A10
3,25,27 EM_A11
3,25,27 EM_A12
3,25,27 EM_A13
3,25,26,27 EM_OE
3,25,26,27 EM_D7
3,25,26,27 EM_D6
3,25,26,27 EM_D5
3,25,26,27 EM_D4
3,25,26,27 EM_D3
3,25,26,27 EM_D2
3,25,26,27 EM_D1
3,25,26,27 EM_D0
26 NAND_CE0n
26 NAND_CE1n
27 ONENAND_CE
9 SPI4_SCLK
9 SPI4_SDI_GPIO_MD2
9 SPI4_SDO
8 SEL_SD1n_GPIO
9
GPIO0
9
GPIO37
9 GIO33_CPU
9 GIO32_CPU
9 GIO31_CPU
9 GIO30_CPU
8 CPU_GPIO38
8 CPU_GPIO39
8 CPU_GPIO40
8 CPU_GPIO41
8 CPU_GPIO42
8 CPU_GPIO43
6,40 VDOUT_FIELD
6,40 VDOUT_EXTCLK
EM_D7
EM_D6
EM_D5
EM_D4
EM_D3
EM_D2
EM_D1
EM_D0
0
0
0
R425
R426
R424
GPIO0
GPIO37
GIO33_CPU
GIO32_CPU
GIO31_CPU
GIO30_CPU
CPU_GPIO38
CPU_GPIO39
CPU_GPIO40
CPU_GPIO41
CPU_GPIO42
CPU_GPIO43
9,28,32,34,35,36,37,39,40,44 I2C_DATA
9,28,32,34,35,36,37,39,40,44 I2C_SCLK
1
VCC_3V3
B1.IO_1
B1.IO_2
B1.IO_5
B1.IO_6
B1.IO_7
B1.IO_8
B1.IO_9
B1.IO_10
B1.IO_11
B1.IO_18
B1.IO_19
B1.IO_20
B1.IO_21
B1.IO_22
B1.IO_23
B1.IO_24
B1.IO_25
B1.IO_26
B1.IO_27
B1.IO_28
B1.IO_29
B1.IO_30
B1.IO_31
B1.IO_32
B1.IO_33
B1.IO_34
B1.IO_35
B1.IO_36
B1.IO_37
B1.IO_40
B1.IO_41
B1.IO_42
B1.IO_43
B1.IO_44
B1.IO_47
B1.IO_48
B1.IO_49
B1.IO_50
B1.IO_51
B1.IO_52
B1.IO_54
B1.IO_57
B1.IO_58
B1.IO_59
B1.IO_60
B1.IO_62
B1.IO_65
VCCIO.B1.1
VCCIO.B1.2
VCCIO.B1.3
VCCIO.B1.4
C1
H6
J6
P1
C407
0.1uF
C382
0.1uF
C383
0.1uF
C403
0.1uF
D
C
B1.TMS
B1.TDI
B1.TCK
B1.TDO
B
ISR_TMS
ISR_TDI
ISR_TCK
ISR_TDO
N4
L6
P3
M5
ISR_TMS
ISR_TCK
ISR_TDO
B
VCC_3V3
VCC_3V3
J22
H5
J5
3,25,26,27 EM_WE
2
4
6
8
10
B1.GLK0
B1.GLK1
1
3
5
7
9
RN24
ISR_TCK
ISR_TDO
ISR_TMS
8
7
6
5
ISR_TDI
1
2
3
4
RPACK4-10K
SMT FEMALE HEADER 5X2
EPM2210GF256C5N
L80
VCC_3V3
A
1
SPECTRUM DIGITAL INCORPORATED
2
BLM21PG221SN1D
C410
.1uF
c402-25
A
U35
1
EN
VCC
4
2
GND
OUT
3
DM365 Evaluation Module
Title:
R145
33
Page Contents:
CPLD SECTION A
Size:B
DWG NO
12 MHz
Date:
5
4
3
2
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
20 o f
50
5
4
3
2
VCC_3V3
48 CPU_VSEL0
48 CPU_VSEL1
VCC_3V3
1
VCC_3V3
U33B
SW5
D
R401
R400
R399
R398
R397
R396
10K
10K
10K
10K
10K
10K
1
2
3
4
5
6
1
2
3
4
5
6
D
SEL_NAND_LOW
SEL_EXTRA_1
SEL_EXTRA_2
CPU_VSEL0
CPU_VSEL1
SEl_NTSC_MODE
12
11
10
9
8
7
DIP_SWITCH_6
R373
1K
R372
1K
R371
1K
R370
1K
R369
1K
R368
1K
5 VDIN_WEN
14 PWCTR_OUT0
14 3V3_PWCTR_OUT2
14 3V3_PWCTR_OUT3
14 3V3_PWCTR_IO1
14 3V3_PWCTR_IO2
14 3V3_PWCTR_IO3
14 3V3_PWCTR_IO4
14 3V3_PWCTR_IO5
14 3V3_PWCTR_IO6
44 MSP430_INT
37 TVP5146_RESETn
39 AIC3101_RESETn
35 TVP_7002_RSTn
43 ENET_RESETn
48 CPLD_B-ADJ
PWCTR_OUT0
3V3_PWCTR_OUT3
3V3_PWCTR_OUT3
3V3_PWCTR_IO1
3V3_PWCTR_IO2
3V3_PWCTR_IO3
3V3_PWCTR_IO4
3V3_PWCTR_IO5
3V3_PWCTR_IO6
MSP430_INT
TVP5146_RESETn
AIC3101_RESETn
TVP_7002_RSTn
ENET_RESETn
CPLD_B-ADJ
10 CPU_RESETn
46 PB_SWITCH
19 ARM_RSTn
C
42 CPU_GPIO17
42 CPU_GPIO16
42 CPU_GPIO15
42 CPU_GPIO14
42 CPU_GPIO13
42 CPU_GPIO12
42 CPU_GPIO11
42 CPU_GPIO10
42 CPU_GPIO9
42 CPU_GPIO8
42 CPU_GPIO7
42 CPU_GPIO6
42 CPU_GPIO5
42 CPU_GPIO4
42 CPU_GPIO3
42 CPU_GPIO2
42 CPU_GPIO1
42 SEL_ENET_IO0
42 SEL_ENET_IO1
SEL_ENET_IO0
SEL_ENET_IO1
33 CPLD_CCD-DATA01
33 CPLD_CCD-DATA00
B
EN7
ENAFE
SEQ56
EN56
ENABLE_LCD_15V
48
EN7
48
ENAFE
48
SEQ56
48
EN56
49 ENABLE_LCD_15V
B16
C13
A15
C12
B14
D12
B13
C11
A13
D11
B12
E11
A12
C10
B11
D10
A11
E10
B10
C9
A10
D9
B9
E9
A9
A8
B8
E8
A7
D8
B7
C8
A6
E7
B6
D7
A5
C7
B5
E6
A4
D6
B4
C6
C4
C5
B3
D5
A2
B1
D4
B2.IO_1
B2.IO_2
B2.IO_3
B2.IO_4
B2.IO_13
B2.IO_14
B2.IO_15
B2.IO_16
B2.IO_17
B2.IO_18
B2.IO_19
B2.IO_20
B2.IO_21
B2.IO_22
B2.IO_23
B2.IO_24
B2.IO_25
B2.IO_26
B2.IO_27
B2.IO_28
B2.IO_29
B2.IO_30
B2.IO_31
B2.IO_32
B2.IO_33
B2.IO_34
B2.IO_35
B2.IO_36
B2.IO_37
B2.IO_38
B2.IO_39
B2.IO_40
B2.IO_41
B2.IO_42
B2.IO_43
B2.IO_44
B2.IO_45
B2.IO_46
B2.IO_47
B2.IO_48
B2.IO_49
B2.IO_50
B2.IO_51
B2.IO_52
B2.IO_53
B2.IO_54
B2.IO_55
B2.IO_56
B2.IO_63
B2.IO_64
B2.IO_65
VCCIO.B2.1
VCCIO.B2.2
VCCIO.B2.3
VCCIO.B2.4
C399
0.1UF
A3
A14
F8
F9
C390
0.1UF
C389
0.1UF
C397
0.1UF
C
B
EPM2210GF256C5N
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
CPLD SECTION B
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
21 o f
50
5
4
3
2
1
D
D
VCC_3V3
U33C
C
B
38 CPLD_McBSP_CLKX
38 CPLD_McBSP_FSX
38 CPLD_McBSP_DX
38 CPLD_McBSP_CLKR
38 CPLD_McBSP_FSR
38 CPLD_McBSP_DR
38 SEL_AICn_GPIO
33 CPLD_CCD-DATA02
46
LED4
46
LED5
46
LED6
46
LED7
33 CPLD_CCD-DATA03
33 DECODER_IMAGER_S0
33 DECODER_IMAGER_S1
33 DECODER_IMAGER_S2
6,40 VDOUT_C7
6,40 VDOUT_C6
6,40 VDOUT_C5
6,40 VDOUT_C4
6,40 VDOUT_C3
6,40 VDOUT_C2
6,40 VDOUT_C1
6,40 VDOUT_C0
34 PWM_CCD_SUB
34 CCD-DDSRST
34 GPIO_MST_SLV
34 GPIO_TACH
34 GPIO_MD19
34 GPIO_MD18
34 GPIO_MD17
34 GPIO_MD16
34 GPIO_MD15
34 GPIO_MD14
34 GPIO_MD13
34 GPIO_MD12
34 GPIO_MD11
34 GPIO_MD10
34 GPIO_MD9
34 GPIO_MD8
34 GPIO_MD7
34 GPIO_MD6
34 GPIO_MD5
34 GPIO_MD4
34 GPIO_MD3
34 GPIO_MD1
34 CCD-WEN
34 CCD-FIELD
34 SPI4_SDI_GPIO_MD2_CONN
34 SPI4_SCLK_CONN
34 SPI4_SDO_CONN
SEL_AICn_GPIO
LED4
LED5
LED6
LED7
DECODER_IMAGER_S0
DECODER_IMAGER_S1
DECODER_IMAGER_S2
CCD-WEN
CCD-FIELD
R422
R421
0
0
P14
P15
N13
N14
M14
N15
M13
N16
L14
M15
L13
M16
L12
L15
L11
L16
K14
K15
K13
K16
K12
J15
J14
J16
J13
H16
H13
H15
H14
G16
G12
G15
G13
F16
G14
F15
F11
E16
F12
E15
F13
D16
F14
D15
E12
D14
E13
C15
C14
E14
D13
B3.IO_3
B3.IO_5
B3.IO_6
B3.IO_11
B1.IO_12
B1.IO_13
B1.IO_14
B3.IO_15
B3.IO_16
B3.IO_17
B3.IO_18
B3.IO_19
B3.IO_20
B3.IO_21
B3.IO_22
B3.IO_23
B3.IO_24
B3.IO_25
B3.IO_26
B3.IO_27
B3.IO_28
B3.IO_29
B3.IO_30
B3.IO_31
B3.IO_32
B3.IO_33
B3.IO_34
B3.IO_35
B3.IO_36
B3.IO_37
B3.IO_38
B3.IO_39
B1.IO_40
B3.IO_41
B3.IO_42
B3.IO_43
B3.IO_44
B3.IO_45
B3.IO_46
B3.IO_47
B3.IO_48
B3.IO_49
B3.IO_50
B3.IO_51
B3.IO_52
B3.IO_55
B3.IO_58
B3.IO_61
B3.IO_64
B3.IO_65
B3.IO_67
J12
H12
B3.GLK2
B3.GLK3
VCC_3V3
VCCIO.B3.1
VCCIO.B3.2
VCCIO.B3.3
VCCIO.B3.4
C16
H11
J11
P16
C392
0.1UF
C391
0.1UF
C406
0.1UF
C401
0.1UF
C
B
EPM2210GF256C5N
A
SPECTRUM DIGITAL INCORPORATED
Title:
Page Contents:
CPLD SECTION C
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
22 o f
50
5
4
3
2
1
VCC_3V3
VCC_3V3
U33D
D
D
TP48
TEST POINT
1
C
TP47
TEST POINT
B
1
18 USB_OVER_CURRENT
18 DRV_VBUS
40 LCD_OE_5V
49 ENABLE_LCD_3V3
27 ONENAND_INT
27 ONENAND_RST
40 R1_GIO33
40 R0_GIO32
40 G1_GIO30
46
LED0
46
LED1
46
LED2
46
LED3
3 EMIF_KEYPAD
30
MS.INS
30 SD/MMC.INS
30 SD/MMC.WP
31 SD/MMC1.WP
31 SD/MMC1.INS
40 CPLD.CONN_RESETn
40 CPLD.CONN_GIO6
40 CPLD.CONN_GIO16
40 CPLD.CONN_GIO54
40 CPLD.CONN_GIO65
40 CPLD.CONN_GIO63
40 CPLD.CONN_GIO62
40 CPLD.CONN_GIO60
40 CPLD.CONN_GIO58
40 CPLD.CONN_GIO56
40 CPLD.CONN_GIO7
40 CPLD.CONN_GIO17
40 CPLD.CONN_GIO67
40 CPLD.CONN_GIO31
40 CPLD.CONN_GIO64
40 CPLD.CONN_GIO61
40 CPLD.CONN_GIO59
40 CPLD.CONN_GIO57
40 CPLD.CONN_GIO32
41 GIO_DILC_DOCK_DET
41 GIO_DILC_CAM_PWR_DET
41 SPI2_SCLK_DILC
41 SPI2_SDO_DILC
41 SPI2_SDI_DILC
41 GIO_DILC_AVJDET
41 GIO_DILC_CHG_CTL
41 GIO_DILC_DRV_VBUS1
41 GIO_DILC_VBUS_DET
USB_OVER_CURRENT
DRV_VBUS
LCD_OE_5V
ENABLE_LCD_3V3
ONENAND_INT
ONENAND_RST
LED0
LED1
LED2
LED3
EMIF_KEYPAD
MS.INS
SD/MMC.INS
SD/MMC.WP
SD/MMC1.WP
SD/MMC1.INS
CPLD.CONN_RESETn
CPLD.CONN_GIO6
CPLD.CONN_GIO16
CPLD.CONN_GIO54
CPLD.CONN_GIO65
CPLD.CONN_GIO63
CPLD.CONN_GIO62
CPLD.CONN_GIO60
CPLD.CONN_GIO58
CPLD.CONN_GIO56
CPLD.CONN_GIO7
CPLD.CONN_GIO17
CPLD.CONN_GIO67
CPLD.CONN_GIO31
CPLD.CONN_GIO64
CPLD.CONN_GIO61
CPLD.CONN_GIO59
CPLD.CONN_GIO57
CPLD.CONN_GIO32
GIO_DILC_DOCK_DET
GIO_DILC_CAM_PWR_DET
SPI2_SCLK_DILC
SPI2_SDO_DILC
SPI2_SDI_DILC
GIO_DILC_AVJDET
GIO_DILC_CHG_CTL
GIO_DILC_DRV_VBUS1
GIO_DILC_VBUS_DET
R1
P4
T2
P5
R3
N5
R4
P6
T4
N6
R5
M6
T5
P7
R6
N7
T6
M7
R7
P8
T7
N8
R8
N9
T8
T9
R9
P9
T10
M10
R10
N10
T11
P10
R11
M11
T12
N11
R12
P11
T13
M12
R13
N12
R14
P12
T15
R16
P13
M8
M9
B4.IO_2
B4.IO_3
B4.IO_4
B4.IO_5
B4.IO_6
B4.IO_7
B4.IO_14
B4.IO_15
B4.IO_16
B4.IO_17
B4.IO_18
B4.IO_19
B4.IO_20
B4.IO_21
B4.IO_22
B4.IO_23
B4.IO_24
B4.IO_25
B4.IO_26
B4.IO_27
B4.IO_28
B4.IO_29
B4.IO_30
B4.IO_31
B4.IO_32
B4.IO_33
B4.IO_34
B4.IO_35
B4.IO_36
B4.IO_37
B4.IO_38
B4.IO_39
B4.IO_40
B4.IO_41
B4.IO_42
B4.IO_43
B4.IO_44
B4.IO_45
B4.IO_46
B4.IO_47
B4.IO_48
B4.IO_49
B4.IO_50
B4.IO_51
B4.IO_52
B4.IO_53
B4.IO_54
B4.IO_63
B4.IO_64
VCCIO.B4.1
VCCIO.B4.2
VCCIO.B4.3
VCCIO.B4.4
L8
L9
T3
T14
C384
0.1UF
C404
0.1UF
C385
0.1UF
C395
0.1UF
C
B
B4.DEV_OE
B4.DEV_CLRn
EPM2210GF256C5N
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
CPLD SECTION D
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
23 o f
50
5
4
3
2
1
D
D
VCC_1V8
U33E
F10
G11
H8
H10
J7
J9
K6
L7
VCCINT.1
VCCINT.2
VCCINT.3
VCCINT.4
VCCINT.5
VCCINT.6
VCCINT.7
VCCINT.8
GNDINT.1
GNDINT.2
GNDINT.3
GNDINT.4
GNDINT.5
GNDINT.6
GNDINT.7
GNDINT.8
F7
G6
H7
H9
J8
J10
K11
L10
VCC_1V8
C388
0.1uF
C
GNDIO.1
GNDIO.2
GNDIO.3
GNDIO.4
GNDIO.5
GNDIO.6
GNDIO.7
GNDIO.8
GNDIO.9
GNDIO.10
GNDIO.11
GNDIO.12
GNDIO.13
GNDIO.14
GNDIO.15
GNDIO.16
C394
0.1uF
C402
0.1uF
C387
0.1uF
C396
0.1UF
C393
0.1UF
C398
0.1UF
C400
0.1UF
C
A1
A16
B2
B15
G7
G8
G9
G10
K7
K8
K9
K10
R2
R15
T1
T16
B
B
EPM2210GF256C5N
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
CPLD POWER
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
24 o f
50
5
4
3
2
1
D
D
J14
3,20,26,27
3,20,26,27
3,20,26,27
3,20,26,27
3,27
3,27
3,27
3,27
EM_D0
EM_D2
EM_D4
EM_D6
EM_D0
EM_D2
EM_D4
EM_D6
EM_D8
EM_D10
EM_D12
EM_D14
EM_D8
EM_D10
EM_D12
EM_D14
3,26,27 EM_WAIT
3,20
EM_CE0
3,20
EM_CE1
EM_CE0
EM_CE1
3,20 EMIF_SEL
C
R413
10K
3,27 EM_BA0
3,27
EM_A0
3,20,26,27 EM_A2
3,27
EM_A4
3,27
EM_A6
3,20,27 EM_A8
3,20,27 EM_A10
3,20,27 EM_A12
EM_BA0
EM_A0
EM_A2
EM_A4
EM_A6
EM_A8
EM_A10
EM_A12
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
EM_D1
EM_D3
EM_D5
EM_D7
EM_D9
EM_D11
EM_D13
EM_D15
EM_CLK
EM_ADV
EM_WE
EM_OE
EM_BA1
EM_A1
EM_A3
EM_A5
EM_A7
EM_A9
EM_A11
EM_A13
VCC_3V3
EM_D1
EM_D3
EM_D5
EM_D7
3,20,26,27
3,20,26,27
3,20,26,27
3,20,26,27
EM_D9
EM_D11
EM_D13
EM_D15
3,27
3,27
3,27
3,27
EM_CLK
3,27
EM_ADV
3,27
EM_WE
3,20,26,27
EM_OE
3,20,26,27
EM_BA1
EM_A1
EM_A3
EM_A5
3,27
3,20,26,27
3,27
3,27
EM_A7
EM_A9
EM_A11
EM_A13
3,27
3,20,27
3,20,27
3,20,27
C
VCC_3V3
HEADER 30X2
VCC_5V
VCC_5V
B
B
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
EMIF/UHPI DC INTERFACE
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
25 o f
50
5
4
3
2
1
D
D
VCC_3V3
NAND_RE
NAND_CE0n
NAND_CE1n
3,20,25,27 EM_OE
20 NAND_CE0n
20 NAND_CE1n
R376
3,20,25,27 EM_A2
3,20,25,27 EM_A1
3,20,25,27 EM_WE
NAND_CLE
NAND_ALE
EM_WE
VCC_3V3
VCC_3V3
C369
0.1uF
B
R367
10K
NC.1
NC.2
NC.3
NC.4
NC.5
R/B2n
R/Bn
RE
CE
CE2
NC.11
VCC.1
VSS.1
NC.14
NC.15
CLE
ALE
WE
WP
NC.20
NC.21
NC.22
NC.23
NC.24
MH2
0
0
1
2
3
4
5
6
NAND_RB 7
8
9
10
11
12
0 13
14
15
16
17
18
19
20
21
22
23
24
MH1
R391
R389
3,25,27 EM_WAIT
C
U28
R114
10K
MH2
R116
10K
MH1
VCC_3V3
DNU.48
NC.47
NC.46
NC.45
I/O7
I/O6
I/O5
I/O4
NC.40
NC.39
DNU/VSS
VCC.2
VSS.2
NC.35
NC.34
NC.33
I/O3
I/O2
I/O1
I/O0
NC.28
NC.27
DNU.26
DNU.25
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
EM_D7
EM_D6
EM_D5
EM_D4
R378
EM_D7
EM_D6
EM_D5
EM_D4
3,20,25,27
3,20,25,27
3,20,25,27
3,20,25,27
0
C
VCC_3V3
C366
0.1uF
EM_D3
EM_D2
EM_D1
EM_D0
EM_D3
EM_D2
EM_D1
EM_D0
C359
2.2uF
3,20,25,27
3,20,25,27
3,20,25,27
3,20,25,27
MT29F16G08FAAWC:A
B
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
NAND FLASH
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
26 o f
50
5
4
3
2
1
D
U27
VCC3.3
R375
10K
R380
10K
R390
10K
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
E2
B4
A1
H1
G1
F3
A2
CE
OE
WE
RDY
INT
AVD
RESET
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
D1
A3
A6
B1
C3
C4
B5
B2
C1
D6
D5
C2
C5
E3
B3
D3
VccIO
VccCORE
C6
B6
ONENAND_CE
20 ONENAND_CE
EM_OE
3,20,25,26 EM_WE
EM_WE
A5
A4
NC.E4
NC.E5
NC.G4
NC.H6
E4
E5
G4
H6
CLK
E1
EM_D15
EM_D14
EM_D13
EM_D12
EM_D11
EM_D10
EM_D9
EM_D8
EM_D7
EM_D6
EM_D5
EM_D4
EM_D3
EM_D2
EM_D1
EM_D0
3,25
3,25
3,25
3,25
3,25
3,25
3,25
3,25
3,20,25,26
3,20,25,26
3,20,25,26
3,20,25,26
3,20,25,26
3,20,25,26
3,20,25,26
3,20,25,26
C
VCC3.3
R379
C371
0
C98
C372
C361
C362
22uF
0.1 uF
0.1 uF
0.1 uF
0.1 uF
check i/o and core voltages
1
2
3
4
5
6
7
3,20,25,26 EM_OE
VSS.1
VSS.2
EM_D15
EM_D14
EM_D13
EM_D12
EM_D11
EM_D10
EM_D9
EM_D8
EM_D7
EM_D6
EM_D5
EM_D4
EM_D3
EM_D2
EM_D1
EM_D0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
C
D4
F1
F2
D2
F5
G5
E6
F6
F4
G6
H3
H2
H5
H4
G3
G2
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
EM_BA0
EM_A13
EM_A12
EM_A11
EM_A10
EM_A9
EM_A8
EM_A7
EM_A6
EM_A5
EM_A4
EM_A3
EM_A2
EM_A1
EM_A0
EM_BA1
3,25 EM_BA0
3,20,25 EM_A13
3,20,25 EM_A12
3,20,25 EM_A11
3,20,25 EM_A10
3,20,25 EM_A9
3,20,25 EM_A8
3,25
EM_A7
3,25
EM_A6
3,25
EM_A5
3,25
EM_A4
3,25
EM_A3
3,20,25,26 EM_A2
3,20,25,26 EM_A1
3,25
EM_A0
3,25 EM_BA1
8
9
10
11
12
13
14
15
D
B
KFG1G16U2B-DIB6000
EM_WAIT
3,25,26 EM_WAIT
B
ONENAND_INT
23 ONENAND_INT
EM_ADV
3,25 EM_ADV
ONENAND_RST
23 ONENAND_RST
EM_CLK
3,25 EM_CLK
R377
10K
R392
R364
10K
10K
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
ONE NAND
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
27 o f
50
5
4
3
2
1
VCC_3V3
D
D
VCC_3V3
C213
R267
10K
R255
0.1uF
10K
U16
1
2
3
4
9 SPI0_SDENA0
9
SPI0_SDI
CS
SO
WP
GND
VCC
HOLD
SCK
SI
8
7
6
5
SPI0_SCLK 9
SPI0_SDO 9
VCC_3V3
AT25640AN-10SU-2.7
R266
10K
C
C
VCC_3V3
VCC_3V3
R124
NO-POP
R123
NO-POP
R122
NO-POP
R393
NO-POP
R394
NO-POP
R395
NO-POP
C365
0.1uF
B
U29
8
VCC
9,20,32,34,35,36,37,39,40,44 I2C_DATA
I2C_DATA
5
SDA
9,20,32,34,35,36,37,39,40,44 I2C_SCLK
I2C_SCLK
6
SCL
A0
A1
A2
WP
VSS
CAT24C256
1
2
3
7
4
B
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
SPI EEPROM
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
28 o f
50
5
4
3
2
1
VCC_3V3
VCC_3V3
VCC_3V3
SILKSCREEN:
UART
+
C130
1uF
C6
10uF
R186
10K
R178
10K
U3
FORCEOFF
16
FORCEON
12
T_OUT
13
D
DB9M
L2
9 UART0_TXD
UART0_TXD
11
T_IN
1uH
C124
10pF
9 UART0_RXD
UART0_RXD
9
R_OUT
R_IN
8
EN
INVALID
10
GND_E_RS232
GND_E_RS232
2
C1+
C2+
5
4
C1-
C2-
6
V+
3
V-
7
C7
1uF
C
1uH
C123
10pF
14
GND
MAX3221CPWRG4
P1
C118
10pF
GND_E_RS232
R1
10K
5
9
4
8
3
7
2
6
1
C119
10pF
L3
1
D
GND_E_RS232
10
VCC
GND_E_RS232
11
15
GND_E_RS232
C4
1uF
C
C127
1uF
C131
1uF
L41
BLM21PG221SN1D
L40
BLM21PG221SN1D
GND_E_RS232
B
B
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
RS232
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
29 o f
50
5
4
VCC_3V3
3
VCC_3V3
2
1
VCC_3V3
D
D
+ C308
10uF
R309
51K
R305
51K
R312
51K
R323
51K
R294
51K
C307
VCC_3V3
.1uF
R333
51K
R288
NO-POP
R335
NO-POP
SCDB1C0101/B1A0102
20
VCC_3.3V
R329
NO-POP
M1
M2
M3
M4
M5
M6
MS.CLK
MS.DATA3
MS.DATA2
MS.DATA0
MS.DATA1
MS.CMD.BS
C
M1
M2
M3
M4
M5
M6
INS
SD_DATA0
SD_DATA1
8 SD0_DATA0
8 SD0_DATA1
WP
C
19
18
17
16
15
14
13
12
11
10
21
SD_CLK
8 SD0_CLK
SD.DAT2
SD.DAT3
SD.CMD
SD.VSS1
SD.VDD
SD.CLK
SD.VSS2
SD.DAT0
SD.DAT1
MS.INS 23
MS.VSS2
MS.VCC
MS.SCLK
MS.DATA3
MS.XINS
MS.DATA2
MS.SDIO/DATA0
MS.DATA1
MS.BS
MS.VSS1
COM
8 SD0_DATA2
8 SD0_DATA3
8 SD0_CMD
9
1
2
3
4
5
6
7
8
22
SD_DATA2
SD_DATA3
SD_CMD
GND.1
23
R316
100K
VCC_3.3V
J12
R66
51K
R69
0
R68
51K
SD/MMC.INS 23
SD/MMC.WP 23
MS.CMD.BS
MS.DATA1
MS.DATA0
MS.DATA2
MS.DATA3
MS.CLK
B
B
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
SD/MMC/MS CARD INTERFACE
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
30 o f
50
5
4
3
2
1
D
D
VCC_3V3
VCC_3V3
VCC_3V3
VCC_3V3
VCC_3V3
R336
51K
+ C311
C
R313
51K
R319
51K
R67
51K
R281
51K
R289
51K
R307
51K
10uF
R325
51K
C310
C
.1uF
J25
CONN_SD1_DATA2
CONN_SD1_DATA3
CONN_SD1_CMD
8 CONN_SD1_DATA2
8 CONN_SD1_DATA3
8 CONN_SD1_CMD
9
1
2
3
4
5
6
7
8
CONN_SD1_CLK
8 CONN_SD1_CLK
CONN_SD1_DATA0
CONN_SD1_DATA1
8 CONN_SD1_DATA0
8 CONN_SD1_DATA1
R285
NO-POP
R297
NO-POP
DAT2
DAT3
CMD
VSS1
VDD
CLK
VSS2
DAT0
DAT1
WP
COM
CARD_DETECT
WP
CO
CD
SD/MMC1.WP 23
SD/MMC1.INS 23
R331
0
R310
NO-POP
MMC/SD_CARD
B
B
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
SD/MMC CARD INTERFACE
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
509902-0001
Friday, October 03, 2008
Sheet
1
31 o f
50
5
4
3
2
1
D
D
20
19
CH1-SAG
18
CH2-OUT
17
C115
C116
2
CH1-INA
7 DAC_1_G/Y
R339
0
3
CH2-INA
7 DAC_2_B/PB
R340
0
4
CH3-INA
5
CH1-INB
6
CH2-INB
R101
75
R100
75
R99
75
C
7
DENC_GND
DENC_GND
DENC_GND
C336
NO-POP
C325
NO-POP
DENC_GND
C326
NO-POP
DENC_GND
CH2-SAG
16
CH3-OUT
15
I2C-A0
I2C-SCL
13
GND.1
I2C-SDA
12
VS+
11
10
DENC_GND
C108
330uF
DENC_GND
R357
.01uF
J17
RCA JACK(GRN)
2
267 1%
C112
C113
14
9
75
.01uF
DENC_GND
CH3-SAG
I2C-A1
R133
J21
RCA JACK(RED)
2
DENC_GND
CH3-INB
8
75
267 1%
C109
R353
330uF
R141
75
C
.01uF
267 1%
DENC_GND
DENC_GND
DENC_GND
VCC_DENC
R356
R146
4
1
3
0
+
R338
+
7 DAC_3_R/PR
330uF
4
1
3
NC20
CH1-OUT
NC1
+
U23
1
THS7303
L28
BEAD
VCC_DENC
VCC_3V3
C327
C347
C89
C88
.01uF
33uF
33uF
DENC_GND
DENC_GND
J20
RCA JACK(BLUE)
2
1uF
R355
NO-POP
4
1
3
R98
NO-POP
DENC_GND
DENC_GND
DENC_GND
B
R97
0
B
R345
0
DENC_GND
DENC_GND
9,20,28,34,35,36,37,39,40,44 I2C_DATA
I2C_DATA
R107
100
9,20,28,34,35,36,37,39,40,44 I2C_SCLK
I2C_SCLK
R108
100
I2C_SDA_7303
I2C_SCL_7303
C352
C353
27pF
27pF
DENC_GND
DENC_GND
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
COMPONENT VIDEO OUTPUT
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
32 o f
50
5
4
3
2
1
VID_4V1
H D_Y7
H D_Y6
H D_Y5
H D_Y4
H D_Y3
H D_Y2
H D_Y1
H D_Y0
HD_Y7
HD_Y6
HD_Y5
HD_Y4
HD_Y3
HD_Y2
HD_Y1
HD_Y0
HD_CLKIN
35 HD_CLKIN
34
34
34
34
CCD-DATA3
CCD-DATA2
CCD-DATA1
CCD-DATA0
CCD-DATA03
CCD-DATA02
CCD-DATA01
CCD-DATA00
34
34
34
34
34
34
C
CCD-DATA15
CCD-DATA14
CCD-DATA13
CCD-DATA12
CCD-HSYNC
CCD-VSYNC
CCD-PCLK
VCC.1
S0
S1
S2
1
56
55
54
52
50
47
45
43
41
39
36
34
32
30
1B1
2B1
3B1
4B1
5B1
6B1
7B1
8B1
9B1
10B1
11B1
12B1
1A
2A
3A
4A
5A
6A
7A
8A
9A
10A
11A
12A
2
4
6
9
11
13
15
18
21
23
25
27
53
51
48
46
44
42
40
37
35
33
31
29
1B2
2B2
3B2
4B2
5B2
6B2
7B2
8B2
9B2
10B2
11B2
12B2
1B3
2B3
3B3
4B3
5B3
6B3
7B3
8B3
9B3
10B3
11B3
12B3
3
5
7
10
12
14
16
20
22
24
26
28
DECODER_IMAGER_S0
DECODER_IMAGER_S1
DECODER_IMAGER_S2
R286
DECODER_IMAGER_S0 22
DECODER_IMAGER_S1 22
DECODER_IMAGER_S2 22
VID_4V1
VDIN_Y7
VDIN_Y6
VDIN_Y5
VDIN_Y4
VDIN_Y3
VDIN_Y2
VDIN_Y1
VDIN_Y0
VDIN_VD
VDIN_HD
360
5
5
5
5
5
5
5
5
5
5
D
VCC_5V
R63
1.5K
D6
LM4040DCIM3-4.1
3
VDIN_PCLK 5
TVP5146_Y7
TVP5146_Y6
TVP5146_Y5
TVP5146_Y4
TVP5146_Y3
TVP5146_Y2
TVP5146_Y1
TVP5146_Y0
TVP5146_Y7 37
TVP5146_Y6 37
TVP5146_Y5 37
TVP5146_Y4 37
TVP5146_Y3 37
TVP5146_Y2 37
TVP5146_Y1 37
TVP5146_Y0 37
TVP5146VSYNC 37
TVP5146HSYNC 37
C
TVP5146PCLK 37
GND.4
GND.3
GND.2
GND.1
8
7
6
5
34 CCD-PCLK
CCD-DATA15
CCD-DATA14
CCD-DATA13
CCD-DATA12
CCD-HSYNC
CCD -VSYNC
U17
1
35
35
35
35
35
35
35
35
560pF
2
D
17
C250
C251
0.1uF
1
2
3
4
49
38
19
8
RN26
RPACK4-33
R298
10K
C299
C300
0.1uF
35
35
35
35
35
35
35
35
B
SN74CBT16214DGGR
VID_4V1
CPLD_CCD-DATA03
CPLD_CCD-DATA02
CPLD_CCD-DATA01
CPLD_CCD-DATA00
34
34
34
34
34
34
34
34
CCD-DATA11
CCD-DATA10
CCD-DATA09
CCD-DATA08
CCD-DATA07
CCD-DATA06
CCD-DATA05
CCD-DATA04
CCD-DATA11
CCD-DATA10
CCD-DATA9
CCD-DATA8
CCD-DATA7
CCD-DATA6
CCD-DATA5
CCD-DATA4
R295
10K
R301
10K
U21
S0
S1
S2
1
56
55
54
52
50
47
45
43
41
39
36
34
32
30
1B1
2B1
3B1
4B1
5B1
6B1
7B1
8B1
9B1
10B1
11B1
12B1
1A
2A
3A
4A
5A
6A
7A
8A
9A
10A
11A
12A
2
4
6
9
11
13
15
18
21
23
25
27
53
51
48
46
44
42
40
37
35
33
31
29
1B2
2B2
3B2
4B2
5B2
6B2
7B2
8B2
9B2
10B2
11B2
12B2
1B3
2B3
3B3
4B3
5B3
6B3
7B3
8B3
9B3
10B3
11B3
12B3
3
5
7
10
12
14
16
20
22
24
26
28
DECODER_IMAGER_S0
DECODER_IMAGER_S1
DECODER_IMAGER_S2
R328
VDIN_C7
VDIN_C6
VDIN_C5
VDIN_C4
VDIN_C3
VDIN_C2
VDIN_C1
VDIN_C0
360
TVP5146_C7
TVP5146_C6
TVP5146_C5
TVP5146_C4
TVP5146_C3
TVP5146_C2
TVP5146_C1
TVP5146_C0
TVP5146_C7
TVP5146_C6
TVP5146_C5
TVP5146_C4
TVP5146_C3
TVP5146_C2
TVP5146_C1
TVP5146_C0
5
5
5
5
5
5
5
5
49
38
19
8
B
37
37
37
37
37
37
37
37
SPECTRUM DIGITAL INCORPORATED
GND.4
GND.3
GND.2
GND.1
A
VCC.1
560pF
HD_C7
HD_C6
HD_C5
HD_C4
HD_C3
HD_C2
HD_C1
HD_C0
HD_C7
HD_C6
HD_C5
HD_C4
HD_C3
HD_C2
HD_C1
HD_C0
17
22
22
21
21
Title:
Page Contents:
VIDEO INPUT MULTIPLEXER
Size:B
DWG NO
SN74CBT16214DGGR
Date:
5
4
A
DM365 Evaluation Module
3
2
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
33 o f
50
5
4
3
2
1
D
D
5V_DC_J6
5V_DC_J6
3V3_STB
GND_STB
MTR_3V3 5V_DC_J6
J10A
GPIO_MD1
5V_DC_J6
22 GPIO_MD1
GND_MTR
33 CCD-DATA02
CCD-DATA2
33 CCD-DATA03
CCD-DATA3
33 CCD-DATA04
CCD-DATA4
33 CCD-DATA05
CCD-DATA5
33 CCD-DATA06
CCD-DATA6
33 CCD-DATA07
CCD-DATA7
33 CCD-DATA08
CCD-DATA8
33 CCD-DATA09
CCD-DATA9
C
CCD-DATA10
33 CCD-DATA10
CCD-DATA11
33 CCD-DATA11
33 CCD-DATA12
CCD-DATA12
33 CCD-DATA13
CCD-DATA13
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
J10B
22
22
22
22
GPIO_MD10
GPIO_MD9
GPIO_MD8
GPIO_MD7
33 CCD-DATA00
33 CCD-DATA15
33 CCD-DATA01
22 GPIO_MD6
22 GPIO_MD5
22 GPIO_MD4
22 PWM_CCD_SUB
22 CCD-DDSRST
22 GPIO_MD3
22 SPI4_SDI_GPIO_MD2_CONN
22 SPI4_SDO_CONN
22 SPI4_SCLK_CONN
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
CCD-DATA0
CCD-DATA15
CCD-DATA1
GPIO_MD6
GPIO_MD5
GPIO_MD4
PWM_CCD_SUB
CCD-DDSRST
GPIO_MD3
SPI4_SDI_GPIO_MD2_CONN
SPI4_SDO_CONN
SPI4_SCLK_CONN
33 CCD-PCLK
CCD-PCLK
22
CCD-WEN
CCD-WEN
GPIO_MD10
GPIO_MD9
GPIO_MD8
GPIO_MD7
5V_DC_J6
MOT-PWR
22 CCD-FIELD
CCD-FIELD
33 CCD-HSYNC
CCD-HSYNC
33 CCD-VSYNC
CCD -VSYNC
33 CCD-DATA14
CCD-DATA14
PCN10-96P-2.54DSA,HIROSE CL583-0002-4
J10C
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
C27
C28
C29
C30
C31
C32
VCC_CCD15V
15V_CCD
22 GPIO_MD19
22 GPIO_MD18
22 GPIO_MST_SLV
22 GPIO_MD17
22 GPIO_MD16
22 GPIO_MD15
22 GPIO_MD14
22 GPIO_MD13
22 GPIO_TACH
22 GPIO_MD12
22 GPIO_MD11
9,20,28,32,35,36,37,39,40,44 I2C_DATA
9,20,28,32,35,36,37,39,40,44 I2C_SCLK
+
C259
10uF
C265
0.01uF
5V_DC_J6
GPIO_MD19
GPIO_MD18
GPIO_MST_SLV
GPIO_MD17
GPIO_MD16
GPIO_MD15
GPIO_MD14
GPIO_MD13
GPIO_TACH
GPIO_MD12
GPIO_MD11
I2C_DATA
I2C_SCLK
VCC_CCD_N7V5
7V5_NEG
3V3_CCD
C278
10uF
+
CCD_PSMON
5V_DC_J6
C271
0.01uF
3V3A_CCD
PCN10-96P-2.54DSA,HIROSE CL583-0002-4
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
C27
C28
C29
C30
C31
C32
C
PCN10-96P-2.54DSA,HIROSE CL583-0002-4
AGND_IMAGER
3V3_CCD
C90
3.3uF
C329
+
0.01uF
B
C75
3.3uF
B
+
C287
0.01uF
AGND_IMAGER
3V3_STB
L48
3V3A_CCD
5V_DC_J6
VCC_5V
AFE_3V3
L68
BLM41P750SPT
L53
L71
5V_DC_J6
BLM41P750SPT
GND_STB
BLM41P750SPT
BLM41P750SPT
C85
3.3uF
VCC_3V3
L78
+
C306
0.01uF
3V3_CCD
BLM41P750SPT
L81
BLM41P750SPT
SPECTRUM DIGITAL INCORPORATED
A
A
GND_MTR
L74
DM365 Evaluation Module
Title:
BLM41P750SPT
Page Contents:
IMAGER INTERFACE
Size:B
DWG NO
Revision:
A
510842-0001
AGND_IMAGER
Date:
5
4
3
2
Friday, October 03, 2008
Sheet
1
34 o f
50
5
4
3
2
1
TVP_VCC_PLL
TVP_AVCC_3V3
VCC_3V3
VCC_1V8 TVP_AVCC_3V3
VCC_3V3
TVP_AVCC_1V8
C264
C243
C261
C244
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
TVP_AGND
C
33
33
33
33
33
33
33
33
HD_Y0
HD_Y1
HD_Y2
HD_Y3
HD_Y4
HD_Y5
HD_Y6
HD_Y7
33
33
33
33
33
33
33
33
HD_C0
HD_C1
HD_C2
HD_C3
HD_C4
HD_C5
HD_C6
HD_C7
GIN1
2
C239
SOGIN_1
1
C238
HD_C0
HD_C1
HD_C2
HD_C3
HD_C4
HD_C5
HD_C6
HD_C7
38
37
36
35
34
33
32
31
30
29
B_0
B_1
B_2
B_3
B_4
B_5
B_6
B_7
B_8
B_9
28
DATACLK
80
EXT_CLK
71
RESETB
9,20,28,32,34,36,37,39,40,44 I2C_DATA
75
SDA
9,20,28,32,34,36,37,39,40,44 I2C_SCLK
74
SCL
73
I2CA
21 TVP_7002_RSTn
VCC_3V3
R320
NO-POP
77
COAST
R321
0
76
CLAMP
R314
0
R317
0
PWDN
72
TMS
SOGIN_2
VCC_3V3
R72
C67
0.1uF
10
THS7353_CH1 36
10
THS7353_CH2 36
C66
0.1uF
TVP_AGND
0.1uF
R278
0.01uF
100
C
99
GIN3
98
SOGIN_3
97
GIN4
96
BIN1
18
C71
0.1uF
C257
0.1uF
C70
0.1uF
C254
0.1uF
C69
0.1uF
TVP_AGND TVP_AGND TVP_AGND TVP_AGND TVP_AGND
BIN2
17
BIN3
16
HSYNC_A
VSYNC_A
HSYNC_B
VSYNC_B
81
78
82
79
C64
R71
10
THS7353_CH3 36
0.1uF
VCC_DEC_3V3
C245
0.1uF
TVP_AGND
C246
0.1uF
0
R322
NO-POP
TVP_VCC_PLL
PLL_F
89
FILT2
88
FILT1
87
R306
TVP_VCC_PLL
R296
0
NO-POP
R86
1.5K 1%
TVP_AVCC_1V8
C74
0.1uF
C72
4700pF
R85
SPECTRUM DIGITAL INCORPORATED
NO-POP
R308
NO-POP
A
DM365 Evaluation Module
Page Contents:
TVP7002 HD VIDEO IN
Size:B
DWG NO
TVP_AGND
TVP_AGND
Date:
5
B
BLM21PG221SN1D
TVP_AGND
Title:
R324
TVP_AVCC_3V3
L21
TVP_ANALOG_VCC_1V9
101
A
70
0.1uF
TVP_AGND
GIN2
RN29 RPACK8-22
B_TVP_CR_CB2
9
8
B_TVP_CR_CB3
10
7
B_TVP_CR_CB4
11
6
B_TVP_CR_CB5
12
5
B_TVP_CR_CB6
13
4
B_TVP_CR_CB7
14
3
B_TVP_CR_CB8
15
2
B_TVP_CR_CB9
16
1
TP38
TP-60
4
6
7
19
9
G_0
G_1
G_2
G_3
G_4
G_5
G6
G7
G8
G9
22
A18VDD.1
A18VDD.2
A18VDD.3
A18VDD.4
RIN3
52
51
50
49
48
47
46
45
44
43
R282
PLL_A18VDD.1
PLL_A18VDD.2
R_0
R_1
R_2
R_3
R_4
R_5
R_6
R_7
R_8
R_9
RN32 RPACK8-22
B_TVP_Y2
9
8
B_TVP_Y3
10
7
B_TVP_Y4
11
6
B_TVP_Y5
12
5
B_TVP_Y6
13
4
B_TVP_Y7
14
3
B_TVP_Y8
15
2
B_TVP_Y9
16
1
33 HD_CLKIN
A33VDD.1
A33VDD.2
A33VDD.3
A33VDD.4
10
H D_Y0
H D_Y1
H D_Y2
H D_Y3
H D_Y4
H D_Y5
H D_Y6
H D_Y7
B
DVDD.1
DVDD.2
RIN2
NSUB.1
NSUB.2
0.1uF
C65
21
91
C240
0.1uF
D
SOGOUT
PLL_A18GND.1
PLL_A18GND.2
PLL_A18GND.3
C242
0.1uF
65
64
63
62
61
59
58
57
56
55
TVP_AGND
11
83
86
90
C247
0.1uF
25
TVP7002
RIN1
A18_GND.4
A18_GND.3
A18_GND.2
A18_GND.1
C241
HSOUT
20
8
5
3
TVP_AVCC_1V8
VSOUT
24
A33GND.4
A33GND.3
A33_GND.2
A33_GND.1
TP33
TP-60
FIDOUT
23
95
92
15
12
TP31
TP-60
22
GND.1
GND.2
TP32
TP-60
TP34
TP-60
40
68
0.1uF
IOGND.5
IOGND.4
IOGND.3
IOGND.2
IOGND.1
C297
0.1uF
PWRPAD
C273
IOVDD.1
IOVDD.2
IOVDD.3
IOVDD.4
TVP_AGND
67
60
54
42
27
VCC_1V8
84
85
C280
13
14
93
94
C275
39
69
C249
26
41
53
66
C301
U20
D
TVP_VCC_PLL
C277
4
3
2
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
35 o f
50
5
4
3
2
1
C73
0.1uF
J11
RCA JACK(RED)
2
4
1
3
U15
35 THS7353_CH1
20
NC20
19
CH1OUT
18
CH1ADJ
NC1
1
CH1-INA
2
CH2-INA
3
CH3-INA
4
CH1-INB
5
CH2-INB
6
CH3-INB
7
R88
75
TVP_AGND
D
17
35 THS7353_CH2
16
15
CH2ADJ
CH3OUT
C48
0.1uF
J8
RCA JACK(GRN)
2
4
1
3
35 THS7353_CH3
CH2OUT
D
TVP_AGND
14
CH3ADJ
I2C-A1
8
13
I2C-SCL
I2C-A0
9
12
I2C-SDA
GND.1
10
11
VS+
R56
75
TVP_AGND
TVP_AGND
TVP_AGND
C63
0.1uF
L20
BLM21PG221SN1D
9,20,28,32,34,35,37,39,40,44 I2C_SCLK
I2C_SCLK
R65
100
I2C_SCL_7353
9,20,28,32,34,35,37,39,40,44 I2C_DATA
I2C_DATA
R64
100
I2C_SDA_7353
C208
C218
C49
C59
1uF
.01uF
33uF
33uF
J9
RCA JACK(BLUE)
2
C
4
1
3
THS7353
C
VCC_DEC_3V3
R75
75
TVP_AGND
TVP_AGND
C223
22pF
C222
22pF
TVP_AGND
TVP_AGND
VCC_DEC_3V3
L23
B
BLM21PG221SN1D
C313
2.2uF
TPS74701
IN1
IN2
10
9
4
BIAS
PG
3
7
SS
FB
8
5
EN
GND
6
VOUT2
VOUT1
TVP_ANALOG_VCC_1V9
L24
B
C62
R90
6.81K
10uF
C82
5.6pF
R334
4.99K
TVP_AGND
TVP_AGND
VOUT = 0.8 * ( 1+R401/R402 )
11
C84
0.001uF
U22
1
2
PP1
TVP_AGND
TVP_AGND
BLM21PG221SN1D
TVP_AGND
PLACE NEAR TVP7002
TVP_AGND
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
TVP7002 HD VIDEO IN
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
36 o f
50
5
4
3
2
1.8VA_DDEC
3.3VD_DDEC
3.3VD_DDEC
0.1uF
3.3VD_DDEC
R366
R354
NO-POP
NO-POP
DEC_GND
3.3VD_DDEC
1.8VA_DDEC
C360
0.1uF
C364
C323
C338
C342
C356
C335
C321
C357
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
35
FSS/GPIO
33
PWRDWN
34
RESETB
9,20,28,32,34,35,36,39,40,44 I2C_DATA
29
SDA
9,20,28,32,34,35,36,39,40,44 I2C_SCLK
C349
28
SCL
80
VI_1_A
1
VI_1_B
2
VI_1_C
38
48
61
IOVDD1
IOVDD2
IOVDD3
C330
.1uF
31
41
55
67
C322
DVDD1
DVDD2
DVDD3
DVDD4
0.1uF
4
5
20
21
C345
0.1uF
CH1_A33VDD
CH2_A33VDD
CH3_A33VDD
CH4_A33VDD
C358
0.1uF
76
C350
0.1uF
CH2_A18VDD
CH3_A18VDD
CH4_A18VDD
CH1_A18VDD
C346
0.1uF
12
C328
PLL_A18VDD
C319
0.1uF
D
11
14
25
78
1.8VD_DDEC
A18VDD_REF
3.3VA_DDEC
3.3VA_DDEC 1.8VD_DDEC
21 TVP5146_RESETn
J15
749181-1
L76
3
2.7uH
L77
2.7uH
4
C355
C354
1
C363
680pF
C370
330pF
.1uF
R106
75
0.1uF
0.1uF
DEC_GND
5
7
DEC_GND
DEC_GND DEC_GND
6
7
DEC_GND
L75
2.7uH
L72
C337
C341
330pF
680pF
VI_2_B
9
VI_2_C
33
33
33
33
33
33
33
33
RN34
RPACK8-33
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
TVP5146_C7
TVP5146_C6
TVP5146_C5
TVP5146_C4
TVP5146_C3
TVP5146_C2
TVP5146_C1
TVP5146_C0
TVP5146_C7
TVP5146_C6
TVP5146_C5
TVP5146_C4
TVP5146_C3
TVP5146_C2
TVP5146_C1
TVP5146_C0
33
33
33
33
33
33
33
33
HS/CS/GPIO
72
R112
22
TVP5146HSYNC 33
VS/VBLK/GPIO
73
R113
22
TVP5146VSYNC 33
FID/GPIO
71
GLCO/12CA
37
R365
AVID/GPIO
36
2K
DATACLK
40
R352
75
16
VI_3_A
17
VI_3_B
18
VI_3_C
R344
22
TVP5146PCLK 33
3.3VD_DDEC
3.3VD_DDEC
R111
DEC_GND
DEC_GND
DEC_GND
DEC_GND
C94
C92
0.1uF
0.1uF
C331
C317
330pF
C312
680pF
C316
330pF
DEC_GND
DEC_GND
23
81
C91
0.1uF
DEC_GND
DEC_GND
DEC_GND
1
L29
2
BLM41P750SPT
1.8VD_DDEC
VCC_DEC_1V8
3.3VA_DDEC
1
L26
VCC_DEC_3V3
75
THERMAL
DEC_GND DEC_GND
10
15
24
79
3
6
19
22
26
13
77
1.8VA_DDEC VCC_DEC_3V3
XTAL2
100K
R110
Y3
NO-POP
14.31818mhz
0
C367
C368
33pF
33pF
C320
0.1uF
ISOLATE GROUNDS
AND CONNECT AT
SINGLE LOCATION
IN THE GROUND PLANE
VCC_DEC_1V8
R109
VI_4_A
R105 .1uF
75
DEC_GND
R342
DGND1
DGND2
DGND3
DGND4
DGND5
IOGND1
IOGND2
IOGND3
DEC_GND
R374
4.7K
74
C344
L69 2.7uH
SPECTRUM DIGITAL INCORPORATED
2
BLM41P750SPT
Title:
Page Contents:
3.3VD_DDEC
A
DM365 Evaluation Module
TVP5146 VIDEO DECODER
DEC_GND
1
L25
2
BLM41P750SPT
1
L30
DEC_GND
2
BLM41P750SPT
Size:B
DWG NO
4
3
2
Revision:
A
510842-0001
Date: Friday, October 03, 2008
5
B
R343
2.2K
27
32
42
56
68
39
49
62
3
1
4
L70 2.7uH
30
4.7K
.1uF
XTAL1
J13
RCA JACK(YELLOW)
2
DEC_GND
INTREQ
CH2_A18GND
CH3_A18GND
CH4_A18GND
CH1_A18GND
CH1_A33GND
CH2_A33GND
CH3_A33GND
CH4_A33GND
AGND
A18GND_REF
PLL_A18GND
B
C
.1uF
330pF
A
8
C332
2.7uH
LUMA
C351
VI_2_A
TVP5146_Y7
TVP5146_Y6
TVP5146_Y5
TVP5146_Y4
TVP5146_Y3
TVP5146_Y2
TVP5146_Y1
TVP5146_Y0
57
58
59
60
63
64
65
66
69
70
DEC_GND
DEC_GND
TVP5146_Y7
TVP5146_Y6
TVP5146_Y5
TVP5146_Y4
TVP5146_Y3
TVP5146_Y2
TVP5146_Y1
TVP5146_Y0
C9
C8
C7
C6
C5
C4
C3
C2
C1
C0
U24
TVP5146
C97
330pF
2
RN33
RPACK8-33
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
43
44
45
46
47
50
51
52
53
54
R96
DEC_GND
D
Y9
Y8
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
2K
C
1
Sheet
1
37 o f
50
5
4
3
2
1
VCC_3V3
C181
D
D
U11
0.1uF
16
VCC
9 McBSP_CLKX
4
1A
9 McBSP_FSX
7
2A
9 McBSP_DX
9
3A
12
4A
8
R239
360
GND
1B1
1B2
2B1
2B2
3B1
3B2
4B1
4B2
2
3
5
6
11
10
14
13
S
OE
1
15
AIC_McBSP_CLKX 39
CPLD_McBSP_CLKX 22
AIC_McBSP_FSX 39
CPLD_McBSP_FSX 22
AIC_McBSP_DX 39
CPLD_McBSP_DX 22
CPLD_SEL_AICn
SN74CBTLV3257PW
VCC_3V3
C180
U12
0.1uF
16
C
VCC
9 McBSP_CLKR
4
1A
9 McBSP_FSR
7
2A
9
3A
12
4A
9 McBSP_DR
R238
360
8
GND
1B1
1B2
2B1
2B2
3B1
3B2
4B1
4B2
2
3
5
6
11
10
14
13
S
OE
1
15
AIC_McBSP_CLKR 39
CPLD_McBSP_CLKR 22
AIC_McBSP_FSR 39
CPLD_McBSP_FSR 22
AIC_McBSP_DR 39
CPLD_McBSP_DR 22
SEL_AICn_GPIO
C
SEL_AICn_GPIO 22
SN74CBTLV3257PW
R233
2K
B
B
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
Size:B
DM365 Evaluation Module
McBSP Muxes
DWG NO
4
3
2
Revision:
A
510842-0001
Date: Friday, October 03, 2008
5
A
Sheet
1
38 o f
50
VCC_3V3
L45
VCC_3V3
BLM21PG221SN1D
+
5
6
C141
.1uF
C146
.1uF
C14
10uF
L46
C129 .1uF
Line In
3
R179
C21
L9
C157
.1uF
1uF
C147
.1uF
BLM21PG221SN1D
+
C151
.1uF
C16
.1uF
C17
.1uF
VCC_3V3
R180
5.6K
GND_AIC
C128
220pF
L50
GND_AIC
R190
C27
10uF
C19
.1uF
C161
.1uF
C138 .1uF
5.6K
U7
L39
4
2
1
BLM21PG221SN1D
+
C153
.1uF
P4
5
6
C13
10uF
5.6K
4
2
1
Mic In GND_AIC
3
BLM21PG221SN1D
VCC_1V8
R191
5.6K
BLM21PG221SN1D
C137
220pF
DVDD
IOVDD
DVSS
10
MIC1LP/LINE1LP
11
MIC1LM/LINE1LM
12
MIC1RP/LINE1RP
13
MIC1RM/LINE1RM
P3
GND_AIC
C144
.1uF
TVL320AIC3101
32
7
6
DRVDD.1
DRVDD.2
AVDD.1
AVSS1
18
24
25
17
AVSS2
26
HPLOUT
HPLCOM
DRVSS.1
19
20
21
HPRCOM
HPROUT
22
23
GND_AIC
GND_AIC
GND_AIC
GND_AIC
C125
.1uF
R175
10K
GND_AIC
16
14
MIC2L/LINE2L/MICDET
MIC2R/LINE2R
15
MICBIAS
31
RESET
GND_AIC
C163
33uF,6.3V
L52
BLM21PG221SN1D
L55
BLM21PG221SN1D
1
2
4
3
R225
20K
R227
20K
Headphone Out
GND_AIC
1
3
5
7
9
11
13
15
17
R32
R27
R23
R19
R13
R11
10
10
10
10
10
10
AIC_BCLK
AIC_BCLK
AIC_WCLK
AIC_WCLK
AIC_DIN
AIC_DOUT
2
3
4
5
BCLK
WCLK
DIN
DOUT
9
8
SDA
SCL
28
RIGHT_LO+
29
RIGHT_LO-
30
GND_AIC
GND_AIC
P5
C142
10uF,6.3V
L44
10uF,6.3V
L47
1
2
4
BLM21PG221SN1D
C152
3
BLM21PG221SN1D
HEADER 9X2
R9
NO-POP
GND_AIC
6
5
2
4
6
8
10
12
14
16
18
27
LEFT_LO-
+
AIC_McBSP_CLKX
38 AIC_McBSP_CLKX
AIC_McBSP_CLKR
38 AIC_McBSP_CLKR
AIC_McBSP_FSX
38 AIC_McBSP_FSX
AIC_McBSP_FSR
38 AIC_McBSP_FSR
AIC_McBSP_DX
38 AIC_McBSP_DX
AIC_McBSP_DR
38 AIC_McBSP_DR
28,32,34,35,36,37,40,44 I2C_DATA
28,32,34,35,36,37,40,44 I2C_SCLK
JP1
LEFT_LO+
+
21 AIC3101_RESETn
MCLK
TPAD
GND_AIC
R174
330
33uF,6.3V
6
5
R173
47K
P6
GND_AIC
C158
+
.1uF
R218
20K
R10
NO-POP
ISOLATE GROUNDS
AND CONNECT AT
SINGLE LOCATION
IN THE GROUND PLANE
R12
20K
VCC_3V3
Line Out
1
33
C122
220pF
C120
.1uF
+
R172
330
GND_AIC
R200
20K
GND_AIC
VCC_3V3
GND_AIC
C165
U8
.1uF
1
EN
VCC
4
2
GND
OUT
3
27Mhz
SPECTRUM DIGITAL INCORPORATED
R18
22
Title:
Page Contents:
Size:B
DM365 Evaluation Module
AIC3101 AUDIO INTERFACE
DWG NO
Date: Friday, October 03, 2008
Revision:
A
510842-0001
Sheet
39 o f
50
5
4
3
2
1
33
R134
33
23 G1_GIO30
R135
33
VDOUT_Y0
6
VDOUT_Y1
6
VDOUT_Y2
6
VDOUT_Y3
6
VDOUT_Y4
6
VDOUT_Y5
6
VDOUT_Y6
6
VDOUT_Y7
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
VDOUT_C0 6,22
VDOUT_C1 6,22
23 CPLD.CONN_GIO6
23 CPLD.CONN_GIO16
23 CPLD.CONN_GIO54
23 CPLD.CONN_GIO65
23 CPLD.CONN_GIO63
23 CPLD.CONN_GIO62
23 CPLD.CONN_GIO60
23 CPLD.CONN_GIO58
23 CPLD.CONN_GIO56
VDOUT_C2 6,22
VDOUT_C3 6,22
VDOUT_C4 6,22
VDOUT_C5 6,22
VDOUT_C6 6,22
23 CPLD.CONN_RESETn
VDOUT_C7 6,22
MH2
23 R0_GIO32
6
J23
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
CPLD.CONN_GIO7 23
CPLD.CONN_GIO17 23
CPLD.CONN_GIO67 23
CPLD.CONN_GIO31 23
CPLD.CONN_GIO64 23
CPLD.CONN_GIO61 23
CPLD.CONN_GIO59 23
CPLD.CONN_GIO57 23
CPLD.CONN_GIO32 23
D
MH2
R132
23 R1_GIO33
D
VCC_1V8
MH1
MH1
VCC_1V8
J19
HEADER 15X2
HEADER 15X2
BAT_VIN
VCC_5V
BAT_VIN
BLM41P750SPT
BL_6V8_RTN
MH1
L79
C
BL_6V8
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
6 VDOUT_VSYNC
6 VDOUT_HSYNC
6 VDOUT_VCLK
9 SPI1_SDI
R138
R140
R142
R137
33
33
33
LCD_3V3
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
NO-POP
LCD_5V
R420
15V_LCD
C
VDOUT_LCD_OE 6
VDOUT_FIELD 6,20
VDOUT_EXTCLK 6,20
I2C_DATA 9,20,28,32,34,35,36,37,39,44
I2C_SCLK 9,20,28,32,34,35,36,37,39,44
MH2
9 SPI1_SDENA0
9 SPI1_SDO
9 SPI1_SCLK
J18
33
HEADER 15X2
0
B
C380
R423
B
NO-POP
VCC_3V3
LCD_5V
R129
20K
VCC_5V
U32
23 LCD_OE_5V
R411
NO-POP
R128
100K
L34
4
VIN
VOUT2
3
5
ON/OFF VOUT1
2
6
R1/C1
1
R2
DD_5V
C107
C381
BLM41P750SPT
+
.1uF
100uF
R412
0
FDC6331L
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
Size:B
DM365 Evaluation Module
VIDEO OUTPUT DC J41/J42
DWG NO
4
3
2
Revision:
A
510842-0001
Date: Friday, October 03, 2008
5
A
Sheet
1
40 o f
50
5
4
3
2
1
D8
23 GIO_DILC_DOCK_DET
DOCK_DET
1SS355
PWR_VIN
VCC_5V
PWR_VIN
VCC_3V3
D7
D
PWR_VIN
R459
D
1M
R447
NO-POP
100K
R147
2M
CAM_PWR_DET
3
23 GIO_DILC_CAM_PWR_DET
CAM_PWR
2
1
Q6
C413
NO-POP
DTC114EUA
R450
3.3K
R451
3.3K
MP1
VCC_3V3
R452
3.3K
C
R458
220
SB
R457
220
OP_SERIAL
R456
220
23 SPI2_SCLK_DILC
23 SPI2_SDO_DILC
23 SPI2_SDI_DILC
VCC_3V3
12
LINEOUT
LINEOUT
R455
0
BAT_CHG
R446
100K
10K
R460
C D1
C D2
1
AVJDET
3
23 GIO_DILC_AVJDET
TP53
Q5
TEST POINT
2 AVJ_DET
1
TP54
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
C
MOLEX FPC 20pin 52745-2096
J24
DTC114EUA
B
MP2
1
B
TEST POINT
R453
23 GIO_DILC_CHG_CTL
0
CHG_CTL
R454
100K
23 GIO_DILC_DRV_VBUS1
VCC_3V3
R444
100K
R445
3
23 GIO_DILC_VBUS_DET
10K
VBUS1
2
1
Q4
DTC114EUA
SPECTRUM DIGITAL INCORPORATED
A
7
Title:
TV_OUT
Page Contents:
Size:B
DM365 Evaluation Module
DILC HOST CONNECTOR
DWG NO
4
3
2
Revision:
A
510842-0001
Date: Friday, October 03, 2008
5
A
Sheet
1
41 o f
50
5
4
3
2
1
VCC_3V3
VCC_3V3
R415
10K
R414
10K
C38
U10
0.1uF
D
SEL_ENET_IO0
SEL_ENET_IO1
21 SEL_ENET_IO0
21 SEL_ENET_IO1
9
9
9
9
9
9
CPU.TXCLK
CPU.TXD0
CPU.TXD1
CPU.TXD2
CPU.TXD3
CPU.TX_EN
R47
360
9 CPU.MDC
1
56
55
S0
S1
S2
2
4
6
9
11
13
15
18
21
23
25
27
1A1
2A1
3A1
4A1
5A1
6A1
7A1
8A1
9A1
10A1
11A1
12A1
1B1
2B1
3B1
4B1
5B1
6B1
7B1
8B1
9B1
10B1
11B1
12B1
54
52
50
47
45
43
41
39
36
34
32
30
3
5
7
10
12
14
16
20
22
24
26
28
1A2
2A2
3A2
4A2
5A2
6A2
7A2
8A2
9A2
10A2
11A2
12A2
1B2
2B2
3B2
4B2
5B2
6B2
7B2
8B2
9B2
10B2
11B2
12B2
53
51
48
46
44
42
40
37
35
33
31
29
GND.1
GND.2
GND.3
GND.4
8
19
38
49
VCC.1
17
D
EPHY.TXCLK 43
EPHY.TXD0 43
EPHY.TXD1 43
EPHY.TXD2 43
EPHY.TXD3 43
EPHY.TX_EN 43
EPHY.MDC 43
EPHY.MDIO 43
9 CPU.MDIO
C
CPU_GPIO16
CPU_GPIO11
CPU_GPIO12
CPU_GPIO13
CPU_GPIO14
CPU_GPIO17
21
21
21
21
21
21
S2
0
0
0
0
1
1
1
1
CPU_GPIO1 21
CPU_GPIO2 21
S1
0
0
1
1
0
0
1
1
S0
0
1
0
1
0
1
0
1
A1
Z
B1
B2
Z
Z
Z
B1
B2
A2
Z
Z
Z
B1
B2
Z
B2
B1
FUNCTION
DISCONNECT
A1 TO B1
A1 TO B2
A2 TO B1
A2 TO B2
DISCONNECT
A1 TO B1 A2 TO B2
A1 TO B2 A2 TO B1
C
SN74CBTLV16212DGGR
VCC_3V3
C186
U37
0.1uF
SEL_ENET_IO0
SEL_ENET_IO1
1
56
55
S0
S1
S2
2
4
6
9
11
13
15
18
21
23
25
27
3
5
7
10
12
14
16
20
22
24
26
28
B
9 CPU.COL
9 CPU.CRS
9 CPU.RXD0
9 CPU.RXD1
9 CPU.RXD2
9 CPU.RXD3
9 CPU.RX_DV
9 CPU.RX_ER
9 CPU.RX_CLK
R236
A
360
VCC.1
17
1A1
2A1
3A1
4A1
5A1
6A1
7A1
8A1
9A1
10A1
11A1
12A1
1B1
2B1
3B1
4B1
5B1
6B1
7B1
8B1
9B1
10B1
11B1
12B1
54
52
50
47
45
43
41
39
36
34
32
30
EPHY.COL 43
EPHY.CRS 43
EPHY.RXD0 43
EPHY.RXD1 43
EPHY.RXD2 43
EPHY.RXD3 43
EPHY.RX_DV 43
EPHY.RX_ER 43
EPHY.RX_CLK 43
1A2
2A2
3A2
4A2
5A2
6A2
7A2
8A2
9A2
10A2
11A2
12A2
1B2
2B2
3B2
4B2
5B2
6B2
7B2
8B2
9B2
10B2
11B2
12B2
53
51
48
46
44
42
40
37
35
33
31
29
CPU_GPIO15 21
CPU_GPIO3 21
CPU_GPIO7 21
CPU_GPIO8 21
CPU_GPIO9 21
CPU_GPIO10 21
CPU_GPIO5 21
CPU_GPIO4 21
CPU_GPIO6 21
GND.1
GND.2
GND.3
GND.4
8
19
38
49
B
SPECTRUM DIGITAL INCORPORATED
Title:
Page Contents:
ETHERNET MUXES
Size:B
DWG NO
Date:
4
3
2
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
SN74CBTLV16212DGGR
5
A
DM365 Evaluation Module
1
42 o f
50
5
4
3
PHY_1V8
2
1
VDD_1V8RX
VDD_3V3A
SILKSCREEN:
ETHERNET
VCC_3V3
C149
0.1uF
+ C18
4.7uF
C143
0.1uF
C12
4.7uF
C140
0.1uF
C10
4.7uF
VDD_3V3A
C8
P2
47
13
31
38
C148
0.1uF
15
17
18
19
20
TX_CLK/REF_CLK
TXD0
TXD1
TXD2
TXD3
TX+
41
TX-
40
42 EPHY.TX_EN
16
14
TX_EN
TX_ER
RX+
33
RX-
32
FXSD/FXEN
34
NC1
NC2
42
43
REXT
37
LED0/TEST
COL/RMII
CRS/RMII_BTB
LED1/SPD100
RXD0/PHYAD4
RXD1/PHYAD3
LED2/DUPLEX
RXD2/PHYAD2
RXD3/PHYAD1 LED3/NWAYEN
RX_DV/CRSDV/PCS_LPBK
RX_ER/ISO
26
21
22
6
5
4
3
9
11
10
RX_CLK
R202
NO-POP
R201
NO-POP
10K
R216
NO-POP
R17
10K
R20
NO-POP
R14
C
10K
R16
10K
R21
NO-POP
R208
NO-POP
NO-POP
R15
RJ45 HALO HFJ11-2450E-L21
LED2LED2+
LED1LED1+
7
8
NC1
GND
1
4
2
TXD+
TXD-CT
TXD-
3
5
6
RXD+
RXD-CT
RXD-
D
C3
1000pF 2kV
GND_E_ENET
Differential Pair
GND_E_ENET
R195
R217
EPHY.LED2
R2
49.9
Differential Pair
EPHY.TXCLK
EPHY.TXD0
EPHY.TXD1
EPHY.TXD2
EPHY.TXD3
R215
R3
49.9
12
11
10
9
C20
4.7uF
VDDPLL
22
VDDC1
R209
VDDIO1
VDDIO2
U5
VDDRX
VDDRCV
7
24
VDD_1V8PLL
42
42
42
42
42
EPHY.LED0
0.1uF
D
SH1
SH2
MH1
MH2
C11
4.7uF
SH1
SH2
MH1
MH2
C139
0.1uF
VCC_3V3
10K
R4
49.9
NO-POP
R196
C
R5
49.9
VDD_3V3A
6.65K
C9
RN25
RPACK8-33
1
2
3
4
5
6
7
8
42 EPHY.COL
42 EPHY.CRS
42 EPHY.RXD0
42 EPHY.RXD1
42 EPHY.RXD2
42 EPHY.RXD3
42 EPHY.RX_DV
42 EPHY.RX_ER
16
15
14
13
12
11
10
9
PH YAD4
PH YAD3
PH YAD2
PH YAD1
R214
R224
10K
R223
10K
R220
10K
10
R222
10K
B
2
MDC
1
MDIO
R194
0.1uF
27
28
R193
330
INT#/PHYAD0
48
RESET#
30
PD#
R212
VCC_3V3
VCC_3V3
VCC_3V3
R207
R153
R206
NO-POP
NO-POP
NO-POP
VCC_3V3
R211
XI
46
XO
45
10K
R156
NO-POP
B
C150
U6
.1uF
2
EN
GND
VCC
4
OUT
3 R210
R203
22
R154
R204
NO-POP
25MHz
GND1
GND2
GND3
GND4
GND5
GND6
GND7
8
12
23
35
36
39
44
VCC_3V3
VCC_3V3
VCC_3V3
25
42 EPHY.MDC
EPHY.LED2
29
1
42 EPHY.RX_CLK
EPHY.LED0
330
R155
NO-POP
NO-POP
L4
NO-POP
BLM21PG221SN1D
KS8001L
L42
1.5K
BLM21PG221SN1D
R205
NO-POP
42 EPHY.MDIO
GND_E_ENET
EPHY.INTERRUPTn
VCC_3V3
VCC_3V3
L5
VDD_3V3A
BLM21PG221SN1D
SPECTRUM DIGITAL INCORPORATED
A
TP7
TP-30
A
PHY_1V8
R197
10K
R192
NO-POP
VDD_1V8PLL
L49
BLM21PG221SN1D
DM365 Evaluation Module
Title:
Page Contents:
ETHERNET PHY
Size:B
DWG NO
Revision:
A
VDD_1V8RX
21 ENET_RESETn
L6
Date:
5
4
3
510842-0001
BLM21PG221SN1D
2
Friday, October 03, 2008
Sheet
1
43 o f
50
5
4
3
2
1
D
D
VCC_5V
MSP430_3V3
U36
1
3
2
VIN
EN
VOUT
6
FB
NR
5
4
GND
MSP430_3V3
R185
51K
TPS79301-DBV
C
+
C121
10uF 6.3V
MP430_IO4
1
TP4
TEST POINT
MP430_IO3
1
TP3
TEST POINT
C126
0.1uF
R187
30.1K
VCC_3V3
C
R176
10K
MP430_IO2
1
TP6
TEST POINT
21 MSP430_INT
MSP430_3V3
MSP430_3V3
VCC_3V3
U2
R151
100
U1
R161
10K
MP430_IO0
MP430_IO0
3
1
2
B
+
TSOP34840
C1
10uF 6.3V
1
VCC.1
2
P1.0/TACLK/ACLK/A0+
3
P1.1/TA0/A0-/A4+
4
P1.2/TA1/A1+/A4-
MP430_IO1
MP430_IO1
5
P1.3/VREF/A1-
MP430_IO2
MP430_IO2
6
P1.4/SMCLK/A2+/TCK
7
P1.5/TA0/A2-/SCLK/TMS
R163
47K
VSS
14
HEADER 7X2
XIN/P2.6/TA1
13
MP430_IO4
MP430_IO4
XOUT/P2.7
12
MP430_IO3
MP430_IO3
TEST/SBWTCK
11
RST/NMI/SBWTDIO
10
P1.7/A3-/SDI/SDA/TDO/TDI
9
P1.6/TA1/A3+/SDO/SCL/TDI/TCLK
8
2
4
6
8
10
12
14
430_TDO/TDI
VCC_TOOL
VCC_MSP
XOUT
TEST/VPP
ACLK
ACLKEN
TCLKEN
TDO/TDI
TDI/VPP
TMS
TCK
GND
RST/NMI
NC1
430_TDO/TDI
1
3
5
7
9
11
13
R152
330
B
C117
0.001uF
J3
SPY-BY-WIRE INTERFACE
MSP430F2013IPW
14,48 PWCTR_OUT1
9,20,28,32,34,35,36,37,39,40 I2C_SCLK
9,20,28,32,34,35,36,37,39,40 I2C_DATA
SPECTRUM DIGITAL INCORPORATED
A
Title:
DM365 Evaluation Module
Page Contents:
MSP430 & IR INTERFACE
Size:B
DWG NO
Date:
5
4
3
2
A
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
44 o f
50
5
3
KEY_B0
R419
4
3
SW6
C386
100pF
A
A1
SW7
B
B1
SW8
A
A1
PUSHBUTTON SW
B
B1
KEY_B1
R430
A
A1
A
A1
R418
1.5K
D
SW13
B
B1
A
A1
PUSHBUTTON SW
R416
1.5K
B
B1
PUSHBUTTON SW
R431
1.5K
R429
1.5K
0
C
C409
100pF
A
A1
SW15
B
B1
A
A1
PUSHBUTTON SW
SW16
B
B1
A
A1
PUSHBUTTON SW
R428
1.5K
R449
A
A1
PUSHBUTTON SW
SW14
KEY_B3
PUSHBUTTON SW
SW12
B
B1
R417
1.5K
3
B
B1
R403
1.5K
SW11
B
B1
PUSHBUTTON SW
R437
A
A1
PUSHBUTTON SW
R405
1.5K
SW10
KEY_B2
B
B1
0
C405
100pF
C3
1
SW9
A
A1
PUSHBUTTON SW
R407
1.5K
D
3
2
0
SW17
B
B1
A
A1
PUSHBUTTON SW
R439
1.5K
B
B1
PUSHBUTTON SW
R438
1.5K
R436
1.5K
0
SW18
C412
100pF
B
A
A1
SW19
B
B1
A
A1
PUSHBUTTON SW
SW20
B
B1
A
A1
PUSHBUTTON SW
SW21
B
B1
A
A1
PUSHBUTTON SW
B
B1
B
PUSHBUTTON SW
VCC_3V3
R443
1.5K
R442
1.5K
R441
1.5K
R448
1.5K
R440
15K
VCC_3V3
KEY_A3
R410
15K
3
C411
100pF
VCC_3V3
KEY_A2
R404
15K
3
C379
100pF
VCC_3V3
KEY_A1
R406
15K
A
3
SPECTRUM DIGITAL INCORPORATED
C377
100pF
Title:
KEY_A0
3
C378
100pF
Page Contents:
SWITCHES
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
45 o f
50
5
4
3
2
1
VCC_3.3V
D
D
R388
330
R387
330
R386
330
R385
330
R384
330
R383
330
R382
330
R381
330
DS2
DS3
DS4
DS5
DS6
DS7
DS8
DS9
LED
LED
LED
LED
LED
LED
LED
LED
C
C
23
LED0
23
LED1
23
LED2
23
LED3
22
LED4
22
LED5
22
LED6
22
LED7
LED0
LED1
LED2
LED3
LED4
LED5
LED6
LED7
B
B
ALT_3V3
R213
10K
SW3
A
A1
B
B1
33
R221
R219
0
PB_SWITCH 21
PUSHBUTTON SW
C154
A
SPECTRUM DIGITAL INCORPORATED
1uF
Title:
Page Contents:
SWITCHES
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
46 o f
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1
Vvo_bt = 1 + ( R33/R29_R28) *1.25
D
C32
D
R28
75K
27pF
1
R33
392K
R29
130K
R22
33
BHT1
BA2032SM
R24
2
499
VCC_5V
VIN_MAIN
L16
BLM41P750SPT
L13
1
2
3
4
4.7uH
C25
2.2uF
VR0
VOUT
VO1R8
VO1R2
12
11
10
9
V_CTRL
PWMON
CS
XRESET
C
VO_BT
SW
PGND
AGND
D2
MBR0530T1
U9
PWRPAD
VBAT
FB
FBG
VBK
17
16
15
14
13
1V8_BB_UP
C182
2.2uF
TPS65510_PGND
TPS65510_AGND
5
6
7
8
C183
2.2uF
1V2_BB_UP
C
C26
2.2uF
R25
10K
R26
10K
TPS65510
TPS65510_XRESET 14
TPS65510_CS 14
TP10
1
R30
0
TEST POINT
C24
2.2uF
B
B
PL1
1
PL2
2
PLANE LINK
TPS65510_AGND
1
2
PLANE LINK
TPS65510_PGND
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
POWER SUPPLY TPS65510
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
47 o f
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5
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VCC1_IN
1
VCC2_IN
VOUT1_TPS65530
R55
VOUT1_TPS65530
xxxx 1%
R49
xxx 1%
+
C43
22uF
VCC_1V2
VOUT5_TPS65530
L57
L15
VCC_CCD15V5
L14
4.7uH
21 CPU_VSEL0
R260
21 CPU_VSEL1
R249
Q3
BSS138 G
G
10K
D
D
+
Q2
BSS138
S
S
D
VOUT2_TPS65530
GND_PCTL
R54
C42
120pF
VOUT3_TPS65530
C37
10uF
332K
R252
R254
D
VOUT2_TPS65530
180K
BLM41P750SPT
VCC_3V3
VOUT8_TPS65530
L63
475K
C179
VCC_CCD_N7V5
L64
BLM41P750SPT
C45
47uF
R229
R263 VCC3_IN
NO-POP
MTR_3V3
L51
NO-POP
GND_PCTL
L11
4.7uH
L18
R234
+
C35
22uF
C30
22uF
VOUT4_TPS65530
0
BLM41P750SPT
24
23
22
21
20
19
18
17
16
15
14
13
22
SW3S
VCC3
FB3
FB1
PGND1
SW1
VCC1
FB2
VOUT2
SW2I
PGND2
SW2S
R226
8
7
L8
C22
22uF
Q1A
VEC2611
R40
2
0
25
26
27
28
29
30
31
32
33
34
35
36
+
C174
NO-POP
R38
C187
1uF
C175
22pF
R37
392K
0
R36
130K
C29
150uF
R35
21 CPLD_B-ADJ
VCC7_IN
R237
10
10K
L10
PGND3
SW8LD
LL8
SW8HD
PS
FB8
FBG7/8
B-ADJ
FBC
CIN
FBV
SW7
VCC2
REF
AGND
S/S
EN7
XSLEEP
ENAFE
FB4
VOUT4
SW4I
PGND4
SW4S
12
11
10
9
8
7
6
5
4
3
2
1
C214
2.2uF
C
14,44 PWCTR_OUT1
C56
0.1uF
GND_PCTL
R256
332K
R261
82K
+
L19
R60
10K
R58
10K
EN7
21
ENAFE
21
R59
10K
C58
47uF
4.7uH
GND_PCTL
37
38
39
40
41
42
43
44
45
46
47
48
49
1
C
BL_6V8_RTN
U14
TPS65530/1RSL
PGND5/7
SW5
SWOUT
VCC5
FB5
VCC6
SW6
FB6
S/S56
EN56
SEQ56
VCC4
PWR_PAD
6
5
Q1B
VEC2611
+
BLM41P750SPT
AFE_3V3
L65
R39
4
VOUT8_TPS65530
2.4uH
BLM41P750SPT
3.3uH
221K
3
+
C23
22uF
VOUT6_TPS65530
+
825K
GND_PCTL
GND_PCTL
+
BLM41P750SPT
VCC_1V8
L54
10K
VOUT3_TPS65530
R264
NO-POP
BLM41P750SPT
C57
22uF
+
R48
332K
15uH
GND_PCTL
GND_PCTL
GND_PCTL
VOUT4_TPS65530
+
C155
10uF
BL_6V8
B
D3
+
C159
10uF
VCC5_IN
MBR0530T1
R34
680K
R230
47.5K
C177
SEQ56
EN56
0.1uF
VCC_5V
B
VCC1_IN
L61
C176
21
21
R251
10K
NO-POP
BLM41P750SPT
GND_PCTL
R253
10K
VCC2_IN
L66
VOUT5_TPS65530
GND_PCTL
+
BLM41P750SPT
C39
22uF
D4
MBR0530T1
L12
15uH
GND_PCTL
VCC3_IN
L56
+
C162
22uF
VCC7_IN
+
R232
560K
BLM41P750SPT
C178
3.3uF
R52
VCC6_IN
137K
VCC4_IN
VCC_5V
L7
L67
BLM41P750SPT
R51
825K
A
R231
40.2K
+
L17
15uH
D5
VOUT6_TPS65530
MBR0530T1
VCC5_IN
SPECTRUM DIGITAL INCORPORATED
L60
+
C50
22uF
GND_PCTL
C202
0.1uF
C46
0.1uF
+
BLM41P750SPT
C217
22uF
VCC6_IN
A
DM365 Evaluation Module
Title:
C41
22uF
VCC4_IN
BLM41P750SPT
Page Contents:
POWER SUPPLY TPS65550
Size:B
DWG NO
Revision:
A
L62
510842-0001
GND_PCTL
BLM41P750SPT
5
4
3
2
Date:
Friday, October 03, 2008
Sheet
1
48 o f
50
5
4
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1
21 ENABLE_LCD_15V
D
D
R143
10K
VCC_5V
U34
+
C114
10uF
R144
0
6
EN
7
FSW
3
SS
4
GND
SW
L
OUT
9
FB
5
PGND
L35
10
1
11
C408
47nF
TPS61080
VIN
PWRPAD
2
4.7uH
15V_LCD
R432
+
100
R139
560K 1%
R1
8
R1 = R2( ( VOUT/1.229) - 1 )
C110
10uF
C111
33pF
R427
49.9K 1%
R2
R1 = 49.9k( ( 15/1.229) - 1 )
R1 = 49.9k * (
C
R1 = 559K
11.205 )
C
-> 560K
LCD_3V3
B
B
VCC_5V
U31
TPS74701
L33
L32
BLM41P750SPT
C103
2.2uF
IN1
IN2
4
BIAS
7
SS
FB
8
5
EN
GND
6
VOUT2
VOUT1
PG
10
9
C104
R127
20.5K
3
C376
5.6pF
10uF
BLM41P750SPT
R121
4.99K
PP1
C375
0.001uF
1
2
11
VOUT = 0.8 * ( 1+R401/R402 )
23 ENABLE_LCD_3V3
R402
10K
SPECTRUM DIGITAL INCORPORATED
A
Title:
Page Contents:
POWER SUPPLY
Size:B
DWG NO
Date:
5
4
3
2
A
DM365 Evaluation Module
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
49 o f
50
5
4
F1
1
SILKSCREEN:
5V IN
D
2
3
2
1
TP5
TP-30
VCC_5V
D
F_4.0A
J7
CENTER
SHUNT
SLEEVE
NO-POP
R199
+
R189
220
2.5 MM JACK
RASM712
C15
47uF
R119 = ( VOUT/VREF-1) X R118
R119 = ( 1.8/1.1834 -1) X R118
D1
SMCJ6A
R119 = 0.52 X R118
DS1
GREEN
VCC_DEC_1V8
C
C99
10uF
R119
15.7K
VCC_5V
C
C374
0.1uF
U30
TP40
TP-60
TP1
TP-60
TP2
TP-60
TP52
TP-60
C105
10uF
TP51 TP41
TP-60 TP-60
5
6
1IN_1
1IN_2
4
1EN
3
1GND
11
12
2IN_1
2IN_2
VCC_5V
C106
10uF
GND Test Points
10
R408
10K
23
24
25
2RESET
22
2OUT_1
2OUT_2
2SENSE
17
18
19
2GND
1
2
7
8
13
14
NC.1
NC.2
NC.7
NC.8
NC.13
NC.14
NC.15
NC.16
NC.20
NC.21
NC.26
NC.27
15
16
20
21
26
27
THERMAL_PAD
R409
10K
1OUT_1
1OUT_2
1FB/SENSE
R118
30.1K
VCC_DEC_3V3
C100
10uF
C373
0.1uF
B
TPS767D301
29
EN_DEC3V3
28
2EN
9
B
EN_DEC1V8
1RESET
SPECTRUM DIGITAL INCORPORATED
A
Title:
DM365 Evaluation Module
Page Contents:
POW ER INPUT
Size:B
DWG NO
Date:
5
4
3
2
A
Revision:
A
510842-0001
Friday, October 03, 2008
Sheet
1
50 o f
50
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