Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 1 µMP Series GEN II Up to1800 Watts Configurable Total Power: Up to1800 Watts Input Voltage: 85-264 Vac 120-300 Vdc # of Outputs: Up to 12 Special Features • Full Medical EN60601 approval • PMBus monitor/control of input functions • High efficiency • Constant current limit protection • High power density - µMP04:10.8 W / in3 - µMP10:15.1 W / in3 - µMP16:22.9 W / in3 • Low Noise Intelligent fan (speed control/fault status),36% Reduction from GEN I • Downloadable GUI from website • Optional conformal coating • Industrial temp range (-40 OC to 70 OC) • No preload required • Military STD Shock/Vibration (> 50G’s) • Low cost • IEC, Terminal Block or Barrier Strip Input Connection Options • Low profile 1U size • Superior Aesthetics over GEN I Safety UL TUV CB CE CQC Medical UL60950-1/CSA22.2 No.60950-1/ ES60601-1/CSA22.2 No.60601-1 EN60950-1/EN60601-1 Certificate and report LVD+RoHS Approved 2*MOPP Product Descriptions The µMP series GEN II power supply is a configurable power supply with market-leading density and efficiency. It features a very wide 85 to 264Vac input voltage range and employs active power factor correction to minimize input harmonic current distortion and to ensure compliance with the international EN61000-3-2 standard – they have a power factor of 0.99 typical. The power supplies also feature active AC inrush control, to automatically limit inrush current at turn-on to 40A maximum. The µMP series GEN II can deliver up to 1800 Watts maximum from the µMP16 case. The supply has a Low profile 1U size and has a power density of more than 22.9 watts per cubic inch. When fed with a 180 to 264 Vac input, the µMP Series GEN II can achieve a very high - 91% typical efficiency at full case load. Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 2 Ordering Information µMPXY - SKW - S2E - S2Q - ILL - … ① ① - ② Case Type 00 - ③ A ④ Case Size where X = 04 = 1.57” x 3.5” x 10.0”, 400W - 600W, 4 Slots 10 = 1.57” x 5.0” x 10.0”, 1000W-1200W, 6 Slots 16 = 1.57” x 5.0” x 10.0”, 1200W-1800W**, 6 Slots ** See Input Derating table for µMP16 Input Type where Y = T = Terminal Block C = IEC Connector C14 S = Barrier Strip ② Module / Voltage Module Codes: S2 # = 200W Single O/P (1 slot) SK # = 1000W Single O/P (3 slot) I # # = 96W Dual O/P, Isolated GND (1 Slot) # = Voltage Codes: See voltage code table First digit 0-9 = Parallel Code Second Digit 0 = Forward Air 1 = Reverse Air 2 = Not Used 3 = Global Enable 5 = Opt 1 + Opt 3 ③ Case Option Codes ④ Software Code Standard = A Modified Standards = factory assigned ⑤ Hardware Code Standard = none Modified Standards = factory assigned Artesyn Embedded Technologies - ### ⑤ Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 3 Case Size Line-Up Max Output Power Case Dimensions mm (inch) Connections Max Continuous Current 85-264Vac 180-264Vac µMP04 - 4 Slots 400W 600W 256.9 x 88.9 x 40.0 (10.11” x 3.5” x 1.57”) IEC Terminal-Block Barrier-Strip 9.91A µMP10 - 6 Slots 1000W 1200W 256.9 x 127 x 40.0 (10.11” x 5.0” x 1.57”) IEC Terminal-Block Barrier-Strip 13.87A µMP16 - 6 Slots 1000W 1800W 256.9 x 127 x 40.0 (10.11” x 5.0” x 1.57”) IEC Terminal-Block Barrier-Strip 13.87A Paramater 85-99Vac 100-140Vac 180-199Vac 200-264Vac Designed For 1000W 1200W 1600W 1800W Safety Label and Evaluation 1000W 1000W 1600W 1600W µMP16 Input Power Derating Case Input Type Terminal Block (T) Artesyn Embedded Technologies IEC Connector C14 (C) Barrier Strip (S) Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 4 Voltage Codes Standard Output Ratings Signal Output Three Slots 1000W Max S2 # SK # Module Identification Code (#) Volts A Output Current V1 (A) V1 (A) 2.0 40.0 - B 2.2 40.0 - C 3.0 40.0 - D 3.3 40.0 - E 5.0 36.0 - F 5.2 34.0 - G 5.5 32.0 - H 6.0 30.0 84.0 I 8.0 25.0 J 10.0 K Module Group One Slot 96W Max each output I## Output Range (V) 0.9 to 3.6 Output Current V1 (A) V2 (A) NA NA NA 4.0 4.0 4.0 4.0 4.0 4.0 4.0 4.0 84.0 4.0 4.0 24.0 84.0 4.0 4.0 11.0 22.0 84.0 4.0 4.0 L 12.0 20.0 84.0 4.0 4.0 M 14.0 17.0 71.4 4.0 4.0 N 15.0 16.0 66.7 4.0 4.0 O 18.0 13.0 42.0 4.0 4.0 P 20.0 12.0 42.0 4.0 4.0 Q 24.0 10.0 42.0 4.0 4.0 R 28.0 8.6 35.7 3.4 3.4 S 30.0 8.0 33.3 3.2 3.2 T 33.0 7 21.0 NA U 36.0 6.7 21.0 NA V 42.0 5.7 21.0 W 48.0 5.0 21.0 X 54.0 4.4 18.5 Y 60.0 4.0 16.7 33.0 to 60.0 12V Module 24V Module 48V Module 12.0 to 30.0 5V Module 4.0 6.0 to 15.0 Output Range (V) NA 4.0 3.2 to 6.0 Module Group NA NA 3.3 to 30.0 NA NA NA * Note: For 1000W module, Output Voltages from 33.0-60.0V are available. Contact factory for availability of other output ranges Artesyn Embedded Technologies Dual ISO Module One Slot 240W Max Dual Output 3V3 Module Module Output Voltage Code Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 5 Parallel Codes (case option code - first digit) Parallel Codes Code Slots in Parallel Code Slots in Parallel 0 No module in parallel 9 1,2,3,4,5&6 1 1&2 A 1&2; 3&4 2 2&3 B 1,2&3; 4&5 3 3&4 C 1,2,3&4; 5&6 4 4&5 D 1&2; 3&4; 5&6 5 5&6 E 1,2&3; 4,5&6 6 1&2&3 H 3,4&5 7 1,2,3&4 J 3,4,5&6 8 1,2,3,4&5 K 4,5&6 Air Flow Direction (case option code - second digit) 0=Forward Air 1=Reverse Air 2=Not Used 3= Global Enable 5=Opt 1+ Opt 3 µMP04 µMP10 / µMP16 Slot 1 Artesyn Embedded Technologies Slot 1 Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 6 Electrical Specifications Absolute Maximum Ratings Stress in excess of those listed in the “Absolute Maximum Ratings” may cause permanent damage to the power supply. These are stress ratings only and functional operation of the unit is not implied at these or any other conditions above those given in the operational sections of this TRN. Exposure to any absolute maximum rated condition for extended periods may adversely affect the power supply’s reliability. Table 1. Absolute Maximum Ratings: Parameter Model Symbol Min Typ Max Unit All models VIN,AC 85 85 120 120 - 264 264 350 300 Vac Vac Vdc Vdc µMP04 µMP10 µMP16 PO,max PO,max PO,max - - 600 1200 1800 W W W Input to outputs Input to safety ground Outputs to outputs Outputs to safety ground All models All models All models All models - - - 2550 2550 500 500 Vdc Vdc Vdc Vdc Ambient Operating Temperature Forward air Reverse air All models All models TA TA -401 -40 - 701 40 OC Storage Temperature All models TSTG -40 - 85 OC Input Voltage AC continuous operation (ITE) AC continuous operation (Medical) DC continuous operation (ITE) DC continuous operation (Medical) Maximum Output Power Isolation Voltage OC Humidity (non-condensing) Operating Non-operating All models All models 10 10 - 95 95 % % Operating Non-operating All models All models - - 300002 30000 feet feet Altitude Note 1 - Derate each output 2.5% per degree from 50OC to 70OC. Cold start soak -20OC, allow 10 minutes warm-up before all outputs are with in specification. Reverse air to 40OC Max due to fan derating. Note 2 - Derate linear to 50% from 10000 - 30000 feet . Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 7 Input Specifications Table 2. Input Specifications: Parameter Conditions/Case Symbol Min Typ Max Unit Operating Input Voltage, AC All VIN,AC 85 115/230 264 Vac Operating Input Voltage, DC All VIN,DC 120 - 350/300 Vdc Input AC Frequency All f IN,AC 47 50/60 440 Hz Maximum Input Current (IO = IO,max, ISB = ISB,max) µMP04 µMP10 µMP16 IIN,max - - 9.91 13.87 13.87 ARMS Standby Input Current (VO=Off, ISB = 0A) µMP16 IIN,standby - - 500 mARMS Standby Input Power (VO =Off, ISB = 0A) µMP10 µMP16 PIN,standby - - 13 13 No Load Input Current (VO =On, IO = 0A, ISB = 0A) µMP16 IIN,no_load - - 500 Harmonic Line Currents All THD Power Factor All - 0.99 - Inrush Current VIN,AC = 264Vac - - 40 APK µMP04 µMP10 µMP16 - - 10 16 16 A VIN,AC = 240Vac f IN,AC = 50/60Hz - - 3001 µA Input Fuse Leakage Current to Earth Ground PFC Switching Frequency Operating Efficiency @ 25OC Global Inhibit/Enable mARMS Per EN61000-3-2 All f SW,PFC 40 - 60 KHz IO = IO,max VIN,AC = 180Vac to 264Vac η - 91 - % TTL, Logic “1” and Logic “0”; fan off when unit is inhibited Note 1 - Leakage current of standard uMP04 is >300uA. There is low leakage current version(<250uA) but EMI is level A. Artesyn Embedded Technologies W Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 8 132W - 3V3 Module Output Specifications (S2A, S2B, S2C, S2D) Table 3. 3.3V Module Output Specifications: Parameter Condition Symbol Min Typ Max Unit All VO 3.267 3.3 3.333 Vdc Inclusive of line, load, temperature change and warm-up drift ±%VO - - 0.4 % Margining High 3.432 - 3.498 Vdc Margining Down 3.102 - 3.168 Vdc VO - - 50 mVPK-PK IO - - 40 A - - 5 %IO,max 20 - - %IO,max - - 2000 µF Factory Set Point Accuracy Output Regulation1 Measure with a 0.1µF ceramic capacitor in parallel with a 10µF tantalum capacitor, 0 to 20MHz bandwidth Output Ripple, pk-pk Output Current VO Current Share Accuracy 20% to 100% IO,max VO Minimum Current Share Loading Load Capacitance Start up VO Dynamic Response Peak Deviation Settling Time VO Long Term Stability Max change over 24 hours Note 1 - 0.4% or 30mV which ever is greater Artesyn Embedded Technologies 50% load change, slew rate = 1A/µs ±%VO ts - - 5 300 % µSec After thermal equilibrium (30 mins) ±%VO - - 0.1 % Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 9 180W - 5V Module Output Specifications (S2E, S2F, S2G, S2H) Table 4. 5V Module Output Specifications: Parameter Condition Symbol Min Typ Max Unit All VO 4.95 5.00 5.05 Vdc Inclusive of line, load, temperature change and warm-up drift ±%VO - - 0.4 % Margining High 5.2 - 5.3 Vdc Margining Down 4.7 - 4.8 Vdc VO - - 50 mVPK-PK IO - - 36 A - - 5 %IO,max 20 - - %IO,max - - 2000 µF Factory Set Point Accuracy Output Regulation1 Measure with a 0.1µF ceramic capacitor in parallel with a 10µF tantalum capacitor, 0 to 20MHz bandwidth Output Ripple, pk-pk Output Current VO Current Share Accuracy 20% to 100% IO,max VO Minimum Current Share Loading Load Capacitance Start up VO Dynamic Response Peak Deviation Settling Time VO Long Term Stability Max change over 24 hours Note 1 - 0.4% or 30mV which ever is greater Artesyn Embedded Technologies 50% load change, slew rate = 1A/µs ±%VO ts - - 5 300 % uSec After thermal equilibrium (30 mins) ±%VO - - 0.1 % Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 10 240W - 12V Module Output Specifications (S2I, S2J, S2K, S2L, S2M, S2N) Table 5. 12V Module Output Specifications: Parameter Condition Symbol Min Typ Max Unit All VO 11.88 12.00 12.12 Vdc Inclusive of line, load, temperature change and warm-up drift ±%VO - - 0.4 % Margining High 12.48 - 12.72 Vdc Margining Down 11.28 - 11.52 Vdc VO - - 120 mVPK-PK IO - - 20 A - - 5 %IO,max 20 - - %IO,max - - 2000 µF Factory Set Point Accuracy Output Regulation1 Measure with a 0.1µF ceramic capacitor in parallel with a 10µF tantalum capacitor, 0 to 20MHz bandwidth Output Ripple, pk-pk Output Current VO Current Share Accuracy 20% to 100% IO,max VO Minimum Current Share Loading Load Capacitance Start up VO Dynamic Response Peak Deviation Settling Time VO Long Term Stability Max change over 24 hours Note 1 - 0.4% or 30mV which ever is greater Artesyn Embedded Technologies 50% load change, slew rate = 1A/µs ±%VO ts - - 5 300 % uSec After thermal equilibrium (30 mins) ±%VO - - 0.1 % Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 11 240W - 24V Module Output Specifications (S2O, S2P, S2Q, S2R, S2S) Table 6. 24V Module Output Specifications: Parameter Condition Symbol Min Typ Max Unit All VO 23.76 24.00 24.24 V Inclusive of line, load, temperature change and warm-up drift ±%VO - - 0.4 % Margining High 24.96 - 25.44 V Margining Down 22.56 - 23.04 V VO - - 240 mVPK-PK IO - - 10 A - - 5 %IO,max 20 - - %IO,max - - 2000 µF Factory Set Point Accuracy Output Regulation1 Measure with a 0.1µF ceramic capacitor in parallel with a 10µF tantalum capacitor, 0 to 20MHz bandwidth Output Ripple, pk-pk Output Current VO Current Share Accuracy 20% to 100% IO,max VO Minimum Current Share Loading Load Capacitance Start up VO Dynamic Response Peak Deviation Settling Time VO Long Term Stability Max change over 24 hours Note 1 - 0.4% or 30mV which ever is greater Artesyn Embedded Technologies 50% load change, slew rate = 1A/µs ±%VO ts - - 5 300 % uSec After thermal equilibrium (30 mins) ±%VO - - 0.1 % Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 12 240W - 48V Module Output Specifications (S2T, S2U, S2V, S2W, S2X, S2Y) Table 7. 48V Module Output Specifications: Parameter Condition Symbol Min Typ Max Unit All VO 47.52 48.00 48.48 Vdc Inclusive of line, load, temperature change and warm-up drift ±%VO - - 0.4 % Margining High 49.92 - 50.88 Vdc Margining Down 45.12 - 46.08 Vdc VO - - 480 mVPK-PK IO - - 5 A - - 5 %IO,max 20 - - %IO,max - - 2000 µF Factory Set Point Accuracy Output Regulation1 Measure with a 0.1µF ceramic capacitor in parallel with a 10µF tantalum capacitor, 0 to 20MHz bandwidth Output Ripple, pk-pk Output Current VO Current Share Accuracy 20% to 100% IO,max VO Minimum Current Share Loading Load Capacitance Start up VO Dynamic Response Peak Deviation Settling Time VO Long Term Stability Max change over 24 hours Note 1 - 0.4% or 30mV which ever is greater Artesyn Embedded Technologies 50% load change, slew rate = 1A/µs ±%VO ts - - 5 300 % uSec After thermal equilibrium (30 mins) ±%VO - - 0.1 % Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 13 1000W - 12V Module Output Specifications (SKH,SKI, SKJ, SKK, SKL, SKM, SKN) Table 8. 12V Module Output Specifications: Parameter Condition Symbol Min Typ Max Unit All VO 11.88 12.00 12.12 Vdc Inclusive of line, load, temperature change and warm-up drift ±%VO - - 0.4 % Margining High 12.48 - 12.72 Vdc Margining Down 11.28 - 11.52 Vdc VO - - 120 mVPK-PK IO - - 84 A - - 5 %IO,max 20 - - %IO,max - - 2000 µF Factory Set Point Accuracy Output Regulation1 Measure with a 0.1µF ceramic capacitor in parallel with a 10µF tantalum capacitor, 0 to 20MHz bandwidth Output Ripple, pk-pk Output Current VO Current Share Accuracy 20% to 100% IO,max VO Minimum Current Share Loading Load Capacitance Start up VO Dynamic Response Peak Deviation Settling Time VO Long Term Stability Max change over 24 hours Note 1 - 0.4% or 30mV which ever is greater Artesyn Embedded Technologies 50% load change, slew rate = 1A/µs ±%VO ts - - 5 300 % uSec After thermal equilibrium (30 mins) ±%VO - - 0.1 % Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 14 1000W - 24V Module Output Specifications (SKO, SKP, SKQ, SKR, SKS) Table 9. 24V Module Output Specifications: Parameter Condition Symbol Min Typ Max Unit All VO 23.76 24.00 24.24 Vdc Inclusive of line, load, temperature change and warm-up drift ±%VO - - 0.4 % Margining High 12.48 - 12.72 Vdc Margining Down 11.28 - 11.52 Vdc VO - - 240 mVPK-PK IO - - 42 A - - 5 %IO,max 20 - - %IO,max - - 2000 uF - - 5 300 % uSec 0.1 % Factory Set Point Accuracy Output Regulation1 Measure with a 0.1µF ceramic capacitor in parallel with a 10µF tantalum capacitor, 0 to 20MHz bandwidth Output Ripple, pk-pk Output Current VO Current Share Accuracy 20% to 100% IO,max VO Minimum Current Share Loading Load Capacitance Start up VO Dynamic Response Peak Deviation Settling Time VO Long Term Stability Max change over 24 hours Note 1 - 0.4% or 30mV which ever is greater Artesyn Embedded Technologies 50% load change, slew rate = 1A/µs ±%VO ts After thermal equilibrium (30 mins) ±%VO Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 15 1000W - 48V Module Output Specifications (SKT, SKU, SKV, SKW, SKX, SKY) Table 10. 48V Module Output Specifications: Parameter Condition Symbol Min Typ Max Unit All VO 47.52 48.00 48.48 Vdc Inclusive of line, load, temperature change and warm-up drift ±%VO - - 0.4 % Margining High 49.92 - 50.88 Vdc Margining Down 45.12 - 46.08 Vdc VO - - 480 mVPK-PK IO - - 21 A - - 5 %IO,max 20 - - %IO,max - - 2000 uF Factory Set Point Accuracy Output Regulation1 Measure with a 0.1µF ceramic capacitor in parallel with a 10µF tantalum capacitor, 0 to 20MHz bandwidth Output Ripple, pk-pk Output Current VO Current Share Accuracy 20% to 100% IO,max VO Minimum Current Share Loading Load Capacitance Start up VO Dynamic Response Peak Deviation Settling Time VO Long Term Stability Max change over 24 hours Note 1 - 0.4% or 30mV which ever is greater Artesyn Embedded Technologies 50% load change, slew rate = 1A/µs ±%VO ts - - 5 300 % uSec After thermal equilibrium (30 mins) ±%VO - - 0.1 % Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 16 96W/96W - Dual ISO Module Output Specifications (I##)1 Table 11. 3.3-28V Module Output Specifications: Parameter Condition Symbol Min Typ Max Unit All VO - - 1 % Output Regulation2 Inclusive of line, load, temperature change and warm-up drift ±%VO - - 0.4 % Output Ripple, pk-pk Measure with a 0.1µF ceramic capacitor in parallel with a 10µF tantalum capacitor, 0 to 20MHz bandwidth VO - - 1 % IO - - 4 A - - 2000 µF Factory Set Point Accuracy Output Current Load Capacitance Start up VO Dynamic Response Peak Deviation Settling Time VO Long Term Stability Max change over 24 hours Note 1 - ## see voltage codes in page 4 Note 2 - 0.4% or 30 mV which ever is greater Artesyn Embedded Technologies 50% load change, slew rate = 1A/µs ±%VO ts - - 5 300 % uSec After thermal equilibrium (30 mins) ±%VO - - 0.1 % Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 17 System Timing Specifications Table 12. System Timing Specifications: Label Parameter Min Typ Max Unit T1 Delay from AC being applied to VSB being within regulation - - 1500 mSec T2 Delay from AC being applied to output voltages being within regulation. - - 2000 mSec T3 VO rise time, 10%VO to VO in regulation - - 50 mSec T4 Delay from output voltages within regulation limits to Global DC OK asserted high. Measured from last module going to regulation to Global DC OK assertion - - 20 mSec T5 Delay from loss of AC to de-assertion of Global DC OK 15 - - mSec T6 Delay from Global DC OK de-asserted to output voltages dropping out of regulation limits. 1 T7 Hold up time - time all output voltages, including VSB, stay within regulation after loss of AC. 16.7 - - mSec T8 Delay from loss of AC input to Input AC OK going to high. - - 5 mSec T9 Delay from VSB being within regulation to output voltages being within regulation. 50 - 2000 mSec Artesyn Embedded Technologies mSec Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 18 System Timing Specifications Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 19 µMP16 Case Performance Curves Figure 1: µMP16T-S2W-00-A Turn-on delay via AC mains – Vin = 90Vac Full Load: IO = 5A , ISB = 2A Ch 1: AC Mains Ch 2: VSB Ch 3: VO Ch 4: Global DC OK Figure 2: Figure 3: µMP16T-S2W-00-A Hold-up Time - Vin = 90Vac / 63Hz / 0° ° Full Load: IO = 5A, ISB= 2A Ch 1: AC Mains Ch 2: VSB Ch 3: VO Ch 4: Global DC OK Figure 4: Figure 5: Figure 6: Ch 1: VIN µMP16T-S2W-00-A Start up Inrush Current - Vin = 264Vac Full Load: Io = 5A , Isb = 2A, Turn On Phase = 90deg Ch 2: IIN Artesyn Embedded Technologies µMP16T-S2W-00-A Turn-on delay via Global inhibit – Vin = 90Vac Full Load: IO = 5A, ISB = 2A Ch 1: AC Mains Ch 2: Global inhibit Ch 3: VO Ch 4: Global DC OK µMP16T-S2W-00-A Hold-up time - Vin = 264Vac / 47Hz / 0° ° Full Load: IO = 5A, ISB = 2A Ch 1: AC Mains Ch 2: VSB Ch 3: VO Ch 4: Global DC OK Ch 1: IIN µMP16T-S2W-00-A Input Current Waveform - Vin = 90Vac Full Load: IO = 5A, ISB = 2A Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 20 µMP16 Case Performance Curves µMP16-SKW-SKW-30-A Efficiency Curves 93 Efficiency (%) 90 87 84 81 78 75 0.0 6.3 12.5 18.8 25.0 Output Current (A) Figure 7: 31.3 µMP16T-SKW-SKW-30-A Efficiency Curves @ 25 degC ----- 90 Vac ----- 115 Vac ----- 230 Vac ----- 264 Vac Loading: IO = 10% increment to 37.5A, ISB = 0A Artesyn Embedded Technologies 37.5 Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 21 240W 12V Module Performance Curves Figure 8: Ch 1: VO µMP16T-S2L-00- A Output Voltage Startup Characteristic Load: IO= 20A Figure 9: Ch 1: VO Figure 10: µMP16T-S2L-00-A Transient Response – VO Deviation 25% to 75% load change, 1A/uS slew rate Ch 1: VO Ch 2: IO Figure 11: µMP16T-S2L-00-A Transient Response – VO Deviation 75% to 25% load change, 1A/uS slew rate, Ch 1: VO Ch 2: IO Module Current Share Performance 56 54 CS (%) 52 50 48 46 44 5.1 10.2 15.3 20.4 25.5 30.6 35.7 Output Current (A) Module#1 Module#2 Figure 12: µMP16T-S2L-S2L-10-A Current Share Performance Artesyn Embedded Technologies Ripple and Noise Measurement Load: IO = 20A 40.8 Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 22 1000W 48V Module Performance Curves Figure 13: µMP16-SKW-00-A Output Voltage Startup Characteristic Load: IO = 20.8A Ch 1: VO Figure 14: µMP16-SKW-00-A Ripple and Noise Measurement Load: IO = 20.8A Ch 1: VO Figure 15: µMP16T-SKW-00-A Transient Response – Vo Deviation 50% to 100% load change, 1A/uS slew rate Ch 1: VO Ch 2: IO Figure 16: µMP16T-SKW-00-A Transient Response – Vo Deviation 100% to 50% load change, 1A/uS slew rate Ch 1: VO Ch 2: IO CS (%) Module Current Share Performance 60 58 56 54 52 50 48 46 44 42 40 5.0 10.0 15.0 20.0 25.0 30.0 Output Current (A) Module#1 Module#2 Figure 17: µMP16T-SKW-SKW-30-A Current Share Performance Artesyn Embedded Technologies 35.0 Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 23 96W Dual ISO Module Performance Curves Figure 18: µMP16T-ILL-00-A Output Voltage Startup Characteristic Load: IO1 = 4A, IO2 = 4A Ch 1: VO1 Ch 2: VO2 Figure 19: µMP16T-ILL-00-A Ripple and Noise Measurement Load: IO1 = 4A Ch 1: VO1 Figure 20: µMP16T-ILL-00-A Transient Response – Vo Deviation 25% to 75% load change, 1A/ µS slew rate, Co = 470uF Ch 1: VO1 Ch 2: IO1 Figure 21: µMP16T-ILL-00-A Transient Response – Vo Deviation 75% to 25% load change, 1A/ µS slew rate, Co = 470uF Ch 1: VO1 Ch 2: IO1 Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 24 Protection Function Specification Input Fusing µMP Series is equipped with an internal non user serviceable 16A (TLAG) 250 Vac fuse for µMP10/µMP16, 10A (TLAG) 250V for µMP04 for fault protection in both the L1 and L2 lines input. Over Voltage Protection (OVP) The power supply latches off during output overvoltage with the AC line recycled to reset the latch. OVP Parameter Min Nom Max Unit 0.9 V Output Overvoltage - - 2.00 V 3.3 V Output Overvoltage - - 5.96 V 3.6 V Output Overvoltage - - 6.31 V 3.2 V Output Overvoltage - - 5.76 V 5 V Output Overvoltage - - 9.00 V 6 V Output Overvoltage - - 10.80 V 6 V Output Overvoltage - - 10.80 V 12 V Output Overvoltage - - 15.60 V 15 V Output Overvoltage - - 19.50 V 12 V Output Overvoltage - - 15.60 V 24 V Output Overvoltage - - 31.20 V 30 V Output Overvoltage - - 39.00 V 28 V Output Overvoltage - - 36.40 V 48 V Output Overvoltage - - 62.40 V 60 V Output Overvoltage - - 78.00 V 3.3 V Module 5 V Module 12 V Module 24 V Module 48 V Module Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 25 Over Current Protection (OCP) µMP series includes internal current limit circuitry to prevent damage in the event of overload or short circuit. Recovery is automatic when the overload is removed, it is constant current type. Parameter Min Nom Max Unit 0.9 V Output Over Current 105 130 160 % 3.3 V Output Over Current 105 130 160 % 3.6 V Output Over Current 105 130 160 % 3.2 V Output Over Current 105 130 160 % 5 V Output Over Current 105 130 160 % 6 V Output Over Current 105 130 160 % 6 V Output Over Current 105 130 160 % 12 V Output Over Current 105 130 160 % 15 V Output Over Current 105 130 160 % 12 V Output Over Current 105 130 160 % 24 V Output Over Current 105 130 160 % 30 V Output Over Current 105 130 160 % 28 V Output Over Current 105 130 200 % 48 V Output Over Current 105 130 160 % 60 V Output Over Current 105 130 200 % 3.3 V Module 5 V Module 12 V Module 24 V Module 48 V Module Artesyn Embedded Technologies Technical Reference Note Short Circuit Protection (SCP) Rev.09.02.15_#1.2 µMP Series Page 26 The µMP series power supply will withstand a continuous short circuit with no permanent damage, applied to its main output during start-up or while running. Over Temperature Protection (OTP) The µMP series power supply is internally protected against over temperature conditions. When the OT circuit is activated, the power supply output will disable. Recovery type will be auto recovery with temperature hysteresis. Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 27 Mechanical Specifications µMP Series Mechanical Outlines µMP04 (400/600 Watts Max) Case Size: µMP04: 10.11” x 3.5” x 1.57” (256.9 mm x 88.9 mm x 40.0 mm) Weight: µMP04 Case: 1.96 lbs(731.55g) Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 28 µMP Series Mechanical Outlines Case Input Types: Module Slot Location: Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 29 µMP Series Mechanical Outlines µMP10 (1000/1200 Watts Max) µMP16 (1200/1800 Watts Max) Case Size: µMP10/16: 10.11” x 5” x 1.57” (256.9 mm x 127 mm x 40.0 mm) Weight: µMP10/16 Case: 2.78 lbs (1037.6g) Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 30 µMP Series Mechanical Outlines Case Input Types: Module Slot Location: Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 31 S2 Module Mechanical Outlines Weight: 200W Single O/P: 0.22Ib (82.1g) Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 32 SK Module Mechanical Outlines Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 33 Dual Module Mechanical Outlines Weight: Dual O/P:0.16Ib (59.7g) Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 34 Connector Definitions - Case AC Input Connector Pin 1 – AC Neutral Pin 2 – AC Line(hot) Pin 3 – Chassis(earth) ground Pin1 Pin 3 Pin2 IEC Connector Terminal Block Case Control Signal Connector - J1 Pin 1 – Input AC OK - “emitter” Pin 2 – Input AC OK - “collector” Pin 3 – Global DC OK - “emitter” Pin 4 – Global DC OK - “collector” Pin 5 – Spare Pin 6 – Global inhibit/optional enable logic “1” Pin 7 – Global inhibit/optional enable logic “0” Pin 8 – Global inhibit/optional enable return Pin 9 – +5VSB housekeeping Pin 10 – +5VSB housekeeping return Case I2C Bus Signal Connector- J2 Pin 1 – 5Vcc bus Pin 2 – Serial data signal (SDA) Pin 3 – Secondary return (COM) Pin 4 – Serial clock signal (SCL) Pin 5 – Address bit 2 (A2) Pin 6 – No connection Pin 7 – Address bit 1 (A1) Pin 8 – No connection Pin 9 – Address bit 0 (A0) Pin 10 – No connection Artesyn Embedded Technologies Barrier Strip J1&J2 Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 35 Connector Definitions - S2# & SK# Module Main Output Terminals V+ – Positive Output V– Negative Output DC Output Control Signal Connector Pin 1 – No connection Pin 2 – No connection Pin 3 – Current share Pin 4 – Module inhibit return Pin 5 – Module ISO inhibit Pin 6 – SCOM Pin 7 – -RMT sense Pin 8 – Margin Pin 9 – Remote margin / V prog. Pin 10 – +RMT sense Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 36 Connector Definitions - I## Module Main Output Terminals V1+ – V1 Positive Output Com – V1 Negative Output V2+ – V2 Positive Output Com – V2 Negative Output DC Output Control Signal Connector Pin 1 – -RMT sense V2 Pin 2 – +RMT sense V2 Pin 3 – No connection Pin 4 – Module inhibit rtn Pin 5 – Module ISO inhibit Pin 6 – SCOM Pin 7 – -RMT sense V1 Pin 8 – No connection Pin 9 – No connection Pin 10 – +RMT sense V1 Artesyn Embedded Technologies . Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 37 Power / Signal Mating Connectors and Pin Types Table 4. Mating Connectors for µMP (or equivalent) Reference Mating Connector or Equivalent AC Input (IEC Connector C14) IEC Connector C13 DC Output (Barr) Molex 19141-0058/0063 or 19099/0048 Spade lug based on Cable Ampacity/AWG Case Control Signal Connector - J1 Landwin 2050S1000 (housing) Landwin 2053T011V (pins) or JST PHDR-10VS(housing) JST SPHD-002T-P0.5(28-24)(pins) JST SPHD-001T-P0.5(26-22) Case I2C Bus Signal Connector- J2 Landwin 2050S1000 (housing) Landwin 2053T011V (pins) or JST PHDR-10VS(housing) JST SPHD-002T-P0.5(28-24)(pins) JST SPHD-001T-P0.5(26-22) DC Output Control Signal Connector Landwin 2050S1000 (housing) Landwin 2053T011V (pins) or JST PHDR-10VS(housing) JST SPHD-002T-P0.5(28-24)(pins) JST SPHD-001T-P0.5(26-22) Note: The Artesyn Connector Kit for J1,J2 and DC Output Control Signal Connector is 70-841-023 Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 38 LED indicator Definition Two (green/off) LEDs are placed on the case fan panel with status conditions are shown on the table below. Each module will have a green LED indicating basic output operation (not driven by DCOK) Condition Case AC OK LED Status Case DC OK LED Status Module LED Status VSB = ON, VO = OFF, AC Input = ON Green Blinking OFF VSB = ON, VO = ON Green Green Green VO = OCP /OVP/SCP Green OFF OFF FAN_FAULT / OTP / VSB = OCP Green OFF OFF AC Not Present OFF OFF OFF Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 39 Environmental Specifications EMC Immunity µMP series power supply is designed to meet the following EMC immunity specifications: Table 6. Environmental Specifications: Document Description FCC Part 15 Subpart J Class B/ EN55022, Level B Conducted and Radiated EMI Limits EN61000-3-2 Harmonics EN61000-3-3 Voltage Fluctuations IEC/EN 61000-4-2 Electromagnetic Compatibility (EMC) - Testing and measurement techniques – Electrostatic discharge immunity test. Level 3, performance Criteria B, otherwise, +/-8KV air, +/-6KV contact discharge for non-standard test points, IEC/EN 61000-4-3 Electromagnetic Compatibility (EMC) - Testing and measurement techniques, Radiated, radio-frequency, electromagnetic field immunity test. Level 3,Criteria A, Designed to Meet. IEC/EN 61000-4-4 Electromagnetic Compatibility (EMC) - Testing and measurement techniques, Electrical Fast Transient/Burst Immunity, Level 4, performance Criteria B IEC/EN 61000-4-5 Electromagnetic Compatibility (EMC) - Testing and measurement techniques – Surge, 2KV common mode and 2KV differential mode, performance criteria A. IEC/EN 61000-4-11 Electromagnetic Compatibility (EMC) - Testing and measurement techniques : Voltage Dips and Interruptions: 30% reduction for 500msCriteria B>95% reduction for 10mS, Criteria A, >95% reduction for 5000mS, Criteria C EN55024 Information Technology Equipment-Immunity Characteristics, Limits and Method of Measurements Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 40 Safety Certifications The µMP series power supply is intended for inclusion in other equipment and the installer must ensure that it is in compliance with all the requirements of the end application. This product is only for inclusion by professional installers within other equipment and must not be operated as a stand alone product. Table 7. Safety Certifications for µMP series power supply system Document File # Description UL 60950-1/CAN/CSA C22.2 No. 60950-1 E186249-A273-UL-X3 US and Canada Requirements ANSI/AAMI ES60601-1 CAN/CSA-C22.2 No. 60601-1 E182560-A116-UL-X1 Medical Requirements EN60950-1 E186249-A273-CB-1 European Requirements. EN60601-1 European Requirements and Medical Requirements EN60950 Deviations International Requirements CB Certificate and Report DK-39327-A2-UL (All CENELEC Countries) CHINA CQC Approval China Requirements Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 41 EMI Emissions The µMP series has been designed to comply with the Class B limits of EMI requirements of EN55022 (FCC Part 15) and CISPR 22 (EN55022) for emissions and relevant sections of EN61000 (IEC 61000) for immunity. µMP16 is tested at 1200W at low line and >100Vac input, and 1800W at high line>200Vac input using resistive load. Conducted Emissions The applicable standard for conducted emissions is EN55022 (FCC Part 15). Conducted noise can appear as both differential mode and common mode noise currents. Differential mode noise is measured between the two input lines, with the major components occurring at the supply fundamental switching frequency and its harmonics. Common mode noise, a contributor to both radiated emissions and input conducted emissions, is measured between the input lines and system ground and can be broadband in nature. The µMP16 power supplies have internal EMI filters to 2 ensure the convertors’ conducted EMI levels comply with EN55022 (FCC Part 15) Class B and EN55022 (CISPR 22) Class B limits. The EMI measurements are performed with resistive loads at maximum rated loading. Sample of EN55022 Conducted EMI Measurement at 100Vac input Note: Blue Line refers to Artesyn Quasi Peak margin, which is 6dB below the CISPR international limit. Red Line refers to the Artesyn Average margin, which is 6dB below the CISPR international limit. Conducted Emissions Table 8. Conducted EMI emission specifications of the µMP series Parameter Model Symbol Min Typ Max Unit FCC Part 15, class B All Margin - - 6 dB CISPR 22 (EN55022) class B All Margin - - 6 dB Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 42 Radiated Emissions Unlike conducted EMI, radiated EMI performance in a system environment may differ drastically from that in a stand-alone power supply. The shielding effect provided by the system enclosure may bring the EMI level from Class A to Class B. It is thus recommended that radiated EMI be evaluated in a system environment. The applicable standard is EN55022 Class B (FCC Part 15). Testing ac-dc convertors as a stand-alone component to the exact requirements of EN55022 can be difficult, because the standard calls for 1m leads to be attached to the input and outputs and aligned such as to maximize the disturbance. In such a set-up, it is possible to form a perfect dipole antenna that very few ac-dc convertors could pass. However, the standard also states that ‘an attempt should be made to maximize the disturbance consistent with the typical application by varying the configuration of the test sample. Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 43 Operating Temperature The µMP series power supplies will start and operate within stated specifications at an ambient temperature from -40 OC to 70 OC under all load conditions with internal fan. Derate each output 2.5% per degree from 50 OC to 70 OC. Cold start at -20 OC, allow 10 min warm-up before all outputs are within specification. Reverse air to 40 OC max due to fan derating. Forced Air Cooling The µMP series power supplies include internal cooling fans as part of the power supply assembly to provide forced aircooling to maintain and control temperature of devices and ambient temperature in the power supply to appropriate levels. There are 1 fan in µMP04 case and 2 fans in µMP10/16 case. The standard direction of airflow is from the fan side through the power supply with exhaust on the output side of the power supply. Reverse airflow option is required with some derating allowed. Allow 40 OC max ambient for reverse airflow. Fan speed is controlled by thermal sensors in case and modules. In the event of a fan fault condition, the unit will protect by latching off. AC input or Global Inhibit must be recycled to turn the unit back on after a fan fault condition. Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 44 Power Derating Curves µMP series can operate up to a maximum ambient temperature of 70 OC with derating, below is the µMP10 derating curves. Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 45 Storage and Shipping Temperature / Humidity The µMP series power supplies can be stored or shipped at temperatures between -40 OC to +85 OC and relative humidity from 10% to 95% non-condensing. Altitude The µMP series will operate within specifications at altitudes up to 10,000 feet above sea level. The power supply will derate linear to 50% from 10,000 to 30,000 feet above sea level. Humidity The µMP series will operate within specifications when subjected to a relative humidity from 10% to 95% non-condensing. The µMP series can be stored in a relative humidity from 10% to 95% non-condensing. Vibration The µMP series power supply will pass the following vibration specifications: Non-Operating Random Vibration Acceleration 50 gRMS Frequency Range 10-2000 Hz Duration 30 mins Direction 3 mutually perpendicular axis FREQ 10 Hz 20 Hz 80-350 Hz 2000 Hz PSD Profile SLOPE dB/oct --------- PSD g2/Hz 0.005 g2/Hz 0.01 g2/Hz 0.04 g2/Hz 0.007 g2/Hz Operating Random Vibration Acceleration 50 gRMS Frequency Range 10-500 Hz Duration 30 mins Direction 3 mutually perpendicular axis PSD Profile Artesyn Embedded Technologies FREQ 10-350Hz 500 Hz SLOPE dB/oct ----- PSD g2/Hz 0.04 g2/Hz 0.0198 g2/Hz Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 46 Shock The µMP power supply will pass the following vibration specifications: Non-Operating Half-Sine Shock Acceleration 30 G Duration 26 msec Pulse Half-Sine No. of Shock 3 shock on each of 6 faces Operating Half-Sine Shock Acceleration 40 G Duration 6 msec Pulse Half-Sine No. of Shock 3 shock on each of 6 faces Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 47 Power and Control Signal Descriptions AC Input Connector This connector supplies the AC Mains to the µMP series power supply. Pin 1 - AC Neutral Pin 2 - AC Line(hot) Pin 3 - Chassis(earth) ground Case Control Signal Connector - J1 The µMP series contain a 10 pins control signal header providing an analogue control interface, standby power and I2C interface signal connections. Input AC OK - “collector” / Input AC OK - “emitter”- (pins 1,2) Input ACOK - “collector” and Input ACOK - “emitter” are output of an uncommitted bipolar junction transistor, there is an internal 1K ohm resistor in series with the collector of the transistor for current limiting. The transistor shall turn ON when the Input Mains level is Good >85Vac, it shall turn OFF when input voltage is <80Vac. Sink current: 50mA maximum, 5ms minimum warning time. A green LED is provided in the µMP case as visual indicator of the status of ACOK signal. Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 48 Global DC OK - “collector” /Global DC OK - “emitter” - (pins 3,4) Global DCOK - “collector” and Global DCOK - “emitter” are output signal of uncommitted bipolar junction transistor, there is an internal 1K ohm resistor in series with the collector of the transistor for current limiting. The transistor shall turn ON when the DC output of ALL modules have good regulation, otherwise it will turn OFF. A green LED is provided as a visual indicator of the DCOK status. Sink current: 50mA max. Global inhibit/optional enable logic “1” - (pin 6) Global inhibit/optional enable logic “1”(default setting). Active low, when pin is left open or pulled Low, all the modules are ON. Pulling the pin to logic level Hi (>3V- 4V) will turn OFF all the modules of the power supply. There is an internal 2.2K ohm resistor pulling the signal to ground to make the level low when pin is left floating. Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 49 Global inhibit/optional enable logic “0” - (pin 7) - For µMP 10/16 Enable logic “0” (default setting). Active high - when pin is left open or pulled high, all the PSU modules are ON. Pulling pin 7 to <0.5V will turn OFF all the modules. There is an internal 2.2K ohm resistor pulling the signal to internal 3.3V supply to make the level high when pin is left floating. Logic signal at Pin J1-7 Driving J1-7 with a transistor Global inhibit/optional enable logic “0” - (pin 7) - For µMP 04 Enable logic “0” (default setting). Active high - when pin is left open or pulled high, all the PSU modules are ON. Pulling pin 7 to <0.5V will turn OFF all the modules. There is no internal pull up to 3.3V for EN0 on µMP04. Instead level shifter is implemented for EN0 on µMP04. If EN0 pin is left floating, you will measure 3.3V on the pin. Advantage of the level shifter will allow customer to drive EN0 flexibly. a) Gate of 3.3V circuit b) Gate of 5V circuit c) Comparator/Op-amp output of 12V circuit d) OC(Open Collector as you shown in your diagram e) Other output or gate that will not exceed the derating of the level shifter Note: Pin 6 and pin 7 are independent signals, both signals must assume the correct logic to turn ON the modules. By default, Pin 6 is low(when pin is floating) and pin 7 is high(when pin is floating) and all modules are ON; change the logic state of either pins to turn the output modules OFF. Note:Case option code 3 “Global Enable” reverses the modules ON/OFF status described above. Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 50 Global inhibit/optional enable return - (pin 8) This pin is ground reference for global enable/optional enable. It is electrically connected to pin 10 (+5VSB housekeeping Return). +5VSB housekeeping - (pin 9) This pin is the standby output of the power supply rated 5V/1A. This output is available everytime the input AC voltage to the power supply is within 85Vac - 264Vac. This output is not affected by global Inhibit function. +5VSB housekeeping return - (pin 10) The ground reference of +5VSB housekeeping, this ground is not connected to the chassis of the power supply. Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 51 Case I2C Bus Signal Connector- J2 5Vcc bus - (pin 1) This pin is an input to the µMP case, supplying 5V to this signal will provide external power to the I2C devices - EEPROM and Microcontroller. The pin can be used to enable the I2C communication using external power supply to allow reading of manufacturing from a non-working PSU without powering the supply. Do not supply voltage >5.5V to prevent damaging the I2C devices. Secondary return (COM) - (pin 3) Ground reference for the signals of J2 connector. This pin is electrical connected to pin 10(+5V VSB housekeeping return of J1 connector) . SDA, SCL (I2C Data and Clock Signals) - (pins 2,4) Please refer to “Communication Bus Descriptions” section. A2, A1,A0 (I2C Address BIT 2, BIT1, BIT0 Signals) - (pins 5,7,9) Please refer to “Communication Bus Descriptions” section. DC Output Control Signal Connector Current Share - (pin 3) Current share pin is an input/output signal of the module, when multiple modules are connected in parallel the current share pins of each of the parallel modules must be connected together to achieve equal current sharing. Failure to connect the current sharing pin while the output of the modules are in parallel connection can cause one or more of the modules to sink current from the other parallel modules and fail. Since the output voltage of current share signal is proportional to the actual output current the pin can be used as output current monitor, the pin will have 6V nominal output at full rated load. Module Inhibit Return and Module ISO Inhibit - (pins 4,5) Isolated Inhibit input signals use to remotely enable/disable the module, apply 5V across the Module ISO Inhibit and Module Inhibit Return to disable the module. This pin driving the diode side of an optocoupler to drive the internal enable signal, an internal 1K ohm is in series with the diode. Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 52 SCOM - (pin 6) Ground Reference of the output module, this is connected to ‘V-’ output of the module. - RMT sense/+RMT sense - (pins 7,10) Remote sense of the output modules use to compensate up to 500mV of cable drop. Connect the -RMT sense and +RMT sense to the output ‘V-’ and ‘V+’ respectively at the point of load to compensate up to 500mV of voltage drop along the power lines. µMP Module Margin and Remote margin/V prog - (pins 8,9) Used to remotely adjust the output voltage regulation to 95% (Margin Low) or 105% (Margin High). Connect Remote margin (Pin 9) to Margin (Pin 8) to adjust voltage output level to 105% of the rated output. Connect Remote margin (Pin9) to SCOM (Pin 6) to adjust the voltage output level to 95% of the rated. Remote margining using Single Pole Center Off switch to achieve 3 possible voltage level Remote margining using a potentiometer to get voltage adjustment range between 95% -105% of nominal rating. Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 53 DC Output Control Signal Connector- I## Module -RMT sense V2 / +RMT sense V2 - (pins 1,2) Remote sense for output V2, can compensate up to 500mV cable drop. Connect the -RMT sense V2 and +RMT sense V2 to the output ‘V2 COM’ and ‘V2+’ respectively at the point of load to compensate up to 500mV of voltage drop along the power lines. Module Inhibit Return and Module ISO Inhibit - (pins 4,5) Refer to page 51. The Module Inhibit enable/disable both outputs. SCOM - (pin 6) Ground Reference of the output module, this is connected to COM of output V2. -RMT sense V1 / +RMT sense V1 - (pins 7,10) Remote sense for output V1, can compensate up to 500mV cable drop. Connect the -RMT sense V1 and +RMT sense V1 to the output ‘V1 COM ’ and ‘V1+’ respectively at the point of load to compensate up to 500mV of voltage drop along the power lines. Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 54 Communication Bus Descriptions I2C Bus Signals - J2 The µMP series power supply contains enhanced monitor and control functions implemented via the I2C bus. The µMP series I2C functionality (PMBusTM and FRU data) can be accessed via the output connector control signals. The communication bus is powered either by the internal 5V supply or from an external power source connected to the StandBy Output (ie: accessing an unpowered power supply as long as the StandBy Output of another power supply connected in parallel is on). If units are connected in parallel or in redundant mode, the StandBy Outputs must be connected together in the system. Otherwise, the I2C bus will not work properly when a unit is inserted into the system without the AC source connected. Note: PMBusTM functionality can be accessed only when the PSU is powered-up. Guaranteed communication I2C speed is 100KHz. SDA, SCL (I2C Data and Clock Signals) - (pins 2, 4) These are pins for I2C communication and must be pulled-up in the system by 20K ohm resistor to 3.3V housekeeping; a current source pull-up can also be used. If multiple units are used inside a system, the 3.3V housekeeping of each unit must be connected in parallel in the system, otherwise, the SCL and SDA bus will be pulled low by the unit without AC power. A0, A1,A2 (I2C Address BIT 0, BIT1 Signals) - (pins 5,7,9) Multiple configured µMP power supplies can be used in a single system, the power supplies can have parallel outputs or providing multiple outputs. The µMP case has three address pins allowing the system to assign different addresses to multiple PSUs used within the system. The I2C devices inside the µMP case are EEPROM to store FRU data and microcontroller for PMBus. The table below listed all the possible addresses of the two I2C devices inside the PSU. Pull the address pin to secondary return (COM) to set the address to “0” or High (or open) to set it the address to “1”. I2C Bus Communication Interval The interval between two consecutive I2C communications to the power supply should be at least 50ms to ensure proper monitoring functionality. I2C Bus Signal Integrity The noise on the I2C bus (SDA, SCL lines) due to the power supply will be less than 500mV peak-to-peak. This noise measurement should be made with an oscilloscope bandwidth limited to 100MHz. Measurements should be make at the power supply output connector with 2.2K ohm resistors pulled up to StandBy Output and 20pf ceramic capacitors to StandBy Output Return. The noise on the address lines A0 and A1 will be less than 100mV peak-to-peak. This noise measurement should be made at the power supply output connector. Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 55 I2C Bus Internal Implementation, Pull-ups and Bus Capacitances SYSTEM BACKPLANE 10K 10K 10K 20K 20K A0 A0 A1 A1 A2 A2 SDA System Backplane Processor 1K 1K POWER SUPPLY SIDE 3.3V (Internal Secondary Logic Supply) SCL 100 PSU Monitor Function SDA 2.7V Z-Diode 100 SCL PSU Micro Controller Schottky Diode GND Interconnect FRU DATA EEPROM I2C Bus - Recommended external pull-ups: Electrical and Interface specifications of I2C signals (referenced to StandBy Output Return pin, unless otherwise indicated): Parameter Symbol Min Typ Max Unit SDA, SCL internal pull-up resistor Rint - 20 - Kohm SDA, SCL internal bus capacitance Cint - 0 - pF - 2.2K - ohm - 0.275K - ohm Recommended external pull-up resistor 1 PSU Artesyn Embedded Technologies Condition 1 PSU 8 PSU Rext Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 56 Logic Levels µMP series power supply I2C Communication Bus will respond to logic levels as per below: Logic High: 3.3V Nominal (Specs is 2.1V to 5.5V)** Logic Low: 500mV nominal (Specs is 800mV max)** **Note: Artesyn 73-769-001 I2C adapter was used. Timings Parameter Symbol Standard-Mode Specs Actual Measured Unit 100 99 KHz 4.0 - 4.68 µS tLOW 4.7 - 14.8 µS tHIGH 4.0 - 4.1 µS Setup time for repeated START condition tSU;STA 4.7 - 5.7 µS Data hold time tHD;DAT 0 3.45 0.5 µS Data setup time tSU;DAT 250 - 521 nS Rise time tr - 1000 SCL =896 SDA = 540 nS Fall time tf - 300 SCL = 132 SDA = 220 nS tSU;STO 4.0 - 5.66 µS tBUF 4.7 - 31.06*** µS Min Max f SCL 0 tHD;STA LOW period of SCL clock HIGH period of SCL clock SCL Clock Frequency Hold time (repeated) START condition Setup time for STOP condition Bus free time between a STOP and START condition * **Note Artesyn 73-769-001 I2C adapter (USB-to-I2C) and Universal PMBusTM GUI software was used Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 57 Device Addressing The µMP series will respond to supported commands on the I2CTM bus that are addressed according to pins A0,A1 and A2 pins of output connector. Address pins are held high by default via pulled up to internal 3.3V housekeeping with a 10K ohm resistor. To set the address as “0”, the corresponding address line should be pulled down to logic ground level. Below tables show the address of the power supply with A0,A1 and A2 pins set to either “0” or “1”. Slot ID Bits PSU Slot PMBusTM Address EEPROM (FRU) Read Address A0 A1 A2 1 0 0 0 0x30 0xA0 2 0 0 1 0x32 0xA2 3 0 1 0 0x34 0xA4 4 0 1 1 0x36 0xA6 5 1 0 0 0x38 0xA8 6 1 0 1 0x3A 0xAA 7 1 1 0 0x3C 0xAC 8 1 1 1 0x3E* 0xAE * Default PMBusTM address when A0, A1, A2 are left open. Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 58 I2C Clock Synchronization The µMP power supply might apply clock stretching. An addressed slave power supply may hold the clock line (SCL) low after receiving (or sending) a byte, indicating that it is not yet ready to process more data. The system master that is communicating with the power supply will attempt to raise the clock to transfer the next bit, but must verify that the clock line was actually raised. If the power supply is clock stretching, the clock line will still be low (because the connections are open-drain). The maximum clock low timeout for µMP is 25 millisecond. The maximum transaction timeout condition for clock stretching for µMP is 100 millisecond. Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 59 PMBusTM Interface Support The µMP is compliant with the industry standard PMBusTM protocol for monitoring and control of the power supply via the I2C interface port. µMP Series PMBusTM General Instructions Equipment Setup The following is typical I2C communication setup: Voltmeter I2C Adaptor µMP GUI µMP AC Source PMBusTM Writing Instructions When writing to any PMBusTM R/W registers, ALWAYS do the following: Disable Write Protect (command 10h) by writing any of the following accordingly: Levels: 00h – Enable writing to all writeable commands 20h – Disables write except 10h, 01h, 00h, 02h and 21h commands 40h – Disables write except 10h, 01h, and 00h commends 80h – Disable write except 0x00h To save changes on the USER PMBusTM Table: Use send byte command: 15h STORE_USER_ALL Wait for 5 seconds, turn-off the PSU, wait for another 5 seconds before turning it on Artesyn Embedded Technologies E-Load Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 60 µMP Series Support PMBusTM Command List The µMP Series is compliant with the industry standard PMBusTM protocol for monitoring and control of the power supply via the i2C interface port. µMP Series Supported PMBusTM Command List: Command Code Command Name Default Value Access Type Data Bytes Data Format Hex Description 00h PAGE 00 R 1 01h OPERATION 80 R 1 b7:6 10b b5:4 00b b3:2 00b b1:0 00b 02h ON_OFF_CONFIG 1E R 1 03h CLEAR_FAULTS 0 S 0 10h WRITE_PROTECT 80 R/W 1 Used to Control Writing to the PMBus Device 80h - Disables write except 10h 40h – Disables write except 10h, 01h, 00h 20h – Disables write except 10h,01h,00h,02h 00 – Enables write to all writeable commands. 15h STORE_USER_ALL - S 0 Copies the Operating memory table to the matching USER non-volatile memory. 19h CAPABILITY 80 R 1 35h VIN_ON - R 2 Default: 82Vac Used to turn the unit ON/OFF Reserved 36h VIN_OFF - R 2 Default: 75Vac 3Ah FAN_ CONFIG_1_2 D5 R 1 Used to configure up to 2 fans associated with one PMBus device 3Bh FAN_COMMAND_1 0 R/W 2 Direct Default: 0RPM Valid Range: 0 – 32767RPM 50h OT_FAULT_RESPONSE 78 R 1 58h VIN_UV_WARN_LIMIT EA90 R 2 Linear (82Vac) Linear (75Vac) 59h VIN_UV_FAULT_LIMIT EA58 R 2 5Ah VIN_UV_FAULT_RESPONSE F8 R 1 78h STATUS_BYTE 00 R 1 Turn PSU OFF and will retry indefinitely Returns the summary of critical faults b7 – BUSY A fault was declared because the device was busy and unable to respond. b6 – OFF Unit is OFF b5 – VOUT_OV Output over-voltage fault has occurred b4 – IOUT_OC Output over-current fault has occurred b3 - VIN_UV An input under--voltage fault has occurred b2 - TEMPERATURE A temperature fault or warning has occurred b1 – CML A communication, memory or logic fault has occurred. b0 – NONE OF THE ABOVE A Fault Warning not listed in bits[7:1] has occurred. Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 61 µMP Series Supported PMBusTM Command List: Command Code Command Name Default Value Access Type Data Bytes 79h STATUS_WORD 0000 R 2 7Ch Summary of units Fault and warning status. An output voltage fault or warning has occurred b14 – IOUT/POUT An Output current or power fault or warning has occurred. b13 – INPUT An input voltage, current or power fault or warning as occurred. b12 – MFR A manufacturer specific fault or warning has occurred. b11 – Global DC OK The Global DC OK signal is de-asserted b10 - FANS A fan or airflow fault or warning has occurred. b9 – OTHER A bit in STATUS_OTHER is set. b8 – UKNOWN A fault type not given in bits [15:1] of the STATUS_WORD has been detected. b7 – BUSY A fault was declared because the device was busy and unable to respond. b6 – OFF Unit is OFF b5 – VOUT_OV Output over-voltage fault has occurred b4 – IOUT_OC Output over-current fault has occurred b3 - VIN_UV An input under-voltage fault has occurred b2 – TEMPERATURE A temperature fault or warning has occurred b1 – CML A communication, memory or logic fault has occurred. b0 – NONE_OF_THE_ABOVE A fault or warning not listed in bits[7:1] of this byte has occurred. STATUS_INPUT 00 R 1 Input related faults and warnings b7 VIN Overvoltage Fault b6 VIN Overvoltge Warning b5 VIN Undervoltage Warning b4 VIN Undervoltage Fault b3 Unit is OFF for insufficient Input Voltage b2 IIN Overcurrent Fault b1 IIN Overcurrent Warning STATUS_TEMPERATURE PIN overpower Warning 00 R 1 Temperature related faults and warnings b7 Overtemperature Fault b6 Overtemperature Warning b5 Undertemperature Warning b4 Undertemperature Fault b3:0 7Eh Description b15 – VOUT b0 7Dh Data Format STATUS_CML b7 reserved 00 R 1 Communications, Logic and Memory Invalid or unsupported Command Received b6 b5 Packet Error Check Failed b4 Memory Fault Detect, CRC Error b3 b2 b1 b0 Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 62 µMP Series Supported PMBusTM Command List: Command Code 80h Command Name STATUS_MFR_SPECIFIC Default Value Access Type Data Bytes 00 R 1 Data Format Manufacturer Status codes b7 Bulk OK, 1- Bulk is within range and is ready for use b6 Not Used b5 Not Used b4 Not Used b3 Not Uesd b2 Not Uesd b1 Standby Fault, 1 If there’s a standby fault. b0 81h Description STATUS_FANS_1_2 PS_ON Pin Status 1 – asserted, 0 - deasserted 00 R 1 b7 Fan 1 Fault b6 Fan 2 Fault b5 Fan 1 Warning b4 Fan 2 Warning b3 Fan_1 Speed Overridden b2 Fan_2 Speed Overridden b1 b0 88h READ_VIN - R 2 Linear Returns input Voltage in Volts ac. 89h READ_IIN - R 2 Linear Returns input Current in Amperes 8Dh READ_TEMPERATURE_1 - R 2 Linear Primary Hotspot 8Eh READ_TEMPERATURE_2 - R 2 Linear Standby Hotspot 8Fh READ_TEMPERATURE_3 - R 2 Linear Secondary Ambient 90h READ_FAN_SPEED_1 - R 2 Linear Speed of Fan 1 91h READ_FAN_SPEED_2 - R 2 Linear Speed of Fan 2 97h READ_PIN Linear 98h PMBUS_REVISION 99h MFR_ID 9Ah MFR_MODEL 9Bh - R 2 22 B 1 “ARTESYN” BR, ASCII Varies Abbrev or symbol of manufacturers name. “µMP” BR, ASCII Varies Manufacturers Model number, ASCII format MFR_REVISION “AA” BR, ASCII Varies Manufacturers, revision number, ASCII format 9Ch MFR_LOCATION Philippines” BR, ASCII Varies Manufacturers facility, ASCII format 9Dh MFR_Data “xxxxxx” BR Varies Manufacture Date, ASCII format structure : YYMMDD 9Eh MFR_Serial “xxxxxxxxxxxxx” BR Varies Default: "K975YYWWSSSSSSAAP" for 73-954-0001CG2 , “K974YYWWSSSSSSAAP” for 73-9540001T-G2 A0h MFR_VIN_MIN EAA8 R 2 Linear Minimum Input Voltage (85Vac) A1h MFR_VIN_MAX FA10 R 2 Linear Maximum Input Voltage (264Vac) A2h MFR_IIN_MAX D340 R 2 Linear Maximum Input Current (13A) A7h MFR_POUT_MAX B20 R 2 Linear Maximum Output Power (1200W) A8h MFR_TAMBIENT_MAX F38D R 2 Direct Maximum Operating Ambient Temperature (Secondary Ambient) (70degC) A9h MFR_TAMBIENT_MIN E580 R 2 Direct Minimum Operating Ambient Temperature (Secondary Ambient) (-40degC) Artesyn Embedded Technologies Returns the input power, in Watts. Reads the PMBus revision number Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 63 µMP Series Supported PMBusTM Command List: Command Code Command Name Default Value Access Type Data Bytes Data Format Description D6h MODULE_EN_DELAY 0 BR Varies Linear E0h FW_PRI_VERSION - BR 8 ASCII N/A E1h FW_SEC_VERSION - BR 8 ASCII N/A F1h ISP_UNLOCK_CODE - BR/W 4 ASCII 00h,00h,00h,00h F2h ISP_CTRL_CMD - W 1 B N/A F3h - R 1 B Varies F4h ISP_STATUS_BYTE ISP_FLASH_ADDR - B 4 Raw Hex Varies F5h ISP_FLASH_DATA - BR/W 4 Raw Hex Varies Artesyn Embedded Technologies Default: 0 for all Modules Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 64 Artesyn Embedded Technologies Technical Reference Note Rev.09.02.15_#1.2 µMP Series Page 65 Application Notes Output Ripple and Noise Measurement The setup outlined in the diagram below has been used for output voltage ripple and noise measurements on the µMP Series. When measuring output ripple and noise, a scope jack in parallel with a 0.1uF ceramic chip capacitor, and a 10uF aluminum electrolytic capacitor should be used. Oscilloscope should be set to 20MHz bandwidth for this measurement. For more information: www.artesyn.com/power For support: [email protected]
* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project
advertisement
© 2021