Beko | WMA 747 S | SAFETY PRECAUTIONS Color TFT LCD Module is very sensitive

SAFETY PRECAUTIONS
GENERAL GUIDELINES
1. Always use the manufacturer’s replacement safety
components. The critical safety components marked
with
on the schematics diagrams should not be
by other substitutes. Other substitute may create the
electrical shock , fire or other hazards. Take
attention to replace the spacers with the originals.
Furthermore where a short circuit has occurred ,
replace those components that indicate evidence of
overheating.
2. After servicing , see that all the protective devices
such as insulation barriers, insulation papers, shields
and isolation R-C combinations are correctly
installed.
5
High temperature & high humidity
reduce the life-time.
LCD is not proper to be used at high temperature
and high humidity. Please keep specified
temperature and humidity condition.
6-
Keep out of Corrosive Gas.
Corrosive gas effect the polarizer and the circuit
chemically and cause defects accordingly.
7 -
Electrostatic discharge can make
Damage
3. When the receiver is not being used for a long time
of period of time , unplug the power cord of the
Adaptor from the AC outlet.
Color TFT LCD Module is very sensitive
both electrically and physically.Users,
therefore, are requested to follow the
“Guidance of handling color TFT LCD
Module”on the followings.
Be careful not to make scratch on the
polarizer.
Surface of polarizer is soft and can be physically
damaged easily.
Please do not touch, push or rub polarizer surface
with materials over HB hardness.
1-
2Keep clean the surface.
Please wear rubber glove when touch the surface of
LCD screen. Please use soft and anti-static material
as cleaner.
3Keep out of water.
Water on/in the LCD may cause electrical short or
corrosion. Please wipe out dry or water carefully.
4-
Prevent swift Temperature &
Humidity change.
Instantaneous temperature and/or humidity change
can make dew or ice which cause nonconformance
such as malfunction.
There are electro-static sensitive components such
as CMOS in LCD Module. Please earth human
body when handle the LCD.In addition, please do
not touch the interface connector pin with bare.
8-
Do not operate for a long time under
the same pattern
Operating LCD for a long time under the same
pattern can cause image persistence and can
damage it. Please follow following guidance.
1. Turn the power off when do not use.
2. Change the pattern periodically.
S901
FID4
D717
T701
R740 R737 R763 R760
R742 R735 R765 R756
D701
R706
C761
C705
C713
C714
L304R741
IC301
R732 C716 R751 C723
C718
C724
C322
L305
C722
R332
L303
1
C319
R705 R704
D700
R707
C717
TU300
TU301
C327
R300
R307
C760
C306
1
C303
L302
R340
R317
D707
R708
D703
R709
L701
1
X100
T700
R711
R710
R714
R716 C759
R122
L112
R100 L103
C115 L109
C116
C107 C167
R102 C114
L106
L107
SCART
S700
L111
C126
C177
L116 C175
C150
R112
R105
C143 R124
C146
R123
L117 C174
C128
R106
C173 C172
C125
C102
C119
L114
C178
C106
C113
C117 R103
R701
C120
D100
C132
L118
C131
49
C121
C103
C104
R101
L110 C118
L104 C109
Q900
1
C100L100 L101 C101
C111
C105
C122
C124
C133
C127
C166
1
C 12
C179 C180
L113
C129
C123 R104
C181
L105
L108
C182
IC408
L102
C135
C130
F102
C185
C431
L120 C110
C168 C134
C144
R108
R439
C141
C137
R113
C147
C142
C136
C159
C153
R438
R433 R475
C701
D704
R126
R127 C152
C170
R114
C700
C752
C155 R116 C160
C164
C156 C154
C165
R115 C157
R121
R120
R111
C171
C149
C151
C148
C169
C140
C145
C139
C138
C460
C187
1
C162
R118
R119
R117
T100
R125
R107
R109
R435
1
R717 R702
C703 R700
R919
R219
C766 C765
R750 R712
R762 C768
D711 D712 R727 C704
R729 R728 D713
R749
C767 R788
R758
C764
C712
IC703
C444
R721
R723
R725
R726
CT707CT706CT705 R703
CT704
R436
C763
L702
R511 C500
R503
R724
R512
R508
R757
R501
R722
S501
R500
R755
R506
IC702
C503
R515
R509
R430
C502 S402
R437
R502
D500
R514
IC500
1
R456
R513
R510
C826 R816
R811
C824
C506
R815
64
C432
R504 C504 C836
65
R746
R505 C720 C842 R825
L401
C450
C449
C448
C433
C422
C443
40
C423
R745
129
T501 T500
1
RP407
C465
C447
C721
128
R421
C442
39
C424
C451
R459
R339
R440
IC400
IC403
1
L501
L500 C505
DEBUG
C406
R497
C501 R507
GRUNDIG ELK.
YCR190R-3
V-0
R426 R458
R522 R523
C461
R431 R441
R471
C463
R483
T400
R472
1
R427 R429
1
R457
T403
1
R134
IC405
IC402
L405
1
PC AUDIO IN
C408
R445 R443 R442 R446 R451 R450 R447
IC407
T903
L920
R733
C161
C158
1
R434
L119
R813
F101
IC406
R448
R449
R110
C108
R193
1
D709
D702
R201 C222
C935
C462
IC404
IC101
1
R819
C844
R805
C183
R140 R141
1
C188
R914
R138
R301
F301
C163
R225
R916
R764
C206 C205
1
R918
R719 R713
R720 D705
R444 R476
R917
R493
R492
L916
R318
D300
R308
R473 R474
C184
C920
R306
F300
R336
R302
C204
R203 C200
X200
R303
L202
R200
C186
R133
IC300
C309
L205
L204
32
C213
C203 C202
R204 C201
C212
T303
C711
C708
C746
R319
C312
C328
C315
R315
R316
C331
C330
C304
R212
R210
C311
RP201
C217
C209
RP202
64
17
R311
R832
R837
R833
IC806IC805
R840
R803
R221
R209 R208
5V
LVDS
L903
L904
12V
LVDS
R928
R927
C843
IC800
C806
R206
C215
Q902
D800
R846
R491 C472
R496
R489
R490R498
T406
R205
D201
C933
L913
L914
L911
C927
R847
C903
L800
C902
R902
SPEAKER
C307 R309
R222
T901
D202
L300
R910
C914
R912
R915
C907
R905 R911
C919
IC902
T902
R909
L922
L907
L905
R913
12V
12V
12V
GND
GND
GND
24V
5V
GND
GND
5V
R921
R925 R926
R922
T907
S800
R839
R834
L402
C900
1
D708
1
2
LVDS
R452
C452
D718 R739
C430
R734 R736
R747 R744
R453
R738 D719
D720
R748 R743
C438
R759
R761
D714 D715
C426
CB702
D710
C434
R454
R753
R754
S400
C428
R455
VGA
S908
R488
L801
1
C220
C706
S701
S910
C905
R806
33
F100
D903
C817
+
R328
R326
R323
R327
R715
C709 D706
C719
S703
C808
16
1
1
C811
R836 R838
R835
C807 R830 T800
C803 R841
R843
C814 1
R842
C813
C805
C801
C216
T300
C223
C802 IC803
C810
L201
D301
T904
48
+
R202
C316
64
R923
L203
R310
C313 R320
C329
1
R801
R804 R800
RP200
C314
C317
C321
R718 C710
R752
R325
T702
R220
R731
C707
C214 R218
R211
L200
C221
R844
R802
CB902
T906
R207
C218
L915
L802
C809
C210
R305
TR100
C904
L917
R936 R935 R934
R213
R304
33
C901
C219
R223
R331
R321
R322
16
IC900
R845
R929
R215
R224
R226
R312
C308
C208
T305
C318
C305
D101
L906
R932
C928
C207
IC200
S909
1
+
+
T905
R933 R931
1
1
L902
C929
1
R216
C300
C325
1
C800
C913
C926
R214
IC903
S909
L901
C912
C930
L912
1 1
R901
R217
R930
48
S908
R903
49
C211
C934
R334
32
C931
C715
R730
R324 R329
17
IC100
D900
C932
L900
R333 C323
T304
1
1
S910
C224
D901
C906
C908
R939 R940
R335 R330
C320
C910
D716
C326 C324
T703
C909
IC201
R920
Q901
1
C301
R314 R313
1
C923
R924
C917
L921
L301
FID1 L909 L908
C937 C936
C924
POWER
BARCODE
1
S904
C922
C310
1
X300
S903
C419 C420
C417
C418
R627
R621
R620
R622
R623
R613
C602
C603
R772 C734
R775 D727
C605
41
R822
S905
IC600
21
L600
C726 D729
R617
C733
40
C841
C536
C840
R823 C832
R521
R766 C727
R773
20
R630
C604
YPBR
C743 C747 C750
V_CUT
19
S900
S602
R629
R628
V_CUT
HDMI2
R605 R631 R614
R624
R626
R619
R618
R625
T600
FID2
80
C600
R608
R609
19
S601
R606R495
R632 R610 R612R494
R603
R600 R604
R602
R601
S600
HDMI3
19
R611
C751
C744 R790 R793
D722 D730
R607
R787 C748
C601
R786 R789 R792
C831
D728
R824
C838
D726 D724
S500
D733 D732
USB S702
SVIDEO+SIDE AV
S202
C755 R796
R795 R797
C754
C412
C839 R814
C835 R818 C833
Y400
C753 C756
C830
C404
C837
L400
C845
R768
C730
R616
C834
PCMCIA
R417 R411
R410
R615
L403
L803
C403
R810
C820
1 IC802
C827
L804
C414
C429
R412
R798 R799
R419
C758 C757
R408
R808 R807
1
C737 R778 R777
R826
256
C453
C401 R401 C400 C437
C735 R776 C736 D723
C725 R767
HPHONE
D902
L910
S907
R900 R904
C416
R407
D731
C732 R774 D721
C445
C411
C915
C770
C729 R770 R771
C405
FID3
S902
C440
C415
S906
V_CUT
C435
R402
C457
C439
R400
R405
C454
1
RP402
C413
C918
R404
RP404
C925
RP403
R413
C421
RP405
RP406
C402
R409
C441
R794
R420 C425
R414
RP401
RP400
IC401
D725
S200
T405
L407
C916
IR KEYBOARD
L408
S403 S401
16
L404
C742
R937
CB900
R782
R9381
L703
R791C769
R482R486
T404
C410C471
F700
15
IC701
C446
IC901
R780
C455
C741 R783 R781
C728 R769 C731
R418
1
R478
C436
R403
C456
1
C467
2R485 C459
R484
R479 L406
C740
R785 L704 C762
1
192
T704
HDMI11
C470
L412
C469
L411
C468
L410
L409
C466
1
R465
1
R461
1
R487
R460
193
1
C409 R462 R481 R477
C738 R779 C739
R480
R466
C407
V_CUT
TRANSPORT LINE
SAPPHIRE TARGET SPECIFICATIONS (MPEG2)
26", 32", 37”, 40”, 42”
HD Ready
Concept Properties
Scaler IC
MStar Sapphire
HD Ready
HD READY
DeInterlacer
3D
Comb Filter
3D
BACK CONNECTIONS
Antenna
Scart
1 (analog reception optional)
1 ( Full)
S-VHS In
-
Video In (RCA)
-
Audio In (2 RCA)
-
Audio Out (2 RCA)
-
Progressive YPbPr In (3 RCA)
1
Progressive Audio In (2 RCA)
1
DVI
-
HDMI
-
PC Audio (L, R)
1
D-Sub 15 (VGA Connector)
1
SPDIF Coaxial
1
Headphone
-
FRONT\SIDE CONNECTIONS
S-VHS In
1
Video In (RCA)
1
Audio In (2 RCA)
1
HDMI
2 (3 opt)
USB
1 OPT. (cost-up)
CI
1
Headphone
1
VIDEO & GRAPHICS IN\OUT
CVBS In
2 (1 via RCA, 1 via Scarts)
RF In
1
Y\C In
2 (1 via Scart, 1 via S-VHS)
RGB+FB In-Video
RGB+HS, VS In -Graphics
YPbPr In (Progressive)
HDMI In
YUV In
CVBS Out
1 through Scart
1 through DSUB-15
1
2 (3 OPT.)
1
1 (via scart)
AUDIO IN\OUT
Stereo L, R In
4 (2 via RCA, 1 via Scart, 1 via PC
Headphone)
Stereo L, R Out
2 (1 via scart, 1 via SPDIF output)
Subwoofer Out
NO
S\PDIF In
-
S\PDIF Out
1
Audio Output Power (nominal)
Number of speakers
For 26”: 2x6W
For 32”,37”,40”,42”: 2x10 W
2 (L+R)
ANALOG FRONT END
Type
Multisystem
Receiving System
Input Freq. Range (MHz)
Tune down to 45,25MHz
Tune up to 855,25MHz
Input Connector
Aerial Input Impedance
Hybrid Silicon Tuner
Yes
PAL/SECAM BG/DK/I/L/L’, NTSC
4.43, 3.58 via scart
VHF (48,25-463,25MHz)
UHF (471,25-855,25MHz)
YES
IEC 169-2, Female
75 Ohm (unbalanced)
Tuning System
FST
Tuning Control
PLL
Antenna Loop Through
NO
RF Modulator
Channel Bandwidth
ATS (Automatic Tuning System)
NO
6\7\8 MHz Switchable
Optional in Service Menu
Manual Search
YES
AFT (Auto Fine Tuning)
DIGITAL FRONT END
Demodulation
Hierarchical Modes
Transmission Mode
Constellations
Guard Interval
Input Frequency Range
Channel Bandwidth
Input Connector
Aerial Input Impedance
Signal Level
Convolutional Code Rates
Channel Range
YES
ETS 300 744 (DVB-T), COFDM
Hierarchical - Non hierarchical
ALL ALLOWED
ALL
IEC 169-2, Female
75 Ohm (unbalanced)
-80 dBm to -20dBm
ALL ALLOWED
MPEG Transport Stream A/V Decoding
Transport Stream
Transport of AVC Video
ITU-T Rec H.222 / ISO/IEC 13818-1
Profile Level
MPEG-2 MP@ML,
MPEG-2 MP@HL,
Aspect Ratio
4:3, 16:9, Pan&Scan, Letterbox
Video Resolution
576i, 576p, 720p, 1080i
Audio Decoding
AC3 (Dolby Digital) - if possible,
MPEG1 Layers 1,2
AFD Decoding
YES
CONDITIONAL ACCESS &
COMMON INTERFACE
Common Interface
Embedded Cond. Access
Top Up TV Compliant
YES
NO
YES
Smart Card
NO
VIDEO & GRAPHICS PROCESSING
Comb Fitler
3D
DLTI, DCTI
YES
Noise Reduction
YES
Sync On Green (SOG) support on graphics
YES
Gamma Correction
YES
De-interlacing
Main Picture
Chroma Decoding
Color Controls
HDMI Receiver
3D Frame Based Motion Adaptive
Noise Reduction
YES
Scaling
YES
Analog/Digitized
Standard
Digitized
PAL, SECAM, NTSC
Brightness
YES
Contrast
YES
Color\Saturation
YES
Color Temperature
YES
Tint
YES
HDMI 1.3 Compliant
YES
CEC
Resolution
HDCP Support
AV PIP
IF POSSIBLE
Video upto 1080p@60 HZ
YES
NO
2 Tuner PIP
-
Txt Pages
Min 100p
Fastext
YES
Toptext
OPT via service menu
VPS/PDC/CNI
YES
WSS
YES
AUDIO PROCESSING
Standart
BG, DK, L\L', I
(BG, DK, L\L', I, M, N, BTSC)
Stereo Decoding
YES
(German A2, Nicam, BTSC)
Dynamic Bass
Opt.
Equalizer
YES
Dual I-II
YES
Surround Effect
Opt.
SRS
Opt. (cost-up)
Effect\Spatial
YES
APPLICATIONS
Menu System
Beko System, Grundig System
Remote Control
Beko RC, Grundig RC
Minimum: Cro, Cze, Dan, Dut,
Eng, Fin, Fra, Ger, Hun, Ita, Nor,
Pol, Slk, Sln, Spa, Swe, Tur
Supported Menu Languages
Picture Formats (4:3, 16:9, 14:9, Panorama,
LetterBox, Subtitle)
4:3
YES
14:9
YES
16:9
YES
Panorama
YES
Letterbox
YES
Subtitle
YES
Auto
Number of Program Storage
YES
100 analog / 200 digital
No Ident Timer
YES
Picture Freze
YES
AVL (Automatic Volume Level)
YES
Swap/Zapp
Optional in Service Menu
Child Lock / Panel Lock
YES
Picture Format Switching Through Scart
(Pin 8)
YES
Auto RGB Detect Through Scart1 (Pin 16)
YES
DDC Support
YES
Timer
On/Off
Picture Smart Modes
YES
Sound Smart Modes
YES
Simple Hotel Mode
OPT.
Software Update
YES (via VGA)
Stby to On in PC Mode
when last watched is PC
YES
Stby to On automatically
when PC signal is available
NO
Single TTL support
24-bit
YES
Dual TTL support
48-bit
NO
Single 10-bit TTL support
30-bit
NO
Dual 10-bit TTL support
60-bit
Wake Up in PC
SUPPORTED OUTPUTS
FOR DISPLAYS
NO
Single LVDS support (8-bit)
YES
Dual LVDS support (8-bit)
YES
Single LVDS support (10-bit)
YES
Dual LVDS support (10-bit)
opt.
Timing Control Support
NO
Balance Board / Inverterless Panel Support
NO
POWER SUPPLY
PSU Type
Ratings
Internal
32"
37”
40”
42”
Input Range
140V-265V, 50, 60Hz
St-By Power Consumption
< 1W
REGULATIONS
EN55020
EMC
EN55013
EN55022 (with PC)
SAFETY
EN60065
CABINET
Keyboard
LED
On\Off (Tact switch)
YES
Volume Up
YES
Volume Down
YES
Program Up
YES
Program Down
YES
Menu
YES
Source
YES
Single color/Single
Intensity
YES
Single Color/Double
Intensity
YES
Multi color
NO
On Timer Led
NO
VIDEO & GRAPHICS PROCESSING (USB)
Chroma Decoding
PAL, SECAM, NTSC
Comb Fitler
3D (PAL/NTSC)
MPEG1 Encoding
NO
MPEG2 Encoding
NO
MPEG1 decoding (I frames only)
YES
MPEG2 decoding
YES
MPEG4 decoding (ASP)
YES
DV decoding
YES
MJPEG decoding
YES
MP3 decoding
YES
AAC decoding
YES
WMA decoding
YES
WAV decoding
YES
JPEG decoding
YES
GIF decoding
YES
Output
576p - 720p
APPLICATIONS (USB)
Screen Saver
Yes
Supported Menu Languages
Timer Recording
Supported TV languages
Manuel\Automatic
NO
Timing Entry Upto
NO
One Touch Recording
VPS/PDC Recording
NO
(if VBI data given with
(CVBS) video signal )
NO
Record one channel/ watch another
No
Time Shift (Live Pause TV)
No
Fast FWD-REW in Time shift mode
No
Slow FWD-REW in Time shift mode
No
Fast picture search (forward and reverse)
2x / 4x / 8x / 16x / 32x
Slow motion (forward and reverse)
1/2, 1/4, 1/8, 1/16
Still picture
YES
Picture by picture playback
1/2, 1/4, 1/8, 1/16 (forward)
Repeat
Title/chapter/sequence A – B
File Browser
File editing
Yes
Delete
Yes
Splitting
Yes
Playlist
Yes
Multi Delete (Title)
Yes
USB Connection 2.0
YES
Upload from PC
YES
External HDD Connection
YES
SUPPORTED FILES (USB)
.mp3
YES
.wav
YES
.wma
YES
.jpg
YES
.bmp
YES
.png
YES
.gif
NO
.tiff
NO
.3gp
NO
.mov
NO
divx (3/4/5/6.x)
YES
.mpg
YES
.mpe
YES
.vob
YES
.dat
YES
.trp
YES
.ts
YES
.avi
YES
.mp4
YES
SE CHASSI SERVICE MENU PARAMETERS
OPTION 0
STANDBY
TEXT
TEXT PAGE
TUNER
PLUG PLAY
HDCP VERIFY
Customer : Customer mode ; Factory : Factory mode.
Teletext type : TOP:Toptext Fast :Fastext ; Fast_Top :Fastext and Toptext ;None
Number of Text Pages 10 , 250, 1000
THOMSON_DTT75412_TUNER
Demo mode. Will be set as ON after all controls and adjustments are completed.
In Test and Verification process, check "OK" sign after confirmation with the right
arrow button on RC.
OPTIONS 1
BLUEBACK Blueback feature ON ; OFF
PANORAMA Panorama feature AVAIL :Available ; NAVAIL :Not Available.
REMOTE CONT Should be set depending on the remote control of the TV set
BEKO 44 Key ; BEKO 50 Key
KEYPAD Keypad type. 6 BUTTON+1STD
HOTEL Simple Otel TV feature AVAIL :Available ; NAVAIL : Not Available
HOTEL VOL Maximum volume level for Otel TV sets. Should be set as 20.
OPTIONS 2
PC
HDMI 1
HDMI 2
HDMI 3
AV
S-Video
SCART
YPbPr
USB
Note:
AVAIL :Available ; NAVAIL : Not Available
AVAIL :Available ; NAVAIL : Not Available
AVAIL :Available ; NAVAIL : Not Available
AVAIL :Available ; NAVAIL : Not Available
AVAIL :Available ; NAVAIL : Not Available
AVAIL :Available ; NAVAIL : Not Available
AVAIL :Available ; NAVAIL : Not Available
AVAIL :Available ; NAVAIL : Not Available
AVAIL :Available ; NAVAIL : Not Available
Above items should be set according to the product features.
SOUND OPTIONS
L
Headphone
ATS
Not:
AVAIL :Available ; NAVAIL : Not Available
AVAIL :Available ; NAVAIL : Not Available
Automatic Tuning System AVAIL :Available ; NAVAIL : Not Available
For all domestic and all Toshiba-Daewoo-Grundig products set as AVAIL. For other
products as NAVAIL unless specified by the customer.
SRS TruSurround AVAIL :Available ; NAVAIL : Not Available
HIDEV MONO Should be set as NAVAIL
IF SETTINGS
VHF AGC :14
UHF AGC :14
LPRIME AGC :14
** None of the items will be modified in other menus.
Some of the required IC and Transistor outputs.
1
2
3
4
1
2
3
4
IC200
ST-BY
0,6
1,8
3,3
1,8
IC901
ST-BY
0
1,25
3,17
1,25
T403
ST-BY
1
5,1
2
3,2
3
3,3
ON
0,6
1,8
3,3
1,8
ON
0
1,25
3,17
1,25
ON
5,1
3,2
3,3
1
2
3
IC803
ST-BY ON
0
1,9
0
2,6
0
0
1
2
3
IC902
ST-BY ON
0
0
0
2,5
0
3,6
1
2
3
T901
ST-BY ON
0
3,6
0
2,5
3,3
3,3
1
2
3
4
5
6
7
8
IC900
ST-BY
4,95
4,95
0,79
0
0
4,95
3,3
0
ON
11,1
11,1
0,79
0
0
11,1
3,3
0
1
2
3
4
5
6
T701
ST-BY
0
0
0
0
0
0
ON
8,58
9,25
11,9
8,58
9,25
11,9
Q901
T902
ST-BY
1
0
2
0
3
5,2
ON
10,8
5,2
5,2
IC701
ST-BY
0
0
3,3
0
5,2
ON
5,17
0
3,25
5,15
5,17
1
2
3
4
5
T903 (for 12V panel)
ST-BY ON
1
0
1,08
2
0
11,85
3
0
11,85
1
2
3
4
5
6
ST-BY ON
0
0
0,7
0
0
1,45
0
0
0,7
0
0
4,56
Some of the required point oscilloscop outputs
NOT: We applied color bar and 1Khz sound signal at 2010.25 Mhz (PAL-BG-CH10)
Signals may change according to tv' s settings and source.
1) CVBS signal measured on Pin17 of IC300
2) VBLCTRL signal measured on R921 to GND.
HIGH: Stand-by
LOW: ON
3) POWER-ON/OFF signal measured on R925 to GND.
HIGH: Stand-by
LOW: ON
4) PANEL_ON_OFF signal measured on R918 to GND.
HIGH: Stand-by
LOW: ON
5) PANEL-VCC signal measured on L405 to GND.
6) Y400 crystal output signal
LOW: Stand-by
HIGH: ON
7) RESET signal measured on R483 to GND.
8) AUDIO-ON/OFF signal measured on R431 to GND.
LOW: Stand-by
HIGH: ON
9) MUTE_S signal measured on Pin4 of IC800
LOW: Sound ON
HIGH: MUTE
10) Speaker output with 1Khz input and 20% volume level
11) SIF signal measured on Pin12 of IC300
MSD2338AL
DVB LCD/PDP DTV Processor
Preliminary Data Sheet Version 0.1
Doc. No.: 2007110264
Attention Please: Under the technology license agreement between MStar and Dolby/SRS/BBE, MStar is obliged not to
provide samples that incorporate Dolby/SRS/BBE technology to any third party who is not a qualified licensee of
Dolby/SRS/BBE.
FEATURES
n
n
n
n
n
1
Twin-turbo 8051 Micro-controller
Ÿ Twin-turbo 8051 MCU
Ÿ Interrupt controller
Ÿ Supports ISP
Ÿ One full duplex UART
Transport Stream De-multiplexer
Ÿ Two external TS inputs and one internal TS
data path
Ÿ Supports both parallel and serial TS interface,
with or without sync signal
Ÿ Maximum TS data rate is 104 Mbps for serial
or 13 MB/sec for parallel
Ÿ 32 general purpose PID filters and section
filters for each transport stream de-multiplexer
Ÿ One video PES and one audio PES channel
Ÿ Supports MHEG5, DVB subtitle and digital
teletext
MPEG-2 A/V Decoder
Ÿ ISO/IEC 13818-2 MPEG-2 video MP@ML
Ÿ Automatic frame rate conversion
Ÿ Supports resolution in SDTV
Ÿ MPEG-1, MPEG-2 (Layer I/II), and Dolby1
Digital (AC-3) audio decoder
MPEG-4 Decoder
Ÿ Supports ISO/IEC 14496-2 MPEG-4 ASP video
decoding
Ÿ Supports resolution up to D1
NTSC/PAL/SECAM Video Decoder
Ÿ Supports NTSC-M, NTSC-J, NTSC-4.43, PAL
(B,D,G,H,M,N,I,Nc), and SECAM
Ÿ Automatic TV standard detection
Ÿ Motion adaptive 3-D comb filter for NTSC/PAL
Ÿ 8 configurable CVBS & Y/C S-video inputs
Ÿ Supports Teletext level-1.5, Closed Caption
(analog CC 608/analog CC 708/digital CC
608/digital CC 708), V-chip and SCTE
Ÿ Macrovision detection
Ÿ CVBS video output
Trademark of Dolby Laboratories
Doc. No.: 2007110264
n
n
n
n
n
Multi-Standard TV Sound Processor
Ÿ Supports BTSC/A2/EIA-J demodulation in NTSC
and A2/NICAM/FM/AM demodulation in PAL
Ÿ Supports MTS Mode MONO/STEREO/SAP in
BTSC/EIA-J and MONO/STEREO/DUAL in
A2/NICAM
Ÿ L/Rx4 and SIF audio input
Ÿ L/R speaker and 2 additional L/R audio line-out
Ÿ Built-in audio output DAC’s
Ÿ Audio processing for loudspeaker channel,
including volume, balance, mute, tone, EQ,
virtual stereo/surround, and treble/bass
Ÿ Optional advanced surround available (Dolby,
SRS2, BBE3… etc) Note
Digital Audio Interface
Ÿ HDMI audio channel processing capability
Ÿ Programmable delay for audio/video
synchronization
Analog RGB Compliant Input Ports
Ÿ Two analog ports support up to 1080P
Ÿ Supports PC RGB input up to SXGA@75Hz
Ÿ Supports HDTV RGB/YPbPr/YCbCr
Ÿ Supports Composite Sync and SOG
(Sync-on-Green) separator
Ÿ Automatic color calibration
High-Performance Scaling Engine
Ÿ Fully Programmable shrink/zoom capabilities
Ÿ Nonlinear video scaling supports various
modes including Panorama
DVI/HDCP/HDMI Compliant Input Port
Ÿ Supports up to 225MHz @ 1080P 60Hz with
12-bit deep-color resolution
Ÿ Single link on-chip DVI 1.0 compliant receiver
Ÿ High-bandwidth Digital Content Protection
(HDCP) 1.1 compliant receiver
Ÿ High Definition Multimedia Interface (HDMI)
1.3 compliant receiver with CEC (Consumer
Electronics Control) support
Ÿ Long-cable tolerant robust receiving
2
Trademark of SRS Labs, Inc.
3
Registered trademark of BBE Sound, Inc.
-1Copyright © 2007 MStar Semiconductor, Inc. All rights reserved.
11/29/2007
MSD2338AL
DVB LCD/PDP DTV Processor
Preliminary Data Sheet Version 0.1
Doc. No.: 2007110264
n
n
Auto-Configuration/Auto-Detection
Ÿ Auto input signal format and mode detection
Ÿ Auto-tuning function including phasing,
positioning, offset, gain, and jitter detection
Ÿ Sync Detection for H/V Sync
Video Processing & Conversion
Ÿ 3-D motion adaptive video de-interlacers with
edge-oriented adaptive algorithm for smooth
low-angle edges
Ÿ Automatic 3:2 pull-down & 2:2 pull-down
detection and recovery
Ÿ MStar 3rd Generation Advanced Color Engine
(MStarACE-3) automatic picture enhancement
gives:
Ÿ Brilliant and fresh color
Ÿ Intensified contrast and details
Ÿ Vivid skin tone
Ÿ Sharp edge
Ÿ Enhanced depth of field perception
Ÿ Accurate and independent color control
Ÿ sRGB compliance allows end-user to
experience the same colors as viewed on CRTs
and other displays
Ÿ 3-channel gamma curve adjustment
Ÿ Programmable 10-bit RGB gamma CLUT
Ÿ 3-D video noise reduction
Ÿ Frame rate conversion
n
n
n
n
Output Interface
Ÿ Supports up to 8-bit dual LVDS
UXGA/WSXGA+ panel interface
Ÿ Supports 2 data output formats: Thine & TI
data mappings
Ÿ Compatible with TIA/EIA
Ÿ With 6/8 bits options
Ÿ Spread spectrum output frequency for EMI
suppression
CVBS Video Output
Ÿ Supports CVBS/S-video bypass output
Ÿ Built-in video encoder for encoding digital
video into CVBS output
2D Graphics Engine
Ÿ Point draw, line draw, rectangle draw/fill and
text draw
Ÿ BitBlt and stretch BitBlt
Ÿ Raster Operation (ROP)
Miscellaneous
Ÿ DRAM controller to support up to 16-bit DDR
interface
Ÿ Supports Common Interface for conditional
access
Ÿ SPI bus for external flash
Ÿ USB 2.0 host controller with the flexibility for
connecting external storage devices
Ÿ 256-LQFP package
Ÿ Operating at 1.2V (core), 2.5V (DDR), and
3.3V (I/O and analog)
Note: Please see Ordering Guide for details on advanced
surround.
Doc. No.: 2007110264
-2Copyright © 2007 MStar Semiconductor, Inc. All rights reserved.
11/29/2007
MSD2338AL
DVB LCD/PDP DTV Processor
Preliminary Data Sheet Version 0.1
Doc. No.: 2007110264
GENERAL DESCRIPTION
The MSD2338AL is a highly integrated controller IC for LCD/PDP DTV applications with resolutions up to
UXGA/WSXGA+. It is configured with an integrated triple-ADC/PLL, a multi-standard TV video and audio
decoder, a motion adaptive video de-interlacer, a scaling engine, the MStarACE-3 color engine, an advanced 2D
graphics engine, a transport processor, a standard-definition (SD) MPEG video decoder, a 24-bit DSP for MPEG
audio decoding, a DVI/HDCP/HDMI receiver, and a peripheral control unit providing a variety of HDTV control
functions.
The MSD2338AL comprises an MPEG-2 transport processor with advanced section filtering capability, an
MPEG-2 (MP@ML profile) video decoder, an MPEG layer I and II digital audio decoder with analog audio
outputs that are designed to support DVB SDTV programs while handling conditional access. Furthermore, it is
also possible to decode MPEG-4, JPEG, MP3 formats from external sources such as USB interfaces.
For analog TV, the MSD2338AL includes NTSC/PAL/SECAM multi-standard video decoder comprising a 3-D
motion adaptive comb filter and time-based correction, and a NICAM/A2 audio decoder to support worldwide
television standards. The MSD2338AL is also configured with a VBI processor to decode digital information
such as Close Caption/V-chip/teletext/WSS/CGMS-A/VPS. In addition, the MStar advanced LCD TV processor
enhances video quality, motion adaptive de-interlacer, picture quality adjustment units, and MStarACE-3 color
engine.
By integrating peripherals including USB 2.0 host controller, UART, IR, SPI, I2C, and PWM, the MSD2338AL
fulfills all requirements in advanced DTV sets. To further reduce system costs, the MSD2338AL also integrates
intelligent power management control capability for green-mode requirements and spread-spectrum support for
EMI management.
Doc. No.: 2007110264
-3Copyright © 2007 MStar Semiconductor, Inc. All rights reserved.
11/29/2007
Doc. No.: 2007110264
-4Copyright © 2007 MStar Semiconductor, Inc. All rights reserved.
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
42
105
41
104
40
103
39
102
38
101
37
100
36
99
35
98
34
97
33
96
32
95
31
94
30
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
4
68
67
66
65
GPIO0/UART_RX1/CEC
GPIO1/UART_TX1
GPIO2
RXCKN
RXCKP
RX0N
RX0P
AVDD_33
RX1N
RX1P
GND
RX2N
RX2P
GPIO125
REXT
DDCD_DA
DDCD_CK
HSYNC1
VSYNC1
VCLAMP
REFP
REFM
BIN1P
SOGIN1
GIN1P
RIN1P
BINM
BIN0P
GINM
GIN0P
SOGIN0
RINM
RIN0P
AVDD_33
GND
HSYNC0
VSYNC0
CVBS7
CVBS5
CVBS6
CVBS4
CVBS3
CVBS2
CVBS1
VCOM1
CVBS0
VCOM0
AVDD_33
CVBSOUT
GND
AVDD_SIF
SIF1P
SIF1M
VDDC
GND
AUL0
AUR0
AUL1
AUR1
AUL2
AUR2
AUL3
AUR3
AUCOM
MSD2338AL
XXXXXXXX
XXXXX
GND
AUVRM
AUVRP
AUVAG
AVDD_AU
AUOUTL2
AUOUTR2
AUOUTL1
AUOUTR1
AUOUTL0
AUOUTR0
VDDP
GND
VDDC
TS0DATA[0]
TS0DATA[1]
TS0DATA[2]
TS0DATA[3]
TS0DATA[4]
TS0DATA[5]
TS0DATA[6]
TS0DATA[7]
TS0VALID
TS0SYNC
TS0CLK
GND
VDDC
PCMDATA[7]/CI_DATA[7]
PCMDATA[6]/CI_DATA[6]
PCMDATA[5]/CI_DATA[5]
PCMDATA[4]/CI_DATA[4]
PCMDATA[3]/CI_DATA[3]
PCMDATA[2]/CI_DATA[2]
PCMDATA[1]/CI_DATA[1]
PCMDATA[0]/CI_DATA[0]
PCMADR[14]/CI_A[14]
PCMADR[13]/CI_A[13]
PCMADR[12]/CI_A[12]
PCMADR[11]/CI_A[11]
PCMADR[10]/CI_A[10]
PCMADR[9]/CI_A[9]
PCMADR[8]/CI_A[8]
VDDP
PCMADR[7]/CI_A[7]
PCMADR[6]/CI_A[6]
PCMADR[5]/CI_A[5]
PCMADR[4]/CI_A[4]
PCMADR[3]/CI_A[3]
PCMADR[2]/CI_A[2]
PCMADR[1]/CI_A[1]
PCMADR[0]/CI_A[0]
GPIO3
GPIO4
DDCA_DA
DDCA_CK
SAR0
SAR1
SAR2
SAR3
PWM0/FLASH_WP1
PWM1
PWM2
PWM3/FLASH_WP2
HWRESET
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
GND
AVDD_MPLL
XIN
XOUT
GND
USB_DP
USB_DM
AVDD_USB
USB_REXT
AVDDL_DVI
DQS[0]
AVDD_DDR
MDATA[0]
MDATA[1]
DQM[0]
GND
MDATA[2]
MDATA[3]
AVDD_DDR
MDATA[4]
MDATA[5]
MDATA[6]
MDATA[7]
VDDC
CASZ
RASZ
WEZ
BADR[0]
BADR[1]
MADR[12]
MADR[11]
MADR[10]
MADR[9]
MADR[8]
MADR[7]
AVDD_DDR
MADR[6]
MADR[5]
MADR[4]
MADR[3]
MADR[2]
MADR[1]
MADR[0]
AVDD_MEMPLL
MCLKE
MCLK
MCLKZ
MVREF
GPIO14/UART_TX1
I2S_OUT_MUTE/CEC
DDCR_CK
DDCR_DA
SPDIFO
I2S_OUT_SD
I2S_OUT_BCK
VDDC
GND
VDDP
I2S_OUT_WS
I2S_OUT_MCK
SPDIFI
I2S_IN_SD
I2S_IN_BCK
I2S_IN_WS
MSD2338AL
DVB LCD/PDP DTV Processor
Preliminary Data Sheet Version 0.1
Doc. No.: 2007110264
PIN DIAGRAM (MSD2338AL)
1
192
2
191
3
190
5
188
6
Pin 1
189
187
7
186
8
185
9
184
10
183
11
182
12
181
13
180
14
179
15
178
16
177
17
176
18
175
19
174
20
173
21
172
22
171
23
170
24
169
25
168
26
167
27
166
28
165
29
164
163
162
161
160
159
158
157
156
155
154
153
43
152
150
44
151
149
45
148
46
147
47
146
48
145
49
144
50
143
51
142
52
141
53
140
54
139
55
138
56
137
57
136
58
135
59
134
60
133
61
132
62
131
63
130
64
129
DQS[1]
AVDD_DDR
MDATA[8]
MDATA[9]
DQM[1]
GND
MDATA[10]
MDATA[11]
AVDD_DDR
MDATA[12]
MDATA[13]
MDATA[14]
MDATA[15]
INT
IRIN
TS1CLK
TS1SYNC
TS1VALID
TS1DATA
CI_CD
CI_RST
GPIO97
GPIO98
GPIO99
GPIO100
VDDC
GND
GND
AVDD_LPLL
LVB0M
LVB0P
LVB1M
LVB1P
LVB2M
LVB2P
LVBCKM
LVBCKP
LVB3M
LVB3P
VDDP
LVA0M
LVA0P
LVA1M
LVA1P
LVA2M
LVA2P
LVACKM
LVACKP
LVA3M
LVA3P
PCMWAIT/CI_WACK
PCMIRQ/CI_INT
PCMCEN/CI_CS
PCMREG/CI_CLK
PCMWEN
PCMOEN
PCMIOW/CI_WR
PCMIOR/CI_RD
GPIO15/CEC
VDDP
SCZ
SDO
SDI
SCK
11/29/2007
MSD2338AL
DVB LCD/PDP DTV Processor
Preliminary Data Sheet Version 0.1
Doc. No.: 2007110264
PIN DESCRIPTION
Analog Interface
Pin Name
Pin Type
Function
Pin
VCLAMP
CVBS/YC Mode Clamp Voltage Bypass
20
REFP
Internal ADC Top De-coupling Pin
21
REFM
Internal ADC Bottom De-coupling Pin
22
REXT
Analog Input
External Resister 390 ohm to AVDD_33
15
BIN1P
Analog Input
Analog Blue Input from Channel 1
23
SOGIN1
Analog Input
Sync-On-Green input from Channel 1
24
GIN1P
Analog Input
Analog Green Input from Channel 1
25
RIN1P
Analog Input
Analog Red Input from Channel 1
26
BINM
Analog Input
Reference Ground for Analog Blue Input
27
BIN0P
Analog Input
Analog Blue Input from Channel 0
28
GINM
Analog Input
Reference Ground for Analog Green Input
29
GIN0P
Analog Input
Analog Green Input from Channel 0
30
SOGIN0
Analog Input
Sync-On-Green Input from Channel 0
31
RINM
Analog Input
Reference Ground for Analog Red Input
32
RIN0P
Analog Input
Analog Red Input from Channel 0
33
HSYNC1
Schmitt Trigger Input HSYNC/Composite Sync for VGA Input from channel 1
w/ 5V-tolerant
18
VSYNC1
Schmitt Trigger Input VSYNC for VGA Input from channel 1
w/ 5V-tolerant
19
HSYNC0
Schmitt Trigger Input HSYNC/Composite Sync for VGA Input from channel 0
w/ 5V-tolerant
36
VSYNC0
Schmitt Trigger Input VSYNC for VGA Input from channel 0
w/ 5V-tolerant
37
Analog Video Input/Output Interface
Pin Name
Pin Type
Function
Pin
VCOM1
Analog Input
CVBS Video Input Reference Ground
45
VCOM0
Analog Input
CVBS Video Input Reference Ground
47
CVBS7
Analog Input
CVBS (Composite) Video Input Channel 7
38
CVBS5
Analog Input
CVBS (Composite) Video Input Channel 5
39
CVBS6
Analog Input
CVBS (Composite) Video Input Channel 6
40
CVBS4
Analog Input
CVBS (Composite) Video Input Channel 4
41
CVBS3
Analog Input
CVBS (Composite) Video Input Channel 3
42
Doc. No.: 2007110264
-5Copyright © 2007 MStar Semiconductor, Inc. All rights reserved.
11/29/2007
MSD2338AL
DVB LCD/PDP DTV Processor
Preliminary Data Sheet Version 0.1
Doc. No.: 2007110264
Attention Please: Under the technology license agreement between MStar and Dolby/SRS/BBE, MStar is obliged not to
provide samples that incorporate Dolby/SRS/BBE technology to any third party who is not a qualified licensee of
Dolby/SRS/BBE.
FEATURES
n
n
n
n
n
1
Twin-turbo 8051 Micro-controller
Ÿ Twin-turbo 8051 MCU
Ÿ Interrupt controller
Ÿ Supports ISP
Ÿ One full duplex UART
Transport Stream De-multiplexer
Ÿ Two external TS inputs and one internal TS
data path
Ÿ Supports both parallel and serial TS interface,
with or without sync signal
Ÿ Maximum TS data rate is 104 Mbps for serial
or 13 MB/sec for parallel
Ÿ 32 general purpose PID filters and section
filters for each transport stream de-multiplexer
Ÿ One video PES and one audio PES channel
Ÿ Supports MHEG5, DVB subtitle and digital
teletext
MPEG-2 A/V Decoder
Ÿ ISO/IEC 13818-2 MPEG-2 video MP@ML
Ÿ Automatic frame rate conversion
Ÿ Supports resolution in SDTV
Ÿ MPEG-1, MPEG-2 (Layer I/II), and Dolby1
Digital (AC-3) audio decoder
MPEG-4 Decoder
Ÿ Supports ISO/IEC 14496-2 MPEG-4 ASP video
decoding
Ÿ Supports resolution up to D1
NTSC/PAL/SECAM Video Decoder
Ÿ Supports NTSC-M, NTSC-J, NTSC-4.43, PAL
(B,D,G,H,M,N,I,Nc), and SECAM
Ÿ Automatic TV standard detection
Ÿ Motion adaptive 3-D comb filter for NTSC/PAL
Ÿ 8 configurable CVBS & Y/C S-video inputs
Ÿ Supports Teletext level-1.5, Closed Caption
(analog CC 608/analog CC 708/digital CC
608/digital CC 708), V-chip and SCTE
Ÿ Macrovision detection
Ÿ CVBS video output
Trademark of Dolby Laboratories
Doc. No.: 2007110264
n
n
n
n
n
Multi-Standard TV Sound Processor
Ÿ Supports BTSC/A2/EIA-J demodulation in NTSC
and A2/NICAM/FM/AM demodulation in PAL
Ÿ Supports MTS Mode MONO/STEREO/SAP in
BTSC/EIA-J and MONO/STEREO/DUAL in
A2/NICAM
Ÿ L/Rx4 and SIF audio input
Ÿ L/R speaker and 2 additional L/R audio line-out
Ÿ Built-in audio output DAC’s
Ÿ Audio processing for loudspeaker channel,
including volume, balance, mute, tone, EQ,
virtual stereo/surround, and treble/bass
Ÿ Optional advanced surround available (Dolby,
SRS2, BBE3… etc) Note
Digital Audio Interface
Ÿ HDMI audio channel processing capability
Ÿ Programmable delay for audio/video
synchronization
Analog RGB Compliant Input Ports
Ÿ Two analog ports support up to 1080P
Ÿ Supports PC RGB input up to SXGA@75Hz
Ÿ Supports HDTV RGB/YPbPr/YCbCr
Ÿ Supports Composite Sync and SOG
(Sync-on-Green) separator
Ÿ Automatic color calibration
High-Performance Scaling Engine
Ÿ Fully Programmable shrink/zoom capabilities
Ÿ Nonlinear video scaling supports various
modes including Panorama
DVI/HDCP/HDMI Compliant Input Port
Ÿ Supports up to 225MHz @ 1080P 60Hz with
12-bit deep-color resolution
Ÿ Single link on-chip DVI 1.0 compliant receiver
Ÿ High-bandwidth Digital Content Protection
(HDCP) 1.1 compliant receiver
Ÿ High Definition Multimedia Interface (HDMI)
1.3 compliant receiver with CEC (Consumer
Electronics Control) support
Ÿ Long-cable tolerant robust receiving
2
Trademark of SRS Labs, Inc.
3
Registered trademark of BBE Sound, Inc.
-1Copyright © 2007 MStar Semiconductor, Inc. All rights reserved.
11/29/2007
MSD2338AL
DVB LCD/PDP DTV Processor
Preliminary Data Sheet Version 0.1
Doc. No.: 2007110264
Pin Name
Pin Type
Function
Pin
AUOUTL0
Analog Output
Main Audio Output Left Channel 0
74
AUOUTR0
Analog Output
Main Audio Output Right Channel 0
75
AUCOM
Analog Input
Reference Ground for Audio Line Input
64
Common Interface
Pin Name
Pin Type
Function
Pin
PCMDATA[7:0]/
CI_DATA[7:0]
I/O
PCMCIA Data[7:0] /
Common Interface Data[7:0]
92-99
PCMADR[14:0]/
CI_A[14:0]
Output
PCMCIA Address[14:0] /
Common Interface Address[14:0]
100-106,
108-115
PCMIOR/
CI_RD
Output
PCMCIA Input/Output Read /
Common Interface Read
135
PCMIOW/
CI_WR
Output
PCMCIA Input/Output Write /
Common Interface Write
136
PCMOEN
Output
PCMCIA Output Enable
137
PCMWEN
Output
PCMCIA Write Enable
138
PCMREG/
CI_CLK
Output
PCMCIA Register /
Common Interface Clock
139
PCMCEN/
CI_CS
Output
PCMCIA Card Enable /
Common Interface Chip Select
140
PCMIRQ/
CI_INT
Input
PCMCIA Interrupt Request /
Common Interface Interrupt
141
PCMWAIT/
CI_WACK
Input
PCMCIA Extend Bus Wait Cycle /
Common Interface Wait Acknowledge
142
CI_RST
Output
Common Interface Reset
172
CI_CD
Input
Common Interface Card Detect
173
Function
Pin
TS Input Interface
Pin Name
Pin Type
TS0CLK
Input w/ 5V-tolerant TS Clock
89
TS0DATA[7:0]
Input w/ 5V-tolerant TS Data in Parallel; LSB (bit 0) is for serial TS data
86-79
TS0VALID
Input w/ 5V-tolerant TS Data Valid
87
TS0SYNC
Input w/ 5V-tolerant TS Sync-Byte Indicator
88
TS1CLK
Input w/ 5V-tolerant 2nd TS Clock
177
Input w/ 5V-tolerant 2
nd
TS Data in Parallel
174
TS1VALID
Input w/ 5V-tolerant 2
nd
TS Data Valid
175
TS1SYNC
Input w/ 5V-tolerant 2nd TS Sync-Byte Indicator
TS1DATA
Doc. No.: 2007110264
-7Copyright © 2007 MStar Semiconductor, Inc. All rights reserved.
176
11/29/2007
MSD2338AL
DVB LCD/PDP DTV Processor
Preliminary Data Sheet Version 0.1
Doc. No.: 2007110264
DVI/HDMI Interface
Pin Name
Pin Type
Function
Pin
RX0N
Input
DVI/HDMI Channel 0 Negative Data Input
6
RX0P
Input
DVI/HDMI Channel 0 Positive Data Input
7
RX1N
Input
DVI/HDMI Channel 1 Negative Data Input
9
RX1P
Input
DVI/HDMI Channel 1 Positive Data Input
10
RX2N
Input
DVI/HDMI Channel 2 Negative Data Input
12
RX2P
Input
DVI/HDMI Channel 2 Positive Data Input
13
RXCKN
Input
DVI/HDMI Negative Clock Input
4
RXCKP
Input
DVI/HDMI Positive Clock Input
5
Pin Name
Pin Type
Function
Pin
LVA0M
Output
LVDS A-Link Channel 0 Negative Data Output
152
LVA0P
Output
LVDS A-Link Channel 0 Positive Data Output
151
LVA1M
Output
LVDS A-Link Channel 1 Negative Data Output
150
LVA1P
Output
LVDS A-Link Channel 1 Positive Data Output
149
LVA2M
Output
LVDS A-Link Channel 2 Negative Data Output
148
LVA2P
Output
LVDS A-Link Channel 2 Positive Data Output
147
LVACKM
Output
LVDS A-Link Negative Clock Output
146
LVACKP
Output
LVDS A-Link Positive Clock Output
145
LVA3M
Output
LVDS A-Link Channel 3 Negative Data Output
144
LVA3P
Output
LVDS A-Link Channel 3 Positive Data Output
143
LVB0M
Output
LVDS B-Link Channel 0 Negative Data Output
163
LVB0P
Output
LVDS B-Link Channel 0 Positive Data Output
162
LVB1M
Output
LVDS B-Link Channel 1 Negative Data Output
161
LVB1P
Output
LVDS B-Link Channel 1 Positive Data Output
160
LVB2M
Output
LVDS B-Link Channel 2 Negative Data Output
159
LVB2P
Output
LVDS B-Link Channel 2 Positive Data Output
158
LVBCKM
Output
LVDS B-Link Negative Clock Output
157
LVBCKP
Output
LVDS B-Link Positive Clock Output
156
LVB3M
Output
LVDS B-Link Channel 3 Negative Data Output
155
LVB3P
Output
LVDS B-Link Channel 3 Positive Data Output
154
LVDS Interface
Doc. No.: 2007110264
-8Copyright © 2007 MStar Semiconductor, Inc. All rights reserved.
11/29/2007
MSD2338AL
DVB LCD/PDP DTV Processor
Preliminary Data Sheet Version 0.1
Doc. No.: 2007110264
Serial Flash Interface
Pin Name
Pin Type
Function
Pin
SCK
Output
SPI Flash Serial Clock
129
SDI
Output
SPI Flash Serial Data Input
130
SDO
Input w/ 5V-tolerant
SPI Flash Serial Data Output
131
SCZ
Output
SPI Flash Chip Select
132
IRIN
Input w/ 5V-tolerant
IR Receiver Input
178
INT
Input w/ 5V-tolerant
MCU Bus Interrupt; 4mA driving strength
179
Pin Name
Pin Type
Function
Pin
GPIO125
I/O w/ 5V-tolerant
General Purpose Input/Output; 4mA driving strength
14
GPIO100
I/O
General Purpose Input/Output; 4mA driving strength
168
GPIO99
I/O
General Purpose Input/Output; 4mA driving strength
169
GPIO98
I/O
General Purpose Input/Output; 4mA driving strength
170
GPIO97
I/O
General Purpose Input/Output; 4mA driving strength
171
GPIO15/CEC
I/O
General Purpose Input/Output; 4mA driving strength
134
GPIO14/
UART_TX1
I/O
General Purpose Input/Output; 4mA driving strength /
Universal Asynchronous Transmitter
208
GPIO4
I/O w/ 5V-tolerant
General Purpose Input/Output; 4mA driving strength
117
GPIO3
I/O w/ 5V-tolerant
General Purpose Input/Output; 4mA driving strength
116
GPIO2
I/O w/ 5V-tolerant
General Purpose Input/Output; 4mA driving strength
3
GPIO1/
UART_TX1
I/O w/ 5V-tolerant
General Purpose Input/Output; 4mA driving strength /
Universal Asynchronous Transmitter
2
GPIO0/
UART_RX1/
CEC
I/O
General Purpose Input/Output; 4mA driving strength /
Universal Asynchronous Receiver /
Consumer Electronics Control
1
PWM3/
FLASH_WP2
Output
Pulse Width Modulation Output; 4mA driving strength /
Flash Write Protect 2
127
PWM2
Output
Pulse Width Modulation Output; 4mA driving strength
126
PWM1
Output
Pulse Width Modulation Output; 4mA driving strength
125
PWM0/
FLASH_WP1
Output
Pulse Width Modulation Output; 4mA driving strength /
Flash Write Protect 1
124
SAR3
Analog Input
SAR Low Speed ADC Input 3;
General Purpose Input/Output
123
SAR2
Analog Input
SAR Low Speed ADC Input 2;
General Purpose Input/Output
122
GPIO Interface
Doc. No.: 2007110264
-9Copyright © 2007 MStar Semiconductor, Inc. All rights reserved.
11/29/2007
MSD2338AL
DVB LCD/PDP DTV Processor
Preliminary Data Sheet Version 0.1
Doc. No.: 2007110264
Pin Name
Pin Type
Function
Pin
SAR1
Analog Input
SAR Low Speed ADC Input 1;
General Purpose Input/Output
121
SAR0
Analog Input
SAR Low Speed ADC Input 0;
General Purpose Input/Output
120
DRAM Interface
Pin Name
Pin Type
Function
Pin
DQM[1:0]
Output
Data Mask for Low Byte; active high
188, 242
DQS[1:0]
I/O
Data Strobe
192, 246
MVREF
Input
Reference Voltage for DDR SDRAM Interface 209
MCLKZ
Output
DRAM Memory Negative Differential Clock
210
MCLK
Output
DRAM Memory Positive Differential Clock
211
MCLKE
Output
DRAM Memory Clock Enable
212
BADR[1:0]
Output
DRAM Memory Bank Address
228, 229
WEZ
Output
Write Enable; active low
230
RASZ
Output
Row Address Strobe; active low
231
CASZ
Output
Column Address Strobe; active low
232
MDATA[15:0]
I/O
DRAM Memory Data Bus
180-183, 185, 186,
189, 190, 234-237,
239, 240, 243, 244
MADR[12:0]
Output
DRAM Memory Address
227-222, 220-214
Pin Type
Function
Pin
USB External Resistor Pin;
Connected through 910 ohm (±1%) Resistor to GND (Pin
248
USB Interface
Pin Name
USB_REXT
#252)
USB_DM
Analog I/O
USB Inverting Data Input/Output
250
USB_DP
Analog I/O
USB Non Inverting Data Input/Output
251
Pin Name
Pin Type
Function
Pin
DDCD_DA
I/O w/ 5V-tolerant
HDCP Serial Bus Data/DDC Data of DVI/HDMI Port
16
DDCD_CK
Input w/ 5V-tolerant HDCP Serial Bus Clock/DDC Clock of DVI/HDMI Port
17
DDCA_DA
I/O w/ 5V-tolerant
DDC Data for Analog Port
118
DDCA_CK
I/O w/ 5V-tolerant
DDC Clock for Analog Port
119
Misc. Interface
Doc. No.: 2007110264
- 10 Copyright © 2007 MStar Semiconductor, Inc. All rights reserved.
11/29/2007
MSD2338AL
DVB LCD/PDP DTV Processor
Preliminary Data Sheet Version 0.1
Doc. No.: 2007110264
Pin Name
Pin Type
Function
Pin
HWRESET
Schmitt Trigger
Hardware Reset; active high
Input w/ 5V-tolerant
128
DDCR_DA
I/O w/ 5V-tolerant
DDC Data for ROM
205
DDCR_CK
I/O w/ 5V-tolerant
DDC Clock for ROM
206
XIN
Analog Input
Crystal Oscillator Input
254
XOUT
Analog Output
Crystal Oscillator Output
253
Pin Name
Pin Type
Function
Pin
AVDD_SIF
3.3V Power
SIF Power
51
AVDD_AU
3.3V Power
Audio Power
69
AVDD_DDR
2.5V Power
DDR Power
184, 191, 221, 238, 245
AVDD_LPLL
3.3V Power
LPLL Power
164
AVDD_MPLL
3.3V Power
MPLL Power
255
AVDD_MEMPLL
3.3V Power
PLL Power
213
AVDD_33
3.3V Power
ADC Power
8, 34, 48
AVDDL_DVI
1.2V Power
DVI Power
247
AVDD_USB
3.3V Power
USB Power
249
VDDC
1.26V Power
Digital Core Power
54, 78, 91, 167, 201, 233
VDDP
3.3V Power
Digital Input/Output Power
76, 107, 133, 153, 199
GND
Ground
Ground
11, 35, 50, 55, 65, 77, 90, 165,
166, 187, 200, 241, 252, 256
Power Pins
Doc. No.: 2007110264
- 11 Copyright © 2007 MStar Semiconductor, Inc. All rights reserved.
11/29/2007
MSD2338AL
DVB LCD/PDP DTV Processor
Preliminary Data Sheet Version 0.1
Doc. No.: 2007110264
ELECTRICAL SPECIFICATIONS
Analog Interface Characteristics
Parameter
Min
VIDEO ADC Resolution
Typ
Max
10
Unit
Bits
DC ACCURACY
Differential Nonlinearity
TBD
Integral Nonlinearity
TBD
TBD
LSB
LSB
VIDEO ANALOG INPUT
Input Voltage Range
Minimum
0.5
Maximum
1.0
V p-p
V p-p
Input Bias Current
1
uA
Input Full-Scale Matching
1.5
%FS
Brightness Level Adjustment
62
%FS
SWITCHING PERFORMANCE
Maximum Conversion Rate
150
MSPS
Minimum Conversion Rate
12
MSPS
HSYNC Input Frequency
15
200
kHz
PLL Clock Rate
12
150
MHz
PLL Jitter
500
ps p-p
Sampling Phase Tempco
15
ps/°C
250
MHz
DYNAMIC PERFORMANCE
Analog Bandwidth, Full Power
DIGITAL INPUTS
Input Voltage, High (VIH)
2.5
V
Input Voltage, Low (VIL)
0.8
V
Input Current, High (IIH)
-1.0
uA
Input Current, Low (IIL)
1.0
uA
Input Capacitance
5
pF
DIGITAL OUTPUTS
Output Voltage, High (VOH)
VDDP-0.1
V
Output Voltage, Low (VOL)
0.1
V
VIDEO ANALOG OUTPUT
CVBS Buffer Output
Output Low
Output High
Doc. No.: 2007110264
1.5
V
2.0
V
- 48 Copyright © 2007 MStar Semiconductor, Inc. All rights reserved.
11/29/2007
MSD2338AL
DVB LCD/PDP DTV Processor
Preliminary Data Sheet Version 0.1
Doc. No.: 2007110264
Parameter
Min
Typ
Max
Unit
AUDIO
ADC Input
2.0
V p-p
DAC Output
2.0
V p-p
SIF Input Range
Minimum
Maximum
V p-p
V p-p
0
1.8
V
0
3.3
V
0
1.25
V
1.0
1
FSSW Input
SAR ADC Input
FB ADC Input
0.1
2
Specifications subject to change without notice.
Notes:
1. Input full scale is typically 1.8V, but input range is 0 ~ 3.3V.
2. Input full scale is 1.25V, but input range is 0 ~ 3.3V.
Absolute Maximum Ratings
Parameter
Symbol
Min
3.3V Supply Voltages
VVDD_33
2.5V Supply Voltages
Typ
Max
Units
-0.3
3.6
V
VVDD 25
-0.3
2.75
V
1.2V Supply Voltages
VVDD_12
-0.3
1.32
V
Input Voltage (5V tolerant inputs)
VIN5Vtol
-0.3
5.0
V
Input Voltage (non 5V tolerant inputs)
VIN
-0.3
VVDD_33
V
Ambient Operating Temperature
TA
0
70
°C
Storage Temperature
TSTG
-40
150
°C
Junction Temperature
TJ
150
°C
Thermal Resistance (Junction to Air) Natural
θJA
TBD
°C/W
θJC
TBD
°C/W
Conversion
Thermal Resistance (Junction to Case) Natural
Conversion
Note: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a
stress rating only and does not imply functional operation of the device. Exposure to absolute maximum ratings for
extended periods may affect device reliability.
Doc. No.: 2007110264
- 49 Copyright © 2007 MStar Semiconductor, Inc. All rights reserved.
11/29/2007
MSD2338AL
DVB LCD/PDP DTV Processor
Preliminary Data Sheet Version 0.1
Doc. No.: 2007110264
ORDERING GUIDE
Model
Package
The SRS TruSurround XTTM technology rights incorporated in the
Temperature
Package
Range
Description Option
MSD2338AL
0°C to +70°C
LQFP
256
MSD2338AL-LF
0°C to +70°C
LQFP
256
MSD2338AL-S1
0°C to +70°C
LQFP
256
for review. SRS TruSurround XT is protected under US and foreign
MSD2338AL-LF-S1
0°C to +70°C
LQFP
256
patents issued and/or pending. SRS TruSurround XT, SRS and (O)
MSD2338AL-S2
0°C to +70°C
LQFP
256
MSD2338AL-LF-S2
0°C to +70°C
LQFP
256
MSD2338AL-S3
0°C to +70°C
LQFP
256
equipment conveys the right to sell commercialized recordings
MSD2338AL-LF-S3
0°C to +70°C
LQFP
256
made with any SRS technology. SRS Labs requires all set makers
MSD2338AL-S4
0°C to +70°C
LQFP
256
MSD2338AL-LF-S4
0°C to +70°C
LQFP
256
MSD2338AL-S5
0°C to +70°C
LQFP
256
Supply of this Implementation of Dolby Technology does not
MSD2338AL-LF-S5
0°C to +70°C
LQFP
256
convey a license nor imply a right under any patent, or any other
MSD2338AL are owned by SRS Labs, a U.S. Corporation and
licensed to MStar. Purchaser of MSD2338AL must sign a license for
use of the chip and display of the SRS Labs trademarks. Any
products incorporating the MSD2338AL must be sent to SRS Labs
symbol are trademarks of SRS Labs, Inc. in the United States and
selected
foreign
countries.
Neither
the
purchase
of
the
MSD2338AL, nor the corresponding sale of audio enhancement
to comply with all rules and regulations as outlined in the SRS
Trademark Usage Manual separately provided.
Industrial or Intellectual Property Right of Dolby Laboratories, to
Note on product suffix:
1. “LF”: Lead-free version.
2. “S1” ~ “S5”: Advanced surround features.
Code
S1
S2
use this Implementation in any finished end-user or ready-to-use
final product. Companies planning to use this Implementation in
products must obtain a license from Dolby Laboratories Licensing
Description
Corporation before designing such products.
SRS TruSurround XTTM
Dolby® ProLogic® II + Dolby® Virtual Speaker
®
®
®
S3
Dolby ProLogic II + Virtual Dolby Surround
S4
BBE® Digital
S5
BBE® ViVATM
MARKING INFORMATION
MSD2338AL
Part Number
Lot Number
Operation Code A
Operation Code B
Date Code (YYWW)
DISCLAIMER
MSTAR SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE
TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN.
NO
RESPONSIBILITY IS ASSUMED BY MSTAR SEMICONDUCTOR ARISING OUT OF THE APPLICATION
OR USER OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY
LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
Electrostatic charges accumulate on both test equipment and human body and can discharge
without detection. MSD2338AL comes with ESD protection circuitry; however, the device may be
permanently damaged when subjected to high energy discharges. The device should be handled
with proper ESD precautions to prevent malfunction and performance degradation.
REVISION HISTORY
Document
Description
Date
MSD2338AL_ds_v01
Ÿ Initial release
Nov 2007
Doc. No.: 2007110264
- 50 Copyright © 2007 MStar Semiconductor, Inc. All rights reserved.
11/29/2007
MSD2338AL
DVB LCD/PDP DTV Processor
Preliminary Data Sheet Version 0.1
Doc. No.: 2007110264
MECHANICAL DIMENSIONS
D
D1
A
A2
E2
A1
E-Pad
(at back of IC)
q1
q2
c
R1
R2
q
Gauge Plane
0.25mm
Seating Plane
b
L
Symbol
L1
S
E1
E
D2
Millimeter
e
Inch
Min. Nom. Max. Min. Nom. Max.
Symbol
Millimeter
Inch
Min. Nom. Max. Min. Nom. Max.
A
-
-
1.6
-
-
0.063
q
0°
-
7°
0°
-
7°
A1
0.05
-
-
0.002
-
-
q1
0°
-
-
0°
-
-
A2
1.35
1.40
1.45 0.053 0.055 0.057
q2
12° Ref
D
30.00
1.181
b
0.11
0.16
D1
28.00
1.102
c
0.12
-
D2
-
-
10.0
-
-
0.394
e
E
30.00
1.181
L
E1
28.00
1.102
L1
E2
-
Doc. No.: 2007110264
-
10.0
-
-
0.394
S
12° Ref
0.21 0.004 0.006 0.008
0.20 0.005
0.40 TYP.
0.45
0.60
0.008
0.0157 TYP.
0.75 0.018 0.024 0.030
1.00 Ref
0.20
-
-
- 51 Copyright © 2007 MStar Semiconductor, Inc. All rights reserved.
0.039 Ref
-
0.008
-
-
11/29/2007
1
2
3
DDR2_ 32bit.SchDoc
4
5
6
POWER_LVDS.SchDoc
SCART.SchDoc
System & Panel Memory
A
Panel Interface
Keyboard + IR
POWER_LVDS.SchDoc
A
DDR2_ 32bit.SchDoc
PSU
Backlight
DDR2_ 32bit.SchDoc
Audio Amp.SchDoc
Audio
Memory
SIDE AV
SCART.SchDoc
B
B
CI
SCART.SchDoc
Headphone
CI_PCMCIA.SchDoc
Demod.SchDoc
HDMI3
HDMI.SchDoc
Digital Demod
HDMI.SchDoc
HDMI2
HDMI.SchDoc
HDMI
DVB_Tuner.SchDoc
HDMI1
C
C
HDMI.SchDoc
SCART.SchDoc
VGA
SCART.SchDoc
DVB Tuner
SCART.SchDoc
YPbPr
SCART
D
D
Title
Size
Number
Revision
A4
Date:
File:
1
2
3
4
5
26.06.2008
D:\projects\..\Block_diagram.SchDoc
6
Sheet of
Drawn By:
SE CHASSI TROUBLESHOOT
PICTURE
No sound but picture is available
First of all check that there is no problem with the source connections (analog or digital), the broadcast and the connection cables .
Is LVDS supply voltage available on C408 ( +5V or +12V depending on the panel type) ? NO
Check PANEL‐VCC line and related components.
Y
E
S
Is PANEL_ON_OFF signal at "low" level? NO
Check PANEL_ON_OFF line and related components. If the signal is wrong at the output of main IC (IC402, pin179), change IC with a new one.
Y
E
S
Is VBLCTRL signal at "low" level?
Y
E
S
Check the LVDS cable and its connection and be sure that correct and update version of the
sw is loaded on the chassi.
NO
Check VBLCTRL line and related components. If the signal is wrong at the output of main IC (IC402, pin168), change IC with a new one.
SES
No picture but sound is available
First of all be sure that there is no problem with the source connections (analog or digital), the broadcast and the TV isnot on Mute mode .
Is there any problem with the speaker connections?
Check S800 connector on the chassi and speaker cable connections.
YES
N
O
Apply 1KHz audio signal with a Pattern generator. Can you observe 1KHz signal on related pins of S800 connector? (for left speaker pin1 "+", pin2 "‐". For right speaker pin4 "+", pin3 "‐")
NO
YES
Check the speakers and replace with a new one
N
O
Do you observe 1KHz signal at input of IC800 audio amplifier IC? ( for Left input pin5; for right input pin6 ) ses sinyali var mı?
YES
Do you observe 24V supply voltage on pin1 of IC800 ?
N
O
N
O
Do you observe 1KHz signal on pin74 and pin75 of IC402?
YES
Check the line and related components between audio output of IC402 (pin74,pin75) and input pins of IC800 (pin5, pin6).
YES
Check 24V line and related components.
Do you observe 3V3 supply voltage on pin2 of IC800 ? YES
N
O
N
O
Do you observe 3V3 supply voltage on pin125 of IC402 ?
Do you observe 3V3 supply voltage on pin4 of IC800 ?
YES
Check the line and related components between pin125 of IC402 and pin2 of IC800. Replace IC800 with a new one.
YES
Do you observe 3V3 supply voltage on pin3 of IC402 ?
N
O
YES
Check the line and related components between pin3 of IC402 and pin4 of IC800.
Replace IC402 with a new one.
N
O
Do you observe SIF signal on pin52 of IC402 ?
N
O
Do you observe 3V3 supply voltage on pin51 and pin69 of IC402 ? YES
N
O
N O
Do you observe SIF signal on pin12 of IC300?
YES
YES
Check the line and related components that supplies 3V3 voltage to these pins.
Check the line related components between pin12 of IC300 and pin52 of IC402.
N
O
Do you observe +5V supply voltage on pin20 of IC300 ?
N
O
Check related components on +5V supply voltage line
YES
Check related components between IC300 and the tuner. If necessary, replace IC300 with a new one.
Replace IC402 with a new one
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