VXI-5524 Data Sheet
-5524
VXIBUS PRODUCTS
INTERFACE CARD
"The fastest way to
build a VXI Module"
DESCRIPTION
The Model VXI-5524
is a low-cost VXI Interface for connecting virtually any kind of a circuit to the VXIbus. The
VXI-5524 is a registerbased VXI interface
with enough on-board
logic for most applications.
The VXI-5524 has 48 digital I/O signals
to directly control simple circuits or readback data values and a 16-bit VXI data expansion bus for more complex circuitry.
Packaging Concept
The VXI-5524 interface is a narrow PC
card that is located at the VXI bus end of the
module. The user places his components on
a separate printed circuit board which mates
with the VXI-5524 to make a complete 'B' or
'C'' size assembly. The two cards mate together with a right-angle 96-pin DIN connector and are mechanically held together
with a metal bracket.
For quick prototyping, ICS offers a
protoype component board with holes on
0.1 inch centers and a bare copper clad
board. ICS also supplies design kits and
CAD templates so the user can layout his
own printed circuit board.
The VXI-5524 can be enclosed with ICS's
11434x series VXI Hardware Kits to make a
complete 1, 2, or 3-slot wide module. Each
VXI Hardware Kit includes a blank front
panel, side shields and all the hardware
necessary to make a complete 'C' size Module.
User's Interface
The VXI-5524's user interface includes 48
static digital lines, a VXI data expansion bus,
TTL trigger lines and VXIbus interrupt lines.
The static digital interface has three 16-bit
registers that can be used as latched outputs
to control the user's circuits or as gated inputs to read back data or signals. The expansion bus is a buffered, 16-bit wide VXI D16
■
Mates with user's PCB to
form a C or D-size module.
The quickest way to make a
VXI module.
■
A complete VXI-1 Rev 1.4
and VXI-2 compliant
register-based interface.
High speed VXIbus interface
that meets the latest VXIbus
specifications
■
User interface includes 48
I/O signals, a VXI expansion bus, TTL Triggers and
VXI interrupt capability.
Supports virtually any kind
of user circuit or function.
■
User configureable model
number, manufacturer ID,
version and serial numbers
Identifies the finished module
as your product.
■
Two companion component boards available for
prototype modules
No need to layout prototype
boards.
■
Companion hardware kits
available for building 1, 2
or 3-slot wide modules.
Complete hardware support
for all width C-size modules.
VXI-5524 Interface Board
data bus with address capability to read and
write to 26 additional registers.
The user interface has a two trigger lines
that are connected to a selected pair of the
VXIbus TTL Trigger Lines. The input trigger
can be used to start an event on the user's
circuit. The output trigger line can be used to
drive the VXIbus TTL Trigger line and trigger other VXI modules. The user interface
has an interrupt line that can be pulsed to
generate a VXIbus interrupt on a selected
VXI IRQ line. The VXI-5524 reports three
user cause code bits as part of the interrupt
response word.
The user interface also includes a 10 MHz
clock and all seven VXIbus voltages.
Easy Configurability
All of the VXI-5524's configurable functions, such as the manufacturer ID code and
model number, serial number, etc. are stored
in a nonvolatile E2ROM and are restored
when the card is reset or powered on. The
user sets the configurable parameters to personalize the finished VXI module as his product.
Register Based Interface Advantages
Data transfer time can limit a module's
performance regardless of how good the rest
of the circuits are. Message based modules
provide the intelligence and flexibility of a
on-board processor but are limited by the
slow data transfer rate of the VXIbus word
serial transfer protocol. VXI-5524 Register
based modules are not limited by the word
serial protocol as each data register is directly addressable by the VXIbus controller.
ICS
ICS
ELECTRONICS
division of Systems West Inc.
7034 Commerce Circle
Pleasanton, CA 94588
Phone: 925.416.1000
Fax:
925.416.0105
Web: www.icselect.com
Command interpretation is done in the
user's logic or by the device driver in the
Bus controller which further speeds up
the module's response.
VXIbus
VXI Control, Status
and ID Registers
VXI-5524 Block Diagram
Three
48 Data Lines
16-bit
Bi-dir
Handshake Lines
Latch
Data
Xcvr
Address Lines
and Strobes
Address
Decoder
TTLTRG0-7
Trigger
Selector
IRQ1-7
IRQ
Selector
+5, -5, -2, ±12, ±24V
Figure 1
VXI Interrupt and Cause Code Lines
VXI-5524 Block Diagram
PCB Layout Aids
the user's logic so they can be easily
decoded with a '138' type decoder to
address additional devices.
Trigger and IRQ Lines
The VXI-5524's Trigger Selection logic
selects a pair of adjacent VXI TTLTRIG
lines and routes them to the user's circuit
board. The lower TTLTRG line is an
input trigger to initiate action on the
user's circuit. The higher TTLTRG line
drives a VXIbus TTL Trigger line to trigger other modules.
The VXI-5524's IRQ Selection logic
routes a user interrupt onto one of the 7
VXIbus IRQ lines. When the user's logic
pulses the IRQ line, the VXI-5524 latches
a 3-bit cause code for use in the Interrupt
Response word and for the VXI-2 Interrupt Status Register.
Register Addressing
Clock and Power
All VXI modules are assigned 64 bytes
or thirty-two 16-bit word addresses in
the A16 address space. The VXI-5524
uses the first sixteen addresses, 00 hex to
1F hex, for its VXI registers and for compliance with the new VXI Specification
for Extended Register Based Devices.
Addresses 3A-3E hex are used for the 48
data I/O lines. Addresses, 20 hex to 38
hex, are encoded on 4 address lines for
Bi-directional TTL Trigger Pair
VXIbus Power and Clocks
Data Lines
Up to 48 data lines can be controlled
by addressing the three bidirectional
latches on the VXI-5524. The latch direction is set by bits in the Control Register.
When configured as outputs, the latches
hold data to drive the user's circuits. The
latch outputs are high current drivers
capable of sinking 40 mA and sourcing
20 mA. When configured as inputs, the
latches operate as CMOS gates to read
data from the user's circuits. When more
than 48 data lines are needed, additional
latches or other circuits can be placed on
the user's circuit board and attached to
the VXI data expansion bus. The data
expansion bus is a 16-bit wide bus that
buffers the VXI D16 data lines onto the
user's circuit board. Handshake lines
include an address select strobe, a write
line and a not-ready line to hold the
DTACK line.
Expansion Bus
Bus
Xcvr
User's Interface
VD(15:0)
A block diagram of the VXI-5524 is
shown in Figure 1 on the right. It shows
the 48 bi-directional digital I/O lines, an
expansion bus for driving additional circuits, address and strobe lines, VXI triggers, interrupt inputs, power and clocks.
This selection of signals makes it very
easy for the user to build virtually any
kind of a circuit on the mating board.
Simple circuits with minimal data needs
can be driven directly from the 48 data
lines without any additional logic. More
complex circuits such as data converters, FIFOs etc. or circuits that need additional I/O lines can be attached to the
buffered expansion bus.
A clock signal and all VXI voltages
are routed to the user's interface connector. A jumper on the VXI-5524 lets the
user select the VXI-5524's 10 MHz oscillator or the VXIbus CLK10 signal as the
module's clock source.
ICS provides drawings and CAD
design aids to simplify the design of the
user's mating PC board to the VXI-5524.
The mating board outline drawing and
suggested bill of materials are part of the
VXI-5524's Instruction Manual.
PCB design files and CAD templates
are also available on a CD-ROM. These
design aids include the board outline
drawings, parts library and a prototype
schematic. The CAD files are supplied
as DXF files and in ORCAD design format. Both file formats are compatible
with most PC layout and schematic capture systems. The prototype schematic
includes all of the signals on the user
interface. To complete the design, the
user just has to add his components to
the schematic and route the final design.
Complementary CD-ROMs (Part
number 123153) are available at no
charge to any qualified VXI designer or
customer. Call for your copy or email
[email protected] with your name, company name and mailing address.
TABLE 1
USER INTERFACE SIGNAL-PIN ASSIGNMENTS
Pin
Signal
Pin
Signal
Pin
Signal
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
Inhibit#
Clk10
NRdy#
Clear#
Strobe#
DWrite#
DStb#
IRQ#
TrigOut#
TrigIn#
A1
A2
A3
A4
CH48
CH47
CH46
CH45
CH44
CH43
CH42
CH41
CH24
CH23
CH22
CH21
CH20
CH19
CH18
CH17
Acc_LED#
Rdy_LED#
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
Cause1
Cause2
Cause3/RST#
EDR#
Vcc
Gnd
D15
D14
D13
D12
D11
D10
D9
D8
CH40
CH39
CH38
CH37
CH36
CH35
CH34
CH33
CH16
CH15
CH14
CH13
CH12
CH11
CH10
CH9
SysFail_LED#
Fail_LED#
C1
C2
+ 12 V
- 12 V
C3
-2V
- 5.2 V
Vcc
Gnd
D7
D6
D5
D4
D3
D2
D1
D0
CH32
CH31
CH30
CH29
CH28
CH27
CH26
CH25
CH8
CH7
CH6
CH5
CH4
CH3
CH2
CH1
+ 24 V
- 24 V
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
C27
C28
C29
C30
C31
C32
TABLE 2
SIGNAL DEFINITIONS
Signal
Definition
A(1:4)
Data Bus address lines for VXI register addresses 20-3A HEX.
Acc_LED#
Drives Access LED onuser's board.
Cause1
Cause2
Cause3/RST#
User IRQ cause bit 1 (LSB)
User IRQ cause bit 2
Dual purpose line. If VXI-5524 reset
jumper is not installed, the line is the
User IRQ cause bit 3. If the reset
jumper is installed, the line becomes
a reset input to VXI-5524 board logic.
CH(1:48)
Data input-output lines. Data direction set in 16 line increments by user
configuration.
Clear#
Clear strobe to reset user's circuits.
Clk10
10 MHz clock. VXIbus CLK10 or
VXI-5524 10 MHZ oscillator.
D(0:15)
VXI Expansion Data Bus, D0 is LSB
DStb#
Data Bus xfr strobe. Asserted when
Expansion Bus addressed.
DWrite#
Data Bus in write to user direction.
EDR#
External Data Ready input for handshaking CH input lines. User sets
EDR F/F when data is ready.
Fail_LED
Drives Failed LED on user's board.
Inhibit#
Inhibit signal from EDR flip-flop. CH
inputs should be held steady while
Inhibit# is asserted.
IRQ#
User generated VXIbus interrupt.
Latches Cause lines for interrupt response word.
NRdy#
User generated hold input. Holds
VXIbus data transfer if NRdy# is low
before DataStb# goes high.
Rdy_LED#
Drives Ready LED on user's board.
Strobe#
Transfer strobe when CH output data
is stable.
SysFail_LED
Drives SysFail LED on user's board.
TrgIn#
Selected TTL Trigger input line to
user circuits.
TrgOut#
Trigger output line for user generated VXIbus trigger on selected TTL
Trigger line.
VXI-5524: SPECIFICATIONS
VXI Specifications
User Interface
Physical
VXI Capabilities
VXI-1 Revision 1.4 compliant
VXI-2 Revision 1.0 compliant
Static and Dynamic address capability
Register based
Servant device
A16 Address space, D16 Data
Programmable interrupter
Normal handshake data transfer
Includes VXI-2 Version, Serial Number,
Interrupt and Subclass Registers.
Parallel Data Lines
48 TTL/CMOS latched data lines with
33 Kohm pullups, 20 mA source and 40
mA sink capability. Data line direction
set in 16-bit increments. Control lines
include input handshake lines and output data strobe. User configuration
saved in E2ROM and recalled at power
turn-on.
Size, W x H x D
B/C-size narrow card with P1 and P2
VXI bus connectors
9.187in W x 0.62 in H x 3.0 in D
(233 mm W x 15.7 mm H x 76.2 mm D)
Diagnostic Capability
Power-on self test
Built-in diagnostic routines
Four LEDs for VXI status and troubleshooting.
Triggers
VXI TTLTRG lines selected in pairs.
Indicators
Four LEDs showing the state of the VXIbus interface and VXI-5524's logic.
RDY
ACCESS
FAIL
SYSFAIL
Expansion bus
16 data lines, 4 address lines, strobe and
write lines. Expansion bus address range
is 20 to 38 HEX. All signals have 20 mA
source and 40 mA sink capability.
On after self test
On when address recognized
On when selftest failed
VXIbus SysFail signal line
TTL trigger input pulse. 3 mA source, 20
mA sink capability. Pulse waveform
identical to the selected VXIbus TTLTRG
line. May be linked to TTLTRG lines 0, 2,
4, or 6.
TTL trigger output line. Drives selected
VXI TTLTRG lines 1, 3, 5, or 7.
Weight
0.14 kg. (0.32 lbs.)
Power interface logic uses:
5 Vdc @ 300 mA
-5.2 Vdc at 45 mA
-2 Vdc at 9 mA
User Interface
A 3 row x 32 pin DIN connector with the
signals listed in Table 1.
VXI Interface
Standard P1 and P2 connectors.
Included Accessories
Instruction manual with PCB layout
drawings, design rules for user's PCB
and example user circuits.
Interrupter Capability
Interrupter line and three Cause Code
lines. Generates VXIbus interrupt and
latches the cause code when the interrupter line is pulsed.
Programming guide and sample routines for user interface signals, and expansion bus data transfers.
Other Signals
CLEAR#: low true pulse to reset user
logic. 20 mA source/40 mA sink.
Available Component Boards
RST#: low true input to reset VXI-5524
logic.
CLK10: VXIbus or VXI-5524 10 MHz
clock. 20 mA source/40 mA sink.
LED drive signals for operating four
front panel LEDs. 2 mA sink.
Mounting bracket.
Two boards with mating connector, front
panel LEDs and Reset button. Prototyping Board has four power planes and
holes on 0.1 inch centers. Bare board has
copper-clad on both sides.
Available VXI Kits
Single, dual and triple wide C-size module hardware kits. Each kit includes side
shields, blank front panels and all necessary hardware. Refer to ICS's VXI-KIT
data sheet for more information about
the 11434x and 114750 hardware kits.
ORDERING INFORMATION
VXIbus Register-based Interface Adapter Card with and mounting bracket
Part Number
VXI-5524
Protoype User Board with holes
114820
Prototype User Bare Board (Copper clad)
114830
VXIbus Hardware Kits
3/04
see separate data sheet
Copyright 2004 ICS Electronics. Specifications subject to change without notice
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