"A 65-W High-Efficiency UHF GaN Power Amplifier,"

"A 65-W High-Efficiency UHF GaN Power Amplifier,"
A 65–W High–Efficiency UHF GaN Power Amplifier
Néstor D. López, John Hoversten, Matthew Poulton∗ and Zoya Popović
Department of Electrical and Computer Engineering
University of Colorado, Boulder, Colorado 80309, USA
∗
RF Micro Devices, Charlotte, North Carolina 28269, USA
Abstract— This paper presents a high–efficiency UHF power
amplifier (PA) using a GaN HEMT on a SiC substrate transistor
as the active device. The PA delivers 65 W with 82% power
added efficiency (PAE), and 45 W with 84% PAE at 370 MHz,
with supply voltages of 35 V and 28 V, respectively. Load pull
techniques under Class–E conditions are used for device characterization and matching network design. The PA is implemented
in a hybrid circuit with mixed lumped–element and transmission–
line matching networks. A weighted Euclidean distance is defined
to enable tradeoff studies between output power (POUT ) and
efficiency, in order to find the final optimal amplifier design.
Euclidean distance is used to assess the tradeoff between
output power and efficiency for the final optimal amplifier
design. Figure 1(a) shows a picture of the final Class–E PA,
while Figure 1(b) shows a power sweep for a supply voltage
of 28 V.
Index Terms— GaN HEMT, High–Efficiency, Class–E, UHF,
Power Amplifiers
I. I NTRODUCTION
978-1-4244-1780-3/08/$25.00 © 2008 IEEE
(a) − IMS 2008
RFMD060 28V
100
50
45
90
D
Output power [dBm] and Gain [dB]
Pout
40
80
PAE
35
70
30
60
25
50
Gain
20
40
15
30
10
20
5
10
0
10
15
20
25
Input Power [dBm]
30
35
Efficiency [%]
TATE–of–the–art wide–bandgap semiconductor RF transistors are delivering record–breaking power levels from
solid–state devices at microwave frequencies. Some of the
commercial transistors can deliver more than 20 W of output
power with cutoff frequencies higher than 3 GHz. A number
of excellent amplifiers have been demonstrated in the lower
microwave frequency range [1]–[4].
The UHF region can also benefit from these novel devices
[5]. Wide–bandgap semiconductors have better intrinsic material properties compared to standard Si LDMOS transistors, i.e.
larger energy gap (support higher internal electric fields before
breakdown), lower dielectric value (lower capacitive loading),
higher thermal conductivity (higher heat handling), and higher
critical electric fields (higher RF power) [6]. High voltage
operation and high power density with low parasitic reactance
translate into robust devices that can withstand high–stress
conditions typically associated with switched–mode operation.
For example, in Class–E mode the peak voltage across the
device can be more than 3.56 times higher than the supply
voltage [8]. The supply voltage must then be limited by this
factor (VDSS /3.56 where VDSS is the absolute maximum drainto-source voltage). Therefore, devices with high breakdown
voltage are ideal for this mode of operation.
In this paper, a high–efficiency high–power UHF transmission line Class–E power amplifier is designed with a GaN
HEMT on a SiC substrate transistor from RFMD that is able
to deliver 60 W in the 2 GHz range when operated in Class–AB
mode with a 48 V supply. Loadpull techniques under Class–E
conditions are used for device characterization. A weighted
S
0
(b)
Fig. 1. A photograph of the final hybrid transmission line class-E PA. (b)
Input power sweep of the class-E mode 370-MHz PA for a supply voltage of
28 V. The maximum PAE is 84% with a drain efficiency of 87% and 45 W of
output power.
II. H YBRID C LASS –E A MPLIFIER
In Class–E operation the transistor behaves as a switch. The
device is biased close to cutoff and driven into compression.
The transistor turns ON and OFF with the RF drive which also
provides the switching frequency. For the device to operate
in ideal Class–E, all the harmonics must be terminated in an
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65
open circuit, while the fundamental is matched to the Class–
E impedance which depends on the operating frequency and
the device intrinsic output capacitance [7]-[13]. Class–E power
amplifiers have been shown to achieve efficiencies in the order
of 95% in the low MHz range and 70% at X–Band ([10], [11],
[1], [12]).
In the transmission line Class–E implementation an open
stub offers a high–impedance termination at the second harmonic [9]. Additional harmonics can be terminated for small
improvements in efficiency at the expense of circuit complexity. The fundamental Class–E impedance can be estimated
from the transistor output capacitance and the operating frequency. The output capacitance can be approximated from the
linear S-parameters of the device and in our case is close to
9 pF. The Class–E impedance is calculated to be 9 + j10 Ω at
370 MHz.
40
GMax (dB)
Gain [dB]
30
|H(2,1)| (dB)
20
10
0
ft
fmax
-10
.1
1
10
Frequency [GHz]
100
Fig. 2. Short circuit current gain and maximum available gain of a 0.5 µm
gate length GaN HEMT with source coupled field plate.
AlGaN/GaN HEMTs based on an RFMD developed process are used as the active device [14]. These transistors
are fabricated on a 3-inch silicon carbide (SiC) substrate
for improved thermal dissipation performance at increased
power density over existing semiconductor technologies. The
process gate length is 0.5 µm, and additionally employs source
connected field modulation plates, which allow operation at
a quiescent drain voltage of up to 50 V. This high operating
voltage increases the device optimum impedance and lowers
the device output parasitic capacitance for a given output
power capability. The devices exhibit a pinch–off voltage of
about -4 V and a peak current density of 0.9 A/mm. The
current and power gain cut–off frequencies (ft and fmax )
as measured from small periphery devices are 11 GHz and
18 GHz (Figure 2), respectively, at a drain voltage of 48 V with
a low Class-AB bias point of 20 mA/mm. Pulsed measurements
on 2×400 µm AlGaN/GaN HEMT devices typically provide a
saturated output power density greater than 3 W/mm at a drain
voltage of 28 V and a saturated output power density greater
than 5 W/mm at a drain voltage of 48 V.
The Class–E amplifier is fabricated on a 0.762 mm thick
Rogers RO4350B substrate. The matching networks are im-
978-1-4244-1780-3/08/$25.00 © 2008 IEEE
plemented as a hybrid between transmission line and lumped
components as shown in Figure 1(a).
III. T RANSISTOR C HARACTERIZATION
Load pull techniques can be used as a robust empirical
method for characterizing transistors for Class–E operation by
including the harmonic termination in the test fixture. Focus
Microwaves load pull automatic tuners are used to obtain
output power and drain efficiency contours at the operating
frequency. The transistor is mounted in a modular fixture that
allows TRL calibration placing the reference planes at the
device leads.
The transistor was characterized at 370–MHz under three
different supply voltages; 28 V, 36 V and 48 V and the results
are shown in Figure 3. Figure 3(a) shows POUT and ηD contours
for a 28 V supply voltage. The Class–E impedance predicted
by the simple theoretical formulae, e.g. [13] with a 9 pF device
output capacitance is marked ‘*’ for comparison. From the figure it can be observed that the optimal output power and drain
efficiency contours do not overlap. This means that a tradeoff
analysis is necessary in order to choose the amplifier output
impedance matching. Ultimately, the PA designer needs to
deal with this analysis depending on the particular application.
However, the next section discussed a proposed optimization
procedure based on a weighted Euclidean distance.
Figure 3(b) shows the output power trend as a function
of supply voltage. As the drain voltage increases the optimal
impedance imaginary part increases toward higher inductance,
while the real part remains approximately constant. Figure 3(c)
shows that the optimum drain efficiency remains constant.
Assuming no varactor effect in the output capacitance the
Class–E impedance should remain constant as a function
of supply voltage, since the supply voltage only scales the
amplitude of the voltage and current waveforms across the
device but does not change their shape.
IV. O PTIMUM L OAD I MPEDANCE S ELECTION
It can be seen from the example in Figure 3(a) that a load
impedance matching that optimizes power is not the same
as the impedance matching that optimizes efficiency. For a
particular PA design it would be useful to have a guideline
of how much output power needs to be sacrificed to meet a
particular efficiency specification. In this section we propose
a simple method which allow a systematic approach to this
tradeoff.
The method is outlined as follows:
•
•
•
For each impedance the measured output power versus
measured efficiency is plotted from load pull data. An
example is given in Figure 4.
Given that the data deviates significantly from a straight
line we defined the metric “h” as the Euclidean distance
from the origin.
If this metric is defined in terms of output power and
efficiency the metric is as follows,
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66
j20
84
10
−j4
’ ’
*
20
j40
∞
40
0
Pout [W]
ND [%]
Z
4
10
E
−j40
38 56
j4
20
−j10
∞
40
0
4
10
∞
40
−j10
−j20
(a)
20
28V
36V
48V
−j4
−j40
−j20
73
89
84 68
28V
36V
48V
−j4
−j10
43
42
42
j4
42
4
j10
66 6 1
89
47
0
j40
47
47
4
47 2
j4
j20
j10
51
84
j40
68
84
j20
j10
−j40
−j20
(b)
(c)
Fig. 3. Load pull contours for the RFMD GaN HEMT on a SiC substrate. (a) POUT (W) and ηD (%) contours when the transistor is biased at 28 V. The optimum
POUT and ηD regions do not overlap. The figure also shows the optimal Class–E impedance (9 + j10 Ω) estimated from the device 9 pF output capacitance
marked with ‘*’. (b) POUT (W) and (c) ηD (%) contours when the transistor supply voltage is 28 V, 36 V and 48 V. The optimal output power impedance varies
as a function of the supply voltage, while the high efficiency region remains constant. The Smith charts are normalized to 20 Ω.
100
values of the parameter α in Equation 1 are chosen. High
values of h mean that the specific requirements for a specific
tradeoff are matched for all the impedances on this contour.
For example α = 0.7 (Figure 5(b) gives more weighting to
efficiency than power. It seems that in this case the solution
is not unique as there are two distinct contours that maximize
the parameter h. This method can be extended to combine
additional parameters in a slightly more complicated metric.
For example, IMD level would be relevant for linearized ClassE PAs with envelope tracking [15]. In the presented design we
choose α = 0.7 and the resulting performance is presented in
the next section.
90
Drain Efficiency [%]
80
70
60
50
40
2
Pout
2
N D
h= 1
P out ,max 30
20
10
0
0
10
20
30
40
Output Power [W]
50
60
Fig. 4.
Drain efficiency values for specific output power are plotted as
obtained by the load pull measurement (Figure 3(a)). The distance of each
point to the origin is used a as metric for optimization.
h=
s
(1 − α) ·
POUT
POUT, max
2
978-1-4244-1780-3/08/$25.00 © 2008 IEEE
VDS
28 V
35 V
48 V
Pin
+32 dBm
+33 dBm
+34 dBm
Pout
45 W
65 W
87 W
Gain (dB)
14 dB
15 dB
15 dB
ηD
87%
85%
71%
PAE
84%
82%
70%
V. C LASS -E A MPLIFIER P ERFORMANCE
+α·
2
ηD
(1)
In the case when the output power is maximized without
concern for efficiency, the parameter α = 0.
• In the case when the efficiency is maximized without
concern for output power sacrifice, the parameter α = 1.
• Typically, however, there would be a tradeoff between
this two parameters corresponding to different values of
α between 0 and 1.
• When a parameter α is chosen for a given design the load
pull data can be replotted to target the optimal impedance
for a given tradeoff.
Examples are shown in Figure 5 for the load pull data
corresponding to Figure 3(a). Load pull contours for different
•
TABLE I
M EASURED R ESULTS FOR C LASS -E A MPLIFIER
A high–efficiency power amplifier was design and implemented for an impedance matching corresponding to α =
0.7. The input and output matching impedances are Zin =
10.1 + j1 Ω and Zout = 12 + j6 Ω. Input power sweeps were
performed for the amplifier biased at 28 V, 35 V, and 48 V and
the results are summarized in Table I. The amplifier achieves
a maximum of 84% PAE with corresponding 87% ηD and
45 W of POUT . For a slightly higher supply voltage (35 V) the
amplifier is able to deliver 65 W of POUT with little degradation
in efficiency. For a supply voltage of 48 V the amplifier is able
to deliver 87 W, with efficiencies close to 70%. Figure 1(b)
shows the power sweep corresponding to a supply voltage of
28 V, while the cases corresponding to supply voltages of 35 V
and 48 V are shown in Figure 6.
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67
j20
j20
20
∞ 0
4
10
56
j40
70
j10
66
α = 0.8
56 60
j4
74
72
68 7 0
58
64
40
6508
10
j4
50
60
70
4
62
α = 0.7
80
90
90
80 70 0
6
50
0
j40
66
68
α=0
j4
j20
j10
j40
56
58
60
64
j10
66
62
20
40
∞ 0
4
10
(b)
(a)
20
40
∞
(c)
50
100
45
90
Pout
80
40
70
35
D
&
PAE
30
25
60
50
Gain
20
40
15
30
10
35V
48V
20
10
5
0
10
Efficiency [%]
Output power [dBm] and Gain [dB]
Fig. 5. Load pull contours in a normalized 20 Ω Smith Chart for different values of the parameter α in Equation 1. High values of h mean that the specific
requirements for a specific tradeoff are matched for all the impedances on this contour; (a) show impedance contours for α = 0, when power is optimize and
efficiency is sacrificed, (b) α = 0.7 gives more weighting to efficiency and (c) α = 0.8 further maximizes efficiency.
15
20
25
Input Power [dBm]
30
0
35
Fig. 6. Amplifier power sweeps for supply voltages of 35 V (black) and
48 V (gray) when the amplifier is operated at 370-MHz. The maximum PAE
when the supply voltage is 35 V is 82 % with a drain efficiency of 85 % and
an output power of 65 W. When the supply voltage is increased to 48 V the
output power is 87 W, however the PAE drops to 70%.
VI. C ONCLUSIONS
UHF PAs can benefit from wide–bandgap transistors due
to their high power handling, high breakdown voltage, and
low output capacitance. This work summarizes the design of a
UHF high–efficiency power amplifier using a GaN HEMT on
a SiC substrate transistor as the active device. The transistor
was characterized with load pull techniques under class–E
conditions. An optimization procedure based on a weighted
Euclidean distance approach was used for impedance matching
selection. This amplifier delivers 65 W of RF power at 370–
MHz with 85% ηD and 82% PAE for a supply voltage of 35 V.
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[3] Y. Xu, S. Gao, S. Heikman, S. Long, U. Mishra, and R. York, “A
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[12] S. Pajic, N. Wang, P. Watson, T. Quach, and Z. Popovic, “X-Band TwoStage High-Efficiency Switched-Mode Power Amplifiers,” IEEE Trans.
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[14] R. Vetury, Y. Wei, D. S. Green, S. R. Gibb, T. W. Mercier, K. Leverich,
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VII. ACKNOWLEDGEMENTS
We thank Mr. Bill McCalpin from TriQuint, formerly dBm Engineering,
for use of load pull system and invaluable advice. We are also grateful to Dr.
David Choi, formerly at RFMD, for starting a useful collaboration.
R EFERENCES
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Linthicum, L. Larson, and P. Asbeck, “High-Efficiency Envelope-Tracking
W-CDMA Base-Station Amplifier using a GaN HFETs,”IEEE Trans. on
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978-1-4244-1780-3/08/$25.00 © 2008 IEEE
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