datasheet for FDD5612 by Fairchild Semiconductors

datasheet for FDD5612 by Fairchild Semiconductors
FDD5612
60V N-Channel PowerTrench MOSFET
General Description
This N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers.
Features
• 18 A, 60 V.
These MOSFETs feature faster switching and lower
gate charge than other MOSFETs with comparable
RDS(ON) specifications. The result is a MOSFET that is
easy and safer to drive (even at very high frequencies),
and DC/DC power supply designs with higher overall
efficiency.
RDS(ON) = 55 mΩ @ VGS = 10 V
RDS(ON) = 64 mΩ @ VGS = 6 V
• Optimized for use in high frequency DC/DC
converters.
• Low gade charge.
• Very fast switching.
D
D
G
G
S
TO-252
S
Absolute Maximum Ratings
Symbol
Parameter
VDSS
Drain-Source Voltage
VGSS
Gate-Source Voltage
ID
Drain Current
Drain Current
PD
TA=25oC unless otherwise noted
– Continuous
Units
60
V
±20
V
(Note 1)
18
A
(Note 1a)
5.4
– Pulsed
100
Maximum Power Dissipation
(Note 1)
42
(Note 1a)
3.8
(Note 1b)
TJ, TSTG
Ratings
W
1.6
–55 to +175
°C
(Note 1)
3.5
°C/W
(Note 1a)
40
°C/W
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJC
Thermal Resistance, Junction-to-Case
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1b)
96
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
FDD5612
FDD5612
13’’
16mm
2500 units
2001 Fairchild Semiconductor Corporation
FDD5612 REV. C1(W)
FDD5612
March 2001
Symbol
TA = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max Units
Drain-Source Avalanche Ratings (Note 1)
W DSS
IAR
Single Pulse Drain-Source
Avalanche Energy
Maximum Drain-Source Avalanche
Current
VDD = 30 V,
ID = 5.4 A
90
mJ
5.4
A
Off Characteristics
BVDSS
ID = 250 µA
VGS = 0 V,
ID = 250 µA, Referenced to 25°C
60
V
∆BVDSS
∆TJ
IDSS
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
VDS = 48 V,
VGS = 0 V
1
µA
IGSSF
Gate–Body Leakage, Forward
VGS = 20 V,
VDS = 0 V
100
nA
IGSSR
Gate–Body Leakage, Reverse
VGS = –20 V
VDS = 0 V
–100
nA
On Characteristics
62
mV/°C
(Note 2)
ID = 250 µA
1
2.4
VGS(th)
Gate Threshold Voltage
VDS = VGS,
∆VGS(th)
∆TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
ID = 250 µA, Referenced to 25°C
–6
36
42
64
3
V
mV/°C
55
64
103
ID(on)
On–State Drain Current
VGS = 10 V,
ID = 5.4 A
ID = 5 A
VGS = 6 V,
VGS = 10 V, ID = 5.4 A, TJ = 125°C
VGS = 10 V,
VDS = 5 V
gFS
Forward Transconductance
VDS = 5 V,
ID = 5.4 A
15
VDS = 30 V,
V GS = 0 V,
660
pF
79
pF
36
pF
20
mΩ
A
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Switching Characteristics
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
td(off)
f = 1.0 MHz
(Note 2)
8
16
ns
4
8
ns
Turn–Off Delay Time
24
38
ns
tf
Turn–Off Fall Time
4
8
ns
Qg
Total Gate Charge
7.5
11
nC
Qgs
Gate–Source Charge
Qgd
Gate–Drain Charge
VDD = 30 V,
VGS = 10 V,
VDS = 30 V,
VGS = 10 V
ID = 1 A,
RGEN = 6 Ω
ID = 5.4 A,
2.5
nC
3
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
VSD
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
VGS = 0 V, IS = 2.7 A
Voltage
(Note 2)
0.8
2.7
A
1.2
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the drain tab.
RθJA is the guaranteed design while RθJA is determined by the user’s design. RθJA has been used to determine some of the maximum ratings.
a) RθJA= 40oC/W when
mounted on a 1in2 pad of
2oz copper.
b) RθJA= 96oC/W when
mounted on a 0.076 in2
pad of 2oz copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDD5612 Rev C1(W)
FDD5612
Electrical Characteristics
FDD5612
Typical Characteristics
30
6.0V
2.2
5.0V
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
VGS = 10V
ID, DRAIN CURRENT (A)
25
4.5V
20
15
4.0V
10
5
2
VGS = 4.0V
1.8
1.6
4.5V
1.4
5.0V
6.0V
1.2
10V
1
0.8
0
0
1
2
3
4
0
5
6
Figure 1. On-Region Characteristics.
18
24
30
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.12
2.6
ID = 2.7A
ID = 5.4A
VGS = 10V
2.2
RDS(ON), ON-RESISTANCE (OHM)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
12
ID, DRAIN CURRENT (A)
VDS, DRAIN-SOURCE VOLTAGE (V)
1.8
1.4
1
0.6
0.2
0.1
TA = 125oC
0.08
0.06
TA = 25oC
0.04
0.02
-50
-25
0
25
50
75
100
125
150
175
2
4
o
TJ, JUNCTION TEMPERATURE ( C)
6
8
10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
TA =-55oC
ID, DRAIN CURRENT (A)
VDS = 5V
IS, REVERSE DRAIN CURRENT (A)
30
o
25 C
25
125oC
20
15
10
5
VGS = 0V
10
TA = 125oC
1
25oC
0.1
-55oC
0.01
0.001
0.0001
0
2
3
4
5
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
6
0
0.2
0.4
0.6
0.8
1
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDD5612 Rev C1(W)
FDD5612
Typical Characteristics
1000
ID = 5.4A
VDS = 20V
f = 1MHz
VGS = 0 V
30V
8
800
40V
CAPACITANCE (pF)
VGS, GATE-SOURCE VOLTAGE (V)
10
6
4
CISS
600
400
200
2
COSS
CRSS
0
0
0
2
4
6
8
10
12
0
14
10
Figure 7. Gate Charge Characteristics.
40
50
60
80
P(pk), PEAK TRANSIENT POWER (W)
ID, DRAIN CURRENT (A)
30
Figure 8. Capacitance Characteristics.
1000
100µs
100
RDS(ON) LIMIT
1m
10ms
100ms
10
1s
1
10s
VGS = 4.5V
SINGLE PULSE
RθJA = 96oC/W
0.1
DC
TA = 25oC
0.01
0.1
1
10
SINGLE PULSE
RθJA = 96°C/W
TA = 25°C
60
40
20
0
0.01
100
0.1
VDS, DRAIN-SOURCE VOLTAGE (V)
1
10
100
1000
t1, TIME (sec)
Figure 9. Maximum Safe Operating Area.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
20
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
RθJA(t) = r(t) + RθJA
RθJA = 96 °C/W
0.2
0.1
0.1
0.05
0.01
0.02
0.01
P(pk)
t1
t2
0.001
0.0001
0.0001
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
SINGLE PULSE
0.001
0.01
0.1
1
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDD5612 Rev C1(W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOSTM
EnSignaTM
FACT™
FACT Quiet Series™
FAST 
FASTr™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
PowerTrench 
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER 
SMART START™
Star* Power™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
UHC™
UltraFET 
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H1
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